./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix046_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_53b0ec25-4c9f-420f-892f-f1dd500ce8f3/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_53b0ec25-4c9f-420f-892f-f1dd500ce8f3/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_53b0ec25-4c9f-420f-892f-f1dd500ce8f3/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_53b0ec25-4c9f-420f-892f-f1dd500ce8f3/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix046_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_53b0ec25-4c9f-420f-892f-f1dd500ce8f3/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_53b0ec25-4c9f-420f-892f-f1dd500ce8f3/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 06f050b4554a02ff5df829f7b7837ca78aecce79 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:53:26,363 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:53:26,364 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:53:26,372 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:53:26,372 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:53:26,372 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:53:26,373 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:53:26,375 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:53:26,376 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:53:26,377 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:53:26,377 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:53:26,378 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:53:26,378 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:53:26,379 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:53:26,380 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:53:26,380 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:53:26,381 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:53:26,382 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:53:26,383 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:53:26,385 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:53:26,386 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:53:26,387 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:53:26,387 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:53:26,388 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:53:26,390 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:53:26,390 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:53:26,390 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:53:26,391 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:53:26,391 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:53:26,391 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:53:26,392 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:53:26,392 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:53:26,392 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:53:26,393 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:53:26,393 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:53:26,394 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:53:26,394 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:53:26,394 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:53:26,394 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:53:26,395 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:53:26,395 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:53:26,396 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_53b0ec25-4c9f-420f-892f-f1dd500ce8f3/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:53:26,405 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:53:26,405 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:53:26,405 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:53:26,406 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:53:26,406 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:53:26,406 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:53:26,406 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:53:26,406 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:53:26,406 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:53:26,406 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:53:26,406 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:53:26,407 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:53:26,407 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:53:26,407 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:53:26,407 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:53:26,407 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:53:26,407 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:53:26,407 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:53:26,407 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:53:26,407 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:53:26,408 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:53:26,408 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:53:26,408 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:53:26,408 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:53:26,408 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:53:26,408 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:53:26,408 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:53:26,409 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:53:26,409 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:53:26,409 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_53b0ec25-4c9f-420f-892f-f1dd500ce8f3/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 06f050b4554a02ff5df829f7b7837ca78aecce79 [2019-12-07 17:53:26,512 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:53:26,521 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:53:26,524 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:53:26,525 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:53:26,526 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:53:26,526 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_53b0ec25-4c9f-420f-892f-f1dd500ce8f3/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix046_power.opt.i [2019-12-07 17:53:26,571 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_53b0ec25-4c9f-420f-892f-f1dd500ce8f3/bin/uautomizer/data/49402b64c/3d4b777b4e724e7ea15f61bca9f4317d/FLAGd35e4b735 [2019-12-07 17:53:26,937 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:53:26,937 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_53b0ec25-4c9f-420f-892f-f1dd500ce8f3/sv-benchmarks/c/pthread-wmm/mix046_power.opt.i [2019-12-07 17:53:26,948 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_53b0ec25-4c9f-420f-892f-f1dd500ce8f3/bin/uautomizer/data/49402b64c/3d4b777b4e724e7ea15f61bca9f4317d/FLAGd35e4b735 [2019-12-07 17:53:27,334 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_53b0ec25-4c9f-420f-892f-f1dd500ce8f3/bin/uautomizer/data/49402b64c/3d4b777b4e724e7ea15f61bca9f4317d [2019-12-07 17:53:27,336 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:53:27,337 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:53:27,337 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:53:27,338 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:53:27,340 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:53:27,340 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:53:27" (1/1) ... [2019-12-07 17:53:27,342 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7030ab51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:53:27, skipping insertion in model container [2019-12-07 17:53:27,342 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:53:27" (1/1) ... [2019-12-07 17:53:27,347 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:53:27,378 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:53:27,612 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:53:27,620 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:53:27,662 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:53:27,715 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:53:27,715 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:53:27 WrapperNode [2019-12-07 17:53:27,715 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:53:27,716 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:53:27,716 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:53:27,716 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:53:27,722 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:53:27" (1/1) ... [2019-12-07 17:53:27,735 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:53:27" (1/1) ... [2019-12-07 17:53:27,759 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:53:27,759 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:53:27,759 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:53:27,759 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:53:27,766 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:53:27" (1/1) ... [2019-12-07 17:53:27,766 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:53:27" (1/1) ... [2019-12-07 17:53:27,769 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:53:27" (1/1) ... [2019-12-07 17:53:27,769 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:53:27" (1/1) ... [2019-12-07 17:53:27,776 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:53:27" (1/1) ... [2019-12-07 17:53:27,779 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:53:27" (1/1) ... [2019-12-07 17:53:27,782 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:53:27" (1/1) ... [2019-12-07 17:53:27,786 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:53:27,786 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:53:27,786 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:53:27,786 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:53:27,787 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:53:27" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_53b0ec25-4c9f-420f-892f-f1dd500ce8f3/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:53:27,827 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:53:27,828 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:53:27,828 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:53:27,828 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:53:27,828 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:53:27,828 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:53:27,828 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:53:27,828 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:53:27,829 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:53:27,829 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:53:27,829 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 17:53:27,829 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 17:53:27,829 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:53:27,829 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:53:27,829 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:53:27,831 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:53:28,198 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:53:28,198 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:53:28,199 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:53:28 BoogieIcfgContainer [2019-12-07 17:53:28,200 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:53:28,200 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:53:28,201 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:53:28,203 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:53:28,203 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:53:27" (1/3) ... [2019-12-07 17:53:28,204 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@681913e5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:53:28, skipping insertion in model container [2019-12-07 17:53:28,204 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:53:27" (2/3) ... [2019-12-07 17:53:28,204 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@681913e5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:53:28, skipping insertion in model container [2019-12-07 17:53:28,204 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:53:28" (3/3) ... [2019-12-07 17:53:28,206 INFO L109 eAbstractionObserver]: Analyzing ICFG mix046_power.opt.i [2019-12-07 17:53:28,214 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:53:28,214 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:53:28,220 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:53:28,221 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:53:28,251 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,251 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,251 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,251 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,252 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,252 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,252 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,252 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,253 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,253 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,253 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,253 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,253 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,254 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,254 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,254 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,254 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,254 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,254 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,255 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,255 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,255 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,255 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,255 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,256 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,256 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,256 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,256 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,256 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,256 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,259 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,259 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,259 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,259 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,260 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,260 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,260 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,260 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,261 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,261 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,261 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,261 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,261 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,261 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,262 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,262 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,262 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,262 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,262 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,262 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,263 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,263 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,263 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,263 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,263 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,263 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,264 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,264 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,264 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,264 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,264 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,264 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,265 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,265 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:53:28,280 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 17:53:28,295 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:53:28,295 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:53:28,295 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:53:28,295 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:53:28,295 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:53:28,295 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:53:28,295 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:53:28,296 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:53:28,308 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 181 places, 209 transitions [2019-12-07 17:53:28,309 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 17:53:28,371 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 17:53:28,371 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:53:28,382 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 17:53:28,394 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 17:53:28,427 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 17:53:28,427 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:53:28,433 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 17:53:28,448 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12668 [2019-12-07 17:53:28,449 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:53:31,373 WARN L192 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 97 [2019-12-07 17:53:31,480 INFO L206 etLargeBlockEncoding]: Checked pairs total: 52490 [2019-12-07 17:53:31,480 INFO L214 etLargeBlockEncoding]: Total number of compositions: 119 [2019-12-07 17:53:31,482 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 100 transitions [2019-12-07 17:53:33,484 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 37086 states. [2019-12-07 17:53:33,485 INFO L276 IsEmpty]: Start isEmpty. Operand 37086 states. [2019-12-07 17:53:33,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 17:53:33,490 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:33,490 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:33,490 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:33,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:33,494 INFO L82 PathProgramCache]: Analyzing trace with hash -1862617909, now seen corresponding path program 1 times [2019-12-07 17:53:33,500 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:33,500 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019548530] [2019-12-07 17:53:33,500 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:33,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:33,653 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:33,654 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1019548530] [2019-12-07 17:53:33,654 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:33,654 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:53:33,655 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1313538118] [2019-12-07 17:53:33,658 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:53:33,658 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:33,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:53:33,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:53:33,668 INFO L87 Difference]: Start difference. First operand 37086 states. Second operand 3 states. [2019-12-07 17:53:34,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:34,003 INFO L93 Difference]: Finished difference Result 36830 states and 157144 transitions. [2019-12-07 17:53:34,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:53:34,005 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 17:53:34,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:34,233 INFO L225 Difference]: With dead ends: 36830 [2019-12-07 17:53:34,234 INFO L226 Difference]: Without dead ends: 36102 [2019-12-07 17:53:34,234 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:53:34,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36102 states. [2019-12-07 17:53:35,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36102 to 36102. [2019-12-07 17:53:35,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36102 states. [2019-12-07 17:53:35,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36102 states to 36102 states and 154176 transitions. [2019-12-07 17:53:35,319 INFO L78 Accepts]: Start accepts. Automaton has 36102 states and 154176 transitions. Word has length 9 [2019-12-07 17:53:35,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:35,320 INFO L462 AbstractCegarLoop]: Abstraction has 36102 states and 154176 transitions. [2019-12-07 17:53:35,320 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:53:35,320 INFO L276 IsEmpty]: Start isEmpty. Operand 36102 states and 154176 transitions. [2019-12-07 17:53:35,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 17:53:35,326 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:35,326 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:35,326 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:35,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:35,327 INFO L82 PathProgramCache]: Analyzing trace with hash 290643941, now seen corresponding path program 1 times [2019-12-07 17:53:35,327 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:35,327 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [464736414] [2019-12-07 17:53:35,327 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:35,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:35,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:35,391 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [464736414] [2019-12-07 17:53:35,391 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:35,391 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:53:35,392 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1852456117] [2019-12-07 17:53:35,392 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:53:35,393 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:35,393 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:53:35,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:53:35,393 INFO L87 Difference]: Start difference. First operand 36102 states and 154176 transitions. Second operand 4 states. [2019-12-07 17:53:35,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:35,917 INFO L93 Difference]: Finished difference Result 56134 states and 231868 transitions. [2019-12-07 17:53:35,917 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:53:35,917 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 17:53:35,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:36,215 INFO L225 Difference]: With dead ends: 56134 [2019-12-07 17:53:36,216 INFO L226 Difference]: Without dead ends: 56106 [2019-12-07 17:53:36,216 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:53:36,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56106 states. [2019-12-07 17:53:37,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56106 to 51222. [2019-12-07 17:53:37,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51222 states. [2019-12-07 17:53:37,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51222 states to 51222 states and 213628 transitions. [2019-12-07 17:53:37,488 INFO L78 Accepts]: Start accepts. Automaton has 51222 states and 213628 transitions. Word has length 15 [2019-12-07 17:53:37,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:37,489 INFO L462 AbstractCegarLoop]: Abstraction has 51222 states and 213628 transitions. [2019-12-07 17:53:37,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:53:37,489 INFO L276 IsEmpty]: Start isEmpty. Operand 51222 states and 213628 transitions. [2019-12-07 17:53:37,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 17:53:37,491 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:37,491 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:37,491 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:37,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:37,492 INFO L82 PathProgramCache]: Analyzing trace with hash -497322091, now seen corresponding path program 1 times [2019-12-07 17:53:37,492 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:37,492 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [471294929] [2019-12-07 17:53:37,492 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:37,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:37,545 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:37,546 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [471294929] [2019-12-07 17:53:37,546 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:37,546 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:53:37,546 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [190446904] [2019-12-07 17:53:37,546 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:53:37,546 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:37,546 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:53:37,547 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:53:37,547 INFO L87 Difference]: Start difference. First operand 51222 states and 213628 transitions. Second operand 4 states. [2019-12-07 17:53:38,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:38,053 INFO L93 Difference]: Finished difference Result 64218 states and 266056 transitions. [2019-12-07 17:53:38,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:53:38,054 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 17:53:38,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:38,198 INFO L225 Difference]: With dead ends: 64218 [2019-12-07 17:53:38,198 INFO L226 Difference]: Without dead ends: 64218 [2019-12-07 17:53:38,198 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:53:38,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64218 states. [2019-12-07 17:53:39,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64218 to 57026. [2019-12-07 17:53:39,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57026 states. [2019-12-07 17:53:39,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57026 states to 57026 states and 237588 transitions. [2019-12-07 17:53:39,584 INFO L78 Accepts]: Start accepts. Automaton has 57026 states and 237588 transitions. Word has length 15 [2019-12-07 17:53:39,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:39,584 INFO L462 AbstractCegarLoop]: Abstraction has 57026 states and 237588 transitions. [2019-12-07 17:53:39,584 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:53:39,584 INFO L276 IsEmpty]: Start isEmpty. Operand 57026 states and 237588 transitions. [2019-12-07 17:53:39,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 17:53:39,596 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:39,596 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:39,596 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:39,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:39,596 INFO L82 PathProgramCache]: Analyzing trace with hash -210168677, now seen corresponding path program 1 times [2019-12-07 17:53:39,596 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:39,597 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1654571138] [2019-12-07 17:53:39,597 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:39,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:39,653 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:39,653 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1654571138] [2019-12-07 17:53:39,653 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:39,653 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:53:39,654 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [734752514] [2019-12-07 17:53:39,654 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:53:39,654 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:39,654 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:53:39,654 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:53:39,654 INFO L87 Difference]: Start difference. First operand 57026 states and 237588 transitions. Second operand 5 states. [2019-12-07 17:53:40,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:40,217 INFO L93 Difference]: Finished difference Result 76194 states and 312200 transitions. [2019-12-07 17:53:40,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:53:40,218 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 17:53:40,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:40,387 INFO L225 Difference]: With dead ends: 76194 [2019-12-07 17:53:40,387 INFO L226 Difference]: Without dead ends: 76166 [2019-12-07 17:53:40,388 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:53:40,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76166 states. [2019-12-07 17:53:41,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76166 to 57282. [2019-12-07 17:53:41,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57282 states. [2019-12-07 17:53:41,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57282 states to 57282 states and 238068 transitions. [2019-12-07 17:53:41,858 INFO L78 Accepts]: Start accepts. Automaton has 57282 states and 238068 transitions. Word has length 21 [2019-12-07 17:53:41,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:41,859 INFO L462 AbstractCegarLoop]: Abstraction has 57282 states and 238068 transitions. [2019-12-07 17:53:41,859 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:53:41,859 INFO L276 IsEmpty]: Start isEmpty. Operand 57282 states and 238068 transitions. [2019-12-07 17:53:41,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 17:53:41,895 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:41,895 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:41,895 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:41,895 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:41,895 INFO L82 PathProgramCache]: Analyzing trace with hash 1504447988, now seen corresponding path program 1 times [2019-12-07 17:53:41,895 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:41,896 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1692943911] [2019-12-07 17:53:41,896 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:41,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:41,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:41,932 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1692943911] [2019-12-07 17:53:41,932 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:41,932 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:53:41,932 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [168364888] [2019-12-07 17:53:41,932 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:53:41,932 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:41,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:53:41,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:53:41,933 INFO L87 Difference]: Start difference. First operand 57282 states and 238068 transitions. Second operand 3 states. [2019-12-07 17:53:42,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:42,080 INFO L93 Difference]: Finished difference Result 44947 states and 172600 transitions. [2019-12-07 17:53:42,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:53:42,081 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 17:53:42,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:42,299 INFO L225 Difference]: With dead ends: 44947 [2019-12-07 17:53:42,299 INFO L226 Difference]: Without dead ends: 44947 [2019-12-07 17:53:42,299 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:53:42,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44947 states. [2019-12-07 17:53:43,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44947 to 44947. [2019-12-07 17:53:43,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44947 states. [2019-12-07 17:53:43,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44947 states to 44947 states and 172600 transitions. [2019-12-07 17:53:43,116 INFO L78 Accepts]: Start accepts. Automaton has 44947 states and 172600 transitions. Word has length 29 [2019-12-07 17:53:43,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:43,116 INFO L462 AbstractCegarLoop]: Abstraction has 44947 states and 172600 transitions. [2019-12-07 17:53:43,116 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:53:43,117 INFO L276 IsEmpty]: Start isEmpty. Operand 44947 states and 172600 transitions. [2019-12-07 17:53:43,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 17:53:43,142 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:43,142 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:43,142 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:43,142 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:43,142 INFO L82 PathProgramCache]: Analyzing trace with hash -28022635, now seen corresponding path program 1 times [2019-12-07 17:53:43,142 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:43,142 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1789781746] [2019-12-07 17:53:43,142 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:43,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:43,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:43,183 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1789781746] [2019-12-07 17:53:43,183 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:43,183 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:53:43,183 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [906586095] [2019-12-07 17:53:43,183 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:53:43,183 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:43,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:53:43,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:53:43,184 INFO L87 Difference]: Start difference. First operand 44947 states and 172600 transitions. Second operand 4 states. [2019-12-07 17:53:43,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:43,237 INFO L93 Difference]: Finished difference Result 18682 states and 59454 transitions. [2019-12-07 17:53:43,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:53:43,237 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 17:53:43,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:43,260 INFO L225 Difference]: With dead ends: 18682 [2019-12-07 17:53:43,260 INFO L226 Difference]: Without dead ends: 18682 [2019-12-07 17:53:43,260 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:53:43,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18682 states. [2019-12-07 17:53:43,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18682 to 18682. [2019-12-07 17:53:43,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18682 states. [2019-12-07 17:53:43,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18682 states to 18682 states and 59454 transitions. [2019-12-07 17:53:43,535 INFO L78 Accepts]: Start accepts. Automaton has 18682 states and 59454 transitions. Word has length 30 [2019-12-07 17:53:43,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:43,536 INFO L462 AbstractCegarLoop]: Abstraction has 18682 states and 59454 transitions. [2019-12-07 17:53:43,536 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:53:43,536 INFO L276 IsEmpty]: Start isEmpty. Operand 18682 states and 59454 transitions. [2019-12-07 17:53:43,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 17:53:43,545 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:43,545 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:43,546 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:43,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:43,546 INFO L82 PathProgramCache]: Analyzing trace with hash -882612910, now seen corresponding path program 1 times [2019-12-07 17:53:43,546 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:43,546 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [938195243] [2019-12-07 17:53:43,546 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:43,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:43,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:43,592 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [938195243] [2019-12-07 17:53:43,592 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:43,593 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:53:43,593 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [787955863] [2019-12-07 17:53:43,593 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:53:43,593 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:43,593 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:53:43,594 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:53:43,594 INFO L87 Difference]: Start difference. First operand 18682 states and 59454 transitions. Second operand 5 states. [2019-12-07 17:53:43,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:43,625 INFO L93 Difference]: Finished difference Result 3095 states and 7883 transitions. [2019-12-07 17:53:43,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:53:43,625 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 17:53:43,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:43,629 INFO L225 Difference]: With dead ends: 3095 [2019-12-07 17:53:43,630 INFO L226 Difference]: Without dead ends: 3095 [2019-12-07 17:53:43,630 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:53:43,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3095 states. [2019-12-07 17:53:43,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3095 to 3095. [2019-12-07 17:53:43,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3095 states. [2019-12-07 17:53:43,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3095 states to 3095 states and 7883 transitions. [2019-12-07 17:53:43,666 INFO L78 Accepts]: Start accepts. Automaton has 3095 states and 7883 transitions. Word has length 31 [2019-12-07 17:53:43,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:43,666 INFO L462 AbstractCegarLoop]: Abstraction has 3095 states and 7883 transitions. [2019-12-07 17:53:43,666 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:53:43,666 INFO L276 IsEmpty]: Start isEmpty. Operand 3095 states and 7883 transitions. [2019-12-07 17:53:43,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 17:53:43,669 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:43,669 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:43,669 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:43,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:43,670 INFO L82 PathProgramCache]: Analyzing trace with hash 368185348, now seen corresponding path program 1 times [2019-12-07 17:53:43,670 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:43,670 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [661480911] [2019-12-07 17:53:43,670 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:43,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:43,725 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:43,725 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [661480911] [2019-12-07 17:53:43,726 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:43,726 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:53:43,726 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [585886438] [2019-12-07 17:53:43,726 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:53:43,726 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:43,727 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:53:43,727 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:53:43,727 INFO L87 Difference]: Start difference. First operand 3095 states and 7883 transitions. Second operand 6 states. [2019-12-07 17:53:43,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:43,758 INFO L93 Difference]: Finished difference Result 1376 states and 3911 transitions. [2019-12-07 17:53:43,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:53:43,758 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-12-07 17:53:43,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:43,760 INFO L225 Difference]: With dead ends: 1376 [2019-12-07 17:53:43,760 INFO L226 Difference]: Without dead ends: 1376 [2019-12-07 17:53:43,760 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:53:43,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1376 states. [2019-12-07 17:53:43,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1376 to 1236. [2019-12-07 17:53:43,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1236 states. [2019-12-07 17:53:43,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1236 states to 1236 states and 3511 transitions. [2019-12-07 17:53:43,772 INFO L78 Accepts]: Start accepts. Automaton has 1236 states and 3511 transitions. Word has length 43 [2019-12-07 17:53:43,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:43,772 INFO L462 AbstractCegarLoop]: Abstraction has 1236 states and 3511 transitions. [2019-12-07 17:53:43,772 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:53:43,772 INFO L276 IsEmpty]: Start isEmpty. Operand 1236 states and 3511 transitions. [2019-12-07 17:53:43,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:53:43,774 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:43,774 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:43,774 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:43,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:43,774 INFO L82 PathProgramCache]: Analyzing trace with hash 2028178460, now seen corresponding path program 1 times [2019-12-07 17:53:43,774 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:43,775 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [880859769] [2019-12-07 17:53:43,775 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:43,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:43,812 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:43,812 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [880859769] [2019-12-07 17:53:43,812 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:43,812 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:53:43,813 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1420072236] [2019-12-07 17:53:43,813 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:53:43,813 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:43,813 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:53:43,813 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:53:43,813 INFO L87 Difference]: Start difference. First operand 1236 states and 3511 transitions. Second operand 3 states. [2019-12-07 17:53:43,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:43,848 INFO L93 Difference]: Finished difference Result 1249 states and 3529 transitions. [2019-12-07 17:53:43,849 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:53:43,849 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 17:53:43,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:43,851 INFO L225 Difference]: With dead ends: 1249 [2019-12-07 17:53:43,851 INFO L226 Difference]: Without dead ends: 1249 [2019-12-07 17:53:43,851 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:53:43,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1249 states. [2019-12-07 17:53:43,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1249 to 1243. [2019-12-07 17:53:43,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2019-12-07 17:53:43,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 3522 transitions. [2019-12-07 17:53:43,869 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 3522 transitions. Word has length 58 [2019-12-07 17:53:43,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:43,869 INFO L462 AbstractCegarLoop]: Abstraction has 1243 states and 3522 transitions. [2019-12-07 17:53:43,869 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:53:43,869 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 3522 transitions. [2019-12-07 17:53:43,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:53:43,871 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:43,872 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:43,872 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:43,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:43,872 INFO L82 PathProgramCache]: Analyzing trace with hash 1114375606, now seen corresponding path program 1 times [2019-12-07 17:53:43,872 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:43,872 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1842986523] [2019-12-07 17:53:43,873 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:43,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:43,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:43,912 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1842986523] [2019-12-07 17:53:43,912 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:43,912 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:53:43,912 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [224458413] [2019-12-07 17:53:43,913 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:53:43,913 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:43,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:53:43,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:53:43,913 INFO L87 Difference]: Start difference. First operand 1243 states and 3522 transitions. Second operand 3 states. [2019-12-07 17:53:43,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:43,946 INFO L93 Difference]: Finished difference Result 1249 states and 3519 transitions. [2019-12-07 17:53:43,947 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:53:43,947 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 17:53:43,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:43,949 INFO L225 Difference]: With dead ends: 1249 [2019-12-07 17:53:43,949 INFO L226 Difference]: Without dead ends: 1249 [2019-12-07 17:53:43,949 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:53:43,952 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1249 states. [2019-12-07 17:53:43,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1249 to 1240. [2019-12-07 17:53:43,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1240 states. [2019-12-07 17:53:43,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1240 states to 1240 states and 3510 transitions. [2019-12-07 17:53:43,965 INFO L78 Accepts]: Start accepts. Automaton has 1240 states and 3510 transitions. Word has length 58 [2019-12-07 17:53:43,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:43,966 INFO L462 AbstractCegarLoop]: Abstraction has 1240 states and 3510 transitions. [2019-12-07 17:53:43,966 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:53:43,966 INFO L276 IsEmpty]: Start isEmpty. Operand 1240 states and 3510 transitions. [2019-12-07 17:53:43,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:53:43,968 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:43,968 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:43,968 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:43,969 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:43,969 INFO L82 PathProgramCache]: Analyzing trace with hash 1114895507, now seen corresponding path program 1 times [2019-12-07 17:53:43,969 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:43,969 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1236638213] [2019-12-07 17:53:43,969 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:43,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:44,041 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:44,042 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1236638213] [2019-12-07 17:53:44,042 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:44,042 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:53:44,042 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [194689912] [2019-12-07 17:53:44,042 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:53:44,042 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:44,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:53:44,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:53:44,043 INFO L87 Difference]: Start difference. First operand 1240 states and 3510 transitions. Second operand 5 states. [2019-12-07 17:53:44,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:44,168 INFO L93 Difference]: Finished difference Result 1781 states and 5032 transitions. [2019-12-07 17:53:44,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:53:44,168 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2019-12-07 17:53:44,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:44,170 INFO L225 Difference]: With dead ends: 1781 [2019-12-07 17:53:44,170 INFO L226 Difference]: Without dead ends: 1781 [2019-12-07 17:53:44,170 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:53:44,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1781 states. [2019-12-07 17:53:44,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1781 to 1605. [2019-12-07 17:53:44,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1605 states. [2019-12-07 17:53:44,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1605 states to 1605 states and 4540 transitions. [2019-12-07 17:53:44,188 INFO L78 Accepts]: Start accepts. Automaton has 1605 states and 4540 transitions. Word has length 58 [2019-12-07 17:53:44,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:44,188 INFO L462 AbstractCegarLoop]: Abstraction has 1605 states and 4540 transitions. [2019-12-07 17:53:44,188 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:53:44,188 INFO L276 IsEmpty]: Start isEmpty. Operand 1605 states and 4540 transitions. [2019-12-07 17:53:44,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:53:44,190 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:44,190 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:44,190 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:44,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:44,190 INFO L82 PathProgramCache]: Analyzing trace with hash -217131029, now seen corresponding path program 2 times [2019-12-07 17:53:44,190 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:44,191 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961243068] [2019-12-07 17:53:44,191 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:44,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:44,251 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:44,252 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [961243068] [2019-12-07 17:53:44,252 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:44,252 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:53:44,252 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1078490412] [2019-12-07 17:53:44,253 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:53:44,253 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:44,253 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:53:44,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:53:44,253 INFO L87 Difference]: Start difference. First operand 1605 states and 4540 transitions. Second operand 6 states. [2019-12-07 17:53:44,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:44,515 INFO L93 Difference]: Finished difference Result 2387 states and 6749 transitions. [2019-12-07 17:53:44,515 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:53:44,515 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-07 17:53:44,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:44,518 INFO L225 Difference]: With dead ends: 2387 [2019-12-07 17:53:44,518 INFO L226 Difference]: Without dead ends: 2387 [2019-12-07 17:53:44,518 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:53:44,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2387 states. [2019-12-07 17:53:44,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2387 to 1749. [2019-12-07 17:53:44,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1749 states. [2019-12-07 17:53:44,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1749 states to 1749 states and 4968 transitions. [2019-12-07 17:53:44,539 INFO L78 Accepts]: Start accepts. Automaton has 1749 states and 4968 transitions. Word has length 58 [2019-12-07 17:53:44,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:44,539 INFO L462 AbstractCegarLoop]: Abstraction has 1749 states and 4968 transitions. [2019-12-07 17:53:44,539 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:53:44,539 INFO L276 IsEmpty]: Start isEmpty. Operand 1749 states and 4968 transitions. [2019-12-07 17:53:44,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:53:44,541 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:44,541 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:44,541 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:44,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:44,541 INFO L82 PathProgramCache]: Analyzing trace with hash 1417485459, now seen corresponding path program 3 times [2019-12-07 17:53:44,542 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:44,542 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1387768584] [2019-12-07 17:53:44,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:44,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:44,580 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:44,580 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1387768584] [2019-12-07 17:53:44,580 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:44,580 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:53:44,580 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1122888079] [2019-12-07 17:53:44,581 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:53:44,581 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:44,581 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:53:44,581 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:53:44,581 INFO L87 Difference]: Start difference. First operand 1749 states and 4968 transitions. Second operand 3 states. [2019-12-07 17:53:44,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:44,613 INFO L93 Difference]: Finished difference Result 1748 states and 4966 transitions. [2019-12-07 17:53:44,614 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:53:44,614 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 17:53:44,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:44,616 INFO L225 Difference]: With dead ends: 1748 [2019-12-07 17:53:44,616 INFO L226 Difference]: Without dead ends: 1748 [2019-12-07 17:53:44,616 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:53:44,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1748 states. [2019-12-07 17:53:44,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1748 to 1319. [2019-12-07 17:53:44,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1319 states. [2019-12-07 17:53:44,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1319 states to 1319 states and 3756 transitions. [2019-12-07 17:53:44,631 INFO L78 Accepts]: Start accepts. Automaton has 1319 states and 3756 transitions. Word has length 58 [2019-12-07 17:53:44,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:44,631 INFO L462 AbstractCegarLoop]: Abstraction has 1319 states and 3756 transitions. [2019-12-07 17:53:44,631 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:53:44,631 INFO L276 IsEmpty]: Start isEmpty. Operand 1319 states and 3756 transitions. [2019-12-07 17:53:44,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:53:44,633 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:44,633 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:44,633 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:44,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:44,633 INFO L82 PathProgramCache]: Analyzing trace with hash 368051854, now seen corresponding path program 1 times [2019-12-07 17:53:44,634 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:44,634 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1645939762] [2019-12-07 17:53:44,634 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:44,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:44,732 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:44,732 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1645939762] [2019-12-07 17:53:44,732 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:44,732 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:53:44,732 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1035626390] [2019-12-07 17:53:44,733 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:53:44,733 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:44,733 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:53:44,733 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:53:44,733 INFO L87 Difference]: Start difference. First operand 1319 states and 3756 transitions. Second operand 7 states. [2019-12-07 17:53:44,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:44,846 INFO L93 Difference]: Finished difference Result 2613 states and 6976 transitions. [2019-12-07 17:53:44,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 17:53:44,846 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 59 [2019-12-07 17:53:44,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:44,849 INFO L225 Difference]: With dead ends: 2613 [2019-12-07 17:53:44,849 INFO L226 Difference]: Without dead ends: 1845 [2019-12-07 17:53:44,849 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:53:44,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1845 states. [2019-12-07 17:53:44,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1845 to 1187. [2019-12-07 17:53:44,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1187 states. [2019-12-07 17:53:44,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1187 states to 1187 states and 3309 transitions. [2019-12-07 17:53:44,870 INFO L78 Accepts]: Start accepts. Automaton has 1187 states and 3309 transitions. Word has length 59 [2019-12-07 17:53:44,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:44,870 INFO L462 AbstractCegarLoop]: Abstraction has 1187 states and 3309 transitions. [2019-12-07 17:53:44,871 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:53:44,871 INFO L276 IsEmpty]: Start isEmpty. Operand 1187 states and 3309 transitions. [2019-12-07 17:53:44,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:53:44,872 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:44,872 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:44,872 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:44,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:44,873 INFO L82 PathProgramCache]: Analyzing trace with hash 1147587362, now seen corresponding path program 2 times [2019-12-07 17:53:44,873 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:44,873 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [224879274] [2019-12-07 17:53:44,873 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:44,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:44,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:44,906 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [224879274] [2019-12-07 17:53:44,906 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:44,906 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:53:44,906 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [800213059] [2019-12-07 17:53:44,907 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:53:44,907 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:44,907 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:53:44,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:53:44,907 INFO L87 Difference]: Start difference. First operand 1187 states and 3309 transitions. Second operand 3 states. [2019-12-07 17:53:44,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:44,917 INFO L93 Difference]: Finished difference Result 1125 states and 3060 transitions. [2019-12-07 17:53:44,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:53:44,918 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 17:53:44,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:44,919 INFO L225 Difference]: With dead ends: 1125 [2019-12-07 17:53:44,919 INFO L226 Difference]: Without dead ends: 1125 [2019-12-07 17:53:44,919 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:53:44,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1125 states. [2019-12-07 17:53:44,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1125 to 1061. [2019-12-07 17:53:44,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1061 states. [2019-12-07 17:53:44,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1061 states to 1061 states and 2876 transitions. [2019-12-07 17:53:44,930 INFO L78 Accepts]: Start accepts. Automaton has 1061 states and 2876 transitions. Word has length 59 [2019-12-07 17:53:44,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:44,930 INFO L462 AbstractCegarLoop]: Abstraction has 1061 states and 2876 transitions. [2019-12-07 17:53:44,930 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:53:44,930 INFO L276 IsEmpty]: Start isEmpty. Operand 1061 states and 2876 transitions. [2019-12-07 17:53:44,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:53:44,932 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:44,932 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:44,932 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:44,932 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:44,932 INFO L82 PathProgramCache]: Analyzing trace with hash 709050974, now seen corresponding path program 1 times [2019-12-07 17:53:44,932 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:44,932 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095800364] [2019-12-07 17:53:44,932 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:44,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:45,117 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:45,117 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1095800364] [2019-12-07 17:53:45,117 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:45,118 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:53:45,118 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [680986627] [2019-12-07 17:53:45,118 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 17:53:45,118 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:45,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 17:53:45,118 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:53:45,118 INFO L87 Difference]: Start difference. First operand 1061 states and 2876 transitions. Second operand 13 states. [2019-12-07 17:53:45,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:45,751 INFO L93 Difference]: Finished difference Result 2441 states and 5859 transitions. [2019-12-07 17:53:45,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 17:53:45,752 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 60 [2019-12-07 17:53:45,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:45,753 INFO L225 Difference]: With dead ends: 2441 [2019-12-07 17:53:45,753 INFO L226 Difference]: Without dead ends: 1050 [2019-12-07 17:53:45,753 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 115 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=200, Invalid=502, Unknown=0, NotChecked=0, Total=702 [2019-12-07 17:53:45,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1050 states. [2019-12-07 17:53:45,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1050 to 782. [2019-12-07 17:53:45,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 782 states. [2019-12-07 17:53:45,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 782 states to 782 states and 1855 transitions. [2019-12-07 17:53:45,761 INFO L78 Accepts]: Start accepts. Automaton has 782 states and 1855 transitions. Word has length 60 [2019-12-07 17:53:45,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:45,761 INFO L462 AbstractCegarLoop]: Abstraction has 782 states and 1855 transitions. [2019-12-07 17:53:45,761 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 17:53:45,761 INFO L276 IsEmpty]: Start isEmpty. Operand 782 states and 1855 transitions. [2019-12-07 17:53:45,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:53:45,762 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:45,762 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:45,762 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:45,762 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:45,762 INFO L82 PathProgramCache]: Analyzing trace with hash -1492443498, now seen corresponding path program 2 times [2019-12-07 17:53:45,762 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:45,762 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1525909256] [2019-12-07 17:53:45,762 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:45,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:45,812 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:45,813 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1525909256] [2019-12-07 17:53:45,813 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:45,813 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:53:45,813 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1061438692] [2019-12-07 17:53:45,813 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:53:45,813 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:45,813 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:53:45,813 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:53:45,814 INFO L87 Difference]: Start difference. First operand 782 states and 1855 transitions. Second operand 5 states. [2019-12-07 17:53:45,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:45,841 INFO L93 Difference]: Finished difference Result 972 states and 2186 transitions. [2019-12-07 17:53:45,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:53:45,841 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 60 [2019-12-07 17:53:45,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:45,842 INFO L225 Difference]: With dead ends: 972 [2019-12-07 17:53:45,842 INFO L226 Difference]: Without dead ends: 237 [2019-12-07 17:53:45,842 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:53:45,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states. [2019-12-07 17:53:45,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 237. [2019-12-07 17:53:45,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2019-12-07 17:53:45,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 414 transitions. [2019-12-07 17:53:45,844 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 414 transitions. Word has length 60 [2019-12-07 17:53:45,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:45,844 INFO L462 AbstractCegarLoop]: Abstraction has 237 states and 414 transitions. [2019-12-07 17:53:45,844 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:53:45,844 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 414 transitions. [2019-12-07 17:53:45,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:53:45,845 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:45,845 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:45,845 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:45,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:45,845 INFO L82 PathProgramCache]: Analyzing trace with hash -1893006908, now seen corresponding path program 3 times [2019-12-07 17:53:45,845 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:45,845 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1713799924] [2019-12-07 17:53:45,845 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:45,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:46,021 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:46,021 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1713799924] [2019-12-07 17:53:46,022 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:46,022 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:53:46,022 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [993571523] [2019-12-07 17:53:46,022 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:53:46,022 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:46,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:53:46,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=148, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:53:46,023 INFO L87 Difference]: Start difference. First operand 237 states and 414 transitions. Second operand 14 states. [2019-12-07 17:53:46,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:46,312 INFO L93 Difference]: Finished difference Result 411 states and 699 transitions. [2019-12-07 17:53:46,312 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 17:53:46,312 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 60 [2019-12-07 17:53:46,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:46,312 INFO L225 Difference]: With dead ends: 411 [2019-12-07 17:53:46,313 INFO L226 Difference]: Without dead ends: 379 [2019-12-07 17:53:46,313 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=92, Invalid=414, Unknown=0, NotChecked=0, Total=506 [2019-12-07 17:53:46,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 379 states. [2019-12-07 17:53:46,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 379 to 337. [2019-12-07 17:53:46,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 337 states. [2019-12-07 17:53:46,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 337 states to 337 states and 585 transitions. [2019-12-07 17:53:46,316 INFO L78 Accepts]: Start accepts. Automaton has 337 states and 585 transitions. Word has length 60 [2019-12-07 17:53:46,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:46,316 INFO L462 AbstractCegarLoop]: Abstraction has 337 states and 585 transitions. [2019-12-07 17:53:46,316 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:53:46,316 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 585 transitions. [2019-12-07 17:53:46,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:53:46,317 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:46,317 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:46,317 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:46,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:46,317 INFO L82 PathProgramCache]: Analyzing trace with hash -1191078724, now seen corresponding path program 4 times [2019-12-07 17:53:46,317 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:46,317 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [587507649] [2019-12-07 17:53:46,317 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:46,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:53:46,481 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:53:46,482 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [587507649] [2019-12-07 17:53:46,482 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:53:46,482 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 17:53:46,482 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [532507332] [2019-12-07 17:53:46,482 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 17:53:46,482 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:53:46,482 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 17:53:46,482 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:53:46,482 INFO L87 Difference]: Start difference. First operand 337 states and 585 transitions. Second operand 13 states. [2019-12-07 17:53:46,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:53:46,724 INFO L93 Difference]: Finished difference Result 447 states and 750 transitions. [2019-12-07 17:53:46,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 17:53:46,724 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 60 [2019-12-07 17:53:46,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:53:46,725 INFO L225 Difference]: With dead ends: 447 [2019-12-07 17:53:46,725 INFO L226 Difference]: Without dead ends: 415 [2019-12-07 17:53:46,725 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=372, Unknown=0, NotChecked=0, Total=462 [2019-12-07 17:53:46,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 415 states. [2019-12-07 17:53:46,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 415 to 345. [2019-12-07 17:53:46,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 345 states. [2019-12-07 17:53:46,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 599 transitions. [2019-12-07 17:53:46,729 INFO L78 Accepts]: Start accepts. Automaton has 345 states and 599 transitions. Word has length 60 [2019-12-07 17:53:46,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:53:46,730 INFO L462 AbstractCegarLoop]: Abstraction has 345 states and 599 transitions. [2019-12-07 17:53:46,730 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 17:53:46,730 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 599 transitions. [2019-12-07 17:53:46,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:53:46,731 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:53:46,731 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:53:46,731 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:53:46,731 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:53:46,731 INFO L82 PathProgramCache]: Analyzing trace with hash -1108974140, now seen corresponding path program 5 times [2019-12-07 17:53:46,731 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:53:46,731 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [634457050] [2019-12-07 17:53:46,732 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:53:46,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:53:46,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:53:46,820 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:53:46,820 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:53:46,822 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] ULTIMATE.startENTRY-->L833: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= 0 v_~__unbuffered_p0_EAX~0_33) (= v_~z$w_buff0_used~0_862 0) (= 0 v_~z$r_buff1_thd3~0_308) (= 0 v_~z$r_buff0_thd3~0_195) (= |v_#NULL.offset_7| 0) (= v_~x~0_30 0) (= |v_ULTIMATE.start_main_~#t1221~0.offset_16| 0) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t1221~0.base_19| 4)) (= v_~z$r_buff1_thd1~0_233 0) (< 0 |v_#StackHeapBarrier_21|) (= v_~z$r_buff1_thd0~0_427 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1221~0.base_19| 1) |v_#valid_70|) (= v_~b~0_102 0) (= v_~__unbuffered_cnt~0_109 0) (= 0 v_~z$flush_delayed~0_82) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1221~0.base_19|) (= 0 v_~weak$$choice0~0_17) (= v_~z$w_buff1~0_400 0) (= v_~z$r_buff0_thd2~0_88 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~__unbuffered_p3_EAX~0_243 0) (= v_~z$r_buff0_thd0~0_435 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1221~0.base_19|) 0) (= 0 v_~__unbuffered_p3_EBX~0_243) (= 0 v_~z$r_buff0_thd4~0_372) (= v_~y~0_50 0) (= v_~z$w_buff0~0_412 0) (= v_~weak$$choice2~0_150 0) (= 0 v_~z$r_buff1_thd4~0_281) (= v_~z~0_221 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff1_thd2~0_234 0) (= v_~z$read_delayed~0_7 0) (= 0 |v_#NULL.base_7|) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1221~0.base_19| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1221~0.base_19|) |v_ULTIMATE.start_main_~#t1221~0.offset_16| 0)) |v_#memory_int_25|) (= v_~z$r_buff0_thd1~0_87 0) (= v_~z$w_buff1_used~0_620 0) (= v_~main$tmp_guard1~0_25 0) (= v_~a~0_234 0) (= v_~main$tmp_guard0~0_24 0) (= v_~z$mem_tmp~0_23 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_234, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_44|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_101|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_38|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_120|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_57|, ~a~0=v_~a~0_234, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_435, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_33, ULTIMATE.start_main_~#t1223~0.offset=|v_ULTIMATE.start_main_~#t1223~0.offset_16|, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_372, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_243, #length=|v_#length_29|, ULTIMATE.start_main_~#t1222~0.base=|v_ULTIMATE.start_main_~#t1222~0.base_22|, ~z$mem_tmp~0=v_~z$mem_tmp~0_23, ULTIMATE.start_main_~#t1223~0.base=|v_ULTIMATE.start_main_~#t1223~0.base_21|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_45|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_620, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ~z$flush_delayed~0=v_~z$flush_delayed~0_82, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_36|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_69|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_47|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_233, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_195, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ~x~0=v_~x~0_30, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_281, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_43|, ULTIMATE.start_main_~#t1224~0.offset=|v_ULTIMATE.start_main_~#t1224~0.offset_17|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_40|, ~z$w_buff1~0=v_~z$w_buff1~0_400, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_34|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_36|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_~#t1224~0.base=|v_ULTIMATE.start_main_~#t1224~0.base_22|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_55|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_427, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_28|, ~y~0=v_~y~0_50, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_88, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_862, ~z$w_buff0~0=v_~z$w_buff0~0_412, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_40|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_28|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ULTIMATE.start_main_~#t1222~0.offset=|v_ULTIMATE.start_main_~#t1222~0.offset_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_46|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_243, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_61|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_64|, ULTIMATE.start_main_~#t1221~0.base=|v_ULTIMATE.start_main_~#t1221~0.base_19|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ~b~0=v_~b~0_102, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_14|, ULTIMATE.start_main_~#t1221~0.offset=|v_ULTIMATE.start_main_~#t1221~0.offset_16|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_22|, ~z~0=v_~z~0_221, ~weak$$choice2~0=v_~weak$$choice2~0_150, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_87} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t1223~0.offset, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_~#t1222~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_~#t1223~0.base, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1224~0.offset, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t1224~0.base, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t1222~0.offset, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t1221~0.base, ULTIMATE.start_main_#t~ite41, ~b~0, ULTIMATE.start_main_#res, ULTIMATE.start_main_~#t1221~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:53:46,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L833-1-->L835: Formula: (and (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1222~0.base_13| 4) |v_#length_23|) (= 0 |v_ULTIMATE.start_main_~#t1222~0.offset_11|) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1222~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1222~0.base_13|) |v_ULTIMATE.start_main_~#t1222~0.offset_11| 1)) |v_#memory_int_19|) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1222~0.base_13|) (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1222~0.base_13|)) (not (= |v_ULTIMATE.start_main_~#t1222~0.base_13| 0)) (= |v_#valid_48| (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1222~0.base_13| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t1222~0.offset=|v_ULTIMATE.start_main_~#t1222~0.offset_11|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_23|, ULTIMATE.start_main_~#t1222~0.base=|v_ULTIMATE.start_main_~#t1222~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1222~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1222~0.base] because there is no mapped edge [2019-12-07 17:53:46,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L835-1-->L837: Formula: (and (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1223~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t1223~0.base_12| 0)) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1223~0.base_12| 1)) (= 0 |v_ULTIMATE.start_main_~#t1223~0.offset_10|) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1223~0.base_12|) 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1223~0.base_12| 4)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1223~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1223~0.base_12|) |v_ULTIMATE.start_main_~#t1223~0.offset_10| 2)) |v_#memory_int_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1223~0.base=|v_ULTIMATE.start_main_~#t1223~0.base_12|, ULTIMATE.start_main_~#t1223~0.offset=|v_ULTIMATE.start_main_~#t1223~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1223~0.base, ULTIMATE.start_main_~#t1223~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 17:53:46,824 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L837-1-->L839: Formula: (and (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1224~0.base_12|) 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1224~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1224~0.base_12|) |v_ULTIMATE.start_main_~#t1224~0.offset_10| 3)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1224~0.base_12| 4) |v_#length_17|) (not (= 0 |v_ULTIMATE.start_main_~#t1224~0.base_12|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1224~0.base_12|) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1224~0.base_12| 1)) (= 0 |v_ULTIMATE.start_main_~#t1224~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1224~0.offset=|v_ULTIMATE.start_main_~#t1224~0.offset_10|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ULTIMATE.start_main_~#t1224~0.base=|v_ULTIMATE.start_main_~#t1224~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1224~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_~#t1224~0.base] because there is no mapped edge [2019-12-07 17:53:46,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L4-->L810: Formula: (and (= v_~z$r_buff0_thd0~0_60 v_~z$r_buff1_thd0~0_36) (= v_~__unbuffered_p3_EBX~0_4 v_~b~0_4) (= v_~__unbuffered_p3_EAX~0_4 v_~a~0_3) (= v_~z$r_buff1_thd1~0_3 v_~z$r_buff0_thd1~0_3) (= v_~z$r_buff1_thd2~0_4 v_~z$r_buff0_thd2~0_4) (= v_~z$r_buff0_thd4~0_20 v_~z$r_buff1_thd4~0_14) (= 1 v_~a~0_3) (= v_~z$r_buff0_thd4~0_19 1) (= v_~z$r_buff0_thd3~0_17 v_~z$r_buff1_thd3~0_11) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_20, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_14, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_11, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_4, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_4, ~a~0=v_~a~0_3, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_36, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_3, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_19, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 17:53:46,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_7|) (= v_P0Thread1of1ForFork0_~arg.base_13 |v_P0Thread1of1ForFork0_#in~arg.base_15|) (= v_~b~0_77 1) (= v_~x~0_21 v_~__unbuffered_p0_EAX~0_21) (= |v_P0Thread1of1ForFork0_#res.offset_7| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_P0Thread1of1ForFork0_~arg.offset_13 |v_P0Thread1of1ForFork0_#in~arg.offset_15|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, ~x~0=v_~x~0_21} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_21, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_7|, ~b~0=v_~b~0_77, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_13, ~x~0=v_~x~0_21, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_13} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:53:46,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] P1ENTRY-->P1EXIT: Formula: (and (= v_~y~0_35 1) (= v_~x~0_26 1) (= v_P1Thread1of1ForFork1_~arg.base_10 |v_P1Thread1of1ForFork1_#in~arg.base_12|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_12| v_P1Thread1of1ForFork1_~arg.offset_10) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_89 1) v_~__unbuffered_cnt~0_88)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_89} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_10, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_10, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~y~0=v_~y~0_35, ~x~0=v_~x~0_26, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~y~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:53:46,826 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In787610957 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In787610957 256)))) (or (and (not .cse0) (= |P3Thread1of1ForFork3_#t~ite11_Out787610957| 0) (not .cse1)) (and (= |P3Thread1of1ForFork3_#t~ite11_Out787610957| ~z$w_buff0_used~0_In787610957) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In787610957, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In787610957} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In787610957, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In787610957, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out787610957|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 17:53:46,826 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L774-2-->L774-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In249608660 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In249608660 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite3_Out249608660| ~z~0_In249608660) (or .cse0 .cse1)) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite3_Out249608660| ~z$w_buff1~0_In249608660) (not .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In249608660, ~z$w_buff1_used~0=~z$w_buff1_used~0_In249608660, ~z$w_buff1~0=~z$w_buff1~0_In249608660, ~z~0=~z~0_In249608660} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out249608660|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In249608660, ~z$w_buff1_used~0=~z$w_buff1_used~0_In249608660, ~z$w_buff1~0=~z$w_buff1~0_In249608660, ~z~0=~z~0_In249608660} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 17:53:46,827 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L812-->L812-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In-867423566 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd4~0_In-867423566 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-867423566 256))) (.cse0 (= (mod ~z$r_buff0_thd4~0_In-867423566 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-867423566 |P3Thread1of1ForFork3_#t~ite12_Out-867423566|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P3Thread1of1ForFork3_#t~ite12_Out-867423566|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-867423566, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-867423566, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-867423566, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-867423566} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-867423566, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-867423566, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-867423566, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-867423566, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out-867423566|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 17:53:46,827 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L813-->L814: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In620080656 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd4~0_In620080656 256) 0)) (.cse2 (= ~z$r_buff0_thd4~0_Out620080656 ~z$r_buff0_thd4~0_In620080656))) (or (and (= ~z$r_buff0_thd4~0_Out620080656 0) (not .cse0) (not .cse1)) (and .cse1 .cse2) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In620080656, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In620080656} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In620080656, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out620080656, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out620080656|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 17:53:46,827 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L814-->L814-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd4~0_In-1033811835 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1033811835 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd4~0_In-1033811835 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1033811835 256)))) (or (and (= |P3Thread1of1ForFork3_#t~ite14_Out-1033811835| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P3Thread1of1ForFork3_#t~ite14_Out-1033811835| ~z$r_buff1_thd4~0_In-1033811835) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1033811835, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1033811835, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1033811835, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1033811835} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1033811835, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1033811835, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out-1033811835|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1033811835, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1033811835} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 17:53:46,827 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L814-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_30| v_~z$r_buff1_thd4~0_45) (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_45, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_29|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 17:53:46,827 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L774-4-->L775: Formula: (= |v_P2Thread1of1ForFork2_#t~ite3_14| v_~z~0_56) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_14|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_9|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_13|, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 17:53:46,828 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L775-->L775-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1533720074 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1533720074 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite5_Out-1533720074| ~z$w_buff0_used~0_In-1533720074)) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite5_Out-1533720074| 0) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1533720074, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1533720074} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1533720074|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1533720074, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1533720074} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 17:53:46,828 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L776-->L776-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd3~0_In794009524 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In794009524 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In794009524 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In794009524 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite6_Out794009524|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~z$w_buff1_used~0_In794009524 |P2Thread1of1ForFork2_#t~ite6_Out794009524|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In794009524, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In794009524, ~z$w_buff1_used~0=~z$w_buff1_used~0_In794009524, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In794009524} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out794009524|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In794009524, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In794009524, ~z$w_buff1_used~0=~z$w_buff1_used~0_In794009524, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In794009524} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 17:53:46,828 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1002367625 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1002367625 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite7_Out1002367625| ~z$r_buff0_thd3~0_In1002367625)) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite7_Out1002367625| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1002367625, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1002367625} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1002367625, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1002367625, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out1002367625|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 17:53:46,829 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L778-->L778-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In2141604479 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In2141604479 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In2141604479 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In2141604479 256) 0))) (or (and (= ~z$r_buff1_thd3~0_In2141604479 |P2Thread1of1ForFork2_#t~ite8_Out2141604479|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork2_#t~ite8_Out2141604479|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2141604479, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2141604479, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2141604479, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2141604479} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2141604479, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2141604479, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2141604479, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2141604479, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out2141604479|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:53:46,829 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L778-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_28| v_~z$r_buff1_thd3~0_74)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_28|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_27|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:53:46,829 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L839-1-->L845: Formula: (and (not (= (mod v_~main$tmp_guard0~0_13 256) 0)) (= (ite (= (ite (= 4 v_~__unbuffered_cnt~0_34) 1 0) 0) 0 1) v_~main$tmp_guard0~0_13)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_13, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_12|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 17:53:46,829 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L845-2-->L845-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In644881166 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In644881166 256) 0))) (or (and (= ~z~0_In644881166 |ULTIMATE.start_main_#t~ite19_Out644881166|) (or .cse0 .cse1)) (and (not .cse0) (= ~z$w_buff1~0_In644881166 |ULTIMATE.start_main_#t~ite19_Out644881166|) (not .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In644881166, ~z$w_buff1_used~0=~z$w_buff1_used~0_In644881166, ~z$w_buff1~0=~z$w_buff1~0_In644881166, ~z~0=~z~0_In644881166} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out644881166|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In644881166, ~z$w_buff1_used~0=~z$w_buff1_used~0_In644881166, ~z$w_buff1~0=~z$w_buff1~0_In644881166, ~z~0=~z~0_In644881166} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:53:46,829 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L845-4-->L846: Formula: (= v_~z~0_30 |v_ULTIMATE.start_main_#t~ite19_9|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_9|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|, ~z~0=v_~z~0_30, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:53:46,829 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L846-->L846-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-2006245500 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-2006245500 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite21_Out-2006245500|) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In-2006245500 |ULTIMATE.start_main_#t~ite21_Out-2006245500|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2006245500, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2006245500} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2006245500, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2006245500, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-2006245500|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:53:46,830 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L847-->L847-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-332309399 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-332309399 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-332309399 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-332309399 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out-332309399|)) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In-332309399 |ULTIMATE.start_main_#t~ite22_Out-332309399|) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-332309399, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-332309399, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-332309399, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-332309399} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-332309399, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-332309399, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-332309399, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-332309399, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-332309399|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:53:46,830 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L848-->L848-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1235565953 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1235565953 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite23_Out1235565953|) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd0~0_In1235565953 |ULTIMATE.start_main_#t~ite23_Out1235565953|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1235565953, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1235565953} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1235565953, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1235565953, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out1235565953|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:53:46,830 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L849-->L849-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In1802658384 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In1802658384 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1802658384 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1802658384 256)))) (or (and (= ~z$r_buff1_thd0~0_In1802658384 |ULTIMATE.start_main_#t~ite24_Out1802658384|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite24_Out1802658384|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1802658384, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1802658384, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1802658384, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1802658384} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1802658384, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1802658384, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1802658384, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out1802658384|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1802658384} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 17:53:46,833 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-855928545 256)))) (or (and (= |ULTIMATE.start_main_#t~ite40_Out-855928545| |ULTIMATE.start_main_#t~ite39_Out-855928545|) .cse0 (= |ULTIMATE.start_main_#t~ite39_Out-855928545| ~z$w_buff1_used~0_In-855928545) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-855928545 256)))) (or (= (mod ~z$w_buff0_used~0_In-855928545 256) 0) (and (= (mod ~z$w_buff1_used~0_In-855928545 256) 0) .cse1) (and (= (mod ~z$r_buff1_thd0~0_In-855928545 256) 0) .cse1)))) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite40_Out-855928545| ~z$w_buff1_used~0_In-855928545) (= |ULTIMATE.start_main_#t~ite39_In-855928545| |ULTIMATE.start_main_#t~ite39_Out-855928545|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-855928545, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-855928545, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In-855928545|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-855928545, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-855928545, ~weak$$choice2~0=~weak$$choice2~0_In-855928545} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-855928545, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-855928545|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-855928545|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-855928545, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-855928545, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-855928545, ~weak$$choice2~0=~weak$$choice2~0_In-855928545} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 17:53:46,833 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L861-->L862: Formula: (and (= v_~z$r_buff0_thd0~0_125 v_~z$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_28 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_28} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_28, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:53:46,833 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L862-->L862-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In125914782 256) 0))) (or (and (= ~z$r_buff1_thd0~0_In125914782 |ULTIMATE.start_main_#t~ite46_Out125914782|) (= |ULTIMATE.start_main_#t~ite45_In125914782| |ULTIMATE.start_main_#t~ite45_Out125914782|) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite46_Out125914782| |ULTIMATE.start_main_#t~ite45_Out125914782|) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In125914782 256)))) (or (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In125914782 256))) (= 0 (mod ~z$w_buff0_used~0_In125914782 256)) (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In125914782 256))))) (= ~z$r_buff1_thd0~0_In125914782 |ULTIMATE.start_main_#t~ite45_Out125914782|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In125914782, ~z$w_buff0_used~0=~z$w_buff0_used~0_In125914782, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In125914782, ~z$w_buff1_used~0=~z$w_buff1_used~0_In125914782, ~weak$$choice2~0=~weak$$choice2~0_In125914782, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In125914782|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In125914782, ~z$w_buff0_used~0=~z$w_buff0_used~0_In125914782, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In125914782, ~z$w_buff1_used~0=~z$w_buff1_used~0_In125914782, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out125914782|, ~weak$$choice2~0=~weak$$choice2~0_In125914782, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out125914782|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 17:53:46,834 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L864-->L4: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_110) (not (= 0 (mod v_~z$flush_delayed~0_38 256))) (= 0 v_~z$flush_delayed~0_37) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_38} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_37, ~z~0=v_~z~0_110, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:53:46,834 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:53:46,884 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:53:46 BasicIcfg [2019-12-07 17:53:46,884 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:53:46,884 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:53:46,884 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:53:46,884 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:53:46,884 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:53:28" (3/4) ... [2019-12-07 17:53:46,886 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:53:46,886 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] ULTIMATE.startENTRY-->L833: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= 0 v_~__unbuffered_p0_EAX~0_33) (= v_~z$w_buff0_used~0_862 0) (= 0 v_~z$r_buff1_thd3~0_308) (= 0 v_~z$r_buff0_thd3~0_195) (= |v_#NULL.offset_7| 0) (= v_~x~0_30 0) (= |v_ULTIMATE.start_main_~#t1221~0.offset_16| 0) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t1221~0.base_19| 4)) (= v_~z$r_buff1_thd1~0_233 0) (< 0 |v_#StackHeapBarrier_21|) (= v_~z$r_buff1_thd0~0_427 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1221~0.base_19| 1) |v_#valid_70|) (= v_~b~0_102 0) (= v_~__unbuffered_cnt~0_109 0) (= 0 v_~z$flush_delayed~0_82) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1221~0.base_19|) (= 0 v_~weak$$choice0~0_17) (= v_~z$w_buff1~0_400 0) (= v_~z$r_buff0_thd2~0_88 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~__unbuffered_p3_EAX~0_243 0) (= v_~z$r_buff0_thd0~0_435 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1221~0.base_19|) 0) (= 0 v_~__unbuffered_p3_EBX~0_243) (= 0 v_~z$r_buff0_thd4~0_372) (= v_~y~0_50 0) (= v_~z$w_buff0~0_412 0) (= v_~weak$$choice2~0_150 0) (= 0 v_~z$r_buff1_thd4~0_281) (= v_~z~0_221 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff1_thd2~0_234 0) (= v_~z$read_delayed~0_7 0) (= 0 |v_#NULL.base_7|) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1221~0.base_19| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1221~0.base_19|) |v_ULTIMATE.start_main_~#t1221~0.offset_16| 0)) |v_#memory_int_25|) (= v_~z$r_buff0_thd1~0_87 0) (= v_~z$w_buff1_used~0_620 0) (= v_~main$tmp_guard1~0_25 0) (= v_~a~0_234 0) (= v_~main$tmp_guard0~0_24 0) (= v_~z$mem_tmp~0_23 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_234, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_44|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_101|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_38|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_120|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_57|, ~a~0=v_~a~0_234, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_435, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_33, ULTIMATE.start_main_~#t1223~0.offset=|v_ULTIMATE.start_main_~#t1223~0.offset_16|, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_372, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_243, #length=|v_#length_29|, ULTIMATE.start_main_~#t1222~0.base=|v_ULTIMATE.start_main_~#t1222~0.base_22|, ~z$mem_tmp~0=v_~z$mem_tmp~0_23, ULTIMATE.start_main_~#t1223~0.base=|v_ULTIMATE.start_main_~#t1223~0.base_21|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_45|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_620, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ~z$flush_delayed~0=v_~z$flush_delayed~0_82, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_36|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_69|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_47|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_233, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_195, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ~x~0=v_~x~0_30, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_281, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_43|, ULTIMATE.start_main_~#t1224~0.offset=|v_ULTIMATE.start_main_~#t1224~0.offset_17|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_40|, ~z$w_buff1~0=v_~z$w_buff1~0_400, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_34|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_36|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_~#t1224~0.base=|v_ULTIMATE.start_main_~#t1224~0.base_22|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_55|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_427, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_28|, ~y~0=v_~y~0_50, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_88, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_862, ~z$w_buff0~0=v_~z$w_buff0~0_412, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_40|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_28|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ULTIMATE.start_main_~#t1222~0.offset=|v_ULTIMATE.start_main_~#t1222~0.offset_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_46|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_243, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_61|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_64|, ULTIMATE.start_main_~#t1221~0.base=|v_ULTIMATE.start_main_~#t1221~0.base_19|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ~b~0=v_~b~0_102, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_14|, ULTIMATE.start_main_~#t1221~0.offset=|v_ULTIMATE.start_main_~#t1221~0.offset_16|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_22|, ~z~0=v_~z~0_221, ~weak$$choice2~0=v_~weak$$choice2~0_150, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_87} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t1223~0.offset, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_~#t1222~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_~#t1223~0.base, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1224~0.offset, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t1224~0.base, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t1222~0.offset, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t1221~0.base, ULTIMATE.start_main_#t~ite41, ~b~0, ULTIMATE.start_main_#res, ULTIMATE.start_main_~#t1221~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:53:46,887 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L833-1-->L835: Formula: (and (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1222~0.base_13| 4) |v_#length_23|) (= 0 |v_ULTIMATE.start_main_~#t1222~0.offset_11|) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1222~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1222~0.base_13|) |v_ULTIMATE.start_main_~#t1222~0.offset_11| 1)) |v_#memory_int_19|) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1222~0.base_13|) (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1222~0.base_13|)) (not (= |v_ULTIMATE.start_main_~#t1222~0.base_13| 0)) (= |v_#valid_48| (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1222~0.base_13| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t1222~0.offset=|v_ULTIMATE.start_main_~#t1222~0.offset_11|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_23|, ULTIMATE.start_main_~#t1222~0.base=|v_ULTIMATE.start_main_~#t1222~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1222~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1222~0.base] because there is no mapped edge [2019-12-07 17:53:46,887 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L835-1-->L837: Formula: (and (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1223~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t1223~0.base_12| 0)) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1223~0.base_12| 1)) (= 0 |v_ULTIMATE.start_main_~#t1223~0.offset_10|) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1223~0.base_12|) 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1223~0.base_12| 4)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1223~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1223~0.base_12|) |v_ULTIMATE.start_main_~#t1223~0.offset_10| 2)) |v_#memory_int_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1223~0.base=|v_ULTIMATE.start_main_~#t1223~0.base_12|, ULTIMATE.start_main_~#t1223~0.offset=|v_ULTIMATE.start_main_~#t1223~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1223~0.base, ULTIMATE.start_main_~#t1223~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 17:53:46,887 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L837-1-->L839: Formula: (and (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1224~0.base_12|) 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1224~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1224~0.base_12|) |v_ULTIMATE.start_main_~#t1224~0.offset_10| 3)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1224~0.base_12| 4) |v_#length_17|) (not (= 0 |v_ULTIMATE.start_main_~#t1224~0.base_12|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1224~0.base_12|) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1224~0.base_12| 1)) (= 0 |v_ULTIMATE.start_main_~#t1224~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1224~0.offset=|v_ULTIMATE.start_main_~#t1224~0.offset_10|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ULTIMATE.start_main_~#t1224~0.base=|v_ULTIMATE.start_main_~#t1224~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1224~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_~#t1224~0.base] because there is no mapped edge [2019-12-07 17:53:46,888 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L4-->L810: Formula: (and (= v_~z$r_buff0_thd0~0_60 v_~z$r_buff1_thd0~0_36) (= v_~__unbuffered_p3_EBX~0_4 v_~b~0_4) (= v_~__unbuffered_p3_EAX~0_4 v_~a~0_3) (= v_~z$r_buff1_thd1~0_3 v_~z$r_buff0_thd1~0_3) (= v_~z$r_buff1_thd2~0_4 v_~z$r_buff0_thd2~0_4) (= v_~z$r_buff0_thd4~0_20 v_~z$r_buff1_thd4~0_14) (= 1 v_~a~0_3) (= v_~z$r_buff0_thd4~0_19 1) (= v_~z$r_buff0_thd3~0_17 v_~z$r_buff1_thd3~0_11) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_20, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_14, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_11, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_4, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_4, ~a~0=v_~a~0_3, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_36, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_3, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_19, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 17:53:46,888 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_7|) (= v_P0Thread1of1ForFork0_~arg.base_13 |v_P0Thread1of1ForFork0_#in~arg.base_15|) (= v_~b~0_77 1) (= v_~x~0_21 v_~__unbuffered_p0_EAX~0_21) (= |v_P0Thread1of1ForFork0_#res.offset_7| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_P0Thread1of1ForFork0_~arg.offset_13 |v_P0Thread1of1ForFork0_#in~arg.offset_15|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, ~x~0=v_~x~0_21} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_21, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_7|, ~b~0=v_~b~0_77, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_13, ~x~0=v_~x~0_21, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_13} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:53:46,888 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] P1ENTRY-->P1EXIT: Formula: (and (= v_~y~0_35 1) (= v_~x~0_26 1) (= v_P1Thread1of1ForFork1_~arg.base_10 |v_P1Thread1of1ForFork1_#in~arg.base_12|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_12| v_P1Thread1of1ForFork1_~arg.offset_10) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_89 1) v_~__unbuffered_cnt~0_88)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_89} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_10, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_10, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~y~0=v_~y~0_35, ~x~0=v_~x~0_26, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~y~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:53:46,889 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In787610957 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In787610957 256)))) (or (and (not .cse0) (= |P3Thread1of1ForFork3_#t~ite11_Out787610957| 0) (not .cse1)) (and (= |P3Thread1of1ForFork3_#t~ite11_Out787610957| ~z$w_buff0_used~0_In787610957) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In787610957, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In787610957} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In787610957, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In787610957, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out787610957|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 17:53:46,889 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L774-2-->L774-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In249608660 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In249608660 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite3_Out249608660| ~z~0_In249608660) (or .cse0 .cse1)) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite3_Out249608660| ~z$w_buff1~0_In249608660) (not .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In249608660, ~z$w_buff1_used~0=~z$w_buff1_used~0_In249608660, ~z$w_buff1~0=~z$w_buff1~0_In249608660, ~z~0=~z~0_In249608660} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out249608660|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In249608660, ~z$w_buff1_used~0=~z$w_buff1_used~0_In249608660, ~z$w_buff1~0=~z$w_buff1~0_In249608660, ~z~0=~z~0_In249608660} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 17:53:46,889 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L812-->L812-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In-867423566 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd4~0_In-867423566 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-867423566 256))) (.cse0 (= (mod ~z$r_buff0_thd4~0_In-867423566 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-867423566 |P3Thread1of1ForFork3_#t~ite12_Out-867423566|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P3Thread1of1ForFork3_#t~ite12_Out-867423566|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-867423566, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-867423566, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-867423566, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-867423566} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-867423566, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-867423566, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-867423566, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-867423566, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out-867423566|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 17:53:46,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L813-->L814: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In620080656 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd4~0_In620080656 256) 0)) (.cse2 (= ~z$r_buff0_thd4~0_Out620080656 ~z$r_buff0_thd4~0_In620080656))) (or (and (= ~z$r_buff0_thd4~0_Out620080656 0) (not .cse0) (not .cse1)) (and .cse1 .cse2) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In620080656, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In620080656} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In620080656, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out620080656, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out620080656|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 17:53:46,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L814-->L814-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd4~0_In-1033811835 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1033811835 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd4~0_In-1033811835 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1033811835 256)))) (or (and (= |P3Thread1of1ForFork3_#t~ite14_Out-1033811835| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P3Thread1of1ForFork3_#t~ite14_Out-1033811835| ~z$r_buff1_thd4~0_In-1033811835) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1033811835, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1033811835, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1033811835, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1033811835} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1033811835, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1033811835, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out-1033811835|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1033811835, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1033811835} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 17:53:46,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L814-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_30| v_~z$r_buff1_thd4~0_45) (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_45, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_29|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 17:53:46,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L774-4-->L775: Formula: (= |v_P2Thread1of1ForFork2_#t~ite3_14| v_~z~0_56) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_14|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_9|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_13|, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 17:53:46,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L775-->L775-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1533720074 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1533720074 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite5_Out-1533720074| ~z$w_buff0_used~0_In-1533720074)) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite5_Out-1533720074| 0) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1533720074, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1533720074} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1533720074|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1533720074, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1533720074} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 17:53:46,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L776-->L776-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd3~0_In794009524 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In794009524 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In794009524 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In794009524 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite6_Out794009524|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~z$w_buff1_used~0_In794009524 |P2Thread1of1ForFork2_#t~ite6_Out794009524|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In794009524, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In794009524, ~z$w_buff1_used~0=~z$w_buff1_used~0_In794009524, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In794009524} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out794009524|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In794009524, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In794009524, ~z$w_buff1_used~0=~z$w_buff1_used~0_In794009524, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In794009524} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 17:53:46,891 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1002367625 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1002367625 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite7_Out1002367625| ~z$r_buff0_thd3~0_In1002367625)) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite7_Out1002367625| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1002367625, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1002367625} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1002367625, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1002367625, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out1002367625|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 17:53:46,891 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L778-->L778-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In2141604479 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In2141604479 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In2141604479 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In2141604479 256) 0))) (or (and (= ~z$r_buff1_thd3~0_In2141604479 |P2Thread1of1ForFork2_#t~ite8_Out2141604479|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork2_#t~ite8_Out2141604479|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2141604479, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2141604479, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2141604479, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2141604479} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2141604479, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2141604479, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2141604479, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2141604479, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out2141604479|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:53:46,891 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L778-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_28| v_~z$r_buff1_thd3~0_74)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_28|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_27|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:53:46,891 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L839-1-->L845: Formula: (and (not (= (mod v_~main$tmp_guard0~0_13 256) 0)) (= (ite (= (ite (= 4 v_~__unbuffered_cnt~0_34) 1 0) 0) 0 1) v_~main$tmp_guard0~0_13)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_13, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_12|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 17:53:46,891 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L845-2-->L845-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In644881166 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In644881166 256) 0))) (or (and (= ~z~0_In644881166 |ULTIMATE.start_main_#t~ite19_Out644881166|) (or .cse0 .cse1)) (and (not .cse0) (= ~z$w_buff1~0_In644881166 |ULTIMATE.start_main_#t~ite19_Out644881166|) (not .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In644881166, ~z$w_buff1_used~0=~z$w_buff1_used~0_In644881166, ~z$w_buff1~0=~z$w_buff1~0_In644881166, ~z~0=~z~0_In644881166} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out644881166|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In644881166, ~z$w_buff1_used~0=~z$w_buff1_used~0_In644881166, ~z$w_buff1~0=~z$w_buff1~0_In644881166, ~z~0=~z~0_In644881166} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:53:46,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L845-4-->L846: Formula: (= v_~z~0_30 |v_ULTIMATE.start_main_#t~ite19_9|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_9|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|, ~z~0=v_~z~0_30, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:53:46,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L846-->L846-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-2006245500 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-2006245500 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite21_Out-2006245500|) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In-2006245500 |ULTIMATE.start_main_#t~ite21_Out-2006245500|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2006245500, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2006245500} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2006245500, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2006245500, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-2006245500|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:53:46,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L847-->L847-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-332309399 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-332309399 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-332309399 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-332309399 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out-332309399|)) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In-332309399 |ULTIMATE.start_main_#t~ite22_Out-332309399|) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-332309399, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-332309399, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-332309399, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-332309399} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-332309399, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-332309399, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-332309399, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-332309399, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-332309399|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:53:46,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L848-->L848-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1235565953 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1235565953 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite23_Out1235565953|) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd0~0_In1235565953 |ULTIMATE.start_main_#t~ite23_Out1235565953|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1235565953, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1235565953} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1235565953, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1235565953, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out1235565953|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:53:46,893 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L849-->L849-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In1802658384 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In1802658384 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1802658384 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1802658384 256)))) (or (and (= ~z$r_buff1_thd0~0_In1802658384 |ULTIMATE.start_main_#t~ite24_Out1802658384|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite24_Out1802658384|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1802658384, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1802658384, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1802658384, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1802658384} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1802658384, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1802658384, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1802658384, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out1802658384|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1802658384} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 17:53:46,895 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-855928545 256)))) (or (and (= |ULTIMATE.start_main_#t~ite40_Out-855928545| |ULTIMATE.start_main_#t~ite39_Out-855928545|) .cse0 (= |ULTIMATE.start_main_#t~ite39_Out-855928545| ~z$w_buff1_used~0_In-855928545) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-855928545 256)))) (or (= (mod ~z$w_buff0_used~0_In-855928545 256) 0) (and (= (mod ~z$w_buff1_used~0_In-855928545 256) 0) .cse1) (and (= (mod ~z$r_buff1_thd0~0_In-855928545 256) 0) .cse1)))) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite40_Out-855928545| ~z$w_buff1_used~0_In-855928545) (= |ULTIMATE.start_main_#t~ite39_In-855928545| |ULTIMATE.start_main_#t~ite39_Out-855928545|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-855928545, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-855928545, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In-855928545|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-855928545, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-855928545, ~weak$$choice2~0=~weak$$choice2~0_In-855928545} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-855928545, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-855928545|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-855928545|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-855928545, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-855928545, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-855928545, ~weak$$choice2~0=~weak$$choice2~0_In-855928545} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 17:53:46,895 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L861-->L862: Formula: (and (= v_~z$r_buff0_thd0~0_125 v_~z$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_28 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_28} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_28, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:53:46,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L862-->L862-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In125914782 256) 0))) (or (and (= ~z$r_buff1_thd0~0_In125914782 |ULTIMATE.start_main_#t~ite46_Out125914782|) (= |ULTIMATE.start_main_#t~ite45_In125914782| |ULTIMATE.start_main_#t~ite45_Out125914782|) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite46_Out125914782| |ULTIMATE.start_main_#t~ite45_Out125914782|) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In125914782 256)))) (or (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In125914782 256))) (= 0 (mod ~z$w_buff0_used~0_In125914782 256)) (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In125914782 256))))) (= ~z$r_buff1_thd0~0_In125914782 |ULTIMATE.start_main_#t~ite45_Out125914782|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In125914782, ~z$w_buff0_used~0=~z$w_buff0_used~0_In125914782, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In125914782, ~z$w_buff1_used~0=~z$w_buff1_used~0_In125914782, ~weak$$choice2~0=~weak$$choice2~0_In125914782, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In125914782|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In125914782, ~z$w_buff0_used~0=~z$w_buff0_used~0_In125914782, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In125914782, ~z$w_buff1_used~0=~z$w_buff1_used~0_In125914782, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out125914782|, ~weak$$choice2~0=~weak$$choice2~0_In125914782, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out125914782|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 17:53:46,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L864-->L4: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_110) (not (= 0 (mod v_~z$flush_delayed~0_38 256))) (= 0 v_~z$flush_delayed~0_37) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_38} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_37, ~z~0=v_~z~0_110, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:53:46,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:53:46,945 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_53b0ec25-4c9f-420f-892f-f1dd500ce8f3/bin/uautomizer/witness.graphml [2019-12-07 17:53:46,946 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:53:46,947 INFO L168 Benchmark]: Toolchain (without parser) took 19609.97 ms. Allocated memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: 1.6 GB). Free memory was 939.3 MB in the beginning and 1.5 GB in the end (delta: -600.9 MB). Peak memory consumption was 1.0 GB. Max. memory is 11.5 GB. [2019-12-07 17:53:46,947 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:53:46,947 INFO L168 Benchmark]: CACSL2BoogieTranslator took 378.09 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 82.8 MB). Free memory was 939.3 MB in the beginning and 1.0 GB in the end (delta: -109.8 MB). Peak memory consumption was 23.9 MB. Max. memory is 11.5 GB. [2019-12-07 17:53:46,947 INFO L168 Benchmark]: Boogie Procedure Inliner took 43.04 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:53:46,948 INFO L168 Benchmark]: Boogie Preprocessor took 26.75 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:53:46,948 INFO L168 Benchmark]: RCFGBuilder took 413.72 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 982.4 MB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. [2019-12-07 17:53:46,948 INFO L168 Benchmark]: TraceAbstraction took 18683.30 ms. Allocated memory was 1.1 GB in the beginning and 2.7 GB in the end (delta: 1.6 GB). Free memory was 982.4 MB in the beginning and 1.6 GB in the end (delta: -594.0 MB). Peak memory consumption was 960.5 MB. Max. memory is 11.5 GB. [2019-12-07 17:53:46,948 INFO L168 Benchmark]: Witness Printer took 61.72 ms. Allocated memory is still 2.7 GB. Free memory was 1.6 GB in the beginning and 1.5 GB in the end (delta: 36.2 MB). Peak memory consumption was 36.2 MB. Max. memory is 11.5 GB. [2019-12-07 17:53:46,950 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 378.09 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 82.8 MB). Free memory was 939.3 MB in the beginning and 1.0 GB in the end (delta: -109.8 MB). Peak memory consumption was 23.9 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 43.04 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.75 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 413.72 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 982.4 MB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 18683.30 ms. Allocated memory was 1.1 GB in the beginning and 2.7 GB in the end (delta: 1.6 GB). Free memory was 982.4 MB in the beginning and 1.6 GB in the end (delta: -594.0 MB). Peak memory consumption was 960.5 MB. Max. memory is 11.5 GB. * Witness Printer took 61.72 ms. Allocated memory is still 2.7 GB. Free memory was 1.6 GB in the beginning and 1.5 GB in the end (delta: 36.2 MB). Peak memory consumption was 36.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 181 ProgramPointsBefore, 92 ProgramPointsAfterwards, 209 TransitionsBefore, 100 TransitionsAfterwards, 12668 CoEnabledTransitionPairs, 7 FixpointIterations, 37 TrivialSequentialCompositions, 50 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 25 ChoiceCompositions, 4988 VarBasedMoverChecksPositive, 283 VarBasedMoverChecksNegative, 145 SemBasedMoverChecksPositive, 210 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 52490 CheckedPairsTotal, 119 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L833] FCALL, FORK 0 pthread_create(&t1221, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L835] FCALL, FORK 0 pthread_create(&t1222, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] FCALL, FORK 0 pthread_create(&t1223, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L839] FCALL, FORK 0 pthread_create(&t1224, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L788] 4 z$w_buff1 = z$w_buff0 [L789] 4 z$w_buff0 = 2 [L790] 4 z$w_buff1_used = z$w_buff0_used [L791] 4 z$w_buff0_used = (_Bool)1 [L810] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] 3 y = 2 [L771] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L810] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L774] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L811] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L812] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L775] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L776] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L777] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L845] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L846] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L847] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L848] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L849] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L852] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L853] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L854] 0 z$flush_delayed = weak$$choice2 [L855] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L856] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L856] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L857] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L857] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L858] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L859] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L859] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L860] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L862] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L863] 0 main$tmp_guard1 = !(y == 2 && z == 2 && __unbuffered_p0_EAX == 0 && __unbuffered_p3_EAX == 1 && __unbuffered_p3_EBX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 18.5s, OverallIterations: 20, TraceHistogramMax: 1, AutomataDifference: 5.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2236 SDtfs, 2566 SDslu, 5623 SDs, 0 SdLazy, 2582 SolverSat, 193 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 157 GetRequests, 26 SyntacticMatches, 12 SemanticMatches, 119 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 269 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=57282occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 6.4s AutomataMinimizationTime, 19 MinimizatonAttempts, 33460 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 901 NumberOfCodeBlocks, 901 NumberOfCodeBlocksAsserted, 20 NumberOfCheckSat, 822 ConstructedInterpolants, 0 QuantifiedInterpolants, 178563 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 19 InterpolantComputations, 19 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...