./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix046_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_1d78ea28-4f32-42d3-9b7e-8d1c18e35ce1/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_1d78ea28-4f32-42d3-9b7e-8d1c18e35ce1/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_1d78ea28-4f32-42d3-9b7e-8d1c18e35ce1/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_1d78ea28-4f32-42d3-9b7e-8d1c18e35ce1/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix046_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_1d78ea28-4f32-42d3-9b7e-8d1c18e35ce1/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_1d78ea28-4f32-42d3-9b7e-8d1c18e35ce1/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5b07ff7ab5e218bdacc92f3f3254cd81e89d933e ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:14:12,882 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:14:12,883 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:14:12,891 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:14:12,891 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:14:12,892 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:14:12,893 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:14:12,894 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:14:12,895 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:14:12,896 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:14:12,897 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:14:12,897 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:14:12,898 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:14:12,898 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:14:12,899 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:14:12,900 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:14:12,900 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:14:12,901 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:14:12,903 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:14:12,904 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:14:12,906 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:14:12,906 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:14:12,907 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:14:12,907 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:14:12,909 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:14:12,909 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:14:12,909 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:14:12,910 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:14:12,910 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:14:12,911 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:14:12,911 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:14:12,911 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:14:12,912 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:14:12,912 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:14:12,913 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:14:12,913 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:14:12,913 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:14:12,913 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:14:12,914 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:14:12,914 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:14:12,914 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:14:12,915 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_1d78ea28-4f32-42d3-9b7e-8d1c18e35ce1/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:14:12,924 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:14:12,924 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:14:12,925 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:14:12,925 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:14:12,925 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:14:12,925 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:14:12,925 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:14:12,925 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:14:12,925 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:14:12,926 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:14:12,926 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:14:12,926 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:14:12,926 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:14:12,926 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:14:12,926 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:14:12,926 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:14:12,926 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:14:12,926 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:14:12,927 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:14:12,927 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:14:12,927 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:14:12,927 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:14:12,927 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:14:12,927 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:14:12,927 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:14:12,927 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:14:12,927 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:14:12,928 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:14:12,928 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:14:12,928 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_1d78ea28-4f32-42d3-9b7e-8d1c18e35ce1/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5b07ff7ab5e218bdacc92f3f3254cd81e89d933e [2019-12-07 17:14:13,029 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:14:13,036 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:14:13,038 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:14:13,039 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:14:13,039 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:14:13,040 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_1d78ea28-4f32-42d3-9b7e-8d1c18e35ce1/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix046_rmo.opt.i [2019-12-07 17:14:13,074 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1d78ea28-4f32-42d3-9b7e-8d1c18e35ce1/bin/uautomizer/data/6c09ac131/8cd6686918e14a9d97b1c2aede7821b2/FLAG2ea72fa46 [2019-12-07 17:14:13,538 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:14:13,539 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_1d78ea28-4f32-42d3-9b7e-8d1c18e35ce1/sv-benchmarks/c/pthread-wmm/mix046_rmo.opt.i [2019-12-07 17:14:13,550 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1d78ea28-4f32-42d3-9b7e-8d1c18e35ce1/bin/uautomizer/data/6c09ac131/8cd6686918e14a9d97b1c2aede7821b2/FLAG2ea72fa46 [2019-12-07 17:14:13,559 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_1d78ea28-4f32-42d3-9b7e-8d1c18e35ce1/bin/uautomizer/data/6c09ac131/8cd6686918e14a9d97b1c2aede7821b2 [2019-12-07 17:14:13,561 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:14:13,562 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:14:13,563 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:14:13,563 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:14:13,566 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:14:13,566 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:14:13" (1/1) ... [2019-12-07 17:14:13,568 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5bd1e142 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:14:13, skipping insertion in model container [2019-12-07 17:14:13,568 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:14:13" (1/1) ... [2019-12-07 17:14:13,573 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:14:13,604 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:14:13,848 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:14:13,856 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:14:13,899 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:14:13,944 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:14:13,945 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:14:13 WrapperNode [2019-12-07 17:14:13,945 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:14:13,945 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:14:13,945 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:14:13,945 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:14:13,951 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:14:13" (1/1) ... [2019-12-07 17:14:13,965 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:14:13" (1/1) ... [2019-12-07 17:14:13,988 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:14:13,988 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:14:13,988 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:14:13,988 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:14:13,995 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:14:13" (1/1) ... [2019-12-07 17:14:13,995 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:14:13" (1/1) ... [2019-12-07 17:14:13,998 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:14:13" (1/1) ... [2019-12-07 17:14:13,999 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:14:13" (1/1) ... [2019-12-07 17:14:14,006 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:14:13" (1/1) ... [2019-12-07 17:14:14,008 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:14:13" (1/1) ... [2019-12-07 17:14:14,011 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:14:13" (1/1) ... [2019-12-07 17:14:14,014 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:14:14,014 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:14:14,015 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:14:14,015 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:14:14,015 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:14:13" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_1d78ea28-4f32-42d3-9b7e-8d1c18e35ce1/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:14:14,057 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:14:14,057 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:14:14,058 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:14:14,058 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:14:14,058 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:14:14,058 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:14:14,058 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:14:14,058 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:14:14,058 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:14:14,059 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:14:14,059 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 17:14:14,059 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 17:14:14,059 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:14:14,059 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:14:14,059 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:14:14,061 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:14:14,406 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:14:14,406 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:14:14,407 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:14:14 BoogieIcfgContainer [2019-12-07 17:14:14,407 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:14:14,408 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:14:14,408 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:14:14,410 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:14:14,410 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:14:13" (1/3) ... [2019-12-07 17:14:14,410 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@76f8a35a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:14:14, skipping insertion in model container [2019-12-07 17:14:14,410 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:14:13" (2/3) ... [2019-12-07 17:14:14,411 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@76f8a35a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:14:14, skipping insertion in model container [2019-12-07 17:14:14,411 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:14:14" (3/3) ... [2019-12-07 17:14:14,412 INFO L109 eAbstractionObserver]: Analyzing ICFG mix046_rmo.opt.i [2019-12-07 17:14:14,418 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:14:14,418 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:14:14,423 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:14:14,424 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:14:14,447 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,447 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,448 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,448 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,448 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,448 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,448 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,448 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,448 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,448 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,449 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,449 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,449 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,449 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,449 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,449 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,449 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,450 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,450 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,450 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,450 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,450 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,450 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,450 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,450 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,451 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,451 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,451 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,451 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,451 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,451 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,451 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,451 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,451 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,452 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,452 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,452 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,452 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,452 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,452 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,452 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,452 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,453 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,453 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,453 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,453 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,453 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,453 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,454 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,454 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,454 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,454 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,454 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,454 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,454 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,454 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,455 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,455 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,455 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,455 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,455 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,455 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,455 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,455 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,455 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,456 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,456 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,456 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,456 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,456 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,456 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,456 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,456 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,456 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,457 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,457 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:14:14,469 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 17:14:14,481 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:14:14,481 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:14:14,481 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:14:14,482 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:14:14,482 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:14:14,482 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:14:14,482 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:14:14,482 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:14:14,497 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 181 places, 209 transitions [2019-12-07 17:14:14,499 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 17:14:14,568 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 17:14:14,569 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:14:14,579 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 17:14:14,590 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 17:14:14,622 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 17:14:14,622 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:14:14,627 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 17:14:14,643 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12668 [2019-12-07 17:14:14,643 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:14:17,535 WARN L192 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 97 [2019-12-07 17:14:17,645 INFO L206 etLargeBlockEncoding]: Checked pairs total: 52490 [2019-12-07 17:14:17,645 INFO L214 etLargeBlockEncoding]: Total number of compositions: 119 [2019-12-07 17:14:17,647 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 100 transitions [2019-12-07 17:14:19,663 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 37086 states. [2019-12-07 17:14:19,664 INFO L276 IsEmpty]: Start isEmpty. Operand 37086 states. [2019-12-07 17:14:19,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 17:14:19,669 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:19,669 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:19,669 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:19,673 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:19,673 INFO L82 PathProgramCache]: Analyzing trace with hash -1862617909, now seen corresponding path program 1 times [2019-12-07 17:14:19,678 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:19,679 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [901038549] [2019-12-07 17:14:19,679 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:19,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:19,831 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:19,832 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [901038549] [2019-12-07 17:14:19,832 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:19,832 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:14:19,833 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [835983558] [2019-12-07 17:14:19,837 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:14:19,837 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:19,846 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:14:19,847 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:19,848 INFO L87 Difference]: Start difference. First operand 37086 states. Second operand 3 states. [2019-12-07 17:14:20,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:20,184 INFO L93 Difference]: Finished difference Result 36830 states and 157144 transitions. [2019-12-07 17:14:20,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:14:20,186 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 17:14:20,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:20,409 INFO L225 Difference]: With dead ends: 36830 [2019-12-07 17:14:20,409 INFO L226 Difference]: Without dead ends: 36102 [2019-12-07 17:14:20,410 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:20,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36102 states. [2019-12-07 17:14:21,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36102 to 36102. [2019-12-07 17:14:21,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36102 states. [2019-12-07 17:14:21,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36102 states to 36102 states and 154176 transitions. [2019-12-07 17:14:21,664 INFO L78 Accepts]: Start accepts. Automaton has 36102 states and 154176 transitions. Word has length 9 [2019-12-07 17:14:21,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:21,665 INFO L462 AbstractCegarLoop]: Abstraction has 36102 states and 154176 transitions. [2019-12-07 17:14:21,665 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:14:21,665 INFO L276 IsEmpty]: Start isEmpty. Operand 36102 states and 154176 transitions. [2019-12-07 17:14:21,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 17:14:21,671 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:21,671 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:21,671 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:21,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:21,671 INFO L82 PathProgramCache]: Analyzing trace with hash 290643941, now seen corresponding path program 1 times [2019-12-07 17:14:21,672 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:21,672 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1909983743] [2019-12-07 17:14:21,672 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:21,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:21,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:21,729 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1909983743] [2019-12-07 17:14:21,729 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:21,729 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:14:21,729 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [111615128] [2019-12-07 17:14:21,731 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:14:21,731 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:21,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:14:21,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:14:21,731 INFO L87 Difference]: Start difference. First operand 36102 states and 154176 transitions. Second operand 4 states. [2019-12-07 17:14:22,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:22,188 INFO L93 Difference]: Finished difference Result 56134 states and 231868 transitions. [2019-12-07 17:14:22,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:14:22,189 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 17:14:22,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:22,430 INFO L225 Difference]: With dead ends: 56134 [2019-12-07 17:14:22,430 INFO L226 Difference]: Without dead ends: 56106 [2019-12-07 17:14:22,431 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:14:22,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56106 states. [2019-12-07 17:14:23,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56106 to 51222. [2019-12-07 17:14:23,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51222 states. [2019-12-07 17:14:23,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51222 states to 51222 states and 213628 transitions. [2019-12-07 17:14:23,901 INFO L78 Accepts]: Start accepts. Automaton has 51222 states and 213628 transitions. Word has length 15 [2019-12-07 17:14:23,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:23,902 INFO L462 AbstractCegarLoop]: Abstraction has 51222 states and 213628 transitions. [2019-12-07 17:14:23,902 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:14:23,902 INFO L276 IsEmpty]: Start isEmpty. Operand 51222 states and 213628 transitions. [2019-12-07 17:14:23,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 17:14:23,904 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:23,904 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:23,904 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:23,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:23,905 INFO L82 PathProgramCache]: Analyzing trace with hash -497322091, now seen corresponding path program 1 times [2019-12-07 17:14:23,905 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:23,905 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1753570796] [2019-12-07 17:14:23,905 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:23,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:23,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:23,953 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1753570796] [2019-12-07 17:14:23,953 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:23,953 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:14:23,954 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [63064061] [2019-12-07 17:14:23,954 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:14:23,954 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:23,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:14:23,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:14:23,954 INFO L87 Difference]: Start difference. First operand 51222 states and 213628 transitions. Second operand 4 states. [2019-12-07 17:14:24,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:24,323 INFO L93 Difference]: Finished difference Result 64218 states and 266056 transitions. [2019-12-07 17:14:24,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:14:24,324 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 17:14:24,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:24,469 INFO L225 Difference]: With dead ends: 64218 [2019-12-07 17:14:24,469 INFO L226 Difference]: Without dead ends: 64218 [2019-12-07 17:14:24,469 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:14:24,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64218 states. [2019-12-07 17:14:25,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64218 to 57026. [2019-12-07 17:14:25,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57026 states. [2019-12-07 17:14:25,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57026 states to 57026 states and 237588 transitions. [2019-12-07 17:14:25,836 INFO L78 Accepts]: Start accepts. Automaton has 57026 states and 237588 transitions. Word has length 15 [2019-12-07 17:14:25,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:25,836 INFO L462 AbstractCegarLoop]: Abstraction has 57026 states and 237588 transitions. [2019-12-07 17:14:25,836 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:14:25,836 INFO L276 IsEmpty]: Start isEmpty. Operand 57026 states and 237588 transitions. [2019-12-07 17:14:25,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 17:14:25,848 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:25,848 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:25,848 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:25,849 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:25,849 INFO L82 PathProgramCache]: Analyzing trace with hash -210168677, now seen corresponding path program 1 times [2019-12-07 17:14:25,849 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:25,849 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [126942805] [2019-12-07 17:14:25,849 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:25,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:25,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:25,887 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [126942805] [2019-12-07 17:14:25,887 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:25,887 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:14:25,887 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [324027887] [2019-12-07 17:14:25,888 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:14:25,888 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:25,888 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:14:25,888 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:25,888 INFO L87 Difference]: Start difference. First operand 57026 states and 237588 transitions. Second operand 3 states. [2019-12-07 17:14:26,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:26,044 INFO L93 Difference]: Finished difference Result 44521 states and 171347 transitions. [2019-12-07 17:14:26,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:14:26,044 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 17:14:26,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:26,134 INFO L225 Difference]: With dead ends: 44521 [2019-12-07 17:14:26,134 INFO L226 Difference]: Without dead ends: 44521 [2019-12-07 17:14:26,134 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:26,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44521 states. [2019-12-07 17:14:26,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44521 to 44521. [2019-12-07 17:14:26,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44521 states. [2019-12-07 17:14:27,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44521 states to 44521 states and 171347 transitions. [2019-12-07 17:14:27,088 INFO L78 Accepts]: Start accepts. Automaton has 44521 states and 171347 transitions. Word has length 21 [2019-12-07 17:14:27,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:27,089 INFO L462 AbstractCegarLoop]: Abstraction has 44521 states and 171347 transitions. [2019-12-07 17:14:27,089 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:14:27,089 INFO L276 IsEmpty]: Start isEmpty. Operand 44521 states and 171347 transitions. [2019-12-07 17:14:27,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:14:27,096 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:27,096 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:27,096 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:27,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:27,097 INFO L82 PathProgramCache]: Analyzing trace with hash -1714249668, now seen corresponding path program 1 times [2019-12-07 17:14:27,097 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:27,097 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079870048] [2019-12-07 17:14:27,097 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:27,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:27,145 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:27,145 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1079870048] [2019-12-07 17:14:27,146 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:27,146 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:14:27,146 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1431304315] [2019-12-07 17:14:27,146 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:14:27,146 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:27,146 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:14:27,147 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:14:27,147 INFO L87 Difference]: Start difference. First operand 44521 states and 171347 transitions. Second operand 5 states. [2019-12-07 17:14:27,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:27,609 INFO L93 Difference]: Finished difference Result 59343 states and 224314 transitions. [2019-12-07 17:14:27,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:14:27,610 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 17:14:27,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:27,729 INFO L225 Difference]: With dead ends: 59343 [2019-12-07 17:14:27,729 INFO L226 Difference]: Without dead ends: 59322 [2019-12-07 17:14:27,729 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:14:28,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59322 states. [2019-12-07 17:14:28,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59322 to 44947. [2019-12-07 17:14:28,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44947 states. [2019-12-07 17:14:28,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44947 states to 44947 states and 172600 transitions. [2019-12-07 17:14:28,774 INFO L78 Accepts]: Start accepts. Automaton has 44947 states and 172600 transitions. Word has length 22 [2019-12-07 17:14:28,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:28,774 INFO L462 AbstractCegarLoop]: Abstraction has 44947 states and 172600 transitions. [2019-12-07 17:14:28,774 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:14:28,774 INFO L276 IsEmpty]: Start isEmpty. Operand 44947 states and 172600 transitions. [2019-12-07 17:14:28,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 17:14:28,801 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:28,801 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:28,801 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:28,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:28,802 INFO L82 PathProgramCache]: Analyzing trace with hash -28022635, now seen corresponding path program 1 times [2019-12-07 17:14:28,802 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:28,802 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1434778387] [2019-12-07 17:14:28,802 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:28,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:28,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:28,852 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1434778387] [2019-12-07 17:14:28,852 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:28,852 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:14:28,852 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1457999779] [2019-12-07 17:14:28,853 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:14:28,853 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:28,853 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:14:28,853 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:14:28,853 INFO L87 Difference]: Start difference. First operand 44947 states and 172600 transitions. Second operand 4 states. [2019-12-07 17:14:28,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:28,908 INFO L93 Difference]: Finished difference Result 18682 states and 59454 transitions. [2019-12-07 17:14:28,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:14:28,908 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 17:14:28,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:28,931 INFO L225 Difference]: With dead ends: 18682 [2019-12-07 17:14:28,931 INFO L226 Difference]: Without dead ends: 18682 [2019-12-07 17:14:28,931 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:14:29,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18682 states. [2019-12-07 17:14:29,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18682 to 18682. [2019-12-07 17:14:29,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18682 states. [2019-12-07 17:14:29,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18682 states to 18682 states and 59454 transitions. [2019-12-07 17:14:29,212 INFO L78 Accepts]: Start accepts. Automaton has 18682 states and 59454 transitions. Word has length 30 [2019-12-07 17:14:29,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:29,212 INFO L462 AbstractCegarLoop]: Abstraction has 18682 states and 59454 transitions. [2019-12-07 17:14:29,212 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:14:29,212 INFO L276 IsEmpty]: Start isEmpty. Operand 18682 states and 59454 transitions. [2019-12-07 17:14:29,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 17:14:29,221 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:29,222 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:29,222 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:29,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:29,222 INFO L82 PathProgramCache]: Analyzing trace with hash -882612910, now seen corresponding path program 1 times [2019-12-07 17:14:29,222 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:29,222 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1400598228] [2019-12-07 17:14:29,222 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:29,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:29,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:29,259 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1400598228] [2019-12-07 17:14:29,259 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:29,259 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:14:29,260 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1436964459] [2019-12-07 17:14:29,260 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:14:29,260 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:29,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:14:29,260 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:14:29,260 INFO L87 Difference]: Start difference. First operand 18682 states and 59454 transitions. Second operand 5 states. [2019-12-07 17:14:29,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:29,285 INFO L93 Difference]: Finished difference Result 3095 states and 7883 transitions. [2019-12-07 17:14:29,285 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:14:29,285 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 17:14:29,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:29,288 INFO L225 Difference]: With dead ends: 3095 [2019-12-07 17:14:29,288 INFO L226 Difference]: Without dead ends: 3095 [2019-12-07 17:14:29,288 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:14:29,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3095 states. [2019-12-07 17:14:29,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3095 to 3095. [2019-12-07 17:14:29,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3095 states. [2019-12-07 17:14:29,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3095 states to 3095 states and 7883 transitions. [2019-12-07 17:14:29,319 INFO L78 Accepts]: Start accepts. Automaton has 3095 states and 7883 transitions. Word has length 31 [2019-12-07 17:14:29,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:29,320 INFO L462 AbstractCegarLoop]: Abstraction has 3095 states and 7883 transitions. [2019-12-07 17:14:29,320 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:14:29,320 INFO L276 IsEmpty]: Start isEmpty. Operand 3095 states and 7883 transitions. [2019-12-07 17:14:29,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 17:14:29,323 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:29,323 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:29,323 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:29,323 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:29,324 INFO L82 PathProgramCache]: Analyzing trace with hash 368185348, now seen corresponding path program 1 times [2019-12-07 17:14:29,324 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:29,324 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456759591] [2019-12-07 17:14:29,324 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:29,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:29,373 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:29,373 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1456759591] [2019-12-07 17:14:29,373 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:29,373 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:14:29,374 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2035713795] [2019-12-07 17:14:29,374 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:14:29,374 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:29,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:14:29,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:14:29,374 INFO L87 Difference]: Start difference. First operand 3095 states and 7883 transitions. Second operand 6 states. [2019-12-07 17:14:29,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:29,402 INFO L93 Difference]: Finished difference Result 1376 states and 3911 transitions. [2019-12-07 17:14:29,402 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:14:29,402 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-12-07 17:14:29,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:29,404 INFO L225 Difference]: With dead ends: 1376 [2019-12-07 17:14:29,404 INFO L226 Difference]: Without dead ends: 1376 [2019-12-07 17:14:29,404 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:14:29,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1376 states. [2019-12-07 17:14:29,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1376 to 1236. [2019-12-07 17:14:29,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1236 states. [2019-12-07 17:14:29,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1236 states to 1236 states and 3511 transitions. [2019-12-07 17:14:29,416 INFO L78 Accepts]: Start accepts. Automaton has 1236 states and 3511 transitions. Word has length 43 [2019-12-07 17:14:29,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:29,416 INFO L462 AbstractCegarLoop]: Abstraction has 1236 states and 3511 transitions. [2019-12-07 17:14:29,416 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:14:29,417 INFO L276 IsEmpty]: Start isEmpty. Operand 1236 states and 3511 transitions. [2019-12-07 17:14:29,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:14:29,418 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:29,418 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:29,418 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:29,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:29,419 INFO L82 PathProgramCache]: Analyzing trace with hash 2028178460, now seen corresponding path program 1 times [2019-12-07 17:14:29,419 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:29,419 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1016560145] [2019-12-07 17:14:29,419 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:29,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:29,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:29,457 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1016560145] [2019-12-07 17:14:29,457 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:29,457 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:14:29,457 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1882514765] [2019-12-07 17:14:29,458 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:14:29,458 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:29,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:14:29,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:29,458 INFO L87 Difference]: Start difference. First operand 1236 states and 3511 transitions. Second operand 3 states. [2019-12-07 17:14:29,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:29,492 INFO L93 Difference]: Finished difference Result 1249 states and 3529 transitions. [2019-12-07 17:14:29,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:14:29,492 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 17:14:29,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:29,494 INFO L225 Difference]: With dead ends: 1249 [2019-12-07 17:14:29,494 INFO L226 Difference]: Without dead ends: 1249 [2019-12-07 17:14:29,494 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:29,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1249 states. [2019-12-07 17:14:29,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1249 to 1243. [2019-12-07 17:14:29,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2019-12-07 17:14:29,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 3522 transitions. [2019-12-07 17:14:29,507 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 3522 transitions. Word has length 58 [2019-12-07 17:14:29,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:29,507 INFO L462 AbstractCegarLoop]: Abstraction has 1243 states and 3522 transitions. [2019-12-07 17:14:29,507 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:14:29,507 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 3522 transitions. [2019-12-07 17:14:29,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:14:29,509 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:29,509 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:29,509 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:29,509 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:29,509 INFO L82 PathProgramCache]: Analyzing trace with hash 1114375606, now seen corresponding path program 1 times [2019-12-07 17:14:29,510 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:29,510 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1008851294] [2019-12-07 17:14:29,510 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:29,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:29,545 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:29,545 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1008851294] [2019-12-07 17:14:29,545 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:29,545 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:14:29,545 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [389071127] [2019-12-07 17:14:29,546 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:14:29,546 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:29,546 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:14:29,546 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:29,546 INFO L87 Difference]: Start difference. First operand 1243 states and 3522 transitions. Second operand 3 states. [2019-12-07 17:14:29,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:29,579 INFO L93 Difference]: Finished difference Result 1249 states and 3519 transitions. [2019-12-07 17:14:29,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:14:29,580 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 17:14:29,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:29,582 INFO L225 Difference]: With dead ends: 1249 [2019-12-07 17:14:29,582 INFO L226 Difference]: Without dead ends: 1249 [2019-12-07 17:14:29,582 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:29,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1249 states. [2019-12-07 17:14:29,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1249 to 1240. [2019-12-07 17:14:29,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1240 states. [2019-12-07 17:14:29,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1240 states to 1240 states and 3510 transitions. [2019-12-07 17:14:29,597 INFO L78 Accepts]: Start accepts. Automaton has 1240 states and 3510 transitions. Word has length 58 [2019-12-07 17:14:29,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:29,597 INFO L462 AbstractCegarLoop]: Abstraction has 1240 states and 3510 transitions. [2019-12-07 17:14:29,597 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:14:29,597 INFO L276 IsEmpty]: Start isEmpty. Operand 1240 states and 3510 transitions. [2019-12-07 17:14:29,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:14:29,599 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:29,599 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:29,599 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:29,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:29,599 INFO L82 PathProgramCache]: Analyzing trace with hash 1114895507, now seen corresponding path program 1 times [2019-12-07 17:14:29,599 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:29,599 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1390274618] [2019-12-07 17:14:29,600 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:29,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:29,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:29,659 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1390274618] [2019-12-07 17:14:29,659 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:29,659 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:14:29,659 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [372613466] [2019-12-07 17:14:29,659 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:14:29,659 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:29,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:14:29,660 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:14:29,660 INFO L87 Difference]: Start difference. First operand 1240 states and 3510 transitions. Second operand 5 states. [2019-12-07 17:14:29,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:29,781 INFO L93 Difference]: Finished difference Result 1781 states and 5032 transitions. [2019-12-07 17:14:29,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:14:29,781 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2019-12-07 17:14:29,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:29,783 INFO L225 Difference]: With dead ends: 1781 [2019-12-07 17:14:29,783 INFO L226 Difference]: Without dead ends: 1781 [2019-12-07 17:14:29,783 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:14:29,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1781 states. [2019-12-07 17:14:29,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1781 to 1605. [2019-12-07 17:14:29,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1605 states. [2019-12-07 17:14:29,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1605 states to 1605 states and 4540 transitions. [2019-12-07 17:14:29,800 INFO L78 Accepts]: Start accepts. Automaton has 1605 states and 4540 transitions. Word has length 58 [2019-12-07 17:14:29,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:29,800 INFO L462 AbstractCegarLoop]: Abstraction has 1605 states and 4540 transitions. [2019-12-07 17:14:29,801 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:14:29,801 INFO L276 IsEmpty]: Start isEmpty. Operand 1605 states and 4540 transitions. [2019-12-07 17:14:29,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:14:29,803 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:29,803 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:29,803 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:29,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:29,803 INFO L82 PathProgramCache]: Analyzing trace with hash -217131029, now seen corresponding path program 2 times [2019-12-07 17:14:29,803 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:29,803 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [74049179] [2019-12-07 17:14:29,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:29,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:29,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:29,875 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [74049179] [2019-12-07 17:14:29,875 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:29,875 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:14:29,876 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1060791785] [2019-12-07 17:14:29,876 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:14:29,876 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:29,876 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:14:29,876 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:14:29,876 INFO L87 Difference]: Start difference. First operand 1605 states and 4540 transitions. Second operand 6 states. [2019-12-07 17:14:30,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:30,110 INFO L93 Difference]: Finished difference Result 2387 states and 6749 transitions. [2019-12-07 17:14:30,110 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:14:30,111 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-07 17:14:30,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:30,113 INFO L225 Difference]: With dead ends: 2387 [2019-12-07 17:14:30,113 INFO L226 Difference]: Without dead ends: 2387 [2019-12-07 17:14:30,114 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:14:30,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2387 states. [2019-12-07 17:14:30,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2387 to 1749. [2019-12-07 17:14:30,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1749 states. [2019-12-07 17:14:30,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1749 states to 1749 states and 4968 transitions. [2019-12-07 17:14:30,140 INFO L78 Accepts]: Start accepts. Automaton has 1749 states and 4968 transitions. Word has length 58 [2019-12-07 17:14:30,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:30,140 INFO L462 AbstractCegarLoop]: Abstraction has 1749 states and 4968 transitions. [2019-12-07 17:14:30,140 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:14:30,140 INFO L276 IsEmpty]: Start isEmpty. Operand 1749 states and 4968 transitions. [2019-12-07 17:14:30,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:14:30,143 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:30,143 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:30,143 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:30,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:30,143 INFO L82 PathProgramCache]: Analyzing trace with hash 1417485459, now seen corresponding path program 3 times [2019-12-07 17:14:30,144 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:30,144 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [831796115] [2019-12-07 17:14:30,144 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:30,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:30,207 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:30,207 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [831796115] [2019-12-07 17:14:30,207 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:30,208 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:14:30,208 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2077485943] [2019-12-07 17:14:30,208 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:14:30,208 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:30,208 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:14:30,208 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:30,209 INFO L87 Difference]: Start difference. First operand 1749 states and 4968 transitions. Second operand 3 states. [2019-12-07 17:14:30,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:30,255 INFO L93 Difference]: Finished difference Result 1748 states and 4966 transitions. [2019-12-07 17:14:30,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:14:30,256 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 17:14:30,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:30,257 INFO L225 Difference]: With dead ends: 1748 [2019-12-07 17:14:30,257 INFO L226 Difference]: Without dead ends: 1748 [2019-12-07 17:14:30,258 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:30,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1748 states. [2019-12-07 17:14:30,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1748 to 1319. [2019-12-07 17:14:30,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1319 states. [2019-12-07 17:14:30,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1319 states to 1319 states and 3756 transitions. [2019-12-07 17:14:30,272 INFO L78 Accepts]: Start accepts. Automaton has 1319 states and 3756 transitions. Word has length 58 [2019-12-07 17:14:30,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:30,272 INFO L462 AbstractCegarLoop]: Abstraction has 1319 states and 3756 transitions. [2019-12-07 17:14:30,272 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:14:30,273 INFO L276 IsEmpty]: Start isEmpty. Operand 1319 states and 3756 transitions. [2019-12-07 17:14:30,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:14:30,274 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:30,274 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:30,274 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:30,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:30,275 INFO L82 PathProgramCache]: Analyzing trace with hash 368051854, now seen corresponding path program 1 times [2019-12-07 17:14:30,275 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:30,275 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1760781638] [2019-12-07 17:14:30,275 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:30,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:30,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:30,457 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1760781638] [2019-12-07 17:14:30,457 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:30,457 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 17:14:30,457 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [371809200] [2019-12-07 17:14:30,457 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:14:30,458 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:30,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:14:30,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:14:30,458 INFO L87 Difference]: Start difference. First operand 1319 states and 3756 transitions. Second operand 12 states. [2019-12-07 17:14:30,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:30,883 INFO L93 Difference]: Finished difference Result 3062 states and 7900 transitions. [2019-12-07 17:14:30,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:14:30,884 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 59 [2019-12-07 17:14:30,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:30,885 INFO L225 Difference]: With dead ends: 3062 [2019-12-07 17:14:30,885 INFO L226 Difference]: Without dead ends: 1845 [2019-12-07 17:14:30,886 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=173, Invalid=427, Unknown=0, NotChecked=0, Total=600 [2019-12-07 17:14:30,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1845 states. [2019-12-07 17:14:30,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1845 to 1187. [2019-12-07 17:14:30,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1187 states. [2019-12-07 17:14:30,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1187 states to 1187 states and 3309 transitions. [2019-12-07 17:14:30,899 INFO L78 Accepts]: Start accepts. Automaton has 1187 states and 3309 transitions. Word has length 59 [2019-12-07 17:14:30,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:30,899 INFO L462 AbstractCegarLoop]: Abstraction has 1187 states and 3309 transitions. [2019-12-07 17:14:30,899 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:14:30,899 INFO L276 IsEmpty]: Start isEmpty. Operand 1187 states and 3309 transitions. [2019-12-07 17:14:30,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:14:30,901 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:30,901 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:30,901 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:30,901 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:30,901 INFO L82 PathProgramCache]: Analyzing trace with hash 1147587362, now seen corresponding path program 2 times [2019-12-07 17:14:30,901 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:30,901 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [28093290] [2019-12-07 17:14:30,901 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:30,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:31,077 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:31,077 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [28093290] [2019-12-07 17:14:31,077 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:31,077 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:14:31,077 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [993780860] [2019-12-07 17:14:31,077 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 17:14:31,078 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:31,078 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 17:14:31,078 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:14:31,078 INFO L87 Difference]: Start difference. First operand 1187 states and 3309 transitions. Second operand 13 states. [2019-12-07 17:14:31,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:31,542 INFO L93 Difference]: Finished difference Result 2791 states and 6966 transitions. [2019-12-07 17:14:31,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 17:14:31,542 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 59 [2019-12-07 17:14:31,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:31,543 INFO L225 Difference]: With dead ends: 2791 [2019-12-07 17:14:31,544 INFO L226 Difference]: Without dead ends: 1216 [2019-12-07 17:14:31,544 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 115 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=200, Invalid=502, Unknown=0, NotChecked=0, Total=702 [2019-12-07 17:14:31,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1216 states. [2019-12-07 17:14:31,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1216 to 875. [2019-12-07 17:14:31,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 875 states. [2019-12-07 17:14:31,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 2144 transitions. [2019-12-07 17:14:31,553 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 2144 transitions. Word has length 59 [2019-12-07 17:14:31,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:31,553 INFO L462 AbstractCegarLoop]: Abstraction has 875 states and 2144 transitions. [2019-12-07 17:14:31,553 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 17:14:31,553 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 2144 transitions. [2019-12-07 17:14:31,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:14:31,554 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:31,554 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:31,554 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:31,554 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:31,554 INFO L82 PathProgramCache]: Analyzing trace with hash 83225480, now seen corresponding path program 3 times [2019-12-07 17:14:31,554 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:31,554 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1647407783] [2019-12-07 17:14:31,554 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:31,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:31,585 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:31,585 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1647407783] [2019-12-07 17:14:31,586 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:31,586 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:14:31,586 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [431081079] [2019-12-07 17:14:31,586 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:14:31,586 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:31,586 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:14:31,587 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:31,587 INFO L87 Difference]: Start difference. First operand 875 states and 2144 transitions. Second operand 3 states. [2019-12-07 17:14:31,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:31,596 INFO L93 Difference]: Finished difference Result 830 states and 1977 transitions. [2019-12-07 17:14:31,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:14:31,596 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 17:14:31,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:31,597 INFO L225 Difference]: With dead ends: 830 [2019-12-07 17:14:31,597 INFO L226 Difference]: Without dead ends: 830 [2019-12-07 17:14:31,597 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:31,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 830 states. [2019-12-07 17:14:31,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 830 to 782. [2019-12-07 17:14:31,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 782 states. [2019-12-07 17:14:31,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 782 states to 782 states and 1855 transitions. [2019-12-07 17:14:31,604 INFO L78 Accepts]: Start accepts. Automaton has 782 states and 1855 transitions. Word has length 59 [2019-12-07 17:14:31,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:31,604 INFO L462 AbstractCegarLoop]: Abstraction has 782 states and 1855 transitions. [2019-12-07 17:14:31,605 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:14:31,605 INFO L276 IsEmpty]: Start isEmpty. Operand 782 states and 1855 transitions. [2019-12-07 17:14:31,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:14:31,606 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:31,606 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:31,606 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:31,606 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:31,606 INFO L82 PathProgramCache]: Analyzing trace with hash -1492443498, now seen corresponding path program 1 times [2019-12-07 17:14:31,606 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:31,606 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [605089212] [2019-12-07 17:14:31,606 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:31,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:31,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:31,683 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [605089212] [2019-12-07 17:14:31,683 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:31,683 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:14:31,683 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [80322729] [2019-12-07 17:14:31,684 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:14:31,684 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:31,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:14:31,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:14:31,684 INFO L87 Difference]: Start difference. First operand 782 states and 1855 transitions. Second operand 6 states. [2019-12-07 17:14:31,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:31,738 INFO L93 Difference]: Finished difference Result 1068 states and 2447 transitions. [2019-12-07 17:14:31,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:14:31,739 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-12-07 17:14:31,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:31,739 INFO L225 Difference]: With dead ends: 1068 [2019-12-07 17:14:31,739 INFO L226 Difference]: Without dead ends: 261 [2019-12-07 17:14:31,739 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:14:31,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261 states. [2019-12-07 17:14:31,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261 to 237. [2019-12-07 17:14:31,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2019-12-07 17:14:31,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 414 transitions. [2019-12-07 17:14:31,742 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 414 transitions. Word has length 60 [2019-12-07 17:14:31,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:31,742 INFO L462 AbstractCegarLoop]: Abstraction has 237 states and 414 transitions. [2019-12-07 17:14:31,742 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:14:31,742 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 414 transitions. [2019-12-07 17:14:31,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:14:31,742 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:31,743 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:31,743 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:31,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:31,743 INFO L82 PathProgramCache]: Analyzing trace with hash -1893006908, now seen corresponding path program 2 times [2019-12-07 17:14:31,743 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:31,743 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1405877632] [2019-12-07 17:14:31,743 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:31,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:31,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:31,953 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1405877632] [2019-12-07 17:14:31,953 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:31,953 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:14:31,953 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1636476486] [2019-12-07 17:14:31,954 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 17:14:31,954 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:31,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 17:14:31,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2019-12-07 17:14:31,954 INFO L87 Difference]: Start difference. First operand 237 states and 414 transitions. Second operand 15 states. [2019-12-07 17:14:32,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:32,333 INFO L93 Difference]: Finished difference Result 463 states and 786 transitions. [2019-12-07 17:14:32,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 17:14:32,333 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 60 [2019-12-07 17:14:32,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:32,334 INFO L225 Difference]: With dead ends: 463 [2019-12-07 17:14:32,334 INFO L226 Difference]: Without dead ends: 431 [2019-12-07 17:14:32,334 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 73 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=106, Invalid=494, Unknown=0, NotChecked=0, Total=600 [2019-12-07 17:14:32,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 431 states. [2019-12-07 17:14:32,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 431 to 318. [2019-12-07 17:14:32,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 318 states. [2019-12-07 17:14:32,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 318 states to 318 states and 551 transitions. [2019-12-07 17:14:32,337 INFO L78 Accepts]: Start accepts. Automaton has 318 states and 551 transitions. Word has length 60 [2019-12-07 17:14:32,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:32,338 INFO L462 AbstractCegarLoop]: Abstraction has 318 states and 551 transitions. [2019-12-07 17:14:32,338 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 17:14:32,338 INFO L276 IsEmpty]: Start isEmpty. Operand 318 states and 551 transitions. [2019-12-07 17:14:32,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:14:32,338 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:32,338 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:32,338 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:32,338 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:32,339 INFO L82 PathProgramCache]: Analyzing trace with hash -1213917214, now seen corresponding path program 3 times [2019-12-07 17:14:32,339 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:32,339 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [790836133] [2019-12-07 17:14:32,339 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:32,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:32,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:32,563 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [790836133] [2019-12-07 17:14:32,563 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:32,563 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 17:14:32,564 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1681956178] [2019-12-07 17:14:32,564 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 17:14:32,564 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:32,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 17:14:32,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-07 17:14:32,564 INFO L87 Difference]: Start difference. First operand 318 states and 551 transitions. Second operand 16 states. [2019-12-07 17:14:33,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:33,011 INFO L93 Difference]: Finished difference Result 535 states and 902 transitions. [2019-12-07 17:14:33,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 17:14:33,011 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 60 [2019-12-07 17:14:33,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:33,012 INFO L225 Difference]: With dead ends: 535 [2019-12-07 17:14:33,012 INFO L226 Difference]: Without dead ends: 503 [2019-12-07 17:14:33,012 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=133, Invalid=623, Unknown=0, NotChecked=0, Total=756 [2019-12-07 17:14:33,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 503 states. [2019-12-07 17:14:33,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 503 to 352. [2019-12-07 17:14:33,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 352 states. [2019-12-07 17:14:33,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 352 states to 352 states and 613 transitions. [2019-12-07 17:14:33,015 INFO L78 Accepts]: Start accepts. Automaton has 352 states and 613 transitions. Word has length 60 [2019-12-07 17:14:33,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:33,015 INFO L462 AbstractCegarLoop]: Abstraction has 352 states and 613 transitions. [2019-12-07 17:14:33,015 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 17:14:33,015 INFO L276 IsEmpty]: Start isEmpty. Operand 352 states and 613 transitions. [2019-12-07 17:14:33,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:14:33,016 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:33,016 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:33,016 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:33,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:33,016 INFO L82 PathProgramCache]: Analyzing trace with hash 1270891580, now seen corresponding path program 4 times [2019-12-07 17:14:33,017 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:33,017 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [185019758] [2019-12-07 17:14:33,017 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:33,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:33,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:33,406 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [185019758] [2019-12-07 17:14:33,406 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:33,406 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 17:14:33,406 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [170776955] [2019-12-07 17:14:33,406 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 17:14:33,406 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:33,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 17:14:33,407 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=255, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:14:33,407 INFO L87 Difference]: Start difference. First operand 352 states and 613 transitions. Second operand 18 states. [2019-12-07 17:14:35,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:35,383 INFO L93 Difference]: Finished difference Result 804 states and 1371 transitions. [2019-12-07 17:14:35,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 17:14:35,383 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 60 [2019-12-07 17:14:35,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:35,384 INFO L225 Difference]: With dead ends: 804 [2019-12-07 17:14:35,384 INFO L226 Difference]: Without dead ends: 772 [2019-12-07 17:14:35,384 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=161, Invalid=831, Unknown=0, NotChecked=0, Total=992 [2019-12-07 17:14:35,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 772 states. [2019-12-07 17:14:35,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 772 to 376. [2019-12-07 17:14:35,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 376 states. [2019-12-07 17:14:35,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 376 states to 376 states and 658 transitions. [2019-12-07 17:14:35,388 INFO L78 Accepts]: Start accepts. Automaton has 376 states and 658 transitions. Word has length 60 [2019-12-07 17:14:35,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:35,388 INFO L462 AbstractCegarLoop]: Abstraction has 376 states and 658 transitions. [2019-12-07 17:14:35,388 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 17:14:35,388 INFO L276 IsEmpty]: Start isEmpty. Operand 376 states and 658 transitions. [2019-12-07 17:14:35,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:14:35,389 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:35,389 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:35,389 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:35,389 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:35,389 INFO L82 PathProgramCache]: Analyzing trace with hash -1108974140, now seen corresponding path program 5 times [2019-12-07 17:14:35,389 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:35,390 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [899969955] [2019-12-07 17:14:35,390 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:35,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:14:35,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:14:35,474 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:14:35,474 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:14:35,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] ULTIMATE.startENTRY-->L833: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= 0 v_~__unbuffered_p0_EAX~0_33) (= v_~z$w_buff0_used~0_862 0) (= 0 v_~z$r_buff1_thd3~0_308) (= 0 v_~z$r_buff0_thd3~0_195) (= |v_ULTIMATE.start_main_~#t1237~0.offset_16| 0) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t1237~0.base_19| 1)) (= |v_#NULL.offset_7| 0) (= v_~x~0_30 0) (= v_~z$r_buff1_thd1~0_233 0) (< 0 |v_#StackHeapBarrier_21|) (= v_~z$r_buff1_thd0~0_427 0) (= v_~b~0_102 0) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t1237~0.base_19| 4)) (= v_~__unbuffered_cnt~0_109 0) (= 0 v_~z$flush_delayed~0_82) (= 0 v_~weak$$choice0~0_17) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1237~0.base_19| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1237~0.base_19|) |v_ULTIMATE.start_main_~#t1237~0.offset_16| 0)) |v_#memory_int_25|) (= v_~z$w_buff1~0_400 0) (= v_~z$r_buff0_thd2~0_88 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~__unbuffered_p3_EAX~0_243 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1237~0.base_19|)) (= v_~z$r_buff0_thd0~0_435 0) (= 0 v_~__unbuffered_p3_EBX~0_243) (= 0 v_~z$r_buff0_thd4~0_372) (= v_~y~0_50 0) (= v_~z$w_buff0~0_412 0) (= v_~weak$$choice2~0_150 0) (= 0 v_~z$r_buff1_thd4~0_281) (= v_~z~0_221 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff1_thd2~0_234 0) (= v_~z$read_delayed~0_7 0) (= 0 |v_#NULL.base_7|) (= v_~z$r_buff0_thd1~0_87 0) (= v_~z$w_buff1_used~0_620 0) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1237~0.base_19|) (= v_~main$tmp_guard1~0_25 0) (= v_~a~0_234 0) (= v_~main$tmp_guard0~0_24 0) (= v_~z$mem_tmp~0_23 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_234, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_44|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_101|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_38|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_120|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_57|, ULTIMATE.start_main_~#t1240~0.offset=|v_ULTIMATE.start_main_~#t1240~0.offset_17|, ~a~0=v_~a~0_234, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_435, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_33, ULTIMATE.start_main_~#t1240~0.base=|v_ULTIMATE.start_main_~#t1240~0.base_22|, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_372, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_243, #length=|v_#length_29|, ~z$mem_tmp~0=v_~z$mem_tmp~0_23, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_45|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_620, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ~z$flush_delayed~0=v_~z$flush_delayed~0_82, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_36|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_69|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_47|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_233, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_195, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ~x~0=v_~x~0_30, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_281, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_43|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_40|, ~z$w_buff1~0=v_~z$w_buff1~0_400, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_34|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_36|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_55|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_427, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_28|, ~y~0=v_~y~0_50, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_88, ULTIMATE.start_main_~#t1239~0.base=|v_ULTIMATE.start_main_~#t1239~0.base_21|, ULTIMATE.start_main_~#t1237~0.offset=|v_ULTIMATE.start_main_~#t1237~0.offset_16|, ULTIMATE.start_main_~#t1238~0.base=|v_ULTIMATE.start_main_~#t1238~0.base_22|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_862, ~z$w_buff0~0=v_~z$w_buff0~0_412, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_40|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_28|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_46|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_243, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_61|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_64|, ULTIMATE.start_main_~#t1238~0.offset=|v_ULTIMATE.start_main_~#t1238~0.offset_17|, ULTIMATE.start_main_~#t1237~0.base=|v_ULTIMATE.start_main_~#t1237~0.base_19|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ~b~0=v_~b~0_102, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_14|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_22|, ~z~0=v_~z~0_221, ULTIMATE.start_main_~#t1239~0.offset=|v_ULTIMATE.start_main_~#t1239~0.offset_16|, ~weak$$choice2~0=v_~weak$$choice2~0_150, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_87} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1240~0.offset, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t1240~0.base, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1239~0.base, ULTIMATE.start_main_~#t1237~0.offset, ULTIMATE.start_main_~#t1238~0.base, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t1238~0.offset, ULTIMATE.start_main_~#t1237~0.base, ULTIMATE.start_main_#t~ite41, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ULTIMATE.start_main_~#t1239~0.offset, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:14:35,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L833-1-->L835: Formula: (and (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1238~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1238~0.base_13|) |v_ULTIMATE.start_main_~#t1238~0.offset_11| 1)) |v_#memory_int_19|) (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1238~0.base_13|)) (= (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1238~0.base_13| 1) |v_#valid_48|) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1238~0.base_13|) (= |v_ULTIMATE.start_main_~#t1238~0.offset_11| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1238~0.base_13|)) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1238~0.base_13| 4) |v_#length_23|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t1238~0.base=|v_ULTIMATE.start_main_~#t1238~0.base_13|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_23|, ULTIMATE.start_main_~#t1238~0.offset=|v_ULTIMATE.start_main_~#t1238~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1238~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1238~0.offset] because there is no mapped edge [2019-12-07 17:14:35,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L835-1-->L837: Formula: (and (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1239~0.base_12| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1239~0.base_12|)) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1239~0.base_12|) 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1239~0.base_12| 4)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1239~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1239~0.base_12|) |v_ULTIMATE.start_main_~#t1239~0.offset_10| 2)) |v_#memory_int_17|) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1239~0.base_12|) (= |v_ULTIMATE.start_main_~#t1239~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1239~0.offset=|v_ULTIMATE.start_main_~#t1239~0.offset_10|, ULTIMATE.start_main_~#t1239~0.base=|v_ULTIMATE.start_main_~#t1239~0.base_12|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1239~0.offset, ULTIMATE.start_main_~#t1239~0.base] because there is no mapped edge [2019-12-07 17:14:35,478 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L837-1-->L839: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1240~0.offset_10|) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1240~0.base_12|) 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1240~0.base_12| 4)) (not (= |v_ULTIMATE.start_main_~#t1240~0.base_12| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1240~0.base_12|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1240~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1240~0.base_12|) |v_ULTIMATE.start_main_~#t1240~0.offset_10| 3)) |v_#memory_int_13|) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1240~0.base_12| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1240~0.base=|v_ULTIMATE.start_main_~#t1240~0.base_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ULTIMATE.start_main_~#t1240~0.offset=|v_ULTIMATE.start_main_~#t1240~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1240~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_~#t1240~0.offset] because there is no mapped edge [2019-12-07 17:14:35,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L4-->L810: Formula: (and (= v_~z$r_buff0_thd0~0_60 v_~z$r_buff1_thd0~0_36) (= v_~__unbuffered_p3_EBX~0_4 v_~b~0_4) (= v_~__unbuffered_p3_EAX~0_4 v_~a~0_3) (= v_~z$r_buff1_thd1~0_3 v_~z$r_buff0_thd1~0_3) (= v_~z$r_buff1_thd2~0_4 v_~z$r_buff0_thd2~0_4) (= v_~z$r_buff0_thd4~0_20 v_~z$r_buff1_thd4~0_14) (= 1 v_~a~0_3) (= v_~z$r_buff0_thd4~0_19 1) (= v_~z$r_buff0_thd3~0_17 v_~z$r_buff1_thd3~0_11) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_20, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_14, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_11, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_4, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_4, ~a~0=v_~a~0_3, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_36, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_3, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_19, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 17:14:35,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_7|) (= v_P0Thread1of1ForFork0_~arg.base_13 |v_P0Thread1of1ForFork0_#in~arg.base_15|) (= v_~b~0_77 1) (= v_~x~0_21 v_~__unbuffered_p0_EAX~0_21) (= |v_P0Thread1of1ForFork0_#res.offset_7| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_P0Thread1of1ForFork0_~arg.offset_13 |v_P0Thread1of1ForFork0_#in~arg.offset_15|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, ~x~0=v_~x~0_21} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_21, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_7|, ~b~0=v_~b~0_77, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_13, ~x~0=v_~x~0_21, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_13} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:14:35,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] P1ENTRY-->P1EXIT: Formula: (and (= v_~y~0_35 1) (= v_~x~0_26 1) (= v_P1Thread1of1ForFork1_~arg.base_10 |v_P1Thread1of1ForFork1_#in~arg.base_12|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_12| v_P1Thread1of1ForFork1_~arg.offset_10) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_89 1) v_~__unbuffered_cnt~0_88)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_89} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_10, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_10, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~y~0=v_~y~0_35, ~x~0=v_~x~0_26, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~y~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:14:35,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L811-->L811-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1533003163 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd4~0_In1533003163 256) 0))) (or (and (= |P3Thread1of1ForFork3_#t~ite11_Out1533003163| ~z$w_buff0_used~0_In1533003163) (or .cse0 .cse1)) (and (= |P3Thread1of1ForFork3_#t~ite11_Out1533003163| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1533003163, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1533003163} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1533003163, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1533003163, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out1533003163|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 17:14:35,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L774-2-->L774-4: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd3~0_In-1840363049 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1840363049 256)))) (or (and (or .cse0 .cse1) (= ~z~0_In-1840363049 |P2Thread1of1ForFork2_#t~ite3_Out-1840363049|)) (and (not .cse1) (= ~z$w_buff1~0_In-1840363049 |P2Thread1of1ForFork2_#t~ite3_Out-1840363049|) (not .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1840363049, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1840363049, ~z$w_buff1~0=~z$w_buff1~0_In-1840363049, ~z~0=~z~0_In-1840363049} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-1840363049|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1840363049, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1840363049, ~z$w_buff1~0=~z$w_buff1~0_In-1840363049, ~z~0=~z~0_In-1840363049} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 17:14:35,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-531490004 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd4~0_In-531490004 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-531490004 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd4~0_In-531490004 256)))) (or (and (= ~z$w_buff1_used~0_In-531490004 |P3Thread1of1ForFork3_#t~ite12_Out-531490004|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P3Thread1of1ForFork3_#t~ite12_Out-531490004|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-531490004, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-531490004, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-531490004, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-531490004} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-531490004, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-531490004, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-531490004, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-531490004, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out-531490004|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 17:14:35,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L813-->L814: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-896575203 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In-896575203 256))) (.cse2 (= ~z$r_buff0_thd4~0_Out-896575203 ~z$r_buff0_thd4~0_In-896575203))) (or (and (not .cse0) (not .cse1) (= ~z$r_buff0_thd4~0_Out-896575203 0)) (and .cse2 .cse1) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-896575203, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-896575203} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-896575203, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-896575203, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out-896575203|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 17:14:35,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L814-->L814-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-433032394 256))) (.cse2 (= (mod ~z$r_buff1_thd4~0_In-433032394 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd4~0_In-433032394 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-433032394 256) 0))) (or (and (= |P3Thread1of1ForFork3_#t~ite14_Out-433032394| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P3Thread1of1ForFork3_#t~ite14_Out-433032394| ~z$r_buff1_thd4~0_In-433032394) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-433032394, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-433032394, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-433032394, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-433032394} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-433032394, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-433032394, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out-433032394|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-433032394, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-433032394} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 17:14:35,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L814-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_30| v_~z$r_buff1_thd4~0_45) (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_45, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_29|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 17:14:35,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L774-4-->L775: Formula: (= |v_P2Thread1of1ForFork2_#t~ite3_14| v_~z~0_56) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_14|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_9|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_13|, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 17:14:35,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L775-->L775-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-57411476 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-57411476 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite5_Out-57411476| 0) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite5_Out-57411476| ~z$w_buff0_used~0_In-57411476) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-57411476, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-57411476} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-57411476|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-57411476, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-57411476} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 17:14:35,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L776-->L776-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd3~0_In1842056381 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1842056381 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1842056381 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In1842056381 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite6_Out1842056381| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork2_#t~ite6_Out1842056381| ~z$w_buff1_used~0_In1842056381) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1842056381, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1842056381, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1842056381, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1842056381} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out1842056381|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1842056381, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1842056381, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1842056381, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1842056381} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 17:14:35,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L777-->L777-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In625991473 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In625991473 256)))) (or (and (= ~z$r_buff0_thd3~0_In625991473 |P2Thread1of1ForFork2_#t~ite7_Out625991473|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite7_Out625991473|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In625991473, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In625991473} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In625991473, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In625991473, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out625991473|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 17:14:35,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L778-->L778-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In1742473834 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In1742473834 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1742473834 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In1742473834 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite8_Out1742473834| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In1742473834 |P2Thread1of1ForFork2_#t~ite8_Out1742473834|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1742473834, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1742473834, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1742473834, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1742473834} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1742473834, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1742473834, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1742473834, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1742473834, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out1742473834|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:14:35,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L778-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_28| v_~z$r_buff1_thd3~0_74)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_28|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_27|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:14:35,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L839-1-->L845: Formula: (and (not (= (mod v_~main$tmp_guard0~0_13 256) 0)) (= (ite (= (ite (= 4 v_~__unbuffered_cnt~0_34) 1 0) 0) 0 1) v_~main$tmp_guard0~0_13)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_13, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_12|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 17:14:35,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L845-2-->L845-4: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd0~0_In888681619 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In888681619 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite19_Out888681619| ~z$w_buff1~0_In888681619)) (and (= |ULTIMATE.start_main_#t~ite19_Out888681619| ~z~0_In888681619) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In888681619, ~z$w_buff1_used~0=~z$w_buff1_used~0_In888681619, ~z$w_buff1~0=~z$w_buff1~0_In888681619, ~z~0=~z~0_In888681619} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out888681619|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In888681619, ~z$w_buff1_used~0=~z$w_buff1_used~0_In888681619, ~z$w_buff1~0=~z$w_buff1~0_In888681619, ~z~0=~z~0_In888681619} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:14:35,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L845-4-->L846: Formula: (= v_~z~0_30 |v_ULTIMATE.start_main_#t~ite19_9|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_9|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|, ~z~0=v_~z~0_30, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:14:35,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In411690296 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In411690296 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite21_Out411690296|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In411690296 |ULTIMATE.start_main_#t~ite21_Out411690296|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In411690296, ~z$w_buff0_used~0=~z$w_buff0_used~0_In411690296} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In411690296, ~z$w_buff0_used~0=~z$w_buff0_used~0_In411690296, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out411690296|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:14:35,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L847-->L847-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd0~0_In1442217960 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1442217960 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In1442217960 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1442217960 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1442217960 |ULTIMATE.start_main_#t~ite22_Out1442217960|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite22_Out1442217960| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1442217960, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1442217960, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1442217960, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1442217960} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1442217960, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1442217960, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1442217960, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1442217960, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1442217960|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:14:35,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In2003058868 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In2003058868 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite23_Out2003058868|)) (and (= ~z$r_buff0_thd0~0_In2003058868 |ULTIMATE.start_main_#t~ite23_Out2003058868|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2003058868, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2003058868} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2003058868, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2003058868, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out2003058868|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:14:35,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L849-->L849-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In526690647 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In526690647 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In526690647 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In526690647 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite24_Out526690647| 0)) (and (= |ULTIMATE.start_main_#t~ite24_Out526690647| ~z$r_buff1_thd0~0_In526690647) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In526690647, ~z$w_buff0_used~0=~z$w_buff0_used~0_In526690647, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In526690647, ~z$w_buff1_used~0=~z$w_buff1_used~0_In526690647} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In526690647, ~z$w_buff0_used~0=~z$w_buff0_used~0_In526690647, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In526690647, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out526690647|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In526690647} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 17:14:35,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-487837556 256) 0))) (or (and (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-487837556 256) 0))) (or (and .cse0 (= (mod ~z$r_buff1_thd0~0_In-487837556 256) 0)) (= (mod ~z$w_buff0_used~0_In-487837556 256) 0) (and .cse0 (= 0 (mod ~z$w_buff1_used~0_In-487837556 256))))) .cse1 (= ~z$w_buff1_used~0_In-487837556 |ULTIMATE.start_main_#t~ite39_Out-487837556|) (= |ULTIMATE.start_main_#t~ite40_Out-487837556| |ULTIMATE.start_main_#t~ite39_Out-487837556|)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite39_In-487837556| |ULTIMATE.start_main_#t~ite39_Out-487837556|) (= ~z$w_buff1_used~0_In-487837556 |ULTIMATE.start_main_#t~ite40_Out-487837556|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-487837556, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-487837556, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In-487837556|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-487837556, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-487837556, ~weak$$choice2~0=~weak$$choice2~0_In-487837556} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-487837556, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-487837556|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-487837556|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-487837556, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-487837556, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-487837556, ~weak$$choice2~0=~weak$$choice2~0_In-487837556} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 17:14:35,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L861-->L862: Formula: (and (= v_~z$r_buff0_thd0~0_125 v_~z$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_28 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_28} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_28, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:14:35,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L862-->L862-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1702099860 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite45_In-1702099860| |ULTIMATE.start_main_#t~ite45_Out-1702099860|) (= |ULTIMATE.start_main_#t~ite46_Out-1702099860| ~z$r_buff1_thd0~0_In-1702099860)) (and .cse0 (= |ULTIMATE.start_main_#t~ite46_Out-1702099860| |ULTIMATE.start_main_#t~ite45_Out-1702099860|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1702099860 256)))) (or (and .cse1 (= (mod ~z$r_buff1_thd0~0_In-1702099860 256) 0)) (= (mod ~z$w_buff0_used~0_In-1702099860 256) 0) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-1702099860 256))))) (= |ULTIMATE.start_main_#t~ite45_Out-1702099860| ~z$r_buff1_thd0~0_In-1702099860)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1702099860, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1702099860, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1702099860, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1702099860, ~weak$$choice2~0=~weak$$choice2~0_In-1702099860, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In-1702099860|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1702099860, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1702099860, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1702099860, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1702099860, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-1702099860|, ~weak$$choice2~0=~weak$$choice2~0_In-1702099860, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1702099860|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 17:14:35,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L864-->L4: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_110) (not (= 0 (mod v_~z$flush_delayed~0_38 256))) (= 0 v_~z$flush_delayed~0_37) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_38} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_37, ~z~0=v_~z~0_110, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:14:35,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:14:35,545 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:14:35 BasicIcfg [2019-12-07 17:14:35,545 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:14:35,546 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:14:35,546 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:14:35,546 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:14:35,546 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:14:14" (3/4) ... [2019-12-07 17:14:35,547 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:14:35,548 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] ULTIMATE.startENTRY-->L833: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= 0 v_~__unbuffered_p0_EAX~0_33) (= v_~z$w_buff0_used~0_862 0) (= 0 v_~z$r_buff1_thd3~0_308) (= 0 v_~z$r_buff0_thd3~0_195) (= |v_ULTIMATE.start_main_~#t1237~0.offset_16| 0) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t1237~0.base_19| 1)) (= |v_#NULL.offset_7| 0) (= v_~x~0_30 0) (= v_~z$r_buff1_thd1~0_233 0) (< 0 |v_#StackHeapBarrier_21|) (= v_~z$r_buff1_thd0~0_427 0) (= v_~b~0_102 0) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t1237~0.base_19| 4)) (= v_~__unbuffered_cnt~0_109 0) (= 0 v_~z$flush_delayed~0_82) (= 0 v_~weak$$choice0~0_17) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1237~0.base_19| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1237~0.base_19|) |v_ULTIMATE.start_main_~#t1237~0.offset_16| 0)) |v_#memory_int_25|) (= v_~z$w_buff1~0_400 0) (= v_~z$r_buff0_thd2~0_88 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~__unbuffered_p3_EAX~0_243 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1237~0.base_19|)) (= v_~z$r_buff0_thd0~0_435 0) (= 0 v_~__unbuffered_p3_EBX~0_243) (= 0 v_~z$r_buff0_thd4~0_372) (= v_~y~0_50 0) (= v_~z$w_buff0~0_412 0) (= v_~weak$$choice2~0_150 0) (= 0 v_~z$r_buff1_thd4~0_281) (= v_~z~0_221 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff1_thd2~0_234 0) (= v_~z$read_delayed~0_7 0) (= 0 |v_#NULL.base_7|) (= v_~z$r_buff0_thd1~0_87 0) (= v_~z$w_buff1_used~0_620 0) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1237~0.base_19|) (= v_~main$tmp_guard1~0_25 0) (= v_~a~0_234 0) (= v_~main$tmp_guard0~0_24 0) (= v_~z$mem_tmp~0_23 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_234, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_44|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_101|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_38|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_120|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_57|, ULTIMATE.start_main_~#t1240~0.offset=|v_ULTIMATE.start_main_~#t1240~0.offset_17|, ~a~0=v_~a~0_234, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_435, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_33, ULTIMATE.start_main_~#t1240~0.base=|v_ULTIMATE.start_main_~#t1240~0.base_22|, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_372, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_243, #length=|v_#length_29|, ~z$mem_tmp~0=v_~z$mem_tmp~0_23, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_45|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_620, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ~z$flush_delayed~0=v_~z$flush_delayed~0_82, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_36|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_69|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_47|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_233, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_195, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ~x~0=v_~x~0_30, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_281, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_43|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_40|, ~z$w_buff1~0=v_~z$w_buff1~0_400, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_34|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_36|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_55|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_427, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_28|, ~y~0=v_~y~0_50, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_88, ULTIMATE.start_main_~#t1239~0.base=|v_ULTIMATE.start_main_~#t1239~0.base_21|, ULTIMATE.start_main_~#t1237~0.offset=|v_ULTIMATE.start_main_~#t1237~0.offset_16|, ULTIMATE.start_main_~#t1238~0.base=|v_ULTIMATE.start_main_~#t1238~0.base_22|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_862, ~z$w_buff0~0=v_~z$w_buff0~0_412, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_40|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_28|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_46|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_243, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_61|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_64|, ULTIMATE.start_main_~#t1238~0.offset=|v_ULTIMATE.start_main_~#t1238~0.offset_17|, ULTIMATE.start_main_~#t1237~0.base=|v_ULTIMATE.start_main_~#t1237~0.base_19|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ~b~0=v_~b~0_102, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_14|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_22|, ~z~0=v_~z~0_221, ULTIMATE.start_main_~#t1239~0.offset=|v_ULTIMATE.start_main_~#t1239~0.offset_16|, ~weak$$choice2~0=v_~weak$$choice2~0_150, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_87} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1240~0.offset, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t1240~0.base, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1239~0.base, ULTIMATE.start_main_~#t1237~0.offset, ULTIMATE.start_main_~#t1238~0.base, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t1238~0.offset, ULTIMATE.start_main_~#t1237~0.base, ULTIMATE.start_main_#t~ite41, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ULTIMATE.start_main_~#t1239~0.offset, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:14:35,548 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L833-1-->L835: Formula: (and (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1238~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1238~0.base_13|) |v_ULTIMATE.start_main_~#t1238~0.offset_11| 1)) |v_#memory_int_19|) (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1238~0.base_13|)) (= (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1238~0.base_13| 1) |v_#valid_48|) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1238~0.base_13|) (= |v_ULTIMATE.start_main_~#t1238~0.offset_11| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1238~0.base_13|)) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1238~0.base_13| 4) |v_#length_23|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t1238~0.base=|v_ULTIMATE.start_main_~#t1238~0.base_13|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_23|, ULTIMATE.start_main_~#t1238~0.offset=|v_ULTIMATE.start_main_~#t1238~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1238~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1238~0.offset] because there is no mapped edge [2019-12-07 17:14:35,548 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L835-1-->L837: Formula: (and (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1239~0.base_12| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1239~0.base_12|)) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1239~0.base_12|) 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1239~0.base_12| 4)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1239~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1239~0.base_12|) |v_ULTIMATE.start_main_~#t1239~0.offset_10| 2)) |v_#memory_int_17|) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1239~0.base_12|) (= |v_ULTIMATE.start_main_~#t1239~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1239~0.offset=|v_ULTIMATE.start_main_~#t1239~0.offset_10|, ULTIMATE.start_main_~#t1239~0.base=|v_ULTIMATE.start_main_~#t1239~0.base_12|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1239~0.offset, ULTIMATE.start_main_~#t1239~0.base] because there is no mapped edge [2019-12-07 17:14:35,549 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L837-1-->L839: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1240~0.offset_10|) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1240~0.base_12|) 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1240~0.base_12| 4)) (not (= |v_ULTIMATE.start_main_~#t1240~0.base_12| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1240~0.base_12|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1240~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1240~0.base_12|) |v_ULTIMATE.start_main_~#t1240~0.offset_10| 3)) |v_#memory_int_13|) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1240~0.base_12| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1240~0.base=|v_ULTIMATE.start_main_~#t1240~0.base_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ULTIMATE.start_main_~#t1240~0.offset=|v_ULTIMATE.start_main_~#t1240~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1240~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_~#t1240~0.offset] because there is no mapped edge [2019-12-07 17:14:35,549 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L4-->L810: Formula: (and (= v_~z$r_buff0_thd0~0_60 v_~z$r_buff1_thd0~0_36) (= v_~__unbuffered_p3_EBX~0_4 v_~b~0_4) (= v_~__unbuffered_p3_EAX~0_4 v_~a~0_3) (= v_~z$r_buff1_thd1~0_3 v_~z$r_buff0_thd1~0_3) (= v_~z$r_buff1_thd2~0_4 v_~z$r_buff0_thd2~0_4) (= v_~z$r_buff0_thd4~0_20 v_~z$r_buff1_thd4~0_14) (= 1 v_~a~0_3) (= v_~z$r_buff0_thd4~0_19 1) (= v_~z$r_buff0_thd3~0_17 v_~z$r_buff1_thd3~0_11) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_20, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_14, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_11, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_4, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_4, ~a~0=v_~a~0_3, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_36, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_3, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_19, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 17:14:35,549 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_7|) (= v_P0Thread1of1ForFork0_~arg.base_13 |v_P0Thread1of1ForFork0_#in~arg.base_15|) (= v_~b~0_77 1) (= v_~x~0_21 v_~__unbuffered_p0_EAX~0_21) (= |v_P0Thread1of1ForFork0_#res.offset_7| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_P0Thread1of1ForFork0_~arg.offset_13 |v_P0Thread1of1ForFork0_#in~arg.offset_15|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, ~x~0=v_~x~0_21} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_21, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_7|, ~b~0=v_~b~0_77, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_13, ~x~0=v_~x~0_21, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_13} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:14:35,550 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] P1ENTRY-->P1EXIT: Formula: (and (= v_~y~0_35 1) (= v_~x~0_26 1) (= v_P1Thread1of1ForFork1_~arg.base_10 |v_P1Thread1of1ForFork1_#in~arg.base_12|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_12| v_P1Thread1of1ForFork1_~arg.offset_10) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_89 1) v_~__unbuffered_cnt~0_88)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_89} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_10, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_10, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~y~0=v_~y~0_35, ~x~0=v_~x~0_26, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~y~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:14:35,550 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L811-->L811-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1533003163 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd4~0_In1533003163 256) 0))) (or (and (= |P3Thread1of1ForFork3_#t~ite11_Out1533003163| ~z$w_buff0_used~0_In1533003163) (or .cse0 .cse1)) (and (= |P3Thread1of1ForFork3_#t~ite11_Out1533003163| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1533003163, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1533003163} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1533003163, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1533003163, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out1533003163|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 17:14:35,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L774-2-->L774-4: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd3~0_In-1840363049 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1840363049 256)))) (or (and (or .cse0 .cse1) (= ~z~0_In-1840363049 |P2Thread1of1ForFork2_#t~ite3_Out-1840363049|)) (and (not .cse1) (= ~z$w_buff1~0_In-1840363049 |P2Thread1of1ForFork2_#t~ite3_Out-1840363049|) (not .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1840363049, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1840363049, ~z$w_buff1~0=~z$w_buff1~0_In-1840363049, ~z~0=~z~0_In-1840363049} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-1840363049|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1840363049, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1840363049, ~z$w_buff1~0=~z$w_buff1~0_In-1840363049, ~z~0=~z~0_In-1840363049} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 17:14:35,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-531490004 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd4~0_In-531490004 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-531490004 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd4~0_In-531490004 256)))) (or (and (= ~z$w_buff1_used~0_In-531490004 |P3Thread1of1ForFork3_#t~ite12_Out-531490004|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P3Thread1of1ForFork3_#t~ite12_Out-531490004|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-531490004, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-531490004, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-531490004, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-531490004} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-531490004, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-531490004, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-531490004, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-531490004, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out-531490004|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 17:14:35,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L813-->L814: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-896575203 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In-896575203 256))) (.cse2 (= ~z$r_buff0_thd4~0_Out-896575203 ~z$r_buff0_thd4~0_In-896575203))) (or (and (not .cse0) (not .cse1) (= ~z$r_buff0_thd4~0_Out-896575203 0)) (and .cse2 .cse1) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-896575203, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-896575203} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-896575203, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-896575203, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out-896575203|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 17:14:35,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L814-->L814-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-433032394 256))) (.cse2 (= (mod ~z$r_buff1_thd4~0_In-433032394 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd4~0_In-433032394 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-433032394 256) 0))) (or (and (= |P3Thread1of1ForFork3_#t~ite14_Out-433032394| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P3Thread1of1ForFork3_#t~ite14_Out-433032394| ~z$r_buff1_thd4~0_In-433032394) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-433032394, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-433032394, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-433032394, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-433032394} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-433032394, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-433032394, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out-433032394|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-433032394, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-433032394} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 17:14:35,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L814-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_30| v_~z$r_buff1_thd4~0_45) (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_45, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_29|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 17:14:35,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L774-4-->L775: Formula: (= |v_P2Thread1of1ForFork2_#t~ite3_14| v_~z~0_56) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_14|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_9|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_13|, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 17:14:35,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L775-->L775-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-57411476 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-57411476 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite5_Out-57411476| 0) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite5_Out-57411476| ~z$w_buff0_used~0_In-57411476) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-57411476, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-57411476} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-57411476|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-57411476, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-57411476} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 17:14:35,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L776-->L776-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd3~0_In1842056381 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1842056381 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1842056381 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In1842056381 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite6_Out1842056381| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork2_#t~ite6_Out1842056381| ~z$w_buff1_used~0_In1842056381) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1842056381, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1842056381, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1842056381, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1842056381} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out1842056381|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1842056381, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1842056381, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1842056381, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1842056381} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 17:14:35,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L777-->L777-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In625991473 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In625991473 256)))) (or (and (= ~z$r_buff0_thd3~0_In625991473 |P2Thread1of1ForFork2_#t~ite7_Out625991473|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite7_Out625991473|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In625991473, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In625991473} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In625991473, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In625991473, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out625991473|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 17:14:35,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L778-->L778-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In1742473834 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In1742473834 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1742473834 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In1742473834 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite8_Out1742473834| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In1742473834 |P2Thread1of1ForFork2_#t~ite8_Out1742473834|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1742473834, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1742473834, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1742473834, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1742473834} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1742473834, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1742473834, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1742473834, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1742473834, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out1742473834|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:14:35,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L778-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_28| v_~z$r_buff1_thd3~0_74)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_28|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_27|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:14:35,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L839-1-->L845: Formula: (and (not (= (mod v_~main$tmp_guard0~0_13 256) 0)) (= (ite (= (ite (= 4 v_~__unbuffered_cnt~0_34) 1 0) 0) 0 1) v_~main$tmp_guard0~0_13)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_13, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_12|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 17:14:35,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L845-2-->L845-4: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd0~0_In888681619 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In888681619 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite19_Out888681619| ~z$w_buff1~0_In888681619)) (and (= |ULTIMATE.start_main_#t~ite19_Out888681619| ~z~0_In888681619) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In888681619, ~z$w_buff1_used~0=~z$w_buff1_used~0_In888681619, ~z$w_buff1~0=~z$w_buff1~0_In888681619, ~z~0=~z~0_In888681619} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out888681619|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In888681619, ~z$w_buff1_used~0=~z$w_buff1_used~0_In888681619, ~z$w_buff1~0=~z$w_buff1~0_In888681619, ~z~0=~z~0_In888681619} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:14:35,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L845-4-->L846: Formula: (= v_~z~0_30 |v_ULTIMATE.start_main_#t~ite19_9|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_9|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|, ~z~0=v_~z~0_30, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:14:35,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In411690296 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In411690296 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite21_Out411690296|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In411690296 |ULTIMATE.start_main_#t~ite21_Out411690296|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In411690296, ~z$w_buff0_used~0=~z$w_buff0_used~0_In411690296} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In411690296, ~z$w_buff0_used~0=~z$w_buff0_used~0_In411690296, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out411690296|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:14:35,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L847-->L847-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd0~0_In1442217960 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1442217960 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In1442217960 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1442217960 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1442217960 |ULTIMATE.start_main_#t~ite22_Out1442217960|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite22_Out1442217960| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1442217960, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1442217960, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1442217960, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1442217960} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1442217960, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1442217960, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1442217960, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1442217960, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1442217960|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:14:35,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In2003058868 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In2003058868 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite23_Out2003058868|)) (and (= ~z$r_buff0_thd0~0_In2003058868 |ULTIMATE.start_main_#t~ite23_Out2003058868|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2003058868, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2003058868} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2003058868, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2003058868, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out2003058868|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:14:35,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L849-->L849-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In526690647 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In526690647 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In526690647 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In526690647 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite24_Out526690647| 0)) (and (= |ULTIMATE.start_main_#t~ite24_Out526690647| ~z$r_buff1_thd0~0_In526690647) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In526690647, ~z$w_buff0_used~0=~z$w_buff0_used~0_In526690647, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In526690647, ~z$w_buff1_used~0=~z$w_buff1_used~0_In526690647} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In526690647, ~z$w_buff0_used~0=~z$w_buff0_used~0_In526690647, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In526690647, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out526690647|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In526690647} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 17:14:35,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-487837556 256) 0))) (or (and (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-487837556 256) 0))) (or (and .cse0 (= (mod ~z$r_buff1_thd0~0_In-487837556 256) 0)) (= (mod ~z$w_buff0_used~0_In-487837556 256) 0) (and .cse0 (= 0 (mod ~z$w_buff1_used~0_In-487837556 256))))) .cse1 (= ~z$w_buff1_used~0_In-487837556 |ULTIMATE.start_main_#t~ite39_Out-487837556|) (= |ULTIMATE.start_main_#t~ite40_Out-487837556| |ULTIMATE.start_main_#t~ite39_Out-487837556|)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite39_In-487837556| |ULTIMATE.start_main_#t~ite39_Out-487837556|) (= ~z$w_buff1_used~0_In-487837556 |ULTIMATE.start_main_#t~ite40_Out-487837556|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-487837556, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-487837556, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In-487837556|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-487837556, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-487837556, ~weak$$choice2~0=~weak$$choice2~0_In-487837556} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-487837556, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-487837556|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-487837556|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-487837556, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-487837556, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-487837556, ~weak$$choice2~0=~weak$$choice2~0_In-487837556} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 17:14:35,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L861-->L862: Formula: (and (= v_~z$r_buff0_thd0~0_125 v_~z$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_28 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_28} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_28, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:14:35,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L862-->L862-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1702099860 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite45_In-1702099860| |ULTIMATE.start_main_#t~ite45_Out-1702099860|) (= |ULTIMATE.start_main_#t~ite46_Out-1702099860| ~z$r_buff1_thd0~0_In-1702099860)) (and .cse0 (= |ULTIMATE.start_main_#t~ite46_Out-1702099860| |ULTIMATE.start_main_#t~ite45_Out-1702099860|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1702099860 256)))) (or (and .cse1 (= (mod ~z$r_buff1_thd0~0_In-1702099860 256) 0)) (= (mod ~z$w_buff0_used~0_In-1702099860 256) 0) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-1702099860 256))))) (= |ULTIMATE.start_main_#t~ite45_Out-1702099860| ~z$r_buff1_thd0~0_In-1702099860)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1702099860, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1702099860, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1702099860, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1702099860, ~weak$$choice2~0=~weak$$choice2~0_In-1702099860, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In-1702099860|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1702099860, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1702099860, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1702099860, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1702099860, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-1702099860|, ~weak$$choice2~0=~weak$$choice2~0_In-1702099860, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1702099860|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 17:14:35,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L864-->L4: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_110) (not (= 0 (mod v_~z$flush_delayed~0_38 256))) (= 0 v_~z$flush_delayed~0_37) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_38} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_37, ~z~0=v_~z~0_110, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:14:35,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:14:35,612 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_1d78ea28-4f32-42d3-9b7e-8d1c18e35ce1/bin/uautomizer/witness.graphml [2019-12-07 17:14:35,612 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:14:35,613 INFO L168 Benchmark]: Toolchain (without parser) took 22051.04 ms. Allocated memory was 1.0 GB in the beginning and 2.6 GB in the end (delta: 1.5 GB). Free memory was 939.3 MB in the beginning and 852.1 MB in the end (delta: 87.2 MB). Peak memory consumption was 1.6 GB. Max. memory is 11.5 GB. [2019-12-07 17:14:35,613 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:14:35,614 INFO L168 Benchmark]: CACSL2BoogieTranslator took 381.87 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 104.3 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -132.7 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 17:14:35,614 INFO L168 Benchmark]: Boogie Procedure Inliner took 42.89 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:14:35,614 INFO L168 Benchmark]: Boogie Preprocessor took 26.06 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:14:35,614 INFO L168 Benchmark]: RCFGBuilder took 392.74 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 51.9 MB). Peak memory consumption was 51.9 MB. Max. memory is 11.5 GB. [2019-12-07 17:14:35,615 INFO L168 Benchmark]: TraceAbstraction took 21137.63 ms. Allocated memory was 1.1 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 1.0 GB in the beginning and 886.2 MB in the end (delta: 123.2 MB). Peak memory consumption was 1.6 GB. Max. memory is 11.5 GB. [2019-12-07 17:14:35,615 INFO L168 Benchmark]: Witness Printer took 66.62 ms. Allocated memory is still 2.6 GB. Free memory was 886.2 MB in the beginning and 852.1 MB in the end (delta: 34.1 MB). Peak memory consumption was 34.1 MB. Max. memory is 11.5 GB. [2019-12-07 17:14:35,616 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 381.87 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 104.3 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -132.7 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 42.89 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.06 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 392.74 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 51.9 MB). Peak memory consumption was 51.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 21137.63 ms. Allocated memory was 1.1 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 1.0 GB in the beginning and 886.2 MB in the end (delta: 123.2 MB). Peak memory consumption was 1.6 GB. Max. memory is 11.5 GB. * Witness Printer took 66.62 ms. Allocated memory is still 2.6 GB. Free memory was 886.2 MB in the beginning and 852.1 MB in the end (delta: 34.1 MB). Peak memory consumption was 34.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 181 ProgramPointsBefore, 92 ProgramPointsAfterwards, 209 TransitionsBefore, 100 TransitionsAfterwards, 12668 CoEnabledTransitionPairs, 7 FixpointIterations, 37 TrivialSequentialCompositions, 50 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 25 ChoiceCompositions, 4988 VarBasedMoverChecksPositive, 283 VarBasedMoverChecksNegative, 145 SemBasedMoverChecksPositive, 210 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 52490 CheckedPairsTotal, 119 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L833] FCALL, FORK 0 pthread_create(&t1237, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L835] FCALL, FORK 0 pthread_create(&t1238, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] FCALL, FORK 0 pthread_create(&t1239, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L839] FCALL, FORK 0 pthread_create(&t1240, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L788] 4 z$w_buff1 = z$w_buff0 [L789] 4 z$w_buff0 = 2 [L790] 4 z$w_buff1_used = z$w_buff0_used [L791] 4 z$w_buff0_used = (_Bool)1 [L810] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] 3 y = 2 [L771] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L810] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L774] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L811] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L812] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L775] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L776] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L777] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L845] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L846] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L847] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L848] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L849] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L852] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L853] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L854] 0 z$flush_delayed = weak$$choice2 [L855] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L856] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L856] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L857] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L857] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L858] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L859] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L859] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L860] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L862] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L863] 0 main$tmp_guard1 = !(y == 2 && z == 2 && __unbuffered_p0_EAX == 0 && __unbuffered_p3_EAX == 1 && __unbuffered_p3_EBX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 20.9s, OverallIterations: 21, TraceHistogramMax: 1, AutomataDifference: 7.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2422 SDtfs, 3135 SDslu, 7482 SDs, 0 SdLazy, 4453 SolverSat, 269 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 219 GetRequests, 34 SyntacticMatches, 13 SemanticMatches, 172 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 556 ImplicationChecksByTransitivity, 1.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=57026occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 6.5s AutomataMinimizationTime, 20 MinimizatonAttempts, 29580 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.5s InterpolantComputationTime, 953 NumberOfCodeBlocks, 953 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 873 ConstructedInterpolants, 0 QuantifiedInterpolants, 246468 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 20 InterpolantComputations, 20 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...