./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix047_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_ef215849-80a6-4536-b6c2-614ebd9fb157/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_ef215849-80a6-4536-b6c2-614ebd9fb157/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_ef215849-80a6-4536-b6c2-614ebd9fb157/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_ef215849-80a6-4536-b6c2-614ebd9fb157/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix047_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_ef215849-80a6-4536-b6c2-614ebd9fb157/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_ef215849-80a6-4536-b6c2-614ebd9fb157/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a33390b106b64239208bffb0ecacac083c184c6b ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:17:53,919 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:17:53,920 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:17:53,928 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:17:53,928 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:17:53,929 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:17:53,929 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:17:53,931 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:17:53,932 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:17:53,933 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:17:53,933 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:17:53,934 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:17:53,935 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:17:53,935 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:17:53,936 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:17:53,937 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:17:53,937 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:17:53,938 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:17:53,939 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:17:53,941 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:17:53,942 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:17:53,943 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:17:53,944 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:17:53,944 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:17:53,946 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:17:53,946 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:17:53,946 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:17:53,947 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:17:53,947 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:17:53,947 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:17:53,948 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:17:53,948 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:17:53,948 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:17:53,949 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:17:53,949 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:17:53,949 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:17:53,950 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:17:53,950 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:17:53,950 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:17:53,951 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:17:53,951 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:17:53,952 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_ef215849-80a6-4536-b6c2-614ebd9fb157/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:17:53,960 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:17:53,961 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:17:53,961 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:17:53,961 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:17:53,962 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:17:53,962 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:17:53,962 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:17:53,962 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:17:53,962 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:17:53,962 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:17:53,962 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:17:53,962 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:17:53,963 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:17:53,963 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:17:53,963 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:17:53,963 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:17:53,963 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:17:53,963 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:17:53,963 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:17:53,963 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:17:53,964 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:17:53,964 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:17:53,964 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:17:53,964 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:17:53,964 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:17:53,964 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:17:53,964 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:17:53,965 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:17:53,965 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:17:53,965 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_ef215849-80a6-4536-b6c2-614ebd9fb157/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a33390b106b64239208bffb0ecacac083c184c6b [2019-12-07 17:17:54,067 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:17:54,074 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:17:54,077 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:17:54,078 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:17:54,078 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:17:54,078 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_ef215849-80a6-4536-b6c2-614ebd9fb157/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix047_pso.opt.i [2019-12-07 17:17:54,115 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ef215849-80a6-4536-b6c2-614ebd9fb157/bin/uautomizer/data/a9b6d82d3/29fc94eb14834861a7b69eb650c2cfe8/FLAGaa48ff910 [2019-12-07 17:17:54,597 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:17:54,597 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_ef215849-80a6-4536-b6c2-614ebd9fb157/sv-benchmarks/c/pthread-wmm/mix047_pso.opt.i [2019-12-07 17:17:54,608 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ef215849-80a6-4536-b6c2-614ebd9fb157/bin/uautomizer/data/a9b6d82d3/29fc94eb14834861a7b69eb650c2cfe8/FLAGaa48ff910 [2019-12-07 17:17:54,618 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_ef215849-80a6-4536-b6c2-614ebd9fb157/bin/uautomizer/data/a9b6d82d3/29fc94eb14834861a7b69eb650c2cfe8 [2019-12-07 17:17:54,619 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:17:54,620 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:17:54,621 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:17:54,621 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:17:54,623 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:17:54,624 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:17:54" (1/1) ... [2019-12-07 17:17:54,626 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@68daf569 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:54, skipping insertion in model container [2019-12-07 17:17:54,626 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:17:54" (1/1) ... [2019-12-07 17:17:54,631 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:17:54,660 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:17:54,901 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:17:54,910 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:17:54,954 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:17:55,016 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:17:55,017 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:55 WrapperNode [2019-12-07 17:17:55,017 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:17:55,017 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:17:55,018 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:17:55,018 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:17:55,024 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:55" (1/1) ... [2019-12-07 17:17:55,040 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:55" (1/1) ... [2019-12-07 17:17:55,068 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:17:55,068 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:17:55,068 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:17:55,068 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:17:55,075 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:55" (1/1) ... [2019-12-07 17:17:55,075 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:55" (1/1) ... [2019-12-07 17:17:55,079 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:55" (1/1) ... [2019-12-07 17:17:55,079 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:55" (1/1) ... [2019-12-07 17:17:55,087 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:55" (1/1) ... [2019-12-07 17:17:55,089 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:55" (1/1) ... [2019-12-07 17:17:55,093 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:55" (1/1) ... [2019-12-07 17:17:55,096 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:17:55,097 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:17:55,097 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:17:55,097 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:17:55,098 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:55" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_ef215849-80a6-4536-b6c2-614ebd9fb157/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:17:55,144 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:17:55,144 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:17:55,144 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:17:55,144 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:17:55,144 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:17:55,144 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:17:55,144 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:17:55,144 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:17:55,145 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:17:55,145 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:17:55,145 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 17:17:55,145 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 17:17:55,145 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:17:55,145 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:17:55,145 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:17:55,146 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:17:55,505 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:17:55,505 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:17:55,506 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:17:55 BoogieIcfgContainer [2019-12-07 17:17:55,506 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:17:55,507 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:17:55,507 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:17:55,509 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:17:55,509 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:17:54" (1/3) ... [2019-12-07 17:17:55,510 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@51960f68 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:17:55, skipping insertion in model container [2019-12-07 17:17:55,510 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:55" (2/3) ... [2019-12-07 17:17:55,510 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@51960f68 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:17:55, skipping insertion in model container [2019-12-07 17:17:55,510 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:17:55" (3/3) ... [2019-12-07 17:17:55,512 INFO L109 eAbstractionObserver]: Analyzing ICFG mix047_pso.opt.i [2019-12-07 17:17:55,518 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:17:55,518 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:17:55,524 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:17:55,525 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:17:55,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,551 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,551 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,552 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,552 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,552 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,552 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,552 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,553 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,553 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,553 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,553 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,554 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,554 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,558 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,558 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,559 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,559 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,559 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,559 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,559 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,559 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,560 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,560 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,560 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,560 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,560 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,560 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,561 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,561 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,561 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,561 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,561 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,561 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,561 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,562 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,562 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,562 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,562 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,562 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,562 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,563 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,563 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,563 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,563 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,563 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,563 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,564 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,578 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 17:17:55,590 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:17:55,591 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:17:55,591 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:17:55,591 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:17:55,591 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:17:55,591 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:17:55,591 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:17:55,591 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:17:55,604 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 180 places, 208 transitions [2019-12-07 17:17:55,605 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 180 places, 208 transitions [2019-12-07 17:17:55,669 INFO L134 PetriNetUnfolder]: 41/204 cut-off events. [2019-12-07 17:17:55,669 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:17:55,679 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 204 events. 41/204 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 480 event pairs. 12/173 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 17:17:55,690 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 180 places, 208 transitions [2019-12-07 17:17:55,724 INFO L134 PetriNetUnfolder]: 41/204 cut-off events. [2019-12-07 17:17:55,724 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:17:55,729 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 204 events. 41/204 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 480 event pairs. 12/173 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 17:17:55,742 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12668 [2019-12-07 17:17:55,743 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:17:58,642 WARN L192 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 17:17:58,768 INFO L206 etLargeBlockEncoding]: Checked pairs total: 49999 [2019-12-07 17:17:58,768 INFO L214 etLargeBlockEncoding]: Total number of compositions: 122 [2019-12-07 17:17:58,771 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 89 places, 95 transitions [2019-12-07 17:18:00,630 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 34566 states. [2019-12-07 17:18:00,631 INFO L276 IsEmpty]: Start isEmpty. Operand 34566 states. [2019-12-07 17:18:00,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 17:18:00,637 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:00,637 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:00,638 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:00,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:00,642 INFO L82 PathProgramCache]: Analyzing trace with hash -1471654446, now seen corresponding path program 1 times [2019-12-07 17:18:00,647 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:00,647 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [896324146] [2019-12-07 17:18:00,647 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:00,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:00,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:00,803 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [896324146] [2019-12-07 17:18:00,803 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:00,803 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:18:00,804 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1100311859] [2019-12-07 17:18:00,807 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:18:00,807 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:00,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:18:00,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:00,818 INFO L87 Difference]: Start difference. First operand 34566 states. Second operand 3 states. [2019-12-07 17:18:01,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:01,146 INFO L93 Difference]: Finished difference Result 34366 states and 145616 transitions. [2019-12-07 17:18:01,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:18:01,147 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 17:18:01,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:01,367 INFO L225 Difference]: With dead ends: 34366 [2019-12-07 17:18:01,367 INFO L226 Difference]: Without dead ends: 33638 [2019-12-07 17:18:01,368 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:01,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33638 states. [2019-12-07 17:18:02,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33638 to 33638. [2019-12-07 17:18:02,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33638 states. [2019-12-07 17:18:02,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33638 states to 33638 states and 142648 transitions. [2019-12-07 17:18:02,347 INFO L78 Accepts]: Start accepts. Automaton has 33638 states and 142648 transitions. Word has length 9 [2019-12-07 17:18:02,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:02,348 INFO L462 AbstractCegarLoop]: Abstraction has 33638 states and 142648 transitions. [2019-12-07 17:18:02,348 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:18:02,348 INFO L276 IsEmpty]: Start isEmpty. Operand 33638 states and 142648 transitions. [2019-12-07 17:18:02,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 17:18:02,353 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:02,353 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:02,353 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:02,354 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:02,354 INFO L82 PathProgramCache]: Analyzing trace with hash 1198985017, now seen corresponding path program 1 times [2019-12-07 17:18:02,354 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:02,354 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644225695] [2019-12-07 17:18:02,354 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:02,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:02,412 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:02,412 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [644225695] [2019-12-07 17:18:02,412 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:02,413 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:18:02,413 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [474228891] [2019-12-07 17:18:02,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:18:02,414 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:02,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:18:02,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:18:02,415 INFO L87 Difference]: Start difference. First operand 33638 states and 142648 transitions. Second operand 4 states. [2019-12-07 17:18:02,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:02,939 INFO L93 Difference]: Finished difference Result 52350 states and 214824 transitions. [2019-12-07 17:18:02,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:18:02,940 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 17:18:02,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:03,160 INFO L225 Difference]: With dead ends: 52350 [2019-12-07 17:18:03,160 INFO L226 Difference]: Without dead ends: 52322 [2019-12-07 17:18:03,160 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:18:03,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52322 states. [2019-12-07 17:18:04,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52322 to 47746. [2019-12-07 17:18:04,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47746 states. [2019-12-07 17:18:04,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47746 states to 47746 states and 197744 transitions. [2019-12-07 17:18:04,327 INFO L78 Accepts]: Start accepts. Automaton has 47746 states and 197744 transitions. Word has length 15 [2019-12-07 17:18:04,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:04,327 INFO L462 AbstractCegarLoop]: Abstraction has 47746 states and 197744 transitions. [2019-12-07 17:18:04,327 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:18:04,327 INFO L276 IsEmpty]: Start isEmpty. Operand 47746 states and 197744 transitions. [2019-12-07 17:18:04,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 17:18:04,329 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:04,329 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:04,329 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:04,329 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:04,330 INFO L82 PathProgramCache]: Analyzing trace with hash -633584, now seen corresponding path program 1 times [2019-12-07 17:18:04,330 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:04,330 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451709617] [2019-12-07 17:18:04,330 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:04,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:04,373 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:04,373 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451709617] [2019-12-07 17:18:04,373 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:04,373 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:18:04,373 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [353030804] [2019-12-07 17:18:04,373 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:18:04,374 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:04,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:18:04,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:18:04,374 INFO L87 Difference]: Start difference. First operand 47746 states and 197744 transitions. Second operand 4 states. [2019-12-07 17:18:04,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:04,850 INFO L93 Difference]: Finished difference Result 59254 states and 242916 transitions. [2019-12-07 17:18:04,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:18:04,851 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 17:18:04,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:04,979 INFO L225 Difference]: With dead ends: 59254 [2019-12-07 17:18:04,979 INFO L226 Difference]: Without dead ends: 59254 [2019-12-07 17:18:04,979 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:18:05,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59254 states. [2019-12-07 17:18:06,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59254 to 52846. [2019-12-07 17:18:06,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52846 states. [2019-12-07 17:18:06,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52846 states to 52846 states and 218200 transitions. [2019-12-07 17:18:06,191 INFO L78 Accepts]: Start accepts. Automaton has 52846 states and 218200 transitions. Word has length 15 [2019-12-07 17:18:06,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:06,191 INFO L462 AbstractCegarLoop]: Abstraction has 52846 states and 218200 transitions. [2019-12-07 17:18:06,191 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:18:06,191 INFO L276 IsEmpty]: Start isEmpty. Operand 52846 states and 218200 transitions. [2019-12-07 17:18:06,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 17:18:06,203 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:06,203 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:06,203 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:06,203 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:06,204 INFO L82 PathProgramCache]: Analyzing trace with hash 254508137, now seen corresponding path program 1 times [2019-12-07 17:18:06,204 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:06,204 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [668641401] [2019-12-07 17:18:06,204 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:06,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:06,262 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:06,263 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [668641401] [2019-12-07 17:18:06,263 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:06,263 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:18:06,263 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [439852014] [2019-12-07 17:18:06,263 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:18:06,264 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:06,264 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:18:06,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:18:06,264 INFO L87 Difference]: Start difference. First operand 52846 states and 218200 transitions. Second operand 5 states. [2019-12-07 17:18:06,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:06,774 INFO L93 Difference]: Finished difference Result 70826 states and 287832 transitions. [2019-12-07 17:18:06,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:18:06,774 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 17:18:06,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:06,929 INFO L225 Difference]: With dead ends: 70826 [2019-12-07 17:18:06,929 INFO L226 Difference]: Without dead ends: 70798 [2019-12-07 17:18:06,929 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:18:07,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70798 states. [2019-12-07 17:18:08,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70798 to 52914. [2019-12-07 17:18:08,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52914 states. [2019-12-07 17:18:08,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52914 states to 52914 states and 218104 transitions. [2019-12-07 17:18:08,238 INFO L78 Accepts]: Start accepts. Automaton has 52914 states and 218104 transitions. Word has length 21 [2019-12-07 17:18:08,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:08,239 INFO L462 AbstractCegarLoop]: Abstraction has 52914 states and 218104 transitions. [2019-12-07 17:18:08,239 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:18:08,239 INFO L276 IsEmpty]: Start isEmpty. Operand 52914 states and 218104 transitions. [2019-12-07 17:18:08,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 17:18:08,270 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:08,270 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:08,270 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:08,270 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:08,270 INFO L82 PathProgramCache]: Analyzing trace with hash 1007840852, now seen corresponding path program 1 times [2019-12-07 17:18:08,271 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:08,271 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2124394658] [2019-12-07 17:18:08,271 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:08,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:08,299 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:08,299 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2124394658] [2019-12-07 17:18:08,300 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:08,300 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:18:08,300 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [196011663] [2019-12-07 17:18:08,300 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:18:08,300 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:08,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:18:08,300 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:08,300 INFO L87 Difference]: Start difference. First operand 52914 states and 218104 transitions. Second operand 3 states. [2019-12-07 17:18:08,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:08,431 INFO L93 Difference]: Finished difference Result 41543 states and 158120 transitions. [2019-12-07 17:18:08,431 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:18:08,431 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 17:18:08,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:08,507 INFO L225 Difference]: With dead ends: 41543 [2019-12-07 17:18:08,507 INFO L226 Difference]: Without dead ends: 41543 [2019-12-07 17:18:08,508 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:08,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41543 states. [2019-12-07 17:18:09,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41543 to 41543. [2019-12-07 17:18:09,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41543 states. [2019-12-07 17:18:09,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41543 states to 41543 states and 158120 transitions. [2019-12-07 17:18:09,359 INFO L78 Accepts]: Start accepts. Automaton has 41543 states and 158120 transitions. Word has length 29 [2019-12-07 17:18:09,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:09,360 INFO L462 AbstractCegarLoop]: Abstraction has 41543 states and 158120 transitions. [2019-12-07 17:18:09,360 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:18:09,360 INFO L276 IsEmpty]: Start isEmpty. Operand 41543 states and 158120 transitions. [2019-12-07 17:18:09,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 17:18:09,381 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:09,382 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:09,382 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:09,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:09,382 INFO L82 PathProgramCache]: Analyzing trace with hash -1153771889, now seen corresponding path program 1 times [2019-12-07 17:18:09,382 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:09,382 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [590631599] [2019-12-07 17:18:09,382 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:09,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:09,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:09,423 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [590631599] [2019-12-07 17:18:09,423 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:09,423 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:18:09,423 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1882990729] [2019-12-07 17:18:09,424 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:18:09,424 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:09,424 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:18:09,424 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:18:09,424 INFO L87 Difference]: Start difference. First operand 41543 states and 158120 transitions. Second operand 4 states. [2019-12-07 17:18:09,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:09,472 INFO L93 Difference]: Finished difference Result 17329 states and 54594 transitions. [2019-12-07 17:18:09,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:18:09,473 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 17:18:09,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:09,493 INFO L225 Difference]: With dead ends: 17329 [2019-12-07 17:18:09,493 INFO L226 Difference]: Without dead ends: 17329 [2019-12-07 17:18:09,493 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:18:09,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17329 states. [2019-12-07 17:18:09,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17329 to 17329. [2019-12-07 17:18:09,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17329 states. [2019-12-07 17:18:09,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17329 states to 17329 states and 54594 transitions. [2019-12-07 17:18:09,736 INFO L78 Accepts]: Start accepts. Automaton has 17329 states and 54594 transitions. Word has length 30 [2019-12-07 17:18:09,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:09,736 INFO L462 AbstractCegarLoop]: Abstraction has 17329 states and 54594 transitions. [2019-12-07 17:18:09,736 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:18:09,736 INFO L276 IsEmpty]: Start isEmpty. Operand 17329 states and 54594 transitions. [2019-12-07 17:18:09,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 17:18:09,744 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:09,744 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:09,744 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:09,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:09,745 INFO L82 PathProgramCache]: Analyzing trace with hash 2070972968, now seen corresponding path program 1 times [2019-12-07 17:18:09,745 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:09,745 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2048617493] [2019-12-07 17:18:09,745 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:09,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:09,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:09,793 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2048617493] [2019-12-07 17:18:09,793 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:09,793 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:18:09,793 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1226371604] [2019-12-07 17:18:09,793 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:18:09,794 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:09,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:18:09,794 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:18:09,794 INFO L87 Difference]: Start difference. First operand 17329 states and 54594 transitions. Second operand 5 states. [2019-12-07 17:18:09,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:09,824 INFO L93 Difference]: Finished difference Result 2957 states and 7512 transitions. [2019-12-07 17:18:09,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:18:09,824 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 17:18:09,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:09,828 INFO L225 Difference]: With dead ends: 2957 [2019-12-07 17:18:09,828 INFO L226 Difference]: Without dead ends: 2957 [2019-12-07 17:18:09,828 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:18:09,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2957 states. [2019-12-07 17:18:09,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2957 to 2957. [2019-12-07 17:18:09,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2957 states. [2019-12-07 17:18:09,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2957 states to 2957 states and 7512 transitions. [2019-12-07 17:18:09,855 INFO L78 Accepts]: Start accepts. Automaton has 2957 states and 7512 transitions. Word has length 31 [2019-12-07 17:18:09,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:09,855 INFO L462 AbstractCegarLoop]: Abstraction has 2957 states and 7512 transitions. [2019-12-07 17:18:09,856 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:18:09,856 INFO L276 IsEmpty]: Start isEmpty. Operand 2957 states and 7512 transitions. [2019-12-07 17:18:09,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 17:18:09,859 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:09,859 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:09,859 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:09,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:09,859 INFO L82 PathProgramCache]: Analyzing trace with hash -1919926116, now seen corresponding path program 1 times [2019-12-07 17:18:09,859 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:09,860 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1978711401] [2019-12-07 17:18:09,860 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:09,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:09,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:09,907 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1978711401] [2019-12-07 17:18:09,907 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:09,907 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:18:09,908 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [844565040] [2019-12-07 17:18:09,908 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:18:09,908 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:09,908 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:18:09,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:18:09,908 INFO L87 Difference]: Start difference. First operand 2957 states and 7512 transitions. Second operand 6 states. [2019-12-07 17:18:09,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:09,936 INFO L93 Difference]: Finished difference Result 1371 states and 3902 transitions. [2019-12-07 17:18:09,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:18:09,936 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-12-07 17:18:09,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:09,938 INFO L225 Difference]: With dead ends: 1371 [2019-12-07 17:18:09,938 INFO L226 Difference]: Without dead ends: 1371 [2019-12-07 17:18:09,938 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:18:09,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1371 states. [2019-12-07 17:18:09,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1371 to 1231. [2019-12-07 17:18:09,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1231 states. [2019-12-07 17:18:09,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1231 states to 1231 states and 3502 transitions. [2019-12-07 17:18:09,952 INFO L78 Accepts]: Start accepts. Automaton has 1231 states and 3502 transitions. Word has length 43 [2019-12-07 17:18:09,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:09,952 INFO L462 AbstractCegarLoop]: Abstraction has 1231 states and 3502 transitions. [2019-12-07 17:18:09,952 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:18:09,952 INFO L276 IsEmpty]: Start isEmpty. Operand 1231 states and 3502 transitions. [2019-12-07 17:18:09,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:18:09,954 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:09,954 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:09,954 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:09,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:09,954 INFO L82 PathProgramCache]: Analyzing trace with hash 593702588, now seen corresponding path program 1 times [2019-12-07 17:18:09,955 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:09,955 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [496670498] [2019-12-07 17:18:09,955 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:09,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:09,993 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:09,993 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [496670498] [2019-12-07 17:18:09,993 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:09,993 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:18:09,993 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [183990529] [2019-12-07 17:18:09,994 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:18:09,994 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:09,994 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:18:09,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:09,994 INFO L87 Difference]: Start difference. First operand 1231 states and 3502 transitions. Second operand 3 states. [2019-12-07 17:18:10,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:10,020 INFO L93 Difference]: Finished difference Result 1239 states and 3510 transitions. [2019-12-07 17:18:10,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:18:10,020 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 17:18:10,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:10,021 INFO L225 Difference]: With dead ends: 1239 [2019-12-07 17:18:10,021 INFO L226 Difference]: Without dead ends: 1239 [2019-12-07 17:18:10,022 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:10,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1239 states. [2019-12-07 17:18:10,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1239 to 1234. [2019-12-07 17:18:10,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1234 states. [2019-12-07 17:18:10,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1234 states to 1234 states and 3505 transitions. [2019-12-07 17:18:10,033 INFO L78 Accepts]: Start accepts. Automaton has 1234 states and 3505 transitions. Word has length 58 [2019-12-07 17:18:10,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:10,034 INFO L462 AbstractCegarLoop]: Abstraction has 1234 states and 3505 transitions. [2019-12-07 17:18:10,034 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:18:10,034 INFO L276 IsEmpty]: Start isEmpty. Operand 1234 states and 3505 transitions. [2019-12-07 17:18:10,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:18:10,035 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:10,036 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:10,036 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:10,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:10,036 INFO L82 PathProgramCache]: Analyzing trace with hash -1128085639, now seen corresponding path program 1 times [2019-12-07 17:18:10,036 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:10,036 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [718039482] [2019-12-07 17:18:10,036 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:10,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:10,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:10,093 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [718039482] [2019-12-07 17:18:10,093 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:10,093 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:18:10,093 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [645798177] [2019-12-07 17:18:10,093 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:18:10,094 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:10,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:18:10,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:10,094 INFO L87 Difference]: Start difference. First operand 1234 states and 3505 transitions. Second operand 3 states. [2019-12-07 17:18:10,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:10,107 INFO L93 Difference]: Finished difference Result 1182 states and 3297 transitions. [2019-12-07 17:18:10,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:18:10,107 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 17:18:10,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:10,109 INFO L225 Difference]: With dead ends: 1182 [2019-12-07 17:18:10,109 INFO L226 Difference]: Without dead ends: 1182 [2019-12-07 17:18:10,109 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:10,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1182 states. [2019-12-07 17:18:10,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1182 to 1182. [2019-12-07 17:18:10,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1182 states. [2019-12-07 17:18:10,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1182 states to 1182 states and 3297 transitions. [2019-12-07 17:18:10,126 INFO L78 Accepts]: Start accepts. Automaton has 1182 states and 3297 transitions. Word has length 58 [2019-12-07 17:18:10,126 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:10,126 INFO L462 AbstractCegarLoop]: Abstraction has 1182 states and 3297 transitions. [2019-12-07 17:18:10,126 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:18:10,126 INFO L276 IsEmpty]: Start isEmpty. Operand 1182 states and 3297 transitions. [2019-12-07 17:18:10,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:18:10,129 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:10,129 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:10,129 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:10,129 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:10,129 INFO L82 PathProgramCache]: Analyzing trace with hash 1714711898, now seen corresponding path program 1 times [2019-12-07 17:18:10,129 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:10,130 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [796040136] [2019-12-07 17:18:10,130 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:10,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:10,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:10,206 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [796040136] [2019-12-07 17:18:10,207 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:10,207 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:18:10,207 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1560385476] [2019-12-07 17:18:10,207 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:18:10,207 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:10,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:18:10,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:18:10,207 INFO L87 Difference]: Start difference. First operand 1182 states and 3297 transitions. Second operand 6 states. [2019-12-07 17:18:10,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:10,388 INFO L93 Difference]: Finished difference Result 1883 states and 5267 transitions. [2019-12-07 17:18:10,388 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 17:18:10,389 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 59 [2019-12-07 17:18:10,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:10,391 INFO L225 Difference]: With dead ends: 1883 [2019-12-07 17:18:10,391 INFO L226 Difference]: Without dead ends: 1883 [2019-12-07 17:18:10,392 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:18:10,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1883 states. [2019-12-07 17:18:10,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1883 to 1691. [2019-12-07 17:18:10,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1691 states. [2019-12-07 17:18:10,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1691 states to 1691 states and 4727 transitions. [2019-12-07 17:18:10,416 INFO L78 Accepts]: Start accepts. Automaton has 1691 states and 4727 transitions. Word has length 59 [2019-12-07 17:18:10,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:10,416 INFO L462 AbstractCegarLoop]: Abstraction has 1691 states and 4727 transitions. [2019-12-07 17:18:10,416 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:18:10,416 INFO L276 IsEmpty]: Start isEmpty. Operand 1691 states and 4727 transitions. [2019-12-07 17:18:10,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:18:10,418 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:10,418 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:10,418 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:10,419 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:10,419 INFO L82 PathProgramCache]: Analyzing trace with hash -240075320, now seen corresponding path program 2 times [2019-12-07 17:18:10,419 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:10,419 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2040595726] [2019-12-07 17:18:10,419 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:10,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:10,472 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:10,472 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2040595726] [2019-12-07 17:18:10,473 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:10,473 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:18:10,473 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [869929236] [2019-12-07 17:18:10,473 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:18:10,473 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:10,473 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:18:10,473 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:10,473 INFO L87 Difference]: Start difference. First operand 1691 states and 4727 transitions. Second operand 3 states. [2019-12-07 17:18:10,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:10,505 INFO L93 Difference]: Finished difference Result 1691 states and 4726 transitions. [2019-12-07 17:18:10,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:18:10,505 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 17:18:10,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:10,508 INFO L225 Difference]: With dead ends: 1691 [2019-12-07 17:18:10,508 INFO L226 Difference]: Without dead ends: 1691 [2019-12-07 17:18:10,508 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:10,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1691 states. [2019-12-07 17:18:10,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1691 to 1182. [2019-12-07 17:18:10,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1182 states. [2019-12-07 17:18:10,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1182 states to 1182 states and 3296 transitions. [2019-12-07 17:18:10,529 INFO L78 Accepts]: Start accepts. Automaton has 1182 states and 3296 transitions. Word has length 59 [2019-12-07 17:18:10,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:10,529 INFO L462 AbstractCegarLoop]: Abstraction has 1182 states and 3296 transitions. [2019-12-07 17:18:10,529 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:18:10,529 INFO L276 IsEmpty]: Start isEmpty. Operand 1182 states and 3296 transitions. [2019-12-07 17:18:10,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:18:10,531 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:10,531 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:10,531 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:10,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:10,531 INFO L82 PathProgramCache]: Analyzing trace with hash 1978644192, now seen corresponding path program 1 times [2019-12-07 17:18:10,531 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:10,531 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [607284405] [2019-12-07 17:18:10,531 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:10,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:10,619 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:10,620 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [607284405] [2019-12-07 17:18:10,620 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:10,620 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:18:10,620 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1876563345] [2019-12-07 17:18:10,620 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:18:10,620 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:10,620 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:18:10,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:18:10,621 INFO L87 Difference]: Start difference. First operand 1182 states and 3296 transitions. Second operand 6 states. [2019-12-07 17:18:10,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:10,665 INFO L93 Difference]: Finished difference Result 1675 states and 4400 transitions. [2019-12-07 17:18:10,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:18:10,665 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-12-07 17:18:10,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:10,667 INFO L225 Difference]: With dead ends: 1675 [2019-12-07 17:18:10,667 INFO L226 Difference]: Without dead ends: 1056 [2019-12-07 17:18:10,667 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:18:10,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1056 states. [2019-12-07 17:18:10,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1056 to 1056. [2019-12-07 17:18:10,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1056 states. [2019-12-07 17:18:10,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1056 states to 1056 states and 2872 transitions. [2019-12-07 17:18:10,678 INFO L78 Accepts]: Start accepts. Automaton has 1056 states and 2872 transitions. Word has length 60 [2019-12-07 17:18:10,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:10,678 INFO L462 AbstractCegarLoop]: Abstraction has 1056 states and 2872 transitions. [2019-12-07 17:18:10,679 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:18:10,679 INFO L276 IsEmpty]: Start isEmpty. Operand 1056 states and 2872 transitions. [2019-12-07 17:18:10,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:18:10,680 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:10,681 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:10,681 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:10,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:10,681 INFO L82 PathProgramCache]: Analyzing trace with hash 1465585068, now seen corresponding path program 2 times [2019-12-07 17:18:10,681 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:10,681 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1469451525] [2019-12-07 17:18:10,681 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:10,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:10,777 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:10,777 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1469451525] [2019-12-07 17:18:10,777 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:10,777 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:18:10,778 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1396428665] [2019-12-07 17:18:10,778 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:18:10,778 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:10,778 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:18:10,778 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:18:10,778 INFO L87 Difference]: Start difference. First operand 1056 states and 2872 transitions. Second operand 6 states. [2019-12-07 17:18:10,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:10,840 INFO L93 Difference]: Finished difference Result 1825 states and 4561 transitions. [2019-12-07 17:18:10,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:18:10,840 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-12-07 17:18:10,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:10,841 INFO L225 Difference]: With dead ends: 1825 [2019-12-07 17:18:10,841 INFO L226 Difference]: Without dead ends: 1009 [2019-12-07 17:18:10,842 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:18:10,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1009 states. [2019-12-07 17:18:10,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1009 to 777. [2019-12-07 17:18:10,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 777 states. [2019-12-07 17:18:10,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 777 states to 777 states and 1851 transitions. [2019-12-07 17:18:10,850 INFO L78 Accepts]: Start accepts. Automaton has 777 states and 1851 transitions. Word has length 60 [2019-12-07 17:18:10,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:10,851 INFO L462 AbstractCegarLoop]: Abstraction has 777 states and 1851 transitions. [2019-12-07 17:18:10,851 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:18:10,851 INFO L276 IsEmpty]: Start isEmpty. Operand 777 states and 1851 transitions. [2019-12-07 17:18:10,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:18:10,852 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:10,852 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:10,852 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:10,852 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:10,852 INFO L82 PathProgramCache]: Analyzing trace with hash -665728346, now seen corresponding path program 3 times [2019-12-07 17:18:10,852 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:10,852 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1195164059] [2019-12-07 17:18:10,852 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:10,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:10,939 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:10,939 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1195164059] [2019-12-07 17:18:10,940 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:10,940 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:18:10,940 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [775083961] [2019-12-07 17:18:10,940 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:18:10,940 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:10,940 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:18:10,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:18:10,941 INFO L87 Difference]: Start difference. First operand 777 states and 1851 transitions. Second operand 6 states. [2019-12-07 17:18:10,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:10,997 INFO L93 Difference]: Finished difference Result 1212 states and 2871 transitions. [2019-12-07 17:18:10,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:18:10,997 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-12-07 17:18:10,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:10,998 INFO L225 Difference]: With dead ends: 1212 [2019-12-07 17:18:10,998 INFO L226 Difference]: Without dead ends: 264 [2019-12-07 17:18:10,998 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:18:10,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 264 states. [2019-12-07 17:18:11,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 264 to 232. [2019-12-07 17:18:11,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2019-12-07 17:18:11,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 410 transitions. [2019-12-07 17:18:11,000 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 410 transitions. Word has length 60 [2019-12-07 17:18:11,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:11,000 INFO L462 AbstractCegarLoop]: Abstraction has 232 states and 410 transitions. [2019-12-07 17:18:11,000 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:18:11,000 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 410 transitions. [2019-12-07 17:18:11,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:18:11,001 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:11,001 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:11,001 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:11,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:11,001 INFO L82 PathProgramCache]: Analyzing trace with hash 1097199394, now seen corresponding path program 4 times [2019-12-07 17:18:11,001 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:11,001 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [687614887] [2019-12-07 17:18:11,002 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:11,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:11,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:11,566 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [687614887] [2019-12-07 17:18:11,566 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:11,567 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 17:18:11,567 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [345562164] [2019-12-07 17:18:11,567 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 17:18:11,567 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:11,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 17:18:11,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=374, Unknown=0, NotChecked=0, Total=462 [2019-12-07 17:18:11,568 INFO L87 Difference]: Start difference. First operand 232 states and 410 transitions. Second operand 22 states. [2019-12-07 17:18:12,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:12,338 INFO L93 Difference]: Finished difference Result 502 states and 879 transitions. [2019-12-07 17:18:12,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 17:18:12,338 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 60 [2019-12-07 17:18:12,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:12,339 INFO L225 Difference]: With dead ends: 502 [2019-12-07 17:18:12,339 INFO L226 Difference]: Without dead ends: 474 [2019-12-07 17:18:12,340 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 277 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=261, Invalid=1145, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 17:18:12,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 474 states. [2019-12-07 17:18:12,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 474 to 302. [2019-12-07 17:18:12,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 302 states. [2019-12-07 17:18:12,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 302 states to 302 states and 526 transitions. [2019-12-07 17:18:12,342 INFO L78 Accepts]: Start accepts. Automaton has 302 states and 526 transitions. Word has length 60 [2019-12-07 17:18:12,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:12,343 INFO L462 AbstractCegarLoop]: Abstraction has 302 states and 526 transitions. [2019-12-07 17:18:12,343 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 17:18:12,343 INFO L276 IsEmpty]: Start isEmpty. Operand 302 states and 526 transitions. [2019-12-07 17:18:12,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:18:12,343 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:12,343 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:12,343 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:12,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:12,343 INFO L82 PathProgramCache]: Analyzing trace with hash -354201650, now seen corresponding path program 5 times [2019-12-07 17:18:12,344 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:12,344 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085594843] [2019-12-07 17:18:12,344 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:12,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:12,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:12,540 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2085594843] [2019-12-07 17:18:12,540 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:12,540 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:18:12,540 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [113498907] [2019-12-07 17:18:12,540 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:18:12,540 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:12,541 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:18:12,541 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:18:12,541 INFO L87 Difference]: Start difference. First operand 302 states and 526 transitions. Second operand 14 states. [2019-12-07 17:18:12,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:12,901 INFO L93 Difference]: Finished difference Result 484 states and 831 transitions. [2019-12-07 17:18:12,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:18:12,901 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 60 [2019-12-07 17:18:12,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:12,902 INFO L225 Difference]: With dead ends: 484 [2019-12-07 17:18:12,902 INFO L226 Difference]: Without dead ends: 456 [2019-12-07 17:18:12,902 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=106, Invalid=494, Unknown=0, NotChecked=0, Total=600 [2019-12-07 17:18:12,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 456 states. [2019-12-07 17:18:12,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 456 to 332. [2019-12-07 17:18:12,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 332 states. [2019-12-07 17:18:12,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 332 states to 332 states and 581 transitions. [2019-12-07 17:18:12,905 INFO L78 Accepts]: Start accepts. Automaton has 332 states and 581 transitions. Word has length 60 [2019-12-07 17:18:12,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:12,906 INFO L462 AbstractCegarLoop]: Abstraction has 332 states and 581 transitions. [2019-12-07 17:18:12,906 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:18:12,906 INFO L276 IsEmpty]: Start isEmpty. Operand 332 states and 581 transitions. [2019-12-07 17:18:12,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:18:12,906 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:12,907 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:12,907 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:12,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:12,907 INFO L82 PathProgramCache]: Analyzing trace with hash -2140500766, now seen corresponding path program 6 times [2019-12-07 17:18:12,907 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:12,907 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2027599214] [2019-12-07 17:18:12,907 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:12,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:13,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:13,095 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2027599214] [2019-12-07 17:18:13,095 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:13,095 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:18:13,095 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1749910001] [2019-12-07 17:18:13,095 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:18:13,096 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:13,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:18:13,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:18:13,096 INFO L87 Difference]: Start difference. First operand 332 states and 581 transitions. Second operand 14 states. [2019-12-07 17:18:13,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:13,400 INFO L93 Difference]: Finished difference Result 446 states and 758 transitions. [2019-12-07 17:18:13,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 17:18:13,400 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 60 [2019-12-07 17:18:13,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:13,400 INFO L225 Difference]: With dead ends: 446 [2019-12-07 17:18:13,400 INFO L226 Difference]: Without dead ends: 418 [2019-12-07 17:18:13,401 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=130, Invalid=520, Unknown=0, NotChecked=0, Total=650 [2019-12-07 17:18:13,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 418 states. [2019-12-07 17:18:13,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 418 to 340. [2019-12-07 17:18:13,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 340 states. [2019-12-07 17:18:13,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 595 transitions. [2019-12-07 17:18:13,404 INFO L78 Accepts]: Start accepts. Automaton has 340 states and 595 transitions. Word has length 60 [2019-12-07 17:18:13,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:13,404 INFO L462 AbstractCegarLoop]: Abstraction has 340 states and 595 transitions. [2019-12-07 17:18:13,404 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:18:13,404 INFO L276 IsEmpty]: Start isEmpty. Operand 340 states and 595 transitions. [2019-12-07 17:18:13,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:18:13,404 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:13,405 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:13,405 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:13,405 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:13,405 INFO L82 PathProgramCache]: Analyzing trace with hash -1858118138, now seen corresponding path program 7 times [2019-12-07 17:18:13,405 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:13,405 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [784003833] [2019-12-07 17:18:13,405 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:13,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:18:13,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:18:13,481 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:18:13,481 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:18:13,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] ULTIMATE.startENTRY-->L831: Formula: (let ((.cse0 (store |v_#valid_75| 0 0))) (and (= 0 v_~z$flush_delayed~0_54) (= |v_#NULL.offset_7| 0) (= v_~z$w_buff1_used~0_609 0) (= 0 v_~z$r_buff1_thd3~0_278) (= v_~z$w_buff0_used~0_830 0) (= v_~z$r_buff0_thd1~0_77 0) (= v_~x~0_53 0) (< 0 |v_#StackHeapBarrier_21|) (= (select .cse0 |v_ULTIMATE.start_main_~#t1261~0.base_21|) 0) (= v_~z$w_buff0~0_376 0) (= 0 |v_ULTIMATE.start_main_~#t1261~0.offset_17|) (= v_~z$r_buff0_thd0~0_415 0) (= v_~z$read_delayed~0_5 0) (= 0 v_~weak$$choice0~0_32) (= v_~z$read_delayed_var~0.base_5 0) (= v_~z$w_buff1~0_367 0) (= v_~weak$$choice2~0_172 0) (= v_~z$r_buff1_thd2~0_207 0) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t1261~0.base_21| 4)) (= v_~z$r_buff1_thd1~0_207 0) (= |v_#valid_73| (store .cse0 |v_ULTIMATE.start_main_~#t1261~0.base_21| 1)) (= v_~z$read_delayed_var~0.offset_5 0) (= v_~y~0_52 0) (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1261~0.base_21| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1261~0.base_21|) |v_ULTIMATE.start_main_~#t1261~0.offset_17| 0))) (= 0 v_~z$r_buff1_thd4~0_260) (= v_~z$mem_tmp~0_37 0) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1261~0.base_21|) (= 0 v_~z$r_buff0_thd3~0_189) (= v_~__unbuffered_cnt~0_145 0) (= 0 |v_#NULL.base_7|) (= v_~main$tmp_guard0~0_21 0) (= v_~z~0_157 0) (= v_~a~0_207 0) (= 0 v_~z$r_buff0_thd4~0_332) (= 0 v_~__unbuffered_p3_EBX~0_219) (= v_~z$r_buff0_thd2~0_78 0) (= v_~main$tmp_guard1~0_24 0) (= v_~z$r_buff1_thd0~0_431 0) (= v_~b~0_98 0) (= v_~__unbuffered_p3_EAX~0_219 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_24|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_42|, ULTIMATE.start_main_~#t1263~0.offset=|v_ULTIMATE.start_main_~#t1263~0.offset_18|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_207, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_72|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_33|, ULTIMATE.start_main_~#t1262~0.base=|v_ULTIMATE.start_main_~#t1262~0.base_23|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_40|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_35|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_134|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_39|, ~a~0=v_~a~0_207, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_415, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_332, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_219, #length=|v_#length_29|, ~z$mem_tmp~0=v_~z$mem_tmp~0_37, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_66|, ULTIMATE.start_main_~#t1264~0.base=|v_ULTIMATE.start_main_~#t1264~0.base_23|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_609, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ~z$flush_delayed~0=v_~z$flush_delayed~0_54, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_52|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_76|, ~weak$$choice0~0=v_~weak$$choice0~0_32, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_40|, ULTIMATE.start_main_~#t1264~0.offset=|v_ULTIMATE.start_main_~#t1264~0.offset_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_207, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_9|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_5, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_189, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_145, ~x~0=v_~x~0_53, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_260, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ~z$read_delayed~0=v_~z$read_delayed~0_5, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_42|, ~z$w_buff1~0=v_~z$w_buff1~0_367, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_30|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_5, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_44|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_34|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_42|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_48|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_431, ULTIMATE.start_main_~#t1262~0.offset=|v_ULTIMATE.start_main_~#t1262~0.offset_18|, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_56|, ~y~0=v_~y~0_52, ULTIMATE.start_main_~#t1263~0.base=|v_ULTIMATE.start_main_~#t1263~0.base_22|, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_78, ULTIMATE.start_main_~#t1261~0.base=|v_ULTIMATE.start_main_~#t1261~0.base_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_830, ~z$w_buff0~0=v_~z$w_buff0~0_376, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_30|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_56|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_278, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_82|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_219, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_55|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_70|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_34|, ~b~0=v_~b~0_98, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ULTIMATE.start_main_~#t1261~0.offset=|v_ULTIMATE.start_main_~#t1261~0.offset_17|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_9|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_20|, ~z~0=v_~z~0_157, ~weak$$choice2~0=v_~weak$$choice2~0_172, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_77} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1263~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1262~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_~#t1264~0.base, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t1264~0.offset, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1262~0.offset, ULTIMATE.start_main_#t~nondet26, ~y~0, ULTIMATE.start_main_~#t1263~0.base, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1261~0.base, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ~b~0, ULTIMATE.start_main_#res, ULTIMATE.start_main_~#t1261~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:18:13,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L831-1-->L833: Formula: (and (= |v_ULTIMATE.start_main_~#t1262~0.offset_11| 0) (= (store |v_#valid_45| |v_ULTIMATE.start_main_~#t1262~0.base_13| 1) |v_#valid_44|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1262~0.base_13|) (= (select |v_#valid_45| |v_ULTIMATE.start_main_~#t1262~0.base_13|) 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1262~0.base_13| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1262~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1262~0.base_13|) |v_ULTIMATE.start_main_~#t1262~0.offset_11| 1)) |v_#memory_int_15|) (not (= 0 |v_ULTIMATE.start_main_~#t1262~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_16|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1262~0.base=|v_ULTIMATE.start_main_~#t1262~0.base_13|, ULTIMATE.start_main_~#t1262~0.offset=|v_ULTIMATE.start_main_~#t1262~0.offset_11|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, #length=|v_#length_21|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t1262~0.base, ULTIMATE.start_main_~#t1262~0.offset, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-12-07 17:18:13,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L833-1-->L835: Formula: (and (= |v_ULTIMATE.start_main_~#t1263~0.offset_10| 0) (= (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1263~0.base_11| 1) |v_#valid_40|) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t1263~0.base_11| 4)) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1263~0.base_11|) 0) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1263~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1263~0.base_11|) |v_ULTIMATE.start_main_~#t1263~0.offset_10| 2))) (not (= |v_ULTIMATE.start_main_~#t1263~0.base_11| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1263~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1263~0.offset=|v_ULTIMATE.start_main_~#t1263~0.offset_10|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_6|, #length=|v_#length_19|, ULTIMATE.start_main_~#t1263~0.base=|v_ULTIMATE.start_main_~#t1263~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1263~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1263~0.base] because there is no mapped edge [2019-12-07 17:18:13,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L835-1-->L837: Formula: (and (= |v_ULTIMATE.start_main_~#t1264~0.offset_11| 0) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1264~0.base_13|) 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1264~0.base_13| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1264~0.base_13|) |v_ULTIMATE.start_main_~#t1264~0.offset_11| 3)) |v_#memory_int_17|) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1264~0.base_13|) (= (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1264~0.base_13| 1) |v_#valid_46|) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1264~0.base_13| 4)) (not (= 0 |v_ULTIMATE.start_main_~#t1264~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1264~0.base=|v_ULTIMATE.start_main_~#t1264~0.base_13|, ULTIMATE.start_main_~#t1264~0.offset=|v_ULTIMATE.start_main_~#t1264~0.offset_11|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, #length=|v_#length_23|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1264~0.base, ULTIMATE.start_main_~#t1264~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17] because there is no mapped edge [2019-12-07 17:18:13,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L4-->L808: Formula: (and (= v_~z$r_buff0_thd4~0_36 1) (= v_~z$r_buff1_thd2~0_8 v_~z$r_buff0_thd2~0_7) (= v_~z$r_buff0_thd0~0_114 v_~z$r_buff1_thd0~0_75) (= 1 v_~a~0_7) (= v_~z$r_buff0_thd4~0_37 v_~z$r_buff1_thd4~0_34) (= v_~__unbuffered_p3_EAX~0_8 v_~a~0_7) (= v_~z$r_buff1_thd1~0_8 v_~z$r_buff0_thd1~0_7) (= v_~z$r_buff0_thd3~0_42 v_~z$r_buff1_thd3~0_34) (= v_~b~0_17 v_~__unbuffered_p3_EBX~0_8) (not (= v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_16 0))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_16, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_114, ~b~0=v_~b~0_17, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_37, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_42, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_7, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_7} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_16, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_34, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_34, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_8, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_8, ~a~0=v_~a~0_7, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_114, ~b~0=v_~b~0_17, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_75, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_8, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_8, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_36, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_42, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_7, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_7} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 17:18:13,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_9|) (= v_~b~0_62 1) (= |v_P0Thread1of1ForFork0_#res.offset_9| 0) (= v_P0Thread1of1ForFork0_~arg.offset_19 |v_P0Thread1of1ForFork0_#in~arg.offset_21|) (= v_P0Thread1of1ForFork0_~arg.base_19 |v_P0Thread1of1ForFork0_#in~arg.base_21|) (= v_~__unbuffered_cnt~0_119 (+ v_~__unbuffered_cnt~0_120 1)) (= v_~x~0_42 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_120} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_9|, ~b~0=v_~b~0_62, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_119, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_19, ~x~0=v_~x~0_42, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_19} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, ~x~0, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:18:13,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_12 |v_P1Thread1of1ForFork1_#in~arg.base_14|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_14| v_P1Thread1of1ForFork1_~arg.offset_12) (= v_~y~0_33 1) (= v_~x~0_29 2) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_12, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_12, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, ~y~0=v_~y~0_33, ~x~0=v_~x~0_29, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~y~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:18:13,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L809-->L809-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-919336315 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd4~0_In-919336315 256) 0))) (or (and (not .cse0) (not .cse1) (= |P3Thread1of1ForFork3_#t~ite11_Out-919336315| 0)) (and (or .cse1 .cse0) (= |P3Thread1of1ForFork3_#t~ite11_Out-919336315| ~z$w_buff0_used~0_In-919336315)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-919336315, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-919336315} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-919336315, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-919336315, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out-919336315|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 17:18:13,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L810-->L810-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In1646465612 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd4~0_In1646465612 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd4~0_In1646465612 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1646465612 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork3_#t~ite12_Out1646465612| 0)) (and (= ~z$w_buff1_used~0_In1646465612 |P3Thread1of1ForFork3_#t~ite12_Out1646465612|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1646465612, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1646465612, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1646465612, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1646465612} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1646465612, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1646465612, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1646465612, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1646465612, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out1646465612|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 17:18:13,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L772-2-->L772-4: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd3~0_In-1200669133 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1200669133 256) 0))) (or (and (not .cse0) (= ~z$w_buff1~0_In-1200669133 |P2Thread1of1ForFork2_#t~ite3_Out-1200669133|) (not .cse1)) (and (= ~z~0_In-1200669133 |P2Thread1of1ForFork2_#t~ite3_Out-1200669133|) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1200669133, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1200669133, ~z$w_buff1~0=~z$w_buff1~0_In-1200669133, ~z~0=~z~0_In-1200669133} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-1200669133|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1200669133, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1200669133, ~z$w_buff1~0=~z$w_buff1~0_In-1200669133, ~z~0=~z~0_In-1200669133} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 17:18:13,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [663] [663] L772-4-->L773: Formula: (= v_~z~0_32 |v_P2Thread1of1ForFork2_#t~ite3_8|) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_8|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_13|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_7|, ~z~0=v_~z~0_32} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 17:18:13,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L773-->L773-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1155127422 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1155127422 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite5_Out-1155127422|)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-1155127422 |P2Thread1of1ForFork2_#t~ite5_Out-1155127422|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1155127422, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1155127422} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1155127422|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1155127422, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1155127422} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 17:18:13,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L774-->L774-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In319955123 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In319955123 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In319955123 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In319955123 256) 0))) (or (and (= ~z$w_buff1_used~0_In319955123 |P2Thread1of1ForFork2_#t~ite6_Out319955123|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite6_Out319955123| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In319955123, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In319955123, ~z$w_buff1_used~0=~z$w_buff1_used~0_In319955123, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In319955123} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out319955123|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In319955123, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In319955123, ~z$w_buff1_used~0=~z$w_buff1_used~0_In319955123, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In319955123} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 17:18:13,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L775-->L775-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1451612299 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1451612299 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite7_Out1451612299| ~z$r_buff0_thd3~0_In1451612299) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite7_Out1451612299| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1451612299, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1451612299} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1451612299, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1451612299, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out1451612299|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 17:18:13,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L776-->L776-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In1287607330 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1287607330 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1287607330 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1287607330 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite8_Out1287607330| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork2_#t~ite8_Out1287607330| ~z$r_buff1_thd3~0_In1287607330) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1287607330, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1287607330, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1287607330, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1287607330} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1287607330, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1287607330, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1287607330, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1287607330, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out1287607330|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:18:13,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L776-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_34| v_~z$r_buff1_thd3~0_64) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_34|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_64, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_33|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:18:13,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L811-->L812: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In-1089237804 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1089237804 256))) (.cse1 (= ~z$r_buff0_thd4~0_Out-1089237804 ~z$r_buff0_thd4~0_In-1089237804))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= ~z$r_buff0_thd4~0_Out-1089237804 0)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1089237804, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1089237804} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1089237804, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-1089237804, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out-1089237804|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 17:18:13,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In744996408 256))) (.cse1 (= (mod ~z$r_buff0_thd4~0_In744996408 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd4~0_In744996408 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In744996408 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P3Thread1of1ForFork3_#t~ite14_Out744996408| ~z$r_buff1_thd4~0_In744996408)) (and (= |P3Thread1of1ForFork3_#t~ite14_Out744996408| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In744996408, ~z$w_buff0_used~0=~z$w_buff0_used~0_In744996408, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In744996408, ~z$w_buff1_used~0=~z$w_buff1_used~0_In744996408} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In744996408, ~z$w_buff0_used~0=~z$w_buff0_used~0_In744996408, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out744996408|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In744996408, ~z$w_buff1_used~0=~z$w_buff1_used~0_In744996408} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 17:18:13,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L812-2-->P3EXIT: Formula: (and (= v_~__unbuffered_cnt~0_107 (+ v_~__unbuffered_cnt~0_108 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|) (= |v_P3Thread1of1ForFork3_#t~ite14_44| v_~z$r_buff1_thd4~0_75)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_44|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_108} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_75, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_43|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_107, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 17:18:13,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L837-1-->L843: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_62) 1 0)) 0 1) v_~main$tmp_guard0~0_8)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_8|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 17:18:13,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L843-2-->L843-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite20_Out2140371476| |ULTIMATE.start_main_#t~ite19_Out2140371476|)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In2140371476 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In2140371476 256)))) (or (and (not .cse0) (not .cse1) .cse2 (= ~z$w_buff1~0_In2140371476 |ULTIMATE.start_main_#t~ite19_Out2140371476|)) (and .cse2 (= ~z~0_In2140371476 |ULTIMATE.start_main_#t~ite19_Out2140371476|) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2140371476, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2140371476, ~z$w_buff1~0=~z$w_buff1~0_In2140371476, ~z~0=~z~0_In2140371476} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out2140371476|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2140371476, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2140371476, ~z$w_buff1~0=~z$w_buff1~0_In2140371476, ~z~0=~z~0_In2140371476, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out2140371476|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:18:13,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L844-->L844-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1300821445 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1300821445 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out1300821445| ~z$w_buff0_used~0_In1300821445) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite21_Out1300821445| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1300821445, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1300821445} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1300821445, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1300821445, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1300821445|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:18:13,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L845-->L845-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In25526337 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In25526337 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In25526337 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In25526337 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In25526337 |ULTIMATE.start_main_#t~ite22_Out25526337|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite22_Out25526337| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In25526337, ~z$w_buff0_used~0=~z$w_buff0_used~0_In25526337, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In25526337, ~z$w_buff1_used~0=~z$w_buff1_used~0_In25526337} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In25526337, ~z$w_buff0_used~0=~z$w_buff0_used~0_In25526337, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In25526337, ~z$w_buff1_used~0=~z$w_buff1_used~0_In25526337, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out25526337|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:18:13,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L846-->L846-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-644675241 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-644675241 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite23_Out-644675241|)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd0~0_In-644675241 |ULTIMATE.start_main_#t~ite23_Out-644675241|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-644675241, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-644675241} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-644675241, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-644675241, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-644675241|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:18:13,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L847-->L847-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In869144495 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In869144495 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In869144495 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In869144495 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite24_Out869144495| 0)) (and (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite24_Out869144495| ~z$r_buff1_thd0~0_In869144495) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In869144495, ~z$w_buff0_used~0=~z$w_buff0_used~0_In869144495, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In869144495, ~z$w_buff1_used~0=~z$w_buff1_used~0_In869144495} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In869144495, ~z$w_buff0_used~0=~z$w_buff0_used~0_In869144495, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In869144495, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out869144495|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In869144495} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 17:18:13,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L855-->L855-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-1386181147 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1386181147 256)))) (or (and .cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1386181147 256))) (= (mod ~z$w_buff0_used~0_In-1386181147 256) 0) (and (= 0 (mod ~z$w_buff1_used~0_In-1386181147 256)) .cse0))) .cse1 (= ~z$w_buff0~0_In-1386181147 |ULTIMATE.start_main_#t~ite30_Out-1386181147|) (= |ULTIMATE.start_main_#t~ite31_Out-1386181147| |ULTIMATE.start_main_#t~ite30_Out-1386181147|)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite30_In-1386181147| |ULTIMATE.start_main_#t~ite30_Out-1386181147|) (= ~z$w_buff0~0_In-1386181147 |ULTIMATE.start_main_#t~ite31_Out-1386181147|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1386181147, ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_In-1386181147|, ~z$w_buff0~0=~z$w_buff0~0_In-1386181147, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1386181147, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1386181147, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1386181147, ~weak$$choice2~0=~weak$$choice2~0_In-1386181147} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1386181147, ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-1386181147|, ~z$w_buff0~0=~z$w_buff0~0_In-1386181147, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1386181147, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1386181147, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1386181147, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-1386181147|, ~weak$$choice2~0=~weak$$choice2~0_In-1386181147} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite31] because there is no mapped edge [2019-12-07 17:18:13,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L856-->L856-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-856306625 256) 0))) (or (and .cse0 (= ~z$w_buff1~0_In-856306625 |ULTIMATE.start_main_#t~ite33_Out-856306625|) (= |ULTIMATE.start_main_#t~ite33_Out-856306625| |ULTIMATE.start_main_#t~ite34_Out-856306625|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-856306625 256)))) (or (and (= 0 (mod ~z$r_buff1_thd0~0_In-856306625 256)) .cse1) (and (= (mod ~z$w_buff1_used~0_In-856306625 256) 0) .cse1) (= 0 (mod ~z$w_buff0_used~0_In-856306625 256))))) (and (= ~z$w_buff1~0_In-856306625 |ULTIMATE.start_main_#t~ite34_Out-856306625|) (= |ULTIMATE.start_main_#t~ite33_In-856306625| |ULTIMATE.start_main_#t~ite33_Out-856306625|) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-856306625, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-856306625, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-856306625, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-856306625, ~z$w_buff1~0=~z$w_buff1~0_In-856306625, ~weak$$choice2~0=~weak$$choice2~0_In-856306625, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_In-856306625|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-856306625, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-856306625, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-856306625, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-856306625, ~z$w_buff1~0=~z$w_buff1~0_In-856306625, ~weak$$choice2~0=~weak$$choice2~0_In-856306625, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out-856306625|, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_Out-856306625|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_#t~ite34] because there is no mapped edge [2019-12-07 17:18:13,493 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L859-->L860: Formula: (and (= v_~z$r_buff0_thd0~0_108 v_~z$r_buff0_thd0~0_107) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_108, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_107, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_9|, ~weak$$choice2~0=v_~weak$$choice2~0_33, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:18:13,493 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-614570380 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite46_Out-614570380| ~z$r_buff1_thd0~0_In-614570380) (= |ULTIMATE.start_main_#t~ite45_In-614570380| |ULTIMATE.start_main_#t~ite45_Out-614570380|)) (and (= ~z$r_buff1_thd0~0_In-614570380 |ULTIMATE.start_main_#t~ite45_Out-614570380|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-614570380 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In-614570380 256)) (and .cse1 (= (mod ~z$r_buff1_thd0~0_In-614570380 256) 0)) (and (= (mod ~z$w_buff1_used~0_In-614570380 256) 0) .cse1))) (= |ULTIMATE.start_main_#t~ite46_Out-614570380| |ULTIMATE.start_main_#t~ite45_Out-614570380|) .cse0))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-614570380, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-614570380, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-614570380, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-614570380, ~weak$$choice2~0=~weak$$choice2~0_In-614570380, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In-614570380|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-614570380, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-614570380, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-614570380, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-614570380, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-614570380|, ~weak$$choice2~0=~weak$$choice2~0_In-614570380, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-614570380|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 17:18:13,494 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L862-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5| (mod v_~main$tmp_guard1~0_8 256)) (not (= 0 (mod v_~z$flush_delayed~0_30 256))) (= v_~z$mem_tmp~0_20 v_~z~0_83) (= 0 v_~z$flush_delayed~0_29)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_8, ~z$flush_delayed~0=v_~z$flush_delayed~0_30} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_20, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_17|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_8, ~z$flush_delayed~0=v_~z$flush_delayed~0_29, ~z~0=v_~z~0_83, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:18:13,494 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:18:13,550 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:18:13 BasicIcfg [2019-12-07 17:18:13,550 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:18:13,550 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:18:13,550 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:18:13,550 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:18:13,550 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:17:55" (3/4) ... [2019-12-07 17:18:13,552 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:18:13,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] ULTIMATE.startENTRY-->L831: Formula: (let ((.cse0 (store |v_#valid_75| 0 0))) (and (= 0 v_~z$flush_delayed~0_54) (= |v_#NULL.offset_7| 0) (= v_~z$w_buff1_used~0_609 0) (= 0 v_~z$r_buff1_thd3~0_278) (= v_~z$w_buff0_used~0_830 0) (= v_~z$r_buff0_thd1~0_77 0) (= v_~x~0_53 0) (< 0 |v_#StackHeapBarrier_21|) (= (select .cse0 |v_ULTIMATE.start_main_~#t1261~0.base_21|) 0) (= v_~z$w_buff0~0_376 0) (= 0 |v_ULTIMATE.start_main_~#t1261~0.offset_17|) (= v_~z$r_buff0_thd0~0_415 0) (= v_~z$read_delayed~0_5 0) (= 0 v_~weak$$choice0~0_32) (= v_~z$read_delayed_var~0.base_5 0) (= v_~z$w_buff1~0_367 0) (= v_~weak$$choice2~0_172 0) (= v_~z$r_buff1_thd2~0_207 0) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t1261~0.base_21| 4)) (= v_~z$r_buff1_thd1~0_207 0) (= |v_#valid_73| (store .cse0 |v_ULTIMATE.start_main_~#t1261~0.base_21| 1)) (= v_~z$read_delayed_var~0.offset_5 0) (= v_~y~0_52 0) (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1261~0.base_21| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1261~0.base_21|) |v_ULTIMATE.start_main_~#t1261~0.offset_17| 0))) (= 0 v_~z$r_buff1_thd4~0_260) (= v_~z$mem_tmp~0_37 0) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1261~0.base_21|) (= 0 v_~z$r_buff0_thd3~0_189) (= v_~__unbuffered_cnt~0_145 0) (= 0 |v_#NULL.base_7|) (= v_~main$tmp_guard0~0_21 0) (= v_~z~0_157 0) (= v_~a~0_207 0) (= 0 v_~z$r_buff0_thd4~0_332) (= 0 v_~__unbuffered_p3_EBX~0_219) (= v_~z$r_buff0_thd2~0_78 0) (= v_~main$tmp_guard1~0_24 0) (= v_~z$r_buff1_thd0~0_431 0) (= v_~b~0_98 0) (= v_~__unbuffered_p3_EAX~0_219 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_24|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_42|, ULTIMATE.start_main_~#t1263~0.offset=|v_ULTIMATE.start_main_~#t1263~0.offset_18|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_207, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_72|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_33|, ULTIMATE.start_main_~#t1262~0.base=|v_ULTIMATE.start_main_~#t1262~0.base_23|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_40|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_35|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_134|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_39|, ~a~0=v_~a~0_207, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_415, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_332, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_219, #length=|v_#length_29|, ~z$mem_tmp~0=v_~z$mem_tmp~0_37, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_66|, ULTIMATE.start_main_~#t1264~0.base=|v_ULTIMATE.start_main_~#t1264~0.base_23|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_609, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ~z$flush_delayed~0=v_~z$flush_delayed~0_54, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_52|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_76|, ~weak$$choice0~0=v_~weak$$choice0~0_32, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_40|, ULTIMATE.start_main_~#t1264~0.offset=|v_ULTIMATE.start_main_~#t1264~0.offset_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_207, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_9|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_5, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_189, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_145, ~x~0=v_~x~0_53, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_260, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ~z$read_delayed~0=v_~z$read_delayed~0_5, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_42|, ~z$w_buff1~0=v_~z$w_buff1~0_367, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_30|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_5, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_44|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_34|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_42|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_48|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_431, ULTIMATE.start_main_~#t1262~0.offset=|v_ULTIMATE.start_main_~#t1262~0.offset_18|, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_56|, ~y~0=v_~y~0_52, ULTIMATE.start_main_~#t1263~0.base=|v_ULTIMATE.start_main_~#t1263~0.base_22|, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_78, ULTIMATE.start_main_~#t1261~0.base=|v_ULTIMATE.start_main_~#t1261~0.base_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_830, ~z$w_buff0~0=v_~z$w_buff0~0_376, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_30|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_56|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_278, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_82|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_219, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_55|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_70|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_34|, ~b~0=v_~b~0_98, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ULTIMATE.start_main_~#t1261~0.offset=|v_ULTIMATE.start_main_~#t1261~0.offset_17|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_9|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_20|, ~z~0=v_~z~0_157, ~weak$$choice2~0=v_~weak$$choice2~0_172, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_77} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1263~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1262~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_~#t1264~0.base, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t1264~0.offset, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1262~0.offset, ULTIMATE.start_main_#t~nondet26, ~y~0, ULTIMATE.start_main_~#t1263~0.base, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1261~0.base, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ~b~0, ULTIMATE.start_main_#res, ULTIMATE.start_main_~#t1261~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:18:13,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L831-1-->L833: Formula: (and (= |v_ULTIMATE.start_main_~#t1262~0.offset_11| 0) (= (store |v_#valid_45| |v_ULTIMATE.start_main_~#t1262~0.base_13| 1) |v_#valid_44|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1262~0.base_13|) (= (select |v_#valid_45| |v_ULTIMATE.start_main_~#t1262~0.base_13|) 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1262~0.base_13| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1262~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1262~0.base_13|) |v_ULTIMATE.start_main_~#t1262~0.offset_11| 1)) |v_#memory_int_15|) (not (= 0 |v_ULTIMATE.start_main_~#t1262~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_16|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1262~0.base=|v_ULTIMATE.start_main_~#t1262~0.base_13|, ULTIMATE.start_main_~#t1262~0.offset=|v_ULTIMATE.start_main_~#t1262~0.offset_11|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, #length=|v_#length_21|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t1262~0.base, ULTIMATE.start_main_~#t1262~0.offset, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-12-07 17:18:13,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L833-1-->L835: Formula: (and (= |v_ULTIMATE.start_main_~#t1263~0.offset_10| 0) (= (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1263~0.base_11| 1) |v_#valid_40|) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t1263~0.base_11| 4)) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1263~0.base_11|) 0) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1263~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1263~0.base_11|) |v_ULTIMATE.start_main_~#t1263~0.offset_10| 2))) (not (= |v_ULTIMATE.start_main_~#t1263~0.base_11| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1263~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1263~0.offset=|v_ULTIMATE.start_main_~#t1263~0.offset_10|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_6|, #length=|v_#length_19|, ULTIMATE.start_main_~#t1263~0.base=|v_ULTIMATE.start_main_~#t1263~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1263~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1263~0.base] because there is no mapped edge [2019-12-07 17:18:13,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L835-1-->L837: Formula: (and (= |v_ULTIMATE.start_main_~#t1264~0.offset_11| 0) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1264~0.base_13|) 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1264~0.base_13| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1264~0.base_13|) |v_ULTIMATE.start_main_~#t1264~0.offset_11| 3)) |v_#memory_int_17|) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1264~0.base_13|) (= (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1264~0.base_13| 1) |v_#valid_46|) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1264~0.base_13| 4)) (not (= 0 |v_ULTIMATE.start_main_~#t1264~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1264~0.base=|v_ULTIMATE.start_main_~#t1264~0.base_13|, ULTIMATE.start_main_~#t1264~0.offset=|v_ULTIMATE.start_main_~#t1264~0.offset_11|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, #length=|v_#length_23|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1264~0.base, ULTIMATE.start_main_~#t1264~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17] because there is no mapped edge [2019-12-07 17:18:13,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L4-->L808: Formula: (and (= v_~z$r_buff0_thd4~0_36 1) (= v_~z$r_buff1_thd2~0_8 v_~z$r_buff0_thd2~0_7) (= v_~z$r_buff0_thd0~0_114 v_~z$r_buff1_thd0~0_75) (= 1 v_~a~0_7) (= v_~z$r_buff0_thd4~0_37 v_~z$r_buff1_thd4~0_34) (= v_~__unbuffered_p3_EAX~0_8 v_~a~0_7) (= v_~z$r_buff1_thd1~0_8 v_~z$r_buff0_thd1~0_7) (= v_~z$r_buff0_thd3~0_42 v_~z$r_buff1_thd3~0_34) (= v_~b~0_17 v_~__unbuffered_p3_EBX~0_8) (not (= v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_16 0))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_16, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_114, ~b~0=v_~b~0_17, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_37, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_42, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_7, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_7} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_16, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_34, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_34, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_8, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_8, ~a~0=v_~a~0_7, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_114, ~b~0=v_~b~0_17, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_75, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_8, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_8, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_36, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_42, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_7, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_7} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 17:18:13,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_9|) (= v_~b~0_62 1) (= |v_P0Thread1of1ForFork0_#res.offset_9| 0) (= v_P0Thread1of1ForFork0_~arg.offset_19 |v_P0Thread1of1ForFork0_#in~arg.offset_21|) (= v_P0Thread1of1ForFork0_~arg.base_19 |v_P0Thread1of1ForFork0_#in~arg.base_21|) (= v_~__unbuffered_cnt~0_119 (+ v_~__unbuffered_cnt~0_120 1)) (= v_~x~0_42 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_120} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_9|, ~b~0=v_~b~0_62, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_119, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_19, ~x~0=v_~x~0_42, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_19} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, ~x~0, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:18:13,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_12 |v_P1Thread1of1ForFork1_#in~arg.base_14|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_14| v_P1Thread1of1ForFork1_~arg.offset_12) (= v_~y~0_33 1) (= v_~x~0_29 2) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_12, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_12, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, ~y~0=v_~y~0_33, ~x~0=v_~x~0_29, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~y~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:18:13,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L809-->L809-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-919336315 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd4~0_In-919336315 256) 0))) (or (and (not .cse0) (not .cse1) (= |P3Thread1of1ForFork3_#t~ite11_Out-919336315| 0)) (and (or .cse1 .cse0) (= |P3Thread1of1ForFork3_#t~ite11_Out-919336315| ~z$w_buff0_used~0_In-919336315)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-919336315, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-919336315} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-919336315, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-919336315, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out-919336315|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 17:18:13,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L810-->L810-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In1646465612 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd4~0_In1646465612 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd4~0_In1646465612 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1646465612 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork3_#t~ite12_Out1646465612| 0)) (and (= ~z$w_buff1_used~0_In1646465612 |P3Thread1of1ForFork3_#t~ite12_Out1646465612|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1646465612, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1646465612, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1646465612, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1646465612} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1646465612, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1646465612, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1646465612, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1646465612, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out1646465612|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 17:18:13,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L772-2-->L772-4: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd3~0_In-1200669133 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1200669133 256) 0))) (or (and (not .cse0) (= ~z$w_buff1~0_In-1200669133 |P2Thread1of1ForFork2_#t~ite3_Out-1200669133|) (not .cse1)) (and (= ~z~0_In-1200669133 |P2Thread1of1ForFork2_#t~ite3_Out-1200669133|) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1200669133, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1200669133, ~z$w_buff1~0=~z$w_buff1~0_In-1200669133, ~z~0=~z~0_In-1200669133} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-1200669133|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1200669133, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1200669133, ~z$w_buff1~0=~z$w_buff1~0_In-1200669133, ~z~0=~z~0_In-1200669133} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 17:18:13,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [663] [663] L772-4-->L773: Formula: (= v_~z~0_32 |v_P2Thread1of1ForFork2_#t~ite3_8|) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_8|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_13|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_7|, ~z~0=v_~z~0_32} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 17:18:13,556 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L773-->L773-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1155127422 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1155127422 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite5_Out-1155127422|)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-1155127422 |P2Thread1of1ForFork2_#t~ite5_Out-1155127422|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1155127422, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1155127422} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1155127422|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1155127422, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1155127422} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 17:18:13,556 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L774-->L774-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In319955123 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In319955123 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In319955123 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In319955123 256) 0))) (or (and (= ~z$w_buff1_used~0_In319955123 |P2Thread1of1ForFork2_#t~ite6_Out319955123|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite6_Out319955123| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In319955123, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In319955123, ~z$w_buff1_used~0=~z$w_buff1_used~0_In319955123, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In319955123} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out319955123|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In319955123, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In319955123, ~z$w_buff1_used~0=~z$w_buff1_used~0_In319955123, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In319955123} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 17:18:13,556 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L775-->L775-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1451612299 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1451612299 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite7_Out1451612299| ~z$r_buff0_thd3~0_In1451612299) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite7_Out1451612299| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1451612299, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1451612299} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1451612299, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1451612299, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out1451612299|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 17:18:13,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L776-->L776-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In1287607330 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1287607330 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1287607330 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1287607330 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite8_Out1287607330| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork2_#t~ite8_Out1287607330| ~z$r_buff1_thd3~0_In1287607330) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1287607330, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1287607330, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1287607330, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1287607330} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1287607330, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1287607330, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1287607330, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1287607330, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out1287607330|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:18:13,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L776-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_34| v_~z$r_buff1_thd3~0_64) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_34|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_64, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_33|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:18:13,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L811-->L812: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In-1089237804 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1089237804 256))) (.cse1 (= ~z$r_buff0_thd4~0_Out-1089237804 ~z$r_buff0_thd4~0_In-1089237804))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= ~z$r_buff0_thd4~0_Out-1089237804 0)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1089237804, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1089237804} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1089237804, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-1089237804, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out-1089237804|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 17:18:13,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In744996408 256))) (.cse1 (= (mod ~z$r_buff0_thd4~0_In744996408 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd4~0_In744996408 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In744996408 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P3Thread1of1ForFork3_#t~ite14_Out744996408| ~z$r_buff1_thd4~0_In744996408)) (and (= |P3Thread1of1ForFork3_#t~ite14_Out744996408| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In744996408, ~z$w_buff0_used~0=~z$w_buff0_used~0_In744996408, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In744996408, ~z$w_buff1_used~0=~z$w_buff1_used~0_In744996408} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In744996408, ~z$w_buff0_used~0=~z$w_buff0_used~0_In744996408, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out744996408|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In744996408, ~z$w_buff1_used~0=~z$w_buff1_used~0_In744996408} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 17:18:13,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L812-2-->P3EXIT: Formula: (and (= v_~__unbuffered_cnt~0_107 (+ v_~__unbuffered_cnt~0_108 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|) (= |v_P3Thread1of1ForFork3_#t~ite14_44| v_~z$r_buff1_thd4~0_75)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_44|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_108} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_75, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_43|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_107, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 17:18:13,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L837-1-->L843: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_62) 1 0)) 0 1) v_~main$tmp_guard0~0_8)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_8|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 17:18:13,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L843-2-->L843-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite20_Out2140371476| |ULTIMATE.start_main_#t~ite19_Out2140371476|)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In2140371476 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In2140371476 256)))) (or (and (not .cse0) (not .cse1) .cse2 (= ~z$w_buff1~0_In2140371476 |ULTIMATE.start_main_#t~ite19_Out2140371476|)) (and .cse2 (= ~z~0_In2140371476 |ULTIMATE.start_main_#t~ite19_Out2140371476|) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2140371476, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2140371476, ~z$w_buff1~0=~z$w_buff1~0_In2140371476, ~z~0=~z~0_In2140371476} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out2140371476|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2140371476, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2140371476, ~z$w_buff1~0=~z$w_buff1~0_In2140371476, ~z~0=~z~0_In2140371476, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out2140371476|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:18:13,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L844-->L844-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1300821445 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1300821445 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out1300821445| ~z$w_buff0_used~0_In1300821445) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite21_Out1300821445| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1300821445, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1300821445} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1300821445, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1300821445, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1300821445|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:18:13,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L845-->L845-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In25526337 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In25526337 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In25526337 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In25526337 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In25526337 |ULTIMATE.start_main_#t~ite22_Out25526337|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite22_Out25526337| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In25526337, ~z$w_buff0_used~0=~z$w_buff0_used~0_In25526337, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In25526337, ~z$w_buff1_used~0=~z$w_buff1_used~0_In25526337} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In25526337, ~z$w_buff0_used~0=~z$w_buff0_used~0_In25526337, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In25526337, ~z$w_buff1_used~0=~z$w_buff1_used~0_In25526337, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out25526337|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:18:13,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L846-->L846-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-644675241 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-644675241 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite23_Out-644675241|)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd0~0_In-644675241 |ULTIMATE.start_main_#t~ite23_Out-644675241|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-644675241, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-644675241} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-644675241, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-644675241, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-644675241|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:18:13,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L847-->L847-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In869144495 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In869144495 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In869144495 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In869144495 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite24_Out869144495| 0)) (and (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite24_Out869144495| ~z$r_buff1_thd0~0_In869144495) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In869144495, ~z$w_buff0_used~0=~z$w_buff0_used~0_In869144495, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In869144495, ~z$w_buff1_used~0=~z$w_buff1_used~0_In869144495} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In869144495, ~z$w_buff0_used~0=~z$w_buff0_used~0_In869144495, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In869144495, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out869144495|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In869144495} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 17:18:13,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L855-->L855-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-1386181147 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1386181147 256)))) (or (and .cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1386181147 256))) (= (mod ~z$w_buff0_used~0_In-1386181147 256) 0) (and (= 0 (mod ~z$w_buff1_used~0_In-1386181147 256)) .cse0))) .cse1 (= ~z$w_buff0~0_In-1386181147 |ULTIMATE.start_main_#t~ite30_Out-1386181147|) (= |ULTIMATE.start_main_#t~ite31_Out-1386181147| |ULTIMATE.start_main_#t~ite30_Out-1386181147|)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite30_In-1386181147| |ULTIMATE.start_main_#t~ite30_Out-1386181147|) (= ~z$w_buff0~0_In-1386181147 |ULTIMATE.start_main_#t~ite31_Out-1386181147|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1386181147, ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_In-1386181147|, ~z$w_buff0~0=~z$w_buff0~0_In-1386181147, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1386181147, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1386181147, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1386181147, ~weak$$choice2~0=~weak$$choice2~0_In-1386181147} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1386181147, ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-1386181147|, ~z$w_buff0~0=~z$w_buff0~0_In-1386181147, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1386181147, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1386181147, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1386181147, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-1386181147|, ~weak$$choice2~0=~weak$$choice2~0_In-1386181147} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite31] because there is no mapped edge [2019-12-07 17:18:13,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L856-->L856-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-856306625 256) 0))) (or (and .cse0 (= ~z$w_buff1~0_In-856306625 |ULTIMATE.start_main_#t~ite33_Out-856306625|) (= |ULTIMATE.start_main_#t~ite33_Out-856306625| |ULTIMATE.start_main_#t~ite34_Out-856306625|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-856306625 256)))) (or (and (= 0 (mod ~z$r_buff1_thd0~0_In-856306625 256)) .cse1) (and (= (mod ~z$w_buff1_used~0_In-856306625 256) 0) .cse1) (= 0 (mod ~z$w_buff0_used~0_In-856306625 256))))) (and (= ~z$w_buff1~0_In-856306625 |ULTIMATE.start_main_#t~ite34_Out-856306625|) (= |ULTIMATE.start_main_#t~ite33_In-856306625| |ULTIMATE.start_main_#t~ite33_Out-856306625|) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-856306625, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-856306625, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-856306625, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-856306625, ~z$w_buff1~0=~z$w_buff1~0_In-856306625, ~weak$$choice2~0=~weak$$choice2~0_In-856306625, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_In-856306625|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-856306625, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-856306625, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-856306625, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-856306625, ~z$w_buff1~0=~z$w_buff1~0_In-856306625, ~weak$$choice2~0=~weak$$choice2~0_In-856306625, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out-856306625|, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_Out-856306625|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_#t~ite34] because there is no mapped edge [2019-12-07 17:18:13,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L859-->L860: Formula: (and (= v_~z$r_buff0_thd0~0_108 v_~z$r_buff0_thd0~0_107) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_108, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_107, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_9|, ~weak$$choice2~0=v_~weak$$choice2~0_33, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:18:13,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-614570380 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite46_Out-614570380| ~z$r_buff1_thd0~0_In-614570380) (= |ULTIMATE.start_main_#t~ite45_In-614570380| |ULTIMATE.start_main_#t~ite45_Out-614570380|)) (and (= ~z$r_buff1_thd0~0_In-614570380 |ULTIMATE.start_main_#t~ite45_Out-614570380|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-614570380 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In-614570380 256)) (and .cse1 (= (mod ~z$r_buff1_thd0~0_In-614570380 256) 0)) (and (= (mod ~z$w_buff1_used~0_In-614570380 256) 0) .cse1))) (= |ULTIMATE.start_main_#t~ite46_Out-614570380| |ULTIMATE.start_main_#t~ite45_Out-614570380|) .cse0))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-614570380, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-614570380, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-614570380, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-614570380, ~weak$$choice2~0=~weak$$choice2~0_In-614570380, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In-614570380|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-614570380, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-614570380, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-614570380, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-614570380, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-614570380|, ~weak$$choice2~0=~weak$$choice2~0_In-614570380, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-614570380|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 17:18:13,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L862-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5| (mod v_~main$tmp_guard1~0_8 256)) (not (= 0 (mod v_~z$flush_delayed~0_30 256))) (= v_~z$mem_tmp~0_20 v_~z~0_83) (= 0 v_~z$flush_delayed~0_29)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_8, ~z$flush_delayed~0=v_~z$flush_delayed~0_30} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_20, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_17|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_8, ~z$flush_delayed~0=v_~z$flush_delayed~0_29, ~z~0=v_~z~0_83, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:18:13,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:18:13,615 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_ef215849-80a6-4536-b6c2-614ebd9fb157/bin/uautomizer/witness.graphml [2019-12-07 17:18:13,616 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:18:13,617 INFO L168 Benchmark]: Toolchain (without parser) took 18996.34 ms. Allocated memory was 1.0 GB in the beginning and 2.6 GB in the end (delta: 1.6 GB). Free memory was 939.9 MB in the beginning and 1.5 GB in the end (delta: -522.1 MB). Peak memory consumption was 1.0 GB. Max. memory is 11.5 GB. [2019-12-07 17:18:13,617 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:18:13,617 INFO L168 Benchmark]: CACSL2BoogieTranslator took 396.33 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.2 MB). Free memory was 939.9 MB in the beginning and 1.1 GB in the end (delta: -130.0 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 17:18:13,617 INFO L168 Benchmark]: Boogie Procedure Inliner took 50.63 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:18:13,617 INFO L168 Benchmark]: Boogie Preprocessor took 28.33 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.5 MB). Peak memory consumption was 6.5 MB. Max. memory is 11.5 GB. [2019-12-07 17:18:13,618 INFO L168 Benchmark]: RCFGBuilder took 409.52 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.8 MB). Peak memory consumption was 49.8 MB. Max. memory is 11.5 GB. [2019-12-07 17:18:13,618 INFO L168 Benchmark]: TraceAbstraction took 18042.69 ms. Allocated memory was 1.1 GB in the beginning and 2.6 GB in the end (delta: 1.5 GB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -488.1 MB). Peak memory consumption was 972.0 MB. Max. memory is 11.5 GB. [2019-12-07 17:18:13,618 INFO L168 Benchmark]: Witness Printer took 65.65 ms. Allocated memory is still 2.6 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 34.4 MB). Peak memory consumption was 34.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:18:13,620 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 396.33 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.2 MB). Free memory was 939.9 MB in the beginning and 1.1 GB in the end (delta: -130.0 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 50.63 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 28.33 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.5 MB). Peak memory consumption was 6.5 MB. Max. memory is 11.5 GB. * RCFGBuilder took 409.52 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.8 MB). Peak memory consumption was 49.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 18042.69 ms. Allocated memory was 1.1 GB in the beginning and 2.6 GB in the end (delta: 1.5 GB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -488.1 MB). Peak memory consumption was 972.0 MB. Max. memory is 11.5 GB. * Witness Printer took 65.65 ms. Allocated memory is still 2.6 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 34.4 MB). Peak memory consumption was 34.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 180 ProgramPointsBefore, 89 ProgramPointsAfterwards, 208 TransitionsBefore, 95 TransitionsAfterwards, 12668 CoEnabledTransitionPairs, 7 FixpointIterations, 36 TrivialSequentialCompositions, 50 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 36 ConcurrentYvCompositions, 27 ChoiceCompositions, 5121 VarBasedMoverChecksPositive, 269 VarBasedMoverChecksNegative, 136 SemBasedMoverChecksPositive, 198 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 49999 CheckedPairsTotal, 122 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L831] FCALL, FORK 0 pthread_create(&t1261, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] FCALL, FORK 0 pthread_create(&t1262, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L835] FCALL, FORK 0 pthread_create(&t1263, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] FCALL, FORK 0 pthread_create(&t1264, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L786] 4 z$w_buff1 = z$w_buff0 [L787] 4 z$w_buff0 = 2 [L788] 4 z$w_buff1_used = z$w_buff0_used [L789] 4 z$w_buff0_used = (_Bool)1 [L808] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 3 y = 2 [L769] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L808] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L772] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L809] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L773] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L774] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L775] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L810] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L843] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L843] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L844] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L845] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L846] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L847] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L850] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L851] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L852] 0 z$flush_delayed = weak$$choice2 [L853] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L854] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L854] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L855] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L856] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L857] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L857] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L858] EXPR 0 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L860] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L861] 0 main$tmp_guard1 = !(x == 2 && y == 2 && z == 2 && __unbuffered_p3_EAX == 1 && __unbuffered_p3_EBX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 17.8s, OverallIterations: 19, TraceHistogramMax: 1, AutomataDifference: 4.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1945 SDtfs, 2092 SDslu, 4976 SDs, 0 SdLazy, 2498 SolverSat, 214 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 169 GetRequests, 23 SyntacticMatches, 8 SemanticMatches, 138 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 451 ImplicationChecksByTransitivity, 1.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=52914occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 5.8s AutomataMinimizationTime, 18 MinimizatonAttempts, 30352 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 847 NumberOfCodeBlocks, 847 NumberOfCodeBlocksAsserted, 19 NumberOfCheckSat, 769 ConstructedInterpolants, 0 QuantifiedInterpolants, 219966 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 18 InterpolantComputations, 18 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...