./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix047_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_c948bad4-372f-47f7-b681-3d1e43ac05c1/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_c948bad4-372f-47f7-b681-3d1e43ac05c1/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_c948bad4-372f-47f7-b681-3d1e43ac05c1/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_c948bad4-372f-47f7-b681-3d1e43ac05c1/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix047_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_c948bad4-372f-47f7-b681-3d1e43ac05c1/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_c948bad4-372f-47f7-b681-3d1e43ac05c1/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c6e5b7f5d43063f9f404a2506aec21b7ffc76aa2 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:32:09,644 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:32:09,646 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:32:09,655 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:32:09,655 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:32:09,656 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:32:09,657 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:32:09,659 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:32:09,661 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:32:09,661 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:32:09,662 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:32:09,663 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:32:09,663 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:32:09,664 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:32:09,664 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:32:09,665 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:32:09,666 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:32:09,667 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:32:09,668 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:32:09,670 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:32:09,671 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:32:09,673 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:32:09,674 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:32:09,674 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:32:09,676 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:32:09,677 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:32:09,677 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:32:09,678 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:32:09,678 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:32:09,679 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:32:09,679 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:32:09,680 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:32:09,680 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:32:09,681 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:32:09,682 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:32:09,682 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:32:09,682 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:32:09,683 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:32:09,683 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:32:09,684 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:32:09,684 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:32:09,685 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_c948bad4-372f-47f7-b681-3d1e43ac05c1/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:32:09,697 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:32:09,698 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:32:09,698 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:32:09,699 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:32:09,699 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:32:09,699 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:32:09,699 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:32:09,699 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:32:09,700 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:32:09,700 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:32:09,700 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:32:09,700 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:32:09,700 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:32:09,700 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:32:09,701 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:32:09,701 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:32:09,701 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:32:09,701 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:32:09,701 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:32:09,701 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:32:09,702 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:32:09,702 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:32:09,702 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:32:09,702 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:32:09,702 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:32:09,702 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:32:09,702 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:32:09,702 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:32:09,702 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:32:09,702 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_c948bad4-372f-47f7-b681-3d1e43ac05c1/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c6e5b7f5d43063f9f404a2506aec21b7ffc76aa2 [2019-12-07 12:32:09,816 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:32:09,827 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:32:09,830 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:32:09,832 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:32:09,832 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:32:09,833 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_c948bad4-372f-47f7-b681-3d1e43ac05c1/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix047_rmo.opt.i [2019-12-07 12:32:09,882 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c948bad4-372f-47f7-b681-3d1e43ac05c1/bin/uautomizer/data/3e27af5f9/aa4b59f3a5a04d7d9df203f3c8abbc4c/FLAG9918d765c [2019-12-07 12:32:10,261 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:32:10,262 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_c948bad4-372f-47f7-b681-3d1e43ac05c1/sv-benchmarks/c/pthread-wmm/mix047_rmo.opt.i [2019-12-07 12:32:10,271 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c948bad4-372f-47f7-b681-3d1e43ac05c1/bin/uautomizer/data/3e27af5f9/aa4b59f3a5a04d7d9df203f3c8abbc4c/FLAG9918d765c [2019-12-07 12:32:10,280 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_c948bad4-372f-47f7-b681-3d1e43ac05c1/bin/uautomizer/data/3e27af5f9/aa4b59f3a5a04d7d9df203f3c8abbc4c [2019-12-07 12:32:10,282 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:32:10,283 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:32:10,284 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:32:10,284 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:32:10,286 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:32:10,286 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:32:10" (1/1) ... [2019-12-07 12:32:10,288 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c8002ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:10, skipping insertion in model container [2019-12-07 12:32:10,288 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:32:10" (1/1) ... [2019-12-07 12:32:10,293 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:32:10,319 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:32:10,555 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:32:10,563 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:32:10,603 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:32:10,648 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:32:10,648 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:10 WrapperNode [2019-12-07 12:32:10,648 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:32:10,648 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:32:10,648 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:32:10,649 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:32:10,654 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:10" (1/1) ... [2019-12-07 12:32:10,666 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:10" (1/1) ... [2019-12-07 12:32:10,688 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:32:10,688 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:32:10,688 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:32:10,688 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:32:10,694 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:10" (1/1) ... [2019-12-07 12:32:10,695 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:10" (1/1) ... [2019-12-07 12:32:10,698 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:10" (1/1) ... [2019-12-07 12:32:10,698 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:10" (1/1) ... [2019-12-07 12:32:10,705 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:10" (1/1) ... [2019-12-07 12:32:10,708 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:10" (1/1) ... [2019-12-07 12:32:10,710 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:10" (1/1) ... [2019-12-07 12:32:10,713 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:32:10,714 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:32:10,714 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:32:10,714 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:32:10,715 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:10" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_c948bad4-372f-47f7-b681-3d1e43ac05c1/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:32:10,754 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:32:10,754 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:32:10,754 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:32:10,754 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:32:10,754 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:32:10,754 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:32:10,754 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:32:10,754 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:32:10,755 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 12:32:10,755 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 12:32:10,755 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 12:32:10,755 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 12:32:10,755 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:32:10,755 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:32:10,755 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:32:10,756 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:32:11,110 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:32:11,110 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:32:11,111 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:32:11 BoogieIcfgContainer [2019-12-07 12:32:11,111 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:32:11,112 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:32:11,112 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:32:11,114 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:32:11,114 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:32:10" (1/3) ... [2019-12-07 12:32:11,115 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b6af545 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:32:11, skipping insertion in model container [2019-12-07 12:32:11,115 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:10" (2/3) ... [2019-12-07 12:32:11,115 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b6af545 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:32:11, skipping insertion in model container [2019-12-07 12:32:11,115 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:32:11" (3/3) ... [2019-12-07 12:32:11,117 INFO L109 eAbstractionObserver]: Analyzing ICFG mix047_rmo.opt.i [2019-12-07 12:32:11,123 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:32:11,123 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:32:11,128 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:32:11,129 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:32:11,155 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,155 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,155 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,155 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,156 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,156 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,156 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,156 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,156 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,156 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,156 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,156 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,157 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,157 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,157 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,157 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,157 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,157 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,162 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,162 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,162 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,162 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,162 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,162 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,163 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,163 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,163 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,163 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,163 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,163 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,163 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,163 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,164 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,164 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,164 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,164 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,164 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,164 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,164 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,164 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,166 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,166 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,166 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,166 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,166 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:11,179 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 12:32:11,192 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:32:11,192 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:32:11,192 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:32:11,192 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:32:11,192 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:32:11,192 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:32:11,193 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:32:11,193 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:32:11,206 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 180 places, 208 transitions [2019-12-07 12:32:11,207 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 180 places, 208 transitions [2019-12-07 12:32:11,269 INFO L134 PetriNetUnfolder]: 41/204 cut-off events. [2019-12-07 12:32:11,269 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:32:11,277 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 204 events. 41/204 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 480 event pairs. 12/173 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 12:32:11,289 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 180 places, 208 transitions [2019-12-07 12:32:11,315 INFO L134 PetriNetUnfolder]: 41/204 cut-off events. [2019-12-07 12:32:11,315 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:32:11,319 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 204 events. 41/204 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 480 event pairs. 12/173 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 12:32:11,330 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12668 [2019-12-07 12:32:11,330 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:32:14,208 WARN L192 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 12:32:14,325 INFO L206 etLargeBlockEncoding]: Checked pairs total: 49999 [2019-12-07 12:32:14,325 INFO L214 etLargeBlockEncoding]: Total number of compositions: 122 [2019-12-07 12:32:14,336 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 89 places, 95 transitions [2019-12-07 12:32:16,230 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 34566 states. [2019-12-07 12:32:16,232 INFO L276 IsEmpty]: Start isEmpty. Operand 34566 states. [2019-12-07 12:32:16,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 12:32:16,238 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:16,238 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:16,239 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:16,242 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:16,243 INFO L82 PathProgramCache]: Analyzing trace with hash -1471654446, now seen corresponding path program 1 times [2019-12-07 12:32:16,248 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:16,248 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1216887257] [2019-12-07 12:32:16,248 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:16,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:16,408 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:16,408 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1216887257] [2019-12-07 12:32:16,409 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:16,409 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:32:16,410 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1380390029] [2019-12-07 12:32:16,412 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:32:16,412 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:16,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:32:16,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:16,423 INFO L87 Difference]: Start difference. First operand 34566 states. Second operand 3 states. [2019-12-07 12:32:16,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:16,771 INFO L93 Difference]: Finished difference Result 34366 states and 145616 transitions. [2019-12-07 12:32:16,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:32:16,772 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 12:32:16,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:16,995 INFO L225 Difference]: With dead ends: 34366 [2019-12-07 12:32:16,995 INFO L226 Difference]: Without dead ends: 33638 [2019-12-07 12:32:16,996 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:17,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33638 states. [2019-12-07 12:32:17,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33638 to 33638. [2019-12-07 12:32:17,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33638 states. [2019-12-07 12:32:18,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33638 states to 33638 states and 142648 transitions. [2019-12-07 12:32:18,004 INFO L78 Accepts]: Start accepts. Automaton has 33638 states and 142648 transitions. Word has length 9 [2019-12-07 12:32:18,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:18,005 INFO L462 AbstractCegarLoop]: Abstraction has 33638 states and 142648 transitions. [2019-12-07 12:32:18,005 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:32:18,005 INFO L276 IsEmpty]: Start isEmpty. Operand 33638 states and 142648 transitions. [2019-12-07 12:32:18,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 12:32:18,010 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:18,010 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:18,010 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:18,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:18,011 INFO L82 PathProgramCache]: Analyzing trace with hash 1198985017, now seen corresponding path program 1 times [2019-12-07 12:32:18,011 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:18,011 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [787990524] [2019-12-07 12:32:18,011 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:18,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:18,069 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:18,070 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [787990524] [2019-12-07 12:32:18,070 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:18,070 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:32:18,070 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1988618060] [2019-12-07 12:32:18,071 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:32:18,071 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:18,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:32:18,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:32:18,071 INFO L87 Difference]: Start difference. First operand 33638 states and 142648 transitions. Second operand 4 states. [2019-12-07 12:32:18,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:18,593 INFO L93 Difference]: Finished difference Result 52350 states and 214824 transitions. [2019-12-07 12:32:18,593 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:32:18,594 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 12:32:18,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:18,878 INFO L225 Difference]: With dead ends: 52350 [2019-12-07 12:32:18,878 INFO L226 Difference]: Without dead ends: 52322 [2019-12-07 12:32:18,879 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:32:19,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52322 states. [2019-12-07 12:32:19,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52322 to 47746. [2019-12-07 12:32:19,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47746 states. [2019-12-07 12:32:20,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47746 states to 47746 states and 197744 transitions. [2019-12-07 12:32:20,009 INFO L78 Accepts]: Start accepts. Automaton has 47746 states and 197744 transitions. Word has length 15 [2019-12-07 12:32:20,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:20,009 INFO L462 AbstractCegarLoop]: Abstraction has 47746 states and 197744 transitions. [2019-12-07 12:32:20,009 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:32:20,009 INFO L276 IsEmpty]: Start isEmpty. Operand 47746 states and 197744 transitions. [2019-12-07 12:32:20,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 12:32:20,011 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:20,011 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:20,012 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:20,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:20,012 INFO L82 PathProgramCache]: Analyzing trace with hash -633584, now seen corresponding path program 1 times [2019-12-07 12:32:20,012 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:20,012 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1048588487] [2019-12-07 12:32:20,012 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:20,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:20,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:20,073 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1048588487] [2019-12-07 12:32:20,073 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:20,073 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:32:20,074 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1074420743] [2019-12-07 12:32:20,074 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:32:20,074 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:20,074 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:32:20,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:32:20,075 INFO L87 Difference]: Start difference. First operand 47746 states and 197744 transitions. Second operand 4 states. [2019-12-07 12:32:20,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:20,542 INFO L93 Difference]: Finished difference Result 59254 states and 242916 transitions. [2019-12-07 12:32:20,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:32:20,543 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 12:32:20,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:20,661 INFO L225 Difference]: With dead ends: 59254 [2019-12-07 12:32:20,661 INFO L226 Difference]: Without dead ends: 59254 [2019-12-07 12:32:20,662 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:32:20,952 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59254 states. [2019-12-07 12:32:21,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59254 to 52846. [2019-12-07 12:32:21,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52846 states. [2019-12-07 12:32:21,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52846 states to 52846 states and 218200 transitions. [2019-12-07 12:32:21,864 INFO L78 Accepts]: Start accepts. Automaton has 52846 states and 218200 transitions. Word has length 15 [2019-12-07 12:32:21,865 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:21,865 INFO L462 AbstractCegarLoop]: Abstraction has 52846 states and 218200 transitions. [2019-12-07 12:32:21,865 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:32:21,865 INFO L276 IsEmpty]: Start isEmpty. Operand 52846 states and 218200 transitions. [2019-12-07 12:32:21,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 12:32:21,874 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:21,874 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:21,874 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:21,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:21,875 INFO L82 PathProgramCache]: Analyzing trace with hash 254508137, now seen corresponding path program 1 times [2019-12-07 12:32:21,875 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:21,875 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1618181704] [2019-12-07 12:32:21,875 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:21,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:21,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:21,924 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1618181704] [2019-12-07 12:32:21,925 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:21,925 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:32:21,925 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1155478074] [2019-12-07 12:32:21,925 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:32:21,925 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:21,926 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:32:21,926 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:32:21,926 INFO L87 Difference]: Start difference. First operand 52846 states and 218200 transitions. Second operand 5 states. [2019-12-07 12:32:22,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:22,431 INFO L93 Difference]: Finished difference Result 70826 states and 287832 transitions. [2019-12-07 12:32:22,431 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:32:22,431 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 12:32:22,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:22,586 INFO L225 Difference]: With dead ends: 70826 [2019-12-07 12:32:22,586 INFO L226 Difference]: Without dead ends: 70798 [2019-12-07 12:32:22,586 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:32:22,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70798 states. [2019-12-07 12:32:23,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70798 to 52914. [2019-12-07 12:32:23,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52914 states. [2019-12-07 12:32:23,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52914 states to 52914 states and 218104 transitions. [2019-12-07 12:32:23,840 INFO L78 Accepts]: Start accepts. Automaton has 52914 states and 218104 transitions. Word has length 21 [2019-12-07 12:32:23,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:23,840 INFO L462 AbstractCegarLoop]: Abstraction has 52914 states and 218104 transitions. [2019-12-07 12:32:23,840 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:32:23,840 INFO L276 IsEmpty]: Start isEmpty. Operand 52914 states and 218104 transitions. [2019-12-07 12:32:23,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 12:32:23,870 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:23,870 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:23,870 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:23,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:23,870 INFO L82 PathProgramCache]: Analyzing trace with hash 1007840852, now seen corresponding path program 1 times [2019-12-07 12:32:23,870 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:23,870 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1028792413] [2019-12-07 12:32:23,871 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:23,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:23,908 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:23,908 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1028792413] [2019-12-07 12:32:23,908 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:23,908 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:32:23,908 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [212684547] [2019-12-07 12:32:23,909 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:32:23,909 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:23,909 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:32:23,909 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:23,909 INFO L87 Difference]: Start difference. First operand 52914 states and 218104 transitions. Second operand 3 states. [2019-12-07 12:32:24,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:24,054 INFO L93 Difference]: Finished difference Result 41543 states and 158120 transitions. [2019-12-07 12:32:24,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:32:24,054 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 12:32:24,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:24,126 INFO L225 Difference]: With dead ends: 41543 [2019-12-07 12:32:24,126 INFO L226 Difference]: Without dead ends: 41543 [2019-12-07 12:32:24,127 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:24,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41543 states. [2019-12-07 12:32:24,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41543 to 41543. [2019-12-07 12:32:24,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41543 states. [2019-12-07 12:32:24,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41543 states to 41543 states and 158120 transitions. [2019-12-07 12:32:24,954 INFO L78 Accepts]: Start accepts. Automaton has 41543 states and 158120 transitions. Word has length 29 [2019-12-07 12:32:24,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:24,954 INFO L462 AbstractCegarLoop]: Abstraction has 41543 states and 158120 transitions. [2019-12-07 12:32:24,955 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:32:24,955 INFO L276 IsEmpty]: Start isEmpty. Operand 41543 states and 158120 transitions. [2019-12-07 12:32:24,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 12:32:24,976 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:24,976 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:24,976 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:24,977 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:24,977 INFO L82 PathProgramCache]: Analyzing trace with hash -1153771889, now seen corresponding path program 1 times [2019-12-07 12:32:24,977 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:24,977 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [36984036] [2019-12-07 12:32:24,977 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:24,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:25,012 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:25,012 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [36984036] [2019-12-07 12:32:25,012 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:25,012 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:32:25,012 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1837992853] [2019-12-07 12:32:25,012 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:32:25,013 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:25,013 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:32:25,013 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:32:25,013 INFO L87 Difference]: Start difference. First operand 41543 states and 158120 transitions. Second operand 4 states. [2019-12-07 12:32:25,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:25,062 INFO L93 Difference]: Finished difference Result 17329 states and 54594 transitions. [2019-12-07 12:32:25,063 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:32:25,063 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 12:32:25,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:25,083 INFO L225 Difference]: With dead ends: 17329 [2019-12-07 12:32:25,083 INFO L226 Difference]: Without dead ends: 17329 [2019-12-07 12:32:25,083 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:32:25,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17329 states. [2019-12-07 12:32:25,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17329 to 17329. [2019-12-07 12:32:25,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17329 states. [2019-12-07 12:32:25,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17329 states to 17329 states and 54594 transitions. [2019-12-07 12:32:25,313 INFO L78 Accepts]: Start accepts. Automaton has 17329 states and 54594 transitions. Word has length 30 [2019-12-07 12:32:25,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:25,314 INFO L462 AbstractCegarLoop]: Abstraction has 17329 states and 54594 transitions. [2019-12-07 12:32:25,314 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:32:25,314 INFO L276 IsEmpty]: Start isEmpty. Operand 17329 states and 54594 transitions. [2019-12-07 12:32:25,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 12:32:25,322 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:25,322 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:25,322 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:25,322 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:25,322 INFO L82 PathProgramCache]: Analyzing trace with hash 2070972968, now seen corresponding path program 1 times [2019-12-07 12:32:25,322 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:25,322 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1305099182] [2019-12-07 12:32:25,322 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:25,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:25,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:25,358 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1305099182] [2019-12-07 12:32:25,358 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:25,358 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:32:25,358 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [196768846] [2019-12-07 12:32:25,359 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:32:25,359 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:25,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:32:25,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:32:25,359 INFO L87 Difference]: Start difference. First operand 17329 states and 54594 transitions. Second operand 5 states. [2019-12-07 12:32:25,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:25,383 INFO L93 Difference]: Finished difference Result 2957 states and 7512 transitions. [2019-12-07 12:32:25,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:32:25,383 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 12:32:25,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:25,385 INFO L225 Difference]: With dead ends: 2957 [2019-12-07 12:32:25,386 INFO L226 Difference]: Without dead ends: 2957 [2019-12-07 12:32:25,386 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:32:25,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2957 states. [2019-12-07 12:32:25,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2957 to 2957. [2019-12-07 12:32:25,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2957 states. [2019-12-07 12:32:25,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2957 states to 2957 states and 7512 transitions. [2019-12-07 12:32:25,412 INFO L78 Accepts]: Start accepts. Automaton has 2957 states and 7512 transitions. Word has length 31 [2019-12-07 12:32:25,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:25,412 INFO L462 AbstractCegarLoop]: Abstraction has 2957 states and 7512 transitions. [2019-12-07 12:32:25,412 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:32:25,413 INFO L276 IsEmpty]: Start isEmpty. Operand 2957 states and 7512 transitions. [2019-12-07 12:32:25,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 12:32:25,416 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:25,416 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:25,416 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:25,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:25,416 INFO L82 PathProgramCache]: Analyzing trace with hash -1919926116, now seen corresponding path program 1 times [2019-12-07 12:32:25,416 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:25,416 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [45111388] [2019-12-07 12:32:25,416 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:25,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:25,476 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:25,477 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [45111388] [2019-12-07 12:32:25,477 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:25,477 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:32:25,477 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1459744441] [2019-12-07 12:32:25,478 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:32:25,478 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:25,478 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:32:25,478 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:32:25,478 INFO L87 Difference]: Start difference. First operand 2957 states and 7512 transitions. Second operand 6 states. [2019-12-07 12:32:25,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:25,508 INFO L93 Difference]: Finished difference Result 1371 states and 3902 transitions. [2019-12-07 12:32:25,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 12:32:25,508 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-12-07 12:32:25,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:25,510 INFO L225 Difference]: With dead ends: 1371 [2019-12-07 12:32:25,510 INFO L226 Difference]: Without dead ends: 1371 [2019-12-07 12:32:25,510 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:32:25,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1371 states. [2019-12-07 12:32:25,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1371 to 1231. [2019-12-07 12:32:25,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1231 states. [2019-12-07 12:32:25,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1231 states to 1231 states and 3502 transitions. [2019-12-07 12:32:25,530 INFO L78 Accepts]: Start accepts. Automaton has 1231 states and 3502 transitions. Word has length 43 [2019-12-07 12:32:25,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:25,530 INFO L462 AbstractCegarLoop]: Abstraction has 1231 states and 3502 transitions. [2019-12-07 12:32:25,530 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:32:25,530 INFO L276 IsEmpty]: Start isEmpty. Operand 1231 states and 3502 transitions. [2019-12-07 12:32:25,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 12:32:25,532 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:25,532 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:25,532 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:25,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:25,532 INFO L82 PathProgramCache]: Analyzing trace with hash 593702588, now seen corresponding path program 1 times [2019-12-07 12:32:25,533 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:25,533 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1355114099] [2019-12-07 12:32:25,533 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:25,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:25,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:25,584 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1355114099] [2019-12-07 12:32:25,585 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:25,585 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:32:25,585 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1066769841] [2019-12-07 12:32:25,585 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:32:25,585 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:25,585 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:32:25,586 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:25,586 INFO L87 Difference]: Start difference. First operand 1231 states and 3502 transitions. Second operand 3 states. [2019-12-07 12:32:25,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:25,611 INFO L93 Difference]: Finished difference Result 1239 states and 3510 transitions. [2019-12-07 12:32:25,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:32:25,612 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 12:32:25,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:25,614 INFO L225 Difference]: With dead ends: 1239 [2019-12-07 12:32:25,614 INFO L226 Difference]: Without dead ends: 1239 [2019-12-07 12:32:25,614 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:25,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1239 states. [2019-12-07 12:32:25,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1239 to 1234. [2019-12-07 12:32:25,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1234 states. [2019-12-07 12:32:25,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1234 states to 1234 states and 3505 transitions. [2019-12-07 12:32:25,628 INFO L78 Accepts]: Start accepts. Automaton has 1234 states and 3505 transitions. Word has length 58 [2019-12-07 12:32:25,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:25,628 INFO L462 AbstractCegarLoop]: Abstraction has 1234 states and 3505 transitions. [2019-12-07 12:32:25,628 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:32:25,628 INFO L276 IsEmpty]: Start isEmpty. Operand 1234 states and 3505 transitions. [2019-12-07 12:32:25,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 12:32:25,630 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:25,630 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:25,630 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:25,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:25,631 INFO L82 PathProgramCache]: Analyzing trace with hash -1128085639, now seen corresponding path program 1 times [2019-12-07 12:32:25,631 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:25,631 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [233480305] [2019-12-07 12:32:25,631 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:25,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:25,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:25,700 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [233480305] [2019-12-07 12:32:25,700 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:25,701 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:32:25,701 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2107196350] [2019-12-07 12:32:25,701 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:32:25,701 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:25,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:32:25,702 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:32:25,702 INFO L87 Difference]: Start difference. First operand 1234 states and 3505 transitions. Second operand 5 states. [2019-12-07 12:32:25,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:25,824 INFO L93 Difference]: Finished difference Result 1775 states and 5027 transitions. [2019-12-07 12:32:25,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 12:32:25,824 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2019-12-07 12:32:25,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:25,826 INFO L225 Difference]: With dead ends: 1775 [2019-12-07 12:32:25,826 INFO L226 Difference]: Without dead ends: 1775 [2019-12-07 12:32:25,826 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:32:25,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1775 states. [2019-12-07 12:32:25,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1775 to 1599. [2019-12-07 12:32:25,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1599 states. [2019-12-07 12:32:25,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1599 states to 1599 states and 4535 transitions. [2019-12-07 12:32:25,842 INFO L78 Accepts]: Start accepts. Automaton has 1599 states and 4535 transitions. Word has length 58 [2019-12-07 12:32:25,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:25,842 INFO L462 AbstractCegarLoop]: Abstraction has 1599 states and 4535 transitions. [2019-12-07 12:32:25,843 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:32:25,843 INFO L276 IsEmpty]: Start isEmpty. Operand 1599 states and 4535 transitions. [2019-12-07 12:32:25,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 12:32:25,844 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:25,845 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:25,845 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:25,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:25,845 INFO L82 PathProgramCache]: Analyzing trace with hash -2139138521, now seen corresponding path program 2 times [2019-12-07 12:32:25,845 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:25,845 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [781220579] [2019-12-07 12:32:25,845 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:25,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:25,903 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:25,904 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [781220579] [2019-12-07 12:32:25,904 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:25,904 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:32:25,904 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [509608340] [2019-12-07 12:32:25,904 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:32:25,904 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:25,904 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:32:25,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:32:25,905 INFO L87 Difference]: Start difference. First operand 1599 states and 4535 transitions. Second operand 6 states. [2019-12-07 12:32:26,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:26,128 INFO L93 Difference]: Finished difference Result 2377 states and 6739 transitions. [2019-12-07 12:32:26,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:32:26,128 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-07 12:32:26,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:26,130 INFO L225 Difference]: With dead ends: 2377 [2019-12-07 12:32:26,130 INFO L226 Difference]: Without dead ends: 2377 [2019-12-07 12:32:26,131 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:32:26,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2377 states. [2019-12-07 12:32:26,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2377 to 1743. [2019-12-07 12:32:26,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1743 states. [2019-12-07 12:32:26,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1743 states to 1743 states and 4963 transitions. [2019-12-07 12:32:26,152 INFO L78 Accepts]: Start accepts. Automaton has 1743 states and 4963 transitions. Word has length 58 [2019-12-07 12:32:26,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:26,152 INFO L462 AbstractCegarLoop]: Abstraction has 1743 states and 4963 transitions. [2019-12-07 12:32:26,152 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:32:26,152 INFO L276 IsEmpty]: Start isEmpty. Operand 1743 states and 4963 transitions. [2019-12-07 12:32:26,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 12:32:26,154 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:26,154 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:26,154 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:26,155 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:26,155 INFO L82 PathProgramCache]: Analyzing trace with hash -1500936233, now seen corresponding path program 3 times [2019-12-07 12:32:26,155 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:26,155 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [505257588] [2019-12-07 12:32:26,155 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:26,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:26,215 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:26,215 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [505257588] [2019-12-07 12:32:26,216 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:26,216 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:32:26,216 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1712034478] [2019-12-07 12:32:26,216 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:32:26,216 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:26,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:32:26,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:32:26,217 INFO L87 Difference]: Start difference. First operand 1743 states and 4963 transitions. Second operand 6 states. [2019-12-07 12:32:26,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:26,401 INFO L93 Difference]: Finished difference Result 2557 states and 7219 transitions. [2019-12-07 12:32:26,402 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 12:32:26,402 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-07 12:32:26,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:26,404 INFO L225 Difference]: With dead ends: 2557 [2019-12-07 12:32:26,404 INFO L226 Difference]: Without dead ends: 2557 [2019-12-07 12:32:26,404 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:32:26,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2557 states. [2019-12-07 12:32:26,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2557 to 1903. [2019-12-07 12:32:26,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1903 states. [2019-12-07 12:32:26,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1903 states to 1903 states and 5419 transitions. [2019-12-07 12:32:26,424 INFO L78 Accepts]: Start accepts. Automaton has 1903 states and 5419 transitions. Word has length 58 [2019-12-07 12:32:26,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:26,425 INFO L462 AbstractCegarLoop]: Abstraction has 1903 states and 5419 transitions. [2019-12-07 12:32:26,425 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:32:26,425 INFO L276 IsEmpty]: Start isEmpty. Operand 1903 states and 5419 transitions. [2019-12-07 12:32:26,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 12:32:26,427 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:26,427 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:26,427 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:26,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:26,427 INFO L82 PathProgramCache]: Analyzing trace with hash -774913423, now seen corresponding path program 4 times [2019-12-07 12:32:26,427 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:26,428 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1640835685] [2019-12-07 12:32:26,428 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:26,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:26,472 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:26,472 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1640835685] [2019-12-07 12:32:26,472 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:26,472 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:32:26,472 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1428477015] [2019-12-07 12:32:26,473 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:32:26,473 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:26,473 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:32:26,473 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:26,473 INFO L87 Difference]: Start difference. First operand 1903 states and 5419 transitions. Second operand 3 states. [2019-12-07 12:32:26,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:26,504 INFO L93 Difference]: Finished difference Result 1903 states and 5418 transitions. [2019-12-07 12:32:26,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:32:26,504 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 12:32:26,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:26,506 INFO L225 Difference]: With dead ends: 1903 [2019-12-07 12:32:26,506 INFO L226 Difference]: Without dead ends: 1903 [2019-12-07 12:32:26,506 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:26,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1903 states. [2019-12-07 12:32:26,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1903 to 1314. [2019-12-07 12:32:26,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1314 states. [2019-12-07 12:32:26,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1314 states to 1314 states and 3752 transitions. [2019-12-07 12:32:26,522 INFO L78 Accepts]: Start accepts. Automaton has 1314 states and 3752 transitions. Word has length 58 [2019-12-07 12:32:26,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:26,522 INFO L462 AbstractCegarLoop]: Abstraction has 1314 states and 3752 transitions. [2019-12-07 12:32:26,522 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:32:26,522 INFO L276 IsEmpty]: Start isEmpty. Operand 1314 states and 3752 transitions. [2019-12-07 12:32:26,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 12:32:26,525 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:26,525 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:26,525 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:26,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:26,525 INFO L82 PathProgramCache]: Analyzing trace with hash -248733535, now seen corresponding path program 1 times [2019-12-07 12:32:26,526 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:26,526 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [714820360] [2019-12-07 12:32:26,526 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:26,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:26,573 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:26,573 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [714820360] [2019-12-07 12:32:26,573 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:26,573 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:32:26,573 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [955469115] [2019-12-07 12:32:26,574 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:32:26,574 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:26,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:32:26,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:26,574 INFO L87 Difference]: Start difference. First operand 1314 states and 3752 transitions. Second operand 3 states. [2019-12-07 12:32:26,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:26,587 INFO L93 Difference]: Finished difference Result 1246 states and 3480 transitions. [2019-12-07 12:32:26,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:32:26,587 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 12:32:26,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:26,588 INFO L225 Difference]: With dead ends: 1246 [2019-12-07 12:32:26,589 INFO L226 Difference]: Without dead ends: 1246 [2019-12-07 12:32:26,589 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:26,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1246 states. [2019-12-07 12:32:26,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1246 to 1182. [2019-12-07 12:32:26,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1182 states. [2019-12-07 12:32:26,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1182 states to 1182 states and 3296 transitions. [2019-12-07 12:32:26,601 INFO L78 Accepts]: Start accepts. Automaton has 1182 states and 3296 transitions. Word has length 59 [2019-12-07 12:32:26,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:26,601 INFO L462 AbstractCegarLoop]: Abstraction has 1182 states and 3296 transitions. [2019-12-07 12:32:26,601 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:32:26,601 INFO L276 IsEmpty]: Start isEmpty. Operand 1182 states and 3296 transitions. [2019-12-07 12:32:26,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 12:32:26,602 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:26,602 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:26,603 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:26,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:26,603 INFO L82 PathProgramCache]: Analyzing trace with hash 1978644192, now seen corresponding path program 1 times [2019-12-07 12:32:26,603 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:26,603 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [280849219] [2019-12-07 12:32:26,603 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:26,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:26,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:26,819 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [280849219] [2019-12-07 12:32:26,819 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:26,819 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 12:32:26,819 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [729013855] [2019-12-07 12:32:26,820 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 12:32:26,820 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:26,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 12:32:26,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:32:26,820 INFO L87 Difference]: Start difference. First operand 1182 states and 3296 transitions. Second operand 13 states. [2019-12-07 12:32:27,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:27,372 INFO L93 Difference]: Finished difference Result 2871 states and 7279 transitions. [2019-12-07 12:32:27,373 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 12:32:27,373 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 60 [2019-12-07 12:32:27,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:27,374 INFO L225 Difference]: With dead ends: 2871 [2019-12-07 12:32:27,374 INFO L226 Difference]: Without dead ends: 1739 [2019-12-07 12:32:27,375 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=191, Invalid=511, Unknown=0, NotChecked=0, Total=702 [2019-12-07 12:32:27,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1739 states. [2019-12-07 12:32:27,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1739 to 1056. [2019-12-07 12:32:27,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1056 states. [2019-12-07 12:32:27,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1056 states to 1056 states and 2872 transitions. [2019-12-07 12:32:27,388 INFO L78 Accepts]: Start accepts. Automaton has 1056 states and 2872 transitions. Word has length 60 [2019-12-07 12:32:27,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:27,388 INFO L462 AbstractCegarLoop]: Abstraction has 1056 states and 2872 transitions. [2019-12-07 12:32:27,388 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 12:32:27,388 INFO L276 IsEmpty]: Start isEmpty. Operand 1056 states and 2872 transitions. [2019-12-07 12:32:27,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 12:32:27,390 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:27,390 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:27,390 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:27,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:27,390 INFO L82 PathProgramCache]: Analyzing trace with hash 1465585068, now seen corresponding path program 2 times [2019-12-07 12:32:27,390 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:27,390 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1750887289] [2019-12-07 12:32:27,390 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:27,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:27,476 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:27,476 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1750887289] [2019-12-07 12:32:27,476 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:27,477 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:32:27,477 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1267251335] [2019-12-07 12:32:27,477 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:32:27,477 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:27,477 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:32:27,477 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:32:27,478 INFO L87 Difference]: Start difference. First operand 1056 states and 2872 transitions. Second operand 6 states. [2019-12-07 12:32:27,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:27,538 INFO L93 Difference]: Finished difference Result 1825 states and 4561 transitions. [2019-12-07 12:32:27,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 12:32:27,538 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-12-07 12:32:27,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:27,539 INFO L225 Difference]: With dead ends: 1825 [2019-12-07 12:32:27,540 INFO L226 Difference]: Without dead ends: 1009 [2019-12-07 12:32:27,540 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 12:32:27,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1009 states. [2019-12-07 12:32:27,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1009 to 777. [2019-12-07 12:32:27,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 777 states. [2019-12-07 12:32:27,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 777 states to 777 states and 1851 transitions. [2019-12-07 12:32:27,548 INFO L78 Accepts]: Start accepts. Automaton has 777 states and 1851 transitions. Word has length 60 [2019-12-07 12:32:27,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:27,548 INFO L462 AbstractCegarLoop]: Abstraction has 777 states and 1851 transitions. [2019-12-07 12:32:27,548 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:32:27,549 INFO L276 IsEmpty]: Start isEmpty. Operand 777 states and 1851 transitions. [2019-12-07 12:32:27,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 12:32:27,549 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:27,550 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:27,550 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:27,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:27,550 INFO L82 PathProgramCache]: Analyzing trace with hash -665728346, now seen corresponding path program 3 times [2019-12-07 12:32:27,550 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:27,550 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [22204240] [2019-12-07 12:32:27,550 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:27,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:27,604 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:27,604 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [22204240] [2019-12-07 12:32:27,605 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:27,605 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:32:27,605 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2066493174] [2019-12-07 12:32:27,605 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:32:27,605 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:27,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:32:27,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:32:27,605 INFO L87 Difference]: Start difference. First operand 777 states and 1851 transitions. Second operand 5 states. [2019-12-07 12:32:27,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:27,639 INFO L93 Difference]: Finished difference Result 962 states and 2178 transitions. [2019-12-07 12:32:27,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:32:27,639 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 60 [2019-12-07 12:32:27,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:27,640 INFO L225 Difference]: With dead ends: 962 [2019-12-07 12:32:27,640 INFO L226 Difference]: Without dead ends: 232 [2019-12-07 12:32:27,640 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:32:27,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2019-12-07 12:32:27,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 232. [2019-12-07 12:32:27,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2019-12-07 12:32:27,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 410 transitions. [2019-12-07 12:32:27,643 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 410 transitions. Word has length 60 [2019-12-07 12:32:27,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:27,643 INFO L462 AbstractCegarLoop]: Abstraction has 232 states and 410 transitions. [2019-12-07 12:32:27,643 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:32:27,643 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 410 transitions. [2019-12-07 12:32:27,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 12:32:27,644 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:27,644 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:27,644 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:27,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:27,644 INFO L82 PathProgramCache]: Analyzing trace with hash 1097199394, now seen corresponding path program 4 times [2019-12-07 12:32:27,644 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:27,645 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1316239256] [2019-12-07 12:32:27,645 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:27,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:27,871 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:27,871 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1316239256] [2019-12-07 12:32:27,872 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:27,872 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 12:32:27,872 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1467524300] [2019-12-07 12:32:27,872 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 12:32:27,872 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:27,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 12:32:27,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2019-12-07 12:32:27,873 INFO L87 Difference]: Start difference. First operand 232 states and 410 transitions. Second operand 14 states. [2019-12-07 12:32:28,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:28,249 INFO L93 Difference]: Finished difference Result 402 states and 693 transitions. [2019-12-07 12:32:28,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 12:32:28,249 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 60 [2019-12-07 12:32:28,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:28,249 INFO L225 Difference]: With dead ends: 402 [2019-12-07 12:32:28,250 INFO L226 Difference]: Without dead ends: 374 [2019-12-07 12:32:28,250 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=100, Invalid=452, Unknown=0, NotChecked=0, Total=552 [2019-12-07 12:32:28,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 374 states. [2019-12-07 12:32:28,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 374 to 328. [2019-12-07 12:32:28,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328 states. [2019-12-07 12:32:28,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 574 transitions. [2019-12-07 12:32:28,253 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 574 transitions. Word has length 60 [2019-12-07 12:32:28,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:28,253 INFO L462 AbstractCegarLoop]: Abstraction has 328 states and 574 transitions. [2019-12-07 12:32:28,253 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 12:32:28,253 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 574 transitions. [2019-12-07 12:32:28,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 12:32:28,253 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:28,253 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:28,254 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:28,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:28,254 INFO L82 PathProgramCache]: Analyzing trace with hash -1151648330, now seen corresponding path program 5 times [2019-12-07 12:32:28,254 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:28,254 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1528120524] [2019-12-07 12:32:28,254 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:28,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:28,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:28,455 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1528120524] [2019-12-07 12:32:28,455 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:28,455 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 12:32:28,455 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1648211358] [2019-12-07 12:32:28,455 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 12:32:28,456 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:28,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 12:32:28,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2019-12-07 12:32:28,456 INFO L87 Difference]: Start difference. First operand 328 states and 574 transitions. Second operand 14 states. [2019-12-07 12:32:28,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:28,826 INFO L93 Difference]: Finished difference Result 458 states and 779 transitions. [2019-12-07 12:32:28,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 12:32:28,826 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 60 [2019-12-07 12:32:28,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:28,827 INFO L225 Difference]: With dead ends: 458 [2019-12-07 12:32:28,827 INFO L226 Difference]: Without dead ends: 430 [2019-12-07 12:32:28,827 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=106, Invalid=494, Unknown=0, NotChecked=0, Total=600 [2019-12-07 12:32:28,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states. [2019-12-07 12:32:28,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 332. [2019-12-07 12:32:28,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 332 states. [2019-12-07 12:32:28,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 332 states to 332 states and 581 transitions. [2019-12-07 12:32:28,830 INFO L78 Accepts]: Start accepts. Automaton has 332 states and 581 transitions. Word has length 60 [2019-12-07 12:32:28,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:28,830 INFO L462 AbstractCegarLoop]: Abstraction has 332 states and 581 transitions. [2019-12-07 12:32:28,830 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 12:32:28,830 INFO L276 IsEmpty]: Start isEmpty. Operand 332 states and 581 transitions. [2019-12-07 12:32:28,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 12:32:28,831 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:28,831 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:28,831 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:28,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:28,831 INFO L82 PathProgramCache]: Analyzing trace with hash -2140500766, now seen corresponding path program 6 times [2019-12-07 12:32:28,831 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:28,831 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [536668127] [2019-12-07 12:32:28,832 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:28,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:28,979 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:28,979 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [536668127] [2019-12-07 12:32:28,980 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:28,980 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 12:32:28,980 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [802718023] [2019-12-07 12:32:28,980 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 12:32:28,980 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:28,980 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 12:32:28,980 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:32:28,980 INFO L87 Difference]: Start difference. First operand 332 states and 581 transitions. Second operand 13 states. [2019-12-07 12:32:29,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:29,174 INFO L93 Difference]: Finished difference Result 446 states and 758 transitions. [2019-12-07 12:32:29,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 12:32:29,175 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 60 [2019-12-07 12:32:29,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:29,175 INFO L225 Difference]: With dead ends: 446 [2019-12-07 12:32:29,175 INFO L226 Difference]: Without dead ends: 418 [2019-12-07 12:32:29,175 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=80, Invalid=300, Unknown=0, NotChecked=0, Total=380 [2019-12-07 12:32:29,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 418 states. [2019-12-07 12:32:29,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 418 to 340. [2019-12-07 12:32:29,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 340 states. [2019-12-07 12:32:29,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 595 transitions. [2019-12-07 12:32:29,178 INFO L78 Accepts]: Start accepts. Automaton has 340 states and 595 transitions. Word has length 60 [2019-12-07 12:32:29,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:29,178 INFO L462 AbstractCegarLoop]: Abstraction has 340 states and 595 transitions. [2019-12-07 12:32:29,178 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 12:32:29,178 INFO L276 IsEmpty]: Start isEmpty. Operand 340 states and 595 transitions. [2019-12-07 12:32:29,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 12:32:29,179 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:29,179 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:29,179 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:29,179 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:29,180 INFO L82 PathProgramCache]: Analyzing trace with hash -1858118138, now seen corresponding path program 7 times [2019-12-07 12:32:29,180 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:29,180 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2074804970] [2019-12-07 12:32:29,180 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:29,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:32:29,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:32:29,269 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:32:29,270 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 12:32:29,272 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] ULTIMATE.startENTRY-->L831: Formula: (let ((.cse0 (store |v_#valid_75| 0 0))) (and (= 0 v_~z$flush_delayed~0_54) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1269~0.base_21| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1269~0.base_21|) |v_ULTIMATE.start_main_~#t1269~0.offset_17| 0)) |v_#memory_int_23|) (= |v_#NULL.offset_7| 0) (= v_~z$w_buff1_used~0_609 0) (= 0 v_~z$r_buff1_thd3~0_278) (= v_~z$w_buff0_used~0_830 0) (= v_~z$r_buff0_thd1~0_77 0) (= v_~x~0_53 0) (< 0 |v_#StackHeapBarrier_21|) (= v_~z$w_buff0~0_376 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1269~0.base_21| 1) |v_#valid_73|) (= v_~z$r_buff0_thd0~0_415 0) (= v_~z$read_delayed~0_5 0) (= 0 v_~weak$$choice0~0_32) (= v_~z$read_delayed_var~0.base_5 0) (= v_~z$w_buff1~0_367 0) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1269~0.base_21|) (= v_~weak$$choice2~0_172 0) (= v_~z$r_buff1_thd2~0_207 0) (= v_~z$r_buff1_thd1~0_207 0) (= v_~z$read_delayed_var~0.offset_5 0) (= v_~y~0_52 0) (= 0 v_~z$r_buff1_thd4~0_260) (= v_~z$mem_tmp~0_37 0) (= 0 v_~z$r_buff0_thd3~0_189) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1269~0.base_21|)) (= v_~__unbuffered_cnt~0_145 0) (= 0 |v_#NULL.base_7|) (= v_~main$tmp_guard0~0_21 0) (= v_~z~0_157 0) (= v_~a~0_207 0) (= 0 v_~z$r_buff0_thd4~0_332) (= 0 v_~__unbuffered_p3_EBX~0_219) (= v_~z$r_buff0_thd2~0_78 0) (= v_~main$tmp_guard1~0_24 0) (= v_~z$r_buff1_thd0~0_431 0) (= v_~b~0_98 0) (= |v_ULTIMATE.start_main_~#t1269~0.offset_17| 0) (= v_~__unbuffered_p3_EAX~0_219 0) (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t1269~0.base_21| 4) |v_#length_29|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_24|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_~#t1271~0.base=|v_ULTIMATE.start_main_~#t1271~0.base_22|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_42|, ULTIMATE.start_main_~#t1270~0.offset=|v_ULTIMATE.start_main_~#t1270~0.offset_18|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_207, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_72|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_33|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_40|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_35|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_134|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_39|, ~a~0=v_~a~0_207, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_415, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_332, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_219, #length=|v_#length_29|, ~z$mem_tmp~0=v_~z$mem_tmp~0_37, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_66|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_609, ULTIMATE.start_main_~#t1270~0.base=|v_ULTIMATE.start_main_~#t1270~0.base_23|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ~z$flush_delayed~0=v_~z$flush_delayed~0_54, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_52|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_76|, ~weak$$choice0~0=v_~weak$$choice0~0_32, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_40|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_207, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_9|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_5, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_189, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_145, ~x~0=v_~x~0_53, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_260, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ~z$read_delayed~0=v_~z$read_delayed~0_5, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_42|, ~z$w_buff1~0=v_~z$w_buff1~0_367, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_30|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_5, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_44|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_34|, ULTIMATE.start_main_~#t1269~0.base=|v_ULTIMATE.start_main_~#t1269~0.base_21|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_42|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_48|, ULTIMATE.start_main_~#t1272~0.base=|v_ULTIMATE.start_main_~#t1272~0.base_23|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_431, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_56|, ULTIMATE.start_main_~#t1272~0.offset=|v_ULTIMATE.start_main_~#t1272~0.offset_18|, ~y~0=v_~y~0_52, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_78, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_830, ~z$w_buff0~0=v_~z$w_buff0~0_376, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_30|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_56|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_278, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_~#t1269~0.offset=|v_ULTIMATE.start_main_~#t1269~0.offset_17|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_82|, ULTIMATE.start_main_~#t1271~0.offset=|v_ULTIMATE.start_main_~#t1271~0.offset_18|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_219, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_55|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_70|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_34|, ~b~0=v_~b~0_98, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_9|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_20|, ~z~0=v_~z~0_157, ~weak$$choice2~0=v_~weak$$choice2~0_172, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_77} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1271~0.base, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1270~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_~#t1270~0.base, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t1269~0.base, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1272~0.base, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ULTIMATE.start_main_~#t1272~0.offset, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_~#t1269~0.offset, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t1271~0.offset, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:32:29,273 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L831-1-->L833: Formula: (and (= (store |v_#valid_45| |v_ULTIMATE.start_main_~#t1270~0.base_13| 1) |v_#valid_44|) (not (= |v_ULTIMATE.start_main_~#t1270~0.base_13| 0)) (= (select |v_#valid_45| |v_ULTIMATE.start_main_~#t1270~0.base_13|) 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1270~0.base_13|) (= |v_ULTIMATE.start_main_~#t1270~0.offset_11| 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1270~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1270~0.base_13|) |v_ULTIMATE.start_main_~#t1270~0.offset_11| 1)) |v_#memory_int_15|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1270~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_16|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t1270~0.offset=|v_ULTIMATE.start_main_~#t1270~0.offset_11|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, ULTIMATE.start_main_~#t1270~0.base=|v_ULTIMATE.start_main_~#t1270~0.base_13|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1270~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1270~0.base, #length] because there is no mapped edge [2019-12-07 12:32:29,273 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L833-1-->L835: Formula: (and (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1271~0.base_11|)) (= |v_ULTIMATE.start_main_~#t1271~0.offset_10| 0) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t1271~0.base_11| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1271~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1271~0.base_11|) |v_ULTIMATE.start_main_~#t1271~0.offset_10| 2)) |v_#memory_int_13|) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1271~0.base_11| 1)) (not (= |v_ULTIMATE.start_main_~#t1271~0.base_11| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1271~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_~#t1271~0.base=|v_ULTIMATE.start_main_~#t1271~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_6|, #length=|v_#length_19|, ULTIMATE.start_main_~#t1271~0.offset=|v_ULTIMATE.start_main_~#t1271~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1271~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1271~0.offset] because there is no mapped edge [2019-12-07 12:32:29,273 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L835-1-->L837: Formula: (and (= (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1272~0.base_13| 1) |v_#valid_46|) (not (= 0 |v_ULTIMATE.start_main_~#t1272~0.base_13|)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1272~0.base_13| 4)) (= |v_ULTIMATE.start_main_~#t1272~0.offset_11| 0) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1272~0.base_13|) 0) (= |v_#memory_int_17| (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1272~0.base_13| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1272~0.base_13|) |v_ULTIMATE.start_main_~#t1272~0.offset_11| 3))) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1272~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1272~0.base=|v_ULTIMATE.start_main_~#t1272~0.base_13|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1272~0.offset=|v_ULTIMATE.start_main_~#t1272~0.offset_11|, #length=|v_#length_23|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1272~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t1272~0.offset, #length, ULTIMATE.start_main_#t~nondet17] because there is no mapped edge [2019-12-07 12:32:29,274 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L4-->L808: Formula: (and (= v_~z$r_buff0_thd4~0_36 1) (= v_~z$r_buff1_thd2~0_8 v_~z$r_buff0_thd2~0_7) (= v_~z$r_buff0_thd0~0_114 v_~z$r_buff1_thd0~0_75) (= 1 v_~a~0_7) (= v_~z$r_buff0_thd4~0_37 v_~z$r_buff1_thd4~0_34) (= v_~__unbuffered_p3_EAX~0_8 v_~a~0_7) (= v_~z$r_buff1_thd1~0_8 v_~z$r_buff0_thd1~0_7) (= v_~z$r_buff0_thd3~0_42 v_~z$r_buff1_thd3~0_34) (= v_~b~0_17 v_~__unbuffered_p3_EBX~0_8) (not (= v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_16 0))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_16, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_114, ~b~0=v_~b~0_17, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_37, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_42, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_7, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_7} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_16, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_34, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_34, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_8, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_8, ~a~0=v_~a~0_7, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_114, ~b~0=v_~b~0_17, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_75, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_8, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_8, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_36, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_42, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_7, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_7} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 12:32:29,275 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_9|) (= v_~b~0_62 1) (= |v_P0Thread1of1ForFork0_#res.offset_9| 0) (= v_P0Thread1of1ForFork0_~arg.offset_19 |v_P0Thread1of1ForFork0_#in~arg.offset_21|) (= v_P0Thread1of1ForFork0_~arg.base_19 |v_P0Thread1of1ForFork0_#in~arg.base_21|) (= v_~__unbuffered_cnt~0_119 (+ v_~__unbuffered_cnt~0_120 1)) (= v_~x~0_42 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_120} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_9|, ~b~0=v_~b~0_62, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_119, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_19, ~x~0=v_~x~0_42, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_19} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, ~x~0, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 12:32:29,275 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_12 |v_P1Thread1of1ForFork1_#in~arg.base_14|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_14| v_P1Thread1of1ForFork1_~arg.offset_12) (= v_~y~0_33 1) (= v_~x~0_29 2) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_12, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_12, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, ~y~0=v_~y~0_33, ~x~0=v_~x~0_29, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~y~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:32:29,276 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L809-->L809-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd4~0_In-1507998462 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1507998462 256) 0))) (or (and (= |P3Thread1of1ForFork3_#t~ite11_Out-1507998462| ~z$w_buff0_used~0_In-1507998462) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P3Thread1of1ForFork3_#t~ite11_Out-1507998462| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1507998462, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1507998462} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1507998462, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1507998462, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out-1507998462|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 12:32:29,277 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L810-->L810-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd4~0_In993443310 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In993443310 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In993443310 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd4~0_In993443310 256) 0))) (or (and (= 0 |P3Thread1of1ForFork3_#t~ite12_Out993443310|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In993443310 |P3Thread1of1ForFork3_#t~ite12_Out993443310|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In993443310, ~z$w_buff0_used~0=~z$w_buff0_used~0_In993443310, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In993443310, ~z$w_buff1_used~0=~z$w_buff1_used~0_In993443310} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In993443310, ~z$w_buff0_used~0=~z$w_buff0_used~0_In993443310, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In993443310, ~z$w_buff1_used~0=~z$w_buff1_used~0_In993443310, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out993443310|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 12:32:29,277 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L772-2-->L772-4: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In1112386997 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1112386997 256)))) (or (and (= ~z~0_In1112386997 |P2Thread1of1ForFork2_#t~ite3_Out1112386997|) (or .cse0 .cse1)) (and (= ~z$w_buff1~0_In1112386997 |P2Thread1of1ForFork2_#t~ite3_Out1112386997|) (not .cse0) (not .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1112386997, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1112386997, ~z$w_buff1~0=~z$w_buff1~0_In1112386997, ~z~0=~z~0_In1112386997} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out1112386997|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1112386997, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1112386997, ~z$w_buff1~0=~z$w_buff1~0_In1112386997, ~z~0=~z~0_In1112386997} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 12:32:29,277 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [663] [663] L772-4-->L773: Formula: (= v_~z~0_32 |v_P2Thread1of1ForFork2_#t~ite3_8|) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_8|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_13|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_7|, ~z~0=v_~z~0_32} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 12:32:29,277 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L773-->L773-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1993621345 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1993621345 256) 0))) (or (and (= ~z$w_buff0_used~0_In-1993621345 |P2Thread1of1ForFork2_#t~ite5_Out-1993621345|) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork2_#t~ite5_Out-1993621345|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1993621345, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1993621345} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1993621345|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1993621345, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1993621345} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 12:32:29,277 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1570523254 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1570523254 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-1570523254 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-1570523254 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite6_Out-1570523254|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In-1570523254 |P2Thread1of1ForFork2_#t~ite6_Out-1570523254|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1570523254, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1570523254, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1570523254, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1570523254} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out-1570523254|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1570523254, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1570523254, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1570523254, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1570523254} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 12:32:29,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L775-->L775-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1208392937 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1208392937 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite7_Out1208392937| ~z$r_buff0_thd3~0_In1208392937) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite7_Out1208392937|) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1208392937, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1208392937} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1208392937, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1208392937, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out1208392937|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 12:32:29,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L776-->L776-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1506082038 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1506082038 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1506082038 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In1506082038 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite8_Out1506082038| 0)) (and (= ~z$r_buff1_thd3~0_In1506082038 |P2Thread1of1ForFork2_#t~ite8_Out1506082038|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1506082038, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1506082038, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1506082038, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1506082038} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1506082038, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1506082038, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1506082038, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1506082038, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out1506082038|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 12:32:29,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L776-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_34| v_~z$r_buff1_thd3~0_64) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_34|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_64, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_33|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 12:32:29,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L811-->L812: Formula: (let ((.cse0 (= ~z$r_buff0_thd4~0_Out-1602225985 ~z$r_buff0_thd4~0_In-1602225985)) (.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In-1602225985 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1602225985 256)))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse2) (= ~z$r_buff0_thd4~0_Out-1602225985 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1602225985, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1602225985} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1602225985, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-1602225985, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out-1602225985|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 12:32:29,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L812-->L812-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd4~0_In-1094715 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1094715 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd4~0_In-1094715 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1094715 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P3Thread1of1ForFork3_#t~ite14_Out-1094715| ~z$r_buff1_thd4~0_In-1094715)) (and (= 0 |P3Thread1of1ForFork3_#t~ite14_Out-1094715|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1094715, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1094715, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1094715, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1094715} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1094715, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1094715, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out-1094715|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1094715, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1094715} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 12:32:29,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L812-2-->P3EXIT: Formula: (and (= v_~__unbuffered_cnt~0_107 (+ v_~__unbuffered_cnt~0_108 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|) (= |v_P3Thread1of1ForFork3_#t~ite14_44| v_~z$r_buff1_thd4~0_75)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_44|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_108} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_75, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_43|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_107, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 12:32:29,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L837-1-->L843: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_62) 1 0)) 0 1) v_~main$tmp_guard0~0_8)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_8|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 12:32:29,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L843-2-->L843-5: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd0~0_In1426986990 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1426986990 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite19_Out1426986990| |ULTIMATE.start_main_#t~ite20_Out1426986990|))) (or (and (or .cse0 .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite19_Out1426986990| ~z~0_In1426986990)) (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite19_Out1426986990| ~z$w_buff1~0_In1426986990)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1426986990, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1426986990, ~z$w_buff1~0=~z$w_buff1~0_In1426986990, ~z~0=~z~0_In1426986990} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1426986990|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1426986990, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1426986990, ~z$w_buff1~0=~z$w_buff1~0_In1426986990, ~z~0=~z~0_In1426986990, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1426986990|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 12:32:29,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L844-->L844-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-439240541 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-439240541 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out-439240541| ~z$w_buff0_used~0_In-439240541) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite21_Out-439240541| 0) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-439240541, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-439240541} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-439240541, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-439240541, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-439240541|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 12:32:29,280 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L845-->L845-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd0~0_In-1967375316 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1967375316 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1967375316 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1967375316 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite22_Out-1967375316|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In-1967375316 |ULTIMATE.start_main_#t~ite22_Out-1967375316|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1967375316, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1967375316, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1967375316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1967375316} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1967375316, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1967375316, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1967375316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1967375316, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1967375316|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 12:32:29,280 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1918039402 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In1918039402 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In1918039402 |ULTIMATE.start_main_#t~ite23_Out1918039402|)) (and (= 0 |ULTIMATE.start_main_#t~ite23_Out1918039402|) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1918039402, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1918039402} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1918039402, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1918039402, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out1918039402|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 12:32:29,280 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L847-->L847-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-604318264 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-604318264 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-604318264 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-604318264 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite24_Out-604318264| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite24_Out-604318264| ~z$r_buff1_thd0~0_In-604318264) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-604318264, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-604318264, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-604318264, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-604318264} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-604318264, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-604318264, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-604318264, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-604318264|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-604318264} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 12:32:29,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L855-->L855-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1403262897 256)))) (or (and (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-1403262897 256) 0))) (or (and .cse0 (= (mod ~z$r_buff1_thd0~0_In-1403262897 256) 0)) (and .cse0 (= (mod ~z$w_buff1_used~0_In-1403262897 256) 0)) (= 0 (mod ~z$w_buff0_used~0_In-1403262897 256)))) (= ~z$w_buff0~0_In-1403262897 |ULTIMATE.start_main_#t~ite30_Out-1403262897|) .cse1 (= |ULTIMATE.start_main_#t~ite31_Out-1403262897| |ULTIMATE.start_main_#t~ite30_Out-1403262897|)) (and (not .cse1) (= ~z$w_buff0~0_In-1403262897 |ULTIMATE.start_main_#t~ite31_Out-1403262897|) (= |ULTIMATE.start_main_#t~ite30_In-1403262897| |ULTIMATE.start_main_#t~ite30_Out-1403262897|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1403262897, ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_In-1403262897|, ~z$w_buff0~0=~z$w_buff0~0_In-1403262897, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1403262897, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1403262897, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1403262897, ~weak$$choice2~0=~weak$$choice2~0_In-1403262897} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1403262897, ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-1403262897|, ~z$w_buff0~0=~z$w_buff0~0_In-1403262897, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1403262897, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1403262897, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1403262897, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-1403262897|, ~weak$$choice2~0=~weak$$choice2~0_In-1403262897} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite31] because there is no mapped edge [2019-12-07 12:32:29,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L856-->L856-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In504271730 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite33_In504271730| |ULTIMATE.start_main_#t~ite33_Out504271730|) (= |ULTIMATE.start_main_#t~ite34_Out504271730| ~z$w_buff1~0_In504271730) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite33_Out504271730| ~z$w_buff1~0_In504271730) (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In504271730 256) 0))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In504271730 256))) (= 0 (mod ~z$w_buff0_used~0_In504271730 256)) (and .cse1 (= (mod ~z$w_buff1_used~0_In504271730 256) 0)))) .cse0 (= |ULTIMATE.start_main_#t~ite34_Out504271730| |ULTIMATE.start_main_#t~ite33_Out504271730|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In504271730, ~z$w_buff0_used~0=~z$w_buff0_used~0_In504271730, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In504271730, ~z$w_buff1_used~0=~z$w_buff1_used~0_In504271730, ~z$w_buff1~0=~z$w_buff1~0_In504271730, ~weak$$choice2~0=~weak$$choice2~0_In504271730, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_In504271730|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In504271730, ~z$w_buff0_used~0=~z$w_buff0_used~0_In504271730, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In504271730, ~z$w_buff1_used~0=~z$w_buff1_used~0_In504271730, ~z$w_buff1~0=~z$w_buff1~0_In504271730, ~weak$$choice2~0=~weak$$choice2~0_In504271730, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out504271730|, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_Out504271730|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_#t~ite34] because there is no mapped edge [2019-12-07 12:32:29,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L859-->L860: Formula: (and (= v_~z$r_buff0_thd0~0_108 v_~z$r_buff0_thd0~0_107) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_108, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_107, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_9|, ~weak$$choice2~0=v_~weak$$choice2~0_33, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 12:32:29,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-275790214 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out-275790214| ~z$r_buff1_thd0~0_In-275790214) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-275790214 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In-275790214 256)) (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-275790214 256))) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-275790214 256))))) (= |ULTIMATE.start_main_#t~ite45_Out-275790214| |ULTIMATE.start_main_#t~ite46_Out-275790214|)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite46_Out-275790214| ~z$r_buff1_thd0~0_In-275790214) (= |ULTIMATE.start_main_#t~ite45_In-275790214| |ULTIMATE.start_main_#t~ite45_Out-275790214|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-275790214, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-275790214, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-275790214, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-275790214, ~weak$$choice2~0=~weak$$choice2~0_In-275790214, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In-275790214|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-275790214, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-275790214, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-275790214, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-275790214, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-275790214|, ~weak$$choice2~0=~weak$$choice2~0_In-275790214, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-275790214|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 12:32:29,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L862-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5| (mod v_~main$tmp_guard1~0_8 256)) (not (= 0 (mod v_~z$flush_delayed~0_30 256))) (= v_~z$mem_tmp~0_20 v_~z~0_83) (= 0 v_~z$flush_delayed~0_29)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_8, ~z$flush_delayed~0=v_~z$flush_delayed~0_30} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_20, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_17|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_8, ~z$flush_delayed~0=v_~z$flush_delayed~0_29, ~z~0=v_~z~0_83, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:32:29,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 12:32:29,359 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:32:29 BasicIcfg [2019-12-07 12:32:29,359 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 12:32:29,360 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:32:29,360 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:32:29,360 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:32:29,360 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:32:11" (3/4) ... [2019-12-07 12:32:29,362 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 12:32:29,363 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] ULTIMATE.startENTRY-->L831: Formula: (let ((.cse0 (store |v_#valid_75| 0 0))) (and (= 0 v_~z$flush_delayed~0_54) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1269~0.base_21| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1269~0.base_21|) |v_ULTIMATE.start_main_~#t1269~0.offset_17| 0)) |v_#memory_int_23|) (= |v_#NULL.offset_7| 0) (= v_~z$w_buff1_used~0_609 0) (= 0 v_~z$r_buff1_thd3~0_278) (= v_~z$w_buff0_used~0_830 0) (= v_~z$r_buff0_thd1~0_77 0) (= v_~x~0_53 0) (< 0 |v_#StackHeapBarrier_21|) (= v_~z$w_buff0~0_376 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1269~0.base_21| 1) |v_#valid_73|) (= v_~z$r_buff0_thd0~0_415 0) (= v_~z$read_delayed~0_5 0) (= 0 v_~weak$$choice0~0_32) (= v_~z$read_delayed_var~0.base_5 0) (= v_~z$w_buff1~0_367 0) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1269~0.base_21|) (= v_~weak$$choice2~0_172 0) (= v_~z$r_buff1_thd2~0_207 0) (= v_~z$r_buff1_thd1~0_207 0) (= v_~z$read_delayed_var~0.offset_5 0) (= v_~y~0_52 0) (= 0 v_~z$r_buff1_thd4~0_260) (= v_~z$mem_tmp~0_37 0) (= 0 v_~z$r_buff0_thd3~0_189) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1269~0.base_21|)) (= v_~__unbuffered_cnt~0_145 0) (= 0 |v_#NULL.base_7|) (= v_~main$tmp_guard0~0_21 0) (= v_~z~0_157 0) (= v_~a~0_207 0) (= 0 v_~z$r_buff0_thd4~0_332) (= 0 v_~__unbuffered_p3_EBX~0_219) (= v_~z$r_buff0_thd2~0_78 0) (= v_~main$tmp_guard1~0_24 0) (= v_~z$r_buff1_thd0~0_431 0) (= v_~b~0_98 0) (= |v_ULTIMATE.start_main_~#t1269~0.offset_17| 0) (= v_~__unbuffered_p3_EAX~0_219 0) (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t1269~0.base_21| 4) |v_#length_29|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_24|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_~#t1271~0.base=|v_ULTIMATE.start_main_~#t1271~0.base_22|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_42|, ULTIMATE.start_main_~#t1270~0.offset=|v_ULTIMATE.start_main_~#t1270~0.offset_18|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_207, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_72|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_33|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_40|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_35|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_134|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_39|, ~a~0=v_~a~0_207, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_415, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_332, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_219, #length=|v_#length_29|, ~z$mem_tmp~0=v_~z$mem_tmp~0_37, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_66|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_609, ULTIMATE.start_main_~#t1270~0.base=|v_ULTIMATE.start_main_~#t1270~0.base_23|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ~z$flush_delayed~0=v_~z$flush_delayed~0_54, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_52|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_76|, ~weak$$choice0~0=v_~weak$$choice0~0_32, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_40|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_207, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_9|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_5, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_189, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_145, ~x~0=v_~x~0_53, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_260, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ~z$read_delayed~0=v_~z$read_delayed~0_5, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_42|, ~z$w_buff1~0=v_~z$w_buff1~0_367, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_30|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_5, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_44|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_34|, ULTIMATE.start_main_~#t1269~0.base=|v_ULTIMATE.start_main_~#t1269~0.base_21|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_42|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_48|, ULTIMATE.start_main_~#t1272~0.base=|v_ULTIMATE.start_main_~#t1272~0.base_23|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_431, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_56|, ULTIMATE.start_main_~#t1272~0.offset=|v_ULTIMATE.start_main_~#t1272~0.offset_18|, ~y~0=v_~y~0_52, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_78, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_830, ~z$w_buff0~0=v_~z$w_buff0~0_376, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_30|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_56|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_278, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_~#t1269~0.offset=|v_ULTIMATE.start_main_~#t1269~0.offset_17|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_82|, ULTIMATE.start_main_~#t1271~0.offset=|v_ULTIMATE.start_main_~#t1271~0.offset_18|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_219, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_55|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_70|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_34|, ~b~0=v_~b~0_98, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_9|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_20|, ~z~0=v_~z~0_157, ~weak$$choice2~0=v_~weak$$choice2~0_172, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_77} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1271~0.base, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1270~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_~#t1270~0.base, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t1269~0.base, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1272~0.base, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ULTIMATE.start_main_~#t1272~0.offset, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_~#t1269~0.offset, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t1271~0.offset, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:32:29,363 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L831-1-->L833: Formula: (and (= (store |v_#valid_45| |v_ULTIMATE.start_main_~#t1270~0.base_13| 1) |v_#valid_44|) (not (= |v_ULTIMATE.start_main_~#t1270~0.base_13| 0)) (= (select |v_#valid_45| |v_ULTIMATE.start_main_~#t1270~0.base_13|) 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1270~0.base_13|) (= |v_ULTIMATE.start_main_~#t1270~0.offset_11| 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1270~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1270~0.base_13|) |v_ULTIMATE.start_main_~#t1270~0.offset_11| 1)) |v_#memory_int_15|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1270~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_16|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t1270~0.offset=|v_ULTIMATE.start_main_~#t1270~0.offset_11|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, ULTIMATE.start_main_~#t1270~0.base=|v_ULTIMATE.start_main_~#t1270~0.base_13|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1270~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1270~0.base, #length] because there is no mapped edge [2019-12-07 12:32:29,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L833-1-->L835: Formula: (and (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1271~0.base_11|)) (= |v_ULTIMATE.start_main_~#t1271~0.offset_10| 0) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t1271~0.base_11| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1271~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1271~0.base_11|) |v_ULTIMATE.start_main_~#t1271~0.offset_10| 2)) |v_#memory_int_13|) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1271~0.base_11| 1)) (not (= |v_ULTIMATE.start_main_~#t1271~0.base_11| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1271~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_~#t1271~0.base=|v_ULTIMATE.start_main_~#t1271~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_6|, #length=|v_#length_19|, ULTIMATE.start_main_~#t1271~0.offset=|v_ULTIMATE.start_main_~#t1271~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1271~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1271~0.offset] because there is no mapped edge [2019-12-07 12:32:29,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L835-1-->L837: Formula: (and (= (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1272~0.base_13| 1) |v_#valid_46|) (not (= 0 |v_ULTIMATE.start_main_~#t1272~0.base_13|)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1272~0.base_13| 4)) (= |v_ULTIMATE.start_main_~#t1272~0.offset_11| 0) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1272~0.base_13|) 0) (= |v_#memory_int_17| (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1272~0.base_13| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1272~0.base_13|) |v_ULTIMATE.start_main_~#t1272~0.offset_11| 3))) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1272~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1272~0.base=|v_ULTIMATE.start_main_~#t1272~0.base_13|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1272~0.offset=|v_ULTIMATE.start_main_~#t1272~0.offset_11|, #length=|v_#length_23|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1272~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t1272~0.offset, #length, ULTIMATE.start_main_#t~nondet17] because there is no mapped edge [2019-12-07 12:32:29,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L4-->L808: Formula: (and (= v_~z$r_buff0_thd4~0_36 1) (= v_~z$r_buff1_thd2~0_8 v_~z$r_buff0_thd2~0_7) (= v_~z$r_buff0_thd0~0_114 v_~z$r_buff1_thd0~0_75) (= 1 v_~a~0_7) (= v_~z$r_buff0_thd4~0_37 v_~z$r_buff1_thd4~0_34) (= v_~__unbuffered_p3_EAX~0_8 v_~a~0_7) (= v_~z$r_buff1_thd1~0_8 v_~z$r_buff0_thd1~0_7) (= v_~z$r_buff0_thd3~0_42 v_~z$r_buff1_thd3~0_34) (= v_~b~0_17 v_~__unbuffered_p3_EBX~0_8) (not (= v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_16 0))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_16, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_114, ~b~0=v_~b~0_17, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_37, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_42, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_7, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_7} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_16, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_34, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_34, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_8, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_8, ~a~0=v_~a~0_7, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_114, ~b~0=v_~b~0_17, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_75, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_8, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_8, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_36, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_42, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_7, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_7} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 12:32:29,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_9|) (= v_~b~0_62 1) (= |v_P0Thread1of1ForFork0_#res.offset_9| 0) (= v_P0Thread1of1ForFork0_~arg.offset_19 |v_P0Thread1of1ForFork0_#in~arg.offset_21|) (= v_P0Thread1of1ForFork0_~arg.base_19 |v_P0Thread1of1ForFork0_#in~arg.base_21|) (= v_~__unbuffered_cnt~0_119 (+ v_~__unbuffered_cnt~0_120 1)) (= v_~x~0_42 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_120} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_9|, ~b~0=v_~b~0_62, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_119, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_19, ~x~0=v_~x~0_42, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_19} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, ~x~0, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 12:32:29,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_12 |v_P1Thread1of1ForFork1_#in~arg.base_14|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_14| v_P1Thread1of1ForFork1_~arg.offset_12) (= v_~y~0_33 1) (= v_~x~0_29 2) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_12, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_12, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, ~y~0=v_~y~0_33, ~x~0=v_~x~0_29, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~y~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:32:29,366 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L809-->L809-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd4~0_In-1507998462 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1507998462 256) 0))) (or (and (= |P3Thread1of1ForFork3_#t~ite11_Out-1507998462| ~z$w_buff0_used~0_In-1507998462) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P3Thread1of1ForFork3_#t~ite11_Out-1507998462| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1507998462, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1507998462} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1507998462, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1507998462, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out-1507998462|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 12:32:29,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L810-->L810-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd4~0_In993443310 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In993443310 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In993443310 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd4~0_In993443310 256) 0))) (or (and (= 0 |P3Thread1of1ForFork3_#t~ite12_Out993443310|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In993443310 |P3Thread1of1ForFork3_#t~ite12_Out993443310|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In993443310, ~z$w_buff0_used~0=~z$w_buff0_used~0_In993443310, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In993443310, ~z$w_buff1_used~0=~z$w_buff1_used~0_In993443310} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In993443310, ~z$w_buff0_used~0=~z$w_buff0_used~0_In993443310, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In993443310, ~z$w_buff1_used~0=~z$w_buff1_used~0_In993443310, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out993443310|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 12:32:29,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L772-2-->L772-4: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In1112386997 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1112386997 256)))) (or (and (= ~z~0_In1112386997 |P2Thread1of1ForFork2_#t~ite3_Out1112386997|) (or .cse0 .cse1)) (and (= ~z$w_buff1~0_In1112386997 |P2Thread1of1ForFork2_#t~ite3_Out1112386997|) (not .cse0) (not .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1112386997, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1112386997, ~z$w_buff1~0=~z$w_buff1~0_In1112386997, ~z~0=~z~0_In1112386997} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out1112386997|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1112386997, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1112386997, ~z$w_buff1~0=~z$w_buff1~0_In1112386997, ~z~0=~z~0_In1112386997} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 12:32:29,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [663] [663] L772-4-->L773: Formula: (= v_~z~0_32 |v_P2Thread1of1ForFork2_#t~ite3_8|) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_8|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_13|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_7|, ~z~0=v_~z~0_32} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 12:32:29,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L773-->L773-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1993621345 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1993621345 256) 0))) (or (and (= ~z$w_buff0_used~0_In-1993621345 |P2Thread1of1ForFork2_#t~ite5_Out-1993621345|) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork2_#t~ite5_Out-1993621345|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1993621345, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1993621345} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1993621345|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1993621345, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1993621345} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 12:32:29,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1570523254 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1570523254 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-1570523254 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-1570523254 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite6_Out-1570523254|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In-1570523254 |P2Thread1of1ForFork2_#t~ite6_Out-1570523254|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1570523254, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1570523254, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1570523254, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1570523254} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out-1570523254|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1570523254, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1570523254, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1570523254, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1570523254} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 12:32:29,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L775-->L775-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1208392937 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1208392937 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite7_Out1208392937| ~z$r_buff0_thd3~0_In1208392937) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite7_Out1208392937|) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1208392937, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1208392937} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1208392937, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1208392937, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out1208392937|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 12:32:29,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L776-->L776-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1506082038 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1506082038 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1506082038 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In1506082038 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite8_Out1506082038| 0)) (and (= ~z$r_buff1_thd3~0_In1506082038 |P2Thread1of1ForFork2_#t~ite8_Out1506082038|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1506082038, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1506082038, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1506082038, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1506082038} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1506082038, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1506082038, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1506082038, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1506082038, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out1506082038|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 12:32:29,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L776-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_34| v_~z$r_buff1_thd3~0_64) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_34|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_64, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_33|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 12:32:29,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L811-->L812: Formula: (let ((.cse0 (= ~z$r_buff0_thd4~0_Out-1602225985 ~z$r_buff0_thd4~0_In-1602225985)) (.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In-1602225985 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1602225985 256)))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse2) (= ~z$r_buff0_thd4~0_Out-1602225985 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1602225985, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1602225985} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1602225985, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-1602225985, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out-1602225985|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 12:32:29,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L812-->L812-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd4~0_In-1094715 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1094715 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd4~0_In-1094715 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1094715 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P3Thread1of1ForFork3_#t~ite14_Out-1094715| ~z$r_buff1_thd4~0_In-1094715)) (and (= 0 |P3Thread1of1ForFork3_#t~ite14_Out-1094715|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1094715, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1094715, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1094715, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1094715} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1094715, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1094715, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out-1094715|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1094715, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1094715} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 12:32:29,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L812-2-->P3EXIT: Formula: (and (= v_~__unbuffered_cnt~0_107 (+ v_~__unbuffered_cnt~0_108 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|) (= |v_P3Thread1of1ForFork3_#t~ite14_44| v_~z$r_buff1_thd4~0_75)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_44|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_108} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_75, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_43|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_107, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 12:32:29,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L837-1-->L843: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_62) 1 0)) 0 1) v_~main$tmp_guard0~0_8)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_8|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 12:32:29,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L843-2-->L843-5: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd0~0_In1426986990 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1426986990 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite19_Out1426986990| |ULTIMATE.start_main_#t~ite20_Out1426986990|))) (or (and (or .cse0 .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite19_Out1426986990| ~z~0_In1426986990)) (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite19_Out1426986990| ~z$w_buff1~0_In1426986990)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1426986990, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1426986990, ~z$w_buff1~0=~z$w_buff1~0_In1426986990, ~z~0=~z~0_In1426986990} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1426986990|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1426986990, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1426986990, ~z$w_buff1~0=~z$w_buff1~0_In1426986990, ~z~0=~z~0_In1426986990, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1426986990|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 12:32:29,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L844-->L844-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-439240541 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-439240541 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out-439240541| ~z$w_buff0_used~0_In-439240541) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite21_Out-439240541| 0) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-439240541, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-439240541} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-439240541, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-439240541, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-439240541|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 12:32:29,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L845-->L845-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd0~0_In-1967375316 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1967375316 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1967375316 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1967375316 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite22_Out-1967375316|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In-1967375316 |ULTIMATE.start_main_#t~ite22_Out-1967375316|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1967375316, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1967375316, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1967375316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1967375316} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1967375316, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1967375316, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1967375316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1967375316, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1967375316|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 12:32:29,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1918039402 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In1918039402 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In1918039402 |ULTIMATE.start_main_#t~ite23_Out1918039402|)) (and (= 0 |ULTIMATE.start_main_#t~ite23_Out1918039402|) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1918039402, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1918039402} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1918039402, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1918039402, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out1918039402|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 12:32:29,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L847-->L847-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-604318264 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-604318264 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-604318264 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-604318264 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite24_Out-604318264| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite24_Out-604318264| ~z$r_buff1_thd0~0_In-604318264) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-604318264, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-604318264, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-604318264, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-604318264} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-604318264, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-604318264, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-604318264, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-604318264|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-604318264} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 12:32:29,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L855-->L855-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1403262897 256)))) (or (and (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-1403262897 256) 0))) (or (and .cse0 (= (mod ~z$r_buff1_thd0~0_In-1403262897 256) 0)) (and .cse0 (= (mod ~z$w_buff1_used~0_In-1403262897 256) 0)) (= 0 (mod ~z$w_buff0_used~0_In-1403262897 256)))) (= ~z$w_buff0~0_In-1403262897 |ULTIMATE.start_main_#t~ite30_Out-1403262897|) .cse1 (= |ULTIMATE.start_main_#t~ite31_Out-1403262897| |ULTIMATE.start_main_#t~ite30_Out-1403262897|)) (and (not .cse1) (= ~z$w_buff0~0_In-1403262897 |ULTIMATE.start_main_#t~ite31_Out-1403262897|) (= |ULTIMATE.start_main_#t~ite30_In-1403262897| |ULTIMATE.start_main_#t~ite30_Out-1403262897|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1403262897, ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_In-1403262897|, ~z$w_buff0~0=~z$w_buff0~0_In-1403262897, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1403262897, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1403262897, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1403262897, ~weak$$choice2~0=~weak$$choice2~0_In-1403262897} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1403262897, ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-1403262897|, ~z$w_buff0~0=~z$w_buff0~0_In-1403262897, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1403262897, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1403262897, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1403262897, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-1403262897|, ~weak$$choice2~0=~weak$$choice2~0_In-1403262897} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite31] because there is no mapped edge [2019-12-07 12:32:29,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L856-->L856-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In504271730 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite33_In504271730| |ULTIMATE.start_main_#t~ite33_Out504271730|) (= |ULTIMATE.start_main_#t~ite34_Out504271730| ~z$w_buff1~0_In504271730) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite33_Out504271730| ~z$w_buff1~0_In504271730) (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In504271730 256) 0))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In504271730 256))) (= 0 (mod ~z$w_buff0_used~0_In504271730 256)) (and .cse1 (= (mod ~z$w_buff1_used~0_In504271730 256) 0)))) .cse0 (= |ULTIMATE.start_main_#t~ite34_Out504271730| |ULTIMATE.start_main_#t~ite33_Out504271730|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In504271730, ~z$w_buff0_used~0=~z$w_buff0_used~0_In504271730, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In504271730, ~z$w_buff1_used~0=~z$w_buff1_used~0_In504271730, ~z$w_buff1~0=~z$w_buff1~0_In504271730, ~weak$$choice2~0=~weak$$choice2~0_In504271730, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_In504271730|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In504271730, ~z$w_buff0_used~0=~z$w_buff0_used~0_In504271730, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In504271730, ~z$w_buff1_used~0=~z$w_buff1_used~0_In504271730, ~z$w_buff1~0=~z$w_buff1~0_In504271730, ~weak$$choice2~0=~weak$$choice2~0_In504271730, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out504271730|, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_Out504271730|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_#t~ite34] because there is no mapped edge [2019-12-07 12:32:29,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L859-->L860: Formula: (and (= v_~z$r_buff0_thd0~0_108 v_~z$r_buff0_thd0~0_107) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_108, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_107, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_9|, ~weak$$choice2~0=v_~weak$$choice2~0_33, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 12:32:29,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-275790214 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out-275790214| ~z$r_buff1_thd0~0_In-275790214) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-275790214 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In-275790214 256)) (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-275790214 256))) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-275790214 256))))) (= |ULTIMATE.start_main_#t~ite45_Out-275790214| |ULTIMATE.start_main_#t~ite46_Out-275790214|)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite46_Out-275790214| ~z$r_buff1_thd0~0_In-275790214) (= |ULTIMATE.start_main_#t~ite45_In-275790214| |ULTIMATE.start_main_#t~ite45_Out-275790214|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-275790214, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-275790214, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-275790214, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-275790214, ~weak$$choice2~0=~weak$$choice2~0_In-275790214, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In-275790214|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-275790214, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-275790214, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-275790214, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-275790214, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-275790214|, ~weak$$choice2~0=~weak$$choice2~0_In-275790214, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-275790214|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 12:32:29,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L862-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5| (mod v_~main$tmp_guard1~0_8 256)) (not (= 0 (mod v_~z$flush_delayed~0_30 256))) (= v_~z$mem_tmp~0_20 v_~z~0_83) (= 0 v_~z$flush_delayed~0_29)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_8, ~z$flush_delayed~0=v_~z$flush_delayed~0_30} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_20, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_17|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_8, ~z$flush_delayed~0=v_~z$flush_delayed~0_29, ~z~0=v_~z~0_83, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:32:29,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 12:32:29,443 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_c948bad4-372f-47f7-b681-3d1e43ac05c1/bin/uautomizer/witness.graphml [2019-12-07 12:32:29,444 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:32:29,445 INFO L168 Benchmark]: Toolchain (without parser) took 19161.89 ms. Allocated memory was 1.0 GB in the beginning and 2.6 GB in the end (delta: 1.5 GB). Free memory was 934.0 MB in the beginning and 1.4 GB in the end (delta: -439.9 MB). Peak memory consumption was 1.1 GB. Max. memory is 11.5 GB. [2019-12-07 12:32:29,445 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:32:29,446 INFO L168 Benchmark]: CACSL2BoogieTranslator took 364.61 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 91.2 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -124.8 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2019-12-07 12:32:29,446 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.51 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:32:29,446 INFO L168 Benchmark]: Boogie Preprocessor took 25.55 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:32:29,447 INFO L168 Benchmark]: RCFGBuilder took 397.18 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 998.0 MB in the end (delta: 50.1 MB). Peak memory consumption was 50.1 MB. Max. memory is 11.5 GB. [2019-12-07 12:32:29,447 INFO L168 Benchmark]: TraceAbstraction took 18247.49 ms. Allocated memory was 1.1 GB in the beginning and 2.6 GB in the end (delta: 1.5 GB). Free memory was 998.0 MB in the beginning and 1.4 GB in the end (delta: -410.5 MB). Peak memory consumption was 1.0 GB. Max. memory is 11.5 GB. [2019-12-07 12:32:29,447 INFO L168 Benchmark]: Witness Printer took 84.14 ms. Allocated memory is still 2.6 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 34.5 MB). Peak memory consumption was 34.5 MB. Max. memory is 11.5 GB. [2019-12-07 12:32:29,449 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 364.61 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 91.2 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -124.8 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.51 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.55 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 397.18 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 998.0 MB in the end (delta: 50.1 MB). Peak memory consumption was 50.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 18247.49 ms. Allocated memory was 1.1 GB in the beginning and 2.6 GB in the end (delta: 1.5 GB). Free memory was 998.0 MB in the beginning and 1.4 GB in the end (delta: -410.5 MB). Peak memory consumption was 1.0 GB. Max. memory is 11.5 GB. * Witness Printer took 84.14 ms. Allocated memory is still 2.6 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 34.5 MB). Peak memory consumption was 34.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 180 ProgramPointsBefore, 89 ProgramPointsAfterwards, 208 TransitionsBefore, 95 TransitionsAfterwards, 12668 CoEnabledTransitionPairs, 7 FixpointIterations, 36 TrivialSequentialCompositions, 50 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 36 ConcurrentYvCompositions, 27 ChoiceCompositions, 5121 VarBasedMoverChecksPositive, 269 VarBasedMoverChecksNegative, 136 SemBasedMoverChecksPositive, 198 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.7s, 0 MoverChecksTotal, 49999 CheckedPairsTotal, 122 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L831] FCALL, FORK 0 pthread_create(&t1269, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] FCALL, FORK 0 pthread_create(&t1270, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L835] FCALL, FORK 0 pthread_create(&t1271, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] FCALL, FORK 0 pthread_create(&t1272, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L786] 4 z$w_buff1 = z$w_buff0 [L787] 4 z$w_buff0 = 2 [L788] 4 z$w_buff1_used = z$w_buff0_used [L789] 4 z$w_buff0_used = (_Bool)1 [L808] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 3 y = 2 [L769] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L808] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L772] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L809] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L773] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L774] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L775] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L810] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L843] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L843] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L844] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L845] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L846] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L847] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L850] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L851] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L852] 0 z$flush_delayed = weak$$choice2 [L853] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L854] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L854] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L855] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L856] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L857] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L857] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L858] EXPR 0 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L860] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L861] 0 main$tmp_guard1 = !(x == 2 && y == 2 && z == 2 && __unbuffered_p3_EAX == 1 && __unbuffered_p3_EBX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 18.0s, OverallIterations: 21, TraceHistogramMax: 1, AutomataDifference: 5.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2218 SDtfs, 2420 SDslu, 6180 SDs, 0 SdLazy, 3001 SolverSat, 218 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 193 GetRequests, 33 SyntacticMatches, 14 SemanticMatches, 146 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 335 ImplicationChecksByTransitivity, 1.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=52914occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 5.8s AutomataMinimizationTime, 20 MinimizatonAttempts, 32267 StatesRemovedByMinimization, 15 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.2s InterpolantComputationTime, 962 NumberOfCodeBlocks, 962 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 882 ConstructedInterpolants, 0 QuantifiedInterpolants, 212466 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 20 InterpolantComputations, 20 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...