./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix049_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_5c5aad29-dfcb-4d69-a1c7-996dae915e1f/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_5c5aad29-dfcb-4d69-a1c7-996dae915e1f/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_5c5aad29-dfcb-4d69-a1c7-996dae915e1f/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_5c5aad29-dfcb-4d69-a1c7-996dae915e1f/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix049_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_5c5aad29-dfcb-4d69-a1c7-996dae915e1f/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_5c5aad29-dfcb-4d69-a1c7-996dae915e1f/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 33280d76b745ef380d9d587b7f1ad45399fca736 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:29:07,968 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:29:07,970 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:29:07,977 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:29:07,977 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:29:07,978 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:29:07,979 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:29:07,980 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:29:07,982 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:29:07,982 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:29:07,983 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:29:07,984 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:29:07,984 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:29:07,985 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:29:07,985 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:29:07,986 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:29:07,986 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:29:07,987 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:29:07,988 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:29:07,990 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:29:07,991 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:29:07,992 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:29:07,992 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:29:07,993 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:29:07,995 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:29:07,995 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:29:07,995 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:29:07,996 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:29:07,996 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:29:07,996 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:29:07,997 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:29:07,997 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:29:07,998 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:29:07,998 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:29:07,999 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:29:07,999 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:29:07,999 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:29:07,999 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:29:08,000 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:29:08,000 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:29:08,001 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:29:08,001 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_5c5aad29-dfcb-4d69-a1c7-996dae915e1f/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:29:08,010 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:29:08,010 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:29:08,011 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:29:08,011 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:29:08,011 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:29:08,012 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:29:08,012 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:29:08,012 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:29:08,012 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:29:08,012 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:29:08,012 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:29:08,012 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:29:08,013 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:29:08,013 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:29:08,013 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:29:08,013 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:29:08,013 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:29:08,013 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:29:08,013 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:29:08,013 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:29:08,014 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:29:08,014 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:29:08,014 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:29:08,014 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:29:08,014 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:29:08,014 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:29:08,014 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:29:08,014 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:29:08,015 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:29:08,015 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_5c5aad29-dfcb-4d69-a1c7-996dae915e1f/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 33280d76b745ef380d9d587b7f1ad45399fca736 [2019-12-07 17:29:08,123 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:29:08,133 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:29:08,136 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:29:08,137 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:29:08,138 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:29:08,138 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_5c5aad29-dfcb-4d69-a1c7-996dae915e1f/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix049_power.oepc.i [2019-12-07 17:29:08,182 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_5c5aad29-dfcb-4d69-a1c7-996dae915e1f/bin/uautomizer/data/74557c592/e637ff596aff4a6fb3db873255e9e5d5/FLAGc3c72df98 [2019-12-07 17:29:08,606 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:29:08,606 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_5c5aad29-dfcb-4d69-a1c7-996dae915e1f/sv-benchmarks/c/pthread-wmm/mix049_power.oepc.i [2019-12-07 17:29:08,617 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_5c5aad29-dfcb-4d69-a1c7-996dae915e1f/bin/uautomizer/data/74557c592/e637ff596aff4a6fb3db873255e9e5d5/FLAGc3c72df98 [2019-12-07 17:29:08,972 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_5c5aad29-dfcb-4d69-a1c7-996dae915e1f/bin/uautomizer/data/74557c592/e637ff596aff4a6fb3db873255e9e5d5 [2019-12-07 17:29:08,978 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:29:08,980 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:29:08,983 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:29:08,983 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:29:08,991 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:29:08,993 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:29:08" (1/1) ... [2019-12-07 17:29:08,999 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@46581b5e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:29:08, skipping insertion in model container [2019-12-07 17:29:08,999 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:29:08" (1/1) ... [2019-12-07 17:29:09,013 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:29:09,046 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:29:09,288 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:29:09,296 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:29:09,340 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:29:09,385 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:29:09,386 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:29:09 WrapperNode [2019-12-07 17:29:09,386 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:29:09,386 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:29:09,386 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:29:09,387 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:29:09,392 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:29:09" (1/1) ... [2019-12-07 17:29:09,406 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:29:09" (1/1) ... [2019-12-07 17:29:09,426 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:29:09,426 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:29:09,426 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:29:09,426 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:29:09,433 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:29:09" (1/1) ... [2019-12-07 17:29:09,433 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:29:09" (1/1) ... [2019-12-07 17:29:09,436 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:29:09" (1/1) ... [2019-12-07 17:29:09,436 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:29:09" (1/1) ... [2019-12-07 17:29:09,444 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:29:09" (1/1) ... [2019-12-07 17:29:09,447 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:29:09" (1/1) ... [2019-12-07 17:29:09,449 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:29:09" (1/1) ... [2019-12-07 17:29:09,452 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:29:09,452 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:29:09,452 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:29:09,453 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:29:09,453 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:29:09" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_5c5aad29-dfcb-4d69-a1c7-996dae915e1f/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:29:09,494 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:29:09,495 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:29:09,495 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:29:09,495 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:29:09,495 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:29:09,495 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:29:09,495 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:29:09,495 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:29:09,495 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:29:09,496 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:29:09,496 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:29:09,496 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:29:09,496 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:29:09,497 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:29:09,860 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:29:09,860 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:29:09,862 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:29:09 BoogieIcfgContainer [2019-12-07 17:29:09,862 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:29:09,863 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:29:09,863 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:29:09,865 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:29:09,865 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:29:08" (1/3) ... [2019-12-07 17:29:09,866 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3f92d6fc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:29:09, skipping insertion in model container [2019-12-07 17:29:09,866 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:29:09" (2/3) ... [2019-12-07 17:29:09,867 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3f92d6fc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:29:09, skipping insertion in model container [2019-12-07 17:29:09,867 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:29:09" (3/3) ... [2019-12-07 17:29:09,868 INFO L109 eAbstractionObserver]: Analyzing ICFG mix049_power.oepc.i [2019-12-07 17:29:09,877 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:29:09,877 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:29:09,883 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:29:09,884 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:29:09,910 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,910 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,910 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,910 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,910 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,911 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,911 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,911 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,911 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,911 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,912 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,912 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,912 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,912 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,912 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,912 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,913 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,913 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,913 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,913 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,913 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,914 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,914 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,914 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,914 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,914 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,914 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,915 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,915 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,915 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,915 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,915 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,916 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,916 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,916 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,916 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,917 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,917 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,917 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,917 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,917 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,918 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,918 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,918 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,918 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,918 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,921 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,921 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,921 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,921 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,921 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,921 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,922 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,923 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,923 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,923 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,923 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,923 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,923 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,923 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,924 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,924 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,924 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,924 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,924 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,925 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,925 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,925 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,925 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,925 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,925 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,926 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,926 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,926 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,926 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,926 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,926 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,927 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,927 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,927 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,927 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,927 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,927 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,928 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,928 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,928 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,928 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,928 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,928 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,929 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,929 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,929 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,929 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,929 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,929 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,930 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,930 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,930 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,930 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,930 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,930 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,931 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,931 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,931 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,931 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,931 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,931 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,931 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,932 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,932 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,932 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,932 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,932 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,932 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,933 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,933 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,933 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,933 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,933 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,933 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,933 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,934 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,934 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,934 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,934 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,934 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,934 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,935 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,935 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,935 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,935 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,935 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,935 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:29:09,955 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:29:09,968 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:29:09,968 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:29:09,968 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:29:09,968 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:29:09,968 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:29:09,968 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:29:09,968 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:29:09,968 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:29:09,979 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 17:29:09,981 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 17:29:10,046 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 17:29:10,046 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:29:10,059 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:29:10,078 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 17:29:10,116 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 17:29:10,116 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:29:10,123 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:29:10,141 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 17:29:10,141 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:29:13,051 WARN L192 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 17:29:13,370 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130045 [2019-12-07 17:29:13,370 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 17:29:13,372 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 17:29:34,138 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 126452 states. [2019-12-07 17:29:34,139 INFO L276 IsEmpty]: Start isEmpty. Operand 126452 states. [2019-12-07 17:29:34,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 17:29:34,144 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:34,145 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 17:29:34,145 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:34,150 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:34,150 INFO L82 PathProgramCache]: Analyzing trace with hash 913925, now seen corresponding path program 1 times [2019-12-07 17:29:34,156 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:34,156 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689614163] [2019-12-07 17:29:34,156 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:34,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:34,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:34,294 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [689614163] [2019-12-07 17:29:34,294 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:34,294 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:29:34,295 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [535639439] [2019-12-07 17:29:34,298 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:29:34,298 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:34,307 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:29:34,308 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:29:34,309 INFO L87 Difference]: Start difference. First operand 126452 states. Second operand 3 states. [2019-12-07 17:29:35,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:35,259 INFO L93 Difference]: Finished difference Result 125570 states and 538788 transitions. [2019-12-07 17:29:35,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:29:35,260 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 17:29:35,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:35,762 INFO L225 Difference]: With dead ends: 125570 [2019-12-07 17:29:35,762 INFO L226 Difference]: Without dead ends: 111010 [2019-12-07 17:29:35,763 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:29:41,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111010 states. [2019-12-07 17:29:42,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111010 to 111010. [2019-12-07 17:29:42,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111010 states. [2019-12-07 17:29:43,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111010 states to 111010 states and 475060 transitions. [2019-12-07 17:29:43,261 INFO L78 Accepts]: Start accepts. Automaton has 111010 states and 475060 transitions. Word has length 3 [2019-12-07 17:29:43,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:43,262 INFO L462 AbstractCegarLoop]: Abstraction has 111010 states and 475060 transitions. [2019-12-07 17:29:43,262 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:29:43,262 INFO L276 IsEmpty]: Start isEmpty. Operand 111010 states and 475060 transitions. [2019-12-07 17:29:43,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 17:29:43,266 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:43,266 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:43,267 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:43,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:43,267 INFO L82 PathProgramCache]: Analyzing trace with hash -1753094800, now seen corresponding path program 1 times [2019-12-07 17:29:43,267 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:43,268 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [54619526] [2019-12-07 17:29:43,268 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:43,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:43,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:43,340 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [54619526] [2019-12-07 17:29:43,340 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:43,341 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:29:43,341 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2129138344] [2019-12-07 17:29:43,342 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:29:43,342 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:43,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:29:43,342 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:29:43,342 INFO L87 Difference]: Start difference. First operand 111010 states and 475060 transitions. Second operand 4 states. [2019-12-07 17:29:44,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:44,306 INFO L93 Difference]: Finished difference Result 172646 states and 710109 transitions. [2019-12-07 17:29:44,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:29:44,307 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 17:29:44,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:45,254 INFO L225 Difference]: With dead ends: 172646 [2019-12-07 17:29:45,254 INFO L226 Difference]: Without dead ends: 172548 [2019-12-07 17:29:45,254 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:29:52,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172548 states. [2019-12-07 17:29:54,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172548 to 158936. [2019-12-07 17:29:54,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158936 states. [2019-12-07 17:29:55,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158936 states to 158936 states and 661803 transitions. [2019-12-07 17:29:55,758 INFO L78 Accepts]: Start accepts. Automaton has 158936 states and 661803 transitions. Word has length 11 [2019-12-07 17:29:55,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:55,758 INFO L462 AbstractCegarLoop]: Abstraction has 158936 states and 661803 transitions. [2019-12-07 17:29:55,759 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:29:55,759 INFO L276 IsEmpty]: Start isEmpty. Operand 158936 states and 661803 transitions. [2019-12-07 17:29:55,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:29:55,764 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:55,764 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:55,764 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:55,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:55,764 INFO L82 PathProgramCache]: Analyzing trace with hash 216434073, now seen corresponding path program 1 times [2019-12-07 17:29:55,765 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:55,765 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [825645972] [2019-12-07 17:29:55,765 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:55,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:55,814 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:55,814 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [825645972] [2019-12-07 17:29:55,814 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:55,815 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:29:55,815 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [573389205] [2019-12-07 17:29:55,815 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:29:55,815 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:55,815 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:29:55,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:29:55,816 INFO L87 Difference]: Start difference. First operand 158936 states and 661803 transitions. Second operand 4 states. [2019-12-07 17:29:56,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:56,995 INFO L93 Difference]: Finished difference Result 228902 states and 931210 transitions. [2019-12-07 17:29:56,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:29:56,996 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:29:56,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:57,592 INFO L225 Difference]: With dead ends: 228902 [2019-12-07 17:29:57,592 INFO L226 Difference]: Without dead ends: 228790 [2019-12-07 17:29:57,593 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:30:04,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228790 states. [2019-12-07 17:30:09,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228790 to 192327. [2019-12-07 17:30:09,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192327 states. [2019-12-07 17:30:10,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192327 states to 192327 states and 796272 transitions. [2019-12-07 17:30:10,069 INFO L78 Accepts]: Start accepts. Automaton has 192327 states and 796272 transitions. Word has length 13 [2019-12-07 17:30:10,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:10,070 INFO L462 AbstractCegarLoop]: Abstraction has 192327 states and 796272 transitions. [2019-12-07 17:30:10,070 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:30:10,070 INFO L276 IsEmpty]: Start isEmpty. Operand 192327 states and 796272 transitions. [2019-12-07 17:30:10,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:30:10,079 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:10,079 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:10,079 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:10,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:10,080 INFO L82 PathProgramCache]: Analyzing trace with hash -1948590504, now seen corresponding path program 1 times [2019-12-07 17:30:10,080 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:10,080 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [508125615] [2019-12-07 17:30:10,080 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:10,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:10,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:10,116 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [508125615] [2019-12-07 17:30:10,116 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:10,116 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:30:10,116 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [517617814] [2019-12-07 17:30:10,116 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:30:10,117 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:10,117 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:30:10,117 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:30:10,117 INFO L87 Difference]: Start difference. First operand 192327 states and 796272 transitions. Second operand 3 states. [2019-12-07 17:30:11,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:11,810 INFO L93 Difference]: Finished difference Result 280788 states and 1158875 transitions. [2019-12-07 17:30:11,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:30:11,811 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 17:30:11,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:12,530 INFO L225 Difference]: With dead ends: 280788 [2019-12-07 17:30:12,530 INFO L226 Difference]: Without dead ends: 280788 [2019-12-07 17:30:12,531 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:30:19,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280788 states. [2019-12-07 17:30:25,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280788 to 222888. [2019-12-07 17:30:25,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222888 states. [2019-12-07 17:30:26,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222888 states to 222888 states and 926633 transitions. [2019-12-07 17:30:26,780 INFO L78 Accepts]: Start accepts. Automaton has 222888 states and 926633 transitions. Word has length 16 [2019-12-07 17:30:26,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:26,780 INFO L462 AbstractCegarLoop]: Abstraction has 222888 states and 926633 transitions. [2019-12-07 17:30:26,781 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:30:26,781 INFO L276 IsEmpty]: Start isEmpty. Operand 222888 states and 926633 transitions. [2019-12-07 17:30:26,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:30:26,788 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:26,788 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:26,788 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:26,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:26,788 INFO L82 PathProgramCache]: Analyzing trace with hash -1821591471, now seen corresponding path program 1 times [2019-12-07 17:30:26,788 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:26,789 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2124975129] [2019-12-07 17:30:26,789 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:26,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:26,834 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:26,834 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2124975129] [2019-12-07 17:30:26,835 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:26,835 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:30:26,835 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2112353809] [2019-12-07 17:30:26,835 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:30:26,835 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:26,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:30:26,835 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:30:26,835 INFO L87 Difference]: Start difference. First operand 222888 states and 926633 transitions. Second operand 5 states. [2019-12-07 17:30:28,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:28,365 INFO L93 Difference]: Finished difference Result 298473 states and 1226263 transitions. [2019-12-07 17:30:28,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:30:28,365 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 17:30:28,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:29,156 INFO L225 Difference]: With dead ends: 298473 [2019-12-07 17:30:29,156 INFO L226 Difference]: Without dead ends: 298473 [2019-12-07 17:30:29,156 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:30:40,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298473 states. [2019-12-07 17:30:44,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298473 to 237826. [2019-12-07 17:30:44,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237826 states. [2019-12-07 17:30:44,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237826 states to 237826 states and 988542 transitions. [2019-12-07 17:30:44,854 INFO L78 Accepts]: Start accepts. Automaton has 237826 states and 988542 transitions. Word has length 16 [2019-12-07 17:30:44,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:44,854 INFO L462 AbstractCegarLoop]: Abstraction has 237826 states and 988542 transitions. [2019-12-07 17:30:44,854 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:30:44,855 INFO L276 IsEmpty]: Start isEmpty. Operand 237826 states and 988542 transitions. [2019-12-07 17:30:44,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:30:44,867 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:44,867 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:44,867 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:44,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:44,867 INFO L82 PathProgramCache]: Analyzing trace with hash -504931817, now seen corresponding path program 1 times [2019-12-07 17:30:44,868 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:44,868 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1561526567] [2019-12-07 17:30:44,868 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:44,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:44,904 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:44,904 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1561526567] [2019-12-07 17:30:44,904 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:44,904 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:30:44,904 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1104262338] [2019-12-07 17:30:44,904 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:30:44,904 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:44,905 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:30:44,905 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:30:44,905 INFO L87 Difference]: Start difference. First operand 237826 states and 988542 transitions. Second operand 3 states. [2019-12-07 17:30:46,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:46,472 INFO L93 Difference]: Finished difference Result 237826 states and 978678 transitions. [2019-12-07 17:30:46,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:30:46,473 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:30:46,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:47,083 INFO L225 Difference]: With dead ends: 237826 [2019-12-07 17:30:47,083 INFO L226 Difference]: Without dead ends: 237826 [2019-12-07 17:30:47,083 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:30:53,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237826 states. [2019-12-07 17:30:57,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237826 to 234480. [2019-12-07 17:30:57,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234480 states. [2019-12-07 17:30:57,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234480 states to 234480 states and 966258 transitions. [2019-12-07 17:30:57,839 INFO L78 Accepts]: Start accepts. Automaton has 234480 states and 966258 transitions. Word has length 18 [2019-12-07 17:30:57,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:57,840 INFO L462 AbstractCegarLoop]: Abstraction has 234480 states and 966258 transitions. [2019-12-07 17:30:57,840 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:30:57,840 INFO L276 IsEmpty]: Start isEmpty. Operand 234480 states and 966258 transitions. [2019-12-07 17:30:57,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:30:57,852 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:57,852 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:57,852 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:57,852 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:57,852 INFO L82 PathProgramCache]: Analyzing trace with hash 138207619, now seen corresponding path program 1 times [2019-12-07 17:30:57,852 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:57,853 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1049730180] [2019-12-07 17:30:57,853 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:57,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:57,891 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:57,891 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1049730180] [2019-12-07 17:30:57,891 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:57,891 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:30:57,891 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1451248798] [2019-12-07 17:30:57,892 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:30:57,892 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:57,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:30:57,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:30:57,892 INFO L87 Difference]: Start difference. First operand 234480 states and 966258 transitions. Second operand 3 states. [2019-12-07 17:30:58,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:58,031 INFO L93 Difference]: Finished difference Result 42613 states and 138837 transitions. [2019-12-07 17:30:58,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:30:58,031 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:30:58,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:58,092 INFO L225 Difference]: With dead ends: 42613 [2019-12-07 17:30:58,092 INFO L226 Difference]: Without dead ends: 42613 [2019-12-07 17:30:58,092 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:30:58,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42613 states. [2019-12-07 17:30:59,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42613 to 42613. [2019-12-07 17:30:59,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42613 states. [2019-12-07 17:30:59,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42613 states to 42613 states and 138837 transitions. [2019-12-07 17:30:59,223 INFO L78 Accepts]: Start accepts. Automaton has 42613 states and 138837 transitions. Word has length 18 [2019-12-07 17:30:59,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:59,223 INFO L462 AbstractCegarLoop]: Abstraction has 42613 states and 138837 transitions. [2019-12-07 17:30:59,223 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:30:59,223 INFO L276 IsEmpty]: Start isEmpty. Operand 42613 states and 138837 transitions. [2019-12-07 17:30:59,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:30:59,230 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:59,230 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:59,230 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:59,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:59,231 INFO L82 PathProgramCache]: Analyzing trace with hash -187432510, now seen corresponding path program 1 times [2019-12-07 17:30:59,231 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:59,231 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [463116161] [2019-12-07 17:30:59,231 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:59,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:59,296 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:59,297 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [463116161] [2019-12-07 17:30:59,297 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:59,297 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:30:59,297 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1495921454] [2019-12-07 17:30:59,297 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:30:59,298 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:59,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:30:59,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:30:59,298 INFO L87 Difference]: Start difference. First operand 42613 states and 138837 transitions. Second operand 6 states. [2019-12-07 17:30:59,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:59,915 INFO L93 Difference]: Finished difference Result 65056 states and 205947 transitions. [2019-12-07 17:30:59,915 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:30:59,915 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 17:30:59,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:00,009 INFO L225 Difference]: With dead ends: 65056 [2019-12-07 17:31:00,010 INFO L226 Difference]: Without dead ends: 65042 [2019-12-07 17:31:00,010 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:31:00,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65042 states. [2019-12-07 17:31:00,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65042 to 42278. [2019-12-07 17:31:00,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42278 states. [2019-12-07 17:31:00,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42278 states to 42278 states and 137592 transitions. [2019-12-07 17:31:00,929 INFO L78 Accepts]: Start accepts. Automaton has 42278 states and 137592 transitions. Word has length 22 [2019-12-07 17:31:00,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:00,929 INFO L462 AbstractCegarLoop]: Abstraction has 42278 states and 137592 transitions. [2019-12-07 17:31:00,929 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:31:00,930 INFO L276 IsEmpty]: Start isEmpty. Operand 42278 states and 137592 transitions. [2019-12-07 17:31:00,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 17:31:00,940 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:00,940 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:00,940 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:00,941 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:00,941 INFO L82 PathProgramCache]: Analyzing trace with hash -200714255, now seen corresponding path program 1 times [2019-12-07 17:31:00,941 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:00,941 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1401328621] [2019-12-07 17:31:00,941 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:00,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:01,033 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:01,033 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1401328621] [2019-12-07 17:31:01,033 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:01,033 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:31:01,034 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [838433845] [2019-12-07 17:31:01,034 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:31:01,034 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:01,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:31:01,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:31:01,035 INFO L87 Difference]: Start difference. First operand 42278 states and 137592 transitions. Second operand 7 states. [2019-12-07 17:31:01,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:01,481 INFO L93 Difference]: Finished difference Result 59726 states and 189950 transitions. [2019-12-07 17:31:01,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 17:31:01,482 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 25 [2019-12-07 17:31:01,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:01,570 INFO L225 Difference]: With dead ends: 59726 [2019-12-07 17:31:01,570 INFO L226 Difference]: Without dead ends: 59700 [2019-12-07 17:31:01,570 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:31:02,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59700 states. [2019-12-07 17:31:03,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59700 to 50129. [2019-12-07 17:31:03,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50129 states. [2019-12-07 17:31:03,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50129 states to 50129 states and 162181 transitions. [2019-12-07 17:31:03,531 INFO L78 Accepts]: Start accepts. Automaton has 50129 states and 162181 transitions. Word has length 25 [2019-12-07 17:31:03,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:03,532 INFO L462 AbstractCegarLoop]: Abstraction has 50129 states and 162181 transitions. [2019-12-07 17:31:03,532 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:31:03,532 INFO L276 IsEmpty]: Start isEmpty. Operand 50129 states and 162181 transitions. [2019-12-07 17:31:03,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:31:03,548 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:03,548 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:03,548 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:03,548 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:03,548 INFO L82 PathProgramCache]: Analyzing trace with hash 611460705, now seen corresponding path program 1 times [2019-12-07 17:31:03,549 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:03,549 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262790561] [2019-12-07 17:31:03,549 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:03,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:03,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:03,593 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [262790561] [2019-12-07 17:31:03,593 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:03,593 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:31:03,593 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [220528142] [2019-12-07 17:31:03,593 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:31:03,593 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:03,593 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:31:03,594 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:31:03,594 INFO L87 Difference]: Start difference. First operand 50129 states and 162181 transitions. Second operand 6 states. [2019-12-07 17:31:04,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:04,084 INFO L93 Difference]: Finished difference Result 71592 states and 224983 transitions. [2019-12-07 17:31:04,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 17:31:04,085 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 17:31:04,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:04,188 INFO L225 Difference]: With dead ends: 71592 [2019-12-07 17:31:04,188 INFO L226 Difference]: Without dead ends: 71508 [2019-12-07 17:31:04,189 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:31:04,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71508 states. [2019-12-07 17:31:05,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71508 to 53724. [2019-12-07 17:31:05,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53724 states. [2019-12-07 17:31:05,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53724 states to 53724 states and 172706 transitions. [2019-12-07 17:31:05,418 INFO L78 Accepts]: Start accepts. Automaton has 53724 states and 172706 transitions. Word has length 27 [2019-12-07 17:31:05,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:05,419 INFO L462 AbstractCegarLoop]: Abstraction has 53724 states and 172706 transitions. [2019-12-07 17:31:05,419 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:31:05,419 INFO L276 IsEmpty]: Start isEmpty. Operand 53724 states and 172706 transitions. [2019-12-07 17:31:05,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 17:31:05,439 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:05,439 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:05,439 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:05,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:05,439 INFO L82 PathProgramCache]: Analyzing trace with hash -969078927, now seen corresponding path program 1 times [2019-12-07 17:31:05,439 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:05,439 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2094631022] [2019-12-07 17:31:05,440 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:05,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:05,476 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:05,476 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2094631022] [2019-12-07 17:31:05,476 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:05,476 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:31:05,476 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1199951838] [2019-12-07 17:31:05,477 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:31:05,477 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:05,477 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:31:05,477 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:31:05,477 INFO L87 Difference]: Start difference. First operand 53724 states and 172706 transitions. Second operand 4 states. [2019-12-07 17:31:05,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:05,541 INFO L93 Difference]: Finished difference Result 20754 states and 64022 transitions. [2019-12-07 17:31:05,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:31:05,541 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 17:31:05,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:05,566 INFO L225 Difference]: With dead ends: 20754 [2019-12-07 17:31:05,566 INFO L226 Difference]: Without dead ends: 20754 [2019-12-07 17:31:05,566 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:31:05,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20754 states. [2019-12-07 17:31:05,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20754 to 19543. [2019-12-07 17:31:05,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19543 states. [2019-12-07 17:31:05,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19543 states to 19543 states and 60338 transitions. [2019-12-07 17:31:05,872 INFO L78 Accepts]: Start accepts. Automaton has 19543 states and 60338 transitions. Word has length 29 [2019-12-07 17:31:05,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:05,872 INFO L462 AbstractCegarLoop]: Abstraction has 19543 states and 60338 transitions. [2019-12-07 17:31:05,872 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:31:05,872 INFO L276 IsEmpty]: Start isEmpty. Operand 19543 states and 60338 transitions. [2019-12-07 17:31:05,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:31:05,891 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:05,892 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:05,892 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:05,892 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:05,892 INFO L82 PathProgramCache]: Analyzing trace with hash -1170391984, now seen corresponding path program 1 times [2019-12-07 17:31:05,892 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:05,892 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1892091742] [2019-12-07 17:31:05,892 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:05,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:05,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:05,947 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1892091742] [2019-12-07 17:31:05,947 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:05,947 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:31:05,948 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1417198080] [2019-12-07 17:31:05,948 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:31:05,948 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:05,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:31:05,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:31:05,948 INFO L87 Difference]: Start difference. First operand 19543 states and 60338 transitions. Second operand 7 states. [2019-12-07 17:31:06,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:06,680 INFO L93 Difference]: Finished difference Result 27225 states and 81337 transitions. [2019-12-07 17:31:06,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 17:31:06,680 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 17:31:06,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:06,712 INFO L225 Difference]: With dead ends: 27225 [2019-12-07 17:31:06,712 INFO L226 Difference]: Without dead ends: 27225 [2019-12-07 17:31:06,713 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 17:31:06,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27225 states. [2019-12-07 17:31:07,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27225 to 19532. [2019-12-07 17:31:07,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19532 states. [2019-12-07 17:31:07,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19532 states to 19532 states and 60108 transitions. [2019-12-07 17:31:07,077 INFO L78 Accepts]: Start accepts. Automaton has 19532 states and 60108 transitions. Word has length 33 [2019-12-07 17:31:07,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:07,077 INFO L462 AbstractCegarLoop]: Abstraction has 19532 states and 60108 transitions. [2019-12-07 17:31:07,077 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:31:07,077 INFO L276 IsEmpty]: Start isEmpty. Operand 19532 states and 60108 transitions. [2019-12-07 17:31:07,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:31:07,095 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:07,095 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:07,095 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:07,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:07,095 INFO L82 PathProgramCache]: Analyzing trace with hash 1293540528, now seen corresponding path program 1 times [2019-12-07 17:31:07,095 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:07,096 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1832758799] [2019-12-07 17:31:07,096 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:07,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:07,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:07,143 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1832758799] [2019-12-07 17:31:07,143 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:07,143 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:31:07,144 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [878832093] [2019-12-07 17:31:07,144 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:31:07,144 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:07,144 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:31:07,144 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:31:07,145 INFO L87 Difference]: Start difference. First operand 19532 states and 60108 transitions. Second operand 3 states. [2019-12-07 17:31:07,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:07,195 INFO L93 Difference]: Finished difference Result 18664 states and 56622 transitions. [2019-12-07 17:31:07,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:31:07,196 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 17:31:07,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:07,216 INFO L225 Difference]: With dead ends: 18664 [2019-12-07 17:31:07,216 INFO L226 Difference]: Without dead ends: 18664 [2019-12-07 17:31:07,217 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:31:07,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18664 states. [2019-12-07 17:31:07,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18664 to 18390. [2019-12-07 17:31:07,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18390 states. [2019-12-07 17:31:07,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18390 states to 18390 states and 55854 transitions. [2019-12-07 17:31:07,486 INFO L78 Accepts]: Start accepts. Automaton has 18390 states and 55854 transitions. Word has length 40 [2019-12-07 17:31:07,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:07,486 INFO L462 AbstractCegarLoop]: Abstraction has 18390 states and 55854 transitions. [2019-12-07 17:31:07,486 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:31:07,486 INFO L276 IsEmpty]: Start isEmpty. Operand 18390 states and 55854 transitions. [2019-12-07 17:31:07,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 17:31:07,501 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:07,501 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:07,501 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:07,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:07,502 INFO L82 PathProgramCache]: Analyzing trace with hash -448595313, now seen corresponding path program 1 times [2019-12-07 17:31:07,502 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:07,502 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [415246539] [2019-12-07 17:31:07,502 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:07,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:07,552 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:07,552 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [415246539] [2019-12-07 17:31:07,552 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:07,552 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:31:07,552 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1047590322] [2019-12-07 17:31:07,553 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:31:07,553 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:07,553 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:31:07,553 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:31:07,553 INFO L87 Difference]: Start difference. First operand 18390 states and 55854 transitions. Second operand 5 states. [2019-12-07 17:31:07,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:07,619 INFO L93 Difference]: Finished difference Result 16867 states and 52454 transitions. [2019-12-07 17:31:07,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:31:07,619 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 17:31:07,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:07,640 INFO L225 Difference]: With dead ends: 16867 [2019-12-07 17:31:07,640 INFO L226 Difference]: Without dead ends: 16867 [2019-12-07 17:31:07,640 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:31:07,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16867 states. [2019-12-07 17:31:07,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16867 to 15238. [2019-12-07 17:31:07,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15238 states. [2019-12-07 17:31:07,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15238 states to 15238 states and 47616 transitions. [2019-12-07 17:31:07,995 INFO L78 Accepts]: Start accepts. Automaton has 15238 states and 47616 transitions. Word has length 41 [2019-12-07 17:31:07,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:07,995 INFO L462 AbstractCegarLoop]: Abstraction has 15238 states and 47616 transitions. [2019-12-07 17:31:07,995 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:31:07,995 INFO L276 IsEmpty]: Start isEmpty. Operand 15238 states and 47616 transitions. [2019-12-07 17:31:08,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:31:08,009 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:08,009 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:08,009 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:08,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:08,010 INFO L82 PathProgramCache]: Analyzing trace with hash 1623524162, now seen corresponding path program 1 times [2019-12-07 17:31:08,010 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:08,010 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1694487280] [2019-12-07 17:31:08,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:08,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:08,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:08,049 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1694487280] [2019-12-07 17:31:08,049 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:08,049 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:31:08,049 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1091226145] [2019-12-07 17:31:08,049 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:31:08,049 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:08,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:31:08,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:31:08,050 INFO L87 Difference]: Start difference. First operand 15238 states and 47616 transitions. Second operand 3 states. [2019-12-07 17:31:08,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:08,141 INFO L93 Difference]: Finished difference Result 18380 states and 57153 transitions. [2019-12-07 17:31:08,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:31:08,141 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:31:08,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:08,163 INFO L225 Difference]: With dead ends: 18380 [2019-12-07 17:31:08,163 INFO L226 Difference]: Without dead ends: 18380 [2019-12-07 17:31:08,163 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:31:08,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18380 states. [2019-12-07 17:31:08,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18380 to 15494. [2019-12-07 17:31:08,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15494 states. [2019-12-07 17:31:08,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15494 states to 15494 states and 48492 transitions. [2019-12-07 17:31:08,435 INFO L78 Accepts]: Start accepts. Automaton has 15494 states and 48492 transitions. Word has length 66 [2019-12-07 17:31:08,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:08,435 INFO L462 AbstractCegarLoop]: Abstraction has 15494 states and 48492 transitions. [2019-12-07 17:31:08,435 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:31:08,435 INFO L276 IsEmpty]: Start isEmpty. Operand 15494 states and 48492 transitions. [2019-12-07 17:31:08,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:31:08,454 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:08,454 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:08,454 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:08,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:08,454 INFO L82 PathProgramCache]: Analyzing trace with hash 600429612, now seen corresponding path program 1 times [2019-12-07 17:31:08,454 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:08,454 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [353530502] [2019-12-07 17:31:08,455 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:08,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:08,509 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:08,509 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [353530502] [2019-12-07 17:31:08,509 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:08,510 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:31:08,510 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [853218492] [2019-12-07 17:31:08,510 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:31:08,510 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:08,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:31:08,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:31:08,511 INFO L87 Difference]: Start difference. First operand 15494 states and 48492 transitions. Second operand 4 states. [2019-12-07 17:31:08,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:08,609 INFO L93 Difference]: Finished difference Result 18353 states and 57063 transitions. [2019-12-07 17:31:08,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:31:08,610 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 17:31:08,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:08,631 INFO L225 Difference]: With dead ends: 18353 [2019-12-07 17:31:08,631 INFO L226 Difference]: Without dead ends: 18353 [2019-12-07 17:31:08,632 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:31:08,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18353 states. [2019-12-07 17:31:08,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18353 to 15150. [2019-12-07 17:31:08,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15150 states. [2019-12-07 17:31:08,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15150 states to 15150 states and 47431 transitions. [2019-12-07 17:31:08,900 INFO L78 Accepts]: Start accepts. Automaton has 15150 states and 47431 transitions. Word has length 67 [2019-12-07 17:31:08,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:08,901 INFO L462 AbstractCegarLoop]: Abstraction has 15150 states and 47431 transitions. [2019-12-07 17:31:08,901 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:31:08,901 INFO L276 IsEmpty]: Start isEmpty. Operand 15150 states and 47431 transitions. [2019-12-07 17:31:08,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:31:08,915 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:08,915 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:08,915 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:08,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:08,916 INFO L82 PathProgramCache]: Analyzing trace with hash 384042528, now seen corresponding path program 1 times [2019-12-07 17:31:08,916 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:08,916 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1739290008] [2019-12-07 17:31:08,916 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:08,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:09,043 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:09,043 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1739290008] [2019-12-07 17:31:09,043 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:09,043 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:31:09,044 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1155400862] [2019-12-07 17:31:09,044 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 17:31:09,044 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:09,044 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 17:31:09,044 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:31:09,044 INFO L87 Difference]: Start difference. First operand 15150 states and 47431 transitions. Second operand 10 states. [2019-12-07 17:31:10,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:10,635 INFO L93 Difference]: Finished difference Result 35073 states and 109582 transitions. [2019-12-07 17:31:10,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 17:31:10,636 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 17:31:10,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:10,676 INFO L225 Difference]: With dead ends: 35073 [2019-12-07 17:31:10,676 INFO L226 Difference]: Without dead ends: 24437 [2019-12-07 17:31:10,676 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 121 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=140, Invalid=562, Unknown=0, NotChecked=0, Total=702 [2019-12-07 17:31:10,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24437 states. [2019-12-07 17:31:10,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24437 to 18082. [2019-12-07 17:31:10,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18082 states. [2019-12-07 17:31:11,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18082 states to 18082 states and 56427 transitions. [2019-12-07 17:31:11,019 INFO L78 Accepts]: Start accepts. Automaton has 18082 states and 56427 transitions. Word has length 67 [2019-12-07 17:31:11,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:11,019 INFO L462 AbstractCegarLoop]: Abstraction has 18082 states and 56427 transitions. [2019-12-07 17:31:11,019 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 17:31:11,019 INFO L276 IsEmpty]: Start isEmpty. Operand 18082 states and 56427 transitions. [2019-12-07 17:31:11,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:31:11,036 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:11,036 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:11,036 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:11,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:11,037 INFO L82 PathProgramCache]: Analyzing trace with hash 1908292690, now seen corresponding path program 2 times [2019-12-07 17:31:11,037 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:11,037 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285709598] [2019-12-07 17:31:11,037 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:11,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:11,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:11,185 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1285709598] [2019-12-07 17:31:11,185 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:11,186 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:31:11,186 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [630943940] [2019-12-07 17:31:11,186 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 17:31:11,186 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:11,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 17:31:11,187 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:31:11,187 INFO L87 Difference]: Start difference. First operand 18082 states and 56427 transitions. Second operand 10 states. [2019-12-07 17:31:13,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:13,064 INFO L93 Difference]: Finished difference Result 30956 states and 95936 transitions. [2019-12-07 17:31:13,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 17:31:13,065 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 17:31:13,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:13,109 INFO L225 Difference]: With dead ends: 30956 [2019-12-07 17:31:13,110 INFO L226 Difference]: Without dead ends: 26393 [2019-12-07 17:31:13,110 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=241, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:31:13,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26393 states. [2019-12-07 17:31:13,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26393 to 18534. [2019-12-07 17:31:13,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18534 states. [2019-12-07 17:31:13,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18534 states to 18534 states and 57675 transitions. [2019-12-07 17:31:13,465 INFO L78 Accepts]: Start accepts. Automaton has 18534 states and 57675 transitions. Word has length 67 [2019-12-07 17:31:13,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:13,466 INFO L462 AbstractCegarLoop]: Abstraction has 18534 states and 57675 transitions. [2019-12-07 17:31:13,466 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 17:31:13,466 INFO L276 IsEmpty]: Start isEmpty. Operand 18534 states and 57675 transitions. [2019-12-07 17:31:13,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:31:13,483 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:13,483 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:13,483 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:13,483 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:13,483 INFO L82 PathProgramCache]: Analyzing trace with hash 993635084, now seen corresponding path program 3 times [2019-12-07 17:31:13,483 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:13,484 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1189983138] [2019-12-07 17:31:13,484 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:13,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:13,599 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:13,600 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1189983138] [2019-12-07 17:31:13,600 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:13,600 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:31:13,600 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1157700052] [2019-12-07 17:31:13,600 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:31:13,601 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:13,601 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:31:13,601 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:31:13,601 INFO L87 Difference]: Start difference. First operand 18534 states and 57675 transitions. Second operand 11 states. [2019-12-07 17:31:15,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:15,163 INFO L93 Difference]: Finished difference Result 29036 states and 89939 transitions. [2019-12-07 17:31:15,163 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 17:31:15,163 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 17:31:15,163 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:15,195 INFO L225 Difference]: With dead ends: 29036 [2019-12-07 17:31:15,196 INFO L226 Difference]: Without dead ends: 25553 [2019-12-07 17:31:15,196 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=341, Unknown=0, NotChecked=0, Total=420 [2019-12-07 17:31:15,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25553 states. [2019-12-07 17:31:15,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25553 to 18102. [2019-12-07 17:31:15,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18102 states. [2019-12-07 17:31:15,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18102 states to 18102 states and 56343 transitions. [2019-12-07 17:31:15,546 INFO L78 Accepts]: Start accepts. Automaton has 18102 states and 56343 transitions. Word has length 67 [2019-12-07 17:31:15,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:15,546 INFO L462 AbstractCegarLoop]: Abstraction has 18102 states and 56343 transitions. [2019-12-07 17:31:15,546 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:31:15,547 INFO L276 IsEmpty]: Start isEmpty. Operand 18102 states and 56343 transitions. [2019-12-07 17:31:15,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:31:15,563 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:15,563 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:15,563 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:15,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:15,564 INFO L82 PathProgramCache]: Analyzing trace with hash 397917466, now seen corresponding path program 4 times [2019-12-07 17:31:15,564 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:15,564 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [867223053] [2019-12-07 17:31:15,564 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:15,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:15,670 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:15,670 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [867223053] [2019-12-07 17:31:15,670 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:15,670 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:31:15,670 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [558658608] [2019-12-07 17:31:15,671 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:31:15,671 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:15,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:31:15,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:31:15,671 INFO L87 Difference]: Start difference. First operand 18102 states and 56343 transitions. Second operand 11 states. [2019-12-07 17:31:18,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:18,542 INFO L93 Difference]: Finished difference Result 28640 states and 88718 transitions. [2019-12-07 17:31:18,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 17:31:18,542 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 17:31:18,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:18,575 INFO L225 Difference]: With dead ends: 28640 [2019-12-07 17:31:18,575 INFO L226 Difference]: Without dead ends: 25567 [2019-12-07 17:31:18,575 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=92, Invalid=414, Unknown=0, NotChecked=0, Total=506 [2019-12-07 17:31:18,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25567 states. [2019-12-07 17:31:18,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25567 to 18324. [2019-12-07 17:31:18,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18324 states. [2019-12-07 17:31:18,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18324 states to 18324 states and 56925 transitions. [2019-12-07 17:31:18,931 INFO L78 Accepts]: Start accepts. Automaton has 18324 states and 56925 transitions. Word has length 67 [2019-12-07 17:31:18,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:18,931 INFO L462 AbstractCegarLoop]: Abstraction has 18324 states and 56925 transitions. [2019-12-07 17:31:18,931 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:31:18,931 INFO L276 IsEmpty]: Start isEmpty. Operand 18324 states and 56925 transitions. [2019-12-07 17:31:18,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:31:18,948 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:18,948 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:18,948 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:18,948 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:18,948 INFO L82 PathProgramCache]: Analyzing trace with hash 1803113718, now seen corresponding path program 5 times [2019-12-07 17:31:18,948 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:18,948 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1836387878] [2019-12-07 17:31:18,949 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:18,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:19,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:19,113 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1836387878] [2019-12-07 17:31:19,113 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:19,113 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 17:31:19,113 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1309312914] [2019-12-07 17:31:19,113 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:31:19,113 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:19,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:31:19,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:31:19,114 INFO L87 Difference]: Start difference. First operand 18324 states and 56925 transitions. Second operand 12 states. [2019-12-07 17:31:20,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:20,203 INFO L93 Difference]: Finished difference Result 27214 states and 84219 transitions. [2019-12-07 17:31:20,203 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 17:31:20,203 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 17:31:20,203 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:20,236 INFO L225 Difference]: With dead ends: 27214 [2019-12-07 17:31:20,236 INFO L226 Difference]: Without dead ends: 26023 [2019-12-07 17:31:20,236 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=378, Unknown=0, NotChecked=0, Total=462 [2019-12-07 17:31:20,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26023 states. [2019-12-07 17:31:20,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26023 to 18192. [2019-12-07 17:31:20,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18192 states. [2019-12-07 17:31:20,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18192 states to 18192 states and 56581 transitions. [2019-12-07 17:31:20,585 INFO L78 Accepts]: Start accepts. Automaton has 18192 states and 56581 transitions. Word has length 67 [2019-12-07 17:31:20,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:20,585 INFO L462 AbstractCegarLoop]: Abstraction has 18192 states and 56581 transitions. [2019-12-07 17:31:20,585 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:31:20,585 INFO L276 IsEmpty]: Start isEmpty. Operand 18192 states and 56581 transitions. [2019-12-07 17:31:20,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:31:20,602 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:20,602 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:20,602 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:20,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:20,602 INFO L82 PathProgramCache]: Analyzing trace with hash 1857250972, now seen corresponding path program 6 times [2019-12-07 17:31:20,602 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:20,603 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324102196] [2019-12-07 17:31:20,603 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:20,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:20,863 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:20,863 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1324102196] [2019-12-07 17:31:20,863 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:20,863 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 17:31:20,864 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [522559603] [2019-12-07 17:31:20,864 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 17:31:20,864 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:20,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 17:31:20,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2019-12-07 17:31:20,865 INFO L87 Difference]: Start difference. First operand 18192 states and 56581 transitions. Second operand 17 states. [2019-12-07 17:31:31,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:31,088 INFO L93 Difference]: Finished difference Result 39873 states and 119677 transitions. [2019-12-07 17:31:31,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2019-12-07 17:31:31,089 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 17:31:31,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:31,123 INFO L225 Difference]: With dead ends: 39873 [2019-12-07 17:31:31,123 INFO L226 Difference]: Without dead ends: 33940 [2019-12-07 17:31:31,125 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1370 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=704, Invalid=4126, Unknown=0, NotChecked=0, Total=4830 [2019-12-07 17:31:31,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33940 states. [2019-12-07 17:31:31,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33940 to 21006. [2019-12-07 17:31:31,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21006 states. [2019-12-07 17:31:31,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21006 states to 21006 states and 64664 transitions. [2019-12-07 17:31:31,525 INFO L78 Accepts]: Start accepts. Automaton has 21006 states and 64664 transitions. Word has length 67 [2019-12-07 17:31:31,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:31,526 INFO L462 AbstractCegarLoop]: Abstraction has 21006 states and 64664 transitions. [2019-12-07 17:31:31,526 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 17:31:31,526 INFO L276 IsEmpty]: Start isEmpty. Operand 21006 states and 64664 transitions. [2019-12-07 17:31:31,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:31:31,544 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:31,545 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:31,545 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:31,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:31,545 INFO L82 PathProgramCache]: Analyzing trace with hash -471224516, now seen corresponding path program 7 times [2019-12-07 17:31:31,545 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:31,545 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [906975802] [2019-12-07 17:31:31,545 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:31,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:31,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:31,810 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [906975802] [2019-12-07 17:31:31,810 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:31,810 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 17:31:31,810 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [195885768] [2019-12-07 17:31:31,810 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:31:31,810 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:31,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:31:31,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:31:31,811 INFO L87 Difference]: Start difference. First operand 21006 states and 64664 transitions. Second operand 12 states. [2019-12-07 17:31:32,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:32,682 INFO L93 Difference]: Finished difference Result 25231 states and 76950 transitions. [2019-12-07 17:31:32,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 17:31:32,682 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 17:31:32,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:32,708 INFO L225 Difference]: With dead ends: 25231 [2019-12-07 17:31:32,708 INFO L226 Difference]: Without dead ends: 23420 [2019-12-07 17:31:32,709 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 77 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=130, Invalid=470, Unknown=0, NotChecked=0, Total=600 [2019-12-07 17:31:32,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23420 states. [2019-12-07 17:31:33,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23420 to 21030. [2019-12-07 17:31:33,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21030 states. [2019-12-07 17:31:33,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21030 states to 21030 states and 64702 transitions. [2019-12-07 17:31:33,041 INFO L78 Accepts]: Start accepts. Automaton has 21030 states and 64702 transitions. Word has length 67 [2019-12-07 17:31:33,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:33,041 INFO L462 AbstractCegarLoop]: Abstraction has 21030 states and 64702 transitions. [2019-12-07 17:31:33,041 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:31:33,041 INFO L276 IsEmpty]: Start isEmpty. Operand 21030 states and 64702 transitions. [2019-12-07 17:31:33,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:31:33,060 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:33,060 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:33,060 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:33,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:33,060 INFO L82 PathProgramCache]: Analyzing trace with hash -715209700, now seen corresponding path program 8 times [2019-12-07 17:31:33,060 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:33,060 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941658775] [2019-12-07 17:31:33,061 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:33,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:33,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:33,203 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [941658775] [2019-12-07 17:31:33,203 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:33,203 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 17:31:33,203 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1424300768] [2019-12-07 17:31:33,203 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:31:33,203 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:33,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:31:33,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:31:33,203 INFO L87 Difference]: Start difference. First operand 21030 states and 64702 transitions. Second operand 12 states. [2019-12-07 17:31:35,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:35,346 INFO L93 Difference]: Finished difference Result 35012 states and 106930 transitions. [2019-12-07 17:31:35,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 17:31:35,348 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 17:31:35,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:35,397 INFO L225 Difference]: With dead ends: 35012 [2019-12-07 17:31:35,398 INFO L226 Difference]: Without dead ends: 30821 [2019-12-07 17:31:35,398 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 253 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=215, Invalid=1045, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 17:31:35,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30821 states. [2019-12-07 17:31:35,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30821 to 20302. [2019-12-07 17:31:35,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20302 states. [2019-12-07 17:31:35,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20302 states to 20302 states and 62606 transitions. [2019-12-07 17:31:35,809 INFO L78 Accepts]: Start accepts. Automaton has 20302 states and 62606 transitions. Word has length 67 [2019-12-07 17:31:35,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:35,809 INFO L462 AbstractCegarLoop]: Abstraction has 20302 states and 62606 transitions. [2019-12-07 17:31:35,809 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:31:35,809 INFO L276 IsEmpty]: Start isEmpty. Operand 20302 states and 62606 transitions. [2019-12-07 17:31:35,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:31:35,877 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:35,877 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:35,877 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:35,877 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:35,878 INFO L82 PathProgramCache]: Analyzing trace with hash -1867129146, now seen corresponding path program 9 times [2019-12-07 17:31:35,878 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:35,878 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [926142247] [2019-12-07 17:31:35,878 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:35,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:35,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:35,931 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [926142247] [2019-12-07 17:31:35,931 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:35,931 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:31:35,931 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1339535420] [2019-12-07 17:31:35,932 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:31:35,932 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:35,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:31:35,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:31:35,932 INFO L87 Difference]: Start difference. First operand 20302 states and 62606 transitions. Second operand 6 states. [2019-12-07 17:31:36,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:36,180 INFO L93 Difference]: Finished difference Result 48549 states and 148801 transitions. [2019-12-07 17:31:36,180 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 17:31:36,180 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 17:31:36,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:36,226 INFO L225 Difference]: With dead ends: 48549 [2019-12-07 17:31:36,226 INFO L226 Difference]: Without dead ends: 38837 [2019-12-07 17:31:36,226 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:31:36,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38837 states. [2019-12-07 17:31:36,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38837 to 21278. [2019-12-07 17:31:36,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21278 states. [2019-12-07 17:31:36,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21278 states to 21278 states and 65756 transitions. [2019-12-07 17:31:36,699 INFO L78 Accepts]: Start accepts. Automaton has 21278 states and 65756 transitions. Word has length 67 [2019-12-07 17:31:36,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:36,699 INFO L462 AbstractCegarLoop]: Abstraction has 21278 states and 65756 transitions. [2019-12-07 17:31:36,700 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:31:36,700 INFO L276 IsEmpty]: Start isEmpty. Operand 21278 states and 65756 transitions. [2019-12-07 17:31:36,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:31:36,720 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:36,720 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:36,720 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:36,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:36,721 INFO L82 PathProgramCache]: Analyzing trace with hash -1154306208, now seen corresponding path program 10 times [2019-12-07 17:31:36,721 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:36,721 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1753483884] [2019-12-07 17:31:36,721 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:36,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:31:36,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:31:36,811 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:31:36,811 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:31:36,814 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1297~0.base_23|) (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1297~0.base_23|)) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1297~0.base_23| 4) |v_#length_21|) (= 0 |v_ULTIMATE.start_main_~#t1297~0.offset_17|) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1297~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1297~0.base_23|) |v_ULTIMATE.start_main_~#t1297~0.offset_17| 0)) |v_#memory_int_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= v_~z$w_buff0_used~0_900 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= v_~z$read_delayed~0_7 0) (= |v_#valid_60| (store .cse0 |v_ULTIMATE.start_main_~#t1297~0.base_23| 1)) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (= v_~z$r_buff1_thd1~0_166 0) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_~#t1299~0.offset=|v_ULTIMATE.start_main_~#t1299~0.offset_14|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, ULTIMATE.start_main_~#t1298~0.base=|v_ULTIMATE.start_main_~#t1298~0.base_19|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ULTIMATE.start_main_~#t1299~0.base=|v_ULTIMATE.start_main_~#t1299~0.base_17|, ~x~0=v_~x~0_129, ULTIMATE.start_main_~#t1297~0.base=|v_ULTIMATE.start_main_~#t1297~0.base_23|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ULTIMATE.start_main_~#t1298~0.offset=|v_ULTIMATE.start_main_~#t1298~0.offset_12|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, ULTIMATE.start_main_~#t1297~0.offset=|v_ULTIMATE.start_main_~#t1297~0.offset_17|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_~#t1299~0.offset, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t1298~0.base, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1299~0.base, ~x~0, ULTIMATE.start_main_~#t1297~0.base, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t1298~0.offset, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, ULTIMATE.start_main_~#t1297~0.offset, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:31:36,815 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1298~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1298~0.base_11|) |v_ULTIMATE.start_main_~#t1298~0.offset_9| 1)) |v_#memory_int_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1298~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t1298~0.base_11| 0)) (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1298~0.base_11| 1)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1298~0.base_11|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1298~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t1298~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1298~0.base=|v_ULTIMATE.start_main_~#t1298~0.base_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, ULTIMATE.start_main_~#t1298~0.offset=|v_ULTIMATE.start_main_~#t1298~0.offset_9|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1298~0.base, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t1298~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 17:31:36,815 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:31:36,817 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In1885753882 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1885753882 256)))) (or (and (= ~z~0_In1885753882 |P1Thread1of1ForFork2_#t~ite9_Out1885753882|) (or .cse0 .cse1)) (and (= ~z$w_buff1~0_In1885753882 |P1Thread1of1ForFork2_#t~ite9_Out1885753882|) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1885753882, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1885753882, ~z$w_buff1~0=~z$w_buff1~0_In1885753882, ~z~0=~z~0_In1885753882} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1885753882|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1885753882, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1885753882, ~z$w_buff1~0=~z$w_buff1~0_In1885753882, ~z~0=~z~0_In1885753882} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 17:31:36,817 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 17:31:36,817 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1299~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1299~0.base_13|) |v_ULTIMATE.start_main_~#t1299~0.offset_11| 2)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1299~0.base_13|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1299~0.base_13| 4)) (not (= 0 |v_ULTIMATE.start_main_~#t1299~0.base_13|)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1299~0.base_13|)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1299~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t1299~0.offset_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1299~0.offset=|v_ULTIMATE.start_main_~#t1299~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1299~0.base=|v_ULTIMATE.start_main_~#t1299~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1299~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1299~0.base] because there is no mapped edge [2019-12-07 17:31:36,817 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In333048851 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In333048851 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out333048851| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out333048851| ~z$w_buff0_used~0_In333048851)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In333048851, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In333048851} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In333048851, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out333048851|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In333048851} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 17:31:36,818 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1484081150 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1484081150 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In1484081150 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In1484081150 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1484081150 |P1Thread1of1ForFork2_#t~ite12_Out1484081150|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork2_#t~ite12_Out1484081150| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1484081150, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1484081150, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1484081150, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1484081150} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1484081150, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1484081150, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1484081150, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1484081150|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1484081150} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 17:31:36,820 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In1851830422 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1851830422 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out1851830422| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out1851830422| ~z$r_buff0_thd2~0_In1851830422) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1851830422, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1851830422} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1851830422, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1851830422|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1851830422} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 17:31:36,821 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1013475305 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_In-1013475305| |P2Thread1of1ForFork0_#t~ite26_Out-1013475305|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite27_Out-1013475305| ~z$w_buff0_used~0_In-1013475305)) (and (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1013475305 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In-1013475305 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-1013475305 256))) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In-1013475305 256) 0)))) .cse0 (= |P2Thread1of1ForFork0_#t~ite26_Out-1013475305| |P2Thread1of1ForFork0_#t~ite27_Out-1013475305|) (= |P2Thread1of1ForFork0_#t~ite26_Out-1013475305| ~z$w_buff0_used~0_In-1013475305)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1013475305|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1013475305, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1013475305, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1013475305, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1013475305, ~weak$$choice2~0=~weak$$choice2~0_In-1013475305} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1013475305|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1013475305|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1013475305, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1013475305, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1013475305, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1013475305, ~weak$$choice2~0=~weak$$choice2~0_In-1013475305} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 17:31:36,822 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 17:31:36,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-312449153 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-312449153 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-312449153|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-312449153 |P0Thread1of1ForFork1_#t~ite5_Out-312449153|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-312449153, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-312449153} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-312449153|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-312449153, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-312449153} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 17:31:36,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 17:31:36,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1484602651 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out1484602651| |P2Thread1of1ForFork0_#t~ite39_Out1484602651|)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In1484602651 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out1484602651| ~z~0_In1484602651) (or .cse0 .cse1) .cse2) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out1484602651| ~z$w_buff1~0_In1484602651) .cse2 (not .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1484602651, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1484602651, ~z$w_buff1~0=~z$w_buff1~0_In1484602651, ~z~0=~z~0_In1484602651} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out1484602651|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1484602651|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1484602651, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1484602651, ~z$w_buff1~0=~z$w_buff1~0_In1484602651, ~z~0=~z~0_In1484602651} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:31:36,824 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-266967960 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-266967960 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-266967960| 0)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-266967960| ~z$w_buff0_used~0_In-266967960)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-266967960, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-266967960} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-266967960, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-266967960|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-266967960} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 17:31:36,824 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd3~0_In1289048642 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In1289048642 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1289048642 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1289048642 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out1289048642|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In1289048642 |P2Thread1of1ForFork0_#t~ite41_Out1289048642|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1289048642, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1289048642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1289048642, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1289048642} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1289048642, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1289048642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1289048642, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1289048642, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1289048642|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 17:31:36,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1052821519 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1052821519 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1052821519|) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1052821519| ~z$r_buff0_thd3~0_In-1052821519) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1052821519, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1052821519} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1052821519, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1052821519, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1052821519|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 17:31:36,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1834842706 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-1834842706 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1834842706 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1834842706 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-1834842706 |P2Thread1of1ForFork0_#t~ite43_Out-1834842706|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1834842706|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1834842706, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1834842706, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1834842706, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1834842706} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1834842706|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1834842706, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1834842706, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1834842706, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1834842706} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 17:31:36,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:31:36,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In-1307786193 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1307786193 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1307786193 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-1307786193 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1307786193| ~z$w_buff1_used~0_In-1307786193) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P0Thread1of1ForFork1_#t~ite6_Out-1307786193| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307786193, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1307786193, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1307786193, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1307786193} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307786193, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1307786193|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1307786193, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1307786193, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1307786193} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 17:31:36,826 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse0 (= ~z$r_buff0_thd1~0_Out1154568952 ~z$r_buff0_thd1~0_In1154568952)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1154568952 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1154568952 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse1) (= ~z$r_buff0_thd1~0_Out1154568952 0) (not .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1154568952, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1154568952} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1154568952, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1154568952|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1154568952} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:31:36,826 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-658878640 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-658878640 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In-658878640 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-658878640 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-658878640| ~z$r_buff1_thd1~0_In-658878640) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P0Thread1of1ForFork1_#t~ite8_Out-658878640| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-658878640, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-658878640, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-658878640, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-658878640} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-658878640|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-658878640, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-658878640, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-658878640, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-658878640} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 17:31:36,826 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:31:36,826 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In398745964 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In398745964 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In398745964 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In398745964 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out398745964|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~z$r_buff1_thd2~0_In398745964 |P1Thread1of1ForFork2_#t~ite14_Out398745964|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In398745964, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In398745964, ~z$w_buff1_used~0=~z$w_buff1_used~0_In398745964, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In398745964} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In398745964, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In398745964, ~z$w_buff1_used~0=~z$w_buff1_used~0_In398745964, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out398745964|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In398745964} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 17:31:36,826 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:31:36,826 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:31:36,827 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite47_Out-405469233| |ULTIMATE.start_main_#t~ite48_Out-405469233|)) (.cse1 (= (mod ~z$w_buff1_used~0_In-405469233 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-405469233 256) 0))) (or (and .cse0 (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out-405469233| ~z$w_buff1~0_In-405469233) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~ite47_Out-405469233| ~z~0_In-405469233)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-405469233, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-405469233, ~z$w_buff1~0=~z$w_buff1~0_In-405469233, ~z~0=~z~0_In-405469233} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-405469233, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-405469233|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-405469233, ~z$w_buff1~0=~z$w_buff1~0_In-405469233, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-405469233|, ~z~0=~z~0_In-405469233} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:31:36,827 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1298049477 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1298049477 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out1298049477|)) (and (= ~z$w_buff0_used~0_In1298049477 |ULTIMATE.start_main_#t~ite49_Out1298049477|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1298049477, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1298049477} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1298049477, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1298049477, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1298049477|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:31:36,827 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In1816394258 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1816394258 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1816394258 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1816394258 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out1816394258| 0)) (and (or .cse3 .cse2) (= ~z$w_buff1_used~0_In1816394258 |ULTIMATE.start_main_#t~ite50_Out1816394258|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1816394258, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1816394258, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1816394258, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1816394258} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1816394258|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1816394258, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1816394258, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1816394258, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1816394258} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:31:36,828 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1970806802 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1970806802 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In1970806802 |ULTIMATE.start_main_#t~ite51_Out1970806802|)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out1970806802| 0) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1970806802, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1970806802} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1970806802, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1970806802|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1970806802} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:31:36,828 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In218642557 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In218642557 256))) (.cse2 (= (mod ~z$r_buff0_thd0~0_In218642557 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In218642557 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd0~0_In218642557 |ULTIMATE.start_main_#t~ite52_Out218642557|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out218642557|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In218642557, ~z$w_buff0_used~0=~z$w_buff0_used~0_In218642557, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In218642557, ~z$w_buff1_used~0=~z$w_buff1_used~0_In218642557} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out218642557|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In218642557, ~z$w_buff0_used~0=~z$w_buff0_used~0_In218642557, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In218642557, ~z$w_buff1_used~0=~z$w_buff1_used~0_In218642557} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:31:36,828 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:31:36,884 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:31:36 BasicIcfg [2019-12-07 17:31:36,884 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:31:36,885 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:31:36,885 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:31:36,885 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:31:36,885 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:29:09" (3/4) ... [2019-12-07 17:31:36,886 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:31:36,887 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1297~0.base_23|) (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1297~0.base_23|)) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1297~0.base_23| 4) |v_#length_21|) (= 0 |v_ULTIMATE.start_main_~#t1297~0.offset_17|) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1297~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1297~0.base_23|) |v_ULTIMATE.start_main_~#t1297~0.offset_17| 0)) |v_#memory_int_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= v_~z$w_buff0_used~0_900 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= v_~z$read_delayed~0_7 0) (= |v_#valid_60| (store .cse0 |v_ULTIMATE.start_main_~#t1297~0.base_23| 1)) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (= v_~z$r_buff1_thd1~0_166 0) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_~#t1299~0.offset=|v_ULTIMATE.start_main_~#t1299~0.offset_14|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, ULTIMATE.start_main_~#t1298~0.base=|v_ULTIMATE.start_main_~#t1298~0.base_19|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ULTIMATE.start_main_~#t1299~0.base=|v_ULTIMATE.start_main_~#t1299~0.base_17|, ~x~0=v_~x~0_129, ULTIMATE.start_main_~#t1297~0.base=|v_ULTIMATE.start_main_~#t1297~0.base_23|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ULTIMATE.start_main_~#t1298~0.offset=|v_ULTIMATE.start_main_~#t1298~0.offset_12|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, ULTIMATE.start_main_~#t1297~0.offset=|v_ULTIMATE.start_main_~#t1297~0.offset_17|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_~#t1299~0.offset, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t1298~0.base, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1299~0.base, ~x~0, ULTIMATE.start_main_~#t1297~0.base, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t1298~0.offset, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, ULTIMATE.start_main_~#t1297~0.offset, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:31:36,887 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1298~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1298~0.base_11|) |v_ULTIMATE.start_main_~#t1298~0.offset_9| 1)) |v_#memory_int_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1298~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t1298~0.base_11| 0)) (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1298~0.base_11| 1)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1298~0.base_11|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1298~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t1298~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1298~0.base=|v_ULTIMATE.start_main_~#t1298~0.base_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, ULTIMATE.start_main_~#t1298~0.offset=|v_ULTIMATE.start_main_~#t1298~0.offset_9|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1298~0.base, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t1298~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 17:31:36,887 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:31:36,889 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In1885753882 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1885753882 256)))) (or (and (= ~z~0_In1885753882 |P1Thread1of1ForFork2_#t~ite9_Out1885753882|) (or .cse0 .cse1)) (and (= ~z$w_buff1~0_In1885753882 |P1Thread1of1ForFork2_#t~ite9_Out1885753882|) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1885753882, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1885753882, ~z$w_buff1~0=~z$w_buff1~0_In1885753882, ~z~0=~z~0_In1885753882} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1885753882|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1885753882, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1885753882, ~z$w_buff1~0=~z$w_buff1~0_In1885753882, ~z~0=~z~0_In1885753882} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 17:31:36,889 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 17:31:36,889 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1299~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1299~0.base_13|) |v_ULTIMATE.start_main_~#t1299~0.offset_11| 2)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1299~0.base_13|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1299~0.base_13| 4)) (not (= 0 |v_ULTIMATE.start_main_~#t1299~0.base_13|)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1299~0.base_13|)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1299~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t1299~0.offset_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1299~0.offset=|v_ULTIMATE.start_main_~#t1299~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1299~0.base=|v_ULTIMATE.start_main_~#t1299~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1299~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1299~0.base] because there is no mapped edge [2019-12-07 17:31:36,889 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In333048851 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In333048851 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out333048851| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out333048851| ~z$w_buff0_used~0_In333048851)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In333048851, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In333048851} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In333048851, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out333048851|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In333048851} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 17:31:36,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1484081150 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1484081150 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In1484081150 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In1484081150 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1484081150 |P1Thread1of1ForFork2_#t~ite12_Out1484081150|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork2_#t~ite12_Out1484081150| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1484081150, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1484081150, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1484081150, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1484081150} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1484081150, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1484081150, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1484081150, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1484081150|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1484081150} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 17:31:36,893 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In1851830422 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1851830422 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out1851830422| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out1851830422| ~z$r_buff0_thd2~0_In1851830422) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1851830422, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1851830422} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1851830422, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1851830422|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1851830422} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 17:31:36,895 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1013475305 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_In-1013475305| |P2Thread1of1ForFork0_#t~ite26_Out-1013475305|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite27_Out-1013475305| ~z$w_buff0_used~0_In-1013475305)) (and (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1013475305 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In-1013475305 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-1013475305 256))) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In-1013475305 256) 0)))) .cse0 (= |P2Thread1of1ForFork0_#t~ite26_Out-1013475305| |P2Thread1of1ForFork0_#t~ite27_Out-1013475305|) (= |P2Thread1of1ForFork0_#t~ite26_Out-1013475305| ~z$w_buff0_used~0_In-1013475305)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1013475305|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1013475305, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1013475305, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1013475305, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1013475305, ~weak$$choice2~0=~weak$$choice2~0_In-1013475305} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1013475305|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1013475305|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1013475305, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1013475305, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1013475305, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1013475305, ~weak$$choice2~0=~weak$$choice2~0_In-1013475305} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 17:31:36,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 17:31:36,898 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-312449153 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-312449153 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-312449153|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-312449153 |P0Thread1of1ForFork1_#t~ite5_Out-312449153|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-312449153, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-312449153} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-312449153|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-312449153, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-312449153} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 17:31:36,898 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 17:31:36,899 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1484602651 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out1484602651| |P2Thread1of1ForFork0_#t~ite39_Out1484602651|)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In1484602651 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out1484602651| ~z~0_In1484602651) (or .cse0 .cse1) .cse2) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out1484602651| ~z$w_buff1~0_In1484602651) .cse2 (not .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1484602651, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1484602651, ~z$w_buff1~0=~z$w_buff1~0_In1484602651, ~z~0=~z~0_In1484602651} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out1484602651|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1484602651|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1484602651, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1484602651, ~z$w_buff1~0=~z$w_buff1~0_In1484602651, ~z~0=~z~0_In1484602651} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:31:36,899 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-266967960 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-266967960 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-266967960| 0)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-266967960| ~z$w_buff0_used~0_In-266967960)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-266967960, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-266967960} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-266967960, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-266967960|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-266967960} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 17:31:36,900 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd3~0_In1289048642 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In1289048642 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1289048642 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1289048642 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out1289048642|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In1289048642 |P2Thread1of1ForFork0_#t~ite41_Out1289048642|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1289048642, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1289048642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1289048642, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1289048642} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1289048642, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1289048642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1289048642, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1289048642, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1289048642|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 17:31:36,901 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1052821519 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1052821519 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1052821519|) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1052821519| ~z$r_buff0_thd3~0_In-1052821519) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1052821519, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1052821519} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1052821519, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1052821519, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1052821519|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 17:31:36,901 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1834842706 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-1834842706 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1834842706 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1834842706 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-1834842706 |P2Thread1of1ForFork0_#t~ite43_Out-1834842706|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1834842706|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1834842706, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1834842706, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1834842706, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1834842706} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1834842706|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1834842706, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1834842706, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1834842706, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1834842706} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 17:31:36,901 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:31:36,902 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In-1307786193 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1307786193 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1307786193 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-1307786193 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1307786193| ~z$w_buff1_used~0_In-1307786193) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P0Thread1of1ForFork1_#t~ite6_Out-1307786193| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307786193, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1307786193, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1307786193, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1307786193} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307786193, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1307786193|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1307786193, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1307786193, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1307786193} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 17:31:36,902 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse0 (= ~z$r_buff0_thd1~0_Out1154568952 ~z$r_buff0_thd1~0_In1154568952)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1154568952 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1154568952 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse1) (= ~z$r_buff0_thd1~0_Out1154568952 0) (not .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1154568952, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1154568952} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1154568952, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1154568952|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1154568952} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:31:36,902 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-658878640 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-658878640 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In-658878640 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-658878640 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-658878640| ~z$r_buff1_thd1~0_In-658878640) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P0Thread1of1ForFork1_#t~ite8_Out-658878640| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-658878640, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-658878640, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-658878640, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-658878640} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-658878640|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-658878640, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-658878640, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-658878640, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-658878640} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 17:31:36,902 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:31:36,903 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In398745964 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In398745964 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In398745964 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In398745964 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out398745964|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~z$r_buff1_thd2~0_In398745964 |P1Thread1of1ForFork2_#t~ite14_Out398745964|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In398745964, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In398745964, ~z$w_buff1_used~0=~z$w_buff1_used~0_In398745964, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In398745964} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In398745964, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In398745964, ~z$w_buff1_used~0=~z$w_buff1_used~0_In398745964, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out398745964|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In398745964} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 17:31:36,903 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:31:36,903 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:31:36,904 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite47_Out-405469233| |ULTIMATE.start_main_#t~ite48_Out-405469233|)) (.cse1 (= (mod ~z$w_buff1_used~0_In-405469233 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-405469233 256) 0))) (or (and .cse0 (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out-405469233| ~z$w_buff1~0_In-405469233) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~ite47_Out-405469233| ~z~0_In-405469233)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-405469233, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-405469233, ~z$w_buff1~0=~z$w_buff1~0_In-405469233, ~z~0=~z~0_In-405469233} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-405469233, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-405469233|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-405469233, ~z$w_buff1~0=~z$w_buff1~0_In-405469233, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-405469233|, ~z~0=~z~0_In-405469233} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:31:36,904 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1298049477 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1298049477 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out1298049477|)) (and (= ~z$w_buff0_used~0_In1298049477 |ULTIMATE.start_main_#t~ite49_Out1298049477|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1298049477, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1298049477} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1298049477, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1298049477, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1298049477|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:31:36,905 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In1816394258 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1816394258 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1816394258 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1816394258 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out1816394258| 0)) (and (or .cse3 .cse2) (= ~z$w_buff1_used~0_In1816394258 |ULTIMATE.start_main_#t~ite50_Out1816394258|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1816394258, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1816394258, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1816394258, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1816394258} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1816394258|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1816394258, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1816394258, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1816394258, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1816394258} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:31:36,906 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1970806802 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1970806802 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In1970806802 |ULTIMATE.start_main_#t~ite51_Out1970806802|)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out1970806802| 0) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1970806802, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1970806802} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1970806802, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1970806802|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1970806802} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:31:36,906 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In218642557 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In218642557 256))) (.cse2 (= (mod ~z$r_buff0_thd0~0_In218642557 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In218642557 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd0~0_In218642557 |ULTIMATE.start_main_#t~ite52_Out218642557|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out218642557|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In218642557, ~z$w_buff0_used~0=~z$w_buff0_used~0_In218642557, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In218642557, ~z$w_buff1_used~0=~z$w_buff1_used~0_In218642557} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out218642557|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In218642557, ~z$w_buff0_used~0=~z$w_buff0_used~0_In218642557, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In218642557, ~z$w_buff1_used~0=~z$w_buff1_used~0_In218642557} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:31:36,906 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:31:36,962 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_5c5aad29-dfcb-4d69-a1c7-996dae915e1f/bin/uautomizer/witness.graphml [2019-12-07 17:31:36,962 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:31:36,963 INFO L168 Benchmark]: Toolchain (without parser) took 147984.49 ms. Allocated memory was 1.0 GB in the beginning and 7.3 GB in the end (delta: 6.3 GB). Free memory was 939.3 MB in the beginning and 5.9 GB in the end (delta: -4.9 GB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. [2019-12-07 17:31:36,963 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:31:36,964 INFO L168 Benchmark]: CACSL2BoogieTranslator took 403.33 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 88.1 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -120.5 MB). Peak memory consumption was 29.0 MB. Max. memory is 11.5 GB. [2019-12-07 17:31:36,964 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.50 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:31:36,964 INFO L168 Benchmark]: Boogie Preprocessor took 26.16 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:31:36,964 INFO L168 Benchmark]: RCFGBuilder took 409.45 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 17:31:36,965 INFO L168 Benchmark]: TraceAbstraction took 147021.90 ms. Allocated memory was 1.1 GB in the beginning and 7.3 GB in the end (delta: 6.2 GB). Free memory was 1.0 GB in the beginning and 5.9 GB in the end (delta: -4.9 GB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. [2019-12-07 17:31:36,965 INFO L168 Benchmark]: Witness Printer took 77.52 ms. Allocated memory is still 7.3 GB. Free memory was 5.9 GB in the beginning and 5.9 GB in the end (delta: 44.3 MB). Peak memory consumption was 44.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:31:36,966 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 403.33 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 88.1 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -120.5 MB). Peak memory consumption was 29.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.50 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.16 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 409.45 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 147021.90 ms. Allocated memory was 1.1 GB in the beginning and 7.3 GB in the end (delta: 6.2 GB). Free memory was 1.0 GB in the beginning and 5.9 GB in the end (delta: -4.9 GB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. * Witness Printer took 77.52 ms. Allocated memory is still 7.3 GB. Free memory was 5.9 GB in the beginning and 5.9 GB in the end (delta: 44.3 MB). Peak memory consumption was 44.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 176 ProgramPointsBefore, 95 ProgramPointsAfterwards, 213 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 55 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 29 ChoiceCompositions, 7276 VarBasedMoverChecksPositive, 432 VarBasedMoverChecksNegative, 272 SemBasedMoverChecksPositive, 254 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 130045 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L822] FCALL, FORK 0 pthread_create(&t1297, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t1298, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 1 [L763] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L826] FCALL, FORK 0 pthread_create(&t1299, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 1 [L783] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L784] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L785] 3 z$flush_delayed = weak$$choice2 [L786] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L788] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L788] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L789] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L789] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L790] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L791] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L793] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L794] 3 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L799] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L800] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L801] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L802] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L832] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L832] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L833] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L834] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L835] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 146.8s, OverallIterations: 26, TraceHistogramMax: 1, AutomataDifference: 38.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6197 SDtfs, 7029 SDslu, 24000 SDs, 0 SdLazy, 23659 SolverSat, 370 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 17.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 353 GetRequests, 34 SyntacticMatches, 16 SemanticMatches, 303 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2099 ImplicationChecksByTransitivity, 3.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=237826occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 81.6s AutomataMinimizationTime, 25 MinimizatonAttempts, 319124 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.7s InterpolantComputationTime, 1115 NumberOfCodeBlocks, 1115 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 1023 ConstructedInterpolants, 0 QuantifiedInterpolants, 269279 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...