./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix049_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_033cc2d2-1d8d-4e72-aad0-ecc3af6466a8/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_033cc2d2-1d8d-4e72-aad0-ecc3af6466a8/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_033cc2d2-1d8d-4e72-aad0-ecc3af6466a8/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_033cc2d2-1d8d-4e72-aad0-ecc3af6466a8/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix049_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_033cc2d2-1d8d-4e72-aad0-ecc3af6466a8/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_033cc2d2-1d8d-4e72-aad0-ecc3af6466a8/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 52f17a1e60f5348ed9714f763e8ce532e7cd146f ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:24:12,841 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:24:12,843 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:24:12,850 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:24:12,851 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:24:12,851 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:24:12,852 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:24:12,853 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:24:12,855 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:24:12,855 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:24:12,856 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:24:12,857 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:24:12,857 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:24:12,858 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:24:12,858 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:24:12,859 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:24:12,860 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:24:12,861 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:24:12,862 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:24:12,864 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:24:12,865 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:24:12,866 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:24:12,866 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:24:12,867 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:24:12,869 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:24:12,869 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:24:12,869 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:24:12,869 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:24:12,870 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:24:12,870 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:24:12,870 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:24:12,871 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:24:12,871 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:24:12,872 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:24:12,872 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:24:12,872 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:24:12,873 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:24:12,873 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:24:12,873 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:24:12,874 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:24:12,874 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:24:12,874 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_033cc2d2-1d8d-4e72-aad0-ecc3af6466a8/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 15:24:12,884 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:24:12,884 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:24:12,884 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 15:24:12,885 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 15:24:12,885 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 15:24:12,885 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:24:12,885 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:24:12,885 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:24:12,885 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:24:12,885 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:24:12,885 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:24:12,886 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:24:12,886 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:24:12,886 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:24:12,886 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:24:12,886 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:24:12,886 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:24:12,886 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:24:12,886 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 15:24:12,886 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:24:12,887 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:24:12,887 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:24:12,887 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:24:12,887 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:24:12,887 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:24:12,887 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 15:24:12,887 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:24:12,887 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:24:12,887 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:24:12,888 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_033cc2d2-1d8d-4e72-aad0-ecc3af6466a8/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 52f17a1e60f5348ed9714f763e8ce532e7cd146f [2019-12-07 15:24:12,992 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:24:13,002 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:24:13,005 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:24:13,006 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:24:13,006 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:24:13,007 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_033cc2d2-1d8d-4e72-aad0-ecc3af6466a8/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix049_power.opt.i [2019-12-07 15:24:13,047 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_033cc2d2-1d8d-4e72-aad0-ecc3af6466a8/bin/uautomizer/data/339ba9ccc/683d9882238746498331a16242e5428c/FLAG2ca1ffba9 [2019-12-07 15:24:13,577 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:24:13,578 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_033cc2d2-1d8d-4e72-aad0-ecc3af6466a8/sv-benchmarks/c/pthread-wmm/mix049_power.opt.i [2019-12-07 15:24:13,588 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_033cc2d2-1d8d-4e72-aad0-ecc3af6466a8/bin/uautomizer/data/339ba9ccc/683d9882238746498331a16242e5428c/FLAG2ca1ffba9 [2019-12-07 15:24:14,031 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_033cc2d2-1d8d-4e72-aad0-ecc3af6466a8/bin/uautomizer/data/339ba9ccc/683d9882238746498331a16242e5428c [2019-12-07 15:24:14,034 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:24:14,035 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:24:14,036 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:24:14,036 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:24:14,038 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:24:14,039 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:24:14" (1/1) ... [2019-12-07 15:24:14,041 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4a374d02 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:14, skipping insertion in model container [2019-12-07 15:24:14,041 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:24:14" (1/1) ... [2019-12-07 15:24:14,047 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:24:14,076 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:24:14,319 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:24:14,327 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:24:14,369 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:24:14,413 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:24:14,414 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:14 WrapperNode [2019-12-07 15:24:14,414 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:24:14,414 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:24:14,414 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:24:14,415 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:24:14,420 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:14" (1/1) ... [2019-12-07 15:24:14,433 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:14" (1/1) ... [2019-12-07 15:24:14,451 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:24:14,452 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:24:14,452 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:24:14,452 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:24:14,458 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:14" (1/1) ... [2019-12-07 15:24:14,458 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:14" (1/1) ... [2019-12-07 15:24:14,461 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:14" (1/1) ... [2019-12-07 15:24:14,461 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:14" (1/1) ... [2019-12-07 15:24:14,469 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:14" (1/1) ... [2019-12-07 15:24:14,472 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:14" (1/1) ... [2019-12-07 15:24:14,474 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:14" (1/1) ... [2019-12-07 15:24:14,477 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:24:14,477 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:24:14,477 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:24:14,478 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:24:14,478 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:14" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_033cc2d2-1d8d-4e72-aad0-ecc3af6466a8/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:24:14,517 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:24:14,517 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:24:14,517 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:24:14,517 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:24:14,517 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:24:14,517 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:24:14,517 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:24:14,518 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:24:14,518 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 15:24:14,518 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 15:24:14,518 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:24:14,518 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:24:14,518 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:24:14,519 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:24:14,885 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:24:14,885 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 15:24:14,886 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:24:14 BoogieIcfgContainer [2019-12-07 15:24:14,886 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:24:14,887 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:24:14,887 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:24:14,889 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:24:14,889 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:24:14" (1/3) ... [2019-12-07 15:24:14,889 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@69d3ef64 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:24:14, skipping insertion in model container [2019-12-07 15:24:14,890 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:14" (2/3) ... [2019-12-07 15:24:14,890 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@69d3ef64 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:24:14, skipping insertion in model container [2019-12-07 15:24:14,890 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:24:14" (3/3) ... [2019-12-07 15:24:14,891 INFO L109 eAbstractionObserver]: Analyzing ICFG mix049_power.opt.i [2019-12-07 15:24:14,897 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:24:14,897 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:24:14,902 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 15:24:14,903 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:24:14,929 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,930 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,930 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,930 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,931 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,931 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,933 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,933 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,933 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,933 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,933 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,935 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,935 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,935 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,935 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,935 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,935 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,936 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,936 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,936 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,936 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,936 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,939 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,939 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,939 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,939 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,939 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,939 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,941 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,941 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,941 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,942 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,942 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:14,967 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 15:24:14,979 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:24:14,979 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:24:14,979 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:24:14,979 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:24:14,979 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:24:14,979 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:24:14,980 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:24:14,980 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:24:14,990 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 15:24:14,991 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 15:24:15,046 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 15:24:15,047 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:24:15,057 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:24:15,073 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 15:24:15,105 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 15:24:15,105 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:24:15,111 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:24:15,126 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 15:24:15,127 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:24:18,058 WARN L192 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 15:24:18,357 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130045 [2019-12-07 15:24:18,357 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 15:24:18,360 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 15:24:38,044 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 126452 states. [2019-12-07 15:24:38,045 INFO L276 IsEmpty]: Start isEmpty. Operand 126452 states. [2019-12-07 15:24:38,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 15:24:38,049 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:38,049 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 15:24:38,050 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:38,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:38,053 INFO L82 PathProgramCache]: Analyzing trace with hash 913925, now seen corresponding path program 1 times [2019-12-07 15:24:38,059 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:38,059 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373510199] [2019-12-07 15:24:38,059 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:38,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:38,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:38,184 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373510199] [2019-12-07 15:24:38,184 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:38,185 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:24:38,185 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [111170598] [2019-12-07 15:24:38,188 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:24:38,188 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:38,197 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:24:38,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:24:38,198 INFO L87 Difference]: Start difference. First operand 126452 states. Second operand 3 states. [2019-12-07 15:24:38,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:38,955 INFO L93 Difference]: Finished difference Result 125570 states and 538788 transitions. [2019-12-07 15:24:38,955 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:24:38,956 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 15:24:38,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:39,443 INFO L225 Difference]: With dead ends: 125570 [2019-12-07 15:24:39,443 INFO L226 Difference]: Without dead ends: 111010 [2019-12-07 15:24:39,444 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:24:45,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111010 states. [2019-12-07 15:24:46,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111010 to 111010. [2019-12-07 15:24:46,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111010 states. [2019-12-07 15:24:47,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111010 states to 111010 states and 475060 transitions. [2019-12-07 15:24:47,358 INFO L78 Accepts]: Start accepts. Automaton has 111010 states and 475060 transitions. Word has length 3 [2019-12-07 15:24:47,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:47,358 INFO L462 AbstractCegarLoop]: Abstraction has 111010 states and 475060 transitions. [2019-12-07 15:24:47,358 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:24:47,358 INFO L276 IsEmpty]: Start isEmpty. Operand 111010 states and 475060 transitions. [2019-12-07 15:24:47,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 15:24:47,363 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:47,363 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:47,363 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:47,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:47,364 INFO L82 PathProgramCache]: Analyzing trace with hash -1753094800, now seen corresponding path program 1 times [2019-12-07 15:24:47,364 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:47,364 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1315942218] [2019-12-07 15:24:47,364 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:47,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:47,429 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:47,430 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1315942218] [2019-12-07 15:24:47,430 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:47,430 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:24:47,430 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [364550686] [2019-12-07 15:24:47,431 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:24:47,431 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:47,431 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:24:47,431 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:24:47,431 INFO L87 Difference]: Start difference. First operand 111010 states and 475060 transitions. Second operand 4 states. [2019-12-07 15:24:48,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:48,350 INFO L93 Difference]: Finished difference Result 172646 states and 710109 transitions. [2019-12-07 15:24:48,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:24:48,350 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 15:24:48,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:48,798 INFO L225 Difference]: With dead ends: 172646 [2019-12-07 15:24:48,798 INFO L226 Difference]: Without dead ends: 172548 [2019-12-07 15:24:48,799 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:24:54,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172548 states. [2019-12-07 15:24:58,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172548 to 158936. [2019-12-07 15:24:58,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158936 states. [2019-12-07 15:24:59,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158936 states to 158936 states and 661803 transitions. [2019-12-07 15:24:59,036 INFO L78 Accepts]: Start accepts. Automaton has 158936 states and 661803 transitions. Word has length 11 [2019-12-07 15:24:59,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:59,036 INFO L462 AbstractCegarLoop]: Abstraction has 158936 states and 661803 transitions. [2019-12-07 15:24:59,036 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:24:59,037 INFO L276 IsEmpty]: Start isEmpty. Operand 158936 states and 661803 transitions. [2019-12-07 15:24:59,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 15:24:59,043 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:59,044 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:59,044 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:59,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:59,044 INFO L82 PathProgramCache]: Analyzing trace with hash 216434073, now seen corresponding path program 1 times [2019-12-07 15:24:59,044 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:59,045 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1818336667] [2019-12-07 15:24:59,045 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:59,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:59,107 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:59,107 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1818336667] [2019-12-07 15:24:59,107 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:59,107 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:24:59,107 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [430987241] [2019-12-07 15:24:59,107 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:24:59,108 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:59,108 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:24:59,108 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:24:59,108 INFO L87 Difference]: Start difference. First operand 158936 states and 661803 transitions. Second operand 4 states. [2019-12-07 15:25:00,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:00,725 INFO L93 Difference]: Finished difference Result 228902 states and 931210 transitions. [2019-12-07 15:25:00,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:25:00,726 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 15:25:00,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:01,300 INFO L225 Difference]: With dead ends: 228902 [2019-12-07 15:25:01,301 INFO L226 Difference]: Without dead ends: 228790 [2019-12-07 15:25:01,301 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:25:10,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228790 states. [2019-12-07 15:25:12,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228790 to 192327. [2019-12-07 15:25:12,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192327 states. [2019-12-07 15:25:13,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192327 states to 192327 states and 796272 transitions. [2019-12-07 15:25:13,837 INFO L78 Accepts]: Start accepts. Automaton has 192327 states and 796272 transitions. Word has length 13 [2019-12-07 15:25:13,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:25:13,838 INFO L462 AbstractCegarLoop]: Abstraction has 192327 states and 796272 transitions. [2019-12-07 15:25:13,838 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:25:13,838 INFO L276 IsEmpty]: Start isEmpty. Operand 192327 states and 796272 transitions. [2019-12-07 15:25:13,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 15:25:13,846 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:25:13,846 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:25:13,846 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:25:13,847 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:25:13,847 INFO L82 PathProgramCache]: Analyzing trace with hash -1948590504, now seen corresponding path program 1 times [2019-12-07 15:25:13,847 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:25:13,847 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [622833063] [2019-12-07 15:25:13,847 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:25:13,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:25:13,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:25:13,884 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [622833063] [2019-12-07 15:25:13,884 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:25:13,884 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:25:13,884 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1717616677] [2019-12-07 15:25:13,884 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:25:13,885 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:25:13,885 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:25:13,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:25:13,885 INFO L87 Difference]: Start difference. First operand 192327 states and 796272 transitions. Second operand 3 states. [2019-12-07 15:25:15,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:15,042 INFO L93 Difference]: Finished difference Result 280788 states and 1158875 transitions. [2019-12-07 15:25:15,043 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:25:15,043 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 15:25:15,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:15,771 INFO L225 Difference]: With dead ends: 280788 [2019-12-07 15:25:15,771 INFO L226 Difference]: Without dead ends: 280788 [2019-12-07 15:25:15,771 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:25:22,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280788 states. [2019-12-07 15:25:29,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280788 to 222888. [2019-12-07 15:25:29,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222888 states. [2019-12-07 15:25:29,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222888 states to 222888 states and 926633 transitions. [2019-12-07 15:25:29,915 INFO L78 Accepts]: Start accepts. Automaton has 222888 states and 926633 transitions. Word has length 16 [2019-12-07 15:25:29,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:25:29,916 INFO L462 AbstractCegarLoop]: Abstraction has 222888 states and 926633 transitions. [2019-12-07 15:25:29,916 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:25:29,916 INFO L276 IsEmpty]: Start isEmpty. Operand 222888 states and 926633 transitions. [2019-12-07 15:25:29,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 15:25:29,923 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:25:29,923 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:25:29,923 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:25:29,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:25:29,923 INFO L82 PathProgramCache]: Analyzing trace with hash -1821591471, now seen corresponding path program 1 times [2019-12-07 15:25:29,923 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:25:29,923 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1175610663] [2019-12-07 15:25:29,924 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:25:29,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:25:29,969 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:25:29,969 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1175610663] [2019-12-07 15:25:29,969 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:25:29,970 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:25:29,970 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2052997676] [2019-12-07 15:25:29,970 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:25:29,970 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:25:29,970 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:25:29,970 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:25:29,970 INFO L87 Difference]: Start difference. First operand 222888 states and 926633 transitions. Second operand 5 states. [2019-12-07 15:25:31,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:31,882 INFO L93 Difference]: Finished difference Result 298473 states and 1226263 transitions. [2019-12-07 15:25:31,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:25:31,883 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 15:25:31,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:32,645 INFO L225 Difference]: With dead ends: 298473 [2019-12-07 15:25:32,645 INFO L226 Difference]: Without dead ends: 298473 [2019-12-07 15:25:32,646 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:25:40,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298473 states. [2019-12-07 15:25:44,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298473 to 237826. [2019-12-07 15:25:44,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237826 states. [2019-12-07 15:25:45,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237826 states to 237826 states and 988542 transitions. [2019-12-07 15:25:45,098 INFO L78 Accepts]: Start accepts. Automaton has 237826 states and 988542 transitions. Word has length 16 [2019-12-07 15:25:45,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:25:45,099 INFO L462 AbstractCegarLoop]: Abstraction has 237826 states and 988542 transitions. [2019-12-07 15:25:45,099 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:25:45,099 INFO L276 IsEmpty]: Start isEmpty. Operand 237826 states and 988542 transitions. [2019-12-07 15:25:45,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:25:45,111 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:25:45,111 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:25:45,112 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:25:45,112 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:25:45,112 INFO L82 PathProgramCache]: Analyzing trace with hash -504931817, now seen corresponding path program 1 times [2019-12-07 15:25:45,112 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:25:45,112 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1789166283] [2019-12-07 15:25:45,112 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:25:45,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:25:45,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:25:45,162 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1789166283] [2019-12-07 15:25:45,162 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:25:45,162 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:25:45,162 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [524756580] [2019-12-07 15:25:45,163 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:25:45,163 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:25:45,163 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:25:45,163 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:25:45,163 INFO L87 Difference]: Start difference. First operand 237826 states and 988542 transitions. Second operand 3 states. [2019-12-07 15:25:46,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:46,192 INFO L93 Difference]: Finished difference Result 237826 states and 978678 transitions. [2019-12-07 15:25:46,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:25:46,193 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:25:46,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:49,867 INFO L225 Difference]: With dead ends: 237826 [2019-12-07 15:25:49,867 INFO L226 Difference]: Without dead ends: 237826 [2019-12-07 15:25:49,868 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:25:56,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237826 states. [2019-12-07 15:25:59,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237826 to 234480. [2019-12-07 15:25:59,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234480 states. [2019-12-07 15:26:00,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234480 states to 234480 states and 966258 transitions. [2019-12-07 15:26:00,249 INFO L78 Accepts]: Start accepts. Automaton has 234480 states and 966258 transitions. Word has length 18 [2019-12-07 15:26:00,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:00,250 INFO L462 AbstractCegarLoop]: Abstraction has 234480 states and 966258 transitions. [2019-12-07 15:26:00,250 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:26:00,250 INFO L276 IsEmpty]: Start isEmpty. Operand 234480 states and 966258 transitions. [2019-12-07 15:26:00,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:26:00,262 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:00,262 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:00,262 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:00,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:00,262 INFO L82 PathProgramCache]: Analyzing trace with hash 138207619, now seen corresponding path program 1 times [2019-12-07 15:26:00,262 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:00,262 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [649301805] [2019-12-07 15:26:00,262 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:00,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:00,299 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:00,299 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [649301805] [2019-12-07 15:26:00,299 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:00,299 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:26:00,300 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [851915276] [2019-12-07 15:26:00,300 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:26:00,300 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:00,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:26:00,300 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:26:00,300 INFO L87 Difference]: Start difference. First operand 234480 states and 966258 transitions. Second operand 3 states. [2019-12-07 15:26:00,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:00,415 INFO L93 Difference]: Finished difference Result 42613 states and 138837 transitions. [2019-12-07 15:26:00,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:26:00,415 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:26:00,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:00,475 INFO L225 Difference]: With dead ends: 42613 [2019-12-07 15:26:00,475 INFO L226 Difference]: Without dead ends: 42613 [2019-12-07 15:26:00,475 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:26:00,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42613 states. [2019-12-07 15:26:01,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42613 to 42613. [2019-12-07 15:26:01,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42613 states. [2019-12-07 15:26:01,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42613 states to 42613 states and 138837 transitions. [2019-12-07 15:26:01,197 INFO L78 Accepts]: Start accepts. Automaton has 42613 states and 138837 transitions. Word has length 18 [2019-12-07 15:26:01,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:01,198 INFO L462 AbstractCegarLoop]: Abstraction has 42613 states and 138837 transitions. [2019-12-07 15:26:01,198 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:26:01,198 INFO L276 IsEmpty]: Start isEmpty. Operand 42613 states and 138837 transitions. [2019-12-07 15:26:01,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:26:01,204 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:01,204 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:01,204 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:01,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:01,205 INFO L82 PathProgramCache]: Analyzing trace with hash -187432510, now seen corresponding path program 1 times [2019-12-07 15:26:01,205 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:01,205 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [142663189] [2019-12-07 15:26:01,205 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:01,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:01,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:01,253 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [142663189] [2019-12-07 15:26:01,253 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:01,253 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:26:01,253 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1152258326] [2019-12-07 15:26:01,253 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:26:01,254 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:01,254 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:26:01,254 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:26:01,254 INFO L87 Difference]: Start difference. First operand 42613 states and 138837 transitions. Second operand 6 states. [2019-12-07 15:26:01,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:01,811 INFO L93 Difference]: Finished difference Result 65056 states and 205947 transitions. [2019-12-07 15:26:01,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 15:26:01,812 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 15:26:01,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:02,306 INFO L225 Difference]: With dead ends: 65056 [2019-12-07 15:26:02,306 INFO L226 Difference]: Without dead ends: 65042 [2019-12-07 15:26:02,306 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 15:26:02,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65042 states. [2019-12-07 15:26:03,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65042 to 42278. [2019-12-07 15:26:03,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42278 states. [2019-12-07 15:26:03,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42278 states to 42278 states and 137592 transitions. [2019-12-07 15:26:03,159 INFO L78 Accepts]: Start accepts. Automaton has 42278 states and 137592 transitions. Word has length 22 [2019-12-07 15:26:03,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:03,159 INFO L462 AbstractCegarLoop]: Abstraction has 42278 states and 137592 transitions. [2019-12-07 15:26:03,159 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:26:03,159 INFO L276 IsEmpty]: Start isEmpty. Operand 42278 states and 137592 transitions. [2019-12-07 15:26:03,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 15:26:03,170 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:03,170 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:03,170 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:03,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:03,170 INFO L82 PathProgramCache]: Analyzing trace with hash -200714255, now seen corresponding path program 1 times [2019-12-07 15:26:03,170 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:03,170 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97172836] [2019-12-07 15:26:03,170 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:03,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:03,263 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:03,263 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [97172836] [2019-12-07 15:26:03,263 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:03,264 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:26:03,264 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1969053119] [2019-12-07 15:26:03,264 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:26:03,264 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:03,264 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:26:03,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:26:03,265 INFO L87 Difference]: Start difference. First operand 42278 states and 137592 transitions. Second operand 7 states. [2019-12-07 15:26:03,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:03,831 INFO L93 Difference]: Finished difference Result 59726 states and 189950 transitions. [2019-12-07 15:26:03,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 15:26:03,832 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 25 [2019-12-07 15:26:03,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:03,931 INFO L225 Difference]: With dead ends: 59726 [2019-12-07 15:26:03,931 INFO L226 Difference]: Without dead ends: 59700 [2019-12-07 15:26:03,931 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:26:04,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59700 states. [2019-12-07 15:26:04,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59700 to 50129. [2019-12-07 15:26:04,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50129 states. [2019-12-07 15:26:05,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50129 states to 50129 states and 162181 transitions. [2019-12-07 15:26:05,375 INFO L78 Accepts]: Start accepts. Automaton has 50129 states and 162181 transitions. Word has length 25 [2019-12-07 15:26:05,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:05,375 INFO L462 AbstractCegarLoop]: Abstraction has 50129 states and 162181 transitions. [2019-12-07 15:26:05,376 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:26:05,376 INFO L276 IsEmpty]: Start isEmpty. Operand 50129 states and 162181 transitions. [2019-12-07 15:26:05,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:26:05,391 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:05,391 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:05,391 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:05,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:05,392 INFO L82 PathProgramCache]: Analyzing trace with hash 611460705, now seen corresponding path program 1 times [2019-12-07 15:26:05,392 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:05,392 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356359750] [2019-12-07 15:26:05,392 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:05,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:05,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:05,447 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [356359750] [2019-12-07 15:26:05,447 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:05,447 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:26:05,448 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1259240121] [2019-12-07 15:26:05,448 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:26:05,448 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:05,448 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:26:05,448 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:26:05,448 INFO L87 Difference]: Start difference. First operand 50129 states and 162181 transitions. Second operand 6 states. [2019-12-07 15:26:05,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:05,913 INFO L93 Difference]: Finished difference Result 71592 states and 224983 transitions. [2019-12-07 15:26:05,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 15:26:05,913 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 15:26:05,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:06,016 INFO L225 Difference]: With dead ends: 71592 [2019-12-07 15:26:06,016 INFO L226 Difference]: Without dead ends: 71508 [2019-12-07 15:26:06,017 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:26:06,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71508 states. [2019-12-07 15:26:07,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71508 to 53724. [2019-12-07 15:26:07,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53724 states. [2019-12-07 15:26:07,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53724 states to 53724 states and 172706 transitions. [2019-12-07 15:26:07,120 INFO L78 Accepts]: Start accepts. Automaton has 53724 states and 172706 transitions. Word has length 27 [2019-12-07 15:26:07,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:07,121 INFO L462 AbstractCegarLoop]: Abstraction has 53724 states and 172706 transitions. [2019-12-07 15:26:07,121 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:26:07,121 INFO L276 IsEmpty]: Start isEmpty. Operand 53724 states and 172706 transitions. [2019-12-07 15:26:07,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 15:26:07,142 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:07,142 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:07,142 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:07,142 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:07,143 INFO L82 PathProgramCache]: Analyzing trace with hash -969078927, now seen corresponding path program 1 times [2019-12-07 15:26:07,143 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:07,143 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1592538781] [2019-12-07 15:26:07,143 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:07,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:07,187 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:07,188 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1592538781] [2019-12-07 15:26:07,188 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:07,188 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:26:07,188 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [729929148] [2019-12-07 15:26:07,188 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:26:07,188 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:07,188 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:26:07,189 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:26:07,189 INFO L87 Difference]: Start difference. First operand 53724 states and 172706 transitions. Second operand 4 states. [2019-12-07 15:26:07,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:07,248 INFO L93 Difference]: Finished difference Result 20754 states and 64022 transitions. [2019-12-07 15:26:07,248 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:26:07,248 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 15:26:07,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:07,273 INFO L225 Difference]: With dead ends: 20754 [2019-12-07 15:26:07,273 INFO L226 Difference]: Without dead ends: 20754 [2019-12-07 15:26:07,273 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:26:07,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20754 states. [2019-12-07 15:26:07,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20754 to 19543. [2019-12-07 15:26:07,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19543 states. [2019-12-07 15:26:07,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19543 states to 19543 states and 60338 transitions. [2019-12-07 15:26:07,579 INFO L78 Accepts]: Start accepts. Automaton has 19543 states and 60338 transitions. Word has length 29 [2019-12-07 15:26:07,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:07,579 INFO L462 AbstractCegarLoop]: Abstraction has 19543 states and 60338 transitions. [2019-12-07 15:26:07,579 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:26:07,579 INFO L276 IsEmpty]: Start isEmpty. Operand 19543 states and 60338 transitions. [2019-12-07 15:26:07,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:26:07,598 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:07,599 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:07,599 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:07,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:07,599 INFO L82 PathProgramCache]: Analyzing trace with hash -1170391984, now seen corresponding path program 1 times [2019-12-07 15:26:07,599 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:07,599 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1638949501] [2019-12-07 15:26:07,599 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:07,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:07,664 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:07,665 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1638949501] [2019-12-07 15:26:07,665 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:07,665 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:26:07,665 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625500718] [2019-12-07 15:26:07,665 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:26:07,665 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:07,665 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:26:07,665 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:26:07,665 INFO L87 Difference]: Start difference. First operand 19543 states and 60338 transitions. Second operand 7 states. [2019-12-07 15:26:08,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:08,516 INFO L93 Difference]: Finished difference Result 27225 states and 81337 transitions. [2019-12-07 15:26:08,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:26:08,516 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 15:26:08,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:08,547 INFO L225 Difference]: With dead ends: 27225 [2019-12-07 15:26:08,547 INFO L226 Difference]: Without dead ends: 27225 [2019-12-07 15:26:08,547 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:26:08,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27225 states. [2019-12-07 15:26:08,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27225 to 19532. [2019-12-07 15:26:08,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19532 states. [2019-12-07 15:26:08,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19532 states to 19532 states and 60108 transitions. [2019-12-07 15:26:08,901 INFO L78 Accepts]: Start accepts. Automaton has 19532 states and 60108 transitions. Word has length 33 [2019-12-07 15:26:08,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:08,901 INFO L462 AbstractCegarLoop]: Abstraction has 19532 states and 60108 transitions. [2019-12-07 15:26:08,901 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:26:08,902 INFO L276 IsEmpty]: Start isEmpty. Operand 19532 states and 60108 transitions. [2019-12-07 15:26:08,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 15:26:08,918 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:08,918 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:08,919 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:08,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:08,919 INFO L82 PathProgramCache]: Analyzing trace with hash 1293540528, now seen corresponding path program 1 times [2019-12-07 15:26:08,919 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:08,919 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373965155] [2019-12-07 15:26:08,919 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:08,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:08,971 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:08,972 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373965155] [2019-12-07 15:26:08,972 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:08,972 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:26:08,972 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1109101510] [2019-12-07 15:26:08,972 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:26:08,972 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:08,972 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:26:08,972 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:26:08,973 INFO L87 Difference]: Start difference. First operand 19532 states and 60108 transitions. Second operand 3 states. [2019-12-07 15:26:09,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:09,022 INFO L93 Difference]: Finished difference Result 18664 states and 56622 transitions. [2019-12-07 15:26:09,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:26:09,022 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 15:26:09,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:09,042 INFO L225 Difference]: With dead ends: 18664 [2019-12-07 15:26:09,042 INFO L226 Difference]: Without dead ends: 18664 [2019-12-07 15:26:09,043 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:26:09,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18664 states. [2019-12-07 15:26:09,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18664 to 18390. [2019-12-07 15:26:09,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18390 states. [2019-12-07 15:26:09,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18390 states to 18390 states and 55854 transitions. [2019-12-07 15:26:09,303 INFO L78 Accepts]: Start accepts. Automaton has 18390 states and 55854 transitions. Word has length 40 [2019-12-07 15:26:09,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:09,304 INFO L462 AbstractCegarLoop]: Abstraction has 18390 states and 55854 transitions. [2019-12-07 15:26:09,304 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:26:09,304 INFO L276 IsEmpty]: Start isEmpty. Operand 18390 states and 55854 transitions. [2019-12-07 15:26:09,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 15:26:09,318 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:09,318 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:09,318 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:09,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:09,319 INFO L82 PathProgramCache]: Analyzing trace with hash -448595313, now seen corresponding path program 1 times [2019-12-07 15:26:09,319 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:09,319 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [319635198] [2019-12-07 15:26:09,319 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:09,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:09,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:09,359 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [319635198] [2019-12-07 15:26:09,359 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:09,359 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:26:09,359 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [824778255] [2019-12-07 15:26:09,359 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:26:09,359 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:09,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:26:09,360 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:26:09,360 INFO L87 Difference]: Start difference. First operand 18390 states and 55854 transitions. Second operand 5 states. [2019-12-07 15:26:09,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:09,413 INFO L93 Difference]: Finished difference Result 16867 states and 52454 transitions. [2019-12-07 15:26:09,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:26:09,413 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 15:26:09,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:09,433 INFO L225 Difference]: With dead ends: 16867 [2019-12-07 15:26:09,433 INFO L226 Difference]: Without dead ends: 16867 [2019-12-07 15:26:09,434 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:26:09,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16867 states. [2019-12-07 15:26:09,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16867 to 15238. [2019-12-07 15:26:09,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15238 states. [2019-12-07 15:26:09,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15238 states to 15238 states and 47616 transitions. [2019-12-07 15:26:09,680 INFO L78 Accepts]: Start accepts. Automaton has 15238 states and 47616 transitions. Word has length 41 [2019-12-07 15:26:09,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:09,681 INFO L462 AbstractCegarLoop]: Abstraction has 15238 states and 47616 transitions. [2019-12-07 15:26:09,681 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:26:09,681 INFO L276 IsEmpty]: Start isEmpty. Operand 15238 states and 47616 transitions. [2019-12-07 15:26:09,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:26:09,696 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:09,697 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:09,697 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:09,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:09,697 INFO L82 PathProgramCache]: Analyzing trace with hash 1623524162, now seen corresponding path program 1 times [2019-12-07 15:26:09,697 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:09,697 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [518349535] [2019-12-07 15:26:09,698 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:09,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:09,737 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:09,737 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [518349535] [2019-12-07 15:26:09,737 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:09,737 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:26:09,738 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1694013852] [2019-12-07 15:26:09,738 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:26:09,738 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:09,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:26:09,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:26:09,738 INFO L87 Difference]: Start difference. First operand 15238 states and 47616 transitions. Second operand 3 states. [2019-12-07 15:26:09,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:09,805 INFO L93 Difference]: Finished difference Result 18380 states and 57153 transitions. [2019-12-07 15:26:09,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:26:09,806 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 15:26:09,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:09,826 INFO L225 Difference]: With dead ends: 18380 [2019-12-07 15:26:09,827 INFO L226 Difference]: Without dead ends: 18380 [2019-12-07 15:26:09,827 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:26:09,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18380 states. [2019-12-07 15:26:10,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18380 to 15494. [2019-12-07 15:26:10,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15494 states. [2019-12-07 15:26:10,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15494 states to 15494 states and 48492 transitions. [2019-12-07 15:26:10,091 INFO L78 Accepts]: Start accepts. Automaton has 15494 states and 48492 transitions. Word has length 66 [2019-12-07 15:26:10,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:10,092 INFO L462 AbstractCegarLoop]: Abstraction has 15494 states and 48492 transitions. [2019-12-07 15:26:10,092 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:26:10,092 INFO L276 IsEmpty]: Start isEmpty. Operand 15494 states and 48492 transitions. [2019-12-07 15:26:10,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:26:10,107 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:10,107 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:10,108 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:10,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:10,108 INFO L82 PathProgramCache]: Analyzing trace with hash 600429612, now seen corresponding path program 1 times [2019-12-07 15:26:10,108 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:10,108 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1289768015] [2019-12-07 15:26:10,108 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:10,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:10,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:10,154 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1289768015] [2019-12-07 15:26:10,154 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:10,154 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:26:10,155 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1720847469] [2019-12-07 15:26:10,155 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:26:10,155 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:10,155 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:26:10,155 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:26:10,155 INFO L87 Difference]: Start difference. First operand 15494 states and 48492 transitions. Second operand 4 states. [2019-12-07 15:26:10,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:10,247 INFO L93 Difference]: Finished difference Result 18353 states and 57063 transitions. [2019-12-07 15:26:10,248 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:26:10,248 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 15:26:10,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:10,268 INFO L225 Difference]: With dead ends: 18353 [2019-12-07 15:26:10,268 INFO L226 Difference]: Without dead ends: 18353 [2019-12-07 15:26:10,269 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:26:10,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18353 states. [2019-12-07 15:26:10,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18353 to 15150. [2019-12-07 15:26:10,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15150 states. [2019-12-07 15:26:10,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15150 states to 15150 states and 47431 transitions. [2019-12-07 15:26:10,569 INFO L78 Accepts]: Start accepts. Automaton has 15150 states and 47431 transitions. Word has length 67 [2019-12-07 15:26:10,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:10,569 INFO L462 AbstractCegarLoop]: Abstraction has 15150 states and 47431 transitions. [2019-12-07 15:26:10,569 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:26:10,569 INFO L276 IsEmpty]: Start isEmpty. Operand 15150 states and 47431 transitions. [2019-12-07 15:26:10,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:26:10,581 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:10,581 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:10,582 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:10,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:10,582 INFO L82 PathProgramCache]: Analyzing trace with hash 384042528, now seen corresponding path program 1 times [2019-12-07 15:26:10,582 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:10,582 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1824790890] [2019-12-07 15:26:10,582 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:10,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:10,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:10,729 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1824790890] [2019-12-07 15:26:10,729 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:10,729 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:26:10,730 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1763140944] [2019-12-07 15:26:10,730 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 15:26:10,730 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:10,730 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 15:26:10,730 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:26:10,730 INFO L87 Difference]: Start difference. First operand 15150 states and 47431 transitions. Second operand 10 states. [2019-12-07 15:26:11,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:11,956 INFO L93 Difference]: Finished difference Result 35073 states and 109582 transitions. [2019-12-07 15:26:11,957 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 15:26:11,957 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 15:26:11,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:11,984 INFO L225 Difference]: With dead ends: 35073 [2019-12-07 15:26:11,984 INFO L226 Difference]: Without dead ends: 24437 [2019-12-07 15:26:11,984 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 121 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=140, Invalid=562, Unknown=0, NotChecked=0, Total=702 [2019-12-07 15:26:12,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24437 states. [2019-12-07 15:26:12,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24437 to 18082. [2019-12-07 15:26:12,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18082 states. [2019-12-07 15:26:12,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18082 states to 18082 states and 56427 transitions. [2019-12-07 15:26:12,312 INFO L78 Accepts]: Start accepts. Automaton has 18082 states and 56427 transitions. Word has length 67 [2019-12-07 15:26:12,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:12,312 INFO L462 AbstractCegarLoop]: Abstraction has 18082 states and 56427 transitions. [2019-12-07 15:26:12,312 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 15:26:12,312 INFO L276 IsEmpty]: Start isEmpty. Operand 18082 states and 56427 transitions. [2019-12-07 15:26:12,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:26:12,328 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:12,329 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:12,329 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:12,329 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:12,329 INFO L82 PathProgramCache]: Analyzing trace with hash 1908292690, now seen corresponding path program 2 times [2019-12-07 15:26:12,329 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:12,329 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501553382] [2019-12-07 15:26:12,329 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:12,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:12,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:12,466 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1501553382] [2019-12-07 15:26:12,466 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:12,466 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:26:12,466 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1015881106] [2019-12-07 15:26:12,466 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 15:26:12,466 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:12,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 15:26:12,467 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:26:12,467 INFO L87 Difference]: Start difference. First operand 18082 states and 56427 transitions. Second operand 10 states. [2019-12-07 15:26:14,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:14,462 INFO L93 Difference]: Finished difference Result 30684 states and 95180 transitions. [2019-12-07 15:26:14,463 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:26:14,463 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 15:26:14,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:14,495 INFO L225 Difference]: With dead ends: 30684 [2019-12-07 15:26:14,495 INFO L226 Difference]: Without dead ends: 26361 [2019-12-07 15:26:14,496 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=269, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:26:14,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26361 states. [2019-12-07 15:26:14,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26361 to 18534. [2019-12-07 15:26:14,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18534 states. [2019-12-07 15:26:14,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18534 states to 18534 states and 57675 transitions. [2019-12-07 15:26:14,842 INFO L78 Accepts]: Start accepts. Automaton has 18534 states and 57675 transitions. Word has length 67 [2019-12-07 15:26:14,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:14,843 INFO L462 AbstractCegarLoop]: Abstraction has 18534 states and 57675 transitions. [2019-12-07 15:26:14,843 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 15:26:14,843 INFO L276 IsEmpty]: Start isEmpty. Operand 18534 states and 57675 transitions. [2019-12-07 15:26:14,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:26:14,860 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:14,860 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:14,860 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:14,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:14,860 INFO L82 PathProgramCache]: Analyzing trace with hash 993635084, now seen corresponding path program 3 times [2019-12-07 15:26:14,860 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:14,860 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1137708742] [2019-12-07 15:26:14,860 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:14,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:14,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:14,995 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1137708742] [2019-12-07 15:26:14,995 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:14,995 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 15:26:14,996 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1070201171] [2019-12-07 15:26:14,996 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 15:26:14,996 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:14,996 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 15:26:14,996 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:26:14,996 INFO L87 Difference]: Start difference. First operand 18534 states and 57675 transitions. Second operand 11 states. [2019-12-07 15:26:16,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:16,753 INFO L93 Difference]: Finished difference Result 29036 states and 89939 transitions. [2019-12-07 15:26:16,754 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 15:26:16,754 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 15:26:16,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:16,784 INFO L225 Difference]: With dead ends: 29036 [2019-12-07 15:26:16,784 INFO L226 Difference]: Without dead ends: 25553 [2019-12-07 15:26:16,785 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=341, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:26:16,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25553 states. [2019-12-07 15:26:17,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25553 to 18102. [2019-12-07 15:26:17,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18102 states. [2019-12-07 15:26:17,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18102 states to 18102 states and 56343 transitions. [2019-12-07 15:26:17,127 INFO L78 Accepts]: Start accepts. Automaton has 18102 states and 56343 transitions. Word has length 67 [2019-12-07 15:26:17,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:17,128 INFO L462 AbstractCegarLoop]: Abstraction has 18102 states and 56343 transitions. [2019-12-07 15:26:17,128 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 15:26:17,128 INFO L276 IsEmpty]: Start isEmpty. Operand 18102 states and 56343 transitions. [2019-12-07 15:26:17,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:26:17,144 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:17,144 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:17,145 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:17,145 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:17,145 INFO L82 PathProgramCache]: Analyzing trace with hash 397917466, now seen corresponding path program 4 times [2019-12-07 15:26:17,145 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:17,145 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1597727072] [2019-12-07 15:26:17,145 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:17,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:17,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:17,267 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1597727072] [2019-12-07 15:26:17,267 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:17,267 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 15:26:17,267 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [60441160] [2019-12-07 15:26:17,267 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 15:26:17,268 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:17,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 15:26:17,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:26:17,268 INFO L87 Difference]: Start difference. First operand 18102 states and 56343 transitions. Second operand 11 states. [2019-12-07 15:26:19,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:19,705 INFO L93 Difference]: Finished difference Result 28640 states and 88718 transitions. [2019-12-07 15:26:19,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 15:26:19,706 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 15:26:19,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:19,742 INFO L225 Difference]: With dead ends: 28640 [2019-12-07 15:26:19,742 INFO L226 Difference]: Without dead ends: 25567 [2019-12-07 15:26:19,742 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=92, Invalid=414, Unknown=0, NotChecked=0, Total=506 [2019-12-07 15:26:19,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25567 states. [2019-12-07 15:26:20,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25567 to 18324. [2019-12-07 15:26:20,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18324 states. [2019-12-07 15:26:20,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18324 states to 18324 states and 56925 transitions. [2019-12-07 15:26:20,084 INFO L78 Accepts]: Start accepts. Automaton has 18324 states and 56925 transitions. Word has length 67 [2019-12-07 15:26:20,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:20,084 INFO L462 AbstractCegarLoop]: Abstraction has 18324 states and 56925 transitions. [2019-12-07 15:26:20,084 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 15:26:20,084 INFO L276 IsEmpty]: Start isEmpty. Operand 18324 states and 56925 transitions. [2019-12-07 15:26:20,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:26:20,101 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:20,101 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:20,101 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:20,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:20,101 INFO L82 PathProgramCache]: Analyzing trace with hash 1803113718, now seen corresponding path program 5 times [2019-12-07 15:26:20,101 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:20,101 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [805851982] [2019-12-07 15:26:20,101 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:20,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:20,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:20,851 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [805851982] [2019-12-07 15:26:20,851 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:20,851 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 15:26:20,851 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2001062515] [2019-12-07 15:26:20,852 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 15:26:20,852 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:20,852 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 15:26:20,852 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=404, Unknown=0, NotChecked=0, Total=462 [2019-12-07 15:26:20,852 INFO L87 Difference]: Start difference. First operand 18324 states and 56925 transitions. Second operand 22 states. [2019-12-07 15:26:22,383 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 22 [2019-12-07 15:26:27,537 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 25 [2019-12-07 15:26:28,221 WARN L192 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 15:26:30,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:30,397 INFO L93 Difference]: Finished difference Result 29030 states and 88578 transitions. [2019-12-07 15:26:30,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2019-12-07 15:26:30,397 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 67 [2019-12-07 15:26:30,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:30,430 INFO L225 Difference]: With dead ends: 29030 [2019-12-07 15:26:30,430 INFO L226 Difference]: Without dead ends: 27859 [2019-12-07 15:26:30,431 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 584 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=383, Invalid=2479, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 15:26:30,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27859 states. [2019-12-07 15:26:30,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27859 to 20841. [2019-12-07 15:26:30,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20841 states. [2019-12-07 15:26:30,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20841 states to 20841 states and 64423 transitions. [2019-12-07 15:26:30,821 INFO L78 Accepts]: Start accepts. Automaton has 20841 states and 64423 transitions. Word has length 67 [2019-12-07 15:26:30,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:30,821 INFO L462 AbstractCegarLoop]: Abstraction has 20841 states and 64423 transitions. [2019-12-07 15:26:30,821 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 15:26:30,821 INFO L276 IsEmpty]: Start isEmpty. Operand 20841 states and 64423 transitions. [2019-12-07 15:26:30,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:26:30,839 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:30,839 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:30,839 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:30,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:30,840 INFO L82 PathProgramCache]: Analyzing trace with hash 1857250972, now seen corresponding path program 6 times [2019-12-07 15:26:30,840 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:30,840 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808792736] [2019-12-07 15:26:30,840 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:30,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:31,133 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:31,133 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [808792736] [2019-12-07 15:26:31,133 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:31,133 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:26:31,133 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1264313824] [2019-12-07 15:26:31,134 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:26:31,134 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:31,134 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:26:31,134 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=248, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:26:31,134 INFO L87 Difference]: Start difference. First operand 20841 states and 64423 transitions. Second operand 18 states. [2019-12-07 15:26:37,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:37,670 INFO L93 Difference]: Finished difference Result 40560 states and 121867 transitions. [2019-12-07 15:26:37,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2019-12-07 15:26:37,671 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 67 [2019-12-07 15:26:37,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:37,719 INFO L225 Difference]: With dead ends: 40560 [2019-12-07 15:26:37,719 INFO L226 Difference]: Without dead ends: 34713 [2019-12-07 15:26:37,720 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1407 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=748, Invalid=4222, Unknown=0, NotChecked=0, Total=4970 [2019-12-07 15:26:37,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34713 states. [2019-12-07 15:26:38,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34713 to 21573. [2019-12-07 15:26:38,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21573 states. [2019-12-07 15:26:38,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21573 states to 21573 states and 66310 transitions. [2019-12-07 15:26:38,155 INFO L78 Accepts]: Start accepts. Automaton has 21573 states and 66310 transitions. Word has length 67 [2019-12-07 15:26:38,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:38,155 INFO L462 AbstractCegarLoop]: Abstraction has 21573 states and 66310 transitions. [2019-12-07 15:26:38,155 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:26:38,155 INFO L276 IsEmpty]: Start isEmpty. Operand 21573 states and 66310 transitions. [2019-12-07 15:26:38,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:26:38,175 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:38,175 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:38,175 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:38,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:38,176 INFO L82 PathProgramCache]: Analyzing trace with hash -471224516, now seen corresponding path program 7 times [2019-12-07 15:26:38,176 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:38,176 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [953281339] [2019-12-07 15:26:38,176 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:38,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:38,318 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:38,318 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [953281339] [2019-12-07 15:26:38,318 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:38,318 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 15:26:38,318 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1816309608] [2019-12-07 15:26:38,319 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 15:26:38,319 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:38,319 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 15:26:38,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-12-07 15:26:38,319 INFO L87 Difference]: Start difference. First operand 21573 states and 66310 transitions. Second operand 13 states. [2019-12-07 15:26:40,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:40,236 INFO L93 Difference]: Finished difference Result 36398 states and 110439 transitions. [2019-12-07 15:26:40,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 15:26:40,237 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 15:26:40,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:40,274 INFO L225 Difference]: With dead ends: 36398 [2019-12-07 15:26:40,274 INFO L226 Difference]: Without dead ends: 32819 [2019-12-07 15:26:40,275 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 208 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=209, Invalid=913, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 15:26:40,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32819 states. [2019-12-07 15:26:40,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32819 to 21722. [2019-12-07 15:26:40,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21722 states. [2019-12-07 15:26:40,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21722 states to 21722 states and 66665 transitions. [2019-12-07 15:26:40,747 INFO L78 Accepts]: Start accepts. Automaton has 21722 states and 66665 transitions. Word has length 67 [2019-12-07 15:26:40,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:40,748 INFO L462 AbstractCegarLoop]: Abstraction has 21722 states and 66665 transitions. [2019-12-07 15:26:40,748 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 15:26:40,748 INFO L276 IsEmpty]: Start isEmpty. Operand 21722 states and 66665 transitions. [2019-12-07 15:26:40,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:26:40,767 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:40,767 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:40,767 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:40,767 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:40,767 INFO L82 PathProgramCache]: Analyzing trace with hash -769346954, now seen corresponding path program 8 times [2019-12-07 15:26:40,768 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:40,768 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665892635] [2019-12-07 15:26:40,768 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:40,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:40,901 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:40,902 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1665892635] [2019-12-07 15:26:40,902 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:40,902 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 15:26:40,902 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1302766005] [2019-12-07 15:26:40,902 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 15:26:40,902 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:40,902 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 15:26:40,903 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 15:26:40,903 INFO L87 Difference]: Start difference. First operand 21722 states and 66665 transitions. Second operand 12 states. [2019-12-07 15:26:43,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:43,487 INFO L93 Difference]: Finished difference Result 31226 states and 95479 transitions. [2019-12-07 15:26:43,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 15:26:43,488 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 15:26:43,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:43,543 INFO L225 Difference]: With dead ends: 31226 [2019-12-07 15:26:43,544 INFO L226 Difference]: Without dead ends: 29937 [2019-12-07 15:26:43,544 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=92, Invalid=414, Unknown=0, NotChecked=0, Total=506 [2019-12-07 15:26:43,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29937 states. [2019-12-07 15:26:43,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29937 to 21548. [2019-12-07 15:26:43,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21548 states. [2019-12-07 15:26:43,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21548 states to 21548 states and 66220 transitions. [2019-12-07 15:26:43,948 INFO L78 Accepts]: Start accepts. Automaton has 21548 states and 66220 transitions. Word has length 67 [2019-12-07 15:26:43,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:43,948 INFO L462 AbstractCegarLoop]: Abstraction has 21548 states and 66220 transitions. [2019-12-07 15:26:43,948 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 15:26:43,948 INFO L276 IsEmpty]: Start isEmpty. Operand 21548 states and 66220 transitions. [2019-12-07 15:26:43,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:26:43,969 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:43,969 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:43,969 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:43,969 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:43,969 INFO L82 PathProgramCache]: Analyzing trace with hash -715209700, now seen corresponding path program 9 times [2019-12-07 15:26:43,970 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:43,970 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [441440740] [2019-12-07 15:26:43,970 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:43,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:44,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:44,101 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [441440740] [2019-12-07 15:26:44,101 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:44,101 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 15:26:44,102 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [607228510] [2019-12-07 15:26:44,102 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 15:26:44,102 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:44,102 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 15:26:44,102 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-12-07 15:26:44,102 INFO L87 Difference]: Start difference. First operand 21548 states and 66220 transitions. Second operand 13 states. [2019-12-07 15:26:45,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:45,975 INFO L93 Difference]: Finished difference Result 35395 states and 107784 transitions. [2019-12-07 15:26:45,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 15:26:45,975 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 15:26:45,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:46,012 INFO L225 Difference]: With dead ends: 35395 [2019-12-07 15:26:46,012 INFO L226 Difference]: Without dead ends: 31516 [2019-12-07 15:26:46,013 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 229 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=226, Invalid=1034, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 15:26:46,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31516 states. [2019-12-07 15:26:46,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31516 to 20968. [2019-12-07 15:26:46,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20968 states. [2019-12-07 15:26:46,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20968 states to 20968 states and 64543 transitions. [2019-12-07 15:26:46,411 INFO L78 Accepts]: Start accepts. Automaton has 20968 states and 64543 transitions. Word has length 67 [2019-12-07 15:26:46,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:46,412 INFO L462 AbstractCegarLoop]: Abstraction has 20968 states and 64543 transitions. [2019-12-07 15:26:46,412 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 15:26:46,412 INFO L276 IsEmpty]: Start isEmpty. Operand 20968 states and 64543 transitions. [2019-12-07 15:26:46,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:26:46,482 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:46,482 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:46,482 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:46,482 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:46,483 INFO L82 PathProgramCache]: Analyzing trace with hash -1867129146, now seen corresponding path program 10 times [2019-12-07 15:26:46,483 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:46,483 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1304204145] [2019-12-07 15:26:46,483 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:46,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:46,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:46,521 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1304204145] [2019-12-07 15:26:46,521 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:46,521 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:26:46,521 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1684327449] [2019-12-07 15:26:46,521 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:26:46,522 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:26:46,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:26:46,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:26:46,522 INFO L87 Difference]: Start difference. First operand 20968 states and 64543 transitions. Second operand 6 states. [2019-12-07 15:26:46,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:46,774 INFO L93 Difference]: Finished difference Result 49395 states and 151275 transitions. [2019-12-07 15:26:46,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 15:26:46,774 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 15:26:46,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:46,822 INFO L225 Difference]: With dead ends: 49395 [2019-12-07 15:26:46,822 INFO L226 Difference]: Without dead ends: 39683 [2019-12-07 15:26:46,822 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:26:46,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39683 states. [2019-12-07 15:26:47,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39683 to 21944. [2019-12-07 15:26:47,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21944 states. [2019-12-07 15:26:47,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21944 states to 21944 states and 67693 transitions. [2019-12-07 15:26:47,288 INFO L78 Accepts]: Start accepts. Automaton has 21944 states and 67693 transitions. Word has length 67 [2019-12-07 15:26:47,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:47,288 INFO L462 AbstractCegarLoop]: Abstraction has 21944 states and 67693 transitions. [2019-12-07 15:26:47,288 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:26:47,288 INFO L276 IsEmpty]: Start isEmpty. Operand 21944 states and 67693 transitions. [2019-12-07 15:26:47,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:26:47,308 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:47,308 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:47,308 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:47,308 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:47,308 INFO L82 PathProgramCache]: Analyzing trace with hash -1154306208, now seen corresponding path program 11 times [2019-12-07 15:26:47,308 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:26:47,308 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1306315474] [2019-12-07 15:26:47,308 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:47,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:26:47,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:26:47,383 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 15:26:47,383 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:26:47,386 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1300~0.base_23|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= v_~z$w_buff0_used~0_900 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1300~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1300~0.base_23|) |v_ULTIMATE.start_main_~#t1300~0.offset_17| 0)) |v_#memory_int_17|) (= v_~z$read_delayed~0_7 0) (= |v_#valid_60| (store .cse0 |v_ULTIMATE.start_main_~#t1300~0.base_23| 1)) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (= (select .cse0 |v_ULTIMATE.start_main_~#t1300~0.base_23|) 0) (= v_~z$r_buff1_thd1~0_166 0) (= 0 |v_ULTIMATE.start_main_~#t1300~0.offset_17|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1300~0.base_23| 4)) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, ULTIMATE.start_main_~#t1301~0.offset=|v_ULTIMATE.start_main_~#t1301~0.offset_12|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ULTIMATE.start_main_~#t1302~0.base=|v_ULTIMATE.start_main_~#t1302~0.base_17|, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ULTIMATE.start_main_~#t1301~0.base=|v_ULTIMATE.start_main_~#t1301~0.base_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ~x~0=v_~x~0_129, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1300~0.base=|v_ULTIMATE.start_main_~#t1300~0.base_23|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ULTIMATE.start_main_~#t1300~0.offset=|v_ULTIMATE.start_main_~#t1300~0.offset_17|, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1302~0.offset=|v_ULTIMATE.start_main_~#t1302~0.offset_14|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1301~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1302~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t1301~0.base, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1300~0.base, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1300~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t1302~0.offset, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:26:47,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1301~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t1301~0.offset_9|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1301~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1301~0.base_11|) |v_ULTIMATE.start_main_~#t1301~0.offset_9| 1)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1301~0.base_11|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1301~0.base_11|)) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1301~0.base_11| 1) |v_#valid_38|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1301~0.base_11| 4) |v_#length_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1301~0.offset=|v_ULTIMATE.start_main_~#t1301~0.offset_9|, ULTIMATE.start_main_~#t1301~0.base=|v_ULTIMATE.start_main_~#t1301~0.base_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1301~0.offset, ULTIMATE.start_main_~#t1301~0.base, #length] because there is no mapped edge [2019-12-07 15:26:47,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:26:47,388 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1644202604 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-1644202604 256)))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In-1644202604 |P1Thread1of1ForFork2_#t~ite9_Out-1644202604|)) (and (or .cse1 .cse0) (= ~z~0_In-1644202604 |P1Thread1of1ForFork2_#t~ite9_Out-1644202604|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1644202604, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1644202604, ~z$w_buff1~0=~z$w_buff1~0_In-1644202604, ~z~0=~z~0_In-1644202604} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1644202604|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1644202604, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1644202604, ~z$w_buff1~0=~z$w_buff1~0_In-1644202604, ~z~0=~z~0_In-1644202604} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 15:26:47,388 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 15:26:47,389 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1302~0.offset_11|) (not (= |v_ULTIMATE.start_main_~#t1302~0.base_13| 0)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1302~0.base_13|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1302~0.base_13|) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1302~0.base_13| 1)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1302~0.base_13| 4)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1302~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1302~0.base_13|) |v_ULTIMATE.start_main_~#t1302~0.offset_11| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1302~0.offset=|v_ULTIMATE.start_main_~#t1302~0.offset_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1302~0.base=|v_ULTIMATE.start_main_~#t1302~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1302~0.offset, #length, ULTIMATE.start_main_~#t1302~0.base] because there is no mapped edge [2019-12-07 15:26:47,389 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In239741557 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In239741557 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out239741557| ~z$w_buff0_used~0_In239741557)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out239741557| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In239741557, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In239741557} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In239741557, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out239741557|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In239741557} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:26:47,389 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In1155498471 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd2~0_In1155498471 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In1155498471 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In1155498471 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1155498471|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1155498471 |P1Thread1of1ForFork2_#t~ite12_Out1155498471|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1155498471, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1155498471, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1155498471, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1155498471} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1155498471, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1155498471, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1155498471, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1155498471|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1155498471} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:26:47,391 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1801418101 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In1801418101 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out1801418101| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out1801418101| ~z$r_buff0_thd2~0_In1801418101)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1801418101, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1801418101} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1801418101, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1801418101|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1801418101} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:26:47,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In937383647 256)))) (or (and (= ~z$w_buff0_used~0_In937383647 |P2Thread1of1ForFork0_#t~ite27_Out937383647|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In937383647| |P2Thread1of1ForFork0_#t~ite26_Out937383647|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out937383647| |P2Thread1of1ForFork0_#t~ite26_Out937383647|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In937383647 256)))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In937383647 256))) (and (= (mod ~z$w_buff1_used~0_In937383647 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In937383647 256) 0))) (= ~z$w_buff0_used~0_In937383647 |P2Thread1of1ForFork0_#t~ite26_Out937383647|) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In937383647|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In937383647, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In937383647, ~z$w_buff1_used~0=~z$w_buff1_used~0_In937383647, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In937383647, ~weak$$choice2~0=~weak$$choice2~0_In937383647} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out937383647|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out937383647|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In937383647, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In937383647, ~z$w_buff1_used~0=~z$w_buff1_used~0_In937383647, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In937383647, ~weak$$choice2~0=~weak$$choice2~0_In937383647} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:26:47,393 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:26:47,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-652673250 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-652673250 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-652673250 |P0Thread1of1ForFork1_#t~ite5_Out-652673250|)) (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-652673250|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-652673250, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-652673250} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-652673250|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-652673250, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-652673250} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:26:47,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 15:26:47,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1832820180 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1832820180 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-1832820180| |P2Thread1of1ForFork0_#t~ite38_Out-1832820180|))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1832820180| ~z$w_buff1~0_In-1832820180) (not .cse0) (not .cse1) .cse2) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1832820180| ~z~0_In-1832820180) (or .cse0 .cse1) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1832820180, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1832820180, ~z$w_buff1~0=~z$w_buff1~0_In-1832820180, ~z~0=~z~0_In-1832820180} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1832820180|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1832820180|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1832820180, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1832820180, ~z$w_buff1~0=~z$w_buff1~0_In-1832820180, ~z~0=~z~0_In-1832820180} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:26:47,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In124276175 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In124276175 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out124276175| ~z$w_buff0_used~0_In124276175)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out124276175| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In124276175, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In124276175} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In124276175, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out124276175|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In124276175} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:26:47,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In203988765 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In203988765 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In203988765 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In203988765 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out203988765|)) (and (or .cse3 .cse2) (= |P2Thread1of1ForFork0_#t~ite41_Out203988765| ~z$w_buff1_used~0_In203988765) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In203988765, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In203988765, ~z$w_buff1_used~0=~z$w_buff1_used~0_In203988765, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In203988765} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In203988765, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In203988765, ~z$w_buff1_used~0=~z$w_buff1_used~0_In203988765, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In203988765, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out203988765|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:26:47,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1618386769 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1618386769 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1618386769| ~z$r_buff0_thd3~0_In-1618386769)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1618386769|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1618386769, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1618386769} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1618386769, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1618386769, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1618386769|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:26:47,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-1064821376 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-1064821376 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1064821376 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1064821376 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-1064821376 |P2Thread1of1ForFork0_#t~ite43_Out-1064821376|) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out-1064821376| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1064821376, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1064821376, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1064821376, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1064821376} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1064821376|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1064821376, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1064821376, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1064821376, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1064821376} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:26:47,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:26:47,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1461561102 256))) (.cse0 (= (mod ~z$r_buff1_thd1~0_In1461561102 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1461561102 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1461561102 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out1461561102| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite6_Out1461561102| ~z$w_buff1_used~0_In1461561102) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1461561102, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1461561102, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1461561102, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1461561102} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1461561102, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1461561102|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1461561102, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1461561102, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1461561102} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:26:47,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1260730420 256))) (.cse1 (= ~z$r_buff0_thd1~0_Out1260730420 ~z$r_buff0_thd1~0_In1260730420)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In1260730420 256)))) (or (and .cse0 .cse1) (and (= ~z$r_buff0_thd1~0_Out1260730420 0) (not .cse2) (not .cse0)) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1260730420, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1260730420} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1260730420, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1260730420|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1260730420} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:26:47,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In124559175 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In124559175 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In124559175 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In124559175 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out124559175| ~z$r_buff1_thd1~0_In124559175) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P0Thread1of1ForFork1_#t~ite8_Out124559175| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In124559175, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In124559175, ~z$w_buff1_used~0=~z$w_buff1_used~0_In124559175, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In124559175} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out124559175|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In124559175, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In124559175, ~z$w_buff1_used~0=~z$w_buff1_used~0_In124559175, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In124559175} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:26:47,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:26:47,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-1768256857 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In-1768256857 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-1768256857 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1768256857 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite14_Out-1768256857| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite14_Out-1768256857| ~z$r_buff1_thd2~0_In-1768256857)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1768256857, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1768256857, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1768256857, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1768256857} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1768256857, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1768256857, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1768256857, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1768256857|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1768256857} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:26:47,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:26:47,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:26:47,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd0~0_In562588887 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In562588887 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out562588887| |ULTIMATE.start_main_#t~ite47_Out562588887|))) (or (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out562588887| ~z$w_buff1~0_In562588887)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite47_Out562588887| ~z~0_In562588887) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In562588887, ~z$w_buff1_used~0=~z$w_buff1_used~0_In562588887, ~z$w_buff1~0=~z$w_buff1~0_In562588887, ~z~0=~z~0_In562588887} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In562588887, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out562588887|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In562588887, ~z$w_buff1~0=~z$w_buff1~0_In562588887, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out562588887|, ~z~0=~z~0_In562588887} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:26:47,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1188729859 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1188729859 256) 0))) (or (and (= ~z$w_buff0_used~0_In1188729859 |ULTIMATE.start_main_#t~ite49_Out1188729859|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out1188729859|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1188729859, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1188729859} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1188729859, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1188729859, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1188729859|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:26:47,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1508257991 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-1508257991 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-1508257991 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1508257991 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite50_Out-1508257991| ~z$w_buff1_used~0_In-1508257991) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite50_Out-1508257991| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1508257991, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1508257991, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1508257991, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1508257991} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1508257991|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1508257991, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1508257991, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1508257991, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1508257991} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:26:47,400 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1673308884 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1673308884 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out1673308884| 0)) (and (= ~z$r_buff0_thd0~0_In1673308884 |ULTIMATE.start_main_#t~ite51_Out1673308884|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1673308884, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1673308884} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1673308884, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1673308884|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1673308884} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:26:47,400 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd0~0_In-1151186023 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1151186023 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1151186023 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-1151186023 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-1151186023| ~z$r_buff1_thd0~0_In-1151186023) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite52_Out-1151186023| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1151186023, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1151186023, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1151186023, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1151186023} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1151186023|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1151186023, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1151186023, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1151186023, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1151186023} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:26:47,400 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:26:47,454 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:26:47 BasicIcfg [2019-12-07 15:26:47,454 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:26:47,454 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:26:47,454 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:26:47,455 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:26:47,455 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:24:14" (3/4) ... [2019-12-07 15:26:47,456 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:26:47,457 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1300~0.base_23|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= v_~z$w_buff0_used~0_900 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1300~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1300~0.base_23|) |v_ULTIMATE.start_main_~#t1300~0.offset_17| 0)) |v_#memory_int_17|) (= v_~z$read_delayed~0_7 0) (= |v_#valid_60| (store .cse0 |v_ULTIMATE.start_main_~#t1300~0.base_23| 1)) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (= (select .cse0 |v_ULTIMATE.start_main_~#t1300~0.base_23|) 0) (= v_~z$r_buff1_thd1~0_166 0) (= 0 |v_ULTIMATE.start_main_~#t1300~0.offset_17|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1300~0.base_23| 4)) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, ULTIMATE.start_main_~#t1301~0.offset=|v_ULTIMATE.start_main_~#t1301~0.offset_12|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ULTIMATE.start_main_~#t1302~0.base=|v_ULTIMATE.start_main_~#t1302~0.base_17|, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ULTIMATE.start_main_~#t1301~0.base=|v_ULTIMATE.start_main_~#t1301~0.base_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ~x~0=v_~x~0_129, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1300~0.base=|v_ULTIMATE.start_main_~#t1300~0.base_23|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ULTIMATE.start_main_~#t1300~0.offset=|v_ULTIMATE.start_main_~#t1300~0.offset_17|, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1302~0.offset=|v_ULTIMATE.start_main_~#t1302~0.offset_14|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1301~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1302~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t1301~0.base, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1300~0.base, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1300~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t1302~0.offset, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:26:47,457 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1301~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t1301~0.offset_9|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1301~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1301~0.base_11|) |v_ULTIMATE.start_main_~#t1301~0.offset_9| 1)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1301~0.base_11|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1301~0.base_11|)) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1301~0.base_11| 1) |v_#valid_38|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1301~0.base_11| 4) |v_#length_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1301~0.offset=|v_ULTIMATE.start_main_~#t1301~0.offset_9|, ULTIMATE.start_main_~#t1301~0.base=|v_ULTIMATE.start_main_~#t1301~0.base_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1301~0.offset, ULTIMATE.start_main_~#t1301~0.base, #length] because there is no mapped edge [2019-12-07 15:26:47,458 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:26:47,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1644202604 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-1644202604 256)))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In-1644202604 |P1Thread1of1ForFork2_#t~ite9_Out-1644202604|)) (and (or .cse1 .cse0) (= ~z~0_In-1644202604 |P1Thread1of1ForFork2_#t~ite9_Out-1644202604|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1644202604, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1644202604, ~z$w_buff1~0=~z$w_buff1~0_In-1644202604, ~z~0=~z~0_In-1644202604} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1644202604|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1644202604, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1644202604, ~z$w_buff1~0=~z$w_buff1~0_In-1644202604, ~z~0=~z~0_In-1644202604} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 15:26:47,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 15:26:47,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1302~0.offset_11|) (not (= |v_ULTIMATE.start_main_~#t1302~0.base_13| 0)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1302~0.base_13|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1302~0.base_13|) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1302~0.base_13| 1)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1302~0.base_13| 4)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1302~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1302~0.base_13|) |v_ULTIMATE.start_main_~#t1302~0.offset_11| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1302~0.offset=|v_ULTIMATE.start_main_~#t1302~0.offset_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1302~0.base=|v_ULTIMATE.start_main_~#t1302~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1302~0.offset, #length, ULTIMATE.start_main_~#t1302~0.base] because there is no mapped edge [2019-12-07 15:26:47,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In239741557 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In239741557 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out239741557| ~z$w_buff0_used~0_In239741557)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out239741557| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In239741557, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In239741557} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In239741557, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out239741557|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In239741557} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:26:47,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In1155498471 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd2~0_In1155498471 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In1155498471 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In1155498471 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1155498471|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1155498471 |P1Thread1of1ForFork2_#t~ite12_Out1155498471|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1155498471, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1155498471, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1155498471, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1155498471} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1155498471, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1155498471, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1155498471, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1155498471|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1155498471} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:26:47,461 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1801418101 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In1801418101 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out1801418101| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out1801418101| ~z$r_buff0_thd2~0_In1801418101)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1801418101, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1801418101} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1801418101, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1801418101|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1801418101} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:26:47,462 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In937383647 256)))) (or (and (= ~z$w_buff0_used~0_In937383647 |P2Thread1of1ForFork0_#t~ite27_Out937383647|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In937383647| |P2Thread1of1ForFork0_#t~ite26_Out937383647|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out937383647| |P2Thread1of1ForFork0_#t~ite26_Out937383647|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In937383647 256)))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In937383647 256))) (and (= (mod ~z$w_buff1_used~0_In937383647 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In937383647 256) 0))) (= ~z$w_buff0_used~0_In937383647 |P2Thread1of1ForFork0_#t~ite26_Out937383647|) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In937383647|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In937383647, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In937383647, ~z$w_buff1_used~0=~z$w_buff1_used~0_In937383647, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In937383647, ~weak$$choice2~0=~weak$$choice2~0_In937383647} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out937383647|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out937383647|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In937383647, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In937383647, ~z$w_buff1_used~0=~z$w_buff1_used~0_In937383647, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In937383647, ~weak$$choice2~0=~weak$$choice2~0_In937383647} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:26:47,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:26:47,464 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-652673250 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-652673250 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-652673250 |P0Thread1of1ForFork1_#t~ite5_Out-652673250|)) (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-652673250|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-652673250, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-652673250} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-652673250|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-652673250, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-652673250} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:26:47,464 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 15:26:47,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1832820180 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1832820180 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-1832820180| |P2Thread1of1ForFork0_#t~ite38_Out-1832820180|))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1832820180| ~z$w_buff1~0_In-1832820180) (not .cse0) (not .cse1) .cse2) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1832820180| ~z~0_In-1832820180) (or .cse0 .cse1) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1832820180, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1832820180, ~z$w_buff1~0=~z$w_buff1~0_In-1832820180, ~z~0=~z~0_In-1832820180} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1832820180|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1832820180|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1832820180, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1832820180, ~z$w_buff1~0=~z$w_buff1~0_In-1832820180, ~z~0=~z~0_In-1832820180} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:26:47,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In124276175 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In124276175 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out124276175| ~z$w_buff0_used~0_In124276175)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out124276175| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In124276175, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In124276175} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In124276175, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out124276175|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In124276175} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:26:47,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In203988765 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In203988765 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In203988765 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In203988765 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out203988765|)) (and (or .cse3 .cse2) (= |P2Thread1of1ForFork0_#t~ite41_Out203988765| ~z$w_buff1_used~0_In203988765) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In203988765, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In203988765, ~z$w_buff1_used~0=~z$w_buff1_used~0_In203988765, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In203988765} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In203988765, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In203988765, ~z$w_buff1_used~0=~z$w_buff1_used~0_In203988765, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In203988765, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out203988765|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:26:47,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1618386769 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1618386769 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1618386769| ~z$r_buff0_thd3~0_In-1618386769)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1618386769|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1618386769, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1618386769} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1618386769, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1618386769, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1618386769|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:26:47,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-1064821376 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-1064821376 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1064821376 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1064821376 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-1064821376 |P2Thread1of1ForFork0_#t~ite43_Out-1064821376|) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out-1064821376| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1064821376, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1064821376, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1064821376, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1064821376} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1064821376|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1064821376, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1064821376, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1064821376, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1064821376} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:26:47,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:26:47,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1461561102 256))) (.cse0 (= (mod ~z$r_buff1_thd1~0_In1461561102 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1461561102 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1461561102 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out1461561102| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite6_Out1461561102| ~z$w_buff1_used~0_In1461561102) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1461561102, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1461561102, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1461561102, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1461561102} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1461561102, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1461561102|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1461561102, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1461561102, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1461561102} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:26:47,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1260730420 256))) (.cse1 (= ~z$r_buff0_thd1~0_Out1260730420 ~z$r_buff0_thd1~0_In1260730420)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In1260730420 256)))) (or (and .cse0 .cse1) (and (= ~z$r_buff0_thd1~0_Out1260730420 0) (not .cse2) (not .cse0)) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1260730420, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1260730420} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1260730420, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1260730420|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1260730420} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:26:47,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In124559175 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In124559175 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In124559175 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In124559175 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out124559175| ~z$r_buff1_thd1~0_In124559175) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P0Thread1of1ForFork1_#t~ite8_Out124559175| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In124559175, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In124559175, ~z$w_buff1_used~0=~z$w_buff1_used~0_In124559175, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In124559175} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out124559175|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In124559175, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In124559175, ~z$w_buff1_used~0=~z$w_buff1_used~0_In124559175, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In124559175} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:26:47,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:26:47,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-1768256857 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In-1768256857 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-1768256857 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1768256857 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite14_Out-1768256857| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite14_Out-1768256857| ~z$r_buff1_thd2~0_In-1768256857)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1768256857, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1768256857, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1768256857, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1768256857} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1768256857, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1768256857, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1768256857, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1768256857|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1768256857} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:26:47,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:26:47,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:26:47,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd0~0_In562588887 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In562588887 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out562588887| |ULTIMATE.start_main_#t~ite47_Out562588887|))) (or (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out562588887| ~z$w_buff1~0_In562588887)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite47_Out562588887| ~z~0_In562588887) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In562588887, ~z$w_buff1_used~0=~z$w_buff1_used~0_In562588887, ~z$w_buff1~0=~z$w_buff1~0_In562588887, ~z~0=~z~0_In562588887} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In562588887, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out562588887|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In562588887, ~z$w_buff1~0=~z$w_buff1~0_In562588887, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out562588887|, ~z~0=~z~0_In562588887} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:26:47,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1188729859 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1188729859 256) 0))) (or (and (= ~z$w_buff0_used~0_In1188729859 |ULTIMATE.start_main_#t~ite49_Out1188729859|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out1188729859|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1188729859, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1188729859} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1188729859, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1188729859, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1188729859|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:26:47,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1508257991 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-1508257991 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-1508257991 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1508257991 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite50_Out-1508257991| ~z$w_buff1_used~0_In-1508257991) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite50_Out-1508257991| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1508257991, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1508257991, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1508257991, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1508257991} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1508257991|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1508257991, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1508257991, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1508257991, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1508257991} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:26:47,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1673308884 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1673308884 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out1673308884| 0)) (and (= ~z$r_buff0_thd0~0_In1673308884 |ULTIMATE.start_main_#t~ite51_Out1673308884|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1673308884, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1673308884} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1673308884, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1673308884|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1673308884} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:26:47,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd0~0_In-1151186023 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1151186023 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1151186023 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-1151186023 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-1151186023| ~z$r_buff1_thd0~0_In-1151186023) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite52_Out-1151186023| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1151186023, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1151186023, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1151186023, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1151186023} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1151186023|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1151186023, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1151186023, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1151186023, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1151186023} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:26:47,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:26:47,528 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_033cc2d2-1d8d-4e72-aad0-ecc3af6466a8/bin/uautomizer/witness.graphml [2019-12-07 15:26:47,528 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:26:47,529 INFO L168 Benchmark]: Toolchain (without parser) took 153494.37 ms. Allocated memory was 1.0 GB in the beginning and 8.0 GB in the end (delta: 7.0 GB). Free memory was 937.1 MB in the beginning and 4.4 GB in the end (delta: -3.4 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. [2019-12-07 15:26:47,529 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:26:47,529 INFO L168 Benchmark]: CACSL2BoogieTranslator took 378.52 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 83.9 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -113.4 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 15:26:47,530 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.13 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 15:26:47,530 INFO L168 Benchmark]: Boogie Preprocessor took 25.52 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:26:47,530 INFO L168 Benchmark]: RCFGBuilder took 409.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 991.0 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 15:26:47,530 INFO L168 Benchmark]: TraceAbstraction took 152567.23 ms. Allocated memory was 1.1 GB in the beginning and 8.0 GB in the end (delta: 6.9 GB). Free memory was 991.0 MB in the beginning and 4.4 GB in the end (delta: -3.4 GB). Peak memory consumption was 3.5 GB. Max. memory is 11.5 GB. [2019-12-07 15:26:47,531 INFO L168 Benchmark]: Witness Printer took 73.45 ms. Allocated memory is still 8.0 GB. Free memory was 4.4 GB in the beginning and 4.4 GB in the end (delta: 10.1 MB). Peak memory consumption was 10.1 MB. Max. memory is 11.5 GB. [2019-12-07 15:26:47,532 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 378.52 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 83.9 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -113.4 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.13 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.52 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 409.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 991.0 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 152567.23 ms. Allocated memory was 1.1 GB in the beginning and 8.0 GB in the end (delta: 6.9 GB). Free memory was 991.0 MB in the beginning and 4.4 GB in the end (delta: -3.4 GB). Peak memory consumption was 3.5 GB. Max. memory is 11.5 GB. * Witness Printer took 73.45 ms. Allocated memory is still 8.0 GB. Free memory was 4.4 GB in the beginning and 4.4 GB in the end (delta: 10.1 MB). Peak memory consumption was 10.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 176 ProgramPointsBefore, 95 ProgramPointsAfterwards, 213 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 55 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 29 ChoiceCompositions, 7276 VarBasedMoverChecksPositive, 432 VarBasedMoverChecksNegative, 272 SemBasedMoverChecksPositive, 254 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 130045 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L822] FCALL, FORK 0 pthread_create(&t1300, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t1301, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 1 [L763] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L826] FCALL, FORK 0 pthread_create(&t1302, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 1 [L783] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L784] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L785] 3 z$flush_delayed = weak$$choice2 [L786] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L788] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L788] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L789] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L789] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L790] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L791] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L793] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L794] 3 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L799] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L800] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L801] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L802] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L832] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L832] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L833] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L834] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L835] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 152.4s, OverallIterations: 27, TraceHistogramMax: 1, AutomataDifference: 48.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6805 SDtfs, 8533 SDslu, 28003 SDs, 0 SdLazy, 30464 SolverSat, 506 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 22.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 419 GetRequests, 35 SyntacticMatches, 17 SemanticMatches, 367 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2846 ImplicationChecksByTransitivity, 5.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=237826occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 77.4s AutomataMinimizationTime, 26 MinimizatonAttempts, 335790 StatesRemovedByMinimization, 24 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.3s InterpolantComputationTime, 1182 NumberOfCodeBlocks, 1182 NumberOfCodeBlocksAsserted, 27 NumberOfCheckSat, 1089 ConstructedInterpolants, 0 QuantifiedInterpolants, 316381 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 26 InterpolantComputations, 26 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...