./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix049_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_170627b7-b2e5-4c6c-9fb4-e5bd3ae1332f/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_170627b7-b2e5-4c6c-9fb4-e5bd3ae1332f/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_170627b7-b2e5-4c6c-9fb4-e5bd3ae1332f/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_170627b7-b2e5-4c6c-9fb4-e5bd3ae1332f/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix049_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_170627b7-b2e5-4c6c-9fb4-e5bd3ae1332f/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_170627b7-b2e5-4c6c-9fb4-e5bd3ae1332f/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bd762d25cc0f6cb7740d9bac0c11365de554074c ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:55:48,293 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:55:48,295 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:55:48,302 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:55:48,302 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:55:48,303 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:55:48,304 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:55:48,305 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:55:48,307 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:55:48,308 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:55:48,308 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:55:48,309 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:55:48,309 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:55:48,310 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:55:48,311 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:55:48,311 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:55:48,312 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:55:48,313 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:55:48,314 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:55:48,316 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:55:48,317 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:55:48,318 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:55:48,319 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:55:48,319 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:55:48,321 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:55:48,321 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:55:48,322 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:55:48,322 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:55:48,322 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:55:48,323 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:55:48,323 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:55:48,323 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:55:48,324 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:55:48,324 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:55:48,325 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:55:48,325 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:55:48,325 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:55:48,325 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:55:48,326 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:55:48,326 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:55:48,327 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:55:48,327 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_170627b7-b2e5-4c6c-9fb4-e5bd3ae1332f/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:55:48,339 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:55:48,339 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:55:48,340 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:55:48,341 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:55:48,341 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:55:48,341 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:55:48,341 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:55:48,341 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:55:48,342 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:55:48,342 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:55:48,342 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:55:48,342 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:55:48,342 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:55:48,342 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:55:48,343 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:55:48,343 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:55:48,343 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:55:48,343 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:55:48,343 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:55:48,344 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:55:48,344 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:55:48,344 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:55:48,344 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:55:48,344 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:55:48,345 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:55:48,345 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:55:48,345 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:55:48,345 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:55:48,345 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:55:48,345 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_170627b7-b2e5-4c6c-9fb4-e5bd3ae1332f/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bd762d25cc0f6cb7740d9bac0c11365de554074c [2019-12-07 18:55:48,454 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:55:48,463 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:55:48,465 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:55:48,466 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:55:48,466 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:55:48,467 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_170627b7-b2e5-4c6c-9fb4-e5bd3ae1332f/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix049_pso.opt.i [2019-12-07 18:55:48,505 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_170627b7-b2e5-4c6c-9fb4-e5bd3ae1332f/bin/uautomizer/data/59fe93dd8/39e0be7668a44f6dbccc5841a284dfde/FLAG3f6bb5ca8 [2019-12-07 18:55:49,001 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:55:49,001 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_170627b7-b2e5-4c6c-9fb4-e5bd3ae1332f/sv-benchmarks/c/pthread-wmm/mix049_pso.opt.i [2019-12-07 18:55:49,013 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_170627b7-b2e5-4c6c-9fb4-e5bd3ae1332f/bin/uautomizer/data/59fe93dd8/39e0be7668a44f6dbccc5841a284dfde/FLAG3f6bb5ca8 [2019-12-07 18:55:49,489 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_170627b7-b2e5-4c6c-9fb4-e5bd3ae1332f/bin/uautomizer/data/59fe93dd8/39e0be7668a44f6dbccc5841a284dfde [2019-12-07 18:55:49,491 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:55:49,492 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:55:49,493 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:55:49,493 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:55:49,495 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:55:49,496 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:55:49" (1/1) ... [2019-12-07 18:55:49,498 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@227d51b0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:49, skipping insertion in model container [2019-12-07 18:55:49,498 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:55:49" (1/1) ... [2019-12-07 18:55:49,503 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:55:49,536 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:55:49,773 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:55:49,780 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:55:49,822 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:55:49,867 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:55:49,867 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:49 WrapperNode [2019-12-07 18:55:49,868 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:55:49,868 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:55:49,868 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:55:49,868 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:55:49,874 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:49" (1/1) ... [2019-12-07 18:55:49,891 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:49" (1/1) ... [2019-12-07 18:55:49,915 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:55:49,915 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:55:49,915 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:55:49,915 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:55:49,922 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:49" (1/1) ... [2019-12-07 18:55:49,922 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:49" (1/1) ... [2019-12-07 18:55:49,926 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:49" (1/1) ... [2019-12-07 18:55:49,927 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:49" (1/1) ... [2019-12-07 18:55:49,936 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:49" (1/1) ... [2019-12-07 18:55:49,940 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:49" (1/1) ... [2019-12-07 18:55:49,944 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:49" (1/1) ... [2019-12-07 18:55:49,948 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:55:49,949 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:55:49,949 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:55:49,949 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:55:49,950 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:49" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_170627b7-b2e5-4c6c-9fb4-e5bd3ae1332f/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:55:49,994 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:55:49,994 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:55:49,994 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:55:49,994 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:55:49,994 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:55:49,995 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:55:49,995 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:55:49,995 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:55:49,995 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:55:49,995 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:55:49,995 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:55:49,995 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:55:49,995 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:55:49,996 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:55:50,373 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:55:50,373 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:55:50,374 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:55:50 BoogieIcfgContainer [2019-12-07 18:55:50,374 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:55:50,375 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:55:50,375 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:55:50,378 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:55:50,378 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:55:49" (1/3) ... [2019-12-07 18:55:50,379 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2524519a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:55:50, skipping insertion in model container [2019-12-07 18:55:50,379 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:49" (2/3) ... [2019-12-07 18:55:50,379 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2524519a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:55:50, skipping insertion in model container [2019-12-07 18:55:50,379 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:55:50" (3/3) ... [2019-12-07 18:55:50,380 INFO L109 eAbstractionObserver]: Analyzing ICFG mix049_pso.opt.i [2019-12-07 18:55:50,386 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:55:50,386 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:55:50,391 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:55:50,392 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:55:50,417 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,417 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,417 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,417 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,417 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,417 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,418 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,418 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,418 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,418 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,418 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,419 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,419 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,419 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,419 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,419 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,419 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,419 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,420 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,420 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,420 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,420 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,420 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,420 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,420 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,420 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,421 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,421 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,421 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,421 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,421 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,421 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,421 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,421 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,422 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,422 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,422 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,422 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,423 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,423 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,423 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,423 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,423 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,423 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,424 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,424 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,424 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,424 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,424 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,424 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,425 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,425 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,425 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,425 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,425 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,425 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,428 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,428 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,428 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,428 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,428 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,428 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,429 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,429 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,429 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,429 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,429 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,437 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,437 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,437 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,437 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,437 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,437 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,442 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,442 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,442 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,442 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,442 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,442 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,442 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,443 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,443 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,443 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,443 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,443 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,443 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,444 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,444 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,444 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,444 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,444 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,444 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,444 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,445 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,445 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,445 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,445 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,445 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,445 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,446 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,446 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,446 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,446 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,446 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,446 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,447 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:50,459 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:55:50,472 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:55:50,472 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:55:50,472 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:55:50,472 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:55:50,472 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:55:50,472 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:55:50,472 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:55:50,473 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:55:50,483 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 18:55:50,484 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 18:55:50,548 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 18:55:50,548 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:55:50,558 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:55:50,574 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 18:55:50,605 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 18:55:50,605 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:55:50,610 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:55:50,626 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 18:55:50,627 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:55:53,555 WARN L192 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 18:55:53,849 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130045 [2019-12-07 18:55:53,849 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 18:55:53,852 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 18:56:12,848 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 126452 states. [2019-12-07 18:56:12,850 INFO L276 IsEmpty]: Start isEmpty. Operand 126452 states. [2019-12-07 18:56:12,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:56:12,854 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:12,854 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:56:12,855 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:12,858 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:12,858 INFO L82 PathProgramCache]: Analyzing trace with hash 913925, now seen corresponding path program 1 times [2019-12-07 18:56:12,864 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:12,864 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1913246348] [2019-12-07 18:56:12,864 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:12,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:12,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:12,998 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1913246348] [2019-12-07 18:56:12,998 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:12,998 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:56:12,999 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1955169849] [2019-12-07 18:56:13,002 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:56:13,002 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:13,011 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:56:13,011 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:13,013 INFO L87 Difference]: Start difference. First operand 126452 states. Second operand 3 states. [2019-12-07 18:56:13,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:13,833 INFO L93 Difference]: Finished difference Result 125570 states and 538788 transitions. [2019-12-07 18:56:13,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:56:13,835 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:56:13,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:14,350 INFO L225 Difference]: With dead ends: 125570 [2019-12-07 18:56:14,350 INFO L226 Difference]: Without dead ends: 111010 [2019-12-07 18:56:14,351 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:18,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111010 states. [2019-12-07 18:56:21,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111010 to 111010. [2019-12-07 18:56:21,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111010 states. [2019-12-07 18:56:21,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111010 states to 111010 states and 475060 transitions. [2019-12-07 18:56:21,874 INFO L78 Accepts]: Start accepts. Automaton has 111010 states and 475060 transitions. Word has length 3 [2019-12-07 18:56:21,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:21,874 INFO L462 AbstractCegarLoop]: Abstraction has 111010 states and 475060 transitions. [2019-12-07 18:56:21,875 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:56:21,875 INFO L276 IsEmpty]: Start isEmpty. Operand 111010 states and 475060 transitions. [2019-12-07 18:56:21,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:56:21,878 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:21,878 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:21,878 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:21,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:21,878 INFO L82 PathProgramCache]: Analyzing trace with hash -1753094800, now seen corresponding path program 1 times [2019-12-07 18:56:21,878 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:21,878 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1141534385] [2019-12-07 18:56:21,879 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:21,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:21,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:21,938 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1141534385] [2019-12-07 18:56:21,938 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:21,938 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:56:21,938 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [52311528] [2019-12-07 18:56:21,939 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:56:21,939 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:21,939 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:56:21,940 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:56:21,940 INFO L87 Difference]: Start difference. First operand 111010 states and 475060 transitions. Second operand 4 states. [2019-12-07 18:56:23,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:23,206 INFO L93 Difference]: Finished difference Result 172646 states and 710109 transitions. [2019-12-07 18:56:23,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:56:23,207 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:56:23,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:23,645 INFO L225 Difference]: With dead ends: 172646 [2019-12-07 18:56:23,645 INFO L226 Difference]: Without dead ends: 172548 [2019-12-07 18:56:23,645 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:56:29,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172548 states. [2019-12-07 18:56:33,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172548 to 158936. [2019-12-07 18:56:33,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158936 states. [2019-12-07 18:56:33,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158936 states to 158936 states and 661803 transitions. [2019-12-07 18:56:33,934 INFO L78 Accepts]: Start accepts. Automaton has 158936 states and 661803 transitions. Word has length 11 [2019-12-07 18:56:33,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:33,934 INFO L462 AbstractCegarLoop]: Abstraction has 158936 states and 661803 transitions. [2019-12-07 18:56:33,934 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:56:33,934 INFO L276 IsEmpty]: Start isEmpty. Operand 158936 states and 661803 transitions. [2019-12-07 18:56:33,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:56:33,939 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:33,939 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:33,939 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:33,939 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:33,939 INFO L82 PathProgramCache]: Analyzing trace with hash 216434073, now seen corresponding path program 1 times [2019-12-07 18:56:33,939 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:33,939 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451029936] [2019-12-07 18:56:33,939 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:33,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:33,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:33,987 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451029936] [2019-12-07 18:56:33,987 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:33,987 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:56:33,987 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1052665980] [2019-12-07 18:56:33,987 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:56:33,987 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:33,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:56:33,988 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:56:33,988 INFO L87 Difference]: Start difference. First operand 158936 states and 661803 transitions. Second operand 4 states. [2019-12-07 18:56:35,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:35,147 INFO L93 Difference]: Finished difference Result 228902 states and 931210 transitions. [2019-12-07 18:56:35,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:56:35,148 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:56:35,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:35,758 INFO L225 Difference]: With dead ends: 228902 [2019-12-07 18:56:35,758 INFO L226 Difference]: Without dead ends: 228790 [2019-12-07 18:56:35,758 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:56:42,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228790 states. [2019-12-07 18:56:45,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228790 to 192327. [2019-12-07 18:56:45,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192327 states. [2019-12-07 18:56:45,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192327 states to 192327 states and 796272 transitions. [2019-12-07 18:56:45,963 INFO L78 Accepts]: Start accepts. Automaton has 192327 states and 796272 transitions. Word has length 13 [2019-12-07 18:56:45,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:45,964 INFO L462 AbstractCegarLoop]: Abstraction has 192327 states and 796272 transitions. [2019-12-07 18:56:45,964 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:56:45,964 INFO L276 IsEmpty]: Start isEmpty. Operand 192327 states and 796272 transitions. [2019-12-07 18:56:45,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:56:45,971 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:45,971 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:45,971 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:45,971 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:45,971 INFO L82 PathProgramCache]: Analyzing trace with hash -1948590504, now seen corresponding path program 1 times [2019-12-07 18:56:45,971 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:45,972 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1497319950] [2019-12-07 18:56:45,972 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:45,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:45,999 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:46,000 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1497319950] [2019-12-07 18:56:46,000 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:46,000 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:56:46,000 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1727592718] [2019-12-07 18:56:46,000 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:56:46,001 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:46,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:56:46,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:46,001 INFO L87 Difference]: Start difference. First operand 192327 states and 796272 transitions. Second operand 3 states. [2019-12-07 18:56:47,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:47,515 INFO L93 Difference]: Finished difference Result 280788 states and 1158875 transitions. [2019-12-07 18:56:47,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:56:47,516 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 18:56:47,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:48,247 INFO L225 Difference]: With dead ends: 280788 [2019-12-07 18:56:48,247 INFO L226 Difference]: Without dead ends: 280788 [2019-12-07 18:56:48,248 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:57,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280788 states. [2019-12-07 18:57:01,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280788 to 222888. [2019-12-07 18:57:01,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222888 states. [2019-12-07 18:57:01,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222888 states to 222888 states and 926633 transitions. [2019-12-07 18:57:01,713 INFO L78 Accepts]: Start accepts. Automaton has 222888 states and 926633 transitions. Word has length 16 [2019-12-07 18:57:01,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:01,714 INFO L462 AbstractCegarLoop]: Abstraction has 222888 states and 926633 transitions. [2019-12-07 18:57:01,714 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:57:01,714 INFO L276 IsEmpty]: Start isEmpty. Operand 222888 states and 926633 transitions. [2019-12-07 18:57:01,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:57:01,720 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:01,720 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:01,720 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:01,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:01,721 INFO L82 PathProgramCache]: Analyzing trace with hash -1821591471, now seen corresponding path program 1 times [2019-12-07 18:57:01,721 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:01,721 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1899938662] [2019-12-07 18:57:01,721 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:01,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:01,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:01,770 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1899938662] [2019-12-07 18:57:01,770 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:01,770 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:57:01,771 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1476130267] [2019-12-07 18:57:01,771 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:57:01,771 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:01,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:57:01,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:57:01,771 INFO L87 Difference]: Start difference. First operand 222888 states and 926633 transitions. Second operand 5 states. [2019-12-07 18:57:03,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:03,806 INFO L93 Difference]: Finished difference Result 298473 states and 1226263 transitions. [2019-12-07 18:57:03,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:57:03,807 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 18:57:03,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:04,559 INFO L225 Difference]: With dead ends: 298473 [2019-12-07 18:57:04,559 INFO L226 Difference]: Without dead ends: 298473 [2019-12-07 18:57:04,560 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:57:12,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298473 states. [2019-12-07 18:57:18,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298473 to 237826. [2019-12-07 18:57:18,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237826 states. [2019-12-07 18:57:19,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237826 states to 237826 states and 988542 transitions. [2019-12-07 18:57:19,902 INFO L78 Accepts]: Start accepts. Automaton has 237826 states and 988542 transitions. Word has length 16 [2019-12-07 18:57:19,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:19,903 INFO L462 AbstractCegarLoop]: Abstraction has 237826 states and 988542 transitions. [2019-12-07 18:57:19,903 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:57:19,903 INFO L276 IsEmpty]: Start isEmpty. Operand 237826 states and 988542 transitions. [2019-12-07 18:57:19,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:57:19,914 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:19,914 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:19,914 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:19,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:19,914 INFO L82 PathProgramCache]: Analyzing trace with hash -504931817, now seen corresponding path program 1 times [2019-12-07 18:57:19,914 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:19,914 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1960863970] [2019-12-07 18:57:19,914 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:19,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:19,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:19,957 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1960863970] [2019-12-07 18:57:19,957 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:19,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:57:19,957 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1638015458] [2019-12-07 18:57:19,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:57:19,957 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:19,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:57:19,958 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:57:19,958 INFO L87 Difference]: Start difference. First operand 237826 states and 988542 transitions. Second operand 3 states. [2019-12-07 18:57:20,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:20,994 INFO L93 Difference]: Finished difference Result 237826 states and 978678 transitions. [2019-12-07 18:57:20,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:57:20,994 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:57:20,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:21,607 INFO L225 Difference]: With dead ends: 237826 [2019-12-07 18:57:21,607 INFO L226 Difference]: Without dead ends: 237826 [2019-12-07 18:57:21,607 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:57:28,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237826 states. [2019-12-07 18:57:31,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237826 to 234480. [2019-12-07 18:57:31,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234480 states. [2019-12-07 18:57:32,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234480 states to 234480 states and 966258 transitions. [2019-12-07 18:57:32,892 INFO L78 Accepts]: Start accepts. Automaton has 234480 states and 966258 transitions. Word has length 18 [2019-12-07 18:57:32,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:32,892 INFO L462 AbstractCegarLoop]: Abstraction has 234480 states and 966258 transitions. [2019-12-07 18:57:32,892 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:57:32,892 INFO L276 IsEmpty]: Start isEmpty. Operand 234480 states and 966258 transitions. [2019-12-07 18:57:32,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:57:32,902 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:32,902 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:32,902 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:32,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:32,903 INFO L82 PathProgramCache]: Analyzing trace with hash 138207619, now seen corresponding path program 1 times [2019-12-07 18:57:32,903 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:32,903 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1637445190] [2019-12-07 18:57:32,903 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:32,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:32,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:32,931 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1637445190] [2019-12-07 18:57:32,931 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:32,931 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:57:32,931 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [840913083] [2019-12-07 18:57:32,932 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:57:32,932 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:32,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:57:32,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:57:32,932 INFO L87 Difference]: Start difference. First operand 234480 states and 966258 transitions. Second operand 3 states. [2019-12-07 18:57:33,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:33,058 INFO L93 Difference]: Finished difference Result 42613 states and 138837 transitions. [2019-12-07 18:57:33,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:57:33,059 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:57:33,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:33,115 INFO L225 Difference]: With dead ends: 42613 [2019-12-07 18:57:33,115 INFO L226 Difference]: Without dead ends: 42613 [2019-12-07 18:57:33,116 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:57:33,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42613 states. [2019-12-07 18:57:33,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42613 to 42613. [2019-12-07 18:57:33,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42613 states. [2019-12-07 18:57:33,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42613 states to 42613 states and 138837 transitions. [2019-12-07 18:57:33,825 INFO L78 Accepts]: Start accepts. Automaton has 42613 states and 138837 transitions. Word has length 18 [2019-12-07 18:57:33,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:33,826 INFO L462 AbstractCegarLoop]: Abstraction has 42613 states and 138837 transitions. [2019-12-07 18:57:33,826 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:57:33,826 INFO L276 IsEmpty]: Start isEmpty. Operand 42613 states and 138837 transitions. [2019-12-07 18:57:33,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:57:33,831 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:33,831 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:33,832 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:33,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:33,832 INFO L82 PathProgramCache]: Analyzing trace with hash -187432510, now seen corresponding path program 1 times [2019-12-07 18:57:33,832 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:33,832 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [572248882] [2019-12-07 18:57:33,832 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:33,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:33,891 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:33,891 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [572248882] [2019-12-07 18:57:33,891 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:33,891 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:57:33,891 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [99310332] [2019-12-07 18:57:33,892 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:57:33,892 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:33,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:57:33,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:57:33,892 INFO L87 Difference]: Start difference. First operand 42613 states and 138837 transitions. Second operand 6 states. [2019-12-07 18:57:34,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:34,436 INFO L93 Difference]: Finished difference Result 65056 states and 205947 transitions. [2019-12-07 18:57:34,437 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:57:34,437 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 18:57:34,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:34,531 INFO L225 Difference]: With dead ends: 65056 [2019-12-07 18:57:34,531 INFO L226 Difference]: Without dead ends: 65042 [2019-12-07 18:57:34,531 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:57:34,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65042 states. [2019-12-07 18:57:36,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65042 to 42278. [2019-12-07 18:57:36,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42278 states. [2019-12-07 18:57:36,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42278 states to 42278 states and 137592 transitions. [2019-12-07 18:57:36,528 INFO L78 Accepts]: Start accepts. Automaton has 42278 states and 137592 transitions. Word has length 22 [2019-12-07 18:57:36,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:36,529 INFO L462 AbstractCegarLoop]: Abstraction has 42278 states and 137592 transitions. [2019-12-07 18:57:36,529 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:57:36,529 INFO L276 IsEmpty]: Start isEmpty. Operand 42278 states and 137592 transitions. [2019-12-07 18:57:36,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:57:36,538 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:36,538 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:36,538 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:36,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:36,538 INFO L82 PathProgramCache]: Analyzing trace with hash -200714255, now seen corresponding path program 1 times [2019-12-07 18:57:36,538 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:36,539 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2099791075] [2019-12-07 18:57:36,539 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:36,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:36,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:36,663 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2099791075] [2019-12-07 18:57:36,663 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:36,663 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:57:36,663 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [814331473] [2019-12-07 18:57:36,664 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:57:36,664 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:36,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:57:36,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:57:36,664 INFO L87 Difference]: Start difference. First operand 42278 states and 137592 transitions. Second operand 7 states. [2019-12-07 18:57:37,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:37,117 INFO L93 Difference]: Finished difference Result 59726 states and 189950 transitions. [2019-12-07 18:57:37,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:57:37,118 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 25 [2019-12-07 18:57:37,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:37,205 INFO L225 Difference]: With dead ends: 59726 [2019-12-07 18:57:37,205 INFO L226 Difference]: Without dead ends: 59700 [2019-12-07 18:57:37,206 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:57:37,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59700 states. [2019-12-07 18:57:38,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59700 to 50129. [2019-12-07 18:57:38,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50129 states. [2019-12-07 18:57:38,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50129 states to 50129 states and 162181 transitions. [2019-12-07 18:57:38,141 INFO L78 Accepts]: Start accepts. Automaton has 50129 states and 162181 transitions. Word has length 25 [2019-12-07 18:57:38,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:38,142 INFO L462 AbstractCegarLoop]: Abstraction has 50129 states and 162181 transitions. [2019-12-07 18:57:38,142 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:57:38,142 INFO L276 IsEmpty]: Start isEmpty. Operand 50129 states and 162181 transitions. [2019-12-07 18:57:38,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:57:38,157 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:38,157 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:38,157 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:38,158 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:38,158 INFO L82 PathProgramCache]: Analyzing trace with hash 611460705, now seen corresponding path program 1 times [2019-12-07 18:57:38,158 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:38,158 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [646210925] [2019-12-07 18:57:38,158 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:38,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:38,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:38,205 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [646210925] [2019-12-07 18:57:38,205 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:38,205 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:57:38,205 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [623592714] [2019-12-07 18:57:38,205 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:57:38,206 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:38,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:57:38,206 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:57:38,206 INFO L87 Difference]: Start difference. First operand 50129 states and 162181 transitions. Second operand 6 states. [2019-12-07 18:57:38,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:38,685 INFO L93 Difference]: Finished difference Result 71592 states and 224983 transitions. [2019-12-07 18:57:38,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:57:38,686 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 18:57:38,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:38,789 INFO L225 Difference]: With dead ends: 71592 [2019-12-07 18:57:38,789 INFO L226 Difference]: Without dead ends: 71508 [2019-12-07 18:57:38,789 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:57:39,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71508 states. [2019-12-07 18:57:39,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71508 to 53724. [2019-12-07 18:57:39,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53724 states. [2019-12-07 18:57:39,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53724 states to 53724 states and 172706 transitions. [2019-12-07 18:57:39,900 INFO L78 Accepts]: Start accepts. Automaton has 53724 states and 172706 transitions. Word has length 27 [2019-12-07 18:57:39,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:39,900 INFO L462 AbstractCegarLoop]: Abstraction has 53724 states and 172706 transitions. [2019-12-07 18:57:39,900 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:57:39,901 INFO L276 IsEmpty]: Start isEmpty. Operand 53724 states and 172706 transitions. [2019-12-07 18:57:39,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:57:39,919 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:39,920 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:39,920 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:39,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:39,920 INFO L82 PathProgramCache]: Analyzing trace with hash -969078927, now seen corresponding path program 1 times [2019-12-07 18:57:39,920 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:39,920 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1976538378] [2019-12-07 18:57:39,920 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:39,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:39,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:39,953 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1976538378] [2019-12-07 18:57:39,953 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:39,954 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:57:39,954 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [201041353] [2019-12-07 18:57:39,954 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:57:39,954 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:39,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:57:39,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:57:39,955 INFO L87 Difference]: Start difference. First operand 53724 states and 172706 transitions. Second operand 4 states. [2019-12-07 18:57:40,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:40,016 INFO L93 Difference]: Finished difference Result 20754 states and 64022 transitions. [2019-12-07 18:57:40,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:57:40,016 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 18:57:40,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:40,039 INFO L225 Difference]: With dead ends: 20754 [2019-12-07 18:57:40,039 INFO L226 Difference]: Without dead ends: 20754 [2019-12-07 18:57:40,040 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:57:40,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20754 states. [2019-12-07 18:57:40,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20754 to 19543. [2019-12-07 18:57:40,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19543 states. [2019-12-07 18:57:40,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19543 states to 19543 states and 60338 transitions. [2019-12-07 18:57:40,332 INFO L78 Accepts]: Start accepts. Automaton has 19543 states and 60338 transitions. Word has length 29 [2019-12-07 18:57:40,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:40,332 INFO L462 AbstractCegarLoop]: Abstraction has 19543 states and 60338 transitions. [2019-12-07 18:57:40,332 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:57:40,332 INFO L276 IsEmpty]: Start isEmpty. Operand 19543 states and 60338 transitions. [2019-12-07 18:57:40,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:57:40,350 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:40,350 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:40,350 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:40,350 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:40,350 INFO L82 PathProgramCache]: Analyzing trace with hash -1170391984, now seen corresponding path program 1 times [2019-12-07 18:57:40,350 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:40,350 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1863850735] [2019-12-07 18:57:40,351 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:40,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:40,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:40,406 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1863850735] [2019-12-07 18:57:40,406 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:40,406 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:57:40,407 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1805078609] [2019-12-07 18:57:40,407 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:57:40,407 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:40,407 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:57:40,407 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:57:40,407 INFO L87 Difference]: Start difference. First operand 19543 states and 60338 transitions. Second operand 7 states. [2019-12-07 18:57:41,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:41,139 INFO L93 Difference]: Finished difference Result 27225 states and 81337 transitions. [2019-12-07 18:57:41,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:57:41,140 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 18:57:41,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:41,173 INFO L225 Difference]: With dead ends: 27225 [2019-12-07 18:57:41,173 INFO L226 Difference]: Without dead ends: 27225 [2019-12-07 18:57:41,173 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:57:41,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27225 states. [2019-12-07 18:57:41,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27225 to 19532. [2019-12-07 18:57:41,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19532 states. [2019-12-07 18:57:41,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19532 states to 19532 states and 60108 transitions. [2019-12-07 18:57:41,515 INFO L78 Accepts]: Start accepts. Automaton has 19532 states and 60108 transitions. Word has length 33 [2019-12-07 18:57:41,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:41,515 INFO L462 AbstractCegarLoop]: Abstraction has 19532 states and 60108 transitions. [2019-12-07 18:57:41,516 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:57:41,516 INFO L276 IsEmpty]: Start isEmpty. Operand 19532 states and 60108 transitions. [2019-12-07 18:57:41,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:57:41,531 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:41,531 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:41,531 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:41,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:41,532 INFO L82 PathProgramCache]: Analyzing trace with hash 1293540528, now seen corresponding path program 1 times [2019-12-07 18:57:41,532 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:41,532 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000510343] [2019-12-07 18:57:41,532 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:41,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:41,575 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:41,575 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2000510343] [2019-12-07 18:57:41,575 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:41,575 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:57:41,575 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [24228654] [2019-12-07 18:57:41,576 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:57:41,576 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:41,576 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:57:41,576 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:57:41,576 INFO L87 Difference]: Start difference. First operand 19532 states and 60108 transitions. Second operand 3 states. [2019-12-07 18:57:41,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:41,629 INFO L93 Difference]: Finished difference Result 18664 states and 56622 transitions. [2019-12-07 18:57:41,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:57:41,630 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 18:57:41,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:41,649 INFO L225 Difference]: With dead ends: 18664 [2019-12-07 18:57:41,649 INFO L226 Difference]: Without dead ends: 18664 [2019-12-07 18:57:41,650 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:57:41,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18664 states. [2019-12-07 18:57:41,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18664 to 18390. [2019-12-07 18:57:41,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18390 states. [2019-12-07 18:57:41,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18390 states to 18390 states and 55854 transitions. [2019-12-07 18:57:41,962 INFO L78 Accepts]: Start accepts. Automaton has 18390 states and 55854 transitions. Word has length 40 [2019-12-07 18:57:41,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:41,962 INFO L462 AbstractCegarLoop]: Abstraction has 18390 states and 55854 transitions. [2019-12-07 18:57:41,962 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:57:41,962 INFO L276 IsEmpty]: Start isEmpty. Operand 18390 states and 55854 transitions. [2019-12-07 18:57:41,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 18:57:41,977 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:41,977 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:41,977 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:41,978 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:41,978 INFO L82 PathProgramCache]: Analyzing trace with hash -448595313, now seen corresponding path program 1 times [2019-12-07 18:57:41,978 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:41,978 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [792265266] [2019-12-07 18:57:41,978 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:41,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:42,018 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:42,018 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [792265266] [2019-12-07 18:57:42,019 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:42,019 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:57:42,019 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1180403963] [2019-12-07 18:57:42,019 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:57:42,019 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:42,019 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:57:42,019 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:57:42,019 INFO L87 Difference]: Start difference. First operand 18390 states and 55854 transitions. Second operand 5 states. [2019-12-07 18:57:42,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:42,075 INFO L93 Difference]: Finished difference Result 16867 states and 52454 transitions. [2019-12-07 18:57:42,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:57:42,075 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 18:57:42,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:42,101 INFO L225 Difference]: With dead ends: 16867 [2019-12-07 18:57:42,101 INFO L226 Difference]: Without dead ends: 16867 [2019-12-07 18:57:42,102 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:57:42,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16867 states. [2019-12-07 18:57:42,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16867 to 15238. [2019-12-07 18:57:42,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15238 states. [2019-12-07 18:57:42,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15238 states to 15238 states and 47616 transitions. [2019-12-07 18:57:42,358 INFO L78 Accepts]: Start accepts. Automaton has 15238 states and 47616 transitions. Word has length 41 [2019-12-07 18:57:42,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:42,358 INFO L462 AbstractCegarLoop]: Abstraction has 15238 states and 47616 transitions. [2019-12-07 18:57:42,358 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:57:42,358 INFO L276 IsEmpty]: Start isEmpty. Operand 15238 states and 47616 transitions. [2019-12-07 18:57:42,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:57:42,371 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:42,371 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:42,371 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:42,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:42,372 INFO L82 PathProgramCache]: Analyzing trace with hash 1623524162, now seen corresponding path program 1 times [2019-12-07 18:57:42,372 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:42,372 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [358763749] [2019-12-07 18:57:42,372 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:42,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:42,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:42,411 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [358763749] [2019-12-07 18:57:42,412 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:42,412 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:57:42,412 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1172398055] [2019-12-07 18:57:42,412 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:57:42,412 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:42,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:57:42,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:57:42,413 INFO L87 Difference]: Start difference. First operand 15238 states and 47616 transitions. Second operand 3 states. [2019-12-07 18:57:42,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:42,492 INFO L93 Difference]: Finished difference Result 18380 states and 57153 transitions. [2019-12-07 18:57:42,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:57:42,493 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:57:42,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:42,512 INFO L225 Difference]: With dead ends: 18380 [2019-12-07 18:57:42,512 INFO L226 Difference]: Without dead ends: 18380 [2019-12-07 18:57:42,513 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:57:42,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18380 states. [2019-12-07 18:57:42,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18380 to 15494. [2019-12-07 18:57:42,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15494 states. [2019-12-07 18:57:42,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15494 states to 15494 states and 48492 transitions. [2019-12-07 18:57:42,768 INFO L78 Accepts]: Start accepts. Automaton has 15494 states and 48492 transitions. Word has length 66 [2019-12-07 18:57:42,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:42,769 INFO L462 AbstractCegarLoop]: Abstraction has 15494 states and 48492 transitions. [2019-12-07 18:57:42,769 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:57:42,769 INFO L276 IsEmpty]: Start isEmpty. Operand 15494 states and 48492 transitions. [2019-12-07 18:57:42,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:57:42,783 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:42,783 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:42,783 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:42,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:42,783 INFO L82 PathProgramCache]: Analyzing trace with hash 600429612, now seen corresponding path program 1 times [2019-12-07 18:57:42,784 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:42,784 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632768510] [2019-12-07 18:57:42,784 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:42,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:42,829 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:42,829 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [632768510] [2019-12-07 18:57:42,829 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:42,829 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:57:42,830 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [845462962] [2019-12-07 18:57:42,830 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:57:42,830 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:42,830 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:57:42,830 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:57:42,830 INFO L87 Difference]: Start difference. First operand 15494 states and 48492 transitions. Second operand 4 states. [2019-12-07 18:57:42,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:42,939 INFO L93 Difference]: Finished difference Result 18353 states and 57063 transitions. [2019-12-07 18:57:42,939 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:57:42,939 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 18:57:42,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:42,959 INFO L225 Difference]: With dead ends: 18353 [2019-12-07 18:57:42,959 INFO L226 Difference]: Without dead ends: 18353 [2019-12-07 18:57:42,959 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:57:43,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18353 states. [2019-12-07 18:57:43,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18353 to 15150. [2019-12-07 18:57:43,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15150 states. [2019-12-07 18:57:43,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15150 states to 15150 states and 47431 transitions. [2019-12-07 18:57:43,213 INFO L78 Accepts]: Start accepts. Automaton has 15150 states and 47431 transitions. Word has length 67 [2019-12-07 18:57:43,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:43,214 INFO L462 AbstractCegarLoop]: Abstraction has 15150 states and 47431 transitions. [2019-12-07 18:57:43,214 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:57:43,214 INFO L276 IsEmpty]: Start isEmpty. Operand 15150 states and 47431 transitions. [2019-12-07 18:57:43,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:57:43,226 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:43,227 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:43,227 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:43,227 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:43,227 INFO L82 PathProgramCache]: Analyzing trace with hash 384042528, now seen corresponding path program 1 times [2019-12-07 18:57:43,227 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:43,227 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1801218493] [2019-12-07 18:57:43,227 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:43,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:43,360 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:43,360 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1801218493] [2019-12-07 18:57:43,360 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:43,360 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:57:43,360 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1579730657] [2019-12-07 18:57:43,361 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:57:43,361 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:43,361 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:57:43,361 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:57:43,361 INFO L87 Difference]: Start difference. First operand 15150 states and 47431 transitions. Second operand 10 states. [2019-12-07 18:57:44,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:44,968 INFO L93 Difference]: Finished difference Result 35073 states and 109582 transitions. [2019-12-07 18:57:44,968 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 18:57:44,968 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 18:57:44,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:44,994 INFO L225 Difference]: With dead ends: 35073 [2019-12-07 18:57:44,994 INFO L226 Difference]: Without dead ends: 24437 [2019-12-07 18:57:44,995 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 121 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=140, Invalid=562, Unknown=0, NotChecked=0, Total=702 [2019-12-07 18:57:45,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24437 states. [2019-12-07 18:57:45,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24437 to 18082. [2019-12-07 18:57:45,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18082 states. [2019-12-07 18:57:45,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18082 states to 18082 states and 56427 transitions. [2019-12-07 18:57:45,323 INFO L78 Accepts]: Start accepts. Automaton has 18082 states and 56427 transitions. Word has length 67 [2019-12-07 18:57:45,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:45,323 INFO L462 AbstractCegarLoop]: Abstraction has 18082 states and 56427 transitions. [2019-12-07 18:57:45,323 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:57:45,323 INFO L276 IsEmpty]: Start isEmpty. Operand 18082 states and 56427 transitions. [2019-12-07 18:57:45,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:57:45,337 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:45,338 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:45,338 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:45,338 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:45,338 INFO L82 PathProgramCache]: Analyzing trace with hash 1908292690, now seen corresponding path program 2 times [2019-12-07 18:57:45,338 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:45,338 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1294467298] [2019-12-07 18:57:45,338 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:45,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:45,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:45,455 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1294467298] [2019-12-07 18:57:45,455 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:45,455 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:57:45,455 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1986705603] [2019-12-07 18:57:45,456 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:57:45,456 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:45,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:57:45,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:57:45,456 INFO L87 Difference]: Start difference. First operand 18082 states and 56427 transitions. Second operand 10 states. [2019-12-07 18:57:46,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:46,617 INFO L93 Difference]: Finished difference Result 30956 states and 95936 transitions. [2019-12-07 18:57:46,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 18:57:46,617 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 18:57:46,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:46,648 INFO L225 Difference]: With dead ends: 30956 [2019-12-07 18:57:46,648 INFO L226 Difference]: Without dead ends: 26393 [2019-12-07 18:57:46,648 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=241, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:57:46,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26393 states. [2019-12-07 18:57:46,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26393 to 18534. [2019-12-07 18:57:46,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18534 states. [2019-12-07 18:57:46,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18534 states to 18534 states and 57675 transitions. [2019-12-07 18:57:46,978 INFO L78 Accepts]: Start accepts. Automaton has 18534 states and 57675 transitions. Word has length 67 [2019-12-07 18:57:46,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:46,978 INFO L462 AbstractCegarLoop]: Abstraction has 18534 states and 57675 transitions. [2019-12-07 18:57:46,978 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:57:46,978 INFO L276 IsEmpty]: Start isEmpty. Operand 18534 states and 57675 transitions. [2019-12-07 18:57:46,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:57:46,993 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:46,993 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:46,994 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:46,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:46,994 INFO L82 PathProgramCache]: Analyzing trace with hash 993635084, now seen corresponding path program 3 times [2019-12-07 18:57:46,994 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:46,994 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [212248149] [2019-12-07 18:57:46,994 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:47,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:47,096 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:47,096 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [212248149] [2019-12-07 18:57:47,096 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:47,096 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:57:47,096 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1316099642] [2019-12-07 18:57:47,096 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:57:47,096 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:47,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:57:47,097 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:57:47,097 INFO L87 Difference]: Start difference. First operand 18534 states and 57675 transitions. Second operand 11 states. [2019-12-07 18:57:49,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:49,205 INFO L93 Difference]: Finished difference Result 29036 states and 89939 transitions. [2019-12-07 18:57:49,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 18:57:49,206 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:57:49,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:49,236 INFO L225 Difference]: With dead ends: 29036 [2019-12-07 18:57:49,236 INFO L226 Difference]: Without dead ends: 25553 [2019-12-07 18:57:49,236 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=341, Unknown=0, NotChecked=0, Total=420 [2019-12-07 18:57:49,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25553 states. [2019-12-07 18:57:49,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25553 to 18102. [2019-12-07 18:57:49,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18102 states. [2019-12-07 18:57:49,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18102 states to 18102 states and 56343 transitions. [2019-12-07 18:57:49,566 INFO L78 Accepts]: Start accepts. Automaton has 18102 states and 56343 transitions. Word has length 67 [2019-12-07 18:57:49,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:49,566 INFO L462 AbstractCegarLoop]: Abstraction has 18102 states and 56343 transitions. [2019-12-07 18:57:49,566 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:57:49,566 INFO L276 IsEmpty]: Start isEmpty. Operand 18102 states and 56343 transitions. [2019-12-07 18:57:49,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:57:49,581 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:49,581 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:49,581 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:49,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:49,582 INFO L82 PathProgramCache]: Analyzing trace with hash 397917466, now seen corresponding path program 4 times [2019-12-07 18:57:49,582 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:49,582 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [592513619] [2019-12-07 18:57:49,582 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:49,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:50,169 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:50,169 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [592513619] [2019-12-07 18:57:50,169 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:50,170 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 18:57:50,170 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1360255461] [2019-12-07 18:57:50,170 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 18:57:50,170 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:50,170 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 18:57:50,170 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=362, Unknown=0, NotChecked=0, Total=420 [2019-12-07 18:57:50,171 INFO L87 Difference]: Start difference. First operand 18102 states and 56343 transitions. Second operand 21 states. [2019-12-07 18:57:53,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:53,066 INFO L93 Difference]: Finished difference Result 24018 states and 72827 transitions. [2019-12-07 18:57:53,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2019-12-07 18:57:53,066 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 67 [2019-12-07 18:57:53,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:53,089 INFO L225 Difference]: With dead ends: 24018 [2019-12-07 18:57:53,089 INFO L226 Difference]: Without dead ends: 22122 [2019-12-07 18:57:53,090 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 5 SyntacticMatches, 5 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 675 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=393, Invalid=2577, Unknown=0, NotChecked=0, Total=2970 [2019-12-07 18:57:53,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22122 states. [2019-12-07 18:57:53,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22122 to 20528. [2019-12-07 18:57:53,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20528 states. [2019-12-07 18:57:53,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20528 states to 20528 states and 63135 transitions. [2019-12-07 18:57:53,396 INFO L78 Accepts]: Start accepts. Automaton has 20528 states and 63135 transitions. Word has length 67 [2019-12-07 18:57:53,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:53,396 INFO L462 AbstractCegarLoop]: Abstraction has 20528 states and 63135 transitions. [2019-12-07 18:57:53,396 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 18:57:53,397 INFO L276 IsEmpty]: Start isEmpty. Operand 20528 states and 63135 transitions. [2019-12-07 18:57:53,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:57:53,413 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:53,413 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:53,413 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:53,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:53,414 INFO L82 PathProgramCache]: Analyzing trace with hash 68355254, now seen corresponding path program 5 times [2019-12-07 18:57:53,414 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:53,414 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1931672831] [2019-12-07 18:57:53,414 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:53,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:53,512 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:53,513 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1931672831] [2019-12-07 18:57:53,513 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:53,513 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:57:53,513 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1505057749] [2019-12-07 18:57:53,513 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:57:53,513 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:53,513 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:57:53,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:57:53,513 INFO L87 Difference]: Start difference. First operand 20528 states and 63135 transitions. Second operand 11 states. [2019-12-07 18:57:55,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:55,201 INFO L93 Difference]: Finished difference Result 28067 states and 85468 transitions. [2019-12-07 18:57:55,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 18:57:55,201 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:57:55,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:55,242 INFO L225 Difference]: With dead ends: 28067 [2019-12-07 18:57:55,242 INFO L226 Difference]: Without dead ends: 24820 [2019-12-07 18:57:55,242 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=92, Invalid=414, Unknown=0, NotChecked=0, Total=506 [2019-12-07 18:57:55,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24820 states. [2019-12-07 18:57:55,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24820 to 20726. [2019-12-07 18:57:55,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20726 states. [2019-12-07 18:57:55,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20726 states to 20726 states and 63644 transitions. [2019-12-07 18:57:55,621 INFO L78 Accepts]: Start accepts. Automaton has 20726 states and 63644 transitions. Word has length 67 [2019-12-07 18:57:55,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:55,621 INFO L462 AbstractCegarLoop]: Abstraction has 20726 states and 63644 transitions. [2019-12-07 18:57:55,621 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:57:55,621 INFO L276 IsEmpty]: Start isEmpty. Operand 20726 states and 63644 transitions. [2019-12-07 18:57:55,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:57:55,636 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:55,636 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:55,636 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:55,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:55,636 INFO L82 PathProgramCache]: Analyzing trace with hash 1803113718, now seen corresponding path program 6 times [2019-12-07 18:57:55,636 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:55,637 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1309736946] [2019-12-07 18:57:55,637 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:55,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:55,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:55,736 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1309736946] [2019-12-07 18:57:55,736 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:55,736 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:57:55,736 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [647818619] [2019-12-07 18:57:55,736 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:57:55,736 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:55,737 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:57:55,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:57:55,737 INFO L87 Difference]: Start difference. First operand 20726 states and 63644 transitions. Second operand 12 states. [2019-12-07 18:57:56,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:56,604 INFO L93 Difference]: Finished difference Result 26463 states and 80453 transitions. [2019-12-07 18:57:56,604 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 18:57:56,604 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 18:57:56,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:56,637 INFO L225 Difference]: With dead ends: 26463 [2019-12-07 18:57:56,637 INFO L226 Difference]: Without dead ends: 25248 [2019-12-07 18:57:56,637 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=378, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:57:56,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25248 states. [2019-12-07 18:57:56,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25248 to 20588. [2019-12-07 18:57:56,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20588 states. [2019-12-07 18:57:56,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20588 states to 20588 states and 63280 transitions. [2019-12-07 18:57:56,973 INFO L78 Accepts]: Start accepts. Automaton has 20588 states and 63280 transitions. Word has length 67 [2019-12-07 18:57:56,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:56,973 INFO L462 AbstractCegarLoop]: Abstraction has 20588 states and 63280 transitions. [2019-12-07 18:57:56,973 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:57:56,973 INFO L276 IsEmpty]: Start isEmpty. Operand 20588 states and 63280 transitions. [2019-12-07 18:57:56,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:57:56,990 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:56,990 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:56,990 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:56,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:56,990 INFO L82 PathProgramCache]: Analyzing trace with hash 1857250972, now seen corresponding path program 7 times [2019-12-07 18:57:56,990 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:56,990 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393011134] [2019-12-07 18:57:56,990 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:57,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:57,458 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:57,458 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393011134] [2019-12-07 18:57:57,458 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:57,458 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 18:57:57,458 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [705449898] [2019-12-07 18:57:57,459 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 18:57:57,459 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:57,459 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 18:57:57,459 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=325, Unknown=0, NotChecked=0, Total=380 [2019-12-07 18:57:57,459 INFO L87 Difference]: Start difference. First operand 20588 states and 63280 transitions. Second operand 20 states. [2019-12-07 18:58:06,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:58:06,580 INFO L93 Difference]: Finished difference Result 30218 states and 90624 transitions. [2019-12-07 18:58:06,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 89 states. [2019-12-07 18:58:06,582 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 67 [2019-12-07 18:58:06,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:58:06,631 INFO L225 Difference]: With dead ends: 30218 [2019-12-07 18:58:06,631 INFO L226 Difference]: Without dead ends: 26647 [2019-12-07 18:58:06,633 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2538 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=912, Invalid=7278, Unknown=0, NotChecked=0, Total=8190 [2019-12-07 18:58:06,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26647 states. [2019-12-07 18:58:06,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26647 to 21605. [2019-12-07 18:58:06,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21605 states. [2019-12-07 18:58:06,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21605 states to 21605 states and 66023 transitions. [2019-12-07 18:58:06,965 INFO L78 Accepts]: Start accepts. Automaton has 21605 states and 66023 transitions. Word has length 67 [2019-12-07 18:58:06,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:58:06,965 INFO L462 AbstractCegarLoop]: Abstraction has 21605 states and 66023 transitions. [2019-12-07 18:58:06,965 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 18:58:06,965 INFO L276 IsEmpty]: Start isEmpty. Operand 21605 states and 66023 transitions. [2019-12-07 18:58:06,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:58:06,983 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:58:06,983 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:58:06,983 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:58:06,983 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:58:06,983 INFO L82 PathProgramCache]: Analyzing trace with hash -1998569144, now seen corresponding path program 8 times [2019-12-07 18:58:06,983 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:58:06,983 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [242774873] [2019-12-07 18:58:06,984 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:58:06,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:58:07,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:58:07,410 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [242774873] [2019-12-07 18:58:07,410 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:58:07,410 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 18:58:07,411 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2101198329] [2019-12-07 18:58:07,411 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 18:58:07,411 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:58:07,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 18:58:07,411 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2019-12-07 18:58:07,411 INFO L87 Difference]: Start difference. First operand 21605 states and 66023 transitions. Second operand 17 states. [2019-12-07 18:58:13,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:58:13,092 INFO L93 Difference]: Finished difference Result 29694 states and 89098 transitions. [2019-12-07 18:58:13,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2019-12-07 18:58:13,092 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 18:58:13,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:58:13,122 INFO L225 Difference]: With dead ends: 29694 [2019-12-07 18:58:13,122 INFO L226 Difference]: Without dead ends: 26293 [2019-12-07 18:58:13,123 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 0 SyntacticMatches, 5 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 558 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=362, Invalid=1800, Unknown=0, NotChecked=0, Total=2162 [2019-12-07 18:58:13,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26293 states. [2019-12-07 18:58:13,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26293 to 21136. [2019-12-07 18:58:13,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21136 states. [2019-12-07 18:58:13,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21136 states to 21136 states and 64576 transitions. [2019-12-07 18:58:13,461 INFO L78 Accepts]: Start accepts. Automaton has 21136 states and 64576 transitions. Word has length 67 [2019-12-07 18:58:13,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:58:13,461 INFO L462 AbstractCegarLoop]: Abstraction has 21136 states and 64576 transitions. [2019-12-07 18:58:13,461 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 18:58:13,461 INFO L276 IsEmpty]: Start isEmpty. Operand 21136 states and 64576 transitions. [2019-12-07 18:58:13,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:58:13,479 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:58:13,479 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:58:13,479 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:58:13,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:58:13,479 INFO L82 PathProgramCache]: Analyzing trace with hash 1823504856, now seen corresponding path program 9 times [2019-12-07 18:58:13,479 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:58:13,479 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [809382369] [2019-12-07 18:58:13,479 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:58:13,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:58:13,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:58:13,615 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [809382369] [2019-12-07 18:58:13,615 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:58:13,615 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:58:13,615 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [606372695] [2019-12-07 18:58:13,615 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:58:13,615 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:58:13,615 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:58:13,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:58:13,616 INFO L87 Difference]: Start difference. First operand 21136 states and 64576 transitions. Second operand 12 states. [2019-12-07 18:58:15,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:58:15,446 INFO L93 Difference]: Finished difference Result 30365 states and 91277 transitions. [2019-12-07 18:58:15,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 18:58:15,448 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 18:58:15,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:58:15,491 INFO L225 Difference]: With dead ends: 30365 [2019-12-07 18:58:15,491 INFO L226 Difference]: Without dead ends: 26554 [2019-12-07 18:58:15,492 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=150, Invalid=662, Unknown=0, NotChecked=0, Total=812 [2019-12-07 18:58:15,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26554 states. [2019-12-07 18:58:15,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26554 to 20845. [2019-12-07 18:58:15,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20845 states. [2019-12-07 18:58:15,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20845 states to 20845 states and 63662 transitions. [2019-12-07 18:58:15,839 INFO L78 Accepts]: Start accepts. Automaton has 20845 states and 63662 transitions. Word has length 67 [2019-12-07 18:58:15,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:58:15,839 INFO L462 AbstractCegarLoop]: Abstraction has 20845 states and 63662 transitions. [2019-12-07 18:58:15,839 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:58:15,839 INFO L276 IsEmpty]: Start isEmpty. Operand 20845 states and 63662 transitions. [2019-12-07 18:58:15,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:58:15,857 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:58:15,857 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:58:15,857 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:58:15,857 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:58:15,857 INFO L82 PathProgramCache]: Analyzing trace with hash -715209700, now seen corresponding path program 10 times [2019-12-07 18:58:15,858 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:58:15,858 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [358640650] [2019-12-07 18:58:15,858 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:58:15,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:58:15,985 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:58:15,985 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [358640650] [2019-12-07 18:58:15,985 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:58:15,986 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:58:15,986 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1713186226] [2019-12-07 18:58:15,986 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:58:15,986 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:58:15,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:58:15,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:58:15,986 INFO L87 Difference]: Start difference. First operand 20845 states and 63662 transitions. Second operand 12 states. [2019-12-07 18:58:17,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:58:17,761 INFO L93 Difference]: Finished difference Result 29410 states and 88634 transitions. [2019-12-07 18:58:17,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 18:58:17,761 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 18:58:17,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:58:17,794 INFO L225 Difference]: With dead ends: 29410 [2019-12-07 18:58:17,794 INFO L226 Difference]: Without dead ends: 26535 [2019-12-07 18:58:17,794 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 253 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=215, Invalid=1045, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 18:58:17,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26535 states. [2019-12-07 18:58:18,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26535 to 20161. [2019-12-07 18:58:18,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20161 states. [2019-12-07 18:58:18,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20161 states to 20161 states and 61786 transitions. [2019-12-07 18:58:18,138 INFO L78 Accepts]: Start accepts. Automaton has 20161 states and 61786 transitions. Word has length 67 [2019-12-07 18:58:18,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:58:18,138 INFO L462 AbstractCegarLoop]: Abstraction has 20161 states and 61786 transitions. [2019-12-07 18:58:18,138 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:58:18,138 INFO L276 IsEmpty]: Start isEmpty. Operand 20161 states and 61786 transitions. [2019-12-07 18:58:18,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:58:18,155 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:58:18,155 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:58:18,156 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:58:18,156 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:58:18,156 INFO L82 PathProgramCache]: Analyzing trace with hash -1867129146, now seen corresponding path program 11 times [2019-12-07 18:58:18,156 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:58:18,156 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1967456294] [2019-12-07 18:58:18,156 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:58:18,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:58:18,194 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:58:18,195 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1967456294] [2019-12-07 18:58:18,195 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:58:18,195 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:58:18,195 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [27809364] [2019-12-07 18:58:18,195 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:58:18,195 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:58:18,195 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:58:18,195 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:58:18,195 INFO L87 Difference]: Start difference. First operand 20161 states and 61786 transitions. Second operand 6 states. [2019-12-07 18:58:18,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:58:18,441 INFO L93 Difference]: Finished difference Result 47074 states and 143840 transitions. [2019-12-07 18:58:18,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:58:18,441 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 18:58:18,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:58:18,484 INFO L225 Difference]: With dead ends: 47074 [2019-12-07 18:58:18,484 INFO L226 Difference]: Without dead ends: 37412 [2019-12-07 18:58:18,484 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:58:18,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37412 states. [2019-12-07 18:58:18,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37412 to 21195. [2019-12-07 18:58:18,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21195 states. [2019-12-07 18:58:18,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21195 states to 21195 states and 65165 transitions. [2019-12-07 18:58:18,979 INFO L78 Accepts]: Start accepts. Automaton has 21195 states and 65165 transitions. Word has length 67 [2019-12-07 18:58:18,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:58:18,979 INFO L462 AbstractCegarLoop]: Abstraction has 21195 states and 65165 transitions. [2019-12-07 18:58:18,979 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:58:18,979 INFO L276 IsEmpty]: Start isEmpty. Operand 21195 states and 65165 transitions. [2019-12-07 18:58:18,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:58:18,995 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:58:18,995 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:58:18,995 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:58:18,995 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:58:18,995 INFO L82 PathProgramCache]: Analyzing trace with hash -1154306208, now seen corresponding path program 12 times [2019-12-07 18:58:18,995 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:58:18,996 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1216028730] [2019-12-07 18:58:18,996 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:58:19,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:58:19,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:58:19,076 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:58:19,076 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:58:19,078 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1306~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1306~0.base_23|) |v_ULTIMATE.start_main_~#t1306~0.offset_17| 0)) |v_#memory_int_17|) (= 0 v_~z$r_buff0_thd3~0_416) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1306~0.base_23| 4) |v_#length_21|) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= |v_ULTIMATE.start_main_~#t1306~0.offset_17| 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= |v_#valid_60| (store .cse0 |v_ULTIMATE.start_main_~#t1306~0.base_23| 1)) (= v_~z$w_buff0_used~0_900 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= v_~z$read_delayed~0_7 0) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1306~0.base_23|) (= v_~z$r_buff1_thd1~0_166 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1306~0.base_23|)) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1308~0.base=|v_ULTIMATE.start_main_~#t1308~0.base_17|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_~#t1307~0.offset=|v_ULTIMATE.start_main_~#t1307~0.offset_12|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ULTIMATE.start_main_~#t1307~0.base=|v_ULTIMATE.start_main_~#t1307~0.base_19|, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ULTIMATE.start_main_~#t1306~0.base=|v_ULTIMATE.start_main_~#t1306~0.base_23|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ~x~0=v_~x~0_129, ULTIMATE.start_main_~#t1306~0.offset=|v_ULTIMATE.start_main_~#t1306~0.offset_17|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_~#t1308~0.offset=|v_ULTIMATE.start_main_~#t1308~0.offset_14|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1308~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t1307~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ULTIMATE.start_main_~#t1307~0.base, ~z$flush_delayed~0, ULTIMATE.start_main_~#t1306~0.base, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1306~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1308~0.offset, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:58:19,079 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1307~0.offset_9|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1307~0.base_11| 4)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1307~0.base_11|) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1307~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1307~0.base_11|) |v_ULTIMATE.start_main_~#t1307~0.offset_9| 1))) (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1307~0.base_11| 1)) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1307~0.base_11|)) (not (= |v_ULTIMATE.start_main_~#t1307~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1307~0.base=|v_ULTIMATE.start_main_~#t1307~0.base_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1307~0.offset=|v_ULTIMATE.start_main_~#t1307~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1307~0.base, #length, ULTIMATE.start_main_~#t1307~0.offset] because there is no mapped edge [2019-12-07 18:58:19,079 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:58:19,081 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In10111743 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In10111743 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out10111743| ~z~0_In10111743) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In10111743 |P1Thread1of1ForFork2_#t~ite9_Out10111743|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In10111743, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10111743, ~z$w_buff1~0=~z$w_buff1~0_In10111743, ~z~0=~z~0_In10111743} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out10111743|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In10111743, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10111743, ~z$w_buff1~0=~z$w_buff1~0_In10111743, ~z~0=~z~0_In10111743} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:58:19,081 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 18:58:19,081 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1308~0.base_13| 4)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1308~0.base_13| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1308~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1308~0.base_13|) |v_ULTIMATE.start_main_~#t1308~0.offset_11| 2)) |v_#memory_int_11|) (= |v_ULTIMATE.start_main_~#t1308~0.offset_11| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1308~0.base_13|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1308~0.base_13|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1308~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1308~0.base=|v_ULTIMATE.start_main_~#t1308~0.base_13|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1308~0.offset=|v_ULTIMATE.start_main_~#t1308~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1308~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1308~0.offset] because there is no mapped edge [2019-12-07 18:58:19,081 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In984766544 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In984766544 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out984766544| ~z$w_buff0_used~0_In984766544)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out984766544| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In984766544, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In984766544} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In984766544, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out984766544|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In984766544} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:58:19,081 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In1670259436 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1670259436 256))) (.cse3 (= (mod ~z$r_buff0_thd2~0_In1670259436 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In1670259436 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1670259436 |P1Thread1of1ForFork2_#t~ite12_Out1670259436|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork2_#t~ite12_Out1670259436| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1670259436, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1670259436, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1670259436, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1670259436} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1670259436, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1670259436, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1670259436, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1670259436|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1670259436} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:58:19,083 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-24977062 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-24977062 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-24977062|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In-24977062 |P1Thread1of1ForFork2_#t~ite13_Out-24977062|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-24977062, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-24977062} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-24977062, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-24977062|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-24977062} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:58:19,084 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1802801382 256)))) (or (and (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In1802801382 256) 0))) (or (and (= (mod ~z$w_buff1_used~0_In1802801382 256) 0) .cse0) (and .cse0 (= (mod ~z$r_buff1_thd3~0_In1802801382 256) 0)) (= (mod ~z$w_buff0_used~0_In1802801382 256) 0))) (= |P2Thread1of1ForFork0_#t~ite26_Out1802801382| ~z$w_buff0_used~0_In1802801382) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out1802801382| |P2Thread1of1ForFork0_#t~ite27_Out1802801382|)) (and (= |P2Thread1of1ForFork0_#t~ite26_In1802801382| |P2Thread1of1ForFork0_#t~ite26_Out1802801382|) (= |P2Thread1of1ForFork0_#t~ite27_Out1802801382| ~z$w_buff0_used~0_In1802801382) (not .cse1)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1802801382|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1802801382, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1802801382, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1802801382, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1802801382, ~weak$$choice2~0=~weak$$choice2~0_In1802801382} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1802801382|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1802801382|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1802801382, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1802801382, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1802801382, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1802801382, ~weak$$choice2~0=~weak$$choice2~0_In1802801382} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:58:19,085 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:58:19,086 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In439139011 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In439139011 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out439139011|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In439139011 |P0Thread1of1ForFork1_#t~ite5_Out439139011|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In439139011, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In439139011} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out439139011|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In439139011, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In439139011} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:58:19,087 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 18:58:19,087 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1375098561 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1375098561 256))) (.cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out1375098561| |P2Thread1of1ForFork0_#t~ite39_Out1375098561|))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out1375098561| ~z~0_In1375098561) (or .cse0 .cse1) .cse2) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1375098561| ~z$w_buff1~0_In1375098561) (not .cse1) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1375098561, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1375098561, ~z$w_buff1~0=~z$w_buff1~0_In1375098561, ~z~0=~z~0_In1375098561} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out1375098561|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1375098561|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1375098561, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1375098561, ~z$w_buff1~0=~z$w_buff1~0_In1375098561, ~z~0=~z~0_In1375098561} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:58:19,087 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In260823075 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In260823075 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out260823075|)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out260823075| ~z$w_buff0_used~0_In260823075)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In260823075, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In260823075} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In260823075, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out260823075|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In260823075} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:58:19,088 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In386598775 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In386598775 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In386598775 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In386598775 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out386598775| ~z$w_buff1_used~0_In386598775)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite41_Out386598775| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In386598775, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In386598775, ~z$w_buff1_used~0=~z$w_buff1_used~0_In386598775, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In386598775} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In386598775, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In386598775, ~z$w_buff1_used~0=~z$w_buff1_used~0_In386598775, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In386598775, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out386598775|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:58:19,088 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-380531429 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-380531429 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-380531429|)) (and (= ~z$r_buff0_thd3~0_In-380531429 |P2Thread1of1ForFork0_#t~ite42_Out-380531429|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-380531429, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-380531429} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-380531429, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-380531429, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-380531429|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:58:19,088 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In-988525752 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-988525752 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-988525752 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-988525752 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In-988525752 |P2Thread1of1ForFork0_#t~ite43_Out-988525752|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork0_#t~ite43_Out-988525752| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-988525752, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-988525752, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-988525752, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-988525752} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-988525752|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-988525752, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-988525752, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-988525752, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-988525752} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:58:19,088 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:58:19,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1407019002 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In1407019002 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In1407019002 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In1407019002 256) 0))) (or (and (= ~z$w_buff1_used~0_In1407019002 |P0Thread1of1ForFork1_#t~ite6_Out1407019002|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1407019002|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1407019002, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1407019002, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1407019002, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1407019002} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1407019002, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1407019002|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1407019002, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1407019002, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1407019002} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:58:19,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In2005253206 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In2005253206 256) 0)) (.cse0 (= ~z$r_buff0_thd1~0_In2005253206 ~z$r_buff0_thd1~0_Out2005253206))) (or (and .cse0 .cse1) (and (not .cse2) (= 0 ~z$r_buff0_thd1~0_Out2005253206) (not .cse1)) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2005253206} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out2005253206|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out2005253206} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:58:19,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1825162012 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In1825162012 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In1825162012 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In1825162012 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out1825162012| 0)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1825162012| ~z$r_buff1_thd1~0_In1825162012) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1825162012, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1825162012, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1825162012, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1825162012} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1825162012|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1825162012, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1825162012, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1825162012, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1825162012} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:58:19,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:58:19,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd2~0_In-1799265621 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1799265621 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1799265621 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-1799265621 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1799265621|)) (and (= ~z$r_buff1_thd2~0_In-1799265621 |P1Thread1of1ForFork2_#t~ite14_Out-1799265621|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1799265621, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1799265621, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799265621, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1799265621} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1799265621, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1799265621, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799265621, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1799265621|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1799265621} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:58:19,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:58:19,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:58:19,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-1032287144 256) 0)) (.cse0 (= |ULTIMATE.start_main_#t~ite48_Out-1032287144| |ULTIMATE.start_main_#t~ite47_Out-1032287144|)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1032287144 256)))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite47_Out-1032287144| ~z~0_In-1032287144) (or .cse1 .cse2)) (and (not .cse2) .cse0 (= |ULTIMATE.start_main_#t~ite47_Out-1032287144| ~z$w_buff1~0_In-1032287144) (not .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1032287144, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1032287144, ~z$w_buff1~0=~z$w_buff1~0_In-1032287144, ~z~0=~z~0_In-1032287144} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1032287144, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1032287144|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1032287144, ~z$w_buff1~0=~z$w_buff1~0_In-1032287144, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1032287144|, ~z~0=~z~0_In-1032287144} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:58:19,091 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-254870859 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-254870859 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite49_Out-254870859|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-254870859 |ULTIMATE.start_main_#t~ite49_Out-254870859|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-254870859, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-254870859} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-254870859, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-254870859, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-254870859|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:58:19,091 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-535386570 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-535386570 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-535386570 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd0~0_In-535386570 256) 0))) (or (and (= ~z$w_buff1_used~0_In-535386570 |ULTIMATE.start_main_#t~ite50_Out-535386570|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite50_Out-535386570| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-535386570, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-535386570, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-535386570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-535386570} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-535386570|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-535386570, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-535386570, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-535386570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-535386570} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:58:19,091 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1337138042 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1337138042 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-1337138042 |ULTIMATE.start_main_#t~ite51_Out-1337138042|)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-1337138042|) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1337138042, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1337138042} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1337138042, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1337138042|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1337138042} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:58:19,092 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-872037224 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-872037224 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-872037224 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-872037224 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd0~0_In-872037224 |ULTIMATE.start_main_#t~ite52_Out-872037224|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-872037224|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-872037224, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-872037224, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-872037224, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-872037224} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-872037224|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-872037224, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-872037224, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-872037224, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-872037224} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:58:19,092 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:58:19,145 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:58:19 BasicIcfg [2019-12-07 18:58:19,145 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:58:19,145 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:58:19,145 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:58:19,145 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:58:19,145 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:55:50" (3/4) ... [2019-12-07 18:58:19,147 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:58:19,147 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1306~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1306~0.base_23|) |v_ULTIMATE.start_main_~#t1306~0.offset_17| 0)) |v_#memory_int_17|) (= 0 v_~z$r_buff0_thd3~0_416) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1306~0.base_23| 4) |v_#length_21|) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= |v_ULTIMATE.start_main_~#t1306~0.offset_17| 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= |v_#valid_60| (store .cse0 |v_ULTIMATE.start_main_~#t1306~0.base_23| 1)) (= v_~z$w_buff0_used~0_900 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= v_~z$read_delayed~0_7 0) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1306~0.base_23|) (= v_~z$r_buff1_thd1~0_166 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1306~0.base_23|)) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1308~0.base=|v_ULTIMATE.start_main_~#t1308~0.base_17|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_~#t1307~0.offset=|v_ULTIMATE.start_main_~#t1307~0.offset_12|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ULTIMATE.start_main_~#t1307~0.base=|v_ULTIMATE.start_main_~#t1307~0.base_19|, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ULTIMATE.start_main_~#t1306~0.base=|v_ULTIMATE.start_main_~#t1306~0.base_23|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ~x~0=v_~x~0_129, ULTIMATE.start_main_~#t1306~0.offset=|v_ULTIMATE.start_main_~#t1306~0.offset_17|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_~#t1308~0.offset=|v_ULTIMATE.start_main_~#t1308~0.offset_14|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1308~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t1307~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ULTIMATE.start_main_~#t1307~0.base, ~z$flush_delayed~0, ULTIMATE.start_main_~#t1306~0.base, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1306~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1308~0.offset, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:58:19,148 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1307~0.offset_9|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1307~0.base_11| 4)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1307~0.base_11|) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1307~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1307~0.base_11|) |v_ULTIMATE.start_main_~#t1307~0.offset_9| 1))) (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1307~0.base_11| 1)) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1307~0.base_11|)) (not (= |v_ULTIMATE.start_main_~#t1307~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1307~0.base=|v_ULTIMATE.start_main_~#t1307~0.base_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1307~0.offset=|v_ULTIMATE.start_main_~#t1307~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1307~0.base, #length, ULTIMATE.start_main_~#t1307~0.offset] because there is no mapped edge [2019-12-07 18:58:19,148 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:58:19,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In10111743 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In10111743 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out10111743| ~z~0_In10111743) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In10111743 |P1Thread1of1ForFork2_#t~ite9_Out10111743|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In10111743, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10111743, ~z$w_buff1~0=~z$w_buff1~0_In10111743, ~z~0=~z~0_In10111743} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out10111743|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In10111743, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10111743, ~z$w_buff1~0=~z$w_buff1~0_In10111743, ~z~0=~z~0_In10111743} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:58:19,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 18:58:19,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1308~0.base_13| 4)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1308~0.base_13| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1308~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1308~0.base_13|) |v_ULTIMATE.start_main_~#t1308~0.offset_11| 2)) |v_#memory_int_11|) (= |v_ULTIMATE.start_main_~#t1308~0.offset_11| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1308~0.base_13|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1308~0.base_13|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1308~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1308~0.base=|v_ULTIMATE.start_main_~#t1308~0.base_13|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1308~0.offset=|v_ULTIMATE.start_main_~#t1308~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1308~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1308~0.offset] because there is no mapped edge [2019-12-07 18:58:19,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In984766544 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In984766544 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out984766544| ~z$w_buff0_used~0_In984766544)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out984766544| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In984766544, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In984766544} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In984766544, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out984766544|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In984766544} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:58:19,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In1670259436 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1670259436 256))) (.cse3 (= (mod ~z$r_buff0_thd2~0_In1670259436 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In1670259436 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1670259436 |P1Thread1of1ForFork2_#t~ite12_Out1670259436|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork2_#t~ite12_Out1670259436| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1670259436, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1670259436, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1670259436, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1670259436} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1670259436, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1670259436, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1670259436, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1670259436|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1670259436} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:58:19,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-24977062 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-24977062 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-24977062|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In-24977062 |P1Thread1of1ForFork2_#t~ite13_Out-24977062|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-24977062, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-24977062} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-24977062, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-24977062|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-24977062} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:58:19,152 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1802801382 256)))) (or (and (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In1802801382 256) 0))) (or (and (= (mod ~z$w_buff1_used~0_In1802801382 256) 0) .cse0) (and .cse0 (= (mod ~z$r_buff1_thd3~0_In1802801382 256) 0)) (= (mod ~z$w_buff0_used~0_In1802801382 256) 0))) (= |P2Thread1of1ForFork0_#t~ite26_Out1802801382| ~z$w_buff0_used~0_In1802801382) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out1802801382| |P2Thread1of1ForFork0_#t~ite27_Out1802801382|)) (and (= |P2Thread1of1ForFork0_#t~ite26_In1802801382| |P2Thread1of1ForFork0_#t~ite26_Out1802801382|) (= |P2Thread1of1ForFork0_#t~ite27_Out1802801382| ~z$w_buff0_used~0_In1802801382) (not .cse1)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1802801382|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1802801382, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1802801382, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1802801382, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1802801382, ~weak$$choice2~0=~weak$$choice2~0_In1802801382} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1802801382|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1802801382|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1802801382, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1802801382, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1802801382, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1802801382, ~weak$$choice2~0=~weak$$choice2~0_In1802801382} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:58:19,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:58:19,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In439139011 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In439139011 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out439139011|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In439139011 |P0Thread1of1ForFork1_#t~ite5_Out439139011|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In439139011, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In439139011} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out439139011|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In439139011, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In439139011} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:58:19,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 18:58:19,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1375098561 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1375098561 256))) (.cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out1375098561| |P2Thread1of1ForFork0_#t~ite39_Out1375098561|))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out1375098561| ~z~0_In1375098561) (or .cse0 .cse1) .cse2) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1375098561| ~z$w_buff1~0_In1375098561) (not .cse1) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1375098561, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1375098561, ~z$w_buff1~0=~z$w_buff1~0_In1375098561, ~z~0=~z~0_In1375098561} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out1375098561|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1375098561|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1375098561, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1375098561, ~z$w_buff1~0=~z$w_buff1~0_In1375098561, ~z~0=~z~0_In1375098561} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:58:19,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In260823075 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In260823075 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out260823075|)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out260823075| ~z$w_buff0_used~0_In260823075)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In260823075, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In260823075} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In260823075, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out260823075|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In260823075} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:58:19,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In386598775 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In386598775 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In386598775 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In386598775 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out386598775| ~z$w_buff1_used~0_In386598775)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite41_Out386598775| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In386598775, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In386598775, ~z$w_buff1_used~0=~z$w_buff1_used~0_In386598775, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In386598775} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In386598775, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In386598775, ~z$w_buff1_used~0=~z$w_buff1_used~0_In386598775, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In386598775, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out386598775|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:58:19,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-380531429 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-380531429 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-380531429|)) (and (= ~z$r_buff0_thd3~0_In-380531429 |P2Thread1of1ForFork0_#t~ite42_Out-380531429|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-380531429, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-380531429} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-380531429, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-380531429, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-380531429|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:58:19,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In-988525752 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-988525752 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-988525752 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-988525752 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In-988525752 |P2Thread1of1ForFork0_#t~ite43_Out-988525752|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork0_#t~ite43_Out-988525752| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-988525752, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-988525752, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-988525752, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-988525752} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-988525752|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-988525752, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-988525752, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-988525752, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-988525752} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:58:19,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:58:19,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1407019002 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In1407019002 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In1407019002 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In1407019002 256) 0))) (or (and (= ~z$w_buff1_used~0_In1407019002 |P0Thread1of1ForFork1_#t~ite6_Out1407019002|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1407019002|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1407019002, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1407019002, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1407019002, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1407019002} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1407019002, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1407019002|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1407019002, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1407019002, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1407019002} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:58:19,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In2005253206 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In2005253206 256) 0)) (.cse0 (= ~z$r_buff0_thd1~0_In2005253206 ~z$r_buff0_thd1~0_Out2005253206))) (or (and .cse0 .cse1) (and (not .cse2) (= 0 ~z$r_buff0_thd1~0_Out2005253206) (not .cse1)) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2005253206} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out2005253206|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out2005253206} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:58:19,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1825162012 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In1825162012 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In1825162012 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In1825162012 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out1825162012| 0)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1825162012| ~z$r_buff1_thd1~0_In1825162012) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1825162012, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1825162012, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1825162012, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1825162012} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1825162012|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1825162012, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1825162012, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1825162012, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1825162012} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:58:19,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:58:19,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd2~0_In-1799265621 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1799265621 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1799265621 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-1799265621 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1799265621|)) (and (= ~z$r_buff1_thd2~0_In-1799265621 |P1Thread1of1ForFork2_#t~ite14_Out-1799265621|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1799265621, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1799265621, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799265621, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1799265621} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1799265621, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1799265621, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799265621, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1799265621|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1799265621} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:58:19,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:58:19,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:58:19,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-1032287144 256) 0)) (.cse0 (= |ULTIMATE.start_main_#t~ite48_Out-1032287144| |ULTIMATE.start_main_#t~ite47_Out-1032287144|)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1032287144 256)))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite47_Out-1032287144| ~z~0_In-1032287144) (or .cse1 .cse2)) (and (not .cse2) .cse0 (= |ULTIMATE.start_main_#t~ite47_Out-1032287144| ~z$w_buff1~0_In-1032287144) (not .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1032287144, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1032287144, ~z$w_buff1~0=~z$w_buff1~0_In-1032287144, ~z~0=~z~0_In-1032287144} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1032287144, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1032287144|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1032287144, ~z$w_buff1~0=~z$w_buff1~0_In-1032287144, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1032287144|, ~z~0=~z~0_In-1032287144} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:58:19,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-254870859 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-254870859 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite49_Out-254870859|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-254870859 |ULTIMATE.start_main_#t~ite49_Out-254870859|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-254870859, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-254870859} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-254870859, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-254870859, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-254870859|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:58:19,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-535386570 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-535386570 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-535386570 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd0~0_In-535386570 256) 0))) (or (and (= ~z$w_buff1_used~0_In-535386570 |ULTIMATE.start_main_#t~ite50_Out-535386570|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite50_Out-535386570| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-535386570, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-535386570, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-535386570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-535386570} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-535386570|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-535386570, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-535386570, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-535386570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-535386570} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:58:19,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1337138042 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1337138042 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-1337138042 |ULTIMATE.start_main_#t~ite51_Out-1337138042|)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-1337138042|) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1337138042, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1337138042} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1337138042, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1337138042|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1337138042} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:58:19,160 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-872037224 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-872037224 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-872037224 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-872037224 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd0~0_In-872037224 |ULTIMATE.start_main_#t~ite52_Out-872037224|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-872037224|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-872037224, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-872037224, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-872037224, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-872037224} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-872037224|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-872037224, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-872037224, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-872037224, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-872037224} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:58:19,160 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:58:19,212 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_170627b7-b2e5-4c6c-9fb4-e5bd3ae1332f/bin/uautomizer/witness.graphml [2019-12-07 18:58:19,212 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:58:19,213 INFO L168 Benchmark]: Toolchain (without parser) took 149721.09 ms. Allocated memory was 1.0 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 939.8 MB in the beginning and 6.0 GB in the end (delta: -5.0 GB). Peak memory consumption was 883.5 MB. Max. memory is 11.5 GB. [2019-12-07 18:58:19,213 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:58:19,214 INFO L168 Benchmark]: CACSL2BoogieTranslator took 375.15 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 131.1 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -157.9 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 18:58:19,214 INFO L168 Benchmark]: Boogie Procedure Inliner took 46.78 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:58:19,214 INFO L168 Benchmark]: Boogie Preprocessor took 33.34 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:58:19,214 INFO L168 Benchmark]: RCFGBuilder took 425.64 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 18:58:19,214 INFO L168 Benchmark]: TraceAbstraction took 148769.53 ms. Allocated memory was 1.2 GB in the beginning and 7.0 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 6.0 GB in the end (delta: -5.0 GB). Peak memory consumption was 834.9 MB. Max. memory is 11.5 GB. [2019-12-07 18:58:19,215 INFO L168 Benchmark]: Witness Printer took 67.13 ms. Allocated memory is still 7.0 GB. Free memory was 6.0 GB in the beginning and 6.0 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:58:19,216 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 375.15 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 131.1 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -157.9 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 46.78 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 33.34 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 425.64 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 148769.53 ms. Allocated memory was 1.2 GB in the beginning and 7.0 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 6.0 GB in the end (delta: -5.0 GB). Peak memory consumption was 834.9 MB. Max. memory is 11.5 GB. * Witness Printer took 67.13 ms. Allocated memory is still 7.0 GB. Free memory was 6.0 GB in the beginning and 6.0 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 176 ProgramPointsBefore, 95 ProgramPointsAfterwards, 213 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 55 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 29 ChoiceCompositions, 7276 VarBasedMoverChecksPositive, 432 VarBasedMoverChecksNegative, 272 SemBasedMoverChecksPositive, 254 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 130045 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L822] FCALL, FORK 0 pthread_create(&t1306, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t1307, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 1 [L763] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L826] FCALL, FORK 0 pthread_create(&t1308, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 1 [L783] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L784] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L785] 3 z$flush_delayed = weak$$choice2 [L786] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L788] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L788] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L789] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L789] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L790] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L791] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L793] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L794] 3 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L799] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L800] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L801] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L802] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L832] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L832] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L833] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L834] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L835] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 148.6s, OverallIterations: 28, TraceHistogramMax: 1, AutomataDifference: 44.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6904 SDtfs, 8255 SDslu, 28879 SDs, 0 SdLazy, 31054 SolverSat, 561 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 21.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 493 GetRequests, 40 SyntacticMatches, 27 SemanticMatches, 426 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4551 ImplicationChecksByTransitivity, 6.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=237826occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 78.4s AutomataMinimizationTime, 27 MinimizatonAttempts, 309495 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.6s InterpolantComputationTime, 1249 NumberOfCodeBlocks, 1249 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 1155 ConstructedInterpolants, 0 QuantifiedInterpolants, 343181 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 27 InterpolantComputations, 27 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...