./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix049_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_693ee70e-3878-485d-ad80-f45f7f6d8515/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_693ee70e-3878-485d-ad80-f45f7f6d8515/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_693ee70e-3878-485d-ad80-f45f7f6d8515/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_693ee70e-3878-485d-ad80-f45f7f6d8515/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix049_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_693ee70e-3878-485d-ad80-f45f7f6d8515/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_693ee70e-3878-485d-ad80-f45f7f6d8515/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 75d0bc3a94f4e95f081d7a37fe6f4b2e20b7449e .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:22:27,036 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:22:27,037 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:22:27,044 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:22:27,045 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:22:27,045 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:22:27,046 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:22:27,048 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:22:27,049 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:22:27,049 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:22:27,050 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:22:27,051 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:22:27,051 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:22:27,052 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:22:27,052 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:22:27,053 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:22:27,054 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:22:27,054 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:22:27,056 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:22:27,057 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:22:27,058 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:22:27,059 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:22:27,060 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:22:27,060 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:22:27,062 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:22:27,062 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:22:27,062 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:22:27,063 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:22:27,063 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:22:27,064 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:22:27,064 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:22:27,064 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:22:27,065 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:22:27,065 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:22:27,066 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:22:27,066 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:22:27,066 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:22:27,066 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:22:27,066 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:22:27,067 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:22:27,067 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:22:27,068 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_693ee70e-3878-485d-ad80-f45f7f6d8515/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 15:22:27,077 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:22:27,078 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:22:27,078 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 15:22:27,079 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 15:22:27,079 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 15:22:27,079 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:22:27,079 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:22:27,079 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:22:27,079 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:22:27,079 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:22:27,080 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:22:27,080 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:22:27,080 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:22:27,080 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:22:27,080 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:22:27,080 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:22:27,080 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:22:27,081 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:22:27,081 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 15:22:27,081 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:22:27,081 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:22:27,081 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:22:27,081 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:22:27,081 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:22:27,082 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:22:27,082 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 15:22:27,082 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:22:27,082 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:22:27,082 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:22:27,082 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_693ee70e-3878-485d-ad80-f45f7f6d8515/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 75d0bc3a94f4e95f081d7a37fe6f4b2e20b7449e [2019-12-07 15:22:27,179 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:22:27,189 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:22:27,191 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:22:27,192 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:22:27,193 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:22:27,193 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_693ee70e-3878-485d-ad80-f45f7f6d8515/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix049_tso.oepc.i [2019-12-07 15:22:27,232 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_693ee70e-3878-485d-ad80-f45f7f6d8515/bin/uautomizer/data/36a28b7fd/43025d5e0359468a96471ea3a54384db/FLAG6f2920e7e [2019-12-07 15:22:27,707 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:22:27,707 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_693ee70e-3878-485d-ad80-f45f7f6d8515/sv-benchmarks/c/pthread-wmm/mix049_tso.oepc.i [2019-12-07 15:22:27,717 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_693ee70e-3878-485d-ad80-f45f7f6d8515/bin/uautomizer/data/36a28b7fd/43025d5e0359468a96471ea3a54384db/FLAG6f2920e7e [2019-12-07 15:22:27,729 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_693ee70e-3878-485d-ad80-f45f7f6d8515/bin/uautomizer/data/36a28b7fd/43025d5e0359468a96471ea3a54384db [2019-12-07 15:22:27,732 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:22:27,733 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:22:27,734 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:22:27,734 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:22:27,737 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:22:27,738 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:22:27" (1/1) ... [2019-12-07 15:22:27,740 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a2ff042 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:22:27, skipping insertion in model container [2019-12-07 15:22:27,740 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:22:27" (1/1) ... [2019-12-07 15:22:27,745 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:22:27,781 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:22:28,038 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:22:28,046 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:22:28,090 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:22:28,135 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:22:28,136 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:22:28 WrapperNode [2019-12-07 15:22:28,136 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:22:28,136 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:22:28,137 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:22:28,137 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:22:28,142 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:22:28" (1/1) ... [2019-12-07 15:22:28,156 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:22:28" (1/1) ... [2019-12-07 15:22:28,174 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:22:28,175 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:22:28,175 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:22:28,175 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:22:28,181 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:22:28" (1/1) ... [2019-12-07 15:22:28,181 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:22:28" (1/1) ... [2019-12-07 15:22:28,185 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:22:28" (1/1) ... [2019-12-07 15:22:28,185 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:22:28" (1/1) ... [2019-12-07 15:22:28,192 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:22:28" (1/1) ... [2019-12-07 15:22:28,195 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:22:28" (1/1) ... [2019-12-07 15:22:28,197 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:22:28" (1/1) ... [2019-12-07 15:22:28,201 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:22:28,201 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:22:28,201 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:22:28,201 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:22:28,202 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:22:28" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_693ee70e-3878-485d-ad80-f45f7f6d8515/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:22:28,245 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:22:28,245 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:22:28,245 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:22:28,246 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:22:28,246 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:22:28,246 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:22:28,246 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:22:28,246 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:22:28,246 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 15:22:28,246 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 15:22:28,246 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:22:28,246 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:22:28,246 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:22:28,247 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:22:28,622 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:22:28,622 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 15:22:28,623 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:22:28 BoogieIcfgContainer [2019-12-07 15:22:28,623 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:22:28,624 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:22:28,624 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:22:28,627 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:22:28,627 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:22:27" (1/3) ... [2019-12-07 15:22:28,628 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@a063be8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:22:28, skipping insertion in model container [2019-12-07 15:22:28,628 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:22:28" (2/3) ... [2019-12-07 15:22:28,628 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@a063be8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:22:28, skipping insertion in model container [2019-12-07 15:22:28,628 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:22:28" (3/3) ... [2019-12-07 15:22:28,630 INFO L109 eAbstractionObserver]: Analyzing ICFG mix049_tso.oepc.i [2019-12-07 15:22:28,638 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:22:28,638 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:22:28,644 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 15:22:28,645 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:22:28,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,675 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,675 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,675 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,675 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,675 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,676 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,676 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,676 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,676 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,676 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,677 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,677 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,677 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,677 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,677 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,677 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,677 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,677 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,677 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,678 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,678 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,678 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,678 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,678 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,678 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,678 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,678 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,679 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,679 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,679 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,679 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,679 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,680 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,680 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,685 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,685 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,686 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,687 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:22:28,718 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 15:22:28,731 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:22:28,731 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:22:28,731 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:22:28,732 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:22:28,732 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:22:28,732 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:22:28,732 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:22:28,732 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:22:28,742 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 15:22:28,744 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 15:22:28,810 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 15:22:28,810 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:22:28,819 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:22:28,835 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 15:22:28,865 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 15:22:28,865 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:22:28,870 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:22:28,886 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 15:22:28,886 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:22:31,815 WARN L192 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 15:22:32,108 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130045 [2019-12-07 15:22:32,108 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 15:22:32,110 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 15:22:51,074 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 126452 states. [2019-12-07 15:22:51,076 INFO L276 IsEmpty]: Start isEmpty. Operand 126452 states. [2019-12-07 15:22:51,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 15:22:51,079 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:51,080 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 15:22:51,080 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:51,084 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:51,084 INFO L82 PathProgramCache]: Analyzing trace with hash 913925, now seen corresponding path program 1 times [2019-12-07 15:22:51,089 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:51,089 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240021694] [2019-12-07 15:22:51,090 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:51,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:51,214 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:51,214 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240021694] [2019-12-07 15:22:51,215 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:51,215 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:22:51,216 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1406149810] [2019-12-07 15:22:51,218 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:22:51,219 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:51,227 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:22:51,228 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:22:51,229 INFO L87 Difference]: Start difference. First operand 126452 states. Second operand 3 states. [2019-12-07 15:22:51,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:51,985 INFO L93 Difference]: Finished difference Result 125570 states and 538788 transitions. [2019-12-07 15:22:51,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:22:51,987 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 15:22:51,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:52,441 INFO L225 Difference]: With dead ends: 125570 [2019-12-07 15:22:52,441 INFO L226 Difference]: Without dead ends: 111010 [2019-12-07 15:22:52,442 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:22:56,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111010 states. [2019-12-07 15:23:00,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111010 to 111010. [2019-12-07 15:23:00,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111010 states. [2019-12-07 15:23:00,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111010 states to 111010 states and 475060 transitions. [2019-12-07 15:23:00,455 INFO L78 Accepts]: Start accepts. Automaton has 111010 states and 475060 transitions. Word has length 3 [2019-12-07 15:23:00,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:23:00,456 INFO L462 AbstractCegarLoop]: Abstraction has 111010 states and 475060 transitions. [2019-12-07 15:23:00,456 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:23:00,456 INFO L276 IsEmpty]: Start isEmpty. Operand 111010 states and 475060 transitions. [2019-12-07 15:23:00,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 15:23:00,460 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:23:00,460 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:23:00,460 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:23:00,461 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:23:00,461 INFO L82 PathProgramCache]: Analyzing trace with hash -1753094800, now seen corresponding path program 1 times [2019-12-07 15:23:00,461 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:23:00,461 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [707998607] [2019-12-07 15:23:00,461 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:23:00,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:23:00,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:23:00,527 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [707998607] [2019-12-07 15:23:00,527 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:23:00,527 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:23:00,527 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1021959306] [2019-12-07 15:23:00,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:23:00,528 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:23:00,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:23:00,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:23:00,529 INFO L87 Difference]: Start difference. First operand 111010 states and 475060 transitions. Second operand 4 states. [2019-12-07 15:23:01,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:23:01,416 INFO L93 Difference]: Finished difference Result 172646 states and 710109 transitions. [2019-12-07 15:23:01,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:23:01,417 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 15:23:01,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:23:01,846 INFO L225 Difference]: With dead ends: 172646 [2019-12-07 15:23:01,846 INFO L226 Difference]: Without dead ends: 172548 [2019-12-07 15:23:01,847 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:23:09,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172548 states. [2019-12-07 15:23:12,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172548 to 158936. [2019-12-07 15:23:12,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158936 states. [2019-12-07 15:23:12,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158936 states to 158936 states and 661803 transitions. [2019-12-07 15:23:12,428 INFO L78 Accepts]: Start accepts. Automaton has 158936 states and 661803 transitions. Word has length 11 [2019-12-07 15:23:12,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:23:12,428 INFO L462 AbstractCegarLoop]: Abstraction has 158936 states and 661803 transitions. [2019-12-07 15:23:12,428 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:23:12,428 INFO L276 IsEmpty]: Start isEmpty. Operand 158936 states and 661803 transitions. [2019-12-07 15:23:12,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 15:23:12,433 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:23:12,433 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:23:12,433 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:23:12,433 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:23:12,433 INFO L82 PathProgramCache]: Analyzing trace with hash 216434073, now seen corresponding path program 1 times [2019-12-07 15:23:12,433 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:23:12,433 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [815434388] [2019-12-07 15:23:12,434 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:23:12,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:23:12,481 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:23:12,481 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [815434388] [2019-12-07 15:23:12,481 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:23:12,481 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:23:12,481 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1800712798] [2019-12-07 15:23:12,481 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:23:12,481 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:23:12,482 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:23:12,482 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:23:12,482 INFO L87 Difference]: Start difference. First operand 158936 states and 661803 transitions. Second operand 4 states. [2019-12-07 15:23:13,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:23:13,611 INFO L93 Difference]: Finished difference Result 228902 states and 931210 transitions. [2019-12-07 15:23:13,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:23:13,612 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 15:23:13,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:23:14,199 INFO L225 Difference]: With dead ends: 228902 [2019-12-07 15:23:14,199 INFO L226 Difference]: Without dead ends: 228790 [2019-12-07 15:23:14,200 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:23:21,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228790 states. [2019-12-07 15:23:25,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228790 to 192327. [2019-12-07 15:23:25,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192327 states. [2019-12-07 15:23:26,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192327 states to 192327 states and 796272 transitions. [2019-12-07 15:23:26,778 INFO L78 Accepts]: Start accepts. Automaton has 192327 states and 796272 transitions. Word has length 13 [2019-12-07 15:23:26,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:23:26,779 INFO L462 AbstractCegarLoop]: Abstraction has 192327 states and 796272 transitions. [2019-12-07 15:23:26,779 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:23:26,779 INFO L276 IsEmpty]: Start isEmpty. Operand 192327 states and 796272 transitions. [2019-12-07 15:23:26,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 15:23:26,786 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:23:26,786 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:23:26,787 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:23:26,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:23:26,787 INFO L82 PathProgramCache]: Analyzing trace with hash -1948590504, now seen corresponding path program 1 times [2019-12-07 15:23:26,787 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:23:26,787 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212593296] [2019-12-07 15:23:26,787 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:23:26,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:23:26,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:23:26,815 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1212593296] [2019-12-07 15:23:26,815 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:23:26,815 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:23:26,815 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1318262165] [2019-12-07 15:23:26,815 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:23:26,815 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:23:26,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:23:26,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:23:26,816 INFO L87 Difference]: Start difference. First operand 192327 states and 796272 transitions. Second operand 3 states. [2019-12-07 15:23:27,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:23:27,971 INFO L93 Difference]: Finished difference Result 280788 states and 1158875 transitions. [2019-12-07 15:23:27,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:23:27,972 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 15:23:27,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:23:28,704 INFO L225 Difference]: With dead ends: 280788 [2019-12-07 15:23:28,704 INFO L226 Difference]: Without dead ends: 280788 [2019-12-07 15:23:28,704 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:23:38,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280788 states. [2019-12-07 15:23:42,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280788 to 222888. [2019-12-07 15:23:42,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222888 states. [2019-12-07 15:23:42,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222888 states to 222888 states and 926633 transitions. [2019-12-07 15:23:42,796 INFO L78 Accepts]: Start accepts. Automaton has 222888 states and 926633 transitions. Word has length 16 [2019-12-07 15:23:42,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:23:42,796 INFO L462 AbstractCegarLoop]: Abstraction has 222888 states and 926633 transitions. [2019-12-07 15:23:42,796 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:23:42,796 INFO L276 IsEmpty]: Start isEmpty. Operand 222888 states and 926633 transitions. [2019-12-07 15:23:42,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 15:23:42,803 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:23:42,803 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:23:42,803 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:23:42,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:23:42,803 INFO L82 PathProgramCache]: Analyzing trace with hash -1821591471, now seen corresponding path program 1 times [2019-12-07 15:23:42,803 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:23:42,803 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1138171978] [2019-12-07 15:23:42,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:23:42,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:23:42,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:23:42,847 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1138171978] [2019-12-07 15:23:42,847 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:23:42,847 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:23:42,847 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [825336149] [2019-12-07 15:23:42,848 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:23:42,848 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:23:42,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:23:42,848 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:23:42,848 INFO L87 Difference]: Start difference. First operand 222888 states and 926633 transitions. Second operand 5 states. [2019-12-07 15:23:44,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:23:44,735 INFO L93 Difference]: Finished difference Result 298473 states and 1226263 transitions. [2019-12-07 15:23:44,735 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:23:44,735 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 15:23:44,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:23:45,515 INFO L225 Difference]: With dead ends: 298473 [2019-12-07 15:23:45,515 INFO L226 Difference]: Without dead ends: 298473 [2019-12-07 15:23:45,516 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:23:53,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298473 states. [2019-12-07 15:23:57,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298473 to 237826. [2019-12-07 15:23:57,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237826 states. [2019-12-07 15:23:57,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237826 states to 237826 states and 988542 transitions. [2019-12-07 15:23:57,815 INFO L78 Accepts]: Start accepts. Automaton has 237826 states and 988542 transitions. Word has length 16 [2019-12-07 15:23:57,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:23:57,816 INFO L462 AbstractCegarLoop]: Abstraction has 237826 states and 988542 transitions. [2019-12-07 15:23:57,816 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:23:57,816 INFO L276 IsEmpty]: Start isEmpty. Operand 237826 states and 988542 transitions. [2019-12-07 15:23:57,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:23:57,827 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:23:57,827 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:23:57,827 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:23:57,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:23:57,828 INFO L82 PathProgramCache]: Analyzing trace with hash -504931817, now seen corresponding path program 1 times [2019-12-07 15:23:57,828 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:23:57,828 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1483616018] [2019-12-07 15:23:57,828 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:23:57,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:23:57,873 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:23:57,873 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1483616018] [2019-12-07 15:23:57,873 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:23:57,873 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:23:57,874 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2057919811] [2019-12-07 15:23:57,874 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:23:57,874 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:23:57,874 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:23:57,874 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:23:57,874 INFO L87 Difference]: Start difference. First operand 237826 states and 988542 transitions. Second operand 3 states. [2019-12-07 15:23:59,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:23:59,347 INFO L93 Difference]: Finished difference Result 237826 states and 978678 transitions. [2019-12-07 15:23:59,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:23:59,348 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:23:59,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:23:59,953 INFO L225 Difference]: With dead ends: 237826 [2019-12-07 15:23:59,954 INFO L226 Difference]: Without dead ends: 237826 [2019-12-07 15:23:59,954 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:24:06,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237826 states. [2019-12-07 15:24:12,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237826 to 234480. [2019-12-07 15:24:12,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234480 states. [2019-12-07 15:24:13,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234480 states to 234480 states and 966258 transitions. [2019-12-07 15:24:13,460 INFO L78 Accepts]: Start accepts. Automaton has 234480 states and 966258 transitions. Word has length 18 [2019-12-07 15:24:13,460 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:13,461 INFO L462 AbstractCegarLoop]: Abstraction has 234480 states and 966258 transitions. [2019-12-07 15:24:13,461 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:24:13,461 INFO L276 IsEmpty]: Start isEmpty. Operand 234480 states and 966258 transitions. [2019-12-07 15:24:13,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:24:13,471 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:13,471 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:13,471 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:13,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:13,472 INFO L82 PathProgramCache]: Analyzing trace with hash 138207619, now seen corresponding path program 1 times [2019-12-07 15:24:13,472 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:13,472 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1475646213] [2019-12-07 15:24:13,472 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:13,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:13,512 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:13,512 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1475646213] [2019-12-07 15:24:13,512 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:13,512 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:24:13,513 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [383622118] [2019-12-07 15:24:13,513 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:24:13,513 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:13,513 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:24:13,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:24:13,513 INFO L87 Difference]: Start difference. First operand 234480 states and 966258 transitions. Second operand 3 states. [2019-12-07 15:24:13,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:13,639 INFO L93 Difference]: Finished difference Result 42613 states and 138837 transitions. [2019-12-07 15:24:13,640 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:24:13,640 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:24:13,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:13,699 INFO L225 Difference]: With dead ends: 42613 [2019-12-07 15:24:13,699 INFO L226 Difference]: Without dead ends: 42613 [2019-12-07 15:24:13,700 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:24:14,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42613 states. [2019-12-07 15:24:14,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42613 to 42613. [2019-12-07 15:24:14,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42613 states. [2019-12-07 15:24:14,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42613 states to 42613 states and 138837 transitions. [2019-12-07 15:24:14,745 INFO L78 Accepts]: Start accepts. Automaton has 42613 states and 138837 transitions. Word has length 18 [2019-12-07 15:24:14,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:14,745 INFO L462 AbstractCegarLoop]: Abstraction has 42613 states and 138837 transitions. [2019-12-07 15:24:14,745 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:24:14,745 INFO L276 IsEmpty]: Start isEmpty. Operand 42613 states and 138837 transitions. [2019-12-07 15:24:14,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:24:14,751 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:14,751 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:14,751 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:14,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:14,752 INFO L82 PathProgramCache]: Analyzing trace with hash -187432510, now seen corresponding path program 1 times [2019-12-07 15:24:14,752 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:14,752 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [681594329] [2019-12-07 15:24:14,752 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:14,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:14,799 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:14,799 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [681594329] [2019-12-07 15:24:14,799 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:14,799 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:24:14,799 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [977277969] [2019-12-07 15:24:14,800 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:24:14,800 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:14,800 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:24:14,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:24:14,800 INFO L87 Difference]: Start difference. First operand 42613 states and 138837 transitions. Second operand 6 states. [2019-12-07 15:24:15,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:15,348 INFO L93 Difference]: Finished difference Result 65056 states and 205947 transitions. [2019-12-07 15:24:15,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 15:24:15,348 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 15:24:15,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:15,442 INFO L225 Difference]: With dead ends: 65056 [2019-12-07 15:24:15,442 INFO L226 Difference]: Without dead ends: 65042 [2019-12-07 15:24:15,443 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 15:24:15,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65042 states. [2019-12-07 15:24:16,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65042 to 42278. [2019-12-07 15:24:16,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42278 states. [2019-12-07 15:24:16,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42278 states to 42278 states and 137592 transitions. [2019-12-07 15:24:16,314 INFO L78 Accepts]: Start accepts. Automaton has 42278 states and 137592 transitions. Word has length 22 [2019-12-07 15:24:16,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:16,314 INFO L462 AbstractCegarLoop]: Abstraction has 42278 states and 137592 transitions. [2019-12-07 15:24:16,314 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:24:16,314 INFO L276 IsEmpty]: Start isEmpty. Operand 42278 states and 137592 transitions. [2019-12-07 15:24:16,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 15:24:16,323 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:16,324 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:16,324 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:16,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:16,324 INFO L82 PathProgramCache]: Analyzing trace with hash -200714255, now seen corresponding path program 1 times [2019-12-07 15:24:16,324 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:16,324 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [809105735] [2019-12-07 15:24:16,324 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:16,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:16,373 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:16,373 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [809105735] [2019-12-07 15:24:16,373 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:16,373 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:24:16,373 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [677880683] [2019-12-07 15:24:16,374 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:24:16,374 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:16,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:24:16,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:24:16,374 INFO L87 Difference]: Start difference. First operand 42278 states and 137592 transitions. Second operand 5 states. [2019-12-07 15:24:17,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:17,147 INFO L93 Difference]: Finished difference Result 59726 states and 189950 transitions. [2019-12-07 15:24:17,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:24:17,148 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 15:24:17,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:17,230 INFO L225 Difference]: With dead ends: 59726 [2019-12-07 15:24:17,231 INFO L226 Difference]: Without dead ends: 59700 [2019-12-07 15:24:17,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:24:17,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59700 states. [2019-12-07 15:24:18,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59700 to 50129. [2019-12-07 15:24:18,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50129 states. [2019-12-07 15:24:18,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50129 states to 50129 states and 162181 transitions. [2019-12-07 15:24:18,139 INFO L78 Accepts]: Start accepts. Automaton has 50129 states and 162181 transitions. Word has length 25 [2019-12-07 15:24:18,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:18,139 INFO L462 AbstractCegarLoop]: Abstraction has 50129 states and 162181 transitions. [2019-12-07 15:24:18,139 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:24:18,139 INFO L276 IsEmpty]: Start isEmpty. Operand 50129 states and 162181 transitions. [2019-12-07 15:24:18,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:24:18,154 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:18,155 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:18,155 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:18,155 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:18,155 INFO L82 PathProgramCache]: Analyzing trace with hash 611460705, now seen corresponding path program 1 times [2019-12-07 15:24:18,155 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:18,155 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682750554] [2019-12-07 15:24:18,155 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:18,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:18,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:18,205 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [682750554] [2019-12-07 15:24:18,206 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:18,206 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:24:18,206 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1862896806] [2019-12-07 15:24:18,206 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:24:18,206 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:18,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:24:18,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:24:18,207 INFO L87 Difference]: Start difference. First operand 50129 states and 162181 transitions. Second operand 6 states. [2019-12-07 15:24:18,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:18,725 INFO L93 Difference]: Finished difference Result 71592 states and 224983 transitions. [2019-12-07 15:24:18,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 15:24:18,726 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 15:24:18,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:18,829 INFO L225 Difference]: With dead ends: 71592 [2019-12-07 15:24:18,829 INFO L226 Difference]: Without dead ends: 71508 [2019-12-07 15:24:18,829 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:24:19,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71508 states. [2019-12-07 15:24:19,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71508 to 53724. [2019-12-07 15:24:19,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53724 states. [2019-12-07 15:24:19,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53724 states to 53724 states and 172706 transitions. [2019-12-07 15:24:19,941 INFO L78 Accepts]: Start accepts. Automaton has 53724 states and 172706 transitions. Word has length 27 [2019-12-07 15:24:19,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:19,942 INFO L462 AbstractCegarLoop]: Abstraction has 53724 states and 172706 transitions. [2019-12-07 15:24:19,942 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:24:19,942 INFO L276 IsEmpty]: Start isEmpty. Operand 53724 states and 172706 transitions. [2019-12-07 15:24:19,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 15:24:19,961 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:19,961 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:19,961 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:19,962 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:19,962 INFO L82 PathProgramCache]: Analyzing trace with hash -969078927, now seen corresponding path program 1 times [2019-12-07 15:24:19,962 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:19,962 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2033087876] [2019-12-07 15:24:19,962 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:19,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:19,994 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:19,994 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2033087876] [2019-12-07 15:24:19,994 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:19,994 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:24:19,994 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1934363081] [2019-12-07 15:24:19,995 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:24:19,995 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:19,995 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:24:19,995 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:24:19,995 INFO L87 Difference]: Start difference. First operand 53724 states and 172706 transitions. Second operand 4 states. [2019-12-07 15:24:20,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:20,056 INFO L93 Difference]: Finished difference Result 20754 states and 64022 transitions. [2019-12-07 15:24:20,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:24:20,057 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 15:24:20,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:20,080 INFO L225 Difference]: With dead ends: 20754 [2019-12-07 15:24:20,080 INFO L226 Difference]: Without dead ends: 20754 [2019-12-07 15:24:20,081 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:24:20,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20754 states. [2019-12-07 15:24:20,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20754 to 19543. [2019-12-07 15:24:20,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19543 states. [2019-12-07 15:24:20,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19543 states to 19543 states and 60338 transitions. [2019-12-07 15:24:20,375 INFO L78 Accepts]: Start accepts. Automaton has 19543 states and 60338 transitions. Word has length 29 [2019-12-07 15:24:20,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:20,375 INFO L462 AbstractCegarLoop]: Abstraction has 19543 states and 60338 transitions. [2019-12-07 15:24:20,375 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:24:20,375 INFO L276 IsEmpty]: Start isEmpty. Operand 19543 states and 60338 transitions. [2019-12-07 15:24:20,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:24:20,393 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:20,394 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:20,394 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:20,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:20,394 INFO L82 PathProgramCache]: Analyzing trace with hash -1170391984, now seen corresponding path program 1 times [2019-12-07 15:24:20,394 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:20,394 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1692446860] [2019-12-07 15:24:20,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:20,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:20,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:20,447 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1692446860] [2019-12-07 15:24:20,447 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:20,448 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:24:20,448 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1767678418] [2019-12-07 15:24:20,448 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:24:20,448 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:20,448 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:24:20,448 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:24:20,448 INFO L87 Difference]: Start difference. First operand 19543 states and 60338 transitions. Second operand 7 states. [2019-12-07 15:24:21,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:21,185 INFO L93 Difference]: Finished difference Result 27225 states and 81337 transitions. [2019-12-07 15:24:21,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:24:21,185 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 15:24:21,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:21,216 INFO L225 Difference]: With dead ends: 27225 [2019-12-07 15:24:21,216 INFO L226 Difference]: Without dead ends: 27225 [2019-12-07 15:24:21,217 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:24:21,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27225 states. [2019-12-07 15:24:21,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27225 to 19532. [2019-12-07 15:24:21,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19532 states. [2019-12-07 15:24:21,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19532 states to 19532 states and 60108 transitions. [2019-12-07 15:24:21,562 INFO L78 Accepts]: Start accepts. Automaton has 19532 states and 60108 transitions. Word has length 33 [2019-12-07 15:24:21,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:21,563 INFO L462 AbstractCegarLoop]: Abstraction has 19532 states and 60108 transitions. [2019-12-07 15:24:21,563 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:24:21,563 INFO L276 IsEmpty]: Start isEmpty. Operand 19532 states and 60108 transitions. [2019-12-07 15:24:21,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 15:24:21,579 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:21,579 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:21,579 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:21,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:21,579 INFO L82 PathProgramCache]: Analyzing trace with hash 1293540528, now seen corresponding path program 1 times [2019-12-07 15:24:21,579 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:21,580 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373374933] [2019-12-07 15:24:21,580 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:21,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:21,632 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:21,632 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373374933] [2019-12-07 15:24:21,632 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:21,632 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:24:21,633 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [680422296] [2019-12-07 15:24:21,633 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:24:21,633 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:21,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:24:21,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:24:21,633 INFO L87 Difference]: Start difference. First operand 19532 states and 60108 transitions. Second operand 3 states. [2019-12-07 15:24:21,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:21,691 INFO L93 Difference]: Finished difference Result 18664 states and 56622 transitions. [2019-12-07 15:24:21,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:24:21,691 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 15:24:21,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:21,712 INFO L225 Difference]: With dead ends: 18664 [2019-12-07 15:24:21,713 INFO L226 Difference]: Without dead ends: 18664 [2019-12-07 15:24:21,713 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:24:21,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18664 states. [2019-12-07 15:24:21,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18664 to 18390. [2019-12-07 15:24:21,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18390 states. [2019-12-07 15:24:21,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18390 states to 18390 states and 55854 transitions. [2019-12-07 15:24:21,980 INFO L78 Accepts]: Start accepts. Automaton has 18390 states and 55854 transitions. Word has length 40 [2019-12-07 15:24:21,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:21,980 INFO L462 AbstractCegarLoop]: Abstraction has 18390 states and 55854 transitions. [2019-12-07 15:24:21,981 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:24:21,981 INFO L276 IsEmpty]: Start isEmpty. Operand 18390 states and 55854 transitions. [2019-12-07 15:24:21,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 15:24:21,995 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:21,995 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:21,995 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:21,995 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:21,996 INFO L82 PathProgramCache]: Analyzing trace with hash -448595313, now seen corresponding path program 1 times [2019-12-07 15:24:21,996 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:21,996 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [777886727] [2019-12-07 15:24:21,996 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:22,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:22,033 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:22,034 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [777886727] [2019-12-07 15:24:22,034 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:22,034 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:24:22,034 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1178642500] [2019-12-07 15:24:22,034 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:24:22,035 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:22,035 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:24:22,035 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:24:22,035 INFO L87 Difference]: Start difference. First operand 18390 states and 55854 transitions. Second operand 5 states. [2019-12-07 15:24:22,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:22,092 INFO L93 Difference]: Finished difference Result 16867 states and 52454 transitions. [2019-12-07 15:24:22,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:24:22,093 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 15:24:22,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:22,111 INFO L225 Difference]: With dead ends: 16867 [2019-12-07 15:24:22,111 INFO L226 Difference]: Without dead ends: 16867 [2019-12-07 15:24:22,112 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:24:22,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16867 states. [2019-12-07 15:24:22,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16867 to 15238. [2019-12-07 15:24:22,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15238 states. [2019-12-07 15:24:22,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15238 states to 15238 states and 47616 transitions. [2019-12-07 15:24:22,368 INFO L78 Accepts]: Start accepts. Automaton has 15238 states and 47616 transitions. Word has length 41 [2019-12-07 15:24:22,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:22,368 INFO L462 AbstractCegarLoop]: Abstraction has 15238 states and 47616 transitions. [2019-12-07 15:24:22,368 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:24:22,368 INFO L276 IsEmpty]: Start isEmpty. Operand 15238 states and 47616 transitions. [2019-12-07 15:24:22,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:24:22,381 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:22,381 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:22,381 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:22,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:22,382 INFO L82 PathProgramCache]: Analyzing trace with hash 1623524162, now seen corresponding path program 1 times [2019-12-07 15:24:22,382 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:22,382 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [239587314] [2019-12-07 15:24:22,382 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:22,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:22,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:22,419 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [239587314] [2019-12-07 15:24:22,419 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:22,419 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:24:22,419 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [101840822] [2019-12-07 15:24:22,419 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:24:22,420 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:22,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:24:22,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:24:22,420 INFO L87 Difference]: Start difference. First operand 15238 states and 47616 transitions. Second operand 3 states. [2019-12-07 15:24:22,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:22,512 INFO L93 Difference]: Finished difference Result 18380 states and 57153 transitions. [2019-12-07 15:24:22,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:24:22,512 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 15:24:22,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:22,533 INFO L225 Difference]: With dead ends: 18380 [2019-12-07 15:24:22,533 INFO L226 Difference]: Without dead ends: 18380 [2019-12-07 15:24:22,534 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:24:22,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18380 states. [2019-12-07 15:24:22,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18380 to 15494. [2019-12-07 15:24:22,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15494 states. [2019-12-07 15:24:22,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15494 states to 15494 states and 48492 transitions. [2019-12-07 15:24:22,796 INFO L78 Accepts]: Start accepts. Automaton has 15494 states and 48492 transitions. Word has length 66 [2019-12-07 15:24:22,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:22,797 INFO L462 AbstractCegarLoop]: Abstraction has 15494 states and 48492 transitions. [2019-12-07 15:24:22,797 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:24:22,797 INFO L276 IsEmpty]: Start isEmpty. Operand 15494 states and 48492 transitions. [2019-12-07 15:24:22,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:24:22,815 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:22,816 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:22,816 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:22,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:22,816 INFO L82 PathProgramCache]: Analyzing trace with hash 600429612, now seen corresponding path program 1 times [2019-12-07 15:24:22,816 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:22,816 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1625062339] [2019-12-07 15:24:22,816 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:22,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:22,866 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:22,867 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1625062339] [2019-12-07 15:24:22,867 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:22,867 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:24:22,867 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1304558381] [2019-12-07 15:24:22,867 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:24:22,867 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:22,867 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:24:22,867 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:24:22,867 INFO L87 Difference]: Start difference. First operand 15494 states and 48492 transitions. Second operand 4 states. [2019-12-07 15:24:22,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:22,973 INFO L93 Difference]: Finished difference Result 18353 states and 57063 transitions. [2019-12-07 15:24:22,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:24:22,974 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 15:24:22,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:22,994 INFO L225 Difference]: With dead ends: 18353 [2019-12-07 15:24:22,994 INFO L226 Difference]: Without dead ends: 18353 [2019-12-07 15:24:22,994 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:24:23,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18353 states. [2019-12-07 15:24:23,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18353 to 15150. [2019-12-07 15:24:23,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15150 states. [2019-12-07 15:24:23,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15150 states to 15150 states and 47431 transitions. [2019-12-07 15:24:23,250 INFO L78 Accepts]: Start accepts. Automaton has 15150 states and 47431 transitions. Word has length 67 [2019-12-07 15:24:23,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:23,250 INFO L462 AbstractCegarLoop]: Abstraction has 15150 states and 47431 transitions. [2019-12-07 15:24:23,250 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:24:23,250 INFO L276 IsEmpty]: Start isEmpty. Operand 15150 states and 47431 transitions. [2019-12-07 15:24:23,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:24:23,263 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:23,263 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:23,264 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:23,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:23,264 INFO L82 PathProgramCache]: Analyzing trace with hash 384042528, now seen corresponding path program 1 times [2019-12-07 15:24:23,264 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:23,264 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1210378079] [2019-12-07 15:24:23,264 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:23,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:23,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:23,383 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1210378079] [2019-12-07 15:24:23,383 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:23,383 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:24:23,383 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [490756985] [2019-12-07 15:24:23,383 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 15:24:23,384 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:23,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 15:24:23,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:24:23,384 INFO L87 Difference]: Start difference. First operand 15150 states and 47431 transitions. Second operand 10 states. [2019-12-07 15:24:24,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:24,552 INFO L93 Difference]: Finished difference Result 35073 states and 109582 transitions. [2019-12-07 15:24:24,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 15:24:24,553 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 15:24:24,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:24,579 INFO L225 Difference]: With dead ends: 35073 [2019-12-07 15:24:24,579 INFO L226 Difference]: Without dead ends: 24437 [2019-12-07 15:24:24,580 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 121 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=140, Invalid=562, Unknown=0, NotChecked=0, Total=702 [2019-12-07 15:24:24,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24437 states. [2019-12-07 15:24:24,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24437 to 18082. [2019-12-07 15:24:24,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18082 states. [2019-12-07 15:24:24,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18082 states to 18082 states and 56427 transitions. [2019-12-07 15:24:24,899 INFO L78 Accepts]: Start accepts. Automaton has 18082 states and 56427 transitions. Word has length 67 [2019-12-07 15:24:24,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:24,900 INFO L462 AbstractCegarLoop]: Abstraction has 18082 states and 56427 transitions. [2019-12-07 15:24:24,900 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 15:24:24,900 INFO L276 IsEmpty]: Start isEmpty. Operand 18082 states and 56427 transitions. [2019-12-07 15:24:24,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:24:24,915 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:24,915 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:24,915 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:24,915 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:24,915 INFO L82 PathProgramCache]: Analyzing trace with hash 1908292690, now seen corresponding path program 2 times [2019-12-07 15:24:24,915 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:24,915 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1877749212] [2019-12-07 15:24:24,916 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:24,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:25,260 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:25,260 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1877749212] [2019-12-07 15:24:25,260 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:25,261 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 15:24:25,261 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1525967969] [2019-12-07 15:24:25,261 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 15:24:25,261 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:25,261 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 15:24:25,261 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=234, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:24:25,262 INFO L87 Difference]: Start difference. First operand 18082 states and 56427 transitions. Second operand 17 states. [2019-12-07 15:24:27,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:27,874 INFO L93 Difference]: Finished difference Result 23064 states and 70808 transitions. [2019-12-07 15:24:27,875 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 15:24:27,875 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 15:24:27,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:27,909 INFO L225 Difference]: With dead ends: 23064 [2019-12-07 15:24:27,909 INFO L226 Difference]: Without dead ends: 18977 [2019-12-07 15:24:27,910 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=118, Invalid=694, Unknown=0, NotChecked=0, Total=812 [2019-12-07 15:24:27,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18977 states. [2019-12-07 15:24:28,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18977 to 17898. [2019-12-07 15:24:28,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17898 states. [2019-12-07 15:24:28,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17898 states to 17898 states and 55688 transitions. [2019-12-07 15:24:28,181 INFO L78 Accepts]: Start accepts. Automaton has 17898 states and 55688 transitions. Word has length 67 [2019-12-07 15:24:28,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:28,181 INFO L462 AbstractCegarLoop]: Abstraction has 17898 states and 55688 transitions. [2019-12-07 15:24:28,181 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 15:24:28,181 INFO L276 IsEmpty]: Start isEmpty. Operand 17898 states and 55688 transitions. [2019-12-07 15:24:28,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:24:28,197 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:28,197 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:28,197 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:28,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:28,197 INFO L82 PathProgramCache]: Analyzing trace with hash 1073573524, now seen corresponding path program 3 times [2019-12-07 15:24:28,197 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:28,197 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2029428574] [2019-12-07 15:24:28,197 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:28,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:28,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:28,305 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2029428574] [2019-12-07 15:24:28,305 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:28,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:24:28,305 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1252244549] [2019-12-07 15:24:28,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 15:24:28,305 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:28,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 15:24:28,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:24:28,306 INFO L87 Difference]: Start difference. First operand 17898 states and 55688 transitions. Second operand 10 states. [2019-12-07 15:24:30,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:30,153 INFO L93 Difference]: Finished difference Result 30600 states and 94633 transitions. [2019-12-07 15:24:30,154 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 15:24:30,154 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 15:24:30,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:30,192 INFO L225 Difference]: With dead ends: 30600 [2019-12-07 15:24:30,192 INFO L226 Difference]: Without dead ends: 26025 [2019-12-07 15:24:30,192 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=241, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:24:30,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26025 states. [2019-12-07 15:24:30,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26025 to 18290. [2019-12-07 15:24:30,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18290 states. [2019-12-07 15:24:30,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18290 states to 18290 states and 56760 transitions. [2019-12-07 15:24:30,523 INFO L78 Accepts]: Start accepts. Automaton has 18290 states and 56760 transitions. Word has length 67 [2019-12-07 15:24:30,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:30,524 INFO L462 AbstractCegarLoop]: Abstraction has 18290 states and 56760 transitions. [2019-12-07 15:24:30,524 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 15:24:30,524 INFO L276 IsEmpty]: Start isEmpty. Operand 18290 states and 56760 transitions. [2019-12-07 15:24:30,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:24:30,539 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:30,539 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:30,539 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:30,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:30,540 INFO L82 PathProgramCache]: Analyzing trace with hash 993635084, now seen corresponding path program 4 times [2019-12-07 15:24:30,540 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:30,540 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1022023971] [2019-12-07 15:24:30,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:30,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:30,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:30,669 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1022023971] [2019-12-07 15:24:30,669 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:30,669 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 15:24:30,670 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [937199479] [2019-12-07 15:24:30,670 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 15:24:30,670 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:30,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 15:24:30,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:24:30,670 INFO L87 Difference]: Start difference. First operand 18290 states and 56760 transitions. Second operand 11 states. [2019-12-07 15:24:31,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:31,654 INFO L93 Difference]: Finished difference Result 28644 states and 88548 transitions. [2019-12-07 15:24:31,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 15:24:31,654 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 15:24:31,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:31,681 INFO L225 Difference]: With dead ends: 28644 [2019-12-07 15:24:31,681 INFO L226 Difference]: Without dead ends: 25165 [2019-12-07 15:24:31,681 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=341, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:24:31,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25165 states. [2019-12-07 15:24:31,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25165 to 17874. [2019-12-07 15:24:31,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17874 states. [2019-12-07 15:24:31,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17874 states to 17874 states and 55488 transitions. [2019-12-07 15:24:31,988 INFO L78 Accepts]: Start accepts. Automaton has 17874 states and 55488 transitions. Word has length 67 [2019-12-07 15:24:31,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:31,988 INFO L462 AbstractCegarLoop]: Abstraction has 17874 states and 55488 transitions. [2019-12-07 15:24:31,988 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 15:24:31,988 INFO L276 IsEmpty]: Start isEmpty. Operand 17874 states and 55488 transitions. [2019-12-07 15:24:32,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:24:32,003 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:32,003 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:32,003 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:32,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:32,003 INFO L82 PathProgramCache]: Analyzing trace with hash 397917466, now seen corresponding path program 5 times [2019-12-07 15:24:32,003 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:32,004 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [561598774] [2019-12-07 15:24:32,004 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:32,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:33,072 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:33,073 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [561598774] [2019-12-07 15:24:33,073 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:33,073 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2019-12-07 15:24:33,073 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1265295910] [2019-12-07 15:24:33,073 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2019-12-07 15:24:33,073 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:33,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2019-12-07 15:24:33,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=444, Unknown=0, NotChecked=0, Total=506 [2019-12-07 15:24:33,074 INFO L87 Difference]: Start difference. First operand 17874 states and 55488 transitions. Second operand 23 states. [2019-12-07 15:24:39,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:39,154 INFO L93 Difference]: Finished difference Result 23916 states and 72568 transitions. [2019-12-07 15:24:39,154 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2019-12-07 15:24:39,155 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 67 [2019-12-07 15:24:39,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:39,177 INFO L225 Difference]: With dead ends: 23916 [2019-12-07 15:24:39,177 INFO L226 Difference]: Without dead ends: 21924 [2019-12-07 15:24:39,179 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 3 SyntacticMatches, 7 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 908 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=541, Invalid=3491, Unknown=0, NotChecked=0, Total=4032 [2019-12-07 15:24:39,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21924 states. [2019-12-07 15:24:39,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21924 to 20348. [2019-12-07 15:24:39,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20348 states. [2019-12-07 15:24:39,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20348 states to 20348 states and 62649 transitions. [2019-12-07 15:24:39,501 INFO L78 Accepts]: Start accepts. Automaton has 20348 states and 62649 transitions. Word has length 67 [2019-12-07 15:24:39,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:39,501 INFO L462 AbstractCegarLoop]: Abstraction has 20348 states and 62649 transitions. [2019-12-07 15:24:39,501 INFO L463 AbstractCegarLoop]: Interpolant automaton has 23 states. [2019-12-07 15:24:39,501 INFO L276 IsEmpty]: Start isEmpty. Operand 20348 states and 62649 transitions. [2019-12-07 15:24:39,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:24:39,519 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:39,519 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:39,519 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:39,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:39,519 INFO L82 PathProgramCache]: Analyzing trace with hash 68355254, now seen corresponding path program 6 times [2019-12-07 15:24:39,519 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:39,520 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1116854163] [2019-12-07 15:24:39,520 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:39,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:39,629 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:39,630 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1116854163] [2019-12-07 15:24:39,630 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:39,630 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 15:24:39,630 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [966167669] [2019-12-07 15:24:39,630 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 15:24:39,630 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:39,630 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 15:24:39,631 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:24:39,631 INFO L87 Difference]: Start difference. First operand 20348 states and 62649 transitions. Second operand 11 states. [2019-12-07 15:24:40,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:40,500 INFO L93 Difference]: Finished difference Result 27887 states and 84982 transitions. [2019-12-07 15:24:40,500 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 15:24:40,500 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 15:24:40,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:40,529 INFO L225 Difference]: With dead ends: 27887 [2019-12-07 15:24:40,529 INFO L226 Difference]: Without dead ends: 24640 [2019-12-07 15:24:40,529 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=92, Invalid=414, Unknown=0, NotChecked=0, Total=506 [2019-12-07 15:24:40,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24640 states. [2019-12-07 15:24:40,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24640 to 20546. [2019-12-07 15:24:40,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20546 states. [2019-12-07 15:24:40,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20546 states to 20546 states and 63158 transitions. [2019-12-07 15:24:40,860 INFO L78 Accepts]: Start accepts. Automaton has 20546 states and 63158 transitions. Word has length 67 [2019-12-07 15:24:40,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:40,860 INFO L462 AbstractCegarLoop]: Abstraction has 20546 states and 63158 transitions. [2019-12-07 15:24:40,860 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 15:24:40,860 INFO L276 IsEmpty]: Start isEmpty. Operand 20546 states and 63158 transitions. [2019-12-07 15:24:40,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:24:40,876 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:40,877 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:40,877 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:40,877 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:40,877 INFO L82 PathProgramCache]: Analyzing trace with hash 1803113718, now seen corresponding path program 7 times [2019-12-07 15:24:40,877 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:40,877 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1365694211] [2019-12-07 15:24:40,877 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:40,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:41,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:41,013 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1365694211] [2019-12-07 15:24:41,013 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:41,014 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 15:24:41,014 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584102648] [2019-12-07 15:24:41,014 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 15:24:41,014 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:41,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 15:24:41,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 15:24:41,014 INFO L87 Difference]: Start difference. First operand 20546 states and 63158 transitions. Second operand 12 states. [2019-12-07 15:24:41,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:41,924 INFO L93 Difference]: Finished difference Result 26283 states and 79967 transitions. [2019-12-07 15:24:41,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 15:24:41,925 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 15:24:41,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:41,953 INFO L225 Difference]: With dead ends: 26283 [2019-12-07 15:24:41,953 INFO L226 Difference]: Without dead ends: 25068 [2019-12-07 15:24:41,954 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=378, Unknown=0, NotChecked=0, Total=462 [2019-12-07 15:24:42,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25068 states. [2019-12-07 15:24:42,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25068 to 20408. [2019-12-07 15:24:42,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20408 states. [2019-12-07 15:24:42,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20408 states to 20408 states and 62794 transitions. [2019-12-07 15:24:42,290 INFO L78 Accepts]: Start accepts. Automaton has 20408 states and 62794 transitions. Word has length 67 [2019-12-07 15:24:42,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:42,290 INFO L462 AbstractCegarLoop]: Abstraction has 20408 states and 62794 transitions. [2019-12-07 15:24:42,290 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 15:24:42,291 INFO L276 IsEmpty]: Start isEmpty. Operand 20408 states and 62794 transitions. [2019-12-07 15:24:42,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:24:42,308 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:42,308 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:42,308 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:42,308 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:42,308 INFO L82 PathProgramCache]: Analyzing trace with hash 1857250972, now seen corresponding path program 8 times [2019-12-07 15:24:42,308 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:42,308 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1967795330] [2019-12-07 15:24:42,309 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:42,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:42,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:42,668 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1967795330] [2019-12-07 15:24:42,668 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:42,668 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:24:42,668 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1833990930] [2019-12-07 15:24:42,669 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:24:42,669 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:42,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:24:42,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=292, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:24:42,669 INFO L87 Difference]: Start difference. First operand 20408 states and 62794 transitions. Second operand 19 states. [2019-12-07 15:24:47,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:47,617 INFO L93 Difference]: Finished difference Result 27906 states and 85734 transitions. [2019-12-07 15:24:47,618 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2019-12-07 15:24:47,618 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2019-12-07 15:24:47,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:47,665 INFO L225 Difference]: With dead ends: 27906 [2019-12-07 15:24:47,665 INFO L226 Difference]: Without dead ends: 26911 [2019-12-07 15:24:47,667 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1018 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=558, Invalid=3732, Unknown=0, NotChecked=0, Total=4290 [2019-12-07 15:24:47,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26911 states. [2019-12-07 15:24:47,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26911 to 22383. [2019-12-07 15:24:47,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22383 states. [2019-12-07 15:24:48,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22383 states to 22383 states and 68973 transitions. [2019-12-07 15:24:48,023 INFO L78 Accepts]: Start accepts. Automaton has 22383 states and 68973 transitions. Word has length 67 [2019-12-07 15:24:48,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:48,023 INFO L462 AbstractCegarLoop]: Abstraction has 22383 states and 68973 transitions. [2019-12-07 15:24:48,023 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:24:48,023 INFO L276 IsEmpty]: Start isEmpty. Operand 22383 states and 68973 transitions. [2019-12-07 15:24:48,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:24:48,042 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:48,042 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:48,042 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:48,042 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:48,043 INFO L82 PathProgramCache]: Analyzing trace with hash 2040469818, now seen corresponding path program 9 times [2019-12-07 15:24:48,043 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:48,043 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2112686399] [2019-12-07 15:24:48,043 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:48,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:48,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:48,656 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2112686399] [2019-12-07 15:24:48,656 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:48,656 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 15:24:48,656 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [797697377] [2019-12-07 15:24:48,656 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 15:24:48,657 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:48,657 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 15:24:48,657 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=364, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:24:48,657 INFO L87 Difference]: Start difference. First operand 22383 states and 68973 transitions. Second operand 21 states. [2019-12-07 15:24:54,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:24:54,088 INFO L93 Difference]: Finished difference Result 28006 states and 84977 transitions. [2019-12-07 15:24:54,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 75 states. [2019-12-07 15:24:54,089 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 67 [2019-12-07 15:24:54,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:24:54,125 INFO L225 Difference]: With dead ends: 28006 [2019-12-07 15:24:54,125 INFO L226 Difference]: Without dead ends: 26120 [2019-12-07 15:24:54,127 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1496 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=700, Invalid=5306, Unknown=0, NotChecked=0, Total=6006 [2019-12-07 15:24:54,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26120 states. [2019-12-07 15:24:54,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26120 to 22828. [2019-12-07 15:24:54,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22828 states. [2019-12-07 15:24:54,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22828 states to 22828 states and 69920 transitions. [2019-12-07 15:24:54,477 INFO L78 Accepts]: Start accepts. Automaton has 22828 states and 69920 transitions. Word has length 67 [2019-12-07 15:24:54,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:24:54,477 INFO L462 AbstractCegarLoop]: Abstraction has 22828 states and 69920 transitions. [2019-12-07 15:24:54,477 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 15:24:54,477 INFO L276 IsEmpty]: Start isEmpty. Operand 22828 states and 69920 transitions. [2019-12-07 15:24:54,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:24:54,496 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:24:54,496 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:24:54,497 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:24:54,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:24:54,497 INFO L82 PathProgramCache]: Analyzing trace with hash -1956516202, now seen corresponding path program 10 times [2019-12-07 15:24:54,497 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:24:54,497 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [171893423] [2019-12-07 15:24:54,497 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:24:54,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:24:54,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:24:54,962 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [171893423] [2019-12-07 15:24:54,963 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:24:54,963 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:24:54,963 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1021070666] [2019-12-07 15:24:54,963 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:24:54,963 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:24:54,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:24:54,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=289, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:24:54,963 INFO L87 Difference]: Start difference. First operand 22828 states and 69920 transitions. Second operand 19 states. [2019-12-07 15:25:04,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:04,180 INFO L93 Difference]: Finished difference Result 28219 states and 85138 transitions. [2019-12-07 15:25:04,180 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2019-12-07 15:25:04,180 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2019-12-07 15:25:04,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:04,209 INFO L225 Difference]: With dead ends: 28219 [2019-12-07 15:25:04,209 INFO L226 Difference]: Without dead ends: 25563 [2019-12-07 15:25:04,211 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 802 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=537, Invalid=3123, Unknown=0, NotChecked=0, Total=3660 [2019-12-07 15:25:04,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25563 states. [2019-12-07 15:25:04,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25563 to 21568. [2019-12-07 15:25:04,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21568 states. [2019-12-07 15:25:04,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21568 states to 21568 states and 65972 transitions. [2019-12-07 15:25:04,548 INFO L78 Accepts]: Start accepts. Automaton has 21568 states and 65972 transitions. Word has length 67 [2019-12-07 15:25:04,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:25:04,548 INFO L462 AbstractCegarLoop]: Abstraction has 21568 states and 65972 transitions. [2019-12-07 15:25:04,548 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:25:04,548 INFO L276 IsEmpty]: Start isEmpty. Operand 21568 states and 65972 transitions. [2019-12-07 15:25:04,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:25:04,566 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:25:04,566 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:25:04,566 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:25:04,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:25:04,566 INFO L82 PathProgramCache]: Analyzing trace with hash 1575321640, now seen corresponding path program 11 times [2019-12-07 15:25:04,567 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:25:04,567 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1680125538] [2019-12-07 15:25:04,567 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:25:04,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:25:05,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:25:05,138 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1680125538] [2019-12-07 15:25:05,138 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:25:05,138 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 15:25:05,138 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1176876077] [2019-12-07 15:25:05,138 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 15:25:05,138 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:25:05,138 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 15:25:05,139 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=360, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:25:05,139 INFO L87 Difference]: Start difference. First operand 21568 states and 65972 transitions. Second operand 21 states. [2019-12-07 15:25:10,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:10,191 INFO L93 Difference]: Finished difference Result 26311 states and 79218 transitions. [2019-12-07 15:25:10,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2019-12-07 15:25:10,191 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 67 [2019-12-07 15:25:10,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:10,220 INFO L225 Difference]: With dead ends: 26311 [2019-12-07 15:25:10,220 INFO L226 Difference]: Without dead ends: 25362 [2019-12-07 15:25:10,221 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 846 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=583, Invalid=3449, Unknown=0, NotChecked=0, Total=4032 [2019-12-07 15:25:10,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25362 states. [2019-12-07 15:25:10,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25362 to 21481. [2019-12-07 15:25:10,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21481 states. [2019-12-07 15:25:10,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21481 states to 21481 states and 65610 transitions. [2019-12-07 15:25:10,557 INFO L78 Accepts]: Start accepts. Automaton has 21481 states and 65610 transitions. Word has length 67 [2019-12-07 15:25:10,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:25:10,557 INFO L462 AbstractCegarLoop]: Abstraction has 21481 states and 65610 transitions. [2019-12-07 15:25:10,557 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 15:25:10,558 INFO L276 IsEmpty]: Start isEmpty. Operand 21481 states and 65610 transitions. [2019-12-07 15:25:10,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:25:10,576 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:25:10,576 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:25:10,576 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:25:10,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:25:10,576 INFO L82 PathProgramCache]: Analyzing trace with hash -190162996, now seen corresponding path program 12 times [2019-12-07 15:25:10,576 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:25:10,576 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144128756] [2019-12-07 15:25:10,577 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:25:10,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:25:10,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:25:10,668 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [144128756] [2019-12-07 15:25:10,668 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:25:10,668 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 15:25:10,668 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1843359535] [2019-12-07 15:25:10,669 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 15:25:10,669 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:25:10,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 15:25:10,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:25:10,669 INFO L87 Difference]: Start difference. First operand 21481 states and 65610 transitions. Second operand 11 states. [2019-12-07 15:25:13,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:13,354 INFO L93 Difference]: Finished difference Result 31047 states and 93442 transitions. [2019-12-07 15:25:13,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 15:25:13,356 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 15:25:13,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:13,404 INFO L225 Difference]: With dead ends: 31047 [2019-12-07 15:25:13,404 INFO L226 Difference]: Without dead ends: 26734 [2019-12-07 15:25:13,405 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 142 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=154, Invalid=658, Unknown=0, NotChecked=0, Total=812 [2019-12-07 15:25:13,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26734 states. [2019-12-07 15:25:13,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26734 to 20812. [2019-12-07 15:25:13,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20812 states. [2019-12-07 15:25:13,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20812 states to 20812 states and 63623 transitions. [2019-12-07 15:25:13,761 INFO L78 Accepts]: Start accepts. Automaton has 20812 states and 63623 transitions. Word has length 67 [2019-12-07 15:25:13,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:25:13,761 INFO L462 AbstractCegarLoop]: Abstraction has 20812 states and 63623 transitions. [2019-12-07 15:25:13,761 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 15:25:13,761 INFO L276 IsEmpty]: Start isEmpty. Operand 20812 states and 63623 transitions. [2019-12-07 15:25:13,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:25:13,780 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:25:13,780 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:25:13,780 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:25:13,780 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:25:13,781 INFO L82 PathProgramCache]: Analyzing trace with hash 993470682, now seen corresponding path program 13 times [2019-12-07 15:25:13,781 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:25:13,781 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1375825671] [2019-12-07 15:25:13,781 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:25:13,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:25:14,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:25:14,414 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1375825671] [2019-12-07 15:25:14,414 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:25:14,414 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 15:25:14,414 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [710824907] [2019-12-07 15:25:14,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 15:25:14,415 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:25:14,415 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 15:25:14,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=353, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:25:14,415 INFO L87 Difference]: Start difference. First operand 20812 states and 63623 transitions. Second operand 21 states. [2019-12-07 15:25:17,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:17,770 INFO L93 Difference]: Finished difference Result 24936 states and 75211 transitions. [2019-12-07 15:25:17,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2019-12-07 15:25:17,771 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 67 [2019-12-07 15:25:17,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:17,799 INFO L225 Difference]: With dead ends: 24936 [2019-12-07 15:25:17,799 INFO L226 Difference]: Without dead ends: 24624 [2019-12-07 15:25:17,800 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 612 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=447, Invalid=2633, Unknown=0, NotChecked=0, Total=3080 [2019-12-07 15:25:17,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24624 states. [2019-12-07 15:25:18,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24624 to 20794. [2019-12-07 15:25:18,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20794 states. [2019-12-07 15:25:18,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20794 states to 20794 states and 63557 transitions. [2019-12-07 15:25:18,131 INFO L78 Accepts]: Start accepts. Automaton has 20794 states and 63557 transitions. Word has length 67 [2019-12-07 15:25:18,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:25:18,131 INFO L462 AbstractCegarLoop]: Abstraction has 20794 states and 63557 transitions. [2019-12-07 15:25:18,131 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 15:25:18,131 INFO L276 IsEmpty]: Start isEmpty. Operand 20794 states and 63557 transitions. [2019-12-07 15:25:18,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:25:18,149 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:25:18,149 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:25:18,149 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:25:18,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:25:18,150 INFO L82 PathProgramCache]: Analyzing trace with hash 1616492466, now seen corresponding path program 14 times [2019-12-07 15:25:18,150 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:25:18,150 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [684363727] [2019-12-07 15:25:18,150 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:25:18,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:25:18,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:25:18,817 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [684363727] [2019-12-07 15:25:18,817 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:25:18,817 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2019-12-07 15:25:18,817 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [528035405] [2019-12-07 15:25:18,818 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 15:25:18,818 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:25:18,818 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 15:25:18,818 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=484, Unknown=0, NotChecked=0, Total=552 [2019-12-07 15:25:18,818 INFO L87 Difference]: Start difference. First operand 20794 states and 63557 transitions. Second operand 24 states. [2019-12-07 15:25:22,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:22,573 INFO L93 Difference]: Finished difference Result 22634 states and 68044 transitions. [2019-12-07 15:25:22,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2019-12-07 15:25:22,573 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 67 [2019-12-07 15:25:22,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:22,596 INFO L225 Difference]: With dead ends: 22634 [2019-12-07 15:25:22,596 INFO L226 Difference]: Without dead ends: 22214 [2019-12-07 15:25:22,597 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 733 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=437, Invalid=3223, Unknown=0, NotChecked=0, Total=3660 [2019-12-07 15:25:22,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22214 states. [2019-12-07 15:25:22,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22214 to 20944. [2019-12-07 15:25:22,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20944 states. [2019-12-07 15:25:22,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20944 states to 20944 states and 63955 transitions. [2019-12-07 15:25:22,909 INFO L78 Accepts]: Start accepts. Automaton has 20944 states and 63955 transitions. Word has length 67 [2019-12-07 15:25:22,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:25:22,909 INFO L462 AbstractCegarLoop]: Abstraction has 20944 states and 63955 transitions. [2019-12-07 15:25:22,909 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 15:25:22,909 INFO L276 IsEmpty]: Start isEmpty. Operand 20944 states and 63955 transitions. [2019-12-07 15:25:22,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:25:22,928 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:25:22,928 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:25:22,928 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:25:22,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:25:22,928 INFO L82 PathProgramCache]: Analyzing trace with hash 1801969170, now seen corresponding path program 15 times [2019-12-07 15:25:22,928 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:25:22,928 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1598388051] [2019-12-07 15:25:22,928 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:25:22,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:25:23,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:25:23,277 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1598388051] [2019-12-07 15:25:23,277 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:25:23,277 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 15:25:23,277 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [373297020] [2019-12-07 15:25:23,277 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 15:25:23,277 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:25:23,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 15:25:23,277 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=367, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:25:23,277 INFO L87 Difference]: Start difference. First operand 20944 states and 63955 transitions. Second operand 21 states. [2019-12-07 15:25:26,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:26,655 INFO L93 Difference]: Finished difference Result 25158 states and 75474 transitions. [2019-12-07 15:25:26,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 15:25:26,655 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 67 [2019-12-07 15:25:26,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:26,679 INFO L225 Difference]: With dead ends: 25158 [2019-12-07 15:25:26,680 INFO L226 Difference]: Without dead ends: 23298 [2019-12-07 15:25:26,680 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 216 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=266, Invalid=1456, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 15:25:26,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23298 states. [2019-12-07 15:25:26,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23298 to 21346. [2019-12-07 15:25:26,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21346 states. [2019-12-07 15:25:27,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21346 states to 21346 states and 65095 transitions. [2019-12-07 15:25:27,002 INFO L78 Accepts]: Start accepts. Automaton has 21346 states and 65095 transitions. Word has length 67 [2019-12-07 15:25:27,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:25:27,002 INFO L462 AbstractCegarLoop]: Abstraction has 21346 states and 65095 transitions. [2019-12-07 15:25:27,002 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 15:25:27,002 INFO L276 IsEmpty]: Start isEmpty. Operand 21346 states and 65095 transitions. [2019-12-07 15:25:27,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:25:27,074 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:25:27,074 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:25:27,074 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:25:27,074 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:25:27,074 INFO L82 PathProgramCache]: Analyzing trace with hash 1823504856, now seen corresponding path program 16 times [2019-12-07 15:25:27,074 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:25:27,075 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1351795301] [2019-12-07 15:25:27,075 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:25:27,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:25:27,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:25:27,334 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1351795301] [2019-12-07 15:25:27,334 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:25:27,334 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 15:25:27,334 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [13387164] [2019-12-07 15:25:27,335 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 15:25:27,335 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:25:27,335 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 15:25:27,335 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:25:27,335 INFO L87 Difference]: Start difference. First operand 21346 states and 65095 transitions. Second operand 15 states. [2019-12-07 15:25:28,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:28,908 INFO L93 Difference]: Finished difference Result 27644 states and 82763 transitions. [2019-12-07 15:25:28,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 15:25:28,908 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 15:25:28,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:28,939 INFO L225 Difference]: With dead ends: 27644 [2019-12-07 15:25:28,939 INFO L226 Difference]: Without dead ends: 26545 [2019-12-07 15:25:28,939 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 285 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=222, Invalid=1038, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 15:25:29,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26545 states. [2019-12-07 15:25:29,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26545 to 21416. [2019-12-07 15:25:29,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21416 states. [2019-12-07 15:25:29,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21416 states to 21416 states and 65265 transitions. [2019-12-07 15:25:29,281 INFO L78 Accepts]: Start accepts. Automaton has 21416 states and 65265 transitions. Word has length 67 [2019-12-07 15:25:29,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:25:29,281 INFO L462 AbstractCegarLoop]: Abstraction has 21416 states and 65265 transitions. [2019-12-07 15:25:29,281 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 15:25:29,281 INFO L276 IsEmpty]: Start isEmpty. Operand 21416 states and 65265 transitions. [2019-12-07 15:25:29,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:25:29,299 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:25:29,300 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:25:29,300 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:25:29,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:25:29,300 INFO L82 PathProgramCache]: Analyzing trace with hash -1372468028, now seen corresponding path program 17 times [2019-12-07 15:25:29,300 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:25:29,300 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [724036123] [2019-12-07 15:25:29,300 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:25:29,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:25:29,472 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:25:29,472 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [724036123] [2019-12-07 15:25:29,472 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:25:29,472 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 15:25:29,472 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1954086718] [2019-12-07 15:25:29,473 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 15:25:29,473 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:25:29,473 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 15:25:29,473 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:25:29,473 INFO L87 Difference]: Start difference. First operand 21416 states and 65265 transitions. Second operand 15 states. [2019-12-07 15:25:30,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:30,900 INFO L93 Difference]: Finished difference Result 29949 states and 89988 transitions. [2019-12-07 15:25:30,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 15:25:30,901 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 15:25:30,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:30,932 INFO L225 Difference]: With dead ends: 29949 [2019-12-07 15:25:30,933 INFO L226 Difference]: Without dead ends: 27756 [2019-12-07 15:25:30,933 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 158 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=204, Invalid=918, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 15:25:31,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27756 states. [2019-12-07 15:25:31,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27756 to 20726. [2019-12-07 15:25:31,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20726 states. [2019-12-07 15:25:31,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20726 states to 20726 states and 63344 transitions. [2019-12-07 15:25:31,285 INFO L78 Accepts]: Start accepts. Automaton has 20726 states and 63344 transitions. Word has length 67 [2019-12-07 15:25:31,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:25:31,285 INFO L462 AbstractCegarLoop]: Abstraction has 20726 states and 63344 transitions. [2019-12-07 15:25:31,285 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 15:25:31,285 INFO L276 IsEmpty]: Start isEmpty. Operand 20726 states and 63344 transitions. [2019-12-07 15:25:31,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:25:31,303 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:25:31,303 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:25:31,303 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:25:31,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:25:31,304 INFO L82 PathProgramCache]: Analyzing trace with hash -1867129146, now seen corresponding path program 18 times [2019-12-07 15:25:31,304 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:25:31,304 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1343010198] [2019-12-07 15:25:31,304 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:25:31,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:25:31,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:25:31,341 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1343010198] [2019-12-07 15:25:31,341 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:25:31,341 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:25:31,341 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2020146844] [2019-12-07 15:25:31,342 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:25:31,342 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:25:31,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:25:31,342 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:25:31,342 INFO L87 Difference]: Start difference. First operand 20726 states and 63344 transitions. Second operand 6 states. [2019-12-07 15:25:31,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:31,631 INFO L93 Difference]: Finished difference Result 48011 states and 146345 transitions. [2019-12-07 15:25:31,631 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 15:25:31,631 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 15:25:31,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:31,670 INFO L225 Difference]: With dead ends: 48011 [2019-12-07 15:25:31,670 INFO L226 Difference]: Without dead ends: 38349 [2019-12-07 15:25:31,670 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:25:31,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38349 states. [2019-12-07 15:25:32,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38349 to 21760. [2019-12-07 15:25:32,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21760 states. [2019-12-07 15:25:32,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21760 states to 21760 states and 66723 transitions. [2019-12-07 15:25:32,085 INFO L78 Accepts]: Start accepts. Automaton has 21760 states and 66723 transitions. Word has length 67 [2019-12-07 15:25:32,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:25:32,085 INFO L462 AbstractCegarLoop]: Abstraction has 21760 states and 66723 transitions. [2019-12-07 15:25:32,085 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:25:32,085 INFO L276 IsEmpty]: Start isEmpty. Operand 21760 states and 66723 transitions. [2019-12-07 15:25:32,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:25:32,102 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:25:32,102 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:25:32,102 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:25:32,103 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:25:32,103 INFO L82 PathProgramCache]: Analyzing trace with hash -1154306208, now seen corresponding path program 19 times [2019-12-07 15:25:32,103 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:25:32,103 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1792816174] [2019-12-07 15:25:32,103 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:25:32,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:25:32,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:25:32,177 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 15:25:32,178 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:25:32,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= (select .cse0 |v_ULTIMATE.start_main_~#t1315~0.base_23|) 0) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1315~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1315~0.base_23|) |v_ULTIMATE.start_main_~#t1315~0.offset_17| 0)) |v_#memory_int_17|) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1315~0.base_23| 4)) (= v_~main$tmp_guard1~0_48 0) (= |v_ULTIMATE.start_main_~#t1315~0.offset_17| 0) (= 0 v_~z$r_buff0_thd3~0_416) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= v_~z$w_buff0_used~0_900 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= v_~z$read_delayed~0_7 0) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1315~0.base_23|) (= 0 v_~z$r_buff1_thd3~0_300) (= v_~z$r_buff1_thd1~0_166 0) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= |v_#valid_60| (store .cse0 |v_ULTIMATE.start_main_~#t1315~0.base_23| 1)) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1317~0.base=|v_ULTIMATE.start_main_~#t1317~0.base_17|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_~#t1317~0.offset=|v_ULTIMATE.start_main_~#t1317~0.offset_14|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ULTIMATE.start_main_~#t1315~0.offset=|v_ULTIMATE.start_main_~#t1315~0.offset_17|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ULTIMATE.start_main_~#t1316~0.offset=|v_ULTIMATE.start_main_~#t1316~0.offset_12|, ~x~0=v_~x~0_129, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1316~0.base=|v_ULTIMATE.start_main_~#t1316~0.base_19|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1315~0.base=|v_ULTIMATE.start_main_~#t1315~0.base_23|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1317~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t1317~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_~#t1315~0.offset, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1316~0.offset, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1316~0.base, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t1315~0.base, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:25:32,181 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1316~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1316~0.base_11|) |v_ULTIMATE.start_main_~#t1316~0.offset_9| 1)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1316~0.base_11| 4) |v_#length_17|) (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1316~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t1316~0.offset_9|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1316~0.base_11|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1316~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t1316~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1316~0.base=|v_ULTIMATE.start_main_~#t1316~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1316~0.offset=|v_ULTIMATE.start_main_~#t1316~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1316~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1316~0.offset] because there is no mapped edge [2019-12-07 15:25:32,181 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:25:32,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In386598775 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In386598775 256)))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In386598775 |P1Thread1of1ForFork2_#t~ite9_Out386598775|)) (and (= ~z~0_In386598775 |P1Thread1of1ForFork2_#t~ite9_Out386598775|) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In386598775, ~z$w_buff1_used~0=~z$w_buff1_used~0_In386598775, ~z$w_buff1~0=~z$w_buff1~0_In386598775, ~z~0=~z~0_In386598775} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out386598775|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In386598775, ~z$w_buff1_used~0=~z$w_buff1_used~0_In386598775, ~z$w_buff1~0=~z$w_buff1~0_In386598775, ~z~0=~z~0_In386598775} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 15:25:32,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 15:25:32,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1317~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1317~0.base_13|) |v_ULTIMATE.start_main_~#t1317~0.offset_11| 2)) |v_#memory_int_11|) (= |v_ULTIMATE.start_main_~#t1317~0.offset_11| 0) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1317~0.base_13|)) (not (= |v_ULTIMATE.start_main_~#t1317~0.base_13| 0)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1317~0.base_13| 1)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1317~0.base_13|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1317~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1317~0.base=|v_ULTIMATE.start_main_~#t1317~0.base_13|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1317~0.offset=|v_ULTIMATE.start_main_~#t1317~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1317~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1317~0.offset] because there is no mapped edge [2019-12-07 15:25:32,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-16581287 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-16581287 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-16581287|) (not .cse1)) (and (= ~z$w_buff0_used~0_In-16581287 |P1Thread1of1ForFork2_#t~ite11_Out-16581287|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-16581287, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-16581287} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-16581287, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-16581287|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-16581287} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:25:32,183 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1592832274 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In-1592832274 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1592832274 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1592832274 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-1592832274| 0)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1592832274| ~z$w_buff1_used~0_In-1592832274) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1592832274, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1592832274, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1592832274, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1592832274} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1592832274, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1592832274, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1592832274, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1592832274|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1592832274} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:25:32,185 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In2005253206 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In2005253206 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out2005253206| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In2005253206 |P1Thread1of1ForFork2_#t~ite13_Out2005253206|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2005253206} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out2005253206|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2005253206} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:25:32,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-647140950 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_Out-647140950| ~z$w_buff0_used~0_In-647140950) (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-647140950 256) 0))) (or (and .cse0 (= 0 (mod ~z$w_buff1_used~0_In-647140950 256))) (and .cse0 (= (mod ~z$r_buff1_thd3~0_In-647140950 256) 0)) (= (mod ~z$w_buff0_used~0_In-647140950 256) 0))) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out-647140950| |P2Thread1of1ForFork0_#t~ite27_Out-647140950|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-647140950| ~z$w_buff0_used~0_In-647140950) (= |P2Thread1of1ForFork0_#t~ite26_In-647140950| |P2Thread1of1ForFork0_#t~ite26_Out-647140950|) (not .cse1)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-647140950|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-647140950, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-647140950, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-647140950, ~weak$$choice2~0=~weak$$choice2~0_In-647140950} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-647140950|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-647140950|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-647140950, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-647140950, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-647140950, ~weak$$choice2~0=~weak$$choice2~0_In-647140950} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:25:32,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:25:32,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1041155812 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In1041155812 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1041155812 |P0Thread1of1ForFork1_#t~ite5_Out1041155812|)) (and (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1041155812|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1041155812, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1041155812} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1041155812|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1041155812, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1041155812} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:25:32,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 15:25:32,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite38_Out-535386570| |P2Thread1of1ForFork0_#t~ite39_Out-535386570|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-535386570 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-535386570 256) 0))) (or (and .cse0 (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-535386570| ~z$w_buff1~0_In-535386570) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= |P2Thread1of1ForFork0_#t~ite38_Out-535386570| ~z~0_In-535386570)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-535386570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-535386570, ~z$w_buff1~0=~z$w_buff1~0_In-535386570, ~z~0=~z~0_In-535386570} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-535386570|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-535386570|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-535386570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-535386570, ~z$w_buff1~0=~z$w_buff1~0_In-535386570, ~z~0=~z~0_In-535386570} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:25:32,189 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-988525752 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-988525752 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-988525752| 0)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-988525752 |P2Thread1of1ForFork0_#t~ite40_Out-988525752|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-988525752, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-988525752} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-988525752, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-988525752|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-988525752} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:25:32,189 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-254870859 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-254870859 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-254870859 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-254870859 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-254870859|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~z$w_buff1_used~0_In-254870859 |P2Thread1of1ForFork0_#t~ite41_Out-254870859|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-254870859, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-254870859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-254870859, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-254870859} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-254870859, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-254870859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-254870859, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-254870859, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-254870859|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:25:32,189 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In1375098561 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1375098561 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1375098561| ~z$r_buff0_thd3~0_In1375098561) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1375098561| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1375098561, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1375098561} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1375098561, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1375098561, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1375098561|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:25:32,190 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd3~0_In-1101784427 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1101784427 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1101784427 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1101784427 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-1101784427 |P2Thread1of1ForFork0_#t~ite43_Out-1101784427|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1101784427|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101784427, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1101784427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1101784427, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1101784427} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1101784427|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101784427, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1101784427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1101784427, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1101784427} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:25:32,190 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:25:32,190 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In760265765 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In760265765 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In760265765 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In760265765 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out760265765|)) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In760265765 |P0Thread1of1ForFork1_#t~ite6_Out760265765|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In760265765, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In760265765, ~z$w_buff1_used~0=~z$w_buff1_used~0_In760265765, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In760265765} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In760265765, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out760265765|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In760265765, ~z$w_buff1_used~0=~z$w_buff1_used~0_In760265765, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In760265765} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:25:32,190 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1903474534 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_Out1903474534 ~z$r_buff0_thd1~0_In1903474534)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In1903474534 256) 0))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd1~0_Out1903474534) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1903474534, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1903474534} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1903474534, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1903474534|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1903474534} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:25:32,190 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In260823075 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In260823075 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In260823075 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In260823075 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite8_Out260823075| ~z$r_buff1_thd1~0_In260823075)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out260823075|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In260823075, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In260823075, ~z$w_buff1_used~0=~z$w_buff1_used~0_In260823075, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In260823075} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out260823075|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In260823075, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In260823075, ~z$w_buff1_used~0=~z$w_buff1_used~0_In260823075, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In260823075} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:25:32,190 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:25:32,191 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1825162012 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In1825162012 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1825162012 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In1825162012 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out1825162012| ~z$r_buff1_thd2~0_In1825162012)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out1825162012| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1825162012, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1825162012, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1825162012, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1825162012} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1825162012, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1825162012, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1825162012, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1825162012|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1825162012} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:25:32,191 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:25:32,191 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:25:32,191 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite48_Out439139011| |ULTIMATE.start_main_#t~ite47_Out439139011|)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In439139011 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In439139011 256) 0))) (or (and .cse0 (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out439139011| ~z$w_buff1~0_In439139011) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~ite47_Out439139011| ~z~0_In439139011)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In439139011, ~z$w_buff1_used~0=~z$w_buff1_used~0_In439139011, ~z$w_buff1~0=~z$w_buff1~0_In439139011, ~z~0=~z~0_In439139011} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In439139011, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out439139011|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In439139011, ~z$w_buff1~0=~z$w_buff1~0_In439139011, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out439139011|, ~z~0=~z~0_In439139011} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:25:32,192 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-24977062 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-24977062 256)))) (or (and (= ~z$w_buff0_used~0_In-24977062 |ULTIMATE.start_main_#t~ite49_Out-24977062|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-24977062| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-24977062, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-24977062} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-24977062, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-24977062, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-24977062|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:25:32,192 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In10111743 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In10111743 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In10111743 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In10111743 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out10111743|)) (and (= ~z$w_buff1_used~0_In10111743 |ULTIMATE.start_main_#t~ite50_Out10111743|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In10111743, ~z$w_buff0_used~0=~z$w_buff0_used~0_In10111743, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In10111743, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10111743} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out10111743|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In10111743, ~z$w_buff0_used~0=~z$w_buff0_used~0_In10111743, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In10111743, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10111743} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:25:32,193 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-380531429 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-380531429 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-380531429|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-380531429 |ULTIMATE.start_main_#t~ite51_Out-380531429|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-380531429, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-380531429} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-380531429, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-380531429|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-380531429} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:25:32,193 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-1799265621 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1799265621 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1799265621 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1799265621 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-1799265621|)) (and (or .cse3 .cse2) (= ~z$r_buff1_thd0~0_In-1799265621 |ULTIMATE.start_main_#t~ite52_Out-1799265621|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1799265621, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1799265621, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1799265621, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799265621} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1799265621|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1799265621, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1799265621, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1799265621, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799265621} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:25:32,193 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:25:32,247 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:25:32 BasicIcfg [2019-12-07 15:25:32,247 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:25:32,248 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:25:32,248 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:25:32,248 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:25:32,248 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:22:28" (3/4) ... [2019-12-07 15:25:32,250 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:25:32,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= (select .cse0 |v_ULTIMATE.start_main_~#t1315~0.base_23|) 0) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1315~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1315~0.base_23|) |v_ULTIMATE.start_main_~#t1315~0.offset_17| 0)) |v_#memory_int_17|) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1315~0.base_23| 4)) (= v_~main$tmp_guard1~0_48 0) (= |v_ULTIMATE.start_main_~#t1315~0.offset_17| 0) (= 0 v_~z$r_buff0_thd3~0_416) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= v_~z$w_buff0_used~0_900 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= v_~z$read_delayed~0_7 0) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1315~0.base_23|) (= 0 v_~z$r_buff1_thd3~0_300) (= v_~z$r_buff1_thd1~0_166 0) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= |v_#valid_60| (store .cse0 |v_ULTIMATE.start_main_~#t1315~0.base_23| 1)) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1317~0.base=|v_ULTIMATE.start_main_~#t1317~0.base_17|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_~#t1317~0.offset=|v_ULTIMATE.start_main_~#t1317~0.offset_14|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ULTIMATE.start_main_~#t1315~0.offset=|v_ULTIMATE.start_main_~#t1315~0.offset_17|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ULTIMATE.start_main_~#t1316~0.offset=|v_ULTIMATE.start_main_~#t1316~0.offset_12|, ~x~0=v_~x~0_129, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1316~0.base=|v_ULTIMATE.start_main_~#t1316~0.base_19|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1315~0.base=|v_ULTIMATE.start_main_~#t1315~0.base_23|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1317~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t1317~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_~#t1315~0.offset, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1316~0.offset, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1316~0.base, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t1315~0.base, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:25:32,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1316~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1316~0.base_11|) |v_ULTIMATE.start_main_~#t1316~0.offset_9| 1)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1316~0.base_11| 4) |v_#length_17|) (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1316~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t1316~0.offset_9|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1316~0.base_11|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1316~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t1316~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1316~0.base=|v_ULTIMATE.start_main_~#t1316~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1316~0.offset=|v_ULTIMATE.start_main_~#t1316~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1316~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1316~0.offset] because there is no mapped edge [2019-12-07 15:25:32,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:25:32,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In386598775 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In386598775 256)))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In386598775 |P1Thread1of1ForFork2_#t~ite9_Out386598775|)) (and (= ~z~0_In386598775 |P1Thread1of1ForFork2_#t~ite9_Out386598775|) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In386598775, ~z$w_buff1_used~0=~z$w_buff1_used~0_In386598775, ~z$w_buff1~0=~z$w_buff1~0_In386598775, ~z~0=~z~0_In386598775} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out386598775|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In386598775, ~z$w_buff1_used~0=~z$w_buff1_used~0_In386598775, ~z$w_buff1~0=~z$w_buff1~0_In386598775, ~z~0=~z~0_In386598775} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 15:25:32,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 15:25:32,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1317~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1317~0.base_13|) |v_ULTIMATE.start_main_~#t1317~0.offset_11| 2)) |v_#memory_int_11|) (= |v_ULTIMATE.start_main_~#t1317~0.offset_11| 0) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1317~0.base_13|)) (not (= |v_ULTIMATE.start_main_~#t1317~0.base_13| 0)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1317~0.base_13| 1)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1317~0.base_13|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1317~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1317~0.base=|v_ULTIMATE.start_main_~#t1317~0.base_13|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1317~0.offset=|v_ULTIMATE.start_main_~#t1317~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1317~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1317~0.offset] because there is no mapped edge [2019-12-07 15:25:32,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-16581287 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-16581287 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-16581287|) (not .cse1)) (and (= ~z$w_buff0_used~0_In-16581287 |P1Thread1of1ForFork2_#t~ite11_Out-16581287|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-16581287, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-16581287} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-16581287, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-16581287|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-16581287} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:25:32,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1592832274 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In-1592832274 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1592832274 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1592832274 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-1592832274| 0)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1592832274| ~z$w_buff1_used~0_In-1592832274) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1592832274, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1592832274, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1592832274, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1592832274} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1592832274, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1592832274, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1592832274, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1592832274|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1592832274} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:25:32,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In2005253206 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In2005253206 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out2005253206| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In2005253206 |P1Thread1of1ForFork2_#t~ite13_Out2005253206|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2005253206} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out2005253206|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2005253206} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:25:32,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-647140950 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_Out-647140950| ~z$w_buff0_used~0_In-647140950) (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-647140950 256) 0))) (or (and .cse0 (= 0 (mod ~z$w_buff1_used~0_In-647140950 256))) (and .cse0 (= (mod ~z$r_buff1_thd3~0_In-647140950 256) 0)) (= (mod ~z$w_buff0_used~0_In-647140950 256) 0))) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out-647140950| |P2Thread1of1ForFork0_#t~ite27_Out-647140950|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-647140950| ~z$w_buff0_used~0_In-647140950) (= |P2Thread1of1ForFork0_#t~ite26_In-647140950| |P2Thread1of1ForFork0_#t~ite26_Out-647140950|) (not .cse1)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-647140950|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-647140950, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-647140950, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-647140950, ~weak$$choice2~0=~weak$$choice2~0_In-647140950} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-647140950|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-647140950|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-647140950, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-647140950, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-647140950, ~weak$$choice2~0=~weak$$choice2~0_In-647140950} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:25:32,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:25:32,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1041155812 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In1041155812 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1041155812 |P0Thread1of1ForFork1_#t~ite5_Out1041155812|)) (and (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1041155812|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1041155812, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1041155812} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1041155812|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1041155812, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1041155812} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:25:32,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 15:25:32,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite38_Out-535386570| |P2Thread1of1ForFork0_#t~ite39_Out-535386570|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-535386570 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-535386570 256) 0))) (or (and .cse0 (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-535386570| ~z$w_buff1~0_In-535386570) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= |P2Thread1of1ForFork0_#t~ite38_Out-535386570| ~z~0_In-535386570)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-535386570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-535386570, ~z$w_buff1~0=~z$w_buff1~0_In-535386570, ~z~0=~z~0_In-535386570} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-535386570|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-535386570|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-535386570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-535386570, ~z$w_buff1~0=~z$w_buff1~0_In-535386570, ~z~0=~z~0_In-535386570} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:25:32,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-988525752 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-988525752 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-988525752| 0)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-988525752 |P2Thread1of1ForFork0_#t~ite40_Out-988525752|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-988525752, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-988525752} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-988525752, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-988525752|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-988525752} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:25:32,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-254870859 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-254870859 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-254870859 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-254870859 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-254870859|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~z$w_buff1_used~0_In-254870859 |P2Thread1of1ForFork0_#t~ite41_Out-254870859|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-254870859, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-254870859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-254870859, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-254870859} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-254870859, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-254870859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-254870859, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-254870859, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-254870859|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:25:32,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In1375098561 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1375098561 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1375098561| ~z$r_buff0_thd3~0_In1375098561) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1375098561| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1375098561, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1375098561} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1375098561, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1375098561, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1375098561|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:25:32,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd3~0_In-1101784427 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1101784427 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1101784427 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1101784427 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-1101784427 |P2Thread1of1ForFork0_#t~ite43_Out-1101784427|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1101784427|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101784427, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1101784427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1101784427, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1101784427} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1101784427|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101784427, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1101784427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1101784427, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1101784427} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:25:32,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:25:32,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In760265765 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In760265765 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In760265765 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In760265765 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out760265765|)) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In760265765 |P0Thread1of1ForFork1_#t~ite6_Out760265765|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In760265765, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In760265765, ~z$w_buff1_used~0=~z$w_buff1_used~0_In760265765, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In760265765} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In760265765, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out760265765|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In760265765, ~z$w_buff1_used~0=~z$w_buff1_used~0_In760265765, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In760265765} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:25:32,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1903474534 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_Out1903474534 ~z$r_buff0_thd1~0_In1903474534)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In1903474534 256) 0))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd1~0_Out1903474534) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1903474534, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1903474534} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1903474534, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1903474534|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1903474534} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:25:32,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In260823075 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In260823075 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In260823075 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In260823075 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite8_Out260823075| ~z$r_buff1_thd1~0_In260823075)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out260823075|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In260823075, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In260823075, ~z$w_buff1_used~0=~z$w_buff1_used~0_In260823075, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In260823075} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out260823075|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In260823075, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In260823075, ~z$w_buff1_used~0=~z$w_buff1_used~0_In260823075, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In260823075} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:25:32,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:25:32,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1825162012 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In1825162012 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1825162012 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In1825162012 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out1825162012| ~z$r_buff1_thd2~0_In1825162012)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out1825162012| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1825162012, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1825162012, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1825162012, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1825162012} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1825162012, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1825162012, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1825162012, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1825162012|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1825162012} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:25:32,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:25:32,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:25:32,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite48_Out439139011| |ULTIMATE.start_main_#t~ite47_Out439139011|)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In439139011 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In439139011 256) 0))) (or (and .cse0 (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out439139011| ~z$w_buff1~0_In439139011) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~ite47_Out439139011| ~z~0_In439139011)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In439139011, ~z$w_buff1_used~0=~z$w_buff1_used~0_In439139011, ~z$w_buff1~0=~z$w_buff1~0_In439139011, ~z~0=~z~0_In439139011} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In439139011, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out439139011|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In439139011, ~z$w_buff1~0=~z$w_buff1~0_In439139011, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out439139011|, ~z~0=~z~0_In439139011} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:25:32,262 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-24977062 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-24977062 256)))) (or (and (= ~z$w_buff0_used~0_In-24977062 |ULTIMATE.start_main_#t~ite49_Out-24977062|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-24977062| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-24977062, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-24977062} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-24977062, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-24977062, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-24977062|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:25:32,262 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In10111743 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In10111743 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In10111743 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In10111743 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out10111743|)) (and (= ~z$w_buff1_used~0_In10111743 |ULTIMATE.start_main_#t~ite50_Out10111743|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In10111743, ~z$w_buff0_used~0=~z$w_buff0_used~0_In10111743, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In10111743, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10111743} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out10111743|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In10111743, ~z$w_buff0_used~0=~z$w_buff0_used~0_In10111743, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In10111743, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10111743} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:25:32,262 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-380531429 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-380531429 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-380531429|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-380531429 |ULTIMATE.start_main_#t~ite51_Out-380531429|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-380531429, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-380531429} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-380531429, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-380531429|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-380531429} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:25:32,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-1799265621 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1799265621 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1799265621 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1799265621 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-1799265621|)) (and (or .cse3 .cse2) (= ~z$r_buff1_thd0~0_In-1799265621 |ULTIMATE.start_main_#t~ite52_Out-1799265621|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1799265621, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1799265621, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1799265621, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799265621} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1799265621|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1799265621, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1799265621, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1799265621, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799265621} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:25:32,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:25:32,314 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_693ee70e-3878-485d-ad80-f45f7f6d8515/bin/uautomizer/witness.graphml [2019-12-07 15:25:32,314 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:25:32,315 INFO L168 Benchmark]: Toolchain (without parser) took 184582.81 ms. Allocated memory was 1.0 GB in the beginning and 8.0 GB in the end (delta: 6.9 GB). Free memory was 938.2 MB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. [2019-12-07 15:25:32,315 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:25:32,316 INFO L168 Benchmark]: CACSL2BoogieTranslator took 402.55 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 108.0 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -137.6 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 15:25:32,316 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.01 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 15:25:32,316 INFO L168 Benchmark]: Boogie Preprocessor took 26.30 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:25:32,316 INFO L168 Benchmark]: RCFGBuilder took 422.13 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 15:25:32,317 INFO L168 Benchmark]: TraceAbstraction took 183623.44 ms. Allocated memory was 1.1 GB in the beginning and 8.0 GB in the end (delta: 6.8 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. [2019-12-07 15:25:32,317 INFO L168 Benchmark]: Witness Printer took 66.48 ms. Allocated memory is still 8.0 GB. Free memory was 4.5 GB in the beginning and 4.5 GB in the end (delta: 41.7 MB). Peak memory consumption was 41.7 MB. Max. memory is 11.5 GB. [2019-12-07 15:25:32,318 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 402.55 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 108.0 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -137.6 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.01 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.30 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 422.13 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 183623.44 ms. Allocated memory was 1.1 GB in the beginning and 8.0 GB in the end (delta: 6.8 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. * Witness Printer took 66.48 ms. Allocated memory is still 8.0 GB. Free memory was 4.5 GB in the beginning and 4.5 GB in the end (delta: 41.7 MB). Peak memory consumption was 41.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 176 ProgramPointsBefore, 95 ProgramPointsAfterwards, 213 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 55 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 29 ChoiceCompositions, 7276 VarBasedMoverChecksPositive, 432 VarBasedMoverChecksNegative, 272 SemBasedMoverChecksPositive, 254 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 130045 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L822] FCALL, FORK 0 pthread_create(&t1315, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t1316, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 1 [L763] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L826] FCALL, FORK 0 pthread_create(&t1317, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 1 [L783] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L784] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L785] 3 z$flush_delayed = weak$$choice2 [L786] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L788] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L788] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L789] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L789] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L790] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L791] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L793] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L794] 3 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L799] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L800] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L801] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L802] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L832] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L832] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L833] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L834] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L835] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 183.4s, OverallIterations: 35, TraceHistogramMax: 1, AutomataDifference: 70.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9083 SDtfs, 12020 SDslu, 47699 SDs, 0 SdLazy, 66265 SolverSat, 1027 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 39.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 863 GetRequests, 57 SyntacticMatches, 34 SemanticMatches, 772 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7691 ImplicationChecksByTransitivity, 14.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=237826occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 82.6s AutomataMinimizationTime, 34 MinimizatonAttempts, 329191 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 6.3s InterpolantComputationTime, 1718 NumberOfCodeBlocks, 1718 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 1617 ConstructedInterpolants, 0 QuantifiedInterpolants, 744071 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...