./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix049_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_45e8bd47-1637-4aad-8bd9-3c595f84894a/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_45e8bd47-1637-4aad-8bd9-3c595f84894a/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_45e8bd47-1637-4aad-8bd9-3c595f84894a/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_45e8bd47-1637-4aad-8bd9-3c595f84894a/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix049_tso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_45e8bd47-1637-4aad-8bd9-3c595f84894a/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_45e8bd47-1637-4aad-8bd9-3c595f84894a/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a56c4d7c809c202f44f99842e3c4e5b1665d5a24 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 10:49:15,034 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 10:49:15,036 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 10:49:15,043 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 10:49:15,043 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 10:49:15,044 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 10:49:15,045 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 10:49:15,046 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 10:49:15,048 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 10:49:15,048 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 10:49:15,049 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 10:49:15,050 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 10:49:15,050 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 10:49:15,051 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 10:49:15,051 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 10:49:15,052 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 10:49:15,053 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 10:49:15,053 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 10:49:15,055 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 10:49:15,056 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 10:49:15,057 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 10:49:15,058 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 10:49:15,058 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 10:49:15,059 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 10:49:15,061 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 10:49:15,061 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 10:49:15,061 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 10:49:15,062 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 10:49:15,062 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 10:49:15,062 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 10:49:15,063 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 10:49:15,063 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 10:49:15,063 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 10:49:15,064 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 10:49:15,064 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 10:49:15,065 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 10:49:15,065 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 10:49:15,065 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 10:49:15,065 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 10:49:15,066 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 10:49:15,066 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 10:49:15,067 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_45e8bd47-1637-4aad-8bd9-3c595f84894a/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 10:49:15,076 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 10:49:15,076 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 10:49:15,076 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 10:49:15,077 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 10:49:15,077 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 10:49:15,077 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 10:49:15,077 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 10:49:15,077 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 10:49:15,077 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 10:49:15,077 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 10:49:15,077 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 10:49:15,078 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 10:49:15,078 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 10:49:15,078 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 10:49:15,078 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 10:49:15,078 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 10:49:15,078 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 10:49:15,078 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 10:49:15,078 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 10:49:15,079 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 10:49:15,079 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 10:49:15,079 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:49:15,079 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 10:49:15,079 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 10:49:15,079 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 10:49:15,079 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 10:49:15,079 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 10:49:15,080 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 10:49:15,080 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 10:49:15,080 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_45e8bd47-1637-4aad-8bd9-3c595f84894a/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a56c4d7c809c202f44f99842e3c4e5b1665d5a24 [2019-12-07 10:49:15,180 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 10:49:15,190 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 10:49:15,193 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 10:49:15,194 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 10:49:15,195 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 10:49:15,195 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_45e8bd47-1637-4aad-8bd9-3c595f84894a/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix049_tso.opt.i [2019-12-07 10:49:15,235 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_45e8bd47-1637-4aad-8bd9-3c595f84894a/bin/uautomizer/data/3db449437/0924dff66f8f4dd3b63438707e9e1fee/FLAG74dc3c290 [2019-12-07 10:49:15,677 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 10:49:15,677 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_45e8bd47-1637-4aad-8bd9-3c595f84894a/sv-benchmarks/c/pthread-wmm/mix049_tso.opt.i [2019-12-07 10:49:15,689 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_45e8bd47-1637-4aad-8bd9-3c595f84894a/bin/uautomizer/data/3db449437/0924dff66f8f4dd3b63438707e9e1fee/FLAG74dc3c290 [2019-12-07 10:49:16,024 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_45e8bd47-1637-4aad-8bd9-3c595f84894a/bin/uautomizer/data/3db449437/0924dff66f8f4dd3b63438707e9e1fee [2019-12-07 10:49:16,030 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 10:49:16,033 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 10:49:16,035 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 10:49:16,035 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 10:49:16,040 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 10:49:16,041 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:49:16" (1/1) ... [2019-12-07 10:49:16,042 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@77919ae6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:49:16, skipping insertion in model container [2019-12-07 10:49:16,043 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:49:16" (1/1) ... [2019-12-07 10:49:16,047 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 10:49:16,075 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 10:49:16,312 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:49:16,319 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 10:49:16,361 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:49:16,405 INFO L208 MainTranslator]: Completed translation [2019-12-07 10:49:16,405 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:49:16 WrapperNode [2019-12-07 10:49:16,405 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 10:49:16,406 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 10:49:16,406 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 10:49:16,406 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 10:49:16,412 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:49:16" (1/1) ... [2019-12-07 10:49:16,425 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:49:16" (1/1) ... [2019-12-07 10:49:16,443 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 10:49:16,443 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 10:49:16,443 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 10:49:16,443 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 10:49:16,449 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:49:16" (1/1) ... [2019-12-07 10:49:16,449 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:49:16" (1/1) ... [2019-12-07 10:49:16,452 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:49:16" (1/1) ... [2019-12-07 10:49:16,453 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:49:16" (1/1) ... [2019-12-07 10:49:16,459 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:49:16" (1/1) ... [2019-12-07 10:49:16,462 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:49:16" (1/1) ... [2019-12-07 10:49:16,465 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:49:16" (1/1) ... [2019-12-07 10:49:16,468 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 10:49:16,468 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 10:49:16,468 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 10:49:16,468 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 10:49:16,469 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:49:16" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_45e8bd47-1637-4aad-8bd9-3c595f84894a/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:49:16,508 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 10:49:16,508 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 10:49:16,508 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 10:49:16,508 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 10:49:16,508 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 10:49:16,509 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 10:49:16,509 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 10:49:16,509 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 10:49:16,509 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 10:49:16,509 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 10:49:16,509 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 10:49:16,509 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 10:49:16,509 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 10:49:16,510 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 10:49:16,884 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 10:49:16,884 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 10:49:16,885 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:49:16 BoogieIcfgContainer [2019-12-07 10:49:16,885 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 10:49:16,886 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 10:49:16,886 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 10:49:16,888 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 10:49:16,888 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 10:49:16" (1/3) ... [2019-12-07 10:49:16,889 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@acb63da and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:49:16, skipping insertion in model container [2019-12-07 10:49:16,889 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:49:16" (2/3) ... [2019-12-07 10:49:16,889 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@acb63da and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:49:16, skipping insertion in model container [2019-12-07 10:49:16,890 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:49:16" (3/3) ... [2019-12-07 10:49:16,891 INFO L109 eAbstractionObserver]: Analyzing ICFG mix049_tso.opt.i [2019-12-07 10:49:16,897 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 10:49:16,897 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 10:49:16,903 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 10:49:16,903 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 10:49:16,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,932 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,932 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,933 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,933 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,933 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,933 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,933 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,933 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,935 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,935 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,935 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,935 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,935 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,935 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,935 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,936 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,936 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,936 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,936 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,936 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,936 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,936 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,936 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,937 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,937 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,939 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,939 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,939 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,939 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,939 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,939 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,941 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,941 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,941 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,941 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,941 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,941 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,943 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,943 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,958 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:49:16,968 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 10:49:16,981 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 10:49:16,982 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 10:49:16,982 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 10:49:16,982 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 10:49:16,982 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 10:49:16,982 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 10:49:16,982 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 10:49:16,982 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 10:49:16,995 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 10:49:16,996 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 10:49:17,061 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 10:49:17,061 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:49:17,071 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:49:17,087 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 10:49:17,115 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 10:49:17,115 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:49:17,120 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:49:17,136 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 10:49:17,137 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 10:49:20,067 WARN L192 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 10:49:20,374 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130045 [2019-12-07 10:49:20,374 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 10:49:20,377 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 10:49:40,473 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 126452 states. [2019-12-07 10:49:40,475 INFO L276 IsEmpty]: Start isEmpty. Operand 126452 states. [2019-12-07 10:49:40,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 10:49:40,479 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:40,479 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 10:49:40,479 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:40,483 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:40,483 INFO L82 PathProgramCache]: Analyzing trace with hash 913925, now seen corresponding path program 1 times [2019-12-07 10:49:40,489 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:40,489 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1262514314] [2019-12-07 10:49:40,490 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:40,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:40,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:40,628 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1262514314] [2019-12-07 10:49:40,628 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:40,629 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:49:40,629 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1781587271] [2019-12-07 10:49:40,633 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:49:40,634 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:40,646 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:49:40,647 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:49:40,649 INFO L87 Difference]: Start difference. First operand 126452 states. Second operand 3 states. [2019-12-07 10:49:41,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:41,491 INFO L93 Difference]: Finished difference Result 125570 states and 538788 transitions. [2019-12-07 10:49:41,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:49:41,493 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 10:49:41,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:41,971 INFO L225 Difference]: With dead ends: 125570 [2019-12-07 10:49:41,971 INFO L226 Difference]: Without dead ends: 111010 [2019-12-07 10:49:41,972 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:49:46,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111010 states. [2019-12-07 10:49:49,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111010 to 111010. [2019-12-07 10:49:49,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111010 states. [2019-12-07 10:49:49,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111010 states to 111010 states and 475060 transitions. [2019-12-07 10:49:49,449 INFO L78 Accepts]: Start accepts. Automaton has 111010 states and 475060 transitions. Word has length 3 [2019-12-07 10:49:49,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:49,449 INFO L462 AbstractCegarLoop]: Abstraction has 111010 states and 475060 transitions. [2019-12-07 10:49:49,449 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:49:49,449 INFO L276 IsEmpty]: Start isEmpty. Operand 111010 states and 475060 transitions. [2019-12-07 10:49:49,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 10:49:49,453 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:49,454 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:49,454 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:49,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:49,454 INFO L82 PathProgramCache]: Analyzing trace with hash -1753094800, now seen corresponding path program 1 times [2019-12-07 10:49:49,454 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:49,454 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [506151130] [2019-12-07 10:49:49,455 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:49,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:49,525 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:49,525 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [506151130] [2019-12-07 10:49:49,525 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:49,525 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:49:49,525 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [710227408] [2019-12-07 10:49:49,526 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:49:49,526 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:49,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:49:49,526 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:49:49,527 INFO L87 Difference]: Start difference. First operand 111010 states and 475060 transitions. Second operand 4 states. [2019-12-07 10:49:50,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:50,930 INFO L93 Difference]: Finished difference Result 172646 states and 710109 transitions. [2019-12-07 10:49:50,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:49:50,931 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 10:49:50,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:51,371 INFO L225 Difference]: With dead ends: 172646 [2019-12-07 10:49:51,371 INFO L226 Difference]: Without dead ends: 172548 [2019-12-07 10:49:51,372 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:49:58,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172548 states. [2019-12-07 10:50:01,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172548 to 158936. [2019-12-07 10:50:01,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158936 states. [2019-12-07 10:50:01,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158936 states to 158936 states and 661803 transitions. [2019-12-07 10:50:01,767 INFO L78 Accepts]: Start accepts. Automaton has 158936 states and 661803 transitions. Word has length 11 [2019-12-07 10:50:01,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:50:01,767 INFO L462 AbstractCegarLoop]: Abstraction has 158936 states and 661803 transitions. [2019-12-07 10:50:01,767 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:50:01,767 INFO L276 IsEmpty]: Start isEmpty. Operand 158936 states and 661803 transitions. [2019-12-07 10:50:01,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 10:50:01,773 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:50:01,773 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:50:01,773 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:50:01,773 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:50:01,773 INFO L82 PathProgramCache]: Analyzing trace with hash 216434073, now seen corresponding path program 1 times [2019-12-07 10:50:01,773 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:50:01,773 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [403102366] [2019-12-07 10:50:01,774 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:50:01,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:50:01,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:50:01,818 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [403102366] [2019-12-07 10:50:01,818 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:50:01,818 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:50:01,818 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1317412241] [2019-12-07 10:50:01,818 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:50:01,818 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:50:01,818 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:50:01,818 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:50:01,819 INFO L87 Difference]: Start difference. First operand 158936 states and 661803 transitions. Second operand 4 states. [2019-12-07 10:50:03,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:50:03,068 INFO L93 Difference]: Finished difference Result 228902 states and 931210 transitions. [2019-12-07 10:50:03,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:50:03,069 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 10:50:03,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:50:03,711 INFO L225 Difference]: With dead ends: 228902 [2019-12-07 10:50:03,711 INFO L226 Difference]: Without dead ends: 228790 [2019-12-07 10:50:03,712 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:50:10,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228790 states. [2019-12-07 10:50:15,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228790 to 192327. [2019-12-07 10:50:15,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192327 states. [2019-12-07 10:50:16,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192327 states to 192327 states and 796272 transitions. [2019-12-07 10:50:16,282 INFO L78 Accepts]: Start accepts. Automaton has 192327 states and 796272 transitions. Word has length 13 [2019-12-07 10:50:16,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:50:16,283 INFO L462 AbstractCegarLoop]: Abstraction has 192327 states and 796272 transitions. [2019-12-07 10:50:16,283 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:50:16,283 INFO L276 IsEmpty]: Start isEmpty. Operand 192327 states and 796272 transitions. [2019-12-07 10:50:16,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:50:16,292 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:50:16,292 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:50:16,292 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:50:16,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:50:16,292 INFO L82 PathProgramCache]: Analyzing trace with hash -1948590504, now seen corresponding path program 1 times [2019-12-07 10:50:16,292 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:50:16,293 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1348174408] [2019-12-07 10:50:16,293 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:50:16,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:50:16,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:50:16,328 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1348174408] [2019-12-07 10:50:16,328 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:50:16,328 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:50:16,329 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1136091967] [2019-12-07 10:50:16,329 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:50:16,329 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:50:16,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:50:16,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:50:16,330 INFO L87 Difference]: Start difference. First operand 192327 states and 796272 transitions. Second operand 3 states. [2019-12-07 10:50:17,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:50:17,965 INFO L93 Difference]: Finished difference Result 280788 states and 1158875 transitions. [2019-12-07 10:50:17,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:50:17,966 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 10:50:17,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:50:18,684 INFO L225 Difference]: With dead ends: 280788 [2019-12-07 10:50:18,684 INFO L226 Difference]: Without dead ends: 280788 [2019-12-07 10:50:18,684 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:50:25,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280788 states. [2019-12-07 10:50:29,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280788 to 222888. [2019-12-07 10:50:29,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222888 states. [2019-12-07 10:50:30,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222888 states to 222888 states and 926633 transitions. [2019-12-07 10:50:30,113 INFO L78 Accepts]: Start accepts. Automaton has 222888 states and 926633 transitions. Word has length 16 [2019-12-07 10:50:30,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:50:30,113 INFO L462 AbstractCegarLoop]: Abstraction has 222888 states and 926633 transitions. [2019-12-07 10:50:30,113 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:50:30,113 INFO L276 IsEmpty]: Start isEmpty. Operand 222888 states and 926633 transitions. [2019-12-07 10:50:30,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:50:30,119 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:50:30,120 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:50:30,120 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:50:30,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:50:30,120 INFO L82 PathProgramCache]: Analyzing trace with hash -1821591471, now seen corresponding path program 1 times [2019-12-07 10:50:30,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:50:30,120 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784378898] [2019-12-07 10:50:30,120 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:50:30,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:50:30,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:50:30,700 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1784378898] [2019-12-07 10:50:30,700 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:50:30,700 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:50:30,700 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1264832248] [2019-12-07 10:50:30,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:50:30,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:50:30,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:50:30,700 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:50:30,701 INFO L87 Difference]: Start difference. First operand 222888 states and 926633 transitions. Second operand 5 states. [2019-12-07 10:50:32,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:50:32,382 INFO L93 Difference]: Finished difference Result 298473 states and 1226263 transitions. [2019-12-07 10:50:32,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:50:32,383 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 10:50:32,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:50:33,194 INFO L225 Difference]: With dead ends: 298473 [2019-12-07 10:50:33,194 INFO L226 Difference]: Without dead ends: 298473 [2019-12-07 10:50:33,194 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:50:43,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298473 states. [2019-12-07 10:50:47,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298473 to 237826. [2019-12-07 10:50:47,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237826 states. [2019-12-07 10:50:48,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237826 states to 237826 states and 988542 transitions. [2019-12-07 10:50:48,245 INFO L78 Accepts]: Start accepts. Automaton has 237826 states and 988542 transitions. Word has length 16 [2019-12-07 10:50:48,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:50:48,246 INFO L462 AbstractCegarLoop]: Abstraction has 237826 states and 988542 transitions. [2019-12-07 10:50:48,246 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:50:48,246 INFO L276 IsEmpty]: Start isEmpty. Operand 237826 states and 988542 transitions. [2019-12-07 10:50:48,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 10:50:48,258 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:50:48,258 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:50:48,258 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:50:48,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:50:48,259 INFO L82 PathProgramCache]: Analyzing trace with hash -504931817, now seen corresponding path program 1 times [2019-12-07 10:50:48,259 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:50:48,259 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214010153] [2019-12-07 10:50:48,259 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:50:48,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:50:48,307 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:50:48,307 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1214010153] [2019-12-07 10:50:48,307 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:50:48,308 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:50:48,308 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [640829895] [2019-12-07 10:50:48,308 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:50:48,308 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:50:48,308 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:50:48,308 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:50:48,309 INFO L87 Difference]: Start difference. First operand 237826 states and 988542 transitions. Second operand 3 states. [2019-12-07 10:50:49,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:50:49,411 INFO L93 Difference]: Finished difference Result 237826 states and 978678 transitions. [2019-12-07 10:50:49,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:50:49,412 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 10:50:49,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:50:50,548 INFO L225 Difference]: With dead ends: 237826 [2019-12-07 10:50:50,548 INFO L226 Difference]: Without dead ends: 237826 [2019-12-07 10:50:50,548 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:50:57,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237826 states. [2019-12-07 10:51:00,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237826 to 234480. [2019-12-07 10:51:00,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234480 states. [2019-12-07 10:51:01,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234480 states to 234480 states and 966258 transitions. [2019-12-07 10:51:01,327 INFO L78 Accepts]: Start accepts. Automaton has 234480 states and 966258 transitions. Word has length 18 [2019-12-07 10:51:01,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:01,328 INFO L462 AbstractCegarLoop]: Abstraction has 234480 states and 966258 transitions. [2019-12-07 10:51:01,328 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:51:01,328 INFO L276 IsEmpty]: Start isEmpty. Operand 234480 states and 966258 transitions. [2019-12-07 10:51:01,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 10:51:01,338 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:01,339 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:01,339 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:01,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:01,339 INFO L82 PathProgramCache]: Analyzing trace with hash 138207619, now seen corresponding path program 1 times [2019-12-07 10:51:01,339 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:01,339 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [57023369] [2019-12-07 10:51:01,339 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:01,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:01,374 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:01,375 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [57023369] [2019-12-07 10:51:01,375 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:01,375 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:51:01,375 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2127239939] [2019-12-07 10:51:01,375 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:51:01,375 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:01,375 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:51:01,375 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:51:01,376 INFO L87 Difference]: Start difference. First operand 234480 states and 966258 transitions. Second operand 3 states. [2019-12-07 10:51:01,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:01,502 INFO L93 Difference]: Finished difference Result 42613 states and 138837 transitions. [2019-12-07 10:51:01,503 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:51:01,503 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 10:51:01,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:01,567 INFO L225 Difference]: With dead ends: 42613 [2019-12-07 10:51:01,567 INFO L226 Difference]: Without dead ends: 42613 [2019-12-07 10:51:01,567 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:51:01,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42613 states. [2019-12-07 10:51:02,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42613 to 42613. [2019-12-07 10:51:02,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42613 states. [2019-12-07 10:51:02,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42613 states to 42613 states and 138837 transitions. [2019-12-07 10:51:02,295 INFO L78 Accepts]: Start accepts. Automaton has 42613 states and 138837 transitions. Word has length 18 [2019-12-07 10:51:02,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:02,295 INFO L462 AbstractCegarLoop]: Abstraction has 42613 states and 138837 transitions. [2019-12-07 10:51:02,295 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:51:02,296 INFO L276 IsEmpty]: Start isEmpty. Operand 42613 states and 138837 transitions. [2019-12-07 10:51:02,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 10:51:02,302 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:02,302 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:02,302 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:02,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:02,302 INFO L82 PathProgramCache]: Analyzing trace with hash -187432510, now seen corresponding path program 1 times [2019-12-07 10:51:02,302 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:02,302 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1419336984] [2019-12-07 10:51:02,303 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:02,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:02,345 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:02,345 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1419336984] [2019-12-07 10:51:02,346 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:02,346 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:51:02,346 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [963657212] [2019-12-07 10:51:02,346 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:51:02,346 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:02,346 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:51:02,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:51:02,346 INFO L87 Difference]: Start difference. First operand 42613 states and 138837 transitions. Second operand 6 states. [2019-12-07 10:51:03,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:03,751 INFO L93 Difference]: Finished difference Result 65056 states and 205947 transitions. [2019-12-07 10:51:03,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 10:51:03,752 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 10:51:03,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:03,850 INFO L225 Difference]: With dead ends: 65056 [2019-12-07 10:51:03,851 INFO L226 Difference]: Without dead ends: 65042 [2019-12-07 10:51:03,851 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:51:04,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65042 states. [2019-12-07 10:51:04,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65042 to 42278. [2019-12-07 10:51:04,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42278 states. [2019-12-07 10:51:04,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42278 states to 42278 states and 137592 transitions. [2019-12-07 10:51:04,759 INFO L78 Accepts]: Start accepts. Automaton has 42278 states and 137592 transitions. Word has length 22 [2019-12-07 10:51:04,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:04,759 INFO L462 AbstractCegarLoop]: Abstraction has 42278 states and 137592 transitions. [2019-12-07 10:51:04,760 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:51:04,760 INFO L276 IsEmpty]: Start isEmpty. Operand 42278 states and 137592 transitions. [2019-12-07 10:51:04,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 10:51:04,770 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:04,770 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:04,770 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:04,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:04,770 INFO L82 PathProgramCache]: Analyzing trace with hash -200714255, now seen corresponding path program 1 times [2019-12-07 10:51:04,770 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:04,771 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [428436592] [2019-12-07 10:51:04,771 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:04,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:04,854 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:04,855 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [428436592] [2019-12-07 10:51:04,855 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:04,855 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:51:04,855 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [676718213] [2019-12-07 10:51:04,855 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 10:51:04,855 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:04,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 10:51:04,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:51:04,856 INFO L87 Difference]: Start difference. First operand 42278 states and 137592 transitions. Second operand 7 states. [2019-12-07 10:51:05,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:05,326 INFO L93 Difference]: Finished difference Result 59726 states and 189950 transitions. [2019-12-07 10:51:05,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 10:51:05,327 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 25 [2019-12-07 10:51:05,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:05,416 INFO L225 Difference]: With dead ends: 59726 [2019-12-07 10:51:05,416 INFO L226 Difference]: Without dead ends: 59700 [2019-12-07 10:51:05,416 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:51:05,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59700 states. [2019-12-07 10:51:06,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59700 to 50129. [2019-12-07 10:51:06,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50129 states. [2019-12-07 10:51:06,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50129 states to 50129 states and 162181 transitions. [2019-12-07 10:51:06,468 INFO L78 Accepts]: Start accepts. Automaton has 50129 states and 162181 transitions. Word has length 25 [2019-12-07 10:51:06,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:06,469 INFO L462 AbstractCegarLoop]: Abstraction has 50129 states and 162181 transitions. [2019-12-07 10:51:06,469 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 10:51:06,469 INFO L276 IsEmpty]: Start isEmpty. Operand 50129 states and 162181 transitions. [2019-12-07 10:51:06,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 10:51:06,485 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:06,485 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:06,485 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:06,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:06,486 INFO L82 PathProgramCache]: Analyzing trace with hash 611460705, now seen corresponding path program 1 times [2019-12-07 10:51:06,486 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:06,486 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1691668406] [2019-12-07 10:51:06,486 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:06,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:06,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:06,531 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1691668406] [2019-12-07 10:51:06,531 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:06,531 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:51:06,532 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1951403168] [2019-12-07 10:51:06,532 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:51:06,532 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:06,532 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:51:06,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:51:06,532 INFO L87 Difference]: Start difference. First operand 50129 states and 162181 transitions. Second operand 6 states. [2019-12-07 10:51:07,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:07,011 INFO L93 Difference]: Finished difference Result 71592 states and 224983 transitions. [2019-12-07 10:51:07,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 10:51:07,011 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 10:51:07,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:07,117 INFO L225 Difference]: With dead ends: 71592 [2019-12-07 10:51:07,117 INFO L226 Difference]: Without dead ends: 71508 [2019-12-07 10:51:07,117 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 10:51:07,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71508 states. [2019-12-07 10:51:08,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71508 to 53724. [2019-12-07 10:51:08,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53724 states. [2019-12-07 10:51:08,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53724 states to 53724 states and 172706 transitions. [2019-12-07 10:51:08,222 INFO L78 Accepts]: Start accepts. Automaton has 53724 states and 172706 transitions. Word has length 27 [2019-12-07 10:51:08,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:08,222 INFO L462 AbstractCegarLoop]: Abstraction has 53724 states and 172706 transitions. [2019-12-07 10:51:08,222 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:51:08,222 INFO L276 IsEmpty]: Start isEmpty. Operand 53724 states and 172706 transitions. [2019-12-07 10:51:08,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 10:51:08,243 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:08,243 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:08,243 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:08,243 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:08,243 INFO L82 PathProgramCache]: Analyzing trace with hash -969078927, now seen corresponding path program 1 times [2019-12-07 10:51:08,244 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:08,244 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [6039359] [2019-12-07 10:51:08,244 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:08,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:08,284 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:08,284 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [6039359] [2019-12-07 10:51:08,284 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:08,284 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:51:08,284 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1823616532] [2019-12-07 10:51:08,284 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:51:08,285 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:08,285 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:51:08,285 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:51:08,285 INFO L87 Difference]: Start difference. First operand 53724 states and 172706 transitions. Second operand 4 states. [2019-12-07 10:51:08,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:08,346 INFO L93 Difference]: Finished difference Result 20754 states and 64022 transitions. [2019-12-07 10:51:08,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:51:08,346 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 10:51:08,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:08,371 INFO L225 Difference]: With dead ends: 20754 [2019-12-07 10:51:08,371 INFO L226 Difference]: Without dead ends: 20754 [2019-12-07 10:51:08,372 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:51:08,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20754 states. [2019-12-07 10:51:08,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20754 to 19543. [2019-12-07 10:51:08,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19543 states. [2019-12-07 10:51:08,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19543 states to 19543 states and 60338 transitions. [2019-12-07 10:51:08,767 INFO L78 Accepts]: Start accepts. Automaton has 19543 states and 60338 transitions. Word has length 29 [2019-12-07 10:51:08,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:08,767 INFO L462 AbstractCegarLoop]: Abstraction has 19543 states and 60338 transitions. [2019-12-07 10:51:08,767 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:51:08,767 INFO L276 IsEmpty]: Start isEmpty. Operand 19543 states and 60338 transitions. [2019-12-07 10:51:08,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 10:51:08,785 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:08,786 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:08,786 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:08,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:08,786 INFO L82 PathProgramCache]: Analyzing trace with hash -1170391984, now seen corresponding path program 1 times [2019-12-07 10:51:08,786 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:08,786 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1755492118] [2019-12-07 10:51:08,786 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:08,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:08,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:08,832 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1755492118] [2019-12-07 10:51:08,832 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:08,833 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:51:08,833 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1771249726] [2019-12-07 10:51:08,833 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 10:51:08,833 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:08,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 10:51:08,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:51:08,834 INFO L87 Difference]: Start difference. First operand 19543 states and 60338 transitions. Second operand 7 states. [2019-12-07 10:51:09,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:09,534 INFO L93 Difference]: Finished difference Result 27225 states and 81337 transitions. [2019-12-07 10:51:09,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 10:51:09,535 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 10:51:09,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:09,566 INFO L225 Difference]: With dead ends: 27225 [2019-12-07 10:51:09,567 INFO L226 Difference]: Without dead ends: 27225 [2019-12-07 10:51:09,567 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 10:51:09,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27225 states. [2019-12-07 10:51:09,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27225 to 19532. [2019-12-07 10:51:09,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19532 states. [2019-12-07 10:51:09,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19532 states to 19532 states and 60108 transitions. [2019-12-07 10:51:09,922 INFO L78 Accepts]: Start accepts. Automaton has 19532 states and 60108 transitions. Word has length 33 [2019-12-07 10:51:09,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:09,922 INFO L462 AbstractCegarLoop]: Abstraction has 19532 states and 60108 transitions. [2019-12-07 10:51:09,922 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 10:51:09,922 INFO L276 IsEmpty]: Start isEmpty. Operand 19532 states and 60108 transitions. [2019-12-07 10:51:09,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 10:51:09,939 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:09,939 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:09,939 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:09,939 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:09,940 INFO L82 PathProgramCache]: Analyzing trace with hash 1293540528, now seen corresponding path program 1 times [2019-12-07 10:51:09,940 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:09,940 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [793253443] [2019-12-07 10:51:09,940 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:09,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:09,988 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:09,988 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [793253443] [2019-12-07 10:51:09,988 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:09,988 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:51:09,988 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2086264739] [2019-12-07 10:51:09,989 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:51:09,989 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:09,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:51:09,989 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:51:09,989 INFO L87 Difference]: Start difference. First operand 19532 states and 60108 transitions. Second operand 3 states. [2019-12-07 10:51:10,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:10,045 INFO L93 Difference]: Finished difference Result 18664 states and 56622 transitions. [2019-12-07 10:51:10,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:51:10,045 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 10:51:10,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:10,067 INFO L225 Difference]: With dead ends: 18664 [2019-12-07 10:51:10,067 INFO L226 Difference]: Without dead ends: 18664 [2019-12-07 10:51:10,067 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:51:10,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18664 states. [2019-12-07 10:51:10,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18664 to 18390. [2019-12-07 10:51:10,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18390 states. [2019-12-07 10:51:10,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18390 states to 18390 states and 55854 transitions. [2019-12-07 10:51:10,335 INFO L78 Accepts]: Start accepts. Automaton has 18390 states and 55854 transitions. Word has length 40 [2019-12-07 10:51:10,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:10,335 INFO L462 AbstractCegarLoop]: Abstraction has 18390 states and 55854 transitions. [2019-12-07 10:51:10,335 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:51:10,335 INFO L276 IsEmpty]: Start isEmpty. Operand 18390 states and 55854 transitions. [2019-12-07 10:51:10,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 10:51:10,350 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:10,350 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:10,350 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:10,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:10,351 INFO L82 PathProgramCache]: Analyzing trace with hash -448595313, now seen corresponding path program 1 times [2019-12-07 10:51:10,351 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:10,351 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682425158] [2019-12-07 10:51:10,351 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:10,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:10,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:10,393 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [682425158] [2019-12-07 10:51:10,393 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:10,393 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:51:10,393 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [811972181] [2019-12-07 10:51:10,394 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:51:10,394 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:10,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:51:10,394 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:51:10,394 INFO L87 Difference]: Start difference. First operand 18390 states and 55854 transitions. Second operand 5 states. [2019-12-07 10:51:10,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:10,455 INFO L93 Difference]: Finished difference Result 16867 states and 52454 transitions. [2019-12-07 10:51:10,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:51:10,456 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 10:51:10,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:10,476 INFO L225 Difference]: With dead ends: 16867 [2019-12-07 10:51:10,476 INFO L226 Difference]: Without dead ends: 16867 [2019-12-07 10:51:10,476 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:51:10,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16867 states. [2019-12-07 10:51:10,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16867 to 15238. [2019-12-07 10:51:10,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15238 states. [2019-12-07 10:51:10,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15238 states to 15238 states and 47616 transitions. [2019-12-07 10:51:10,729 INFO L78 Accepts]: Start accepts. Automaton has 15238 states and 47616 transitions. Word has length 41 [2019-12-07 10:51:10,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:10,730 INFO L462 AbstractCegarLoop]: Abstraction has 15238 states and 47616 transitions. [2019-12-07 10:51:10,730 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:51:10,730 INFO L276 IsEmpty]: Start isEmpty. Operand 15238 states and 47616 transitions. [2019-12-07 10:51:10,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:51:10,745 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:10,745 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:10,745 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:10,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:10,746 INFO L82 PathProgramCache]: Analyzing trace with hash 1623524162, now seen corresponding path program 1 times [2019-12-07 10:51:10,746 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:10,746 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [919017274] [2019-12-07 10:51:10,746 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:10,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:10,790 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:10,790 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [919017274] [2019-12-07 10:51:10,790 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:10,790 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:51:10,790 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1320008222] [2019-12-07 10:51:10,791 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:51:10,791 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:10,791 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:51:10,791 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:51:10,791 INFO L87 Difference]: Start difference. First operand 15238 states and 47616 transitions. Second operand 3 states. [2019-12-07 10:51:10,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:10,885 INFO L93 Difference]: Finished difference Result 18380 states and 57153 transitions. [2019-12-07 10:51:10,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:51:10,886 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 10:51:10,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:10,908 INFO L225 Difference]: With dead ends: 18380 [2019-12-07 10:51:10,908 INFO L226 Difference]: Without dead ends: 18380 [2019-12-07 10:51:10,908 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:51:10,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18380 states. [2019-12-07 10:51:11,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18380 to 15494. [2019-12-07 10:51:11,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15494 states. [2019-12-07 10:51:11,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15494 states to 15494 states and 48492 transitions. [2019-12-07 10:51:11,167 INFO L78 Accepts]: Start accepts. Automaton has 15494 states and 48492 transitions. Word has length 66 [2019-12-07 10:51:11,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:11,167 INFO L462 AbstractCegarLoop]: Abstraction has 15494 states and 48492 transitions. [2019-12-07 10:51:11,167 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:51:11,167 INFO L276 IsEmpty]: Start isEmpty. Operand 15494 states and 48492 transitions. [2019-12-07 10:51:11,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:11,183 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:11,183 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:11,183 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:11,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:11,183 INFO L82 PathProgramCache]: Analyzing trace with hash 600429612, now seen corresponding path program 1 times [2019-12-07 10:51:11,183 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:11,183 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [878460198] [2019-12-07 10:51:11,183 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:11,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:11,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:11,230 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [878460198] [2019-12-07 10:51:11,230 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:11,230 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:51:11,231 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [275957554] [2019-12-07 10:51:11,231 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:51:11,231 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:11,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:51:11,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:51:11,231 INFO L87 Difference]: Start difference. First operand 15494 states and 48492 transitions. Second operand 4 states. [2019-12-07 10:51:11,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:11,322 INFO L93 Difference]: Finished difference Result 18353 states and 57063 transitions. [2019-12-07 10:51:11,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:51:11,322 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 10:51:11,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:11,342 INFO L225 Difference]: With dead ends: 18353 [2019-12-07 10:51:11,342 INFO L226 Difference]: Without dead ends: 18353 [2019-12-07 10:51:11,343 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:51:11,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18353 states. [2019-12-07 10:51:11,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18353 to 15150. [2019-12-07 10:51:11,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15150 states. [2019-12-07 10:51:11,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15150 states to 15150 states and 47431 transitions. [2019-12-07 10:51:11,617 INFO L78 Accepts]: Start accepts. Automaton has 15150 states and 47431 transitions. Word has length 67 [2019-12-07 10:51:11,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:11,617 INFO L462 AbstractCegarLoop]: Abstraction has 15150 states and 47431 transitions. [2019-12-07 10:51:11,617 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:51:11,617 INFO L276 IsEmpty]: Start isEmpty. Operand 15150 states and 47431 transitions. [2019-12-07 10:51:11,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:11,630 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:11,630 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:11,631 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:11,631 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:11,631 INFO L82 PathProgramCache]: Analyzing trace with hash 384042528, now seen corresponding path program 1 times [2019-12-07 10:51:11,631 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:11,631 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [332283123] [2019-12-07 10:51:11,631 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:11,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:11,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:11,914 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [332283123] [2019-12-07 10:51:11,914 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:11,915 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 10:51:11,915 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [883346822] [2019-12-07 10:51:11,915 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 10:51:11,915 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:11,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 10:51:11,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2019-12-07 10:51:11,915 INFO L87 Difference]: Start difference. First operand 15150 states and 47431 transitions. Second operand 15 states. [2019-12-07 10:51:13,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:13,500 INFO L93 Difference]: Finished difference Result 26608 states and 82068 transitions. [2019-12-07 10:51:13,500 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 10:51:13,501 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 10:51:13,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:13,532 INFO L225 Difference]: With dead ends: 26608 [2019-12-07 10:51:13,532 INFO L226 Difference]: Without dead ends: 19579 [2019-12-07 10:51:13,533 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 177 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=182, Invalid=940, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 10:51:13,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19579 states. [2019-12-07 10:51:13,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19579 to 17238. [2019-12-07 10:51:13,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17238 states. [2019-12-07 10:51:13,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17238 states to 17238 states and 53847 transitions. [2019-12-07 10:51:13,815 INFO L78 Accepts]: Start accepts. Automaton has 17238 states and 53847 transitions. Word has length 67 [2019-12-07 10:51:13,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:13,816 INFO L462 AbstractCegarLoop]: Abstraction has 17238 states and 53847 transitions. [2019-12-07 10:51:13,816 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 10:51:13,816 INFO L276 IsEmpty]: Start isEmpty. Operand 17238 states and 53847 transitions. [2019-12-07 10:51:13,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:13,831 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:13,832 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:13,832 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:13,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:13,832 INFO L82 PathProgramCache]: Analyzing trace with hash 1244941018, now seen corresponding path program 2 times [2019-12-07 10:51:13,832 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:13,832 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1128585751] [2019-12-07 10:51:13,832 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:13,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:14,118 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:14,118 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1128585751] [2019-12-07 10:51:14,118 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:14,119 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 10:51:14,119 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [891910368] [2019-12-07 10:51:14,119 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 10:51:14,119 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:14,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 10:51:14,120 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2019-12-07 10:51:14,120 INFO L87 Difference]: Start difference. First operand 17238 states and 53847 transitions. Second operand 15 states. [2019-12-07 10:51:15,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:15,798 INFO L93 Difference]: Finished difference Result 29554 states and 90516 transitions. [2019-12-07 10:51:15,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 10:51:15,798 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 10:51:15,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:15,823 INFO L225 Difference]: With dead ends: 29554 [2019-12-07 10:51:15,823 INFO L226 Difference]: Without dead ends: 22011 [2019-12-07 10:51:15,824 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 214 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=210, Invalid=1050, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 10:51:15,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22011 states. [2019-12-07 10:51:16,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22011 to 17162. [2019-12-07 10:51:16,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17162 states. [2019-12-07 10:51:16,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17162 states to 17162 states and 53426 transitions. [2019-12-07 10:51:16,116 INFO L78 Accepts]: Start accepts. Automaton has 17162 states and 53426 transitions. Word has length 67 [2019-12-07 10:51:16,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:16,116 INFO L462 AbstractCegarLoop]: Abstraction has 17162 states and 53426 transitions. [2019-12-07 10:51:16,116 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 10:51:16,116 INFO L276 IsEmpty]: Start isEmpty. Operand 17162 states and 53426 transitions. [2019-12-07 10:51:16,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:16,174 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:16,174 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:16,174 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:16,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:16,174 INFO L82 PathProgramCache]: Analyzing trace with hash 997305174, now seen corresponding path program 3 times [2019-12-07 10:51:16,174 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:16,175 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644222083] [2019-12-07 10:51:16,175 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:16,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:16,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:16,305 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [644222083] [2019-12-07 10:51:16,305 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:16,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 10:51:16,305 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1355162526] [2019-12-07 10:51:16,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 10:51:16,305 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:16,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 10:51:16,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 10:51:16,305 INFO L87 Difference]: Start difference. First operand 17162 states and 53426 transitions. Second operand 10 states. [2019-12-07 10:51:17,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:17,479 INFO L93 Difference]: Finished difference Result 36857 states and 114967 transitions. [2019-12-07 10:51:17,480 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 10:51:17,480 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 10:51:17,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:17,513 INFO L225 Difference]: With dead ends: 36857 [2019-12-07 10:51:17,513 INFO L226 Difference]: Without dead ends: 26313 [2019-12-07 10:51:17,513 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 104 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=134, Invalid=516, Unknown=0, NotChecked=0, Total=650 [2019-12-07 10:51:17,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26313 states. [2019-12-07 10:51:17,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26313 to 18630. [2019-12-07 10:51:17,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18630 states. [2019-12-07 10:51:17,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18630 states to 18630 states and 57966 transitions. [2019-12-07 10:51:17,854 INFO L78 Accepts]: Start accepts. Automaton has 18630 states and 57966 transitions. Word has length 67 [2019-12-07 10:51:17,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:17,855 INFO L462 AbstractCegarLoop]: Abstraction has 18630 states and 57966 transitions. [2019-12-07 10:51:17,855 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 10:51:17,855 INFO L276 IsEmpty]: Start isEmpty. Operand 18630 states and 57966 transitions. [2019-12-07 10:51:17,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:17,871 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:17,871 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:17,871 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:17,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:17,872 INFO L82 PathProgramCache]: Analyzing trace with hash -1415619376, now seen corresponding path program 4 times [2019-12-07 10:51:17,872 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:17,872 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1496089721] [2019-12-07 10:51:17,872 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:17,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:18,307 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:18,307 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1496089721] [2019-12-07 10:51:18,307 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:18,308 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 10:51:18,308 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1061911441] [2019-12-07 10:51:18,308 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 10:51:18,308 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:18,308 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 10:51:18,308 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=266, Unknown=0, NotChecked=0, Total=306 [2019-12-07 10:51:18,308 INFO L87 Difference]: Start difference. First operand 18630 states and 57966 transitions. Second operand 18 states. [2019-12-07 10:51:21,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:21,234 INFO L93 Difference]: Finished difference Result 25566 states and 78508 transitions. [2019-12-07 10:51:21,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 10:51:21,235 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 67 [2019-12-07 10:51:21,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:21,260 INFO L225 Difference]: With dead ends: 25566 [2019-12-07 10:51:21,260 INFO L226 Difference]: Without dead ends: 22083 [2019-12-07 10:51:21,261 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 160 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=171, Invalid=951, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 10:51:21,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22083 states. [2019-12-07 10:51:21,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22083 to 18630. [2019-12-07 10:51:21,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18630 states. [2019-12-07 10:51:21,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18630 states to 18630 states and 57966 transitions. [2019-12-07 10:51:21,562 INFO L78 Accepts]: Start accepts. Automaton has 18630 states and 57966 transitions. Word has length 67 [2019-12-07 10:51:21,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:21,562 INFO L462 AbstractCegarLoop]: Abstraction has 18630 states and 57966 transitions. [2019-12-07 10:51:21,562 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 10:51:21,563 INFO L276 IsEmpty]: Start isEmpty. Operand 18630 states and 57966 transitions. [2019-12-07 10:51:21,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:21,579 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:21,579 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:21,579 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:21,580 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:21,580 INFO L82 PathProgramCache]: Analyzing trace with hash 1908292690, now seen corresponding path program 5 times [2019-12-07 10:51:21,580 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:21,580 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1073631165] [2019-12-07 10:51:21,580 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:21,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:21,892 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:21,892 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1073631165] [2019-12-07 10:51:21,892 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:21,892 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 10:51:21,892 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [919577219] [2019-12-07 10:51:21,892 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 10:51:21,892 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:21,893 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 10:51:21,893 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=234, Unknown=0, NotChecked=0, Total=272 [2019-12-07 10:51:21,893 INFO L87 Difference]: Start difference. First operand 18630 states and 57966 transitions. Second operand 17 states. [2019-12-07 10:51:23,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:23,781 INFO L93 Difference]: Finished difference Result 23970 states and 73647 transitions. [2019-12-07 10:51:23,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 10:51:23,782 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 10:51:23,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:23,819 INFO L225 Difference]: With dead ends: 23970 [2019-12-07 10:51:23,819 INFO L226 Difference]: Without dead ends: 19883 [2019-12-07 10:51:23,820 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=118, Invalid=694, Unknown=0, NotChecked=0, Total=812 [2019-12-07 10:51:23,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19883 states. [2019-12-07 10:51:24,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19883 to 18646. [2019-12-07 10:51:24,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18646 states. [2019-12-07 10:51:24,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18646 states to 18646 states and 58006 transitions. [2019-12-07 10:51:24,111 INFO L78 Accepts]: Start accepts. Automaton has 18646 states and 58006 transitions. Word has length 67 [2019-12-07 10:51:24,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:24,112 INFO L462 AbstractCegarLoop]: Abstraction has 18646 states and 58006 transitions. [2019-12-07 10:51:24,112 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 10:51:24,112 INFO L276 IsEmpty]: Start isEmpty. Operand 18646 states and 58006 transitions. [2019-12-07 10:51:24,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:24,129 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:24,129 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:24,129 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:24,129 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:24,130 INFO L82 PathProgramCache]: Analyzing trace with hash 1073573524, now seen corresponding path program 6 times [2019-12-07 10:51:24,130 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:24,130 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1135256269] [2019-12-07 10:51:24,130 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:24,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:24,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:24,494 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1135256269] [2019-12-07 10:51:24,494 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:24,494 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 10:51:24,495 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [333394139] [2019-12-07 10:51:24,495 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 10:51:24,495 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:24,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 10:51:24,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=208, Unknown=0, NotChecked=0, Total=240 [2019-12-07 10:51:24,495 INFO L87 Difference]: Start difference. First operand 18646 states and 58006 transitions. Second operand 16 states. [2019-12-07 10:51:27,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:27,517 INFO L93 Difference]: Finished difference Result 21670 states and 66613 transitions. [2019-12-07 10:51:27,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 10:51:27,518 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 10:51:27,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:27,539 INFO L225 Difference]: With dead ends: 21670 [2019-12-07 10:51:27,539 INFO L226 Difference]: Without dead ends: 19427 [2019-12-07 10:51:27,539 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=103, Invalid=599, Unknown=0, NotChecked=0, Total=702 [2019-12-07 10:51:27,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19427 states. [2019-12-07 10:51:27,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19427 to 18650. [2019-12-07 10:51:27,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18650 states. [2019-12-07 10:51:27,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18650 states to 18650 states and 58013 transitions. [2019-12-07 10:51:27,829 INFO L78 Accepts]: Start accepts. Automaton has 18650 states and 58013 transitions. Word has length 67 [2019-12-07 10:51:27,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:27,829 INFO L462 AbstractCegarLoop]: Abstraction has 18650 states and 58013 transitions. [2019-12-07 10:51:27,829 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 10:51:27,829 INFO L276 IsEmpty]: Start isEmpty. Operand 18650 states and 58013 transitions. [2019-12-07 10:51:27,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:27,847 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:27,847 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:27,847 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:27,847 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:27,848 INFO L82 PathProgramCache]: Analyzing trace with hash 747699432, now seen corresponding path program 7 times [2019-12-07 10:51:27,848 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:27,848 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [849550953] [2019-12-07 10:51:27,848 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:27,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:28,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:28,144 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [849550953] [2019-12-07 10:51:28,144 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:28,144 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 10:51:28,144 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2055717530] [2019-12-07 10:51:28,144 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 10:51:28,144 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:28,144 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 10:51:28,145 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-12-07 10:51:28,145 INFO L87 Difference]: Start difference. First operand 18650 states and 58013 transitions. Second operand 16 states. [2019-12-07 10:51:30,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:30,617 INFO L93 Difference]: Finished difference Result 22354 states and 68778 transitions. [2019-12-07 10:51:30,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 10:51:30,617 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 10:51:30,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:30,639 INFO L225 Difference]: With dead ends: 22354 [2019-12-07 10:51:30,639 INFO L226 Difference]: Without dead ends: 19991 [2019-12-07 10:51:30,640 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=117, Invalid=695, Unknown=0, NotChecked=0, Total=812 [2019-12-07 10:51:30,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19991 states. [2019-12-07 10:51:30,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19991 to 18782. [2019-12-07 10:51:30,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18782 states. [2019-12-07 10:51:30,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18782 states to 18782 states and 58383 transitions. [2019-12-07 10:51:30,962 INFO L78 Accepts]: Start accepts. Automaton has 18782 states and 58383 transitions. Word has length 67 [2019-12-07 10:51:30,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:30,962 INFO L462 AbstractCegarLoop]: Abstraction has 18782 states and 58383 transitions. [2019-12-07 10:51:30,962 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 10:51:30,962 INFO L276 IsEmpty]: Start isEmpty. Operand 18782 states and 58383 transitions. [2019-12-07 10:51:30,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:30,980 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:30,980 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:30,980 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:30,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:30,980 INFO L82 PathProgramCache]: Analyzing trace with hash -1960092862, now seen corresponding path program 8 times [2019-12-07 10:51:30,980 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:30,980 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1243070037] [2019-12-07 10:51:30,981 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:30,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:31,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:31,092 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1243070037] [2019-12-07 10:51:31,093 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:31,093 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 10:51:31,093 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1008438474] [2019-12-07 10:51:31,093 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 10:51:31,093 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:31,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 10:51:31,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 10:51:31,094 INFO L87 Difference]: Start difference. First operand 18782 states and 58383 transitions. Second operand 10 states. [2019-12-07 10:51:32,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:32,153 INFO L93 Difference]: Finished difference Result 31708 states and 97951 transitions. [2019-12-07 10:51:32,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 10:51:32,153 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 10:51:32,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:32,187 INFO L225 Difference]: With dead ends: 31708 [2019-12-07 10:51:32,187 INFO L226 Difference]: Without dead ends: 27133 [2019-12-07 10:51:32,187 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=241, Unknown=0, NotChecked=0, Total=306 [2019-12-07 10:51:32,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27133 states. [2019-12-07 10:51:32,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27133 to 19090. [2019-12-07 10:51:32,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19090 states. [2019-12-07 10:51:32,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19090 states to 19090 states and 59230 transitions. [2019-12-07 10:51:32,543 INFO L78 Accepts]: Start accepts. Automaton has 19090 states and 59230 transitions. Word has length 67 [2019-12-07 10:51:32,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:32,544 INFO L462 AbstractCegarLoop]: Abstraction has 19090 states and 59230 transitions. [2019-12-07 10:51:32,544 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 10:51:32,544 INFO L276 IsEmpty]: Start isEmpty. Operand 19090 states and 59230 transitions. [2019-12-07 10:51:32,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:32,561 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:32,562 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:32,562 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:32,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:32,562 INFO L82 PathProgramCache]: Analyzing trace with hash 993635084, now seen corresponding path program 9 times [2019-12-07 10:51:32,562 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:32,562 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [16742901] [2019-12-07 10:51:32,562 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:32,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:32,673 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:32,673 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [16742901] [2019-12-07 10:51:32,673 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:32,674 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:51:32,674 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1189551530] [2019-12-07 10:51:32,674 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:51:32,674 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:32,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:51:32,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:51:32,674 INFO L87 Difference]: Start difference. First operand 19090 states and 59230 transitions. Second operand 11 states. [2019-12-07 10:51:34,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:34,951 INFO L93 Difference]: Finished difference Result 33883 states and 103895 transitions. [2019-12-07 10:51:34,951 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 10:51:34,951 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 10:51:34,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:34,983 INFO L225 Difference]: With dead ends: 33883 [2019-12-07 10:51:34,983 INFO L226 Difference]: Without dead ends: 26135 [2019-12-07 10:51:34,983 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=140, Invalid=616, Unknown=0, NotChecked=0, Total=756 [2019-12-07 10:51:35,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26135 states. [2019-12-07 10:51:35,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26135 to 18026. [2019-12-07 10:51:35,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18026 states. [2019-12-07 10:51:35,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18026 states to 18026 states and 55934 transitions. [2019-12-07 10:51:35,327 INFO L78 Accepts]: Start accepts. Automaton has 18026 states and 55934 transitions. Word has length 67 [2019-12-07 10:51:35,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:35,327 INFO L462 AbstractCegarLoop]: Abstraction has 18026 states and 55934 transitions. [2019-12-07 10:51:35,327 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:51:35,328 INFO L276 IsEmpty]: Start isEmpty. Operand 18026 states and 55934 transitions. [2019-12-07 10:51:35,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:35,344 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:35,344 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:35,344 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:35,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:35,345 INFO L82 PathProgramCache]: Analyzing trace with hash 397917466, now seen corresponding path program 10 times [2019-12-07 10:51:35,345 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:35,345 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1084440995] [2019-12-07 10:51:35,345 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:35,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:35,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:35,441 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1084440995] [2019-12-07 10:51:35,441 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:35,441 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:51:35,442 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1531759625] [2019-12-07 10:51:35,442 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:51:35,442 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:35,442 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:51:35,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:51:35,442 INFO L87 Difference]: Start difference. First operand 18026 states and 55934 transitions. Second operand 11 states. [2019-12-07 10:51:37,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:37,768 INFO L93 Difference]: Finished difference Result 28296 states and 87463 transitions. [2019-12-07 10:51:37,769 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 10:51:37,769 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 10:51:37,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:37,815 INFO L225 Difference]: With dead ends: 28296 [2019-12-07 10:51:37,816 INFO L226 Difference]: Without dead ends: 25223 [2019-12-07 10:51:37,816 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=92, Invalid=414, Unknown=0, NotChecked=0, Total=506 [2019-12-07 10:51:37,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25223 states. [2019-12-07 10:51:38,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25223 to 18248. [2019-12-07 10:51:38,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18248 states. [2019-12-07 10:51:38,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18248 states to 18248 states and 56516 transitions. [2019-12-07 10:51:38,170 INFO L78 Accepts]: Start accepts. Automaton has 18248 states and 56516 transitions. Word has length 67 [2019-12-07 10:51:38,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:38,170 INFO L462 AbstractCegarLoop]: Abstraction has 18248 states and 56516 transitions. [2019-12-07 10:51:38,170 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:51:38,171 INFO L276 IsEmpty]: Start isEmpty. Operand 18248 states and 56516 transitions. [2019-12-07 10:51:38,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:38,188 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:38,188 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:38,188 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:38,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:38,189 INFO L82 PathProgramCache]: Analyzing trace with hash 1803113718, now seen corresponding path program 11 times [2019-12-07 10:51:38,189 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:38,189 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1213337635] [2019-12-07 10:51:38,189 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:38,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:38,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:38,291 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1213337635] [2019-12-07 10:51:38,291 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:38,291 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:51:38,291 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1234221485] [2019-12-07 10:51:38,291 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:51:38,291 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:38,291 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:51:38,291 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:51:38,292 INFO L87 Difference]: Start difference. First operand 18248 states and 56516 transitions. Second operand 12 states. [2019-12-07 10:51:40,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:40,575 INFO L93 Difference]: Finished difference Result 26870 states and 82964 transitions. [2019-12-07 10:51:40,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 10:51:40,576 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 10:51:40,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:40,623 INFO L225 Difference]: With dead ends: 26870 [2019-12-07 10:51:40,624 INFO L226 Difference]: Without dead ends: 25679 [2019-12-07 10:51:40,624 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=378, Unknown=0, NotChecked=0, Total=462 [2019-12-07 10:51:40,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25679 states. [2019-12-07 10:51:40,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25679 to 18116. [2019-12-07 10:51:40,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18116 states. [2019-12-07 10:51:40,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18116 states to 18116 states and 56172 transitions. [2019-12-07 10:51:40,963 INFO L78 Accepts]: Start accepts. Automaton has 18116 states and 56172 transitions. Word has length 67 [2019-12-07 10:51:40,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:40,963 INFO L462 AbstractCegarLoop]: Abstraction has 18116 states and 56172 transitions. [2019-12-07 10:51:40,963 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:51:40,963 INFO L276 IsEmpty]: Start isEmpty. Operand 18116 states and 56172 transitions. [2019-12-07 10:51:40,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:40,980 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:40,980 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:40,981 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:40,981 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:40,981 INFO L82 PathProgramCache]: Analyzing trace with hash 1857250972, now seen corresponding path program 12 times [2019-12-07 10:51:40,981 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:40,981 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [19935221] [2019-12-07 10:51:40,981 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:40,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:41,345 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:41,345 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [19935221] [2019-12-07 10:51:41,345 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:41,345 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 10:51:41,345 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1434491044] [2019-12-07 10:51:41,345 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 10:51:41,345 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:41,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 10:51:41,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=292, Unknown=0, NotChecked=0, Total=342 [2019-12-07 10:51:41,346 INFO L87 Difference]: Start difference. First operand 18116 states and 56172 transitions. Second operand 19 states. [2019-12-07 10:51:52,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:52,741 INFO L93 Difference]: Finished difference Result 33051 states and 102120 transitions. [2019-12-07 10:51:52,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2019-12-07 10:51:52,743 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2019-12-07 10:51:52,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:52,797 INFO L225 Difference]: With dead ends: 33051 [2019-12-07 10:51:52,797 INFO L226 Difference]: Without dead ends: 32020 [2019-12-07 10:51:52,798 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1062 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=574, Invalid=3848, Unknown=0, NotChecked=0, Total=4422 [2019-12-07 10:51:52,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32020 states. [2019-12-07 10:51:53,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32020 to 21271. [2019-12-07 10:51:53,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21271 states. [2019-12-07 10:51:53,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21271 states to 21271 states and 65792 transitions. [2019-12-07 10:51:53,202 INFO L78 Accepts]: Start accepts. Automaton has 21271 states and 65792 transitions. Word has length 67 [2019-12-07 10:51:53,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:53,202 INFO L462 AbstractCegarLoop]: Abstraction has 21271 states and 65792 transitions. [2019-12-07 10:51:53,202 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 10:51:53,202 INFO L276 IsEmpty]: Start isEmpty. Operand 21271 states and 65792 transitions. [2019-12-07 10:51:53,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:53,221 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:53,222 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:53,222 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:53,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:53,222 INFO L82 PathProgramCache]: Analyzing trace with hash 2040469818, now seen corresponding path program 13 times [2019-12-07 10:51:53,222 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:53,222 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [518143531] [2019-12-07 10:51:53,222 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:53,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:53,338 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:53,338 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [518143531] [2019-12-07 10:51:53,339 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:53,339 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:51:53,339 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1793017917] [2019-12-07 10:51:53,339 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:51:53,339 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:53,339 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:51:53,339 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:51:53,339 INFO L87 Difference]: Start difference. First operand 21271 states and 65792 transitions. Second operand 12 states. [2019-12-07 10:51:55,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:55,882 INFO L93 Difference]: Finished difference Result 37733 states and 115450 transitions. [2019-12-07 10:51:55,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 10:51:55,883 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 10:51:55,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:55,933 INFO L225 Difference]: With dead ends: 37733 [2019-12-07 10:51:55,933 INFO L226 Difference]: Without dead ends: 29132 [2019-12-07 10:51:55,934 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 300 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=230, Invalid=1176, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 10:51:56,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29132 states. [2019-12-07 10:51:56,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29132 to 18860. [2019-12-07 10:51:56,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18860 states. [2019-12-07 10:51:56,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18860 states to 18860 states and 58192 transitions. [2019-12-07 10:51:56,302 INFO L78 Accepts]: Start accepts. Automaton has 18860 states and 58192 transitions. Word has length 67 [2019-12-07 10:51:56,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:56,302 INFO L462 AbstractCegarLoop]: Abstraction has 18860 states and 58192 transitions. [2019-12-07 10:51:56,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:51:56,302 INFO L276 IsEmpty]: Start isEmpty. Operand 18860 states and 58192 transitions. [2019-12-07 10:51:56,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:56,319 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:56,320 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:56,320 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:56,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:56,320 INFO L82 PathProgramCache]: Analyzing trace with hash 1823504856, now seen corresponding path program 14 times [2019-12-07 10:51:56,320 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:56,320 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [553752996] [2019-12-07 10:51:56,320 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:56,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:56,437 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:56,437 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [553752996] [2019-12-07 10:51:56,437 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:56,437 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:51:56,437 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [458313900] [2019-12-07 10:51:56,438 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:51:56,438 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:56,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:51:56,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:51:56,438 INFO L87 Difference]: Start difference. First operand 18860 states and 58192 transitions. Second operand 12 states. [2019-12-07 10:51:58,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:58,944 INFO L93 Difference]: Finished difference Result 29338 states and 89692 transitions. [2019-12-07 10:51:58,944 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 10:51:58,944 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 10:51:58,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:58,978 INFO L225 Difference]: With dead ends: 29338 [2019-12-07 10:51:58,978 INFO L226 Difference]: Without dead ends: 28111 [2019-12-07 10:51:58,979 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=122, Invalid=528, Unknown=0, NotChecked=0, Total=650 [2019-12-07 10:51:59,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28111 states. [2019-12-07 10:51:59,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28111 to 18764. [2019-12-07 10:51:59,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18764 states. [2019-12-07 10:51:59,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18764 states to 18764 states and 57937 transitions. [2019-12-07 10:51:59,362 INFO L78 Accepts]: Start accepts. Automaton has 18764 states and 57937 transitions. Word has length 67 [2019-12-07 10:51:59,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:51:59,362 INFO L462 AbstractCegarLoop]: Abstraction has 18764 states and 57937 transitions. [2019-12-07 10:51:59,362 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:51:59,362 INFO L276 IsEmpty]: Start isEmpty. Operand 18764 states and 57937 transitions. [2019-12-07 10:51:59,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:51:59,379 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:51:59,379 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:51:59,379 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:51:59,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:51:59,380 INFO L82 PathProgramCache]: Analyzing trace with hash -1867129146, now seen corresponding path program 15 times [2019-12-07 10:51:59,380 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:51:59,380 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [567550711] [2019-12-07 10:51:59,380 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:51:59,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:51:59,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:51:59,422 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [567550711] [2019-12-07 10:51:59,422 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:51:59,422 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:51:59,422 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [19464492] [2019-12-07 10:51:59,423 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:51:59,423 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:51:59,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:51:59,423 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:51:59,423 INFO L87 Difference]: Start difference. First operand 18764 states and 57937 transitions. Second operand 6 states. [2019-12-07 10:51:59,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:51:59,669 INFO L93 Difference]: Finished difference Result 46694 states and 143200 transitions. [2019-12-07 10:51:59,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 10:51:59,669 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 10:51:59,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:51:59,712 INFO L225 Difference]: With dead ends: 46694 [2019-12-07 10:51:59,712 INFO L226 Difference]: Without dead ends: 36992 [2019-12-07 10:51:59,712 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:51:59,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36992 states. [2019-12-07 10:52:00,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36992 to 19756. [2019-12-07 10:52:00,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19756 states. [2019-12-07 10:52:00,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19756 states to 19756 states and 61152 transitions. [2019-12-07 10:52:00,144 INFO L78 Accepts]: Start accepts. Automaton has 19756 states and 61152 transitions. Word has length 67 [2019-12-07 10:52:00,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:52:00,144 INFO L462 AbstractCegarLoop]: Abstraction has 19756 states and 61152 transitions. [2019-12-07 10:52:00,144 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:52:00,144 INFO L276 IsEmpty]: Start isEmpty. Operand 19756 states and 61152 transitions. [2019-12-07 10:52:00,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:52:00,162 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:52:00,162 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:52:00,163 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:52:00,163 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:52:00,163 INFO L82 PathProgramCache]: Analyzing trace with hash -1154306208, now seen corresponding path program 16 times [2019-12-07 10:52:00,163 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:52:00,163 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1648797448] [2019-12-07 10:52:00,163 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:52:00,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:52:00,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:52:00,236 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 10:52:00,236 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 10:52:00,239 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1318~0.base_23|)) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (= (store .cse0 |v_ULTIMATE.start_main_~#t1318~0.base_23| 1) |v_#valid_60|) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= v_~z$w_buff0_used~0_900 0) (= |v_ULTIMATE.start_main_~#t1318~0.offset_17| 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= v_~z$read_delayed~0_7 0) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1318~0.base_23|) (= v_~z$r_buff1_thd1~0_166 0) (= v_~z$w_buff0~0_454 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1318~0.base_23| 4)) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1318~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1318~0.base_23|) |v_ULTIMATE.start_main_~#t1318~0.offset_17| 0)) |v_#memory_int_17|) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, ULTIMATE.start_main_~#t1320~0.base=|v_ULTIMATE.start_main_~#t1320~0.base_17|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ULTIMATE.start_main_~#t1318~0.base=|v_ULTIMATE.start_main_~#t1318~0.base_23|, ~x~0=v_~x~0_129, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1319~0.base=|v_ULTIMATE.start_main_~#t1319~0.base_19|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ULTIMATE.start_main_~#t1318~0.offset=|v_ULTIMATE.start_main_~#t1318~0.offset_17|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ULTIMATE.start_main_~#t1320~0.offset=|v_ULTIMATE.start_main_~#t1320~0.offset_14|, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_~#t1319~0.offset=|v_ULTIMATE.start_main_~#t1319~0.offset_12|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t1320~0.base, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1318~0.base, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1319~0.base, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t1318~0.offset, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1320~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1319~0.offset, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:52:00,239 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1319~0.base_11|) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1319~0.base_11| 1) |v_#valid_38|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1319~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1319~0.base_11|) |v_ULTIMATE.start_main_~#t1319~0.offset_9| 1)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1319~0.base_11| 4) |v_#length_17|) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1319~0.base_11|) 0) (not (= |v_ULTIMATE.start_main_~#t1319~0.base_11| 0)) (= 0 |v_ULTIMATE.start_main_~#t1319~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1319~0.offset=|v_ULTIMATE.start_main_~#t1319~0.offset_9|, ULTIMATE.start_main_~#t1319~0.base=|v_ULTIMATE.start_main_~#t1319~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1319~0.offset, ULTIMATE.start_main_~#t1319~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 10:52:00,239 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:52:00,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-1315665681 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-1315665681 256)))) (or (and (= ~z$w_buff1~0_In-1315665681 |P1Thread1of1ForFork2_#t~ite9_Out-1315665681|) (not .cse0) (not .cse1)) (and (= ~z~0_In-1315665681 |P1Thread1of1ForFork2_#t~ite9_Out-1315665681|) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1315665681, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1315665681, ~z$w_buff1~0=~z$w_buff1~0_In-1315665681, ~z~0=~z~0_In-1315665681} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1315665681|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1315665681, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1315665681, ~z$w_buff1~0=~z$w_buff1~0_In-1315665681, ~z~0=~z~0_In-1315665681} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 10:52:00,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 10:52:00,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1320~0.base_13|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1320~0.base_13| 1) |v_#valid_36|) (= |v_ULTIMATE.start_main_~#t1320~0.offset_11| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1320~0.base_13| 4)) (not (= |v_ULTIMATE.start_main_~#t1320~0.base_13| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1320~0.base_13|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1320~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1320~0.base_13|) |v_ULTIMATE.start_main_~#t1320~0.offset_11| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1320~0.base=|v_ULTIMATE.start_main_~#t1320~0.base_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1320~0.offset=|v_ULTIMATE.start_main_~#t1320~0.offset_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1320~0.base, #length, ULTIMATE.start_main_~#t1320~0.offset] because there is no mapped edge [2019-12-07 10:52:00,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1433953182 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-1433953182 256) 0))) (or (and (= ~z$w_buff0_used~0_In-1433953182 |P1Thread1of1ForFork2_#t~ite11_Out-1433953182|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1433953182|) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1433953182, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1433953182} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1433953182, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1433953182|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1433953182} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 10:52:00,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In407619878 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In407619878 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In407619878 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In407619878 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite12_Out407619878| ~z$w_buff1_used~0_In407619878)) (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out407619878|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In407619878, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In407619878, ~z$w_buff1_used~0=~z$w_buff1_used~0_In407619878, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In407619878} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In407619878, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In407619878, ~z$w_buff1_used~0=~z$w_buff1_used~0_In407619878, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out407619878|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In407619878} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 10:52:00,243 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In552793088 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In552793088 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out552793088| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out552793088| ~z$r_buff0_thd2~0_In552793088)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In552793088, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In552793088} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In552793088, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out552793088|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In552793088} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 10:52:00,244 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-731638623 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_In-731638623| |P2Thread1of1ForFork0_#t~ite26_Out-731638623|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite27_Out-731638623| ~z$w_buff0_used~0_In-731638623)) (and (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-731638623 256)))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In-731638623 256) 0)) (and .cse1 (= (mod ~z$w_buff1_used~0_In-731638623 256) 0)) (= (mod ~z$w_buff0_used~0_In-731638623 256) 0))) (= |P2Thread1of1ForFork0_#t~ite26_Out-731638623| ~z$w_buff0_used~0_In-731638623) (= |P2Thread1of1ForFork0_#t~ite26_Out-731638623| |P2Thread1of1ForFork0_#t~ite27_Out-731638623|) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-731638623|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-731638623, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-731638623, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-731638623, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-731638623, ~weak$$choice2~0=~weak$$choice2~0_In-731638623} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-731638623|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-731638623|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-731638623, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-731638623, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-731638623, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-731638623, ~weak$$choice2~0=~weak$$choice2~0_In-731638623} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 10:52:00,245 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 10:52:00,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In1248411670 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In1248411670 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out1248411670| 0) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In1248411670 |P0Thread1of1ForFork1_#t~ite5_Out1248411670|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1248411670, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1248411670} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1248411670|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1248411670, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1248411670} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 10:52:00,247 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 10:52:00,247 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In365422540 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In365422540 256))) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out365422540| |P2Thread1of1ForFork0_#t~ite38_Out365422540|))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In365422540 |P2Thread1of1ForFork0_#t~ite38_Out365422540|) .cse2) (and (= ~z~0_In365422540 |P2Thread1of1ForFork0_#t~ite38_Out365422540|) (or .cse0 .cse1) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In365422540, ~z$w_buff1_used~0=~z$w_buff1_used~0_In365422540, ~z$w_buff1~0=~z$w_buff1~0_In365422540, ~z~0=~z~0_In365422540} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out365422540|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out365422540|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In365422540, ~z$w_buff1_used~0=~z$w_buff1_used~0_In365422540, ~z$w_buff1~0=~z$w_buff1~0_In365422540, ~z~0=~z~0_In365422540} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 10:52:00,247 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1622680769 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In1622680769 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1622680769 |P2Thread1of1ForFork0_#t~ite40_Out1622680769|)) (and (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1622680769|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1622680769, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1622680769} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1622680769, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1622680769|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1622680769} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 10:52:00,248 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1714589213 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1714589213 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1714589213 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In1714589213 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1714589213 |P2Thread1of1ForFork0_#t~ite41_Out1714589213|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out1714589213|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1714589213, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1714589213, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1714589213, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1714589213} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1714589213, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1714589213, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1714589213, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1714589213, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1714589213|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 10:52:00,248 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1792714839 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1792714839 256)))) (or (and (= ~z$r_buff0_thd3~0_In1792714839 |P2Thread1of1ForFork0_#t~ite42_Out1792714839|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1792714839|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1792714839, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1792714839} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1792714839, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1792714839, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1792714839|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 10:52:00,248 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In925205328 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In925205328 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In925205328 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In925205328 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out925205328|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P2Thread1of1ForFork0_#t~ite43_Out925205328| ~z$r_buff1_thd3~0_In925205328)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In925205328, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In925205328, ~z$w_buff1_used~0=~z$w_buff1_used~0_In925205328, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In925205328} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out925205328|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In925205328, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In925205328, ~z$w_buff1_used~0=~z$w_buff1_used~0_In925205328, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In925205328} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 10:52:00,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 10:52:00,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In365662227 256))) (.cse3 (= (mod ~z$r_buff1_thd1~0_In365662227 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd1~0_In365662227 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In365662227 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out365662227| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In365662227 |P0Thread1of1ForFork1_#t~ite6_Out365662227|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In365662227, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In365662227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In365662227, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In365662227} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In365662227, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out365662227|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In365662227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In365662227, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In365662227} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 10:52:00,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse0 (= ~z$r_buff0_thd1~0_In-1419198423 ~z$r_buff0_thd1~0_Out-1419198423)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1419198423 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1419198423 256) 0))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (= ~z$r_buff0_thd1~0_Out-1419198423 0) (not .cse1) (not .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1419198423, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1419198423} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1419198423, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1419198423|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1419198423} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:52:00,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In-101756990 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-101756990 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-101756990 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-101756990 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-101756990|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$r_buff1_thd1~0_In-101756990 |P0Thread1of1ForFork1_#t~ite8_Out-101756990|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-101756990, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-101756990, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-101756990, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-101756990} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-101756990|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-101756990, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-101756990, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-101756990, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-101756990} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 10:52:00,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 10:52:00,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-2062215892 256))) (.cse1 (= (mod ~z$r_buff1_thd2~0_In-2062215892 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-2062215892 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In-2062215892 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd2~0_In-2062215892 |P1Thread1of1ForFork2_#t~ite14_Out-2062215892|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-2062215892|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2062215892, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-2062215892, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2062215892, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2062215892} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2062215892, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-2062215892, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2062215892, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-2062215892|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2062215892} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 10:52:00,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 10:52:00,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:52:00,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In1008777195 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite47_Out1008777195| |ULTIMATE.start_main_#t~ite48_Out1008777195|)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1008777195 256)))) (or (and (or .cse0 .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out1008777195| ~z~0_In1008777195)) (and (not .cse0) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out1008777195| ~z$w_buff1~0_In1008777195) (not .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1008777195, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1008777195, ~z$w_buff1~0=~z$w_buff1~0_In1008777195, ~z~0=~z~0_In1008777195} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1008777195, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1008777195|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1008777195, ~z$w_buff1~0=~z$w_buff1~0_In1008777195, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1008777195|, ~z~0=~z~0_In1008777195} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 10:52:00,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-783134732 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-783134732 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-783134732| ~z$w_buff0_used~0_In-783134732) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out-783134732| 0) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-783134732, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-783134732} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-783134732, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-783134732, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-783134732|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 10:52:00,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In1379830654 256))) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1379830654 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1379830654 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1379830654 256) 0))) (or (and (= ~z$w_buff1_used~0_In1379830654 |ULTIMATE.start_main_#t~ite50_Out1379830654|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite50_Out1379830654| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1379830654, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1379830654, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1379830654, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1379830654} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1379830654|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1379830654, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1379830654, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1379830654, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1379830654} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 10:52:00,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-57084294 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-57084294 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out-57084294|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-57084294 |ULTIMATE.start_main_#t~ite51_Out-57084294|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-57084294, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-57084294} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-57084294, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-57084294|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-57084294} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 10:52:00,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In-1216714402 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In-1216714402 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1216714402 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1216714402 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-1216714402| ~z$r_buff1_thd0~0_In-1216714402) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite52_Out-1216714402| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1216714402, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1216714402, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1216714402, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1216714402} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1216714402|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1216714402, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1216714402, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1216714402, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1216714402} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 10:52:00,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:52:00,301 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 10:52:00 BasicIcfg [2019-12-07 10:52:00,301 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 10:52:00,302 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 10:52:00,302 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 10:52:00,302 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 10:52:00,302 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:49:16" (3/4) ... [2019-12-07 10:52:00,303 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 10:52:00,304 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1318~0.base_23|)) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (= (store .cse0 |v_ULTIMATE.start_main_~#t1318~0.base_23| 1) |v_#valid_60|) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= v_~z$w_buff0_used~0_900 0) (= |v_ULTIMATE.start_main_~#t1318~0.offset_17| 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= v_~z$read_delayed~0_7 0) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1318~0.base_23|) (= v_~z$r_buff1_thd1~0_166 0) (= v_~z$w_buff0~0_454 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1318~0.base_23| 4)) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1318~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1318~0.base_23|) |v_ULTIMATE.start_main_~#t1318~0.offset_17| 0)) |v_#memory_int_17|) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, ULTIMATE.start_main_~#t1320~0.base=|v_ULTIMATE.start_main_~#t1320~0.base_17|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ULTIMATE.start_main_~#t1318~0.base=|v_ULTIMATE.start_main_~#t1318~0.base_23|, ~x~0=v_~x~0_129, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1319~0.base=|v_ULTIMATE.start_main_~#t1319~0.base_19|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ULTIMATE.start_main_~#t1318~0.offset=|v_ULTIMATE.start_main_~#t1318~0.offset_17|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ULTIMATE.start_main_~#t1320~0.offset=|v_ULTIMATE.start_main_~#t1320~0.offset_14|, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_~#t1319~0.offset=|v_ULTIMATE.start_main_~#t1319~0.offset_12|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t1320~0.base, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1318~0.base, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1319~0.base, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t1318~0.offset, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1320~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1319~0.offset, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:52:00,304 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1319~0.base_11|) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1319~0.base_11| 1) |v_#valid_38|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1319~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1319~0.base_11|) |v_ULTIMATE.start_main_~#t1319~0.offset_9| 1)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1319~0.base_11| 4) |v_#length_17|) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1319~0.base_11|) 0) (not (= |v_ULTIMATE.start_main_~#t1319~0.base_11| 0)) (= 0 |v_ULTIMATE.start_main_~#t1319~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1319~0.offset=|v_ULTIMATE.start_main_~#t1319~0.offset_9|, ULTIMATE.start_main_~#t1319~0.base=|v_ULTIMATE.start_main_~#t1319~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1319~0.offset, ULTIMATE.start_main_~#t1319~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 10:52:00,304 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:52:00,305 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-1315665681 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-1315665681 256)))) (or (and (= ~z$w_buff1~0_In-1315665681 |P1Thread1of1ForFork2_#t~ite9_Out-1315665681|) (not .cse0) (not .cse1)) (and (= ~z~0_In-1315665681 |P1Thread1of1ForFork2_#t~ite9_Out-1315665681|) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1315665681, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1315665681, ~z$w_buff1~0=~z$w_buff1~0_In-1315665681, ~z~0=~z~0_In-1315665681} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1315665681|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1315665681, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1315665681, ~z$w_buff1~0=~z$w_buff1~0_In-1315665681, ~z~0=~z~0_In-1315665681} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 10:52:00,306 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 10:52:00,306 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1320~0.base_13|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1320~0.base_13| 1) |v_#valid_36|) (= |v_ULTIMATE.start_main_~#t1320~0.offset_11| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1320~0.base_13| 4)) (not (= |v_ULTIMATE.start_main_~#t1320~0.base_13| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1320~0.base_13|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1320~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1320~0.base_13|) |v_ULTIMATE.start_main_~#t1320~0.offset_11| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1320~0.base=|v_ULTIMATE.start_main_~#t1320~0.base_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1320~0.offset=|v_ULTIMATE.start_main_~#t1320~0.offset_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1320~0.base, #length, ULTIMATE.start_main_~#t1320~0.offset] because there is no mapped edge [2019-12-07 10:52:00,306 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1433953182 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-1433953182 256) 0))) (or (and (= ~z$w_buff0_used~0_In-1433953182 |P1Thread1of1ForFork2_#t~ite11_Out-1433953182|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1433953182|) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1433953182, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1433953182} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1433953182, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1433953182|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1433953182} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 10:52:00,306 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In407619878 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In407619878 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In407619878 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In407619878 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite12_Out407619878| ~z$w_buff1_used~0_In407619878)) (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out407619878|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In407619878, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In407619878, ~z$w_buff1_used~0=~z$w_buff1_used~0_In407619878, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In407619878} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In407619878, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In407619878, ~z$w_buff1_used~0=~z$w_buff1_used~0_In407619878, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out407619878|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In407619878} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 10:52:00,308 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In552793088 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In552793088 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out552793088| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out552793088| ~z$r_buff0_thd2~0_In552793088)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In552793088, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In552793088} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In552793088, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out552793088|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In552793088} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 10:52:00,309 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-731638623 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_In-731638623| |P2Thread1of1ForFork0_#t~ite26_Out-731638623|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite27_Out-731638623| ~z$w_buff0_used~0_In-731638623)) (and (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-731638623 256)))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In-731638623 256) 0)) (and .cse1 (= (mod ~z$w_buff1_used~0_In-731638623 256) 0)) (= (mod ~z$w_buff0_used~0_In-731638623 256) 0))) (= |P2Thread1of1ForFork0_#t~ite26_Out-731638623| ~z$w_buff0_used~0_In-731638623) (= |P2Thread1of1ForFork0_#t~ite26_Out-731638623| |P2Thread1of1ForFork0_#t~ite27_Out-731638623|) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-731638623|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-731638623, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-731638623, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-731638623, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-731638623, ~weak$$choice2~0=~weak$$choice2~0_In-731638623} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-731638623|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-731638623|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-731638623, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-731638623, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-731638623, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-731638623, ~weak$$choice2~0=~weak$$choice2~0_In-731638623} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 10:52:00,310 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 10:52:00,311 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In1248411670 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In1248411670 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out1248411670| 0) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In1248411670 |P0Thread1of1ForFork1_#t~ite5_Out1248411670|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1248411670, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1248411670} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1248411670|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1248411670, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1248411670} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 10:52:00,312 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 10:52:00,312 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In365422540 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In365422540 256))) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out365422540| |P2Thread1of1ForFork0_#t~ite38_Out365422540|))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In365422540 |P2Thread1of1ForFork0_#t~ite38_Out365422540|) .cse2) (and (= ~z~0_In365422540 |P2Thread1of1ForFork0_#t~ite38_Out365422540|) (or .cse0 .cse1) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In365422540, ~z$w_buff1_used~0=~z$w_buff1_used~0_In365422540, ~z$w_buff1~0=~z$w_buff1~0_In365422540, ~z~0=~z~0_In365422540} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out365422540|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out365422540|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In365422540, ~z$w_buff1_used~0=~z$w_buff1_used~0_In365422540, ~z$w_buff1~0=~z$w_buff1~0_In365422540, ~z~0=~z~0_In365422540} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 10:52:00,312 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1622680769 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In1622680769 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1622680769 |P2Thread1of1ForFork0_#t~ite40_Out1622680769|)) (and (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1622680769|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1622680769, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1622680769} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1622680769, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1622680769|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1622680769} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 10:52:00,313 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1714589213 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1714589213 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1714589213 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In1714589213 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1714589213 |P2Thread1of1ForFork0_#t~ite41_Out1714589213|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out1714589213|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1714589213, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1714589213, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1714589213, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1714589213} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1714589213, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1714589213, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1714589213, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1714589213, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1714589213|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 10:52:00,313 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1792714839 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1792714839 256)))) (or (and (= ~z$r_buff0_thd3~0_In1792714839 |P2Thread1of1ForFork0_#t~ite42_Out1792714839|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1792714839|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1792714839, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1792714839} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1792714839, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1792714839, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1792714839|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 10:52:00,313 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In925205328 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In925205328 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In925205328 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In925205328 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out925205328|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P2Thread1of1ForFork0_#t~ite43_Out925205328| ~z$r_buff1_thd3~0_In925205328)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In925205328, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In925205328, ~z$w_buff1_used~0=~z$w_buff1_used~0_In925205328, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In925205328} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out925205328|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In925205328, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In925205328, ~z$w_buff1_used~0=~z$w_buff1_used~0_In925205328, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In925205328} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 10:52:00,313 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 10:52:00,314 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In365662227 256))) (.cse3 (= (mod ~z$r_buff1_thd1~0_In365662227 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd1~0_In365662227 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In365662227 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out365662227| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In365662227 |P0Thread1of1ForFork1_#t~ite6_Out365662227|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In365662227, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In365662227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In365662227, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In365662227} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In365662227, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out365662227|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In365662227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In365662227, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In365662227} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 10:52:00,314 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse0 (= ~z$r_buff0_thd1~0_In-1419198423 ~z$r_buff0_thd1~0_Out-1419198423)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1419198423 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1419198423 256) 0))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (= ~z$r_buff0_thd1~0_Out-1419198423 0) (not .cse1) (not .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1419198423, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1419198423} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1419198423, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1419198423|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1419198423} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:52:00,314 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In-101756990 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-101756990 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-101756990 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-101756990 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-101756990|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$r_buff1_thd1~0_In-101756990 |P0Thread1of1ForFork1_#t~ite8_Out-101756990|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-101756990, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-101756990, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-101756990, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-101756990} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-101756990|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-101756990, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-101756990, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-101756990, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-101756990} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 10:52:00,314 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 10:52:00,314 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-2062215892 256))) (.cse1 (= (mod ~z$r_buff1_thd2~0_In-2062215892 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-2062215892 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In-2062215892 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd2~0_In-2062215892 |P1Thread1of1ForFork2_#t~ite14_Out-2062215892|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-2062215892|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2062215892, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-2062215892, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2062215892, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2062215892} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2062215892, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-2062215892, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2062215892, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-2062215892|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2062215892} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 10:52:00,314 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 10:52:00,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:52:00,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In1008777195 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite47_Out1008777195| |ULTIMATE.start_main_#t~ite48_Out1008777195|)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1008777195 256)))) (or (and (or .cse0 .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out1008777195| ~z~0_In1008777195)) (and (not .cse0) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out1008777195| ~z$w_buff1~0_In1008777195) (not .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1008777195, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1008777195, ~z$w_buff1~0=~z$w_buff1~0_In1008777195, ~z~0=~z~0_In1008777195} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1008777195, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1008777195|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1008777195, ~z$w_buff1~0=~z$w_buff1~0_In1008777195, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1008777195|, ~z~0=~z~0_In1008777195} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 10:52:00,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-783134732 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-783134732 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-783134732| ~z$w_buff0_used~0_In-783134732) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out-783134732| 0) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-783134732, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-783134732} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-783134732, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-783134732, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-783134732|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 10:52:00,316 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In1379830654 256))) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1379830654 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1379830654 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1379830654 256) 0))) (or (and (= ~z$w_buff1_used~0_In1379830654 |ULTIMATE.start_main_#t~ite50_Out1379830654|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite50_Out1379830654| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1379830654, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1379830654, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1379830654, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1379830654} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1379830654|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1379830654, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1379830654, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1379830654, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1379830654} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 10:52:00,316 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-57084294 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-57084294 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out-57084294|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-57084294 |ULTIMATE.start_main_#t~ite51_Out-57084294|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-57084294, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-57084294} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-57084294, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-57084294|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-57084294} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 10:52:00,317 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In-1216714402 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In-1216714402 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1216714402 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1216714402 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-1216714402| ~z$r_buff1_thd0~0_In-1216714402) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite52_Out-1216714402| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1216714402, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1216714402, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1216714402, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1216714402} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1216714402|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1216714402, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1216714402, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1216714402, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1216714402} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 10:52:00,317 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:52:00,367 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_45e8bd47-1637-4aad-8bd9-3c595f84894a/bin/uautomizer/witness.graphml [2019-12-07 10:52:00,367 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 10:52:00,368 INFO L168 Benchmark]: Toolchain (without parser) took 164337.16 ms. Allocated memory was 1.0 GB in the beginning and 6.6 GB in the end (delta: 5.6 GB). Free memory was 934.0 MB in the beginning and 5.3 GB in the end (delta: -4.3 GB). Peak memory consumption was 1.2 GB. Max. memory is 11.5 GB. [2019-12-07 10:52:00,369 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:52:00,369 INFO L168 Benchmark]: CACSL2BoogieTranslator took 371.19 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.4 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -126.7 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. [2019-12-07 10:52:00,369 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.91 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:52:00,369 INFO L168 Benchmark]: Boogie Preprocessor took 25.06 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:52:00,370 INFO L168 Benchmark]: RCFGBuilder took 417.17 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 999.9 MB in the end (delta: 55.5 MB). Peak memory consumption was 55.5 MB. Max. memory is 11.5 GB. [2019-12-07 10:52:00,370 INFO L168 Benchmark]: TraceAbstraction took 163415.15 ms. Allocated memory was 1.1 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 999.9 MB in the beginning and 5.3 GB in the end (delta: -4.3 GB). Peak memory consumption was 1.2 GB. Max. memory is 11.5 GB. [2019-12-07 10:52:00,370 INFO L168 Benchmark]: Witness Printer took 65.87 ms. Allocated memory is still 6.6 GB. Free memory was 5.3 GB in the beginning and 5.3 GB in the end (delta: 47.5 MB). Peak memory consumption was 47.5 MB. Max. memory is 11.5 GB. [2019-12-07 10:52:00,371 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 371.19 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.4 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -126.7 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.91 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.06 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 417.17 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 999.9 MB in the end (delta: 55.5 MB). Peak memory consumption was 55.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 163415.15 ms. Allocated memory was 1.1 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 999.9 MB in the beginning and 5.3 GB in the end (delta: -4.3 GB). Peak memory consumption was 1.2 GB. Max. memory is 11.5 GB. * Witness Printer took 65.87 ms. Allocated memory is still 6.6 GB. Free memory was 5.3 GB in the beginning and 5.3 GB in the end (delta: 47.5 MB). Peak memory consumption was 47.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 176 ProgramPointsBefore, 95 ProgramPointsAfterwards, 213 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 55 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 29 ChoiceCompositions, 7276 VarBasedMoverChecksPositive, 432 VarBasedMoverChecksNegative, 272 SemBasedMoverChecksPositive, 254 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 130045 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L822] FCALL, FORK 0 pthread_create(&t1318, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t1319, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 1 [L763] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L826] FCALL, FORK 0 pthread_create(&t1320, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 1 [L783] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L784] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L785] 3 z$flush_delayed = weak$$choice2 [L786] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L788] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L788] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L789] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L789] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L790] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L791] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L793] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L794] 3 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L799] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L800] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L801] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L802] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L832] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L832] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L833] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L834] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L835] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 163.2s, OverallIterations: 32, TraceHistogramMax: 1, AutomataDifference: 56.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8169 SDtfs, 9867 SDslu, 38580 SDs, 0 SdLazy, 38926 SolverSat, 506 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 29.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 554 GetRequests, 42 SyntacticMatches, 26 SemanticMatches, 486 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2709 ImplicationChecksByTransitivity, 8.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=237826occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 78.3s AutomataMinimizationTime, 31 MinimizatonAttempts, 338826 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.8s SatisfiabilityAnalysisTime, 3.3s InterpolantComputationTime, 1517 NumberOfCodeBlocks, 1517 NumberOfCodeBlocksAsserted, 32 NumberOfCheckSat, 1419 ConstructedInterpolants, 0 QuantifiedInterpolants, 641109 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 31 InterpolantComputations, 31 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...