./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix052_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_43b58152-6f7f-4f62-a606-53c3380be12e/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_43b58152-6f7f-4f62-a606-53c3380be12e/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_43b58152-6f7f-4f62-a606-53c3380be12e/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_43b58152-6f7f-4f62-a606-53c3380be12e/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix052_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_43b58152-6f7f-4f62-a606-53c3380be12e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_43b58152-6f7f-4f62-a606-53c3380be12e/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4946cb314f26dd4bca9842b41832d6914ff2033a ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:24:50,154 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:24:50,155 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:24:50,163 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:24:50,163 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:24:50,164 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:24:50,165 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:24:50,166 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:24:50,167 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:24:50,168 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:24:50,168 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:24:50,169 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:24:50,169 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:24:50,170 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:24:50,171 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:24:50,172 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:24:50,172 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:24:50,173 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:24:50,174 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:24:50,176 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:24:50,177 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:24:50,178 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:24:50,179 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:24:50,179 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:24:50,181 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:24:50,181 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:24:50,181 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:24:50,182 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:24:50,182 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:24:50,183 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:24:50,183 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:24:50,183 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:24:50,184 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:24:50,184 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:24:50,185 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:24:50,185 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:24:50,185 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:24:50,185 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:24:50,185 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:24:50,186 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:24:50,186 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:24:50,187 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_43b58152-6f7f-4f62-a606-53c3380be12e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:24:50,196 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:24:50,196 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:24:50,197 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:24:50,197 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:24:50,197 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:24:50,197 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:24:50,197 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:24:50,197 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:24:50,197 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:24:50,198 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:24:50,198 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:24:50,198 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:24:50,198 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:24:50,198 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:24:50,198 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:24:50,198 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:24:50,198 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:24:50,198 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:24:50,199 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:24:50,199 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:24:50,199 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:24:50,199 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:24:50,199 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:24:50,199 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:24:50,199 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:24:50,199 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:24:50,199 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:24:50,200 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:24:50,200 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:24:50,200 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_43b58152-6f7f-4f62-a606-53c3380be12e/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4946cb314f26dd4bca9842b41832d6914ff2033a [2019-12-07 12:24:50,303 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:24:50,313 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:24:50,316 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:24:50,317 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:24:50,317 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:24:50,318 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_43b58152-6f7f-4f62-a606-53c3380be12e/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix052_power.oepc.i [2019-12-07 12:24:50,361 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_43b58152-6f7f-4f62-a606-53c3380be12e/bin/uautomizer/data/302f66f99/8a346af6d30d40bc91e1dd481f715867/FLAG9a7d86a5e [2019-12-07 12:24:50,830 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:24:50,831 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_43b58152-6f7f-4f62-a606-53c3380be12e/sv-benchmarks/c/pthread-wmm/mix052_power.oepc.i [2019-12-07 12:24:50,843 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_43b58152-6f7f-4f62-a606-53c3380be12e/bin/uautomizer/data/302f66f99/8a346af6d30d40bc91e1dd481f715867/FLAG9a7d86a5e [2019-12-07 12:24:50,852 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_43b58152-6f7f-4f62-a606-53c3380be12e/bin/uautomizer/data/302f66f99/8a346af6d30d40bc91e1dd481f715867 [2019-12-07 12:24:50,854 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:24:50,855 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:24:50,856 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:24:50,856 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:24:50,858 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:24:50,858 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:24:50" (1/1) ... [2019-12-07 12:24:50,860 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6a1693e9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:24:50, skipping insertion in model container [2019-12-07 12:24:50,860 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:24:50" (1/1) ... [2019-12-07 12:24:50,865 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:24:50,893 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:24:51,136 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:24:51,144 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:24:51,189 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:24:51,237 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:24:51,237 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:24:51 WrapperNode [2019-12-07 12:24:51,237 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:24:51,238 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:24:51,238 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:24:51,238 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:24:51,243 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:24:51" (1/1) ... [2019-12-07 12:24:51,257 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:24:51" (1/1) ... [2019-12-07 12:24:51,278 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:24:51,278 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:24:51,278 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:24:51,278 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:24:51,285 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:24:51" (1/1) ... [2019-12-07 12:24:51,285 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:24:51" (1/1) ... [2019-12-07 12:24:51,289 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:24:51" (1/1) ... [2019-12-07 12:24:51,289 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:24:51" (1/1) ... [2019-12-07 12:24:51,296 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:24:51" (1/1) ... [2019-12-07 12:24:51,300 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:24:51" (1/1) ... [2019-12-07 12:24:51,302 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:24:51" (1/1) ... [2019-12-07 12:24:51,306 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:24:51,306 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:24:51,306 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:24:51,307 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:24:51,307 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:24:51" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_43b58152-6f7f-4f62-a606-53c3380be12e/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:24:51,349 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:24:51,349 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:24:51,349 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:24:51,349 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:24:51,349 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:24:51,349 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:24:51,349 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:24:51,350 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:24:51,350 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 12:24:51,350 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 12:24:51,350 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:24:51,350 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:24:51,350 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:24:51,351 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:24:51,708 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:24:51,708 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:24:51,709 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:24:51 BoogieIcfgContainer [2019-12-07 12:24:51,709 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:24:51,710 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:24:51,710 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:24:51,712 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:24:51,712 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:24:50" (1/3) ... [2019-12-07 12:24:51,713 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7855d842 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:24:51, skipping insertion in model container [2019-12-07 12:24:51,713 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:24:51" (2/3) ... [2019-12-07 12:24:51,713 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7855d842 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:24:51, skipping insertion in model container [2019-12-07 12:24:51,713 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:24:51" (3/3) ... [2019-12-07 12:24:51,714 INFO L109 eAbstractionObserver]: Analyzing ICFG mix052_power.oepc.i [2019-12-07 12:24:51,720 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:24:51,721 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:24:51,725 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:24:51,726 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:24:51,751 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,751 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,751 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,751 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,751 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,751 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,752 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,752 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,752 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,752 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,752 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,752 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,752 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,752 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,753 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,753 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,753 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,753 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,753 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,753 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,753 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,753 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,753 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,754 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,754 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,754 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,754 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,754 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,754 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,754 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,754 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,754 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,755 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,755 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,755 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,755 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,755 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,755 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,756 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,756 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,756 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,756 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,756 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,756 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,756 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,756 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,759 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,760 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:24:51,782 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 12:24:51,794 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:24:51,794 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:24:51,794 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:24:51,795 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:24:51,795 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:24:51,795 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:24:51,795 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:24:51,795 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:24:51,806 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 175 places, 212 transitions [2019-12-07 12:24:51,807 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 12:24:51,864 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 12:24:51,864 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:24:51,875 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 702 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:24:51,892 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 12:24:51,920 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 12:24:51,921 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:24:51,926 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 702 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:24:51,943 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 12:24:51,944 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:24:54,866 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 38 [2019-12-07 12:24:55,132 WARN L192 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 12:24:55,411 INFO L206 etLargeBlockEncoding]: Checked pairs total: 125946 [2019-12-07 12:24:55,411 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 12:24:55,413 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 102 transitions [2019-12-07 12:25:09,906 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 111572 states. [2019-12-07 12:25:09,908 INFO L276 IsEmpty]: Start isEmpty. Operand 111572 states. [2019-12-07 12:25:09,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 12:25:09,912 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:25:09,912 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 12:25:09,912 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:25:09,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:25:09,916 INFO L82 PathProgramCache]: Analyzing trace with hash 912834, now seen corresponding path program 1 times [2019-12-07 12:25:09,921 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:25:09,922 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224509438] [2019-12-07 12:25:09,922 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:25:09,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:25:10,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:25:10,048 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1224509438] [2019-12-07 12:25:10,049 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:25:10,049 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:25:10,049 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1561480487] [2019-12-07 12:25:10,052 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:25:10,052 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:25:10,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:25:10,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:25:10,063 INFO L87 Difference]: Start difference. First operand 111572 states. Second operand 3 states. [2019-12-07 12:25:10,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:25:10,864 INFO L93 Difference]: Finished difference Result 110910 states and 474711 transitions. [2019-12-07 12:25:10,865 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:25:10,866 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 12:25:10,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:25:11,257 INFO L225 Difference]: With dead ends: 110910 [2019-12-07 12:25:11,257 INFO L226 Difference]: Without dead ends: 98066 [2019-12-07 12:25:11,258 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:25:14,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98066 states. [2019-12-07 12:25:17,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98066 to 98066. [2019-12-07 12:25:17,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98066 states. [2019-12-07 12:25:18,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98066 states to 98066 states and 418629 transitions. [2019-12-07 12:25:18,156 INFO L78 Accepts]: Start accepts. Automaton has 98066 states and 418629 transitions. Word has length 3 [2019-12-07 12:25:18,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:25:18,156 INFO L462 AbstractCegarLoop]: Abstraction has 98066 states and 418629 transitions. [2019-12-07 12:25:18,157 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:25:18,157 INFO L276 IsEmpty]: Start isEmpty. Operand 98066 states and 418629 transitions. [2019-12-07 12:25:18,160 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 12:25:18,160 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:25:18,160 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:25:18,161 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:25:18,161 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:25:18,161 INFO L82 PathProgramCache]: Analyzing trace with hash 1027484309, now seen corresponding path program 1 times [2019-12-07 12:25:18,161 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:25:18,161 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [723164290] [2019-12-07 12:25:18,161 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:25:18,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:25:18,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:25:18,223 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [723164290] [2019-12-07 12:25:18,223 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:25:18,224 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:25:18,224 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [298099300] [2019-12-07 12:25:18,225 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:25:18,225 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:25:18,225 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:25:18,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:25:18,225 INFO L87 Difference]: Start difference. First operand 98066 states and 418629 transitions. Second operand 4 states. [2019-12-07 12:25:19,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:25:19,097 INFO L93 Difference]: Finished difference Result 156656 states and 639635 transitions. [2019-12-07 12:25:19,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:25:19,097 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 12:25:19,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:25:19,501 INFO L225 Difference]: With dead ends: 156656 [2019-12-07 12:25:19,501 INFO L226 Difference]: Without dead ends: 156558 [2019-12-07 12:25:19,502 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:25:24,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156558 states. [2019-12-07 12:25:26,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156558 to 142946. [2019-12-07 12:25:26,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142946 states. [2019-12-07 12:25:26,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142946 states to 142946 states and 591329 transitions. [2019-12-07 12:25:26,524 INFO L78 Accepts]: Start accepts. Automaton has 142946 states and 591329 transitions. Word has length 11 [2019-12-07 12:25:26,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:25:26,524 INFO L462 AbstractCegarLoop]: Abstraction has 142946 states and 591329 transitions. [2019-12-07 12:25:26,524 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:25:26,524 INFO L276 IsEmpty]: Start isEmpty. Operand 142946 states and 591329 transitions. [2019-12-07 12:25:26,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:25:26,529 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:25:26,529 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:25:26,529 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:25:26,529 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:25:26,529 INFO L82 PathProgramCache]: Analyzing trace with hash 1461043352, now seen corresponding path program 1 times [2019-12-07 12:25:26,529 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:25:26,530 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1092964560] [2019-12-07 12:25:26,530 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:25:26,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:25:26,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:25:26,583 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1092964560] [2019-12-07 12:25:26,583 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:25:26,583 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:25:26,584 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2139350971] [2019-12-07 12:25:26,584 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:25:26,584 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:25:26,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:25:26,584 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:25:26,584 INFO L87 Difference]: Start difference. First operand 142946 states and 591329 transitions. Second operand 4 states. [2019-12-07 12:25:29,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:25:29,304 INFO L93 Difference]: Finished difference Result 205190 states and 828176 transitions. [2019-12-07 12:25:29,305 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:25:29,305 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 12:25:29,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:25:29,856 INFO L225 Difference]: With dead ends: 205190 [2019-12-07 12:25:29,856 INFO L226 Difference]: Without dead ends: 205078 [2019-12-07 12:25:29,856 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:25:35,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205078 states. [2019-12-07 12:25:37,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205078 to 171310. [2019-12-07 12:25:37,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171310 states. [2019-12-07 12:25:38,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171310 states to 171310 states and 704416 transitions. [2019-12-07 12:25:38,202 INFO L78 Accepts]: Start accepts. Automaton has 171310 states and 704416 transitions. Word has length 13 [2019-12-07 12:25:38,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:25:38,203 INFO L462 AbstractCegarLoop]: Abstraction has 171310 states and 704416 transitions. [2019-12-07 12:25:38,203 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:25:38,203 INFO L276 IsEmpty]: Start isEmpty. Operand 171310 states and 704416 transitions. [2019-12-07 12:25:38,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:25:38,210 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:25:38,210 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:25:38,210 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:25:38,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:25:38,210 INFO L82 PathProgramCache]: Analyzing trace with hash -876468662, now seen corresponding path program 1 times [2019-12-07 12:25:38,210 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:25:38,210 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317482369] [2019-12-07 12:25:38,210 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:25:38,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:25:38,260 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:25:38,261 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1317482369] [2019-12-07 12:25:38,261 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:25:38,261 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:25:38,261 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [898213197] [2019-12-07 12:25:38,261 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:25:38,261 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:25:38,261 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:25:38,262 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:25:38,262 INFO L87 Difference]: Start difference. First operand 171310 states and 704416 transitions. Second operand 5 states. [2019-12-07 12:25:39,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:25:39,429 INFO L93 Difference]: Finished difference Result 231848 states and 943034 transitions. [2019-12-07 12:25:39,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:25:39,430 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 12:25:39,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:25:40,018 INFO L225 Difference]: With dead ends: 231848 [2019-12-07 12:25:40,019 INFO L226 Difference]: Without dead ends: 231848 [2019-12-07 12:25:40,019 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:25:45,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231848 states. [2019-12-07 12:25:51,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231848 to 191437. [2019-12-07 12:25:51,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191437 states. [2019-12-07 12:25:51,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191437 states to 191437 states and 785356 transitions. [2019-12-07 12:25:51,803 INFO L78 Accepts]: Start accepts. Automaton has 191437 states and 785356 transitions. Word has length 16 [2019-12-07 12:25:51,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:25:51,804 INFO L462 AbstractCegarLoop]: Abstraction has 191437 states and 785356 transitions. [2019-12-07 12:25:51,804 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:25:51,804 INFO L276 IsEmpty]: Start isEmpty. Operand 191437 states and 785356 transitions. [2019-12-07 12:25:51,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 12:25:51,818 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:25:51,818 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:25:51,818 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:25:51,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:25:51,818 INFO L82 PathProgramCache]: Analyzing trace with hash -1118041263, now seen corresponding path program 1 times [2019-12-07 12:25:51,818 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:25:51,818 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [155318953] [2019-12-07 12:25:51,818 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:25:51,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:25:51,871 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:25:51,871 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [155318953] [2019-12-07 12:25:51,871 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:25:51,871 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:25:51,871 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [733951965] [2019-12-07 12:25:51,872 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:25:51,872 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:25:51,872 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:25:51,872 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:25:51,872 INFO L87 Difference]: Start difference. First operand 191437 states and 785356 transitions. Second operand 3 states. [2019-12-07 12:25:52,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:25:52,668 INFO L93 Difference]: Finished difference Result 191437 states and 777824 transitions. [2019-12-07 12:25:52,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:25:52,669 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 12:25:52,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:25:53,133 INFO L225 Difference]: With dead ends: 191437 [2019-12-07 12:25:53,133 INFO L226 Difference]: Without dead ends: 191437 [2019-12-07 12:25:53,134 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:25:58,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191437 states. [2019-12-07 12:26:00,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191437 to 188487. [2019-12-07 12:26:00,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188487 states. [2019-12-07 12:26:01,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188487 states to 188487 states and 766908 transitions. [2019-12-07 12:26:01,407 INFO L78 Accepts]: Start accepts. Automaton has 188487 states and 766908 transitions. Word has length 18 [2019-12-07 12:26:01,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:01,407 INFO L462 AbstractCegarLoop]: Abstraction has 188487 states and 766908 transitions. [2019-12-07 12:26:01,407 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:26:01,407 INFO L276 IsEmpty]: Start isEmpty. Operand 188487 states and 766908 transitions. [2019-12-07 12:26:01,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 12:26:01,417 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:01,417 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:01,417 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:01,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:01,418 INFO L82 PathProgramCache]: Analyzing trace with hash -2016155527, now seen corresponding path program 1 times [2019-12-07 12:26:01,418 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:01,418 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1102784264] [2019-12-07 12:26:01,418 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:01,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:01,475 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:01,475 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1102784264] [2019-12-07 12:26:01,476 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:01,476 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:26:01,476 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1631226526] [2019-12-07 12:26:01,476 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:26:01,476 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:01,477 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:26:01,477 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:26:01,477 INFO L87 Difference]: Start difference. First operand 188487 states and 766908 transitions. Second operand 3 states. [2019-12-07 12:26:02,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:02,719 INFO L93 Difference]: Finished difference Result 315159 states and 1273687 transitions. [2019-12-07 12:26:02,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:26:02,719 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 12:26:02,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:03,422 INFO L225 Difference]: With dead ends: 315159 [2019-12-07 12:26:03,422 INFO L226 Difference]: Without dead ends: 282066 [2019-12-07 12:26:03,422 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:26:11,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282066 states. [2019-12-07 12:26:15,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282066 to 269248. [2019-12-07 12:26:15,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 269248 states. [2019-12-07 12:26:16,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269248 states to 269248 states and 1096514 transitions. [2019-12-07 12:26:16,624 INFO L78 Accepts]: Start accepts. Automaton has 269248 states and 1096514 transitions. Word has length 18 [2019-12-07 12:26:16,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:16,624 INFO L462 AbstractCegarLoop]: Abstraction has 269248 states and 1096514 transitions. [2019-12-07 12:26:16,624 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:26:16,624 INFO L276 IsEmpty]: Start isEmpty. Operand 269248 states and 1096514 transitions. [2019-12-07 12:26:16,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 12:26:16,641 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:16,641 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:16,641 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:16,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:16,641 INFO L82 PathProgramCache]: Analyzing trace with hash 1757364841, now seen corresponding path program 1 times [2019-12-07 12:26:16,641 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:16,641 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [137576525] [2019-12-07 12:26:16,642 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:16,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:16,670 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:16,671 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [137576525] [2019-12-07 12:26:16,671 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:16,671 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:26:16,671 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [546432671] [2019-12-07 12:26:16,671 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:26:16,671 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:16,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:26:16,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:26:16,672 INFO L87 Difference]: Start difference. First operand 269248 states and 1096514 transitions. Second operand 3 states. [2019-12-07 12:26:16,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:16,800 INFO L93 Difference]: Finished difference Result 48228 states and 156282 transitions. [2019-12-07 12:26:16,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:26:16,800 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 12:26:16,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:16,867 INFO L225 Difference]: With dead ends: 48228 [2019-12-07 12:26:16,867 INFO L226 Difference]: Without dead ends: 48228 [2019-12-07 12:26:16,868 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:26:17,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48228 states. [2019-12-07 12:26:17,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48228 to 48228. [2019-12-07 12:26:17,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48228 states. [2019-12-07 12:26:17,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48228 states to 48228 states and 156282 transitions. [2019-12-07 12:26:17,622 INFO L78 Accepts]: Start accepts. Automaton has 48228 states and 156282 transitions. Word has length 19 [2019-12-07 12:26:17,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:17,622 INFO L462 AbstractCegarLoop]: Abstraction has 48228 states and 156282 transitions. [2019-12-07 12:26:17,622 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:26:17,622 INFO L276 IsEmpty]: Start isEmpty. Operand 48228 states and 156282 transitions. [2019-12-07 12:26:17,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 12:26:17,629 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:17,630 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:17,630 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:17,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:17,630 INFO L82 PathProgramCache]: Analyzing trace with hash -1783143627, now seen corresponding path program 1 times [2019-12-07 12:26:17,630 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:17,630 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532095904] [2019-12-07 12:26:17,630 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:17,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:17,682 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:17,682 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1532095904] [2019-12-07 12:26:17,682 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:17,683 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:26:17,683 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1723081328] [2019-12-07 12:26:17,683 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:26:17,683 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:17,683 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:26:17,683 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:26:17,683 INFO L87 Difference]: Start difference. First operand 48228 states and 156282 transitions. Second operand 6 states. [2019-12-07 12:26:18,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:18,267 INFO L93 Difference]: Finished difference Result 70457 states and 222266 transitions. [2019-12-07 12:26:18,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:26:18,268 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 12:26:18,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:18,866 INFO L225 Difference]: With dead ends: 70457 [2019-12-07 12:26:18,866 INFO L226 Difference]: Without dead ends: 70443 [2019-12-07 12:26:18,867 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:26:19,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70443 states. [2019-12-07 12:26:19,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70443 to 50158. [2019-12-07 12:26:19,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50158 states. [2019-12-07 12:26:19,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50158 states to 50158 states and 161575 transitions. [2019-12-07 12:26:19,800 INFO L78 Accepts]: Start accepts. Automaton has 50158 states and 161575 transitions. Word has length 22 [2019-12-07 12:26:19,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:19,800 INFO L462 AbstractCegarLoop]: Abstraction has 50158 states and 161575 transitions. [2019-12-07 12:26:19,801 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:26:19,801 INFO L276 IsEmpty]: Start isEmpty. Operand 50158 states and 161575 transitions. [2019-12-07 12:26:19,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 12:26:19,814 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:19,814 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:19,814 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:19,814 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:19,815 INFO L82 PathProgramCache]: Analyzing trace with hash 1148876988, now seen corresponding path program 1 times [2019-12-07 12:26:19,815 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:19,815 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1146042362] [2019-12-07 12:26:19,815 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:19,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:19,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:19,870 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1146042362] [2019-12-07 12:26:19,870 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:19,870 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:26:19,870 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1787369046] [2019-12-07 12:26:19,870 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:26:19,870 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:19,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:26:19,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:26:19,871 INFO L87 Difference]: Start difference. First operand 50158 states and 161575 transitions. Second operand 5 states. [2019-12-07 12:26:20,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:20,300 INFO L93 Difference]: Finished difference Result 64850 states and 204706 transitions. [2019-12-07 12:26:20,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:26:20,301 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 12:26:20,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:20,394 INFO L225 Difference]: With dead ends: 64850 [2019-12-07 12:26:20,394 INFO L226 Difference]: Without dead ends: 64824 [2019-12-07 12:26:20,395 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:26:20,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64824 states. [2019-12-07 12:26:21,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64824 to 57106. [2019-12-07 12:26:21,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57106 states. [2019-12-07 12:26:21,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57106 states to 57106 states and 182757 transitions. [2019-12-07 12:26:21,782 INFO L78 Accepts]: Start accepts. Automaton has 57106 states and 182757 transitions. Word has length 25 [2019-12-07 12:26:21,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:21,782 INFO L462 AbstractCegarLoop]: Abstraction has 57106 states and 182757 transitions. [2019-12-07 12:26:21,782 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:26:21,782 INFO L276 IsEmpty]: Start isEmpty. Operand 57106 states and 182757 transitions. [2019-12-07 12:26:21,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:26:21,801 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:21,801 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:21,801 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:21,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:21,801 INFO L82 PathProgramCache]: Analyzing trace with hash -1026533913, now seen corresponding path program 1 times [2019-12-07 12:26:21,801 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:21,802 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212512506] [2019-12-07 12:26:21,802 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:21,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:21,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:21,849 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1212512506] [2019-12-07 12:26:21,849 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:21,849 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:26:21,850 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [922422374] [2019-12-07 12:26:21,850 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:26:21,850 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:21,850 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:26:21,850 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:26:21,850 INFO L87 Difference]: Start difference. First operand 57106 states and 182757 transitions. Second operand 6 states. [2019-12-07 12:26:22,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:22,334 INFO L93 Difference]: Finished difference Result 78306 states and 244062 transitions. [2019-12-07 12:26:22,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 12:26:22,335 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 12:26:22,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:22,448 INFO L225 Difference]: With dead ends: 78306 [2019-12-07 12:26:22,448 INFO L226 Difference]: Without dead ends: 78230 [2019-12-07 12:26:22,449 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:26:22,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78230 states. [2019-12-07 12:26:23,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78230 to 61534. [2019-12-07 12:26:23,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61534 states. [2019-12-07 12:26:23,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61534 states to 61534 states and 195704 transitions. [2019-12-07 12:26:23,577 INFO L78 Accepts]: Start accepts. Automaton has 61534 states and 195704 transitions. Word has length 27 [2019-12-07 12:26:23,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:23,577 INFO L462 AbstractCegarLoop]: Abstraction has 61534 states and 195704 transitions. [2019-12-07 12:26:23,577 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:26:23,577 INFO L276 IsEmpty]: Start isEmpty. Operand 61534 states and 195704 transitions. [2019-12-07 12:26:23,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 12:26:23,602 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:23,602 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:23,602 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:23,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:23,602 INFO L82 PathProgramCache]: Analyzing trace with hash 874122726, now seen corresponding path program 1 times [2019-12-07 12:26:23,602 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:23,603 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [862848032] [2019-12-07 12:26:23,603 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:23,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:23,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:23,643 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [862848032] [2019-12-07 12:26:23,643 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:23,643 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:26:23,644 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [711714737] [2019-12-07 12:26:23,644 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:26:23,644 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:23,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:26:23,644 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:26:23,644 INFO L87 Difference]: Start difference. First operand 61534 states and 195704 transitions. Second operand 4 states. [2019-12-07 12:26:23,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:23,707 INFO L93 Difference]: Finished difference Result 23873 states and 72799 transitions. [2019-12-07 12:26:23,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:26:23,707 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 12:26:23,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:23,732 INFO L225 Difference]: With dead ends: 23873 [2019-12-07 12:26:23,733 INFO L226 Difference]: Without dead ends: 23873 [2019-12-07 12:26:23,733 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:26:23,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23873 states. [2019-12-07 12:26:24,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23873 to 22743. [2019-12-07 12:26:24,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22743 states. [2019-12-07 12:26:24,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22743 states to 22743 states and 69534 transitions. [2019-12-07 12:26:24,248 INFO L78 Accepts]: Start accepts. Automaton has 22743 states and 69534 transitions. Word has length 30 [2019-12-07 12:26:24,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:24,249 INFO L462 AbstractCegarLoop]: Abstraction has 22743 states and 69534 transitions. [2019-12-07 12:26:24,249 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:26:24,249 INFO L276 IsEmpty]: Start isEmpty. Operand 22743 states and 69534 transitions. [2019-12-07 12:26:24,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 12:26:24,266 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:24,266 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:24,266 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:24,266 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:24,266 INFO L82 PathProgramCache]: Analyzing trace with hash 1079552274, now seen corresponding path program 1 times [2019-12-07 12:26:24,266 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:24,266 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1421856232] [2019-12-07 12:26:24,267 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:24,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:24,314 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:24,314 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1421856232] [2019-12-07 12:26:24,314 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:24,314 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:26:24,314 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [801731180] [2019-12-07 12:26:24,314 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:26:24,314 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:24,315 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:26:24,315 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:26:24,315 INFO L87 Difference]: Start difference. First operand 22743 states and 69534 transitions. Second operand 7 states. [2019-12-07 12:26:25,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:25,010 INFO L93 Difference]: Finished difference Result 30013 states and 88944 transitions. [2019-12-07 12:26:25,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 12:26:25,011 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 12:26:25,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:25,045 INFO L225 Difference]: With dead ends: 30013 [2019-12-07 12:26:25,045 INFO L226 Difference]: Without dead ends: 30013 [2019-12-07 12:26:25,046 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 12:26:25,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30013 states. [2019-12-07 12:26:25,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30013 to 22398. [2019-12-07 12:26:25,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22398 states. [2019-12-07 12:26:25,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22398 states to 22398 states and 68308 transitions. [2019-12-07 12:26:25,414 INFO L78 Accepts]: Start accepts. Automaton has 22398 states and 68308 transitions. Word has length 33 [2019-12-07 12:26:25,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:25,415 INFO L462 AbstractCegarLoop]: Abstraction has 22398 states and 68308 transitions. [2019-12-07 12:26:25,415 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:26:25,415 INFO L276 IsEmpty]: Start isEmpty. Operand 22398 states and 68308 transitions. [2019-12-07 12:26:25,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 12:26:25,433 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:25,434 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:25,434 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:25,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:25,434 INFO L82 PathProgramCache]: Analyzing trace with hash 604372690, now seen corresponding path program 1 times [2019-12-07 12:26:25,434 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:25,434 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1776722843] [2019-12-07 12:26:25,434 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:25,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:25,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:25,466 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1776722843] [2019-12-07 12:26:25,466 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:25,466 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:26:25,466 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1452885600] [2019-12-07 12:26:25,466 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:26:25,466 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:25,466 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:26:25,466 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:26:25,467 INFO L87 Difference]: Start difference. First operand 22398 states and 68308 transitions. Second operand 3 states. [2019-12-07 12:26:25,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:25,519 INFO L93 Difference]: Finished difference Result 22398 states and 67426 transitions. [2019-12-07 12:26:25,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:26:25,520 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 12:26:25,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:25,546 INFO L225 Difference]: With dead ends: 22398 [2019-12-07 12:26:25,546 INFO L226 Difference]: Without dead ends: 22398 [2019-12-07 12:26:25,546 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:26:25,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22398 states. [2019-12-07 12:26:25,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22398 to 22008. [2019-12-07 12:26:25,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22008 states. [2019-12-07 12:26:25,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22008 states to 22008 states and 66346 transitions. [2019-12-07 12:26:25,863 INFO L78 Accepts]: Start accepts. Automaton has 22008 states and 66346 transitions. Word has length 40 [2019-12-07 12:26:25,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:25,863 INFO L462 AbstractCegarLoop]: Abstraction has 22008 states and 66346 transitions. [2019-12-07 12:26:25,863 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:26:25,863 INFO L276 IsEmpty]: Start isEmpty. Operand 22008 states and 66346 transitions. [2019-12-07 12:26:25,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 12:26:25,883 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:25,883 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:25,883 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:25,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:25,883 INFO L82 PathProgramCache]: Analyzing trace with hash -1437156552, now seen corresponding path program 1 times [2019-12-07 12:26:25,884 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:25,884 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [621045237] [2019-12-07 12:26:25,884 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:25,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:25,923 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:25,923 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [621045237] [2019-12-07 12:26:25,923 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:25,923 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:26:25,923 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [347317404] [2019-12-07 12:26:25,924 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:26:25,924 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:25,924 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:26:25,924 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:26:25,924 INFO L87 Difference]: Start difference. First operand 22008 states and 66346 transitions. Second operand 5 states. [2019-12-07 12:26:25,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:25,992 INFO L93 Difference]: Finished difference Result 20270 states and 62501 transitions. [2019-12-07 12:26:25,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:26:25,992 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 12:26:25,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:26,013 INFO L225 Difference]: With dead ends: 20270 [2019-12-07 12:26:26,013 INFO L226 Difference]: Without dead ends: 19763 [2019-12-07 12:26:26,013 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:26:26,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19763 states. [2019-12-07 12:26:26,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19763 to 13019. [2019-12-07 12:26:26,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13019 states. [2019-12-07 12:26:26,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13019 states to 13019 states and 39840 transitions. [2019-12-07 12:26:26,242 INFO L78 Accepts]: Start accepts. Automaton has 13019 states and 39840 transitions. Word has length 41 [2019-12-07 12:26:26,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:26,242 INFO L462 AbstractCegarLoop]: Abstraction has 13019 states and 39840 transitions. [2019-12-07 12:26:26,242 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:26:26,242 INFO L276 IsEmpty]: Start isEmpty. Operand 13019 states and 39840 transitions. [2019-12-07 12:26:26,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:26:26,255 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:26,255 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:26,255 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:26,256 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:26,256 INFO L82 PathProgramCache]: Analyzing trace with hash 1448287585, now seen corresponding path program 1 times [2019-12-07 12:26:26,256 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:26,256 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100160086] [2019-12-07 12:26:26,256 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:26,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:26,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:26,283 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1100160086] [2019-12-07 12:26:26,283 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:26,283 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:26:26,283 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [517898673] [2019-12-07 12:26:26,284 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:26:26,284 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:26,284 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:26:26,284 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:26:26,284 INFO L87 Difference]: Start difference. First operand 13019 states and 39840 transitions. Second operand 3 states. [2019-12-07 12:26:26,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:26,346 INFO L93 Difference]: Finished difference Result 18559 states and 57120 transitions. [2019-12-07 12:26:26,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:26:26,346 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 12:26:26,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:26,367 INFO L225 Difference]: With dead ends: 18559 [2019-12-07 12:26:26,367 INFO L226 Difference]: Without dead ends: 18559 [2019-12-07 12:26:26,367 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:26:26,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18559 states. [2019-12-07 12:26:26,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18559 to 14685. [2019-12-07 12:26:26,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14685 states. [2019-12-07 12:26:26,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14685 states to 14685 states and 45666 transitions. [2019-12-07 12:26:26,626 INFO L78 Accepts]: Start accepts. Automaton has 14685 states and 45666 transitions. Word has length 66 [2019-12-07 12:26:26,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:26,626 INFO L462 AbstractCegarLoop]: Abstraction has 14685 states and 45666 transitions. [2019-12-07 12:26:26,626 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:26:26,626 INFO L276 IsEmpty]: Start isEmpty. Operand 14685 states and 45666 transitions. [2019-12-07 12:26:26,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:26:26,639 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:26,639 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:26,639 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:26,639 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:26,639 INFO L82 PathProgramCache]: Analyzing trace with hash 464347479, now seen corresponding path program 1 times [2019-12-07 12:26:26,639 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:26,640 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1087654753] [2019-12-07 12:26:26,640 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:26,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:26,718 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:26,718 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1087654753] [2019-12-07 12:26:26,718 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:26,718 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:26:26,718 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [585304235] [2019-12-07 12:26:26,718 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:26:26,718 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:26,719 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:26:26,719 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:26:26,719 INFO L87 Difference]: Start difference. First operand 14685 states and 45666 transitions. Second operand 4 states. [2019-12-07 12:26:26,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:26,787 INFO L93 Difference]: Finished difference Result 23475 states and 73860 transitions. [2019-12-07 12:26:26,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:26:26,788 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 12:26:26,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:26,812 INFO L225 Difference]: With dead ends: 23475 [2019-12-07 12:26:26,812 INFO L226 Difference]: Without dead ends: 20394 [2019-12-07 12:26:26,812 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:26:26,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20394 states. [2019-12-07 12:26:27,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20394 to 14421. [2019-12-07 12:26:27,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14421 states. [2019-12-07 12:26:27,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14421 states to 14421 states and 44823 transitions. [2019-12-07 12:26:27,051 INFO L78 Accepts]: Start accepts. Automaton has 14421 states and 44823 transitions. Word has length 66 [2019-12-07 12:26:27,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:27,051 INFO L462 AbstractCegarLoop]: Abstraction has 14421 states and 44823 transitions. [2019-12-07 12:26:27,051 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:26:27,051 INFO L276 IsEmpty]: Start isEmpty. Operand 14421 states and 44823 transitions. [2019-12-07 12:26:27,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:26:27,064 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:27,064 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:27,065 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:27,065 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:27,065 INFO L82 PathProgramCache]: Analyzing trace with hash -697308575, now seen corresponding path program 2 times [2019-12-07 12:26:27,065 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:27,065 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1412761304] [2019-12-07 12:26:27,065 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:27,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:27,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:27,131 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1412761304] [2019-12-07 12:26:27,131 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:27,131 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:26:27,131 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2127524034] [2019-12-07 12:26:27,131 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:26:27,131 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:27,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:26:27,132 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:26:27,132 INFO L87 Difference]: Start difference. First operand 14421 states and 44823 transitions. Second operand 5 states. [2019-12-07 12:26:27,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:27,235 INFO L93 Difference]: Finished difference Result 32253 states and 101636 transitions. [2019-12-07 12:26:27,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 12:26:27,235 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 12:26:27,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:27,258 INFO L225 Difference]: With dead ends: 32253 [2019-12-07 12:26:27,258 INFO L226 Difference]: Without dead ends: 18721 [2019-12-07 12:26:27,259 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:26:27,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18721 states. [2019-12-07 12:26:27,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18721 to 13825. [2019-12-07 12:26:27,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13825 states. [2019-12-07 12:26:27,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13825 states to 13825 states and 42890 transitions. [2019-12-07 12:26:27,489 INFO L78 Accepts]: Start accepts. Automaton has 13825 states and 42890 transitions. Word has length 66 [2019-12-07 12:26:27,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:27,489 INFO L462 AbstractCegarLoop]: Abstraction has 13825 states and 42890 transitions. [2019-12-07 12:26:27,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:26:27,489 INFO L276 IsEmpty]: Start isEmpty. Operand 13825 states and 42890 transitions. [2019-12-07 12:26:27,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:26:27,501 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:27,502 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:27,502 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:27,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:27,502 INFO L82 PathProgramCache]: Analyzing trace with hash -1860630415, now seen corresponding path program 3 times [2019-12-07 12:26:27,502 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:27,502 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [531962802] [2019-12-07 12:26:27,502 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:27,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:27,660 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:27,660 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [531962802] [2019-12-07 12:26:27,660 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:27,660 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:26:27,660 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1827633489] [2019-12-07 12:26:27,661 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:26:27,661 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:27,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:26:27,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:26:27,661 INFO L87 Difference]: Start difference. First operand 13825 states and 42890 transitions. Second operand 11 states. [2019-12-07 12:26:28,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:28,490 INFO L93 Difference]: Finished difference Result 42606 states and 132271 transitions. [2019-12-07 12:26:28,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 12:26:28,490 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 12:26:28,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:28,522 INFO L225 Difference]: With dead ends: 42606 [2019-12-07 12:26:28,522 INFO L226 Difference]: Without dead ends: 28014 [2019-12-07 12:26:28,523 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 382 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=284, Invalid=1198, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 12:26:28,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28014 states. [2019-12-07 12:26:28,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28014 to 16255. [2019-12-07 12:26:28,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16255 states. [2019-12-07 12:26:28,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16255 states to 16255 states and 50028 transitions. [2019-12-07 12:26:28,834 INFO L78 Accepts]: Start accepts. Automaton has 16255 states and 50028 transitions. Word has length 66 [2019-12-07 12:26:28,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:28,834 INFO L462 AbstractCegarLoop]: Abstraction has 16255 states and 50028 transitions. [2019-12-07 12:26:28,834 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:26:28,835 INFO L276 IsEmpty]: Start isEmpty. Operand 16255 states and 50028 transitions. [2019-12-07 12:26:28,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:26:28,849 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:28,849 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:28,849 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:28,849 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:28,850 INFO L82 PathProgramCache]: Analyzing trace with hash 383585543, now seen corresponding path program 4 times [2019-12-07 12:26:28,850 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:28,850 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816164218] [2019-12-07 12:26:28,850 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:28,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:28,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:28,974 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [816164218] [2019-12-07 12:26:28,974 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:28,974 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 12:26:28,974 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1006711025] [2019-12-07 12:26:28,975 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 12:26:28,975 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:28,975 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 12:26:28,975 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 12:26:28,975 INFO L87 Difference]: Start difference. First operand 16255 states and 50028 transitions. Second operand 12 states. [2019-12-07 12:26:29,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:29,680 INFO L93 Difference]: Finished difference Result 28609 states and 87347 transitions. [2019-12-07 12:26:29,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 12:26:29,681 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 12:26:29,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:29,711 INFO L225 Difference]: With dead ends: 28609 [2019-12-07 12:26:29,712 INFO L226 Difference]: Without dead ends: 27638 [2019-12-07 12:26:29,712 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=173, Invalid=697, Unknown=0, NotChecked=0, Total=870 [2019-12-07 12:26:29,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27638 states. [2019-12-07 12:26:29,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27638 to 16007. [2019-12-07 12:26:29,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16007 states. [2019-12-07 12:26:30,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16007 states to 16007 states and 49284 transitions. [2019-12-07 12:26:30,017 INFO L78 Accepts]: Start accepts. Automaton has 16007 states and 49284 transitions. Word has length 66 [2019-12-07 12:26:30,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:30,017 INFO L462 AbstractCegarLoop]: Abstraction has 16007 states and 49284 transitions. [2019-12-07 12:26:30,017 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 12:26:30,017 INFO L276 IsEmpty]: Start isEmpty. Operand 16007 states and 49284 transitions. [2019-12-07 12:26:30,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:26:30,032 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:30,032 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:30,032 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:30,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:30,032 INFO L82 PathProgramCache]: Analyzing trace with hash 1198934511, now seen corresponding path program 5 times [2019-12-07 12:26:30,032 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:30,033 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1140476963] [2019-12-07 12:26:30,033 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:30,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:30,339 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:30,339 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1140476963] [2019-12-07 12:26:30,339 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:30,339 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 12:26:30,339 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [645152423] [2019-12-07 12:26:30,339 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 12:26:30,340 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:30,340 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 12:26:30,340 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-12-07 12:26:30,340 INFO L87 Difference]: Start difference. First operand 16007 states and 49284 transitions. Second operand 12 states. [2019-12-07 12:26:31,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:31,306 INFO L93 Difference]: Finished difference Result 38440 states and 118453 transitions. [2019-12-07 12:26:31,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 12:26:31,306 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 12:26:31,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:31,356 INFO L225 Difference]: With dead ends: 38440 [2019-12-07 12:26:31,356 INFO L226 Difference]: Without dead ends: 37407 [2019-12-07 12:26:31,356 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=158, Invalid=492, Unknown=0, NotChecked=0, Total=650 [2019-12-07 12:26:31,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37407 states. [2019-12-07 12:26:31,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37407 to 16178. [2019-12-07 12:26:31,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16178 states. [2019-12-07 12:26:31,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16178 states to 16178 states and 49628 transitions. [2019-12-07 12:26:31,730 INFO L78 Accepts]: Start accepts. Automaton has 16178 states and 49628 transitions. Word has length 66 [2019-12-07 12:26:31,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:31,730 INFO L462 AbstractCegarLoop]: Abstraction has 16178 states and 49628 transitions. [2019-12-07 12:26:31,730 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 12:26:31,730 INFO L276 IsEmpty]: Start isEmpty. Operand 16178 states and 49628 transitions. [2019-12-07 12:26:31,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:26:31,745 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:31,745 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:31,745 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:31,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:31,746 INFO L82 PathProgramCache]: Analyzing trace with hash -821584657, now seen corresponding path program 6 times [2019-12-07 12:26:31,746 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:31,746 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1352089336] [2019-12-07 12:26:31,746 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:31,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:31,795 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:31,796 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1352089336] [2019-12-07 12:26:31,796 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:31,796 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:26:31,796 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1180683307] [2019-12-07 12:26:31,796 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:26:31,796 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:31,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:26:31,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:26:31,797 INFO L87 Difference]: Start difference. First operand 16178 states and 49628 transitions. Second operand 4 states. [2019-12-07 12:26:31,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:31,887 INFO L93 Difference]: Finished difference Result 19024 states and 58104 transitions. [2019-12-07 12:26:31,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:26:31,888 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 12:26:31,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:31,908 INFO L225 Difference]: With dead ends: 19024 [2019-12-07 12:26:31,909 INFO L226 Difference]: Without dead ends: 19024 [2019-12-07 12:26:31,909 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:26:31,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19024 states. [2019-12-07 12:26:32,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19024 to 16533. [2019-12-07 12:26:32,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16533 states. [2019-12-07 12:26:32,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16533 states to 16533 states and 50824 transitions. [2019-12-07 12:26:32,172 INFO L78 Accepts]: Start accepts. Automaton has 16533 states and 50824 transitions. Word has length 66 [2019-12-07 12:26:32,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:32,172 INFO L462 AbstractCegarLoop]: Abstraction has 16533 states and 50824 transitions. [2019-12-07 12:26:32,172 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:26:32,172 INFO L276 IsEmpty]: Start isEmpty. Operand 16533 states and 50824 transitions. [2019-12-07 12:26:32,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:26:32,186 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:32,186 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:32,186 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:32,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:32,186 INFO L82 PathProgramCache]: Analyzing trace with hash 1776964270, now seen corresponding path program 1 times [2019-12-07 12:26:32,186 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:32,186 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1761065382] [2019-12-07 12:26:32,187 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:32,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:32,213 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:32,213 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1761065382] [2019-12-07 12:26:32,213 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:32,213 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:26:32,213 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [240367490] [2019-12-07 12:26:32,213 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:26:32,213 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:32,213 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:26:32,214 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:26:32,214 INFO L87 Difference]: Start difference. First operand 16533 states and 50824 transitions. Second operand 4 states. [2019-12-07 12:26:32,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:32,419 INFO L93 Difference]: Finished difference Result 26875 states and 83330 transitions. [2019-12-07 12:26:32,419 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:26:32,419 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 12:26:32,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:32,450 INFO L225 Difference]: With dead ends: 26875 [2019-12-07 12:26:32,450 INFO L226 Difference]: Without dead ends: 26875 [2019-12-07 12:26:32,451 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:26:32,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26875 states. [2019-12-07 12:26:32,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26875 to 18035. [2019-12-07 12:26:32,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18035 states. [2019-12-07 12:26:32,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18035 states to 18035 states and 56061 transitions. [2019-12-07 12:26:32,806 INFO L78 Accepts]: Start accepts. Automaton has 18035 states and 56061 transitions. Word has length 67 [2019-12-07 12:26:32,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:32,806 INFO L462 AbstractCegarLoop]: Abstraction has 18035 states and 56061 transitions. [2019-12-07 12:26:32,806 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:26:32,806 INFO L276 IsEmpty]: Start isEmpty. Operand 18035 states and 56061 transitions. [2019-12-07 12:26:32,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:26:32,822 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:32,822 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:32,823 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:32,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:32,823 INFO L82 PathProgramCache]: Analyzing trace with hash -1767858535, now seen corresponding path program 1 times [2019-12-07 12:26:32,823 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:32,823 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [522431] [2019-12-07 12:26:32,823 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:32,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:33,025 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:33,025 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [522431] [2019-12-07 12:26:33,025 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:33,025 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 12:26:33,025 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1256906088] [2019-12-07 12:26:33,025 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:26:33,026 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:33,026 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:26:33,026 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:26:33,026 INFO L87 Difference]: Start difference. First operand 18035 states and 56061 transitions. Second operand 11 states. [2019-12-07 12:26:34,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:34,896 INFO L93 Difference]: Finished difference Result 34210 states and 101971 transitions. [2019-12-07 12:26:34,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 12:26:34,897 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 12:26:34,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:34,935 INFO L225 Difference]: With dead ends: 34210 [2019-12-07 12:26:34,935 INFO L226 Difference]: Without dead ends: 33458 [2019-12-07 12:26:34,935 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=135, Invalid=327, Unknown=0, NotChecked=0, Total=462 [2019-12-07 12:26:35,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33458 states. [2019-12-07 12:26:35,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33458 to 17912. [2019-12-07 12:26:35,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17912 states. [2019-12-07 12:26:35,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17912 states to 17912 states and 54707 transitions. [2019-12-07 12:26:35,305 INFO L78 Accepts]: Start accepts. Automaton has 17912 states and 54707 transitions. Word has length 67 [2019-12-07 12:26:35,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:35,305 INFO L462 AbstractCegarLoop]: Abstraction has 17912 states and 54707 transitions. [2019-12-07 12:26:35,305 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:26:35,305 INFO L276 IsEmpty]: Start isEmpty. Operand 17912 states and 54707 transitions. [2019-12-07 12:26:35,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:26:35,321 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:35,322 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:35,322 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:35,322 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:35,322 INFO L82 PathProgramCache]: Analyzing trace with hash -1807325043, now seen corresponding path program 1 times [2019-12-07 12:26:35,322 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:35,322 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [105722437] [2019-12-07 12:26:35,322 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:35,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:35,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:35,350 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [105722437] [2019-12-07 12:26:35,350 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:35,350 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:26:35,351 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [854451384] [2019-12-07 12:26:35,351 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:26:35,351 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:35,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:26:35,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:26:35,351 INFO L87 Difference]: Start difference. First operand 17912 states and 54707 transitions. Second operand 3 states. [2019-12-07 12:26:35,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:35,477 INFO L93 Difference]: Finished difference Result 24115 states and 72950 transitions. [2019-12-07 12:26:35,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:26:35,477 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 12:26:35,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:35,502 INFO L225 Difference]: With dead ends: 24115 [2019-12-07 12:26:35,502 INFO L226 Difference]: Without dead ends: 24115 [2019-12-07 12:26:35,502 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:26:35,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24115 states. [2019-12-07 12:26:35,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24115 to 18033. [2019-12-07 12:26:35,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18033 states. [2019-12-07 12:26:35,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18033 states to 18033 states and 55122 transitions. [2019-12-07 12:26:35,810 INFO L78 Accepts]: Start accepts. Automaton has 18033 states and 55122 transitions. Word has length 67 [2019-12-07 12:26:35,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:35,810 INFO L462 AbstractCegarLoop]: Abstraction has 18033 states and 55122 transitions. [2019-12-07 12:26:35,810 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:26:35,810 INFO L276 IsEmpty]: Start isEmpty. Operand 18033 states and 55122 transitions. [2019-12-07 12:26:35,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:26:35,826 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:35,826 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:35,827 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:35,827 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:35,827 INFO L82 PathProgramCache]: Analyzing trace with hash -1057180552, now seen corresponding path program 1 times [2019-12-07 12:26:35,827 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:35,827 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1679554849] [2019-12-07 12:26:35,827 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:35,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:36,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:36,090 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1679554849] [2019-12-07 12:26:36,090 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:36,090 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 12:26:36,090 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2054313706] [2019-12-07 12:26:36,090 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 12:26:36,090 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:36,090 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 12:26:36,091 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=195, Unknown=0, NotChecked=0, Total=240 [2019-12-07 12:26:36,091 INFO L87 Difference]: Start difference. First operand 18033 states and 55122 transitions. Second operand 16 states. [2019-12-07 12:26:41,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:41,389 INFO L93 Difference]: Finished difference Result 33692 states and 99972 transitions. [2019-12-07 12:26:41,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 12:26:41,389 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 12:26:41,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:41,424 INFO L225 Difference]: With dead ends: 33692 [2019-12-07 12:26:41,424 INFO L226 Difference]: Without dead ends: 31016 [2019-12-07 12:26:41,425 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 377 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=275, Invalid=1365, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 12:26:41,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31016 states. [2019-12-07 12:26:41,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31016 to 18567. [2019-12-07 12:26:41,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18567 states. [2019-12-07 12:26:41,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18567 states to 18567 states and 56189 transitions. [2019-12-07 12:26:41,777 INFO L78 Accepts]: Start accepts. Automaton has 18567 states and 56189 transitions. Word has length 67 [2019-12-07 12:26:41,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:41,777 INFO L462 AbstractCegarLoop]: Abstraction has 18567 states and 56189 transitions. [2019-12-07 12:26:41,778 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 12:26:41,778 INFO L276 IsEmpty]: Start isEmpty. Operand 18567 states and 56189 transitions. [2019-12-07 12:26:41,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:26:41,794 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:41,794 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:41,794 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:41,795 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:41,795 INFO L82 PathProgramCache]: Analyzing trace with hash -1161120626, now seen corresponding path program 2 times [2019-12-07 12:26:41,795 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:41,795 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1319507794] [2019-12-07 12:26:41,795 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:41,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:41,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:41,958 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1319507794] [2019-12-07 12:26:41,958 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:41,958 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 12:26:41,958 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1330667626] [2019-12-07 12:26:41,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 12:26:41,958 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:41,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 12:26:41,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:26:41,959 INFO L87 Difference]: Start difference. First operand 18567 states and 56189 transitions. Second operand 13 states. [2019-12-07 12:26:45,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:45,180 INFO L93 Difference]: Finished difference Result 41571 states and 125412 transitions. [2019-12-07 12:26:45,180 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 12:26:45,180 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 12:26:45,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:45,236 INFO L225 Difference]: With dead ends: 41571 [2019-12-07 12:26:45,237 INFO L226 Difference]: Without dead ends: 41571 [2019-12-07 12:26:45,237 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 336 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=331, Invalid=1151, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 12:26:45,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41571 states. [2019-12-07 12:26:45,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41571 to 22880. [2019-12-07 12:26:45,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22880 states. [2019-12-07 12:26:45,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22880 states to 22880 states and 69404 transitions. [2019-12-07 12:26:45,777 INFO L78 Accepts]: Start accepts. Automaton has 22880 states and 69404 transitions. Word has length 67 [2019-12-07 12:26:45,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:45,777 INFO L462 AbstractCegarLoop]: Abstraction has 22880 states and 69404 transitions. [2019-12-07 12:26:45,777 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 12:26:45,777 INFO L276 IsEmpty]: Start isEmpty. Operand 22880 states and 69404 transitions. [2019-12-07 12:26:45,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:26:45,796 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:45,796 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:45,796 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:45,796 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:45,796 INFO L82 PathProgramCache]: Analyzing trace with hash 1813744868, now seen corresponding path program 3 times [2019-12-07 12:26:45,796 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:45,796 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [254456754] [2019-12-07 12:26:45,796 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:45,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:45,991 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:45,991 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [254456754] [2019-12-07 12:26:45,991 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:45,991 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 12:26:45,991 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [433253723] [2019-12-07 12:26:45,991 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 12:26:45,991 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:45,991 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 12:26:45,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2019-12-07 12:26:45,992 INFO L87 Difference]: Start difference. First operand 22880 states and 69404 transitions. Second operand 12 states. [2019-12-07 12:26:50,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:50,001 INFO L93 Difference]: Finished difference Result 50445 states and 150521 transitions. [2019-12-07 12:26:50,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 12:26:50,001 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 12:26:50,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:50,062 INFO L225 Difference]: With dead ends: 50445 [2019-12-07 12:26:50,062 INFO L226 Difference]: Without dead ends: 48289 [2019-12-07 12:26:50,063 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 158 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=187, Invalid=683, Unknown=0, NotChecked=0, Total=870 [2019-12-07 12:26:50,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48289 states. [2019-12-07 12:26:50,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48289 to 24940. [2019-12-07 12:26:50,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24940 states. [2019-12-07 12:26:50,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24940 states to 24940 states and 75036 transitions. [2019-12-07 12:26:50,629 INFO L78 Accepts]: Start accepts. Automaton has 24940 states and 75036 transitions. Word has length 67 [2019-12-07 12:26:50,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:50,629 INFO L462 AbstractCegarLoop]: Abstraction has 24940 states and 75036 transitions. [2019-12-07 12:26:50,629 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 12:26:50,629 INFO L276 IsEmpty]: Start isEmpty. Operand 24940 states and 75036 transitions. [2019-12-07 12:26:50,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:26:50,654 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:50,654 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:50,655 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:50,655 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:50,655 INFO L82 PathProgramCache]: Analyzing trace with hash 1038037876, now seen corresponding path program 4 times [2019-12-07 12:26:50,655 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:50,655 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2111294237] [2019-12-07 12:26:50,655 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:50,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:26:50,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:26:50,719 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2111294237] [2019-12-07 12:26:50,719 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:26:50,719 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:26:50,719 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [948342459] [2019-12-07 12:26:50,719 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:26:50,719 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:26:50,719 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:26:50,720 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:26:50,720 INFO L87 Difference]: Start difference. First operand 24940 states and 75036 transitions. Second operand 5 states. [2019-12-07 12:26:50,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:26:50,822 INFO L93 Difference]: Finished difference Result 24940 states and 74796 transitions. [2019-12-07 12:26:50,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:26:50,823 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2019-12-07 12:26:50,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:26:50,852 INFO L225 Difference]: With dead ends: 24940 [2019-12-07 12:26:50,852 INFO L226 Difference]: Without dead ends: 24940 [2019-12-07 12:26:50,852 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:26:50,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24940 states. [2019-12-07 12:26:51,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24940 to 20880. [2019-12-07 12:26:51,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20880 states. [2019-12-07 12:26:51,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20880 states to 20880 states and 62257 transitions. [2019-12-07 12:26:51,176 INFO L78 Accepts]: Start accepts. Automaton has 20880 states and 62257 transitions. Word has length 67 [2019-12-07 12:26:51,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:26:51,176 INFO L462 AbstractCegarLoop]: Abstraction has 20880 states and 62257 transitions. [2019-12-07 12:26:51,176 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:26:51,177 INFO L276 IsEmpty]: Start isEmpty. Operand 20880 states and 62257 transitions. [2019-12-07 12:26:51,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:26:51,194 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:26:51,194 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:26:51,194 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:26:51,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:26:51,195 INFO L82 PathProgramCache]: Analyzing trace with hash -2101838907, now seen corresponding path program 1 times [2019-12-07 12:26:51,195 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:26:51,195 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1964457603] [2019-12-07 12:26:51,195 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:26:51,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:26:51,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:26:51,272 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:26:51,272 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 12:26:51,275 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [894] [894] ULTIMATE.startENTRY-->L820: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t1385~0.base_26| 1)) (= v_~z$w_buff0_used~0_958 0) (= v_~x~0_72 0) (= v_~z$r_buff0_thd2~0_111 0) (= |v_#NULL.offset_6| 0) (= 0 v_~__unbuffered_p1_EAX~0_40) (= v_~z$r_buff1_thd0~0_129 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1385~0.base_26| 4)) (= v_~z$w_buff1_used~0_531 0) (= v_~y~0_19 0) (= |v_ULTIMATE.start_main_~#t1385~0.offset_19| 0) (= v_~z$r_buff0_thd1~0_132 0) (= v_~z$r_buff1_thd1~0_108 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~main$tmp_guard1~0_39 0) (= v_~z$w_buff0~0_487 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$r_buff1_thd2~0_104 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1385~0.base_26| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1385~0.base_26|) |v_ULTIMATE.start_main_~#t1385~0.offset_19| 0)) |v_#memory_int_21|) (= 0 v_~__unbuffered_p2_EAX~0_53) (= (select .cse0 |v_ULTIMATE.start_main_~#t1385~0.base_26|) 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t1385~0.base_26|) (= v_~z$w_buff1~0_307 0) (= 0 v_~z$r_buff1_thd3~0_237) (= 0 |v_#NULL.base_6|) (= 0 v_~z$flush_delayed~0_24) (= v_~z$r_buff0_thd0~0_141 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= v_~z$mem_tmp~0_13 0) (= v_~z~0_174 0) (= 0 v_~__unbuffered_cnt~0_91) (= 0 v_~z$r_buff0_thd3~0_332) (= v_~main$tmp_guard0~0_26 0) (= v_~weak$$choice2~0_107 0) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_104, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_31|, ULTIMATE.start_main_~#t1387~0.offset=|v_ULTIMATE.start_main_~#t1387~0.offset_12|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_287|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_85|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_141, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_40, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_53, ULTIMATE.start_main_~#t1387~0.base=|v_ULTIMATE.start_main_~#t1387~0.base_16|, ~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_531, ~z$flush_delayed~0=v_~z$flush_delayed~0_24, ULTIMATE.start_main_~#t1385~0.offset=|v_ULTIMATE.start_main_~#t1385~0.offset_19|, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_108, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_332, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91, ~x~0=v_~x~0_72, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_307, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_39, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_35|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t1386~0.base=|v_ULTIMATE.start_main_~#t1386~0.base_23|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_35|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_129, ~y~0=v_~y~0_19, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_111, ULTIMATE.start_main_~#t1386~0.offset=|v_ULTIMATE.start_main_~#t1386~0.offset_19|, ULTIMATE.start_main_~#t1385~0.base=|v_ULTIMATE.start_main_~#t1385~0.base_26|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_958, ~z$w_buff0~0=v_~z$w_buff0~0_487, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_237, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_24|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_174, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_132} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1387~0.offset, ~z$read_delayed~0, #NULL.offset, ~z$w_buff1~0, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1386~0.base, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~__unbuffered_p1_EAX~0, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1387~0.base, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1386~0.offset, ~z$mem_tmp~0, ULTIMATE.start_main_~#t1385~0.base, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1385~0.offset, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#res, ~z$r_buff1_thd1~0, #valid, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 12:26:51,275 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L820-1-->L822: Formula: (and (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1386~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1386~0.base_9|) |v_ULTIMATE.start_main_~#t1386~0.offset_8| 1))) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t1386~0.base_9| 1)) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t1386~0.base_9|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t1386~0.base_9|)) (= |v_ULTIMATE.start_main_~#t1386~0.offset_8| 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1386~0.base_9| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1386~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_3|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1386~0.base=|v_ULTIMATE.start_main_~#t1386~0.base_9|, ULTIMATE.start_main_~#t1386~0.offset=|v_ULTIMATE.start_main_~#t1386~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1386~0.base, ULTIMATE.start_main_~#t1386~0.offset] because there is no mapped edge [2019-12-07 12:26:51,276 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] P0ENTRY-->L4-3: Formula: (and (= 1 ~z$w_buff0_used~0_Out766162216) (= P0Thread1of1ForFork0_~arg.base_Out766162216 |P0Thread1of1ForFork0_#in~arg.base_In766162216|) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out766162216| (ite (not (and (not (= (mod ~z$w_buff0_used~0_Out766162216 256) 0)) (not (= 0 (mod ~z$w_buff1_used~0_Out766162216 256))))) 1 0)) (= ~z$w_buff1~0_Out766162216 ~z$w_buff0~0_In766162216) (= |P0Thread1of1ForFork0_#in~arg.offset_In766162216| P0Thread1of1ForFork0_~arg.offset_Out766162216) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out766162216| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out766162216) (= ~z$w_buff1_used~0_Out766162216 ~z$w_buff0_used~0_In766162216) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out766162216)) (= ~z$w_buff0~0_Out766162216 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In766162216|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In766162216, ~z$w_buff0~0=~z$w_buff0~0_In766162216, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In766162216|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In766162216|, ~z$w_buff0_used~0=~z$w_buff0_used~0_Out766162216, ~z$w_buff0~0=~z$w_buff0~0_Out766162216, ~z$w_buff1_used~0=~z$w_buff1_used~0_Out766162216, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out766162216, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In766162216|, ~z$w_buff1~0=~z$w_buff1~0_Out766162216, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out766162216, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out766162216|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out766162216} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 12:26:51,276 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L822-1-->L824: Formula: (and (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1387~0.base_11|)) (= (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1387~0.base_11| 1) |v_#valid_40|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1387~0.base_11|) (= |v_ULTIMATE.start_main_~#t1387~0.offset_9| 0) (not (= |v_ULTIMATE.start_main_~#t1387~0.base_11| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1387~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1387~0.base_11|) |v_ULTIMATE.start_main_~#t1387~0.offset_9| 2)) |v_#memory_int_15|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1387~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1387~0.offset=|v_ULTIMATE.start_main_~#t1387~0.offset_9|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1387~0.base=|v_ULTIMATE.start_main_~#t1387~0.base_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1387~0.offset, #length, ULTIMATE.start_main_~#t1387~0.base] because there is no mapped edge [2019-12-07 12:26:51,277 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L764-2-->L764-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In1743393712 256) 0)) (.cse2 (= |P1Thread1of1ForFork1_#t~ite9_Out1743393712| |P1Thread1of1ForFork1_#t~ite10_Out1743393712|)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1743393712 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite9_Out1743393712| ~z~0_In1743393712) (or .cse0 .cse1) .cse2) (and (not .cse1) (= |P1Thread1of1ForFork1_#t~ite9_Out1743393712| ~z$w_buff1~0_In1743393712) .cse2 (not .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1743393712, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1743393712, ~z$w_buff1~0=~z$w_buff1~0_In1743393712, ~z~0=~z~0_In1743393712} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out1743393712|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1743393712, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1743393712, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out1743393712|, ~z$w_buff1~0=~z$w_buff1~0_In1743393712, ~z~0=~z~0_In1743393712} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 12:26:51,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In722674262 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In722674262 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out722674262|)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In722674262 |P1Thread1of1ForFork1_#t~ite11_Out722674262|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In722674262, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In722674262} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In722674262, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out722674262|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In722674262} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 12:26:51,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd2~0_In-126370207 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-126370207 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-126370207 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-126370207 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-126370207 |P1Thread1of1ForFork1_#t~ite12_Out-126370207|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-126370207|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-126370207, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-126370207, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-126370207, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-126370207} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-126370207, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-126370207, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-126370207, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-126370207|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-126370207} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 12:26:51,280 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In-1252370871 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1252370871 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite13_Out-1252370871| 0)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out-1252370871| ~z$r_buff0_thd2~0_In-1252370871) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1252370871, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1252370871} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1252370871, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1252370871|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1252370871} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 12:26:51,280 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L787-->L787-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-189147909 256)))) (or (and .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-189147909 256)))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In-189147909 256) 0)) (= (mod ~z$w_buff0_used~0_In-189147909 256) 0) (and (= (mod ~z$w_buff1_used~0_In-189147909 256) 0) .cse1))) (= ~z$w_buff1~0_In-189147909 |P2Thread1of1ForFork2_#t~ite23_Out-189147909|) (= |P2Thread1of1ForFork2_#t~ite23_Out-189147909| |P2Thread1of1ForFork2_#t~ite24_Out-189147909|)) (and (= ~z$w_buff1~0_In-189147909 |P2Thread1of1ForFork2_#t~ite24_Out-189147909|) (= |P2Thread1of1ForFork2_#t~ite23_In-189147909| |P2Thread1of1ForFork2_#t~ite23_Out-189147909|) (not .cse0)))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In-189147909|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-189147909, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-189147909, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-189147909, ~z$w_buff1~0=~z$w_buff1~0_In-189147909, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-189147909, ~weak$$choice2~0=~weak$$choice2~0_In-189147909} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out-189147909|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out-189147909|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-189147909, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-189147909, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-189147909, ~z$w_buff1~0=~z$w_buff1~0_In-189147909, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-189147909, ~weak$$choice2~0=~weak$$choice2~0_In-189147909} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 12:26:51,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L788-->L788-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-318201130 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite27_Out-318201130| ~z$w_buff0_used~0_In-318201130) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite26_In-318201130| |P2Thread1of1ForFork2_#t~ite26_Out-318201130|)) (and .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-318201130 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In-318201130 256)) (and (= 0 (mod ~z$r_buff1_thd3~0_In-318201130 256)) .cse1) (and (= 0 (mod ~z$w_buff1_used~0_In-318201130 256)) .cse1))) (= |P2Thread1of1ForFork2_#t~ite26_Out-318201130| ~z$w_buff0_used~0_In-318201130) (= |P2Thread1of1ForFork2_#t~ite26_Out-318201130| |P2Thread1of1ForFork2_#t~ite27_Out-318201130|)))) InVars {P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In-318201130|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-318201130, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-318201130, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-318201130, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-318201130, ~weak$$choice2~0=~weak$$choice2~0_In-318201130} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out-318201130|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-318201130, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-318201130, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-318201130, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-318201130, ~weak$$choice2~0=~weak$$choice2~0_In-318201130, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out-318201130|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 12:26:51,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd2~0_In-115938450 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-115938450 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-115938450 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-115938450 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-115938450|)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~z$r_buff1_thd2~0_In-115938450 |P1Thread1of1ForFork1_#t~ite14_Out-115938450|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-115938450, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-115938450, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-115938450, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-115938450} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-115938450, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-115938450, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-115938450, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-115938450|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-115938450} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 12:26:51,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L768-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_26| v_~z$r_buff1_thd2~0_55) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_26|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_55, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_25|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:26:51,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L789-->L789-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1774978086 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite29_In-1774978086| |P2Thread1of1ForFork2_#t~ite29_Out-1774978086|) (= ~z$w_buff1_used~0_In-1774978086 |P2Thread1of1ForFork2_#t~ite30_Out-1774978086|) (not .cse0)) (and .cse0 (= ~z$w_buff1_used~0_In-1774978086 |P2Thread1of1ForFork2_#t~ite29_Out-1774978086|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1774978086 256)))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-1774978086 256))) (= (mod ~z$w_buff0_used~0_In-1774978086 256) 0) (and .cse1 (= (mod ~z$w_buff1_used~0_In-1774978086 256) 0)))) (= |P2Thread1of1ForFork2_#t~ite29_Out-1774978086| |P2Thread1of1ForFork2_#t~ite30_Out-1774978086|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1774978086, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1774978086, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1774978086, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1774978086, ~weak$$choice2~0=~weak$$choice2~0_In-1774978086, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_In-1774978086|} OutVars{P2Thread1of1ForFork2_#t~ite30=|P2Thread1of1ForFork2_#t~ite30_Out-1774978086|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1774978086, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1774978086, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1774978086, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1774978086, ~weak$$choice2~0=~weak$$choice2~0_In-1774978086, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_Out-1774978086|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite30, P2Thread1of1ForFork2_#t~ite29] because there is no mapped edge [2019-12-07 12:26:51,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L790-->L791: Formula: (and (= v_~z$r_buff0_thd3~0_68 v_~z$r_buff0_thd3~0_67) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_68, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 12:26:51,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L793-->L797: Formula: (and (= 0 v_~z$flush_delayed~0_6) (= v_~z~0_25 v_~z$mem_tmp~0_5) (not (= 0 (mod v_~z$flush_delayed~0_7 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_5, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_6, ~z~0=v_~z~0_25} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 12:26:51,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L745-->L745-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In-1223581189 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1223581189 256)))) (or (and (= ~z$w_buff0_used~0_In-1223581189 |P0Thread1of1ForFork0_#t~ite5_Out-1223581189|) (or .cse0 .cse1)) (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1223581189|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1223581189, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1223581189} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1223581189|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1223581189, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1223581189} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 12:26:51,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L746-->L746-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd1~0_In-1084307539 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1084307539 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-1084307539 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1084307539 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite6_Out-1084307539| ~z$w_buff1_used~0_In-1084307539)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P0Thread1of1ForFork0_#t~ite6_Out-1084307539| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1084307539, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1084307539, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1084307539, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1084307539} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1084307539|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1084307539, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1084307539, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1084307539, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1084307539} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 12:26:51,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L747-->L748: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In1236895210 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In1236895210 256) 0)) (.cse0 (= ~z$r_buff0_thd1~0_Out1236895210 ~z$r_buff0_thd1~0_In1236895210))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse1) (= ~z$r_buff0_thd1~0_Out1236895210 0)) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1236895210, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1236895210} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1236895210, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1236895210|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1236895210} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:26:51,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L748-->L748-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In-624740303 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-624740303 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-624740303 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-624740303 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd1~0_In-624740303 |P0Thread1of1ForFork0_#t~ite8_Out-624740303|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out-624740303|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-624740303, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-624740303, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-624740303, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-624740303} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-624740303, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-624740303|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-624740303, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-624740303, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-624740303} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 12:26:51,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L748-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_68 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= v_~__unbuffered_cnt~0_73 (+ v_~__unbuffered_cnt~0_74 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_68, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_73} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 12:26:51,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L797-2-->L797-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork2_#t~ite38_Out1595792274| |P2Thread1of1ForFork2_#t~ite39_Out1595792274|)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1595792274 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1595792274 256) 0))) (or (and (not .cse0) (not .cse1) .cse2 (= |P2Thread1of1ForFork2_#t~ite38_Out1595792274| ~z$w_buff1~0_In1595792274)) (and .cse2 (= |P2Thread1of1ForFork2_#t~ite38_Out1595792274| ~z~0_In1595792274) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1595792274, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1595792274, ~z$w_buff1~0=~z$w_buff1~0_In1595792274, ~z~0=~z~0_In1595792274} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1595792274, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1595792274, ~z$w_buff1~0=~z$w_buff1~0_In1595792274, ~z~0=~z~0_In1595792274, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1595792274|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1595792274|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 12:26:51,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-350773605 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-350773605 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite40_Out-350773605|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-350773605 |P2Thread1of1ForFork2_#t~ite40_Out-350773605|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-350773605, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-350773605} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-350773605, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-350773605, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out-350773605|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 12:26:51,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-822274645 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-822274645 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-822274645 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-822274645 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite41_Out-822274645| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite41_Out-822274645| ~z$w_buff1_used~0_In-822274645)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-822274645, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-822274645, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-822274645, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-822274645} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out-822274645|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-822274645, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-822274645, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-822274645, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-822274645} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 12:26:51,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L800-->L800-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1962617621 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-1962617621 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite42_Out-1962617621| ~z$r_buff0_thd3~0_In-1962617621) (or .cse0 .cse1)) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite42_Out-1962617621| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1962617621, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1962617621} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-1962617621|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1962617621, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1962617621} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 12:26:51,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L801-->L801-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-1035207646 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-1035207646 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1035207646 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-1035207646 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-1035207646 |P2Thread1of1ForFork2_#t~ite43_Out-1035207646|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork2_#t~ite43_Out-1035207646| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1035207646, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1035207646, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1035207646, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1035207646} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1035207646, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1035207646, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-1035207646|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1035207646, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1035207646} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 12:26:51,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L801-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_136 |v_P2Thread1of1ForFork2_#t~ite43_28|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_136, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_27|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 12:26:51,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L824-1-->L830: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:26:51,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L830-2-->L830-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite48_Out382452705| |ULTIMATE.start_main_#t~ite47_Out382452705|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In382452705 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In382452705 256) 0))) (or (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out382452705| ~z$w_buff1~0_In382452705)) (and (= |ULTIMATE.start_main_#t~ite47_Out382452705| ~z~0_In382452705) .cse2 (or .cse1 .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In382452705, ~z$w_buff1_used~0=~z$w_buff1_used~0_In382452705, ~z$w_buff1~0=~z$w_buff1~0_In382452705, ~z~0=~z~0_In382452705} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In382452705, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out382452705|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In382452705, ~z$w_buff1~0=~z$w_buff1~0_In382452705, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out382452705|, ~z~0=~z~0_In382452705} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:26:51,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L831-->L831-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In2069769253 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In2069769253 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out2069769253|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In2069769253 |ULTIMATE.start_main_#t~ite49_Out2069769253|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2069769253, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2069769253} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2069769253, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2069769253, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out2069769253|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:26:51,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L832-->L832-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In1923552928 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In1923552928 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1923552928 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1923552928 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In1923552928 |ULTIMATE.start_main_#t~ite50_Out1923552928|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1923552928|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1923552928, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1923552928, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1923552928, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1923552928} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1923552928|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1923552928, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1923552928, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1923552928, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1923552928} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:26:51,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1893275829 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1893275829 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-1893275829| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd0~0_In-1893275829 |ULTIMATE.start_main_#t~ite51_Out-1893275829|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1893275829, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1893275829} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1893275829, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1893275829|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1893275829} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:26:51,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L834-->L834-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In1521195300 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd0~0_In1521195300 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1521195300 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In1521195300 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1521195300|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$r_buff1_thd0~0_In1521195300 |ULTIMATE.start_main_#t~ite52_Out1521195300|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1521195300, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1521195300, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1521195300, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1521195300} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1521195300|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1521195300, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1521195300, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1521195300, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1521195300} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:26:51,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L834-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_21 256)) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p2_EAX~0_28) (= 0 v_~__unbuffered_p1_EAX~0_23) (= v_~x~0_47 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_21) (= |v_ULTIMATE.start_main_#t~ite52_50| v_~z$r_buff1_thd0~0_94) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_50|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~x~0=v_~x~0_47} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_49|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_94, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~x~0=v_~x~0_47, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:26:51,341 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:26:51 BasicIcfg [2019-12-07 12:26:51,341 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 12:26:51,341 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:26:51,341 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:26:51,341 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:26:51,342 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:24:51" (3/4) ... [2019-12-07 12:26:51,344 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 12:26:51,344 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [894] [894] ULTIMATE.startENTRY-->L820: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t1385~0.base_26| 1)) (= v_~z$w_buff0_used~0_958 0) (= v_~x~0_72 0) (= v_~z$r_buff0_thd2~0_111 0) (= |v_#NULL.offset_6| 0) (= 0 v_~__unbuffered_p1_EAX~0_40) (= v_~z$r_buff1_thd0~0_129 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1385~0.base_26| 4)) (= v_~z$w_buff1_used~0_531 0) (= v_~y~0_19 0) (= |v_ULTIMATE.start_main_~#t1385~0.offset_19| 0) (= v_~z$r_buff0_thd1~0_132 0) (= v_~z$r_buff1_thd1~0_108 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~main$tmp_guard1~0_39 0) (= v_~z$w_buff0~0_487 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$r_buff1_thd2~0_104 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1385~0.base_26| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1385~0.base_26|) |v_ULTIMATE.start_main_~#t1385~0.offset_19| 0)) |v_#memory_int_21|) (= 0 v_~__unbuffered_p2_EAX~0_53) (= (select .cse0 |v_ULTIMATE.start_main_~#t1385~0.base_26|) 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t1385~0.base_26|) (= v_~z$w_buff1~0_307 0) (= 0 v_~z$r_buff1_thd3~0_237) (= 0 |v_#NULL.base_6|) (= 0 v_~z$flush_delayed~0_24) (= v_~z$r_buff0_thd0~0_141 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= v_~z$mem_tmp~0_13 0) (= v_~z~0_174 0) (= 0 v_~__unbuffered_cnt~0_91) (= 0 v_~z$r_buff0_thd3~0_332) (= v_~main$tmp_guard0~0_26 0) (= v_~weak$$choice2~0_107 0) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_104, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_31|, ULTIMATE.start_main_~#t1387~0.offset=|v_ULTIMATE.start_main_~#t1387~0.offset_12|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_287|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_85|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_141, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_40, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_53, ULTIMATE.start_main_~#t1387~0.base=|v_ULTIMATE.start_main_~#t1387~0.base_16|, ~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_531, ~z$flush_delayed~0=v_~z$flush_delayed~0_24, ULTIMATE.start_main_~#t1385~0.offset=|v_ULTIMATE.start_main_~#t1385~0.offset_19|, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_108, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_332, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91, ~x~0=v_~x~0_72, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_307, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_39, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_35|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t1386~0.base=|v_ULTIMATE.start_main_~#t1386~0.base_23|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_35|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_129, ~y~0=v_~y~0_19, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_111, ULTIMATE.start_main_~#t1386~0.offset=|v_ULTIMATE.start_main_~#t1386~0.offset_19|, ULTIMATE.start_main_~#t1385~0.base=|v_ULTIMATE.start_main_~#t1385~0.base_26|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_958, ~z$w_buff0~0=v_~z$w_buff0~0_487, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_237, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_24|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_174, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_132} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1387~0.offset, ~z$read_delayed~0, #NULL.offset, ~z$w_buff1~0, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1386~0.base, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~__unbuffered_p1_EAX~0, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1387~0.base, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1386~0.offset, ~z$mem_tmp~0, ULTIMATE.start_main_~#t1385~0.base, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1385~0.offset, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#res, ~z$r_buff1_thd1~0, #valid, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 12:26:51,345 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L820-1-->L822: Formula: (and (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1386~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1386~0.base_9|) |v_ULTIMATE.start_main_~#t1386~0.offset_8| 1))) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t1386~0.base_9| 1)) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t1386~0.base_9|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t1386~0.base_9|)) (= |v_ULTIMATE.start_main_~#t1386~0.offset_8| 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1386~0.base_9| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1386~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_3|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1386~0.base=|v_ULTIMATE.start_main_~#t1386~0.base_9|, ULTIMATE.start_main_~#t1386~0.offset=|v_ULTIMATE.start_main_~#t1386~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1386~0.base, ULTIMATE.start_main_~#t1386~0.offset] because there is no mapped edge [2019-12-07 12:26:51,345 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] P0ENTRY-->L4-3: Formula: (and (= 1 ~z$w_buff0_used~0_Out766162216) (= P0Thread1of1ForFork0_~arg.base_Out766162216 |P0Thread1of1ForFork0_#in~arg.base_In766162216|) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out766162216| (ite (not (and (not (= (mod ~z$w_buff0_used~0_Out766162216 256) 0)) (not (= 0 (mod ~z$w_buff1_used~0_Out766162216 256))))) 1 0)) (= ~z$w_buff1~0_Out766162216 ~z$w_buff0~0_In766162216) (= |P0Thread1of1ForFork0_#in~arg.offset_In766162216| P0Thread1of1ForFork0_~arg.offset_Out766162216) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out766162216| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out766162216) (= ~z$w_buff1_used~0_Out766162216 ~z$w_buff0_used~0_In766162216) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out766162216)) (= ~z$w_buff0~0_Out766162216 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In766162216|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In766162216, ~z$w_buff0~0=~z$w_buff0~0_In766162216, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In766162216|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In766162216|, ~z$w_buff0_used~0=~z$w_buff0_used~0_Out766162216, ~z$w_buff0~0=~z$w_buff0~0_Out766162216, ~z$w_buff1_used~0=~z$w_buff1_used~0_Out766162216, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out766162216, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In766162216|, ~z$w_buff1~0=~z$w_buff1~0_Out766162216, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out766162216, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out766162216|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out766162216} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 12:26:51,346 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L822-1-->L824: Formula: (and (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1387~0.base_11|)) (= (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1387~0.base_11| 1) |v_#valid_40|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1387~0.base_11|) (= |v_ULTIMATE.start_main_~#t1387~0.offset_9| 0) (not (= |v_ULTIMATE.start_main_~#t1387~0.base_11| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1387~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1387~0.base_11|) |v_ULTIMATE.start_main_~#t1387~0.offset_9| 2)) |v_#memory_int_15|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1387~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1387~0.offset=|v_ULTIMATE.start_main_~#t1387~0.offset_9|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1387~0.base=|v_ULTIMATE.start_main_~#t1387~0.base_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1387~0.offset, #length, ULTIMATE.start_main_~#t1387~0.base] because there is no mapped edge [2019-12-07 12:26:51,347 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L764-2-->L764-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In1743393712 256) 0)) (.cse2 (= |P1Thread1of1ForFork1_#t~ite9_Out1743393712| |P1Thread1of1ForFork1_#t~ite10_Out1743393712|)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1743393712 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite9_Out1743393712| ~z~0_In1743393712) (or .cse0 .cse1) .cse2) (and (not .cse1) (= |P1Thread1of1ForFork1_#t~ite9_Out1743393712| ~z$w_buff1~0_In1743393712) .cse2 (not .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1743393712, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1743393712, ~z$w_buff1~0=~z$w_buff1~0_In1743393712, ~z~0=~z~0_In1743393712} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out1743393712|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1743393712, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1743393712, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out1743393712|, ~z$w_buff1~0=~z$w_buff1~0_In1743393712, ~z~0=~z~0_In1743393712} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 12:26:51,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In722674262 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In722674262 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out722674262|)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In722674262 |P1Thread1of1ForFork1_#t~ite11_Out722674262|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In722674262, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In722674262} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In722674262, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out722674262|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In722674262} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 12:26:51,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd2~0_In-126370207 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-126370207 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-126370207 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-126370207 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-126370207 |P1Thread1of1ForFork1_#t~ite12_Out-126370207|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-126370207|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-126370207, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-126370207, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-126370207, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-126370207} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-126370207, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-126370207, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-126370207, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-126370207|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-126370207} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 12:26:51,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In-1252370871 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1252370871 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite13_Out-1252370871| 0)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out-1252370871| ~z$r_buff0_thd2~0_In-1252370871) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1252370871, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1252370871} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1252370871, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1252370871|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1252370871} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 12:26:51,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L787-->L787-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-189147909 256)))) (or (and .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-189147909 256)))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In-189147909 256) 0)) (= (mod ~z$w_buff0_used~0_In-189147909 256) 0) (and (= (mod ~z$w_buff1_used~0_In-189147909 256) 0) .cse1))) (= ~z$w_buff1~0_In-189147909 |P2Thread1of1ForFork2_#t~ite23_Out-189147909|) (= |P2Thread1of1ForFork2_#t~ite23_Out-189147909| |P2Thread1of1ForFork2_#t~ite24_Out-189147909|)) (and (= ~z$w_buff1~0_In-189147909 |P2Thread1of1ForFork2_#t~ite24_Out-189147909|) (= |P2Thread1of1ForFork2_#t~ite23_In-189147909| |P2Thread1of1ForFork2_#t~ite23_Out-189147909|) (not .cse0)))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In-189147909|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-189147909, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-189147909, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-189147909, ~z$w_buff1~0=~z$w_buff1~0_In-189147909, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-189147909, ~weak$$choice2~0=~weak$$choice2~0_In-189147909} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out-189147909|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out-189147909|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-189147909, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-189147909, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-189147909, ~z$w_buff1~0=~z$w_buff1~0_In-189147909, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-189147909, ~weak$$choice2~0=~weak$$choice2~0_In-189147909} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 12:26:51,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L788-->L788-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-318201130 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite27_Out-318201130| ~z$w_buff0_used~0_In-318201130) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite26_In-318201130| |P2Thread1of1ForFork2_#t~ite26_Out-318201130|)) (and .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-318201130 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In-318201130 256)) (and (= 0 (mod ~z$r_buff1_thd3~0_In-318201130 256)) .cse1) (and (= 0 (mod ~z$w_buff1_used~0_In-318201130 256)) .cse1))) (= |P2Thread1of1ForFork2_#t~ite26_Out-318201130| ~z$w_buff0_used~0_In-318201130) (= |P2Thread1of1ForFork2_#t~ite26_Out-318201130| |P2Thread1of1ForFork2_#t~ite27_Out-318201130|)))) InVars {P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In-318201130|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-318201130, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-318201130, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-318201130, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-318201130, ~weak$$choice2~0=~weak$$choice2~0_In-318201130} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out-318201130|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-318201130, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-318201130, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-318201130, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-318201130, ~weak$$choice2~0=~weak$$choice2~0_In-318201130, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out-318201130|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 12:26:51,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd2~0_In-115938450 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-115938450 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-115938450 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-115938450 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-115938450|)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~z$r_buff1_thd2~0_In-115938450 |P1Thread1of1ForFork1_#t~ite14_Out-115938450|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-115938450, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-115938450, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-115938450, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-115938450} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-115938450, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-115938450, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-115938450, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-115938450|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-115938450} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 12:26:51,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L768-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_26| v_~z$r_buff1_thd2~0_55) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_26|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_55, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_25|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:26:51,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L789-->L789-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1774978086 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite29_In-1774978086| |P2Thread1of1ForFork2_#t~ite29_Out-1774978086|) (= ~z$w_buff1_used~0_In-1774978086 |P2Thread1of1ForFork2_#t~ite30_Out-1774978086|) (not .cse0)) (and .cse0 (= ~z$w_buff1_used~0_In-1774978086 |P2Thread1of1ForFork2_#t~ite29_Out-1774978086|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1774978086 256)))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-1774978086 256))) (= (mod ~z$w_buff0_used~0_In-1774978086 256) 0) (and .cse1 (= (mod ~z$w_buff1_used~0_In-1774978086 256) 0)))) (= |P2Thread1of1ForFork2_#t~ite29_Out-1774978086| |P2Thread1of1ForFork2_#t~ite30_Out-1774978086|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1774978086, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1774978086, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1774978086, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1774978086, ~weak$$choice2~0=~weak$$choice2~0_In-1774978086, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_In-1774978086|} OutVars{P2Thread1of1ForFork2_#t~ite30=|P2Thread1of1ForFork2_#t~ite30_Out-1774978086|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1774978086, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1774978086, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1774978086, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1774978086, ~weak$$choice2~0=~weak$$choice2~0_In-1774978086, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_Out-1774978086|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite30, P2Thread1of1ForFork2_#t~ite29] because there is no mapped edge [2019-12-07 12:26:51,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L790-->L791: Formula: (and (= v_~z$r_buff0_thd3~0_68 v_~z$r_buff0_thd3~0_67) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_68, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 12:26:51,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L793-->L797: Formula: (and (= 0 v_~z$flush_delayed~0_6) (= v_~z~0_25 v_~z$mem_tmp~0_5) (not (= 0 (mod v_~z$flush_delayed~0_7 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_5, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_6, ~z~0=v_~z~0_25} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 12:26:51,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L745-->L745-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In-1223581189 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1223581189 256)))) (or (and (= ~z$w_buff0_used~0_In-1223581189 |P0Thread1of1ForFork0_#t~ite5_Out-1223581189|) (or .cse0 .cse1)) (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1223581189|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1223581189, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1223581189} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1223581189|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1223581189, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1223581189} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 12:26:51,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L746-->L746-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd1~0_In-1084307539 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1084307539 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-1084307539 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1084307539 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite6_Out-1084307539| ~z$w_buff1_used~0_In-1084307539)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P0Thread1of1ForFork0_#t~ite6_Out-1084307539| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1084307539, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1084307539, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1084307539, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1084307539} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1084307539|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1084307539, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1084307539, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1084307539, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1084307539} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 12:26:51,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L747-->L748: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In1236895210 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In1236895210 256) 0)) (.cse0 (= ~z$r_buff0_thd1~0_Out1236895210 ~z$r_buff0_thd1~0_In1236895210))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse1) (= ~z$r_buff0_thd1~0_Out1236895210 0)) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1236895210, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1236895210} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1236895210, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1236895210|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1236895210} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:26:51,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L748-->L748-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In-624740303 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-624740303 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-624740303 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-624740303 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd1~0_In-624740303 |P0Thread1of1ForFork0_#t~ite8_Out-624740303|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out-624740303|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-624740303, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-624740303, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-624740303, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-624740303} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-624740303, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-624740303|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-624740303, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-624740303, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-624740303} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 12:26:51,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L748-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_68 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= v_~__unbuffered_cnt~0_73 (+ v_~__unbuffered_cnt~0_74 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_68, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_73} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 12:26:51,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L797-2-->L797-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork2_#t~ite38_Out1595792274| |P2Thread1of1ForFork2_#t~ite39_Out1595792274|)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1595792274 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1595792274 256) 0))) (or (and (not .cse0) (not .cse1) .cse2 (= |P2Thread1of1ForFork2_#t~ite38_Out1595792274| ~z$w_buff1~0_In1595792274)) (and .cse2 (= |P2Thread1of1ForFork2_#t~ite38_Out1595792274| ~z~0_In1595792274) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1595792274, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1595792274, ~z$w_buff1~0=~z$w_buff1~0_In1595792274, ~z~0=~z~0_In1595792274} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1595792274, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1595792274, ~z$w_buff1~0=~z$w_buff1~0_In1595792274, ~z~0=~z~0_In1595792274, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1595792274|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1595792274|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 12:26:51,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-350773605 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-350773605 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite40_Out-350773605|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-350773605 |P2Thread1of1ForFork2_#t~ite40_Out-350773605|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-350773605, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-350773605} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-350773605, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-350773605, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out-350773605|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 12:26:51,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-822274645 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-822274645 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-822274645 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-822274645 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite41_Out-822274645| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite41_Out-822274645| ~z$w_buff1_used~0_In-822274645)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-822274645, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-822274645, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-822274645, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-822274645} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out-822274645|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-822274645, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-822274645, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-822274645, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-822274645} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 12:26:51,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L800-->L800-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1962617621 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-1962617621 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite42_Out-1962617621| ~z$r_buff0_thd3~0_In-1962617621) (or .cse0 .cse1)) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite42_Out-1962617621| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1962617621, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1962617621} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-1962617621|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1962617621, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1962617621} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 12:26:51,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L801-->L801-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-1035207646 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-1035207646 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1035207646 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-1035207646 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-1035207646 |P2Thread1of1ForFork2_#t~ite43_Out-1035207646|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork2_#t~ite43_Out-1035207646| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1035207646, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1035207646, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1035207646, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1035207646} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1035207646, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1035207646, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-1035207646|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1035207646, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1035207646} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 12:26:51,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L801-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_136 |v_P2Thread1of1ForFork2_#t~ite43_28|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_136, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_27|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 12:26:51,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L824-1-->L830: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:26:51,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L830-2-->L830-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite48_Out382452705| |ULTIMATE.start_main_#t~ite47_Out382452705|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In382452705 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In382452705 256) 0))) (or (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out382452705| ~z$w_buff1~0_In382452705)) (and (= |ULTIMATE.start_main_#t~ite47_Out382452705| ~z~0_In382452705) .cse2 (or .cse1 .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In382452705, ~z$w_buff1_used~0=~z$w_buff1_used~0_In382452705, ~z$w_buff1~0=~z$w_buff1~0_In382452705, ~z~0=~z~0_In382452705} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In382452705, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out382452705|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In382452705, ~z$w_buff1~0=~z$w_buff1~0_In382452705, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out382452705|, ~z~0=~z~0_In382452705} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:26:51,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L831-->L831-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In2069769253 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In2069769253 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out2069769253|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In2069769253 |ULTIMATE.start_main_#t~ite49_Out2069769253|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2069769253, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2069769253} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2069769253, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2069769253, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out2069769253|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:26:51,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L832-->L832-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In1923552928 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In1923552928 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1923552928 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1923552928 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In1923552928 |ULTIMATE.start_main_#t~ite50_Out1923552928|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1923552928|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1923552928, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1923552928, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1923552928, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1923552928} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1923552928|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1923552928, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1923552928, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1923552928, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1923552928} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:26:51,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1893275829 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1893275829 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-1893275829| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd0~0_In-1893275829 |ULTIMATE.start_main_#t~ite51_Out-1893275829|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1893275829, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1893275829} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1893275829, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1893275829|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1893275829} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:26:51,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L834-->L834-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In1521195300 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd0~0_In1521195300 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1521195300 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In1521195300 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1521195300|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$r_buff1_thd0~0_In1521195300 |ULTIMATE.start_main_#t~ite52_Out1521195300|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1521195300, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1521195300, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1521195300, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1521195300} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1521195300|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1521195300, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1521195300, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1521195300, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1521195300} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:26:51,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L834-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_21 256)) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p2_EAX~0_28) (= 0 v_~__unbuffered_p1_EAX~0_23) (= v_~x~0_47 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_21) (= |v_ULTIMATE.start_main_#t~ite52_50| v_~z$r_buff1_thd0~0_94) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_50|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~x~0=v_~x~0_47} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_49|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_94, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~x~0=v_~x~0_47, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:26:51,419 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_43b58152-6f7f-4f62-a606-53c3380be12e/bin/uautomizer/witness.graphml [2019-12-07 12:26:51,419 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:26:51,420 INFO L168 Benchmark]: Toolchain (without parser) took 120565.28 ms. Allocated memory was 1.0 GB in the beginning and 7.3 GB in the end (delta: 6.3 GB). Free memory was 934.0 MB in the beginning and 2.8 GB in the end (delta: -1.8 GB). Peak memory consumption was 4.5 GB. Max. memory is 11.5 GB. [2019-12-07 12:26:51,421 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:26:51,421 INFO L168 Benchmark]: CACSL2BoogieTranslator took 381.69 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.4 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -167.8 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 12:26:51,421 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.19 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. [2019-12-07 12:26:51,421 INFO L168 Benchmark]: Boogie Preprocessor took 28.23 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:26:51,422 INFO L168 Benchmark]: RCFGBuilder took 403.01 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 58.8 MB). Peak memory consumption was 58.8 MB. Max. memory is 11.5 GB. [2019-12-07 12:26:51,422 INFO L168 Benchmark]: TraceAbstraction took 119630.90 ms. Allocated memory was 1.2 GB in the beginning and 7.3 GB in the end (delta: 6.1 GB). Free memory was 1.0 GB in the beginning and 2.8 GB in the end (delta: -1.8 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. [2019-12-07 12:26:51,423 INFO L168 Benchmark]: Witness Printer took 77.94 ms. Allocated memory is still 7.3 GB. Free memory was 2.8 GB in the beginning and 2.8 GB in the end (delta: 39.4 MB). Peak memory consumption was 39.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:26:51,424 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 381.69 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.4 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -167.8 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.19 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 28.23 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 403.01 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 58.8 MB). Peak memory consumption was 58.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 119630.90 ms. Allocated memory was 1.2 GB in the beginning and 7.3 GB in the end (delta: 6.1 GB). Free memory was 1.0 GB in the beginning and 2.8 GB in the end (delta: -1.8 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. * Witness Printer took 77.94 ms. Allocated memory is still 7.3 GB. Free memory was 2.8 GB in the beginning and 2.8 GB in the end (delta: 39.4 MB). Peak memory consumption was 39.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.6s, 175 ProgramPointsBefore, 92 ProgramPointsAfterwards, 212 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 32 TrivialSequentialCompositions, 54 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 31 ChoiceCompositions, 7186 VarBasedMoverChecksPositive, 380 VarBasedMoverChecksNegative, 188 SemBasedMoverChecksPositive, 286 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 125946 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L820] FCALL, FORK 0 pthread_create(&t1385, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L734] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L735] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L736] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L737] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L738] 1 z$r_buff0_thd1 = (_Bool)1 [L741] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L744] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L822] FCALL, FORK 0 pthread_create(&t1386, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t1387, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L758] 2 x = 2 [L761] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L778] 3 y = 1 [L781] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L782] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L783] 3 z$flush_delayed = weak$$choice2 [L784] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L765] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L786] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L786] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L787] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L767] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L788] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L789] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L791] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L792] 3 __unbuffered_p2_EAX = z VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L744] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L745] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L746] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L797] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L798] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L799] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L800] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L830] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L830] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L831] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L832] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L833] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 166 locations, 2 error locations. Result: UNSAFE, OverallTime: 119.4s, OverallIterations: 29, TraceHistogramMax: 1, AutomataDifference: 32.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6226 SDtfs, 8805 SDslu, 22438 SDs, 0 SdLazy, 15518 SolverSat, 536 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 12.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 357 GetRequests, 44 SyntacticMatches, 19 SemanticMatches, 294 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1710 ImplicationChecksByTransitivity, 4.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=269248occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 65.9s AutomataMinimizationTime, 28 MinimizatonAttempts, 315007 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 1314 NumberOfCodeBlocks, 1314 NumberOfCodeBlocksAsserted, 29 NumberOfCheckSat, 1219 ConstructedInterpolants, 0 QuantifiedInterpolants, 473684 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 28 InterpolantComputations, 28 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...