./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix052_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_54e0dff0-5c0e-46ac-8acd-4bba926c112b/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_54e0dff0-5c0e-46ac-8acd-4bba926c112b/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_54e0dff0-5c0e-46ac-8acd-4bba926c112b/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_54e0dff0-5c0e-46ac-8acd-4bba926c112b/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix052_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_54e0dff0-5c0e-46ac-8acd-4bba926c112b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_54e0dff0-5c0e-46ac-8acd-4bba926c112b/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 46e30173bf6c1d22ab744196752f4b6ce1d95132 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:24:45,046 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:24:45,047 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:24:45,055 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:24:45,055 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:24:45,056 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:24:45,056 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:24:45,058 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:24:45,059 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:24:45,060 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:24:45,060 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:24:45,061 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:24:45,061 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:24:45,062 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:24:45,062 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:24:45,063 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:24:45,064 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:24:45,064 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:24:45,066 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:24:45,067 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:24:45,068 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:24:45,069 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:24:45,070 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:24:45,070 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:24:45,072 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:24:45,072 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:24:45,072 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:24:45,072 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:24:45,073 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:24:45,073 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:24:45,073 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:24:45,074 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:24:45,074 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:24:45,075 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:24:45,075 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:24:45,075 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:24:45,076 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:24:45,076 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:24:45,076 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:24:45,077 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:24:45,077 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:24:45,077 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_54e0dff0-5c0e-46ac-8acd-4bba926c112b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 13:24:45,086 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:24:45,086 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:24:45,087 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 13:24:45,087 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 13:24:45,087 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 13:24:45,088 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:24:45,088 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:24:45,088 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:24:45,088 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:24:45,088 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:24:45,088 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:24:45,088 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:24:45,088 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:24:45,088 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:24:45,088 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:24:45,089 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:24:45,089 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:24:45,089 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:24:45,089 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 13:24:45,089 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:24:45,089 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:24:45,089 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:24:45,089 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:24:45,089 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:24:45,089 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:24:45,090 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 13:24:45,090 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:24:45,090 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:24:45,090 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:24:45,090 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_54e0dff0-5c0e-46ac-8acd-4bba926c112b/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 46e30173bf6c1d22ab744196752f4b6ce1d95132 [2019-12-07 13:24:45,188 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:24:45,196 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:24:45,199 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:24:45,200 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:24:45,200 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:24:45,201 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_54e0dff0-5c0e-46ac-8acd-4bba926c112b/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix052_power.opt.i [2019-12-07 13:24:45,248 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_54e0dff0-5c0e-46ac-8acd-4bba926c112b/bin/uautomizer/data/57c15a440/00bbf89e015345bcbc182f67d7de3e07/FLAG3f014d0c9 [2019-12-07 13:24:45,610 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:24:45,610 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_54e0dff0-5c0e-46ac-8acd-4bba926c112b/sv-benchmarks/c/pthread-wmm/mix052_power.opt.i [2019-12-07 13:24:45,620 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_54e0dff0-5c0e-46ac-8acd-4bba926c112b/bin/uautomizer/data/57c15a440/00bbf89e015345bcbc182f67d7de3e07/FLAG3f014d0c9 [2019-12-07 13:24:45,629 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_54e0dff0-5c0e-46ac-8acd-4bba926c112b/bin/uautomizer/data/57c15a440/00bbf89e015345bcbc182f67d7de3e07 [2019-12-07 13:24:45,630 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:24:45,631 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:24:45,632 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:24:45,632 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:24:45,634 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:24:45,635 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:24:45" (1/1) ... [2019-12-07 13:24:45,636 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:24:45, skipping insertion in model container [2019-12-07 13:24:45,637 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:24:45" (1/1) ... [2019-12-07 13:24:45,641 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:24:45,670 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:24:45,962 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:24:45,971 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:24:46,015 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:24:46,067 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:24:46,067 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:24:46 WrapperNode [2019-12-07 13:24:46,068 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:24:46,068 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:24:46,068 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:24:46,068 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:24:46,074 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:24:46" (1/1) ... [2019-12-07 13:24:46,087 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:24:46" (1/1) ... [2019-12-07 13:24:46,106 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:24:46,107 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:24:46,107 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:24:46,107 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:24:46,113 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:24:46" (1/1) ... [2019-12-07 13:24:46,113 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:24:46" (1/1) ... [2019-12-07 13:24:46,116 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:24:46" (1/1) ... [2019-12-07 13:24:46,117 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:24:46" (1/1) ... [2019-12-07 13:24:46,127 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:24:46" (1/1) ... [2019-12-07 13:24:46,130 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:24:46" (1/1) ... [2019-12-07 13:24:46,133 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:24:46" (1/1) ... [2019-12-07 13:24:46,136 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:24:46,137 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:24:46,137 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:24:46,137 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:24:46,138 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:24:46" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_54e0dff0-5c0e-46ac-8acd-4bba926c112b/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:24:46,178 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 13:24:46,178 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 13:24:46,178 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 13:24:46,178 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 13:24:46,179 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 13:24:46,179 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 13:24:46,179 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 13:24:46,179 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 13:24:46,179 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 13:24:46,179 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 13:24:46,179 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 13:24:46,179 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:24:46,179 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:24:46,180 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 13:24:46,550 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:24:46,550 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 13:24:46,551 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:24:46 BoogieIcfgContainer [2019-12-07 13:24:46,551 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:24:46,552 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:24:46,552 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:24:46,553 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:24:46,554 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:24:45" (1/3) ... [2019-12-07 13:24:46,554 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c953329 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:24:46, skipping insertion in model container [2019-12-07 13:24:46,554 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:24:46" (2/3) ... [2019-12-07 13:24:46,554 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c953329 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:24:46, skipping insertion in model container [2019-12-07 13:24:46,555 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:24:46" (3/3) ... [2019-12-07 13:24:46,556 INFO L109 eAbstractionObserver]: Analyzing ICFG mix052_power.opt.i [2019-12-07 13:24:46,562 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 13:24:46,562 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:24:46,567 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:24:46,567 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 13:24:46,592 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,592 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,593 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,593 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,593 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,593 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,593 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,593 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,593 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,594 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,594 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,594 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,594 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,594 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,594 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,594 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,594 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,595 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,595 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,595 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,595 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,595 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,595 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,595 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,595 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,595 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,597 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,597 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,597 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,597 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,597 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,597 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,597 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,597 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,601 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,601 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,601 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,601 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,601 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,601 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,601 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,601 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,601 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,602 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,602 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,602 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,602 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,602 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,602 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,602 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,602 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,602 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:24:46,623 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 13:24:46,636 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:24:46,636 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:24:46,636 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:24:46,636 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:24:46,636 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:24:46,636 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:24:46,636 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:24:46,636 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:24:46,647 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 175 places, 212 transitions [2019-12-07 13:24:46,648 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 13:24:46,704 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 13:24:46,704 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:24:46,715 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 702 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:24:46,730 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 13:24:46,763 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 13:24:46,763 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:24:46,768 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 702 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:24:46,783 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 13:24:46,784 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 13:24:49,924 WARN L192 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 13:24:50,199 INFO L206 etLargeBlockEncoding]: Checked pairs total: 125946 [2019-12-07 13:24:50,199 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 13:24:50,202 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 102 transitions [2019-12-07 13:25:04,562 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 111572 states. [2019-12-07 13:25:04,563 INFO L276 IsEmpty]: Start isEmpty. Operand 111572 states. [2019-12-07 13:25:04,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 13:25:04,567 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:25:04,567 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 13:25:04,567 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:25:04,571 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:25:04,571 INFO L82 PathProgramCache]: Analyzing trace with hash 912834, now seen corresponding path program 1 times [2019-12-07 13:25:04,576 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:25:04,577 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414134780] [2019-12-07 13:25:04,577 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:25:04,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:25:04,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:25:04,703 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1414134780] [2019-12-07 13:25:04,703 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:25:04,704 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:25:04,704 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1135499336] [2019-12-07 13:25:04,707 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:25:04,707 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:25:04,716 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:25:04,716 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:25:04,718 INFO L87 Difference]: Start difference. First operand 111572 states. Second operand 3 states. [2019-12-07 13:25:05,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:25:05,459 INFO L93 Difference]: Finished difference Result 110910 states and 474711 transitions. [2019-12-07 13:25:05,459 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:25:05,460 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 13:25:05,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:25:06,072 INFO L225 Difference]: With dead ends: 110910 [2019-12-07 13:25:06,072 INFO L226 Difference]: Without dead ends: 98066 [2019-12-07 13:25:06,073 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:25:09,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98066 states. [2019-12-07 13:25:10,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98066 to 98066. [2019-12-07 13:25:10,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98066 states. [2019-12-07 13:25:11,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98066 states to 98066 states and 418629 transitions. [2019-12-07 13:25:11,004 INFO L78 Accepts]: Start accepts. Automaton has 98066 states and 418629 transitions. Word has length 3 [2019-12-07 13:25:11,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:25:11,004 INFO L462 AbstractCegarLoop]: Abstraction has 98066 states and 418629 transitions. [2019-12-07 13:25:11,004 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:25:11,004 INFO L276 IsEmpty]: Start isEmpty. Operand 98066 states and 418629 transitions. [2019-12-07 13:25:11,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 13:25:11,009 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:25:11,009 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:25:11,009 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:25:11,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:25:11,010 INFO L82 PathProgramCache]: Analyzing trace with hash 1027484309, now seen corresponding path program 1 times [2019-12-07 13:25:11,010 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:25:11,010 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509377494] [2019-12-07 13:25:11,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:25:11,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:25:11,077 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:25:11,078 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [509377494] [2019-12-07 13:25:11,078 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:25:11,078 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:25:11,078 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1983737005] [2019-12-07 13:25:11,079 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:25:11,079 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:25:11,079 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:25:11,079 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:25:11,079 INFO L87 Difference]: Start difference. First operand 98066 states and 418629 transitions. Second operand 4 states. [2019-12-07 13:25:13,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:25:13,800 INFO L93 Difference]: Finished difference Result 156656 states and 639635 transitions. [2019-12-07 13:25:13,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:25:13,800 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 13:25:13,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:25:14,230 INFO L225 Difference]: With dead ends: 156656 [2019-12-07 13:25:14,230 INFO L226 Difference]: Without dead ends: 156558 [2019-12-07 13:25:14,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:25:18,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156558 states. [2019-12-07 13:25:19,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156558 to 142946. [2019-12-07 13:25:19,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142946 states. [2019-12-07 13:25:20,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142946 states to 142946 states and 591329 transitions. [2019-12-07 13:25:20,358 INFO L78 Accepts]: Start accepts. Automaton has 142946 states and 591329 transitions. Word has length 11 [2019-12-07 13:25:20,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:25:20,358 INFO L462 AbstractCegarLoop]: Abstraction has 142946 states and 591329 transitions. [2019-12-07 13:25:20,358 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:25:20,358 INFO L276 IsEmpty]: Start isEmpty. Operand 142946 states and 591329 transitions. [2019-12-07 13:25:20,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 13:25:20,365 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:25:20,365 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:25:20,365 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:25:20,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:25:20,365 INFO L82 PathProgramCache]: Analyzing trace with hash 1461043352, now seen corresponding path program 1 times [2019-12-07 13:25:20,365 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:25:20,366 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [283077756] [2019-12-07 13:25:20,366 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:25:20,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:25:20,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:25:20,425 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [283077756] [2019-12-07 13:25:20,425 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:25:20,425 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:25:20,425 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625663578] [2019-12-07 13:25:20,426 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:25:20,426 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:25:20,426 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:25:20,426 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:25:20,426 INFO L87 Difference]: Start difference. First operand 142946 states and 591329 transitions. Second operand 4 states. [2019-12-07 13:25:21,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:25:21,902 INFO L93 Difference]: Finished difference Result 205190 states and 828176 transitions. [2019-12-07 13:25:21,903 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:25:21,903 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 13:25:21,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:25:22,415 INFO L225 Difference]: With dead ends: 205190 [2019-12-07 13:25:22,416 INFO L226 Difference]: Without dead ends: 205078 [2019-12-07 13:25:22,416 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:25:28,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205078 states. [2019-12-07 13:25:31,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205078 to 171310. [2019-12-07 13:25:31,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171310 states. [2019-12-07 13:25:31,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171310 states to 171310 states and 704416 transitions. [2019-12-07 13:25:31,559 INFO L78 Accepts]: Start accepts. Automaton has 171310 states and 704416 transitions. Word has length 13 [2019-12-07 13:25:31,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:25:31,560 INFO L462 AbstractCegarLoop]: Abstraction has 171310 states and 704416 transitions. [2019-12-07 13:25:31,560 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:25:31,560 INFO L276 IsEmpty]: Start isEmpty. Operand 171310 states and 704416 transitions. [2019-12-07 13:25:31,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:25:31,566 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:25:31,567 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:25:31,567 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:25:31,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:25:31,567 INFO L82 PathProgramCache]: Analyzing trace with hash -876468662, now seen corresponding path program 1 times [2019-12-07 13:25:31,567 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:25:31,567 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1466489146] [2019-12-07 13:25:31,567 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:25:31,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:25:31,617 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:25:31,617 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1466489146] [2019-12-07 13:25:31,617 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:25:31,617 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:25:31,617 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1409550377] [2019-12-07 13:25:31,618 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:25:31,618 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:25:31,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:25:31,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:25:31,618 INFO L87 Difference]: Start difference. First operand 171310 states and 704416 transitions. Second operand 5 states. [2019-12-07 13:25:32,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:25:32,912 INFO L93 Difference]: Finished difference Result 231848 states and 943034 transitions. [2019-12-07 13:25:32,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:25:32,913 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 13:25:32,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:25:34,055 INFO L225 Difference]: With dead ends: 231848 [2019-12-07 13:25:34,055 INFO L226 Difference]: Without dead ends: 231848 [2019-12-07 13:25:34,056 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:25:38,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231848 states. [2019-12-07 13:25:43,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231848 to 191437. [2019-12-07 13:25:43,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191437 states. [2019-12-07 13:25:44,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191437 states to 191437 states and 785356 transitions. [2019-12-07 13:25:44,630 INFO L78 Accepts]: Start accepts. Automaton has 191437 states and 785356 transitions. Word has length 16 [2019-12-07 13:25:44,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:25:44,630 INFO L462 AbstractCegarLoop]: Abstraction has 191437 states and 785356 transitions. [2019-12-07 13:25:44,631 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:25:44,631 INFO L276 IsEmpty]: Start isEmpty. Operand 191437 states and 785356 transitions. [2019-12-07 13:25:44,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 13:25:44,644 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:25:44,644 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:25:44,644 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:25:44,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:25:44,644 INFO L82 PathProgramCache]: Analyzing trace with hash -1118041263, now seen corresponding path program 1 times [2019-12-07 13:25:44,644 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:25:44,645 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532201034] [2019-12-07 13:25:44,645 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:25:44,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:25:44,698 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:25:44,698 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1532201034] [2019-12-07 13:25:44,698 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:25:44,698 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:25:44,698 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1452677344] [2019-12-07 13:25:44,698 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:25:44,699 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:25:44,699 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:25:44,699 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:25:44,699 INFO L87 Difference]: Start difference. First operand 191437 states and 785356 transitions. Second operand 3 states. [2019-12-07 13:25:45,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:25:45,548 INFO L93 Difference]: Finished difference Result 191437 states and 777824 transitions. [2019-12-07 13:25:45,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:25:45,549 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 13:25:45,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:25:46,015 INFO L225 Difference]: With dead ends: 191437 [2019-12-07 13:25:46,016 INFO L226 Difference]: Without dead ends: 191437 [2019-12-07 13:25:46,016 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:25:50,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191437 states. [2019-12-07 13:25:55,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191437 to 188487. [2019-12-07 13:25:55,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188487 states. [2019-12-07 13:25:56,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188487 states to 188487 states and 766908 transitions. [2019-12-07 13:25:56,179 INFO L78 Accepts]: Start accepts. Automaton has 188487 states and 766908 transitions. Word has length 18 [2019-12-07 13:25:56,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:25:56,179 INFO L462 AbstractCegarLoop]: Abstraction has 188487 states and 766908 transitions. [2019-12-07 13:25:56,179 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:25:56,179 INFO L276 IsEmpty]: Start isEmpty. Operand 188487 states and 766908 transitions. [2019-12-07 13:25:56,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 13:25:56,189 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:25:56,189 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:25:56,189 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:25:56,189 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:25:56,189 INFO L82 PathProgramCache]: Analyzing trace with hash -2016155527, now seen corresponding path program 1 times [2019-12-07 13:25:56,189 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:25:56,189 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [182545411] [2019-12-07 13:25:56,189 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:25:56,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:25:56,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:25:56,233 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [182545411] [2019-12-07 13:25:56,234 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:25:56,234 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:25:56,234 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [770254153] [2019-12-07 13:25:56,234 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:25:56,234 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:25:56,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:25:56,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:25:56,235 INFO L87 Difference]: Start difference. First operand 188487 states and 766908 transitions. Second operand 3 states. [2019-12-07 13:25:57,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:25:57,897 INFO L93 Difference]: Finished difference Result 315159 states and 1273687 transitions. [2019-12-07 13:25:57,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:25:57,898 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 13:25:57,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:25:58,582 INFO L225 Difference]: With dead ends: 315159 [2019-12-07 13:25:58,582 INFO L226 Difference]: Without dead ends: 282066 [2019-12-07 13:25:58,583 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:26:03,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282066 states. [2019-12-07 13:26:07,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282066 to 269248. [2019-12-07 13:26:07,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 269248 states. [2019-12-07 13:26:08,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269248 states to 269248 states and 1096514 transitions. [2019-12-07 13:26:08,906 INFO L78 Accepts]: Start accepts. Automaton has 269248 states and 1096514 transitions. Word has length 18 [2019-12-07 13:26:08,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:08,906 INFO L462 AbstractCegarLoop]: Abstraction has 269248 states and 1096514 transitions. [2019-12-07 13:26:08,906 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:26:08,906 INFO L276 IsEmpty]: Start isEmpty. Operand 269248 states and 1096514 transitions. [2019-12-07 13:26:08,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:26:08,923 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:08,923 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:08,924 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:08,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:08,924 INFO L82 PathProgramCache]: Analyzing trace with hash 1757364841, now seen corresponding path program 1 times [2019-12-07 13:26:08,924 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:08,924 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184387961] [2019-12-07 13:26:08,924 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:08,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:08,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:08,960 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1184387961] [2019-12-07 13:26:08,961 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:08,961 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:26:08,961 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [795558020] [2019-12-07 13:26:08,961 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:26:08,961 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:08,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:26:08,962 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:26:08,962 INFO L87 Difference]: Start difference. First operand 269248 states and 1096514 transitions. Second operand 3 states. [2019-12-07 13:26:09,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:09,105 INFO L93 Difference]: Finished difference Result 48228 states and 156282 transitions. [2019-12-07 13:26:09,106 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:26:09,106 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 13:26:09,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:09,172 INFO L225 Difference]: With dead ends: 48228 [2019-12-07 13:26:09,172 INFO L226 Difference]: Without dead ends: 48228 [2019-12-07 13:26:09,172 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:26:09,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48228 states. [2019-12-07 13:26:09,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48228 to 48228. [2019-12-07 13:26:09,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48228 states. [2019-12-07 13:26:09,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48228 states to 48228 states and 156282 transitions. [2019-12-07 13:26:09,896 INFO L78 Accepts]: Start accepts. Automaton has 48228 states and 156282 transitions. Word has length 19 [2019-12-07 13:26:09,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:09,896 INFO L462 AbstractCegarLoop]: Abstraction has 48228 states and 156282 transitions. [2019-12-07 13:26:09,896 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:26:09,896 INFO L276 IsEmpty]: Start isEmpty. Operand 48228 states and 156282 transitions. [2019-12-07 13:26:09,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 13:26:09,903 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:09,904 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:09,904 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:09,904 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:09,904 INFO L82 PathProgramCache]: Analyzing trace with hash -1783143627, now seen corresponding path program 1 times [2019-12-07 13:26:09,904 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:09,904 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [337739508] [2019-12-07 13:26:09,904 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:09,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:09,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:09,956 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [337739508] [2019-12-07 13:26:09,956 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:09,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:26:09,957 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [540189599] [2019-12-07 13:26:09,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:26:09,957 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:09,957 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:26:09,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:26:09,957 INFO L87 Difference]: Start difference. First operand 48228 states and 156282 transitions. Second operand 6 states. [2019-12-07 13:26:10,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:10,546 INFO L93 Difference]: Finished difference Result 70457 states and 222266 transitions. [2019-12-07 13:26:10,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:26:10,546 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 13:26:10,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:10,646 INFO L225 Difference]: With dead ends: 70457 [2019-12-07 13:26:10,646 INFO L226 Difference]: Without dead ends: 70443 [2019-12-07 13:26:10,646 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:26:10,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70443 states. [2019-12-07 13:26:11,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70443 to 50158. [2019-12-07 13:26:11,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50158 states. [2019-12-07 13:26:11,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50158 states to 50158 states and 161575 transitions. [2019-12-07 13:26:11,960 INFO L78 Accepts]: Start accepts. Automaton has 50158 states and 161575 transitions. Word has length 22 [2019-12-07 13:26:11,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:11,960 INFO L462 AbstractCegarLoop]: Abstraction has 50158 states and 161575 transitions. [2019-12-07 13:26:11,960 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:26:11,960 INFO L276 IsEmpty]: Start isEmpty. Operand 50158 states and 161575 transitions. [2019-12-07 13:26:11,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 13:26:11,974 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:11,974 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:11,974 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:11,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:11,974 INFO L82 PathProgramCache]: Analyzing trace with hash 1148876988, now seen corresponding path program 1 times [2019-12-07 13:26:11,974 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:11,975 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1074492000] [2019-12-07 13:26:11,975 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:11,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:12,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:12,011 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1074492000] [2019-12-07 13:26:12,011 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:12,011 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:26:12,011 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [305625722] [2019-12-07 13:26:12,012 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:26:12,012 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:12,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:26:12,012 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:26:12,012 INFO L87 Difference]: Start difference. First operand 50158 states and 161575 transitions. Second operand 5 states. [2019-12-07 13:26:12,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:12,445 INFO L93 Difference]: Finished difference Result 64850 states and 204706 transitions. [2019-12-07 13:26:12,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:26:12,445 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 13:26:12,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:12,538 INFO L225 Difference]: With dead ends: 64850 [2019-12-07 13:26:12,538 INFO L226 Difference]: Without dead ends: 64824 [2019-12-07 13:26:12,538 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:26:12,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64824 states. [2019-12-07 13:26:13,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64824 to 57106. [2019-12-07 13:26:13,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57106 states. [2019-12-07 13:26:13,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57106 states to 57106 states and 182757 transitions. [2019-12-07 13:26:13,508 INFO L78 Accepts]: Start accepts. Automaton has 57106 states and 182757 transitions. Word has length 25 [2019-12-07 13:26:13,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:13,508 INFO L462 AbstractCegarLoop]: Abstraction has 57106 states and 182757 transitions. [2019-12-07 13:26:13,508 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:26:13,508 INFO L276 IsEmpty]: Start isEmpty. Operand 57106 states and 182757 transitions. [2019-12-07 13:26:13,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 13:26:13,527 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:13,527 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:13,527 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:13,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:13,527 INFO L82 PathProgramCache]: Analyzing trace with hash -1026533913, now seen corresponding path program 1 times [2019-12-07 13:26:13,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:13,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [675850259] [2019-12-07 13:26:13,528 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:13,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:13,570 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:13,570 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [675850259] [2019-12-07 13:26:13,571 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:13,571 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:26:13,571 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [330818080] [2019-12-07 13:26:13,571 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:26:13,571 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:13,571 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:26:13,572 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:26:13,572 INFO L87 Difference]: Start difference. First operand 57106 states and 182757 transitions. Second operand 6 states. [2019-12-07 13:26:15,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:15,019 INFO L93 Difference]: Finished difference Result 78306 states and 244062 transitions. [2019-12-07 13:26:15,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 13:26:15,019 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 13:26:15,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:15,131 INFO L225 Difference]: With dead ends: 78306 [2019-12-07 13:26:15,132 INFO L226 Difference]: Without dead ends: 78230 [2019-12-07 13:26:15,132 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:26:15,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78230 states. [2019-12-07 13:26:16,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78230 to 61534. [2019-12-07 13:26:16,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61534 states. [2019-12-07 13:26:16,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61534 states to 61534 states and 195704 transitions. [2019-12-07 13:26:16,224 INFO L78 Accepts]: Start accepts. Automaton has 61534 states and 195704 transitions. Word has length 27 [2019-12-07 13:26:16,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:16,225 INFO L462 AbstractCegarLoop]: Abstraction has 61534 states and 195704 transitions. [2019-12-07 13:26:16,225 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:26:16,225 INFO L276 IsEmpty]: Start isEmpty. Operand 61534 states and 195704 transitions. [2019-12-07 13:26:16,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 13:26:16,250 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:16,250 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:16,251 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:16,251 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:16,251 INFO L82 PathProgramCache]: Analyzing trace with hash 874122726, now seen corresponding path program 1 times [2019-12-07 13:26:16,251 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:16,251 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [807881419] [2019-12-07 13:26:16,251 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:16,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:16,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:16,292 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [807881419] [2019-12-07 13:26:16,292 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:16,292 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:26:16,292 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [42213191] [2019-12-07 13:26:16,292 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:26:16,292 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:16,293 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:26:16,293 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:26:16,293 INFO L87 Difference]: Start difference. First operand 61534 states and 195704 transitions. Second operand 4 states. [2019-12-07 13:26:16,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:16,364 INFO L93 Difference]: Finished difference Result 23873 states and 72799 transitions. [2019-12-07 13:26:16,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:26:16,365 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 13:26:16,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:16,391 INFO L225 Difference]: With dead ends: 23873 [2019-12-07 13:26:16,391 INFO L226 Difference]: Without dead ends: 23873 [2019-12-07 13:26:16,391 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:26:16,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23873 states. [2019-12-07 13:26:16,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23873 to 22743. [2019-12-07 13:26:16,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22743 states. [2019-12-07 13:26:16,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22743 states to 22743 states and 69534 transitions. [2019-12-07 13:26:16,698 INFO L78 Accepts]: Start accepts. Automaton has 22743 states and 69534 transitions. Word has length 30 [2019-12-07 13:26:16,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:16,699 INFO L462 AbstractCegarLoop]: Abstraction has 22743 states and 69534 transitions. [2019-12-07 13:26:16,699 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:26:16,699 INFO L276 IsEmpty]: Start isEmpty. Operand 22743 states and 69534 transitions. [2019-12-07 13:26:16,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 13:26:16,716 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:16,716 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:16,716 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:16,716 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:16,716 INFO L82 PathProgramCache]: Analyzing trace with hash 1079552274, now seen corresponding path program 1 times [2019-12-07 13:26:16,717 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:16,717 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1633596683] [2019-12-07 13:26:16,717 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:16,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:16,766 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:16,766 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1633596683] [2019-12-07 13:26:16,766 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:16,766 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:26:16,766 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [785081623] [2019-12-07 13:26:16,766 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:26:16,767 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:16,767 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:26:16,767 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:26:16,767 INFO L87 Difference]: Start difference. First operand 22743 states and 69534 transitions. Second operand 7 states. [2019-12-07 13:26:17,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:17,512 INFO L93 Difference]: Finished difference Result 30013 states and 88944 transitions. [2019-12-07 13:26:17,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:26:17,512 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 13:26:17,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:17,543 INFO L225 Difference]: With dead ends: 30013 [2019-12-07 13:26:17,544 INFO L226 Difference]: Without dead ends: 30013 [2019-12-07 13:26:17,544 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 13:26:17,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30013 states. [2019-12-07 13:26:17,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30013 to 22398. [2019-12-07 13:26:17,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22398 states. [2019-12-07 13:26:17,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22398 states to 22398 states and 68308 transitions. [2019-12-07 13:26:17,895 INFO L78 Accepts]: Start accepts. Automaton has 22398 states and 68308 transitions. Word has length 33 [2019-12-07 13:26:17,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:17,895 INFO L462 AbstractCegarLoop]: Abstraction has 22398 states and 68308 transitions. [2019-12-07 13:26:17,896 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:26:17,896 INFO L276 IsEmpty]: Start isEmpty. Operand 22398 states and 68308 transitions. [2019-12-07 13:26:17,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 13:26:17,915 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:17,915 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:17,915 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:17,915 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:17,916 INFO L82 PathProgramCache]: Analyzing trace with hash 604372690, now seen corresponding path program 1 times [2019-12-07 13:26:17,916 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:17,916 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2049869254] [2019-12-07 13:26:17,916 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:17,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:17,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:17,960 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2049869254] [2019-12-07 13:26:17,960 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:17,960 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:26:17,961 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1631449306] [2019-12-07 13:26:17,961 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:26:17,961 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:17,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:26:17,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:26:17,961 INFO L87 Difference]: Start difference. First operand 22398 states and 68308 transitions. Second operand 5 states. [2019-12-07 13:26:18,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:18,360 INFO L93 Difference]: Finished difference Result 32220 states and 97454 transitions. [2019-12-07 13:26:18,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:26:18,360 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 13:26:18,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:18,395 INFO L225 Difference]: With dead ends: 32220 [2019-12-07 13:26:18,395 INFO L226 Difference]: Without dead ends: 32220 [2019-12-07 13:26:18,396 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:26:18,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32220 states. [2019-12-07 13:26:18,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32220 to 28805. [2019-12-07 13:26:18,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28805 states. [2019-12-07 13:26:18,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28805 states to 28805 states and 87857 transitions. [2019-12-07 13:26:18,848 INFO L78 Accepts]: Start accepts. Automaton has 28805 states and 87857 transitions. Word has length 40 [2019-12-07 13:26:18,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:18,848 INFO L462 AbstractCegarLoop]: Abstraction has 28805 states and 87857 transitions. [2019-12-07 13:26:18,848 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:26:18,848 INFO L276 IsEmpty]: Start isEmpty. Operand 28805 states and 87857 transitions. [2019-12-07 13:26:18,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 13:26:18,878 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:18,878 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:18,878 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:18,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:18,879 INFO L82 PathProgramCache]: Analyzing trace with hash 182198820, now seen corresponding path program 2 times [2019-12-07 13:26:18,879 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:18,879 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1265216868] [2019-12-07 13:26:18,879 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:18,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:18,916 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:18,916 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1265216868] [2019-12-07 13:26:18,916 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:18,916 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:26:18,917 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [826349660] [2019-12-07 13:26:18,917 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:26:18,917 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:18,917 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:26:18,917 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:26:18,917 INFO L87 Difference]: Start difference. First operand 28805 states and 87857 transitions. Second operand 3 states. [2019-12-07 13:26:18,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:18,993 INFO L93 Difference]: Finished difference Result 28805 states and 86803 transitions. [2019-12-07 13:26:18,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:26:18,993 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 13:26:18,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:19,030 INFO L225 Difference]: With dead ends: 28805 [2019-12-07 13:26:19,030 INFO L226 Difference]: Without dead ends: 28805 [2019-12-07 13:26:19,031 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:26:19,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28805 states. [2019-12-07 13:26:19,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28805 to 28155. [2019-12-07 13:26:19,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28155 states. [2019-12-07 13:26:19,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28155 states to 28155 states and 84977 transitions. [2019-12-07 13:26:19,424 INFO L78 Accepts]: Start accepts. Automaton has 28155 states and 84977 transitions. Word has length 40 [2019-12-07 13:26:19,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:19,425 INFO L462 AbstractCegarLoop]: Abstraction has 28155 states and 84977 transitions. [2019-12-07 13:26:19,425 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:26:19,425 INFO L276 IsEmpty]: Start isEmpty. Operand 28155 states and 84977 transitions. [2019-12-07 13:26:19,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 13:26:19,461 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:19,461 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:19,461 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:19,461 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:19,461 INFO L82 PathProgramCache]: Analyzing trace with hash -1437156552, now seen corresponding path program 1 times [2019-12-07 13:26:19,461 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:19,462 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2061072103] [2019-12-07 13:26:19,462 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:19,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:19,500 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:19,501 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2061072103] [2019-12-07 13:26:19,501 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:19,501 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:26:19,501 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [940370359] [2019-12-07 13:26:19,501 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:26:19,501 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:19,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:26:19,502 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:26:19,502 INFO L87 Difference]: Start difference. First operand 28155 states and 84977 transitions. Second operand 5 states. [2019-12-07 13:26:19,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:19,583 INFO L93 Difference]: Finished difference Result 26257 states and 80760 transitions. [2019-12-07 13:26:19,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:26:19,584 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 13:26:19,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:19,617 INFO L225 Difference]: With dead ends: 26257 [2019-12-07 13:26:19,617 INFO L226 Difference]: Without dead ends: 25750 [2019-12-07 13:26:19,617 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:26:19,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25750 states. [2019-12-07 13:26:19,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25750 to 16412. [2019-12-07 13:26:19,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16412 states. [2019-12-07 13:26:19,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16412 states to 16412 states and 50202 transitions. [2019-12-07 13:26:19,965 INFO L78 Accepts]: Start accepts. Automaton has 16412 states and 50202 transitions. Word has length 41 [2019-12-07 13:26:19,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:19,965 INFO L462 AbstractCegarLoop]: Abstraction has 16412 states and 50202 transitions. [2019-12-07 13:26:19,965 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:26:19,965 INFO L276 IsEmpty]: Start isEmpty. Operand 16412 states and 50202 transitions. [2019-12-07 13:26:19,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:26:19,979 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:19,980 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:19,980 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:19,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:19,980 INFO L82 PathProgramCache]: Analyzing trace with hash 1448287585, now seen corresponding path program 1 times [2019-12-07 13:26:19,980 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:19,980 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1290667005] [2019-12-07 13:26:19,980 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:19,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:20,007 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:20,007 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1290667005] [2019-12-07 13:26:20,008 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:20,008 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:26:20,008 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1349099669] [2019-12-07 13:26:20,008 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:26:20,008 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:20,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:26:20,009 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:26:20,009 INFO L87 Difference]: Start difference. First operand 16412 states and 50202 transitions. Second operand 3 states. [2019-12-07 13:26:20,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:20,081 INFO L93 Difference]: Finished difference Result 23169 states and 71269 transitions. [2019-12-07 13:26:20,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:26:20,081 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 13:26:20,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:20,106 INFO L225 Difference]: With dead ends: 23169 [2019-12-07 13:26:20,106 INFO L226 Difference]: Without dead ends: 23169 [2019-12-07 13:26:20,106 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:26:20,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23169 states. [2019-12-07 13:26:20,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23169 to 18739. [2019-12-07 13:26:20,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18739 states. [2019-12-07 13:26:20,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18739 states to 18739 states and 58118 transitions. [2019-12-07 13:26:20,394 INFO L78 Accepts]: Start accepts. Automaton has 18739 states and 58118 transitions. Word has length 66 [2019-12-07 13:26:20,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:20,395 INFO L462 AbstractCegarLoop]: Abstraction has 18739 states and 58118 transitions. [2019-12-07 13:26:20,395 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:26:20,395 INFO L276 IsEmpty]: Start isEmpty. Operand 18739 states and 58118 transitions. [2019-12-07 13:26:20,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:26:20,411 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:20,411 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:20,412 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:20,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:20,412 INFO L82 PathProgramCache]: Analyzing trace with hash 464347479, now seen corresponding path program 1 times [2019-12-07 13:26:20,412 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:20,412 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [493051782] [2019-12-07 13:26:20,412 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:20,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:20,485 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:20,485 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [493051782] [2019-12-07 13:26:20,485 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:20,486 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:26:20,486 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [718497257] [2019-12-07 13:26:20,486 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:26:20,486 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:20,486 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:26:20,486 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:26:20,487 INFO L87 Difference]: Start difference. First operand 18739 states and 58118 transitions. Second operand 7 states. [2019-12-07 13:26:21,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:21,191 INFO L93 Difference]: Finished difference Result 27801 states and 84418 transitions. [2019-12-07 13:26:21,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 13:26:21,192 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 13:26:21,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:21,223 INFO L225 Difference]: With dead ends: 27801 [2019-12-07 13:26:21,223 INFO L226 Difference]: Without dead ends: 27801 [2019-12-07 13:26:21,224 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:26:21,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27801 states. [2019-12-07 13:26:21,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27801 to 19117. [2019-12-07 13:26:21,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19117 states. [2019-12-07 13:26:21,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19117 states to 19117 states and 59321 transitions. [2019-12-07 13:26:21,549 INFO L78 Accepts]: Start accepts. Automaton has 19117 states and 59321 transitions. Word has length 66 [2019-12-07 13:26:21,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:21,549 INFO L462 AbstractCegarLoop]: Abstraction has 19117 states and 59321 transitions. [2019-12-07 13:26:21,549 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:26:21,549 INFO L276 IsEmpty]: Start isEmpty. Operand 19117 states and 59321 transitions. [2019-12-07 13:26:21,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:26:21,567 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:21,567 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:21,567 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:21,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:21,567 INFO L82 PathProgramCache]: Analyzing trace with hash 656468705, now seen corresponding path program 2 times [2019-12-07 13:26:21,567 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:21,567 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1322490371] [2019-12-07 13:26:21,568 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:21,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:21,654 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:21,654 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1322490371] [2019-12-07 13:26:21,654 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:21,654 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:26:21,654 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1030557350] [2019-12-07 13:26:21,655 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 13:26:21,655 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:21,655 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 13:26:21,655 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 13:26:21,655 INFO L87 Difference]: Start difference. First operand 19117 states and 59321 transitions. Second operand 8 states. [2019-12-07 13:26:23,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:23,049 INFO L93 Difference]: Finished difference Result 27412 states and 83168 transitions. [2019-12-07 13:26:23,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 13:26:23,049 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 13:26:23,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:23,085 INFO L225 Difference]: With dead ends: 27412 [2019-12-07 13:26:23,085 INFO L226 Difference]: Without dead ends: 27412 [2019-12-07 13:26:23,085 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 10 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=167, Invalid=703, Unknown=0, NotChecked=0, Total=870 [2019-12-07 13:26:23,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27412 states. [2019-12-07 13:26:23,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27412 to 18027. [2019-12-07 13:26:23,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18027 states. [2019-12-07 13:26:23,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18027 states to 18027 states and 56066 transitions. [2019-12-07 13:26:23,411 INFO L78 Accepts]: Start accepts. Automaton has 18027 states and 56066 transitions. Word has length 66 [2019-12-07 13:26:23,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:23,411 INFO L462 AbstractCegarLoop]: Abstraction has 18027 states and 56066 transitions. [2019-12-07 13:26:23,412 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 13:26:23,412 INFO L276 IsEmpty]: Start isEmpty. Operand 18027 states and 56066 transitions. [2019-12-07 13:26:23,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:26:23,428 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:23,428 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:23,428 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:23,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:23,428 INFO L82 PathProgramCache]: Analyzing trace with hash 1996455803, now seen corresponding path program 3 times [2019-12-07 13:26:23,428 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:23,428 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1952219154] [2019-12-07 13:26:23,429 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:23,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:23,517 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:23,517 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1952219154] [2019-12-07 13:26:23,517 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:23,517 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:26:23,517 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2018315369] [2019-12-07 13:26:23,517 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 13:26:23,517 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:23,518 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 13:26:23,518 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 13:26:23,518 INFO L87 Difference]: Start difference. First operand 18027 states and 56066 transitions. Second operand 8 states. [2019-12-07 13:26:24,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:24,044 INFO L93 Difference]: Finished difference Result 80442 states and 249485 transitions. [2019-12-07 13:26:24,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 13:26:24,044 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 13:26:24,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:24,119 INFO L225 Difference]: With dead ends: 80442 [2019-12-07 13:26:24,119 INFO L226 Difference]: Without dead ends: 57081 [2019-12-07 13:26:24,120 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=105, Invalid=357, Unknown=0, NotChecked=0, Total=462 [2019-12-07 13:26:24,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57081 states. [2019-12-07 13:26:24,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57081 to 21408. [2019-12-07 13:26:24,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21408 states. [2019-12-07 13:26:24,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21408 states to 21408 states and 66156 transitions. [2019-12-07 13:26:24,646 INFO L78 Accepts]: Start accepts. Automaton has 21408 states and 66156 transitions. Word has length 66 [2019-12-07 13:26:24,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:24,646 INFO L462 AbstractCegarLoop]: Abstraction has 21408 states and 66156 transitions. [2019-12-07 13:26:24,646 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 13:26:24,646 INFO L276 IsEmpty]: Start isEmpty. Operand 21408 states and 66156 transitions. [2019-12-07 13:26:24,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:26:24,665 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:24,665 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:24,665 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:24,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:24,665 INFO L82 PathProgramCache]: Analyzing trace with hash 834799749, now seen corresponding path program 4 times [2019-12-07 13:26:24,666 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:24,666 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1262537981] [2019-12-07 13:26:24,666 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:24,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:24,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:24,804 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1262537981] [2019-12-07 13:26:24,804 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:24,804 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 13:26:24,804 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [684291329] [2019-12-07 13:26:24,804 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:26:24,804 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:24,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:26:24,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:26:24,805 INFO L87 Difference]: Start difference. First operand 21408 states and 66156 transitions. Second operand 11 states. [2019-12-07 13:26:27,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:27,672 INFO L93 Difference]: Finished difference Result 113029 states and 340416 transitions. [2019-12-07 13:26:27,672 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 13:26:27,672 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 13:26:27,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:27,761 INFO L225 Difference]: With dead ends: 113029 [2019-12-07 13:26:27,761 INFO L226 Difference]: Without dead ends: 68895 [2019-12-07 13:26:27,762 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 360 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=385, Invalid=1175, Unknown=0, NotChecked=0, Total=1560 [2019-12-07 13:26:27,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68895 states. [2019-12-07 13:26:28,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68895 to 23488. [2019-12-07 13:26:28,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23488 states. [2019-12-07 13:26:28,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23488 states to 23488 states and 72438 transitions. [2019-12-07 13:26:28,390 INFO L78 Accepts]: Start accepts. Automaton has 23488 states and 72438 transitions. Word has length 66 [2019-12-07 13:26:28,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:28,390 INFO L462 AbstractCegarLoop]: Abstraction has 23488 states and 72438 transitions. [2019-12-07 13:26:28,390 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:26:28,390 INFO L276 IsEmpty]: Start isEmpty. Operand 23488 states and 72438 transitions. [2019-12-07 13:26:28,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:26:28,413 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:28,413 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:28,413 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:28,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:28,414 INFO L82 PathProgramCache]: Analyzing trace with hash 1036503919, now seen corresponding path program 5 times [2019-12-07 13:26:28,414 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:28,414 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1450149057] [2019-12-07 13:26:28,414 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:28,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:28,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:28,533 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1450149057] [2019-12-07 13:26:28,533 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:28,533 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:26:28,533 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [60864887] [2019-12-07 13:26:28,534 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:26:28,534 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:28,534 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:26:28,534 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:26:28,534 INFO L87 Difference]: Start difference. First operand 23488 states and 72438 transitions. Second operand 10 states. [2019-12-07 13:26:29,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:29,302 INFO L93 Difference]: Finished difference Result 35344 states and 108402 transitions. [2019-12-07 13:26:29,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 13:26:29,302 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 13:26:29,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:29,343 INFO L225 Difference]: With dead ends: 35344 [2019-12-07 13:26:29,343 INFO L226 Difference]: Without dead ends: 27935 [2019-12-07 13:26:29,344 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=74, Invalid=268, Unknown=0, NotChecked=0, Total=342 [2019-12-07 13:26:29,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27935 states. [2019-12-07 13:26:29,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27935 to 23829. [2019-12-07 13:26:29,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23829 states. [2019-12-07 13:26:29,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23829 states to 23829 states and 73290 transitions. [2019-12-07 13:26:29,693 INFO L78 Accepts]: Start accepts. Automaton has 23829 states and 73290 transitions. Word has length 66 [2019-12-07 13:26:29,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:29,693 INFO L462 AbstractCegarLoop]: Abstraction has 23829 states and 73290 transitions. [2019-12-07 13:26:29,693 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:26:29,693 INFO L276 IsEmpty]: Start isEmpty. Operand 23829 states and 73290 transitions. [2019-12-07 13:26:29,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:26:29,713 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:29,713 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:29,713 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:29,714 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:29,714 INFO L82 PathProgramCache]: Analyzing trace with hash -1435359243, now seen corresponding path program 6 times [2019-12-07 13:26:29,714 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:29,714 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1401003204] [2019-12-07 13:26:29,714 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:29,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:29,828 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:29,829 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1401003204] [2019-12-07 13:26:29,829 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:29,829 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:26:29,829 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1756293612] [2019-12-07 13:26:29,829 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:26:29,829 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:29,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:26:29,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:26:29,829 INFO L87 Difference]: Start difference. First operand 23829 states and 73290 transitions. Second operand 10 states. [2019-12-07 13:26:30,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:30,518 INFO L93 Difference]: Finished difference Result 35339 states and 107477 transitions. [2019-12-07 13:26:30,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 13:26:30,518 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 13:26:30,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:30,555 INFO L225 Difference]: With dead ends: 35339 [2019-12-07 13:26:30,555 INFO L226 Difference]: Without dead ends: 30126 [2019-12-07 13:26:30,555 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2019-12-07 13:26:30,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30126 states. [2019-12-07 13:26:30,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30126 to 24385. [2019-12-07 13:26:30,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24385 states. [2019-12-07 13:26:30,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24385 states to 24385 states and 74571 transitions. [2019-12-07 13:26:30,973 INFO L78 Accepts]: Start accepts. Automaton has 24385 states and 74571 transitions. Word has length 66 [2019-12-07 13:26:30,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:30,974 INFO L462 AbstractCegarLoop]: Abstraction has 24385 states and 74571 transitions. [2019-12-07 13:26:30,974 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:26:30,974 INFO L276 IsEmpty]: Start isEmpty. Operand 24385 states and 74571 transitions. [2019-12-07 13:26:30,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:26:30,993 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:30,993 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:30,993 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:30,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:30,994 INFO L82 PathProgramCache]: Analyzing trace with hash -2032204547, now seen corresponding path program 7 times [2019-12-07 13:26:30,994 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:30,994 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [945852328] [2019-12-07 13:26:30,994 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:31,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:31,125 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:31,126 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [945852328] [2019-12-07 13:26:31,126 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:31,126 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:26:31,126 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [742467913] [2019-12-07 13:26:31,126 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:26:31,127 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:31,127 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:26:31,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:26:31,127 INFO L87 Difference]: Start difference. First operand 24385 states and 74571 transitions. Second operand 11 states. [2019-12-07 13:26:33,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:33,382 INFO L93 Difference]: Finished difference Result 53499 states and 162177 transitions. [2019-12-07 13:26:33,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 13:26:33,383 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 13:26:33,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:33,448 INFO L225 Difference]: With dead ends: 53499 [2019-12-07 13:26:33,448 INFO L226 Difference]: Without dead ends: 45891 [2019-12-07 13:26:33,448 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 197 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=181, Invalid=811, Unknown=0, NotChecked=0, Total=992 [2019-12-07 13:26:33,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45891 states. [2019-12-07 13:26:33,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45891 to 24049. [2019-12-07 13:26:33,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24049 states. [2019-12-07 13:26:33,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24049 states to 24049 states and 73603 transitions. [2019-12-07 13:26:33,929 INFO L78 Accepts]: Start accepts. Automaton has 24049 states and 73603 transitions. Word has length 66 [2019-12-07 13:26:33,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:33,929 INFO L462 AbstractCegarLoop]: Abstraction has 24049 states and 73603 transitions. [2019-12-07 13:26:33,929 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:26:33,929 INFO L276 IsEmpty]: Start isEmpty. Operand 24049 states and 73603 transitions. [2019-12-07 13:26:33,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:26:33,953 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:33,953 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:33,953 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:33,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:33,953 INFO L82 PathProgramCache]: Analyzing trace with hash 216698061, now seen corresponding path program 8 times [2019-12-07 13:26:33,953 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:33,954 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [796638872] [2019-12-07 13:26:33,954 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:33,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:34,056 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:34,056 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [796638872] [2019-12-07 13:26:34,056 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:34,056 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:26:34,056 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1831785988] [2019-12-07 13:26:34,057 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:26:34,057 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:34,057 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:26:34,057 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:26:34,057 INFO L87 Difference]: Start difference. First operand 24049 states and 73603 transitions. Second operand 11 states. [2019-12-07 13:26:35,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:35,239 INFO L93 Difference]: Finished difference Result 49184 states and 150399 transitions. [2019-12-07 13:26:35,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 13:26:35,240 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 13:26:35,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:35,289 INFO L225 Difference]: With dead ends: 49184 [2019-12-07 13:26:35,289 INFO L226 Difference]: Without dead ends: 39088 [2019-12-07 13:26:35,289 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 235 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=203, Invalid=853, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 13:26:35,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39088 states. [2019-12-07 13:26:35,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39088 to 23159. [2019-12-07 13:26:35,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23159 states. [2019-12-07 13:26:35,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23159 states to 23159 states and 70854 transitions. [2019-12-07 13:26:35,779 INFO L78 Accepts]: Start accepts. Automaton has 23159 states and 70854 transitions. Word has length 66 [2019-12-07 13:26:35,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:35,779 INFO L462 AbstractCegarLoop]: Abstraction has 23159 states and 70854 transitions. [2019-12-07 13:26:35,779 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:26:35,779 INFO L276 IsEmpty]: Start isEmpty. Operand 23159 states and 70854 transitions. [2019-12-07 13:26:35,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:26:35,798 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:35,798 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:35,798 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:35,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:35,799 INFO L82 PathProgramCache]: Analyzing trace with hash -821584657, now seen corresponding path program 9 times [2019-12-07 13:26:35,799 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:35,799 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1548831335] [2019-12-07 13:26:35,799 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:35,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:35,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:35,855 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1548831335] [2019-12-07 13:26:35,855 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:35,855 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:26:35,856 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [182483328] [2019-12-07 13:26:35,856 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:26:35,856 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:35,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:26:35,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:26:35,856 INFO L87 Difference]: Start difference. First operand 23159 states and 70854 transitions. Second operand 4 states. [2019-12-07 13:26:35,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:35,969 INFO L93 Difference]: Finished difference Result 26792 states and 81659 transitions. [2019-12-07 13:26:35,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:26:35,970 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 13:26:35,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:36,001 INFO L225 Difference]: With dead ends: 26792 [2019-12-07 13:26:36,001 INFO L226 Difference]: Without dead ends: 26792 [2019-12-07 13:26:36,001 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:26:36,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26792 states. [2019-12-07 13:26:36,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26792 to 23129. [2019-12-07 13:26:36,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23129 states. [2019-12-07 13:26:36,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23129 states to 23129 states and 70874 transitions. [2019-12-07 13:26:36,367 INFO L78 Accepts]: Start accepts. Automaton has 23129 states and 70874 transitions. Word has length 66 [2019-12-07 13:26:36,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:36,368 INFO L462 AbstractCegarLoop]: Abstraction has 23129 states and 70874 transitions. [2019-12-07 13:26:36,368 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:26:36,368 INFO L276 IsEmpty]: Start isEmpty. Operand 23129 states and 70874 transitions. [2019-12-07 13:26:36,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:26:36,389 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:36,389 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:36,390 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:36,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:36,390 INFO L82 PathProgramCache]: Analyzing trace with hash -1156108883, now seen corresponding path program 1 times [2019-12-07 13:26:36,390 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:36,390 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1768935827] [2019-12-07 13:26:36,390 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:36,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:36,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:36,545 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1768935827] [2019-12-07 13:26:36,545 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:36,545 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 13:26:36,545 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1526488239] [2019-12-07 13:26:36,545 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 13:26:36,545 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:36,545 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 13:26:36,545 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:26:36,545 INFO L87 Difference]: Start difference. First operand 23129 states and 70874 transitions. Second operand 13 states. [2019-12-07 13:26:38,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:38,835 INFO L93 Difference]: Finished difference Result 41031 states and 124759 transitions. [2019-12-07 13:26:38,835 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 13:26:38,835 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 13:26:38,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:38,883 INFO L225 Difference]: With dead ends: 41031 [2019-12-07 13:26:38,883 INFO L226 Difference]: Without dead ends: 40254 [2019-12-07 13:26:38,884 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 372 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=288, Invalid=1352, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 13:26:38,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40254 states. [2019-12-07 13:26:39,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40254 to 22867. [2019-12-07 13:26:39,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22867 states. [2019-12-07 13:26:39,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22867 states to 22867 states and 70204 transitions. [2019-12-07 13:26:39,316 INFO L78 Accepts]: Start accepts. Automaton has 22867 states and 70204 transitions. Word has length 67 [2019-12-07 13:26:39,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:39,316 INFO L462 AbstractCegarLoop]: Abstraction has 22867 states and 70204 transitions. [2019-12-07 13:26:39,317 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 13:26:39,317 INFO L276 IsEmpty]: Start isEmpty. Operand 22867 states and 70204 transitions. [2019-12-07 13:26:39,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:26:39,339 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:39,339 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:39,339 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:39,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:39,339 INFO L82 PathProgramCache]: Analyzing trace with hash 750664618, now seen corresponding path program 1 times [2019-12-07 13:26:39,339 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:39,340 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1429738796] [2019-12-07 13:26:39,340 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:39,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:39,366 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:39,367 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1429738796] [2019-12-07 13:26:39,367 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:39,367 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:26:39,367 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [509416291] [2019-12-07 13:26:39,367 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:26:39,367 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:39,367 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:26:39,368 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:26:39,368 INFO L87 Difference]: Start difference. First operand 22867 states and 70204 transitions. Second operand 4 states. [2019-12-07 13:26:39,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:39,601 INFO L93 Difference]: Finished difference Result 33731 states and 104330 transitions. [2019-12-07 13:26:39,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:26:39,601 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 13:26:39,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:39,643 INFO L225 Difference]: With dead ends: 33731 [2019-12-07 13:26:39,644 INFO L226 Difference]: Without dead ends: 33731 [2019-12-07 13:26:39,644 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:26:39,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33731 states. [2019-12-07 13:26:40,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33731 to 24236. [2019-12-07 13:26:40,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24236 states. [2019-12-07 13:26:40,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24236 states to 24236 states and 75068 transitions. [2019-12-07 13:26:40,095 INFO L78 Accepts]: Start accepts. Automaton has 24236 states and 75068 transitions. Word has length 67 [2019-12-07 13:26:40,095 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:40,095 INFO L462 AbstractCegarLoop]: Abstraction has 24236 states and 75068 transitions. [2019-12-07 13:26:40,095 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:26:40,095 INFO L276 IsEmpty]: Start isEmpty. Operand 24236 states and 75068 transitions. [2019-12-07 13:26:40,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:26:40,116 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:40,116 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:40,116 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:40,116 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:40,116 INFO L82 PathProgramCache]: Analyzing trace with hash 1791716501, now seen corresponding path program 1 times [2019-12-07 13:26:40,117 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:40,117 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [364716607] [2019-12-07 13:26:40,117 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:40,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:40,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:40,308 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [364716607] [2019-12-07 13:26:40,308 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:40,309 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 13:26:40,309 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1159964980] [2019-12-07 13:26:40,309 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:26:40,309 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:40,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:26:40,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:26:40,309 INFO L87 Difference]: Start difference. First operand 24236 states and 75068 transitions. Second operand 11 states. [2019-12-07 13:26:41,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:41,935 INFO L93 Difference]: Finished difference Result 40725 states and 125430 transitions. [2019-12-07 13:26:41,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 13:26:41,935 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 13:26:41,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:41,985 INFO L225 Difference]: With dead ends: 40725 [2019-12-07 13:26:41,985 INFO L226 Difference]: Without dead ends: 40717 [2019-12-07 13:26:41,986 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=147, Invalid=405, Unknown=0, NotChecked=0, Total=552 [2019-12-07 13:26:42,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40717 states. [2019-12-07 13:26:42,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40717 to 25757. [2019-12-07 13:26:42,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25757 states. [2019-12-07 13:26:42,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25757 states to 25757 states and 79009 transitions. [2019-12-07 13:26:42,496 INFO L78 Accepts]: Start accepts. Automaton has 25757 states and 79009 transitions. Word has length 67 [2019-12-07 13:26:42,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:42,496 INFO L462 AbstractCegarLoop]: Abstraction has 25757 states and 79009 transitions. [2019-12-07 13:26:42,497 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:26:42,497 INFO L276 IsEmpty]: Start isEmpty. Operand 25757 states and 79009 transitions. [2019-12-07 13:26:42,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:26:42,524 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:42,524 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:42,524 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:42,524 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:42,525 INFO L82 PathProgramCache]: Analyzing trace with hash -3014007, now seen corresponding path program 1 times [2019-12-07 13:26:42,525 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:42,525 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1322370653] [2019-12-07 13:26:42,525 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:42,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:42,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:42,556 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1322370653] [2019-12-07 13:26:42,556 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:42,556 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:26:42,556 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [56759801] [2019-12-07 13:26:42,557 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:26:42,557 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:42,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:26:42,557 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:26:42,557 INFO L87 Difference]: Start difference. First operand 25757 states and 79009 transitions. Second operand 3 states. [2019-12-07 13:26:42,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:42,715 INFO L93 Difference]: Finished difference Result 34322 states and 104784 transitions. [2019-12-07 13:26:42,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:26:42,716 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 13:26:42,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:42,757 INFO L225 Difference]: With dead ends: 34322 [2019-12-07 13:26:42,757 INFO L226 Difference]: Without dead ends: 34322 [2019-12-07 13:26:42,757 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:26:42,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34322 states. [2019-12-07 13:26:43,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34322 to 24284. [2019-12-07 13:26:43,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24284 states. [2019-12-07 13:26:43,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24284 states to 24284 states and 74076 transitions. [2019-12-07 13:26:43,162 INFO L78 Accepts]: Start accepts. Automaton has 24284 states and 74076 transitions. Word has length 67 [2019-12-07 13:26:43,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:43,162 INFO L462 AbstractCegarLoop]: Abstraction has 24284 states and 74076 transitions. [2019-12-07 13:26:43,162 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:26:43,162 INFO L276 IsEmpty]: Start isEmpty. Operand 24284 states and 74076 transitions. [2019-12-07 13:26:43,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:26:43,186 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:43,186 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:43,186 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:43,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:43,186 INFO L82 PathProgramCache]: Analyzing trace with hash 1799686927, now seen corresponding path program 2 times [2019-12-07 13:26:43,186 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:43,186 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1441764650] [2019-12-07 13:26:43,187 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:43,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:43,272 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:43,272 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1441764650] [2019-12-07 13:26:43,272 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:43,272 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:26:43,272 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [563897997] [2019-12-07 13:26:43,272 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 13:26:43,273 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:43,273 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 13:26:43,273 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:26:43,273 INFO L87 Difference]: Start difference. First operand 24284 states and 74076 transitions. Second operand 9 states. [2019-12-07 13:26:44,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:44,322 INFO L93 Difference]: Finished difference Result 52335 states and 162225 transitions. [2019-12-07 13:26:44,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 13:26:44,322 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 13:26:44,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:44,388 INFO L225 Difference]: With dead ends: 52335 [2019-12-07 13:26:44,388 INFO L226 Difference]: Without dead ends: 52335 [2019-12-07 13:26:44,389 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 254 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=244, Invalid=748, Unknown=0, NotChecked=0, Total=992 [2019-12-07 13:26:44,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52335 states. [2019-12-07 13:26:44,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52335 to 26348. [2019-12-07 13:26:44,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26348 states. [2019-12-07 13:26:44,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26348 states to 26348 states and 80694 transitions. [2019-12-07 13:26:44,945 INFO L78 Accepts]: Start accepts. Automaton has 26348 states and 80694 transitions. Word has length 67 [2019-12-07 13:26:44,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:44,945 INFO L462 AbstractCegarLoop]: Abstraction has 26348 states and 80694 transitions. [2019-12-07 13:26:44,946 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 13:26:44,946 INFO L276 IsEmpty]: Start isEmpty. Operand 26348 states and 80694 transitions. [2019-12-07 13:26:44,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:26:44,973 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:44,973 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:44,973 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:44,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:44,974 INFO L82 PathProgramCache]: Analyzing trace with hash 1038037876, now seen corresponding path program 1 times [2019-12-07 13:26:44,974 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:44,974 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [451146514] [2019-12-07 13:26:44,974 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:44,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:26:45,037 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:26:45,037 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [451146514] [2019-12-07 13:26:45,037 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:26:45,037 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:26:45,038 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [250938321] [2019-12-07 13:26:45,038 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:26:45,038 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:26:45,038 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:26:45,038 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:26:45,038 INFO L87 Difference]: Start difference. First operand 26348 states and 80694 transitions. Second operand 5 states. [2019-12-07 13:26:45,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:26:45,154 INFO L93 Difference]: Finished difference Result 26348 states and 80454 transitions. [2019-12-07 13:26:45,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:26:45,155 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2019-12-07 13:26:45,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:26:45,191 INFO L225 Difference]: With dead ends: 26348 [2019-12-07 13:26:45,191 INFO L226 Difference]: Without dead ends: 26348 [2019-12-07 13:26:45,191 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:26:45,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26348 states. [2019-12-07 13:26:45,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26348 to 21252. [2019-12-07 13:26:45,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21252 states. [2019-12-07 13:26:45,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21252 states to 21252 states and 64171 transitions. [2019-12-07 13:26:45,520 INFO L78 Accepts]: Start accepts. Automaton has 21252 states and 64171 transitions. Word has length 67 [2019-12-07 13:26:45,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:26:45,521 INFO L462 AbstractCegarLoop]: Abstraction has 21252 states and 64171 transitions. [2019-12-07 13:26:45,521 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:26:45,521 INFO L276 IsEmpty]: Start isEmpty. Operand 21252 states and 64171 transitions. [2019-12-07 13:26:45,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:26:45,539 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:26:45,539 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:26:45,539 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:26:45,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:26:45,539 INFO L82 PathProgramCache]: Analyzing trace with hash -2101838907, now seen corresponding path program 2 times [2019-12-07 13:26:45,539 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:26:45,540 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [148763157] [2019-12-07 13:26:45,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:26:45,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:26:45,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:26:45,622 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 13:26:45,622 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:26:45,625 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [894] [894] ULTIMATE.startENTRY-->L820: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_958 0) (= v_~x~0_72 0) (= v_~z$r_buff0_thd2~0_111 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1388~0.base_26|) 0) (= |v_#NULL.offset_6| 0) (= 0 v_~__unbuffered_p1_EAX~0_40) (= v_~z$r_buff1_thd0~0_129 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t1388~0.base_26|) (= v_~z$w_buff1_used~0_531 0) (= v_~y~0_19 0) (= v_~z$r_buff0_thd1~0_132 0) (= v_~z$r_buff1_thd1~0_108 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~main$tmp_guard1~0_39 0) (= v_~z$w_buff0~0_487 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$r_buff1_thd2~0_104 0) (= 0 v_~__unbuffered_p2_EAX~0_53) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1388~0.base_26| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1388~0.base_26|) |v_ULTIMATE.start_main_~#t1388~0.offset_19| 0)) |v_#memory_int_21|) (= (store .cse0 |v_ULTIMATE.start_main_~#t1388~0.base_26| 1) |v_#valid_69|) (= v_~z$w_buff1~0_307 0) (= 0 v_~z$r_buff1_thd3~0_237) (= 0 |v_#NULL.base_6|) (= 0 v_~z$flush_delayed~0_24) (= v_~z$r_buff0_thd0~0_141 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= v_~z$mem_tmp~0_13 0) (= v_~z~0_174 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1388~0.base_26| 4)) (= 0 v_~__unbuffered_cnt~0_91) (= 0 v_~z$r_buff0_thd3~0_332) (= v_~main$tmp_guard0~0_26 0) (= v_~weak$$choice2~0_107 0) (= |v_ULTIMATE.start_main_~#t1388~0.offset_19| 0) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_104, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_31|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_287|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ULTIMATE.start_main_~#t1390~0.base=|v_ULTIMATE.start_main_~#t1390~0.base_16|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_85|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_141, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_40, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_53, ~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start_main_~#t1388~0.base=|v_ULTIMATE.start_main_~#t1388~0.base_26|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_531, ~z$flush_delayed~0=v_~z$flush_delayed~0_24, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_108, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_332, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91, ~x~0=v_~x~0_72, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_307, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_39, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_35|, ULTIMATE.start_main_~#t1389~0.base=|v_ULTIMATE.start_main_~#t1389~0.base_23|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_35|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_129, ~y~0=v_~y~0_19, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_111, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_958, ~z$w_buff0~0=v_~z$w_buff0~0_487, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_237, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ULTIMATE.start_main_~#t1389~0.offset=|v_ULTIMATE.start_main_~#t1389~0.offset_19|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_24|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_174, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_132, ULTIMATE.start_main_~#t1388~0.offset=|v_ULTIMATE.start_main_~#t1388~0.offset_19|, ULTIMATE.start_main_~#t1390~0.offset=|v_ULTIMATE.start_main_~#t1390~0.offset_12|} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, #NULL.offset, ~z$w_buff1~0, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t1389~0.base, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_~#t1390~0.base, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~__unbuffered_p1_EAX~0, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ~z$mem_tmp~0, ULTIMATE.start_main_~#t1388~0.base, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1389~0.offset, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#res, ~z$r_buff1_thd1~0, #valid, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0, ULTIMATE.start_main_~#t1388~0.offset, ULTIMATE.start_main_~#t1390~0.offset] because there is no mapped edge [2019-12-07 13:26:45,625 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L820-1-->L822: Formula: (and (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t1389~0.base_9|)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1389~0.base_9| 4)) (= |v_ULTIMATE.start_main_~#t1389~0.offset_8| 0) (not (= |v_ULTIMATE.start_main_~#t1389~0.base_9| 0)) (= (store |v_#valid_34| |v_ULTIMATE.start_main_~#t1389~0.base_9| 1) |v_#valid_33|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1389~0.base_9|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1389~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1389~0.base_9|) |v_ULTIMATE.start_main_~#t1389~0.offset_8| 1)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_3|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1389~0.base=|v_ULTIMATE.start_main_~#t1389~0.base_9|, ULTIMATE.start_main_~#t1389~0.offset=|v_ULTIMATE.start_main_~#t1389~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1389~0.base, ULTIMATE.start_main_~#t1389~0.offset] because there is no mapped edge [2019-12-07 13:26:45,626 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] P0ENTRY-->L4-3: Formula: (and (= P0Thread1of1ForFork0_~arg.offset_Out-593102411 |P0Thread1of1ForFork0_#in~arg.offset_In-593102411|) (= ~z$w_buff0~0_Out-593102411 1) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-593102411)) (= (ite (not (and (not (= 0 (mod ~z$w_buff1_used~0_Out-593102411 256))) (not (= (mod ~z$w_buff0_used~0_Out-593102411 256) 0)))) 1 0) |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-593102411|) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-593102411| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-593102411) (= ~z$w_buff0_used~0_In-593102411 ~z$w_buff1_used~0_Out-593102411) (= ~z$w_buff0_used~0_Out-593102411 1) (= ~z$w_buff1~0_Out-593102411 ~z$w_buff0~0_In-593102411) (= |P0Thread1of1ForFork0_#in~arg.base_In-593102411| P0Thread1of1ForFork0_~arg.base_Out-593102411)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-593102411|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-593102411, ~z$w_buff0~0=~z$w_buff0~0_In-593102411, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-593102411|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-593102411|, ~z$w_buff0_used~0=~z$w_buff0_used~0_Out-593102411, ~z$w_buff0~0=~z$w_buff0~0_Out-593102411, ~z$w_buff1_used~0=~z$w_buff1_used~0_Out-593102411, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-593102411, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-593102411|, ~z$w_buff1~0=~z$w_buff1~0_Out-593102411, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out-593102411, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-593102411|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out-593102411} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 13:26:45,626 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L822-1-->L824: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1390~0.base_11| 0)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1390~0.base_11| 1)) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1390~0.base_11|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1390~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1390~0.base_11|) |v_ULTIMATE.start_main_~#t1390~0.offset_9| 2)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1390~0.base_11|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1390~0.base_11| 4) |v_#length_17|) (= |v_ULTIMATE.start_main_~#t1390~0.offset_9| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1390~0.base=|v_ULTIMATE.start_main_~#t1390~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1390~0.offset=|v_ULTIMATE.start_main_~#t1390~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1390~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1390~0.offset] because there is no mapped edge [2019-12-07 13:26:45,628 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L764-2-->L764-5: Formula: (let ((.cse2 (= |P1Thread1of1ForFork1_#t~ite9_Out360029157| |P1Thread1of1ForFork1_#t~ite10_Out360029157|)) (.cse0 (= (mod ~z$w_buff1_used~0_In360029157 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd2~0_In360029157 256) 0))) (or (and (or .cse0 .cse1) (= ~z~0_In360029157 |P1Thread1of1ForFork1_#t~ite9_Out360029157|) .cse2) (and .cse2 (not .cse0) (not .cse1) (= ~z$w_buff1~0_In360029157 |P1Thread1of1ForFork1_#t~ite9_Out360029157|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In360029157, ~z$w_buff1_used~0=~z$w_buff1_used~0_In360029157, ~z$w_buff1~0=~z$w_buff1~0_In360029157, ~z~0=~z~0_In360029157} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out360029157|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In360029157, ~z$w_buff1_used~0=~z$w_buff1_used~0_In360029157, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out360029157|, ~z$w_buff1~0=~z$w_buff1~0_In360029157, ~z~0=~z~0_In360029157} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 13:26:45,628 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L765-->L765-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-378631472 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-378631472 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-378631472| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-378631472| ~z$w_buff0_used~0_In-378631472)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-378631472, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-378631472} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-378631472, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-378631472|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-378631472} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 13:26:45,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L766-->L766-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In752503061 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In752503061 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In752503061 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In752503061 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out752503061| ~z$w_buff1_used~0_In752503061) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out752503061| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In752503061, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In752503061, ~z$w_buff1_used~0=~z$w_buff1_used~0_In752503061, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In752503061} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In752503061, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In752503061, ~z$w_buff1_used~0=~z$w_buff1_used~0_In752503061, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out752503061|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In752503061} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 13:26:45,630 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In797084839 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In797084839 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out797084839|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite13_Out797084839| ~z$r_buff0_thd2~0_In797084839)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In797084839, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In797084839} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In797084839, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out797084839|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In797084839} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 13:26:45,630 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L787-->L787-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1538135642 256) 0))) (or (and (= ~z$w_buff1~0_In1538135642 |P2Thread1of1ForFork2_#t~ite23_Out1538135642|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1538135642 256) 0))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1538135642 256) 0)) (= 0 (mod ~z$w_buff0_used~0_In1538135642 256)) (and (= 0 (mod ~z$w_buff1_used~0_In1538135642 256)) .cse1))) (= |P2Thread1of1ForFork2_#t~ite24_Out1538135642| |P2Thread1of1ForFork2_#t~ite23_Out1538135642|)) (and (= |P2Thread1of1ForFork2_#t~ite23_In1538135642| |P2Thread1of1ForFork2_#t~ite23_Out1538135642|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite24_Out1538135642| ~z$w_buff1~0_In1538135642)))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In1538135642|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1538135642, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1538135642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1538135642, ~z$w_buff1~0=~z$w_buff1~0_In1538135642, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1538135642, ~weak$$choice2~0=~weak$$choice2~0_In1538135642} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out1538135642|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out1538135642|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1538135642, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1538135642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1538135642, ~z$w_buff1~0=~z$w_buff1~0_In1538135642, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1538135642, ~weak$$choice2~0=~weak$$choice2~0_In1538135642} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 13:26:45,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L788-->L788-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-321007102 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite26_Out-321007102| ~z$w_buff0_used~0_In-321007102) (= |P2Thread1of1ForFork2_#t~ite26_Out-321007102| |P2Thread1of1ForFork2_#t~ite27_Out-321007102|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-321007102 256) 0))) (or (= (mod ~z$w_buff0_used~0_In-321007102 256) 0) (and (= (mod ~z$r_buff1_thd3~0_In-321007102 256) 0) .cse1) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-321007102 256)))))) (and (= |P2Thread1of1ForFork2_#t~ite26_In-321007102| |P2Thread1of1ForFork2_#t~ite26_Out-321007102|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite27_Out-321007102| ~z$w_buff0_used~0_In-321007102)))) InVars {P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In-321007102|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-321007102, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-321007102, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-321007102, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-321007102, ~weak$$choice2~0=~weak$$choice2~0_In-321007102} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out-321007102|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-321007102, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-321007102, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-321007102, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-321007102, ~weak$$choice2~0=~weak$$choice2~0_In-321007102, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out-321007102|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 13:26:45,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-1380227168 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd2~0_In-1380227168 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-1380227168 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1380227168 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-1380227168|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd2~0_In-1380227168 |P1Thread1of1ForFork1_#t~ite14_Out-1380227168|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1380227168, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1380227168, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1380227168, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1380227168} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1380227168, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1380227168, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1380227168, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1380227168|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1380227168} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 13:26:45,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L768-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_26| v_~z$r_buff1_thd2~0_55) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_26|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_55, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_25|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 13:26:45,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L789-->L789-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1510826899 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite29_In1510826899| |P2Thread1of1ForFork2_#t~ite29_Out1510826899|) (= ~z$w_buff1_used~0_In1510826899 |P2Thread1of1ForFork2_#t~ite30_Out1510826899|)) (and (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1510826899 256)))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1510826899 256) 0)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1510826899 256))) (= 0 (mod ~z$w_buff0_used~0_In1510826899 256)))) (= |P2Thread1of1ForFork2_#t~ite30_Out1510826899| |P2Thread1of1ForFork2_#t~ite29_Out1510826899|) .cse0 (= ~z$w_buff1_used~0_In1510826899 |P2Thread1of1ForFork2_#t~ite29_Out1510826899|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1510826899, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1510826899, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1510826899, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1510826899, ~weak$$choice2~0=~weak$$choice2~0_In1510826899, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_In1510826899|} OutVars{P2Thread1of1ForFork2_#t~ite30=|P2Thread1of1ForFork2_#t~ite30_Out1510826899|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1510826899, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1510826899, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1510826899, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1510826899, ~weak$$choice2~0=~weak$$choice2~0_In1510826899, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_Out1510826899|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite30, P2Thread1of1ForFork2_#t~ite29] because there is no mapped edge [2019-12-07 13:26:45,632 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L790-->L791: Formula: (and (= v_~z$r_buff0_thd3~0_68 v_~z$r_buff0_thd3~0_67) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_68, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 13:26:45,632 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L793-->L797: Formula: (and (= 0 v_~z$flush_delayed~0_6) (= v_~z~0_25 v_~z$mem_tmp~0_5) (not (= 0 (mod v_~z$flush_delayed~0_7 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_5, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_6, ~z~0=v_~z~0_25} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 13:26:45,633 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L745-->L745-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In190056877 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In190056877 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out190056877| 0) (not .cse0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out190056877| ~z$w_buff0_used~0_In190056877) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In190056877, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In190056877} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out190056877|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In190056877, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In190056877} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 13:26:45,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L746-->L746-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In-137214086 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-137214086 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-137214086 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-137214086 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-137214086 |P0Thread1of1ForFork0_#t~ite6_Out-137214086|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-137214086| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-137214086, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-137214086, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-137214086, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-137214086} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-137214086|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-137214086, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-137214086, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-137214086, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-137214086} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 13:26:45,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L747-->L748: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In-819092378 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-819092378 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_In-819092378 ~z$r_buff0_thd1~0_Out-819092378))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd1~0_Out-819092378) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-819092378, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-819092378} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-819092378, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-819092378|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-819092378} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:26:45,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L748-->L748-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1190157197 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd1~0_In-1190157197 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1190157197 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1190157197 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1190157197| ~z$r_buff1_thd1~0_In-1190157197) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1190157197| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1190157197, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1190157197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1190157197, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1190157197} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1190157197, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1190157197|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1190157197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1190157197, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1190157197} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 13:26:45,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L748-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_68 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= v_~__unbuffered_cnt~0_73 (+ v_~__unbuffered_cnt~0_74 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_68, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_73} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:26:45,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L797-2-->L797-5: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1126719429 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1126719429 256))) (.cse2 (= |P2Thread1of1ForFork2_#t~ite38_Out1126719429| |P2Thread1of1ForFork2_#t~ite39_Out1126719429|))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite38_Out1126719429| ~z~0_In1126719429) .cse2) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite38_Out1126719429| ~z$w_buff1~0_In1126719429) (not .cse0) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1126719429, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1126719429, ~z$w_buff1~0=~z$w_buff1~0_In1126719429, ~z~0=~z~0_In1126719429} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1126719429, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1126719429, ~z$w_buff1~0=~z$w_buff1~0_In1126719429, ~z~0=~z~0_In1126719429, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1126719429|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1126719429|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 13:26:45,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-599718594 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-599718594 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite40_Out-599718594|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-599718594 |P2Thread1of1ForFork2_#t~ite40_Out-599718594|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-599718594, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-599718594} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-599718594, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-599718594, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out-599718594|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 13:26:45,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L799-->L799-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-2030291433 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-2030291433 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-2030291433 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-2030291433 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite41_Out-2030291433| ~z$w_buff1_used~0_In-2030291433) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork2_#t~ite41_Out-2030291433| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2030291433, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2030291433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2030291433, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2030291433} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out-2030291433|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2030291433, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2030291433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2030291433, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2030291433} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 13:26:45,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L800-->L800-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-535919447 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-535919447 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out-535919447| ~z$r_buff0_thd3~0_In-535919447)) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out-535919447| 0) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-535919447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-535919447} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-535919447|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-535919447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-535919447} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 13:26:45,636 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L801-->L801-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In622205512 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In622205512 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In622205512 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In622205512 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite43_Out622205512|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd3~0_In622205512 |P2Thread1of1ForFork2_#t~ite43_Out622205512|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In622205512, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In622205512, ~z$w_buff1_used~0=~z$w_buff1_used~0_In622205512, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In622205512} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In622205512, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In622205512, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out622205512|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In622205512, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In622205512} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 13:26:45,636 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L801-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_136 |v_P2Thread1of1ForFork2_#t~ite43_28|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_136, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_27|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 13:26:45,636 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L824-1-->L830: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:26:45,636 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L830-2-->L830-5: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In-161011124 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-161011124 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite48_Out-161011124| |ULTIMATE.start_main_#t~ite47_Out-161011124|))) (or (and .cse0 (= ~z~0_In-161011124 |ULTIMATE.start_main_#t~ite47_Out-161011124|) (or .cse1 .cse2)) (and (not .cse2) (not .cse1) .cse0 (= ~z$w_buff1~0_In-161011124 |ULTIMATE.start_main_#t~ite47_Out-161011124|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-161011124, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-161011124, ~z$w_buff1~0=~z$w_buff1~0_In-161011124, ~z~0=~z~0_In-161011124} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-161011124, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-161011124|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-161011124, ~z$w_buff1~0=~z$w_buff1~0_In-161011124, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-161011124|, ~z~0=~z~0_In-161011124} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:26:45,637 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-1695208680 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1695208680 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1695208680| 0)) (and (= ~z$w_buff0_used~0_In-1695208680 |ULTIMATE.start_main_#t~ite49_Out-1695208680|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1695208680, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1695208680} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1695208680, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1695208680, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1695208680|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:26:45,637 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L832-->L832-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd0~0_In-302344885 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-302344885 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-302344885 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-302344885 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-302344885| 0)) (and (= ~z$w_buff1_used~0_In-302344885 |ULTIMATE.start_main_#t~ite50_Out-302344885|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-302344885, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-302344885, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-302344885, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-302344885} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-302344885|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-302344885, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-302344885, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-302344885, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-302344885} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:26:45,637 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-118094761 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-118094761 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-118094761| 0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-118094761 |ULTIMATE.start_main_#t~ite51_Out-118094761|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-118094761, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-118094761} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-118094761, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-118094761|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-118094761} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:26:45,638 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L834-->L834-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In754280231 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In754280231 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In754280231 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In754280231 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out754280231|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~z$r_buff1_thd0~0_In754280231 |ULTIMATE.start_main_#t~ite52_Out754280231|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In754280231, ~z$w_buff0_used~0=~z$w_buff0_used~0_In754280231, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In754280231, ~z$w_buff1_used~0=~z$w_buff1_used~0_In754280231} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out754280231|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In754280231, ~z$w_buff0_used~0=~z$w_buff0_used~0_In754280231, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In754280231, ~z$w_buff1_used~0=~z$w_buff1_used~0_In754280231} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:26:45,638 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L834-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_21 256)) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p2_EAX~0_28) (= 0 v_~__unbuffered_p1_EAX~0_23) (= v_~x~0_47 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_21) (= |v_ULTIMATE.start_main_#t~ite52_50| v_~z$r_buff1_thd0~0_94) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_50|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~x~0=v_~x~0_47} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_49|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_94, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~x~0=v_~x~0_47, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:26:45,685 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:26:45 BasicIcfg [2019-12-07 13:26:45,685 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:26:45,686 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:26:45,686 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:26:45,686 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:26:45,686 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:24:46" (3/4) ... [2019-12-07 13:26:45,688 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:26:45,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [894] [894] ULTIMATE.startENTRY-->L820: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_958 0) (= v_~x~0_72 0) (= v_~z$r_buff0_thd2~0_111 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1388~0.base_26|) 0) (= |v_#NULL.offset_6| 0) (= 0 v_~__unbuffered_p1_EAX~0_40) (= v_~z$r_buff1_thd0~0_129 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t1388~0.base_26|) (= v_~z$w_buff1_used~0_531 0) (= v_~y~0_19 0) (= v_~z$r_buff0_thd1~0_132 0) (= v_~z$r_buff1_thd1~0_108 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~main$tmp_guard1~0_39 0) (= v_~z$w_buff0~0_487 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$r_buff1_thd2~0_104 0) (= 0 v_~__unbuffered_p2_EAX~0_53) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1388~0.base_26| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1388~0.base_26|) |v_ULTIMATE.start_main_~#t1388~0.offset_19| 0)) |v_#memory_int_21|) (= (store .cse0 |v_ULTIMATE.start_main_~#t1388~0.base_26| 1) |v_#valid_69|) (= v_~z$w_buff1~0_307 0) (= 0 v_~z$r_buff1_thd3~0_237) (= 0 |v_#NULL.base_6|) (= 0 v_~z$flush_delayed~0_24) (= v_~z$r_buff0_thd0~0_141 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= v_~z$mem_tmp~0_13 0) (= v_~z~0_174 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1388~0.base_26| 4)) (= 0 v_~__unbuffered_cnt~0_91) (= 0 v_~z$r_buff0_thd3~0_332) (= v_~main$tmp_guard0~0_26 0) (= v_~weak$$choice2~0_107 0) (= |v_ULTIMATE.start_main_~#t1388~0.offset_19| 0) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_104, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_31|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_287|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ULTIMATE.start_main_~#t1390~0.base=|v_ULTIMATE.start_main_~#t1390~0.base_16|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_85|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_141, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_40, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_53, ~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start_main_~#t1388~0.base=|v_ULTIMATE.start_main_~#t1388~0.base_26|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_531, ~z$flush_delayed~0=v_~z$flush_delayed~0_24, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_108, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_332, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91, ~x~0=v_~x~0_72, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_307, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_39, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_35|, ULTIMATE.start_main_~#t1389~0.base=|v_ULTIMATE.start_main_~#t1389~0.base_23|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_35|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_129, ~y~0=v_~y~0_19, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_111, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_958, ~z$w_buff0~0=v_~z$w_buff0~0_487, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_237, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ULTIMATE.start_main_~#t1389~0.offset=|v_ULTIMATE.start_main_~#t1389~0.offset_19|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_24|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_174, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_132, ULTIMATE.start_main_~#t1388~0.offset=|v_ULTIMATE.start_main_~#t1388~0.offset_19|, ULTIMATE.start_main_~#t1390~0.offset=|v_ULTIMATE.start_main_~#t1390~0.offset_12|} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, #NULL.offset, ~z$w_buff1~0, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t1389~0.base, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_~#t1390~0.base, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~__unbuffered_p1_EAX~0, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ~z$mem_tmp~0, ULTIMATE.start_main_~#t1388~0.base, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1389~0.offset, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#res, ~z$r_buff1_thd1~0, #valid, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0, ULTIMATE.start_main_~#t1388~0.offset, ULTIMATE.start_main_~#t1390~0.offset] because there is no mapped edge [2019-12-07 13:26:45,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L820-1-->L822: Formula: (and (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t1389~0.base_9|)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1389~0.base_9| 4)) (= |v_ULTIMATE.start_main_~#t1389~0.offset_8| 0) (not (= |v_ULTIMATE.start_main_~#t1389~0.base_9| 0)) (= (store |v_#valid_34| |v_ULTIMATE.start_main_~#t1389~0.base_9| 1) |v_#valid_33|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1389~0.base_9|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1389~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1389~0.base_9|) |v_ULTIMATE.start_main_~#t1389~0.offset_8| 1)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_3|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1389~0.base=|v_ULTIMATE.start_main_~#t1389~0.base_9|, ULTIMATE.start_main_~#t1389~0.offset=|v_ULTIMATE.start_main_~#t1389~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1389~0.base, ULTIMATE.start_main_~#t1389~0.offset] because there is no mapped edge [2019-12-07 13:26:45,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] P0ENTRY-->L4-3: Formula: (and (= P0Thread1of1ForFork0_~arg.offset_Out-593102411 |P0Thread1of1ForFork0_#in~arg.offset_In-593102411|) (= ~z$w_buff0~0_Out-593102411 1) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-593102411)) (= (ite (not (and (not (= 0 (mod ~z$w_buff1_used~0_Out-593102411 256))) (not (= (mod ~z$w_buff0_used~0_Out-593102411 256) 0)))) 1 0) |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-593102411|) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-593102411| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-593102411) (= ~z$w_buff0_used~0_In-593102411 ~z$w_buff1_used~0_Out-593102411) (= ~z$w_buff0_used~0_Out-593102411 1) (= ~z$w_buff1~0_Out-593102411 ~z$w_buff0~0_In-593102411) (= |P0Thread1of1ForFork0_#in~arg.base_In-593102411| P0Thread1of1ForFork0_~arg.base_Out-593102411)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-593102411|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-593102411, ~z$w_buff0~0=~z$w_buff0~0_In-593102411, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-593102411|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-593102411|, ~z$w_buff0_used~0=~z$w_buff0_used~0_Out-593102411, ~z$w_buff0~0=~z$w_buff0~0_Out-593102411, ~z$w_buff1_used~0=~z$w_buff1_used~0_Out-593102411, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-593102411, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-593102411|, ~z$w_buff1~0=~z$w_buff1~0_Out-593102411, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out-593102411, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-593102411|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out-593102411} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 13:26:45,689 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L822-1-->L824: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1390~0.base_11| 0)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1390~0.base_11| 1)) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1390~0.base_11|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1390~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1390~0.base_11|) |v_ULTIMATE.start_main_~#t1390~0.offset_9| 2)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1390~0.base_11|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1390~0.base_11| 4) |v_#length_17|) (= |v_ULTIMATE.start_main_~#t1390~0.offset_9| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1390~0.base=|v_ULTIMATE.start_main_~#t1390~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1390~0.offset=|v_ULTIMATE.start_main_~#t1390~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1390~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1390~0.offset] because there is no mapped edge [2019-12-07 13:26:45,690 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L764-2-->L764-5: Formula: (let ((.cse2 (= |P1Thread1of1ForFork1_#t~ite9_Out360029157| |P1Thread1of1ForFork1_#t~ite10_Out360029157|)) (.cse0 (= (mod ~z$w_buff1_used~0_In360029157 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd2~0_In360029157 256) 0))) (or (and (or .cse0 .cse1) (= ~z~0_In360029157 |P1Thread1of1ForFork1_#t~ite9_Out360029157|) .cse2) (and .cse2 (not .cse0) (not .cse1) (= ~z$w_buff1~0_In360029157 |P1Thread1of1ForFork1_#t~ite9_Out360029157|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In360029157, ~z$w_buff1_used~0=~z$w_buff1_used~0_In360029157, ~z$w_buff1~0=~z$w_buff1~0_In360029157, ~z~0=~z~0_In360029157} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out360029157|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In360029157, ~z$w_buff1_used~0=~z$w_buff1_used~0_In360029157, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out360029157|, ~z$w_buff1~0=~z$w_buff1~0_In360029157, ~z~0=~z~0_In360029157} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 13:26:45,691 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L765-->L765-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-378631472 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-378631472 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-378631472| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-378631472| ~z$w_buff0_used~0_In-378631472)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-378631472, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-378631472} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-378631472, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-378631472|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-378631472} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 13:26:45,692 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L766-->L766-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In752503061 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In752503061 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In752503061 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In752503061 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out752503061| ~z$w_buff1_used~0_In752503061) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out752503061| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In752503061, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In752503061, ~z$w_buff1_used~0=~z$w_buff1_used~0_In752503061, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In752503061} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In752503061, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In752503061, ~z$w_buff1_used~0=~z$w_buff1_used~0_In752503061, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out752503061|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In752503061} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 13:26:45,692 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In797084839 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In797084839 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out797084839|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite13_Out797084839| ~z$r_buff0_thd2~0_In797084839)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In797084839, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In797084839} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In797084839, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out797084839|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In797084839} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 13:26:45,693 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L787-->L787-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1538135642 256) 0))) (or (and (= ~z$w_buff1~0_In1538135642 |P2Thread1of1ForFork2_#t~ite23_Out1538135642|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1538135642 256) 0))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1538135642 256) 0)) (= 0 (mod ~z$w_buff0_used~0_In1538135642 256)) (and (= 0 (mod ~z$w_buff1_used~0_In1538135642 256)) .cse1))) (= |P2Thread1of1ForFork2_#t~ite24_Out1538135642| |P2Thread1of1ForFork2_#t~ite23_Out1538135642|)) (and (= |P2Thread1of1ForFork2_#t~ite23_In1538135642| |P2Thread1of1ForFork2_#t~ite23_Out1538135642|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite24_Out1538135642| ~z$w_buff1~0_In1538135642)))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In1538135642|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1538135642, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1538135642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1538135642, ~z$w_buff1~0=~z$w_buff1~0_In1538135642, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1538135642, ~weak$$choice2~0=~weak$$choice2~0_In1538135642} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out1538135642|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out1538135642|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1538135642, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1538135642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1538135642, ~z$w_buff1~0=~z$w_buff1~0_In1538135642, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1538135642, ~weak$$choice2~0=~weak$$choice2~0_In1538135642} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 13:26:45,693 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L788-->L788-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-321007102 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite26_Out-321007102| ~z$w_buff0_used~0_In-321007102) (= |P2Thread1of1ForFork2_#t~ite26_Out-321007102| |P2Thread1of1ForFork2_#t~ite27_Out-321007102|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-321007102 256) 0))) (or (= (mod ~z$w_buff0_used~0_In-321007102 256) 0) (and (= (mod ~z$r_buff1_thd3~0_In-321007102 256) 0) .cse1) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-321007102 256)))))) (and (= |P2Thread1of1ForFork2_#t~ite26_In-321007102| |P2Thread1of1ForFork2_#t~ite26_Out-321007102|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite27_Out-321007102| ~z$w_buff0_used~0_In-321007102)))) InVars {P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In-321007102|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-321007102, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-321007102, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-321007102, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-321007102, ~weak$$choice2~0=~weak$$choice2~0_In-321007102} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out-321007102|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-321007102, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-321007102, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-321007102, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-321007102, ~weak$$choice2~0=~weak$$choice2~0_In-321007102, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out-321007102|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 13:26:45,693 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-1380227168 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd2~0_In-1380227168 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-1380227168 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1380227168 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-1380227168|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd2~0_In-1380227168 |P1Thread1of1ForFork1_#t~ite14_Out-1380227168|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1380227168, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1380227168, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1380227168, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1380227168} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1380227168, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1380227168, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1380227168, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1380227168|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1380227168} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 13:26:45,694 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L768-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_26| v_~z$r_buff1_thd2~0_55) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_26|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_55, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_25|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 13:26:45,694 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L789-->L789-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1510826899 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite29_In1510826899| |P2Thread1of1ForFork2_#t~ite29_Out1510826899|) (= ~z$w_buff1_used~0_In1510826899 |P2Thread1of1ForFork2_#t~ite30_Out1510826899|)) (and (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1510826899 256)))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1510826899 256) 0)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1510826899 256))) (= 0 (mod ~z$w_buff0_used~0_In1510826899 256)))) (= |P2Thread1of1ForFork2_#t~ite30_Out1510826899| |P2Thread1of1ForFork2_#t~ite29_Out1510826899|) .cse0 (= ~z$w_buff1_used~0_In1510826899 |P2Thread1of1ForFork2_#t~ite29_Out1510826899|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1510826899, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1510826899, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1510826899, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1510826899, ~weak$$choice2~0=~weak$$choice2~0_In1510826899, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_In1510826899|} OutVars{P2Thread1of1ForFork2_#t~ite30=|P2Thread1of1ForFork2_#t~ite30_Out1510826899|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1510826899, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1510826899, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1510826899, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1510826899, ~weak$$choice2~0=~weak$$choice2~0_In1510826899, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_Out1510826899|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite30, P2Thread1of1ForFork2_#t~ite29] because there is no mapped edge [2019-12-07 13:26:45,694 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L790-->L791: Formula: (and (= v_~z$r_buff0_thd3~0_68 v_~z$r_buff0_thd3~0_67) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_68, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 13:26:45,695 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L793-->L797: Formula: (and (= 0 v_~z$flush_delayed~0_6) (= v_~z~0_25 v_~z$mem_tmp~0_5) (not (= 0 (mod v_~z$flush_delayed~0_7 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_5, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_6, ~z~0=v_~z~0_25} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 13:26:45,696 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L745-->L745-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In190056877 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In190056877 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out190056877| 0) (not .cse0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out190056877| ~z$w_buff0_used~0_In190056877) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In190056877, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In190056877} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out190056877|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In190056877, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In190056877} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 13:26:45,696 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L746-->L746-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In-137214086 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-137214086 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-137214086 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-137214086 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-137214086 |P0Thread1of1ForFork0_#t~ite6_Out-137214086|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-137214086| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-137214086, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-137214086, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-137214086, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-137214086} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-137214086|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-137214086, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-137214086, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-137214086, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-137214086} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 13:26:45,696 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L747-->L748: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In-819092378 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-819092378 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_In-819092378 ~z$r_buff0_thd1~0_Out-819092378))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd1~0_Out-819092378) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-819092378, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-819092378} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-819092378, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-819092378|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-819092378} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:26:45,696 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L748-->L748-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1190157197 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd1~0_In-1190157197 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1190157197 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1190157197 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1190157197| ~z$r_buff1_thd1~0_In-1190157197) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1190157197| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1190157197, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1190157197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1190157197, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1190157197} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1190157197, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1190157197|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1190157197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1190157197, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1190157197} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 13:26:45,696 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L748-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_68 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= v_~__unbuffered_cnt~0_73 (+ v_~__unbuffered_cnt~0_74 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_68, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_73} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:26:45,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L797-2-->L797-5: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1126719429 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1126719429 256))) (.cse2 (= |P2Thread1of1ForFork2_#t~ite38_Out1126719429| |P2Thread1of1ForFork2_#t~ite39_Out1126719429|))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite38_Out1126719429| ~z~0_In1126719429) .cse2) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite38_Out1126719429| ~z$w_buff1~0_In1126719429) (not .cse0) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1126719429, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1126719429, ~z$w_buff1~0=~z$w_buff1~0_In1126719429, ~z~0=~z~0_In1126719429} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1126719429, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1126719429, ~z$w_buff1~0=~z$w_buff1~0_In1126719429, ~z~0=~z~0_In1126719429, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1126719429|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1126719429|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 13:26:45,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-599718594 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-599718594 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite40_Out-599718594|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-599718594 |P2Thread1of1ForFork2_#t~ite40_Out-599718594|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-599718594, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-599718594} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-599718594, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-599718594, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out-599718594|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 13:26:45,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L799-->L799-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-2030291433 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-2030291433 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-2030291433 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-2030291433 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite41_Out-2030291433| ~z$w_buff1_used~0_In-2030291433) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork2_#t~ite41_Out-2030291433| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2030291433, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2030291433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2030291433, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2030291433} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out-2030291433|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2030291433, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2030291433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2030291433, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2030291433} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 13:26:45,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L800-->L800-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-535919447 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-535919447 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out-535919447| ~z$r_buff0_thd3~0_In-535919447)) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out-535919447| 0) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-535919447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-535919447} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-535919447|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-535919447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-535919447} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 13:26:45,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L801-->L801-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In622205512 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In622205512 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In622205512 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In622205512 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite43_Out622205512|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd3~0_In622205512 |P2Thread1of1ForFork2_#t~ite43_Out622205512|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In622205512, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In622205512, ~z$w_buff1_used~0=~z$w_buff1_used~0_In622205512, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In622205512} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In622205512, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In622205512, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out622205512|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In622205512, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In622205512} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 13:26:45,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L801-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_136 |v_P2Thread1of1ForFork2_#t~ite43_28|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_136, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_27|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 13:26:45,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L824-1-->L830: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:26:45,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L830-2-->L830-5: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In-161011124 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-161011124 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite48_Out-161011124| |ULTIMATE.start_main_#t~ite47_Out-161011124|))) (or (and .cse0 (= ~z~0_In-161011124 |ULTIMATE.start_main_#t~ite47_Out-161011124|) (or .cse1 .cse2)) (and (not .cse2) (not .cse1) .cse0 (= ~z$w_buff1~0_In-161011124 |ULTIMATE.start_main_#t~ite47_Out-161011124|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-161011124, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-161011124, ~z$w_buff1~0=~z$w_buff1~0_In-161011124, ~z~0=~z~0_In-161011124} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-161011124, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-161011124|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-161011124, ~z$w_buff1~0=~z$w_buff1~0_In-161011124, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-161011124|, ~z~0=~z~0_In-161011124} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:26:45,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-1695208680 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1695208680 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1695208680| 0)) (and (= ~z$w_buff0_used~0_In-1695208680 |ULTIMATE.start_main_#t~ite49_Out-1695208680|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1695208680, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1695208680} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1695208680, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1695208680, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1695208680|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:26:45,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L832-->L832-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd0~0_In-302344885 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-302344885 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-302344885 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-302344885 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-302344885| 0)) (and (= ~z$w_buff1_used~0_In-302344885 |ULTIMATE.start_main_#t~ite50_Out-302344885|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-302344885, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-302344885, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-302344885, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-302344885} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-302344885|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-302344885, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-302344885, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-302344885, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-302344885} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:26:45,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-118094761 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-118094761 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-118094761| 0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-118094761 |ULTIMATE.start_main_#t~ite51_Out-118094761|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-118094761, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-118094761} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-118094761, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-118094761|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-118094761} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:26:45,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L834-->L834-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In754280231 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In754280231 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In754280231 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In754280231 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out754280231|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~z$r_buff1_thd0~0_In754280231 |ULTIMATE.start_main_#t~ite52_Out754280231|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In754280231, ~z$w_buff0_used~0=~z$w_buff0_used~0_In754280231, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In754280231, ~z$w_buff1_used~0=~z$w_buff1_used~0_In754280231} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out754280231|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In754280231, ~z$w_buff0_used~0=~z$w_buff0_used~0_In754280231, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In754280231, ~z$w_buff1_used~0=~z$w_buff1_used~0_In754280231} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:26:45,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L834-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_21 256)) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p2_EAX~0_28) (= 0 v_~__unbuffered_p1_EAX~0_23) (= v_~x~0_47 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_21) (= |v_ULTIMATE.start_main_#t~ite52_50| v_~z$r_buff1_thd0~0_94) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_50|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~x~0=v_~x~0_47} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_49|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_94, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~x~0=v_~x~0_47, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:26:45,754 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_54e0dff0-5c0e-46ac-8acd-4bba926c112b/bin/uautomizer/witness.graphml [2019-12-07 13:26:45,754 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:26:45,755 INFO L168 Benchmark]: Toolchain (without parser) took 120123.61 ms. Allocated memory was 1.0 GB in the beginning and 6.3 GB in the end (delta: 5.3 GB). Free memory was 940.9 MB in the beginning and 4.7 GB in the end (delta: -3.7 GB). Peak memory consumption was 1.6 GB. Max. memory is 11.5 GB. [2019-12-07 13:26:45,755 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:26:45,755 INFO L168 Benchmark]: CACSL2BoogieTranslator took 435.89 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 90.2 MB). Free memory was 940.9 MB in the beginning and 1.1 GB in the end (delta: -115.9 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 13:26:45,756 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.34 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:26:45,756 INFO L168 Benchmark]: Boogie Preprocessor took 30.00 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:26:45,756 INFO L168 Benchmark]: RCFGBuilder took 414.25 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 995.7 MB in the end (delta: 55.7 MB). Peak memory consumption was 55.7 MB. Max. memory is 11.5 GB. [2019-12-07 13:26:45,756 INFO L168 Benchmark]: TraceAbstraction took 119133.83 ms. Allocated memory was 1.1 GB in the beginning and 6.3 GB in the end (delta: 5.2 GB). Free memory was 995.7 MB in the beginning and 4.7 GB in the end (delta: -3.7 GB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2019-12-07 13:26:45,757 INFO L168 Benchmark]: Witness Printer took 68.22 ms. Allocated memory is still 6.3 GB. Free memory was 4.7 GB in the beginning and 4.7 GB in the end (delta: 42.7 MB). Peak memory consumption was 42.7 MB. Max. memory is 11.5 GB. [2019-12-07 13:26:45,758 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 435.89 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 90.2 MB). Free memory was 940.9 MB in the beginning and 1.1 GB in the end (delta: -115.9 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.34 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 30.00 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 414.25 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 995.7 MB in the end (delta: 55.7 MB). Peak memory consumption was 55.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 119133.83 ms. Allocated memory was 1.1 GB in the beginning and 6.3 GB in the end (delta: 5.2 GB). Free memory was 995.7 MB in the beginning and 4.7 GB in the end (delta: -3.7 GB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. * Witness Printer took 68.22 ms. Allocated memory is still 6.3 GB. Free memory was 4.7 GB in the beginning and 4.7 GB in the end (delta: 42.7 MB). Peak memory consumption was 42.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.5s, 175 ProgramPointsBefore, 92 ProgramPointsAfterwards, 212 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 32 TrivialSequentialCompositions, 54 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 31 ChoiceCompositions, 7186 VarBasedMoverChecksPositive, 380 VarBasedMoverChecksNegative, 188 SemBasedMoverChecksPositive, 286 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 125946 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L820] FCALL, FORK 0 pthread_create(&t1388, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L734] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L735] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L736] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L737] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L738] 1 z$r_buff0_thd1 = (_Bool)1 [L741] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L744] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L822] FCALL, FORK 0 pthread_create(&t1389, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t1390, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L758] 2 x = 2 [L761] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L778] 3 y = 1 [L781] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L782] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L783] 3 z$flush_delayed = weak$$choice2 [L784] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L765] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L786] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L786] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L787] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L767] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L788] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L789] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L791] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L792] 3 __unbuffered_p2_EAX = z VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L744] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L745] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L746] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L797] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L798] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L799] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L800] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L830] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L830] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L831] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L832] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L833] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 166 locations, 2 error locations. Result: UNSAFE, OverallTime: 118.9s, OverallIterations: 32, TraceHistogramMax: 1, AutomataDifference: 33.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7290 SDtfs, 9867 SDslu, 24291 SDs, 0 SdLazy, 17082 SolverSat, 570 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 12.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 441 GetRequests, 63 SyntacticMatches, 18 SemanticMatches, 360 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1981 ImplicationChecksByTransitivity, 3.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=269248occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 64.0s AutomataMinimizationTime, 31 MinimizatonAttempts, 408229 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.6s InterpolantComputationTime, 1485 NumberOfCodeBlocks, 1485 NumberOfCodeBlocksAsserted, 32 NumberOfCheckSat, 1387 ConstructedInterpolants, 0 QuantifiedInterpolants, 370464 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 31 InterpolantComputations, 31 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...