./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix052_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_7d0d3944-0a7a-410f-85cf-5494b4ead115/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_7d0d3944-0a7a-410f-85cf-5494b4ead115/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_7d0d3944-0a7a-410f-85cf-5494b4ead115/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_7d0d3944-0a7a-410f-85cf-5494b4ead115/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix052_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_7d0d3944-0a7a-410f-85cf-5494b4ead115/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_7d0d3944-0a7a-410f-85cf-5494b4ead115/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 906c3ed9d5a7830e9f8835cdb9c7e19aa3c836c1 ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:44:11,725 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:44:11,727 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:44:11,734 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:44:11,735 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:44:11,735 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:44:11,736 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:44:11,738 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:44:11,739 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:44:11,739 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:44:11,740 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:44:11,741 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:44:11,741 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:44:11,742 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:44:11,743 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:44:11,743 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:44:11,744 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:44:11,745 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:44:11,746 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:44:11,748 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:44:11,749 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:44:11,749 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:44:11,750 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:44:11,751 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:44:11,752 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:44:11,753 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:44:11,753 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:44:11,753 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:44:11,753 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:44:11,754 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:44:11,754 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:44:11,755 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:44:11,755 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:44:11,756 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:44:11,756 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:44:11,756 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:44:11,757 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:44:11,757 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:44:11,757 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:44:11,757 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:44:11,758 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:44:11,758 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_7d0d3944-0a7a-410f-85cf-5494b4ead115/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:44:11,768 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:44:11,768 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:44:11,769 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:44:11,769 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:44:11,769 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:44:11,769 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:44:11,769 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:44:11,770 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:44:11,770 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:44:11,770 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:44:11,770 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:44:11,770 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:44:11,770 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:44:11,770 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:44:11,771 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:44:11,771 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:44:11,771 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:44:11,771 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:44:11,771 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:44:11,771 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:44:11,771 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:44:11,772 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:44:11,772 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:44:11,772 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:44:11,772 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:44:11,772 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:44:11,772 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:44:11,772 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:44:11,773 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:44:11,773 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_7d0d3944-0a7a-410f-85cf-5494b4ead115/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 906c3ed9d5a7830e9f8835cdb9c7e19aa3c836c1 [2019-12-07 18:44:11,871 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:44:11,879 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:44:11,882 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:44:11,883 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:44:11,883 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:44:11,883 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_7d0d3944-0a7a-410f-85cf-5494b4ead115/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix052_pso.oepc.i [2019-12-07 18:44:11,920 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_7d0d3944-0a7a-410f-85cf-5494b4ead115/bin/uautomizer/data/4c14cbbe1/f3e9f7532c2048eaaa02c3721d2ee682/FLAG1474c6e5b [2019-12-07 18:44:12,388 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:44:12,388 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_7d0d3944-0a7a-410f-85cf-5494b4ead115/sv-benchmarks/c/pthread-wmm/mix052_pso.oepc.i [2019-12-07 18:44:12,399 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_7d0d3944-0a7a-410f-85cf-5494b4ead115/bin/uautomizer/data/4c14cbbe1/f3e9f7532c2048eaaa02c3721d2ee682/FLAG1474c6e5b [2019-12-07 18:44:12,408 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_7d0d3944-0a7a-410f-85cf-5494b4ead115/bin/uautomizer/data/4c14cbbe1/f3e9f7532c2048eaaa02c3721d2ee682 [2019-12-07 18:44:12,409 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:44:12,410 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:44:12,411 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:44:12,411 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:44:12,413 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:44:12,413 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:44:12" (1/1) ... [2019-12-07 18:44:12,415 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:44:12, skipping insertion in model container [2019-12-07 18:44:12,415 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:44:12" (1/1) ... [2019-12-07 18:44:12,420 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:44:12,449 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:44:12,702 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:44:12,711 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:44:12,756 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:44:12,802 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:44:12,803 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:44:12 WrapperNode [2019-12-07 18:44:12,803 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:44:12,803 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:44:12,803 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:44:12,803 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:44:12,809 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:44:12" (1/1) ... [2019-12-07 18:44:12,822 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:44:12" (1/1) ... [2019-12-07 18:44:12,840 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:44:12,840 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:44:12,840 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:44:12,840 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:44:12,847 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:44:12" (1/1) ... [2019-12-07 18:44:12,847 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:44:12" (1/1) ... [2019-12-07 18:44:12,850 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:44:12" (1/1) ... [2019-12-07 18:44:12,850 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:44:12" (1/1) ... [2019-12-07 18:44:12,857 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:44:12" (1/1) ... [2019-12-07 18:44:12,861 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:44:12" (1/1) ... [2019-12-07 18:44:12,863 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:44:12" (1/1) ... [2019-12-07 18:44:12,867 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:44:12,867 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:44:12,867 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:44:12,868 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:44:12,868 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:44:12" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7d0d3944-0a7a-410f-85cf-5494b4ead115/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:44:12,908 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:44:12,908 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:44:12,908 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:44:12,909 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:44:12,909 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:44:12,909 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:44:12,909 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:44:12,909 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:44:12,909 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:44:12,909 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:44:12,909 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:44:12,909 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:44:12,909 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:44:12,910 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:44:13,277 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:44:13,277 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:44:13,278 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:44:13 BoogieIcfgContainer [2019-12-07 18:44:13,278 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:44:13,279 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:44:13,279 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:44:13,281 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:44:13,281 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:44:12" (1/3) ... [2019-12-07 18:44:13,281 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c953329 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:44:13, skipping insertion in model container [2019-12-07 18:44:13,281 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:44:12" (2/3) ... [2019-12-07 18:44:13,282 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c953329 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:44:13, skipping insertion in model container [2019-12-07 18:44:13,282 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:44:13" (3/3) ... [2019-12-07 18:44:13,283 INFO L109 eAbstractionObserver]: Analyzing ICFG mix052_pso.oepc.i [2019-12-07 18:44:13,289 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:44:13,289 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:44:13,294 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:44:13,295 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:44:13,320 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,320 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,320 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,320 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,320 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,320 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,321 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,321 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,321 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,321 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,321 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,321 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,321 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,322 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,322 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,322 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,322 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,322 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,322 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,322 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,322 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,322 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,323 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,323 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,323 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,323 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,323 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,323 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,323 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,323 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,323 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,324 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,324 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,324 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,324 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,324 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,324 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,324 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,325 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,325 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,325 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,325 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,325 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,325 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,325 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,325 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,326 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,326 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,326 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,326 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,326 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,326 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,326 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,326 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,326 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,327 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,327 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,327 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,327 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,327 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,327 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,327 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,327 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,327 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,328 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,328 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,328 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,328 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,328 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,329 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,329 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,329 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,329 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,329 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,329 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,329 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,329 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,331 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,331 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,331 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,331 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,331 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,331 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,331 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,331 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,331 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,333 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,333 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,333 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,333 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,333 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,333 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,333 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,333 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,333 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,340 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,340 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,340 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,340 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,340 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,340 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,340 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:44:13,351 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:44:13,363 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:44:13,363 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:44:13,363 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:44:13,363 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:44:13,364 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:44:13,364 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:44:13,364 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:44:13,364 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:44:13,375 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 175 places, 212 transitions [2019-12-07 18:44:13,376 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 18:44:13,433 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 18:44:13,433 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:44:13,444 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 702 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:44:13,459 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 18:44:13,492 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 18:44:13,492 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:44:13,498 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 702 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:44:13,513 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 18:44:13,514 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:44:16,667 WARN L192 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 18:44:16,927 INFO L206 etLargeBlockEncoding]: Checked pairs total: 125946 [2019-12-07 18:44:16,927 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 18:44:16,929 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 102 transitions [2019-12-07 18:44:31,023 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 111572 states. [2019-12-07 18:44:31,025 INFO L276 IsEmpty]: Start isEmpty. Operand 111572 states. [2019-12-07 18:44:31,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:44:31,028 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:44:31,029 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:44:31,029 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:44:31,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:44:31,033 INFO L82 PathProgramCache]: Analyzing trace with hash 912834, now seen corresponding path program 1 times [2019-12-07 18:44:31,038 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:44:31,039 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414134780] [2019-12-07 18:44:31,039 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:44:31,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:44:31,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:44:31,171 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1414134780] [2019-12-07 18:44:31,172 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:44:31,172 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:44:31,173 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1135499336] [2019-12-07 18:44:31,176 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:44:31,176 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:44:31,185 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:44:31,185 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:44:31,186 INFO L87 Difference]: Start difference. First operand 111572 states. Second operand 3 states. [2019-12-07 18:44:31,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:44:31,842 INFO L93 Difference]: Finished difference Result 110910 states and 474711 transitions. [2019-12-07 18:44:31,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:44:31,844 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:44:31,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:44:32,322 INFO L225 Difference]: With dead ends: 110910 [2019-12-07 18:44:32,322 INFO L226 Difference]: Without dead ends: 98066 [2019-12-07 18:44:32,323 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:44:35,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98066 states. [2019-12-07 18:44:37,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98066 to 98066. [2019-12-07 18:44:37,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98066 states. [2019-12-07 18:44:37,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98066 states to 98066 states and 418629 transitions. [2019-12-07 18:44:37,465 INFO L78 Accepts]: Start accepts. Automaton has 98066 states and 418629 transitions. Word has length 3 [2019-12-07 18:44:37,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:44:37,465 INFO L462 AbstractCegarLoop]: Abstraction has 98066 states and 418629 transitions. [2019-12-07 18:44:37,465 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:44:37,465 INFO L276 IsEmpty]: Start isEmpty. Operand 98066 states and 418629 transitions. [2019-12-07 18:44:37,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:44:37,469 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:44:37,470 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:44:37,470 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:44:37,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:44:37,470 INFO L82 PathProgramCache]: Analyzing trace with hash 1027484309, now seen corresponding path program 1 times [2019-12-07 18:44:37,470 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:44:37,471 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509377494] [2019-12-07 18:44:37,471 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:44:37,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:44:37,536 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:44:37,537 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [509377494] [2019-12-07 18:44:37,537 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:44:37,537 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:44:37,537 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1983737005] [2019-12-07 18:44:37,538 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:44:37,538 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:44:37,538 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:44:37,538 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:44:37,538 INFO L87 Difference]: Start difference. First operand 98066 states and 418629 transitions. Second operand 4 states. [2019-12-07 18:44:38,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:44:38,474 INFO L93 Difference]: Finished difference Result 156656 states and 639635 transitions. [2019-12-07 18:44:38,474 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:44:38,475 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:44:38,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:44:41,006 INFO L225 Difference]: With dead ends: 156656 [2019-12-07 18:44:41,006 INFO L226 Difference]: Without dead ends: 156558 [2019-12-07 18:44:41,006 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:44:45,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156558 states. [2019-12-07 18:44:47,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156558 to 142946. [2019-12-07 18:44:47,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142946 states. [2019-12-07 18:44:47,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142946 states to 142946 states and 591329 transitions. [2019-12-07 18:44:47,696 INFO L78 Accepts]: Start accepts. Automaton has 142946 states and 591329 transitions. Word has length 11 [2019-12-07 18:44:47,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:44:47,696 INFO L462 AbstractCegarLoop]: Abstraction has 142946 states and 591329 transitions. [2019-12-07 18:44:47,696 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:44:47,696 INFO L276 IsEmpty]: Start isEmpty. Operand 142946 states and 591329 transitions. [2019-12-07 18:44:47,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:44:47,703 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:44:47,703 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:44:47,703 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:44:47,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:44:47,703 INFO L82 PathProgramCache]: Analyzing trace with hash 1461043352, now seen corresponding path program 1 times [2019-12-07 18:44:47,703 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:44:47,704 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [283077756] [2019-12-07 18:44:47,704 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:44:47,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:44:47,754 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:44:47,755 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [283077756] [2019-12-07 18:44:47,755 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:44:47,755 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:44:47,755 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625663578] [2019-12-07 18:44:47,755 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:44:47,756 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:44:47,756 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:44:47,756 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:44:47,756 INFO L87 Difference]: Start difference. First operand 142946 states and 591329 transitions. Second operand 4 states. [2019-12-07 18:44:48,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:44:48,744 INFO L93 Difference]: Finished difference Result 205190 states and 828176 transitions. [2019-12-07 18:44:48,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:44:48,745 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:44:48,745 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:44:49,297 INFO L225 Difference]: With dead ends: 205190 [2019-12-07 18:44:49,298 INFO L226 Difference]: Without dead ends: 205078 [2019-12-07 18:44:49,298 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:44:54,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205078 states. [2019-12-07 18:44:58,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205078 to 171310. [2019-12-07 18:44:58,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171310 states. [2019-12-07 18:44:59,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171310 states to 171310 states and 704416 transitions. [2019-12-07 18:44:59,490 INFO L78 Accepts]: Start accepts. Automaton has 171310 states and 704416 transitions. Word has length 13 [2019-12-07 18:44:59,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:44:59,491 INFO L462 AbstractCegarLoop]: Abstraction has 171310 states and 704416 transitions. [2019-12-07 18:44:59,491 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:44:59,491 INFO L276 IsEmpty]: Start isEmpty. Operand 171310 states and 704416 transitions. [2019-12-07 18:44:59,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:44:59,497 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:44:59,497 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:44:59,498 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:44:59,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:44:59,498 INFO L82 PathProgramCache]: Analyzing trace with hash -876468662, now seen corresponding path program 1 times [2019-12-07 18:44:59,498 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:44:59,498 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1466489146] [2019-12-07 18:44:59,498 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:44:59,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:44:59,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:44:59,547 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1466489146] [2019-12-07 18:44:59,548 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:44:59,548 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:44:59,548 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1409550377] [2019-12-07 18:44:59,548 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:44:59,548 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:44:59,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:44:59,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:44:59,548 INFO L87 Difference]: Start difference. First operand 171310 states and 704416 transitions. Second operand 5 states. [2019-12-07 18:45:00,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:00,705 INFO L93 Difference]: Finished difference Result 231848 states and 943034 transitions. [2019-12-07 18:45:00,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:45:00,706 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 18:45:00,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:01,285 INFO L225 Difference]: With dead ends: 231848 [2019-12-07 18:45:01,285 INFO L226 Difference]: Without dead ends: 231848 [2019-12-07 18:45:01,285 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:45:06,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231848 states. [2019-12-07 18:45:11,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231848 to 191437. [2019-12-07 18:45:11,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191437 states. [2019-12-07 18:45:12,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191437 states to 191437 states and 785356 transitions. [2019-12-07 18:45:12,283 INFO L78 Accepts]: Start accepts. Automaton has 191437 states and 785356 transitions. Word has length 16 [2019-12-07 18:45:12,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:12,283 INFO L462 AbstractCegarLoop]: Abstraction has 191437 states and 785356 transitions. [2019-12-07 18:45:12,283 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:45:12,283 INFO L276 IsEmpty]: Start isEmpty. Operand 191437 states and 785356 transitions. [2019-12-07 18:45:12,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:45:12,301 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:12,301 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:12,301 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:12,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:12,302 INFO L82 PathProgramCache]: Analyzing trace with hash -1118041263, now seen corresponding path program 1 times [2019-12-07 18:45:12,302 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:12,302 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532201034] [2019-12-07 18:45:12,302 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:12,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:12,371 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:12,371 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1532201034] [2019-12-07 18:45:12,371 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:12,371 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:45:12,371 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [806182434] [2019-12-07 18:45:12,372 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:45:12,372 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:12,372 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:45:12,372 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:45:12,372 INFO L87 Difference]: Start difference. First operand 191437 states and 785356 transitions. Second operand 3 states. [2019-12-07 18:45:14,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:14,130 INFO L93 Difference]: Finished difference Result 320205 states and 1305877 transitions. [2019-12-07 18:45:14,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:45:14,131 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:45:14,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:14,833 INFO L225 Difference]: With dead ends: 320205 [2019-12-07 18:45:14,833 INFO L226 Difference]: Without dead ends: 285016 [2019-12-07 18:45:14,833 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:45:20,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285016 states. [2019-12-07 18:45:27,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285016 to 272392. [2019-12-07 18:45:27,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 272392 states. [2019-12-07 18:45:28,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 272392 states to 272392 states and 1119276 transitions. [2019-12-07 18:45:28,424 INFO L78 Accepts]: Start accepts. Automaton has 272392 states and 1119276 transitions. Word has length 18 [2019-12-07 18:45:28,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:28,424 INFO L462 AbstractCegarLoop]: Abstraction has 272392 states and 1119276 transitions. [2019-12-07 18:45:28,424 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:45:28,424 INFO L276 IsEmpty]: Start isEmpty. Operand 272392 states and 1119276 transitions. [2019-12-07 18:45:28,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:45:28,443 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:28,443 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:28,444 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:28,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:28,444 INFO L82 PathProgramCache]: Analyzing trace with hash -465864047, now seen corresponding path program 1 times [2019-12-07 18:45:28,444 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:28,444 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1870591333] [2019-12-07 18:45:28,444 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:28,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:28,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:28,484 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1870591333] [2019-12-07 18:45:28,484 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:28,484 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:45:28,484 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1943922820] [2019-12-07 18:45:28,484 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:45:28,485 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:28,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:45:28,485 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:45:28,485 INFO L87 Difference]: Start difference. First operand 272392 states and 1119276 transitions. Second operand 3 states. [2019-12-07 18:45:29,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:29,571 INFO L93 Difference]: Finished difference Result 272392 states and 1107976 transitions. [2019-12-07 18:45:29,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:45:29,571 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 18:45:29,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:30,255 INFO L225 Difference]: With dead ends: 272392 [2019-12-07 18:45:30,255 INFO L226 Difference]: Without dead ends: 272392 [2019-12-07 18:45:30,256 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:45:36,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272392 states. [2019-12-07 18:45:43,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272392 to 269248. [2019-12-07 18:45:43,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 269248 states. [2019-12-07 18:45:44,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269248 states to 269248 states and 1096514 transitions. [2019-12-07 18:45:44,325 INFO L78 Accepts]: Start accepts. Automaton has 269248 states and 1096514 transitions. Word has length 19 [2019-12-07 18:45:44,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:44,325 INFO L462 AbstractCegarLoop]: Abstraction has 269248 states and 1096514 transitions. [2019-12-07 18:45:44,325 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:45:44,325 INFO L276 IsEmpty]: Start isEmpty. Operand 269248 states and 1096514 transitions. [2019-12-07 18:45:44,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:45:44,342 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:44,342 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:44,343 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:44,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:44,343 INFO L82 PathProgramCache]: Analyzing trace with hash 1757364841, now seen corresponding path program 1 times [2019-12-07 18:45:44,343 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:44,343 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [240307500] [2019-12-07 18:45:44,343 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:44,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:44,369 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:44,369 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [240307500] [2019-12-07 18:45:44,370 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:44,370 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:45:44,370 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [98133392] [2019-12-07 18:45:44,370 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:45:44,370 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:44,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:45:44,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:45:44,371 INFO L87 Difference]: Start difference. First operand 269248 states and 1096514 transitions. Second operand 3 states. [2019-12-07 18:45:44,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:44,504 INFO L93 Difference]: Finished difference Result 48228 states and 156282 transitions. [2019-12-07 18:45:44,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:45:44,504 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 18:45:44,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:44,568 INFO L225 Difference]: With dead ends: 48228 [2019-12-07 18:45:44,569 INFO L226 Difference]: Without dead ends: 48228 [2019-12-07 18:45:44,569 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:45:44,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48228 states. [2019-12-07 18:45:45,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48228 to 48228. [2019-12-07 18:45:45,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48228 states. [2019-12-07 18:45:45,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48228 states to 48228 states and 156282 transitions. [2019-12-07 18:45:45,287 INFO L78 Accepts]: Start accepts. Automaton has 48228 states and 156282 transitions. Word has length 19 [2019-12-07 18:45:45,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:45,288 INFO L462 AbstractCegarLoop]: Abstraction has 48228 states and 156282 transitions. [2019-12-07 18:45:45,288 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:45:45,288 INFO L276 IsEmpty]: Start isEmpty. Operand 48228 states and 156282 transitions. [2019-12-07 18:45:45,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:45:45,294 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:45,294 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:45,294 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:45,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:45,295 INFO L82 PathProgramCache]: Analyzing trace with hash -1783143627, now seen corresponding path program 1 times [2019-12-07 18:45:45,295 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:45,295 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1998322595] [2019-12-07 18:45:45,295 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:45,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:45,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:45,334 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1998322595] [2019-12-07 18:45:45,335 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:45,335 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:45:45,335 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1357272240] [2019-12-07 18:45:45,335 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:45:45,335 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:45,335 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:45:45,335 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:45:45,335 INFO L87 Difference]: Start difference. First operand 48228 states and 156282 transitions. Second operand 6 states. [2019-12-07 18:45:46,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:46,348 INFO L93 Difference]: Finished difference Result 70457 states and 222266 transitions. [2019-12-07 18:45:46,349 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:45:46,349 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 18:45:46,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:46,444 INFO L225 Difference]: With dead ends: 70457 [2019-12-07 18:45:46,444 INFO L226 Difference]: Without dead ends: 70443 [2019-12-07 18:45:46,444 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:45:46,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70443 states. [2019-12-07 18:45:47,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70443 to 50158. [2019-12-07 18:45:47,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50158 states. [2019-12-07 18:45:47,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50158 states to 50158 states and 161575 transitions. [2019-12-07 18:45:47,372 INFO L78 Accepts]: Start accepts. Automaton has 50158 states and 161575 transitions. Word has length 22 [2019-12-07 18:45:47,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:47,372 INFO L462 AbstractCegarLoop]: Abstraction has 50158 states and 161575 transitions. [2019-12-07 18:45:47,372 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:45:47,372 INFO L276 IsEmpty]: Start isEmpty. Operand 50158 states and 161575 transitions. [2019-12-07 18:45:47,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:45:47,384 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:47,384 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:47,385 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:47,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:47,385 INFO L82 PathProgramCache]: Analyzing trace with hash 1148876988, now seen corresponding path program 1 times [2019-12-07 18:45:47,385 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:47,385 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1215490744] [2019-12-07 18:45:47,385 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:47,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:47,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:47,442 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1215490744] [2019-12-07 18:45:47,442 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:47,442 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:45:47,442 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [442191897] [2019-12-07 18:45:47,442 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:45:47,442 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:47,442 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:45:47,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:45:47,443 INFO L87 Difference]: Start difference. First operand 50158 states and 161575 transitions. Second operand 5 states. [2019-12-07 18:45:47,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:47,873 INFO L93 Difference]: Finished difference Result 64850 states and 204706 transitions. [2019-12-07 18:45:47,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:45:47,873 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 18:45:47,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:47,964 INFO L225 Difference]: With dead ends: 64850 [2019-12-07 18:45:47,964 INFO L226 Difference]: Without dead ends: 64824 [2019-12-07 18:45:47,965 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:45:48,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64824 states. [2019-12-07 18:45:49,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64824 to 57106. [2019-12-07 18:45:49,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57106 states. [2019-12-07 18:45:49,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57106 states to 57106 states and 182757 transitions. [2019-12-07 18:45:49,116 INFO L78 Accepts]: Start accepts. Automaton has 57106 states and 182757 transitions. Word has length 25 [2019-12-07 18:45:49,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:49,116 INFO L462 AbstractCegarLoop]: Abstraction has 57106 states and 182757 transitions. [2019-12-07 18:45:49,116 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:45:49,116 INFO L276 IsEmpty]: Start isEmpty. Operand 57106 states and 182757 transitions. [2019-12-07 18:45:49,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:45:49,133 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:49,133 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:49,133 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:49,134 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:49,134 INFO L82 PathProgramCache]: Analyzing trace with hash -1026533913, now seen corresponding path program 1 times [2019-12-07 18:45:49,134 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:49,134 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1872687374] [2019-12-07 18:45:49,134 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:49,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:49,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:49,183 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1872687374] [2019-12-07 18:45:49,183 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:49,184 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:45:49,184 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367409888] [2019-12-07 18:45:49,184 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:45:49,184 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:49,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:45:49,185 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:45:49,185 INFO L87 Difference]: Start difference. First operand 57106 states and 182757 transitions. Second operand 6 states. [2019-12-07 18:45:49,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:49,713 INFO L93 Difference]: Finished difference Result 78306 states and 244062 transitions. [2019-12-07 18:45:49,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:45:49,714 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 18:45:49,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:49,820 INFO L225 Difference]: With dead ends: 78306 [2019-12-07 18:45:49,820 INFO L226 Difference]: Without dead ends: 78230 [2019-12-07 18:45:49,821 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:45:50,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78230 states. [2019-12-07 18:45:50,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78230 to 61534. [2019-12-07 18:45:50,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61534 states. [2019-12-07 18:45:50,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61534 states to 61534 states and 195704 transitions. [2019-12-07 18:45:50,904 INFO L78 Accepts]: Start accepts. Automaton has 61534 states and 195704 transitions. Word has length 27 [2019-12-07 18:45:50,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:50,904 INFO L462 AbstractCegarLoop]: Abstraction has 61534 states and 195704 transitions. [2019-12-07 18:45:50,904 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:45:50,904 INFO L276 IsEmpty]: Start isEmpty. Operand 61534 states and 195704 transitions. [2019-12-07 18:45:51,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 18:45:51,044 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:51,044 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:51,044 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:51,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:51,044 INFO L82 PathProgramCache]: Analyzing trace with hash 874122726, now seen corresponding path program 1 times [2019-12-07 18:45:51,044 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:51,044 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [944197319] [2019-12-07 18:45:51,044 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:51,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:51,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:51,073 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [944197319] [2019-12-07 18:45:51,073 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:51,073 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:45:51,073 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1603403845] [2019-12-07 18:45:51,073 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:45:51,074 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:51,074 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:45:51,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:45:51,074 INFO L87 Difference]: Start difference. First operand 61534 states and 195704 transitions. Second operand 4 states. [2019-12-07 18:45:51,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:51,137 INFO L93 Difference]: Finished difference Result 23873 states and 72799 transitions. [2019-12-07 18:45:51,137 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:45:51,137 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 18:45:51,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:51,162 INFO L225 Difference]: With dead ends: 23873 [2019-12-07 18:45:51,163 INFO L226 Difference]: Without dead ends: 23873 [2019-12-07 18:45:51,163 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:45:51,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23873 states. [2019-12-07 18:45:51,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23873 to 22743. [2019-12-07 18:45:51,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22743 states. [2019-12-07 18:45:51,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22743 states to 22743 states and 69534 transitions. [2019-12-07 18:45:51,470 INFO L78 Accepts]: Start accepts. Automaton has 22743 states and 69534 transitions. Word has length 30 [2019-12-07 18:45:51,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:51,471 INFO L462 AbstractCegarLoop]: Abstraction has 22743 states and 69534 transitions. [2019-12-07 18:45:51,471 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:45:51,471 INFO L276 IsEmpty]: Start isEmpty. Operand 22743 states and 69534 transitions. [2019-12-07 18:45:51,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:45:51,487 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:51,487 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:51,487 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:51,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:51,487 INFO L82 PathProgramCache]: Analyzing trace with hash 1079552274, now seen corresponding path program 1 times [2019-12-07 18:45:51,487 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:51,487 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1478699776] [2019-12-07 18:45:51,487 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:51,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:51,535 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:51,535 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1478699776] [2019-12-07 18:45:51,535 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:51,536 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:45:51,536 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [149659025] [2019-12-07 18:45:51,536 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:45:51,536 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:51,536 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:45:51,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:45:51,536 INFO L87 Difference]: Start difference. First operand 22743 states and 69534 transitions. Second operand 7 states. [2019-12-07 18:45:52,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:52,241 INFO L93 Difference]: Finished difference Result 30013 states and 88944 transitions. [2019-12-07 18:45:52,241 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:45:52,241 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 18:45:52,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:52,273 INFO L225 Difference]: With dead ends: 30013 [2019-12-07 18:45:52,274 INFO L226 Difference]: Without dead ends: 30013 [2019-12-07 18:45:52,274 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:45:52,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30013 states. [2019-12-07 18:45:52,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30013 to 22398. [2019-12-07 18:45:52,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22398 states. [2019-12-07 18:45:52,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22398 states to 22398 states and 68308 transitions. [2019-12-07 18:45:52,633 INFO L78 Accepts]: Start accepts. Automaton has 22398 states and 68308 transitions. Word has length 33 [2019-12-07 18:45:52,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:52,633 INFO L462 AbstractCegarLoop]: Abstraction has 22398 states and 68308 transitions. [2019-12-07 18:45:52,634 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:45:52,634 INFO L276 IsEmpty]: Start isEmpty. Operand 22398 states and 68308 transitions. [2019-12-07 18:45:52,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:45:52,652 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:52,653 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:52,653 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:52,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:52,653 INFO L82 PathProgramCache]: Analyzing trace with hash 604372690, now seen corresponding path program 1 times [2019-12-07 18:45:52,653 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:52,653 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513257280] [2019-12-07 18:45:52,653 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:52,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:52,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:52,699 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1513257280] [2019-12-07 18:45:52,699 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:52,699 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:45:52,700 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2069750857] [2019-12-07 18:45:52,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:45:52,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:52,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:45:52,700 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:45:52,701 INFO L87 Difference]: Start difference. First operand 22398 states and 68308 transitions. Second operand 5 states. [2019-12-07 18:45:53,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:53,109 INFO L93 Difference]: Finished difference Result 32220 states and 97454 transitions. [2019-12-07 18:45:53,109 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:45:53,109 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 18:45:53,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:53,145 INFO L225 Difference]: With dead ends: 32220 [2019-12-07 18:45:53,145 INFO L226 Difference]: Without dead ends: 32220 [2019-12-07 18:45:53,145 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:45:53,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32220 states. [2019-12-07 18:45:53,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32220 to 28805. [2019-12-07 18:45:53,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28805 states. [2019-12-07 18:45:53,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28805 states to 28805 states and 87857 transitions. [2019-12-07 18:45:53,591 INFO L78 Accepts]: Start accepts. Automaton has 28805 states and 87857 transitions. Word has length 40 [2019-12-07 18:45:53,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:53,591 INFO L462 AbstractCegarLoop]: Abstraction has 28805 states and 87857 transitions. [2019-12-07 18:45:53,591 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:45:53,591 INFO L276 IsEmpty]: Start isEmpty. Operand 28805 states and 87857 transitions. [2019-12-07 18:45:53,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:45:53,619 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:53,619 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:53,619 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:53,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:53,619 INFO L82 PathProgramCache]: Analyzing trace with hash 182198820, now seen corresponding path program 2 times [2019-12-07 18:45:53,620 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:53,620 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1989801328] [2019-12-07 18:45:53,620 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:53,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:53,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:53,657 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1989801328] [2019-12-07 18:45:53,657 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:53,657 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:45:53,657 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1001203939] [2019-12-07 18:45:53,657 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:45:53,657 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:53,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:45:53,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:45:53,658 INFO L87 Difference]: Start difference. First operand 28805 states and 87857 transitions. Second operand 5 states. [2019-12-07 18:45:53,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:53,771 INFO L93 Difference]: Finished difference Result 26892 states and 83595 transitions. [2019-12-07 18:45:53,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:45:53,771 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 18:45:53,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:53,801 INFO L225 Difference]: With dead ends: 26892 [2019-12-07 18:45:53,801 INFO L226 Difference]: Without dead ends: 26373 [2019-12-07 18:45:53,801 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:45:53,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26373 states. [2019-12-07 18:45:54,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26373 to 16852. [2019-12-07 18:45:54,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16852 states. [2019-12-07 18:45:54,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16852 states to 16852 states and 52093 transitions. [2019-12-07 18:45:54,080 INFO L78 Accepts]: Start accepts. Automaton has 16852 states and 52093 transitions. Word has length 40 [2019-12-07 18:45:54,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:54,080 INFO L462 AbstractCegarLoop]: Abstraction has 16852 states and 52093 transitions. [2019-12-07 18:45:54,080 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:45:54,080 INFO L276 IsEmpty]: Start isEmpty. Operand 16852 states and 52093 transitions. [2019-12-07 18:45:54,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:45:54,094 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:54,094 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:54,094 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:54,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:54,094 INFO L82 PathProgramCache]: Analyzing trace with hash 1377048711, now seen corresponding path program 1 times [2019-12-07 18:45:54,094 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:54,095 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1246841891] [2019-12-07 18:45:54,095 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:54,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:54,122 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:54,122 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1246841891] [2019-12-07 18:45:54,122 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:54,122 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:45:54,122 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1027323778] [2019-12-07 18:45:54,123 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:45:54,123 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:54,123 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:45:54,123 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:45:54,123 INFO L87 Difference]: Start difference. First operand 16852 states and 52093 transitions. Second operand 3 states. [2019-12-07 18:45:54,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:54,226 INFO L93 Difference]: Finished difference Result 24037 states and 74741 transitions. [2019-12-07 18:45:54,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:45:54,227 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:45:54,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:54,255 INFO L225 Difference]: With dead ends: 24037 [2019-12-07 18:45:54,256 INFO L226 Difference]: Without dead ends: 24037 [2019-12-07 18:45:54,256 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:45:54,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24037 states. [2019-12-07 18:45:54,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24037 to 19203. [2019-12-07 18:45:54,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19203 states. [2019-12-07 18:45:54,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19203 states to 19203 states and 60216 transitions. [2019-12-07 18:45:54,563 INFO L78 Accepts]: Start accepts. Automaton has 19203 states and 60216 transitions. Word has length 65 [2019-12-07 18:45:54,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:54,564 INFO L462 AbstractCegarLoop]: Abstraction has 19203 states and 60216 transitions. [2019-12-07 18:45:54,564 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:45:54,564 INFO L276 IsEmpty]: Start isEmpty. Operand 19203 states and 60216 transitions. [2019-12-07 18:45:54,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:45:54,579 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:54,579 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:54,579 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:54,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:54,579 INFO L82 PathProgramCache]: Analyzing trace with hash -1425637935, now seen corresponding path program 1 times [2019-12-07 18:45:54,580 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:54,580 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [198399634] [2019-12-07 18:45:54,580 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:54,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:54,646 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:54,647 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [198399634] [2019-12-07 18:45:54,647 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:54,647 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:45:54,647 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1248302749] [2019-12-07 18:45:54,647 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:45:54,648 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:54,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:45:54,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:45:54,648 INFO L87 Difference]: Start difference. First operand 19203 states and 60216 transitions. Second operand 7 states. [2019-12-07 18:45:55,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:55,284 INFO L93 Difference]: Finished difference Result 28325 states and 86692 transitions. [2019-12-07 18:45:55,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 18:45:55,284 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 18:45:55,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:55,315 INFO L225 Difference]: With dead ends: 28325 [2019-12-07 18:45:55,315 INFO L226 Difference]: Without dead ends: 28325 [2019-12-07 18:45:55,316 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:45:55,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28325 states. [2019-12-07 18:45:55,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28325 to 19569. [2019-12-07 18:45:55,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19569 states. [2019-12-07 18:45:55,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19569 states to 19569 states and 61385 transitions. [2019-12-07 18:45:55,647 INFO L78 Accepts]: Start accepts. Automaton has 19569 states and 61385 transitions. Word has length 65 [2019-12-07 18:45:55,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:55,647 INFO L462 AbstractCegarLoop]: Abstraction has 19569 states and 61385 transitions. [2019-12-07 18:45:55,647 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:45:55,647 INFO L276 IsEmpty]: Start isEmpty. Operand 19569 states and 61385 transitions. [2019-12-07 18:45:55,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:45:55,663 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:55,663 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:55,663 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:55,663 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:55,663 INFO L82 PathProgramCache]: Analyzing trace with hash 1671826221, now seen corresponding path program 2 times [2019-12-07 18:45:55,663 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:55,664 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [170313409] [2019-12-07 18:45:55,664 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:55,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:55,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:55,699 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [170313409] [2019-12-07 18:45:55,699 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:55,699 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:45:55,699 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1614118897] [2019-12-07 18:45:55,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:45:55,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:55,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:45:55,700 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:45:55,700 INFO L87 Difference]: Start difference. First operand 19569 states and 61385 transitions. Second operand 3 states. [2019-12-07 18:45:55,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:55,800 INFO L93 Difference]: Finished difference Result 23404 states and 73132 transitions. [2019-12-07 18:45:55,801 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:45:55,801 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:45:55,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:55,828 INFO L225 Difference]: With dead ends: 23404 [2019-12-07 18:45:55,828 INFO L226 Difference]: Without dead ends: 23404 [2019-12-07 18:45:55,828 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:45:55,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23404 states. [2019-12-07 18:45:56,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23404 to 19838. [2019-12-07 18:45:56,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19838 states. [2019-12-07 18:45:56,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19838 states to 19838 states and 62400 transitions. [2019-12-07 18:45:56,150 INFO L78 Accepts]: Start accepts. Automaton has 19838 states and 62400 transitions. Word has length 65 [2019-12-07 18:45:56,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:56,150 INFO L462 AbstractCegarLoop]: Abstraction has 19838 states and 62400 transitions. [2019-12-07 18:45:56,150 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:45:56,150 INFO L276 IsEmpty]: Start isEmpty. Operand 19838 states and 62400 transitions. [2019-12-07 18:45:56,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:45:56,166 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:56,166 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:56,166 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:56,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:56,166 INFO L82 PathProgramCache]: Analyzing trace with hash 170170947, now seen corresponding path program 1 times [2019-12-07 18:45:56,166 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:56,167 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2111979525] [2019-12-07 18:45:56,167 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:56,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:56,278 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:56,278 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2111979525] [2019-12-07 18:45:56,278 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:56,278 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:45:56,278 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1178137691] [2019-12-07 18:45:56,279 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:45:56,279 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:56,279 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:45:56,279 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:45:56,279 INFO L87 Difference]: Start difference. First operand 19838 states and 62400 transitions. Second operand 8 states. [2019-12-07 18:45:58,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:58,044 INFO L93 Difference]: Finished difference Result 28427 states and 86766 transitions. [2019-12-07 18:45:58,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 18:45:58,044 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 18:45:58,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:58,075 INFO L225 Difference]: With dead ends: 28427 [2019-12-07 18:45:58,076 INFO L226 Difference]: Without dead ends: 28427 [2019-12-07 18:45:58,076 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 104 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=100, Invalid=406, Unknown=0, NotChecked=0, Total=506 [2019-12-07 18:45:58,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28427 states. [2019-12-07 18:45:58,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28427 to 19742. [2019-12-07 18:45:58,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19742 states. [2019-12-07 18:45:58,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19742 states to 19742 states and 62116 transitions. [2019-12-07 18:45:58,432 INFO L78 Accepts]: Start accepts. Automaton has 19742 states and 62116 transitions. Word has length 66 [2019-12-07 18:45:58,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:58,432 INFO L462 AbstractCegarLoop]: Abstraction has 19742 states and 62116 transitions. [2019-12-07 18:45:58,432 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:45:58,432 INFO L276 IsEmpty]: Start isEmpty. Operand 19742 states and 62116 transitions. [2019-12-07 18:45:58,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:45:58,455 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:58,456 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:58,456 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:58,456 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:58,456 INFO L82 PathProgramCache]: Analyzing trace with hash -1986173238, now seen corresponding path program 1 times [2019-12-07 18:45:58,456 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:58,456 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [341802321] [2019-12-07 18:45:58,456 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:58,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:58,489 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:58,489 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [341802321] [2019-12-07 18:45:58,489 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:58,489 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:45:58,489 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [399710012] [2019-12-07 18:45:58,489 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:45:58,489 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:58,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:45:58,490 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:45:58,490 INFO L87 Difference]: Start difference. First operand 19742 states and 62116 transitions. Second operand 4 states. [2019-12-07 18:45:58,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:58,731 INFO L93 Difference]: Finished difference Result 31636 states and 100339 transitions. [2019-12-07 18:45:58,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:45:58,732 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 18:45:58,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:58,772 INFO L225 Difference]: With dead ends: 31636 [2019-12-07 18:45:58,772 INFO L226 Difference]: Without dead ends: 31636 [2019-12-07 18:45:58,772 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:45:58,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31636 states. [2019-12-07 18:45:59,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31636 to 21205. [2019-12-07 18:45:59,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21205 states. [2019-12-07 18:45:59,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21205 states to 21205 states and 67398 transitions. [2019-12-07 18:45:59,169 INFO L78 Accepts]: Start accepts. Automaton has 21205 states and 67398 transitions. Word has length 66 [2019-12-07 18:45:59,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:59,170 INFO L462 AbstractCegarLoop]: Abstraction has 21205 states and 67398 transitions. [2019-12-07 18:45:59,170 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:45:59,170 INFO L276 IsEmpty]: Start isEmpty. Operand 21205 states and 67398 transitions. [2019-12-07 18:45:59,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:45:59,187 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:59,188 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:59,188 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:59,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:59,188 INFO L82 PathProgramCache]: Analyzing trace with hash 741391161, now seen corresponding path program 1 times [2019-12-07 18:45:59,188 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:59,188 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1600244004] [2019-12-07 18:45:59,188 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:59,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:59,222 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:59,222 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1600244004] [2019-12-07 18:45:59,222 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:59,222 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:45:59,223 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1317826460] [2019-12-07 18:45:59,223 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:45:59,223 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:59,223 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:45:59,223 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:45:59,223 INFO L87 Difference]: Start difference. First operand 21205 states and 67398 transitions. Second operand 4 states. [2019-12-07 18:45:59,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:59,314 INFO L93 Difference]: Finished difference Result 21205 states and 67187 transitions. [2019-12-07 18:45:59,314 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:45:59,314 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 18:45:59,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:59,338 INFO L225 Difference]: With dead ends: 21205 [2019-12-07 18:45:59,338 INFO L226 Difference]: Without dead ends: 21205 [2019-12-07 18:45:59,338 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:45:59,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21205 states. [2019-12-07 18:45:59,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21205 to 18078. [2019-12-07 18:45:59,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18078 states. [2019-12-07 18:45:59,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18078 states to 18078 states and 56685 transitions. [2019-12-07 18:45:59,618 INFO L78 Accepts]: Start accepts. Automaton has 18078 states and 56685 transitions. Word has length 66 [2019-12-07 18:45:59,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:59,618 INFO L462 AbstractCegarLoop]: Abstraction has 18078 states and 56685 transitions. [2019-12-07 18:45:59,618 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:45:59,618 INFO L276 IsEmpty]: Start isEmpty. Operand 18078 states and 56685 transitions. [2019-12-07 18:45:59,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:45:59,633 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:59,633 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:59,633 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:59,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:59,633 INFO L82 PathProgramCache]: Analyzing trace with hash 1702279271, now seen corresponding path program 2 times [2019-12-07 18:45:59,634 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:59,634 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1165804053] [2019-12-07 18:45:59,634 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:59,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:59,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:59,707 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1165804053] [2019-12-07 18:45:59,707 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:59,707 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:45:59,707 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1990014015] [2019-12-07 18:45:59,708 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:45:59,708 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:59,708 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:45:59,708 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:45:59,708 INFO L87 Difference]: Start difference. First operand 18078 states and 56685 transitions. Second operand 8 states. [2019-12-07 18:46:00,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:00,221 INFO L93 Difference]: Finished difference Result 77316 states and 242177 transitions. [2019-12-07 18:46:00,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 18:46:00,222 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 18:46:00,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:00,290 INFO L225 Difference]: With dead ends: 77316 [2019-12-07 18:46:00,291 INFO L226 Difference]: Without dead ends: 55734 [2019-12-07 18:46:00,291 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=105, Invalid=357, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:46:00,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55734 states. [2019-12-07 18:46:00,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55734 to 21382. [2019-12-07 18:46:00,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21382 states. [2019-12-07 18:46:00,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21382 states to 21382 states and 66975 transitions. [2019-12-07 18:46:00,827 INFO L78 Accepts]: Start accepts. Automaton has 21382 states and 66975 transitions. Word has length 66 [2019-12-07 18:46:00,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:00,827 INFO L462 AbstractCegarLoop]: Abstraction has 21382 states and 66975 transitions. [2019-12-07 18:46:00,827 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:46:00,827 INFO L276 IsEmpty]: Start isEmpty. Operand 21382 states and 66975 transitions. [2019-12-07 18:46:00,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:46:00,845 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:00,845 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:00,846 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:00,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:00,846 INFO L82 PathProgramCache]: Analyzing trace with hash -383251357, now seen corresponding path program 3 times [2019-12-07 18:46:00,846 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:00,846 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2022374673] [2019-12-07 18:46:00,846 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:00,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:00,910 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:00,910 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2022374673] [2019-12-07 18:46:00,911 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:00,911 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:46:00,911 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [402115834] [2019-12-07 18:46:00,911 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:46:00,911 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:00,911 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:46:00,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:46:00,911 INFO L87 Difference]: Start difference. First operand 21382 states and 66975 transitions. Second operand 7 states. [2019-12-07 18:46:01,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:01,433 INFO L93 Difference]: Finished difference Result 92609 states and 291357 transitions. [2019-12-07 18:46:01,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:46:01,433 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 18:46:01,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:01,520 INFO L225 Difference]: With dead ends: 92609 [2019-12-07 18:46:01,520 INFO L226 Difference]: Without dead ends: 70340 [2019-12-07 18:46:01,520 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=98, Invalid=282, Unknown=0, NotChecked=0, Total=380 [2019-12-07 18:46:01,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70340 states. [2019-12-07 18:46:02,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70340 to 25908. [2019-12-07 18:46:02,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25908 states. [2019-12-07 18:46:02,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25908 states to 25908 states and 81864 transitions. [2019-12-07 18:46:02,210 INFO L78 Accepts]: Start accepts. Automaton has 25908 states and 81864 transitions. Word has length 66 [2019-12-07 18:46:02,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:02,210 INFO L462 AbstractCegarLoop]: Abstraction has 25908 states and 81864 transitions. [2019-12-07 18:46:02,210 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:46:02,210 INFO L276 IsEmpty]: Start isEmpty. Operand 25908 states and 81864 transitions. [2019-12-07 18:46:02,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:46:02,237 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:02,237 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:02,237 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:02,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:02,237 INFO L82 PathProgramCache]: Analyzing trace with hash 1057449595, now seen corresponding path program 4 times [2019-12-07 18:46:02,237 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:02,238 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [121173276] [2019-12-07 18:46:02,238 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:02,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:02,285 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:02,285 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [121173276] [2019-12-07 18:46:02,285 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:02,285 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:46:02,285 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [878078647] [2019-12-07 18:46:02,285 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:46:02,286 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:02,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:46:02,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:02,286 INFO L87 Difference]: Start difference. First operand 25908 states and 81864 transitions. Second operand 4 states. [2019-12-07 18:46:02,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:02,476 INFO L93 Difference]: Finished difference Result 47828 states and 151491 transitions. [2019-12-07 18:46:02,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:46:02,476 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 18:46:02,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:02,501 INFO L225 Difference]: With dead ends: 47828 [2019-12-07 18:46:02,501 INFO L226 Difference]: Without dead ends: 23380 [2019-12-07 18:46:02,502 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:02,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23380 states. [2019-12-07 18:46:02,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23380 to 23380. [2019-12-07 18:46:02,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23380 states. [2019-12-07 18:46:02,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23380 states to 23380 states and 73759 transitions. [2019-12-07 18:46:02,824 INFO L78 Accepts]: Start accepts. Automaton has 23380 states and 73759 transitions. Word has length 66 [2019-12-07 18:46:02,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:02,824 INFO L462 AbstractCegarLoop]: Abstraction has 23380 states and 73759 transitions. [2019-12-07 18:46:02,824 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:46:02,824 INFO L276 IsEmpty]: Start isEmpty. Operand 23380 states and 73759 transitions. [2019-12-07 18:46:02,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:46:02,845 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:02,845 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:02,845 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:02,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:02,845 INFO L82 PathProgramCache]: Analyzing trace with hash -10630351, now seen corresponding path program 5 times [2019-12-07 18:46:02,845 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:02,846 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1123537390] [2019-12-07 18:46:02,846 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:02,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:02,903 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:02,903 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1123537390] [2019-12-07 18:46:02,903 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:02,903 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:46:02,904 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1152244556] [2019-12-07 18:46:02,904 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:46:02,904 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:02,904 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:46:02,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:46:02,904 INFO L87 Difference]: Start difference. First operand 23380 states and 73759 transitions. Second operand 7 states. [2019-12-07 18:46:03,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:03,183 INFO L93 Difference]: Finished difference Result 47695 states and 148119 transitions. [2019-12-07 18:46:03,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:46:03,183 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 18:46:03,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:03,230 INFO L225 Difference]: With dead ends: 47695 [2019-12-07 18:46:03,230 INFO L226 Difference]: Without dead ends: 41108 [2019-12-07 18:46:03,230 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:46:03,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41108 states. [2019-12-07 18:46:03,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41108 to 23688. [2019-12-07 18:46:03,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23688 states. [2019-12-07 18:46:03,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23688 states to 23688 states and 74710 transitions. [2019-12-07 18:46:03,689 INFO L78 Accepts]: Start accepts. Automaton has 23688 states and 74710 transitions. Word has length 66 [2019-12-07 18:46:03,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:03,690 INFO L462 AbstractCegarLoop]: Abstraction has 23688 states and 74710 transitions. [2019-12-07 18:46:03,690 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:46:03,690 INFO L276 IsEmpty]: Start isEmpty. Operand 23688 states and 74710 transitions. [2019-12-07 18:46:03,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:46:03,709 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:03,710 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:03,710 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:03,710 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:03,710 INFO L82 PathProgramCache]: Analyzing trace with hash 1560089001, now seen corresponding path program 6 times [2019-12-07 18:46:03,710 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:03,710 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2070559854] [2019-12-07 18:46:03,710 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:03,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:03,859 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:03,859 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2070559854] [2019-12-07 18:46:03,859 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:03,859 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 18:46:03,859 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1698020858] [2019-12-07 18:46:03,860 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:46:03,860 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:03,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:46:03,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:46:03,860 INFO L87 Difference]: Start difference. First operand 23688 states and 74710 transitions. Second operand 12 states. [2019-12-07 18:46:05,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:05,003 INFO L93 Difference]: Finished difference Result 44025 states and 135694 transitions. [2019-12-07 18:46:05,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 18:46:05,004 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 18:46:05,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:05,055 INFO L225 Difference]: With dead ends: 44025 [2019-12-07 18:46:05,055 INFO L226 Difference]: Without dead ends: 43920 [2019-12-07 18:46:05,055 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=129, Invalid=471, Unknown=0, NotChecked=0, Total=600 [2019-12-07 18:46:05,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43920 states. [2019-12-07 18:46:05,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43920 to 27707. [2019-12-07 18:46:05,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27707 states. [2019-12-07 18:46:05,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27707 states to 27707 states and 87481 transitions. [2019-12-07 18:46:05,609 INFO L78 Accepts]: Start accepts. Automaton has 27707 states and 87481 transitions. Word has length 66 [2019-12-07 18:46:05,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:05,609 INFO L462 AbstractCegarLoop]: Abstraction has 27707 states and 87481 transitions. [2019-12-07 18:46:05,609 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:46:05,609 INFO L276 IsEmpty]: Start isEmpty. Operand 27707 states and 87481 transitions. [2019-12-07 18:46:05,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:46:05,637 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:05,637 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:05,637 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:05,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:05,637 INFO L82 PathProgramCache]: Analyzing trace with hash -353775189, now seen corresponding path program 7 times [2019-12-07 18:46:05,637 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:05,638 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [206566478] [2019-12-07 18:46:05,638 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:05,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:05,672 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:05,673 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [206566478] [2019-12-07 18:46:05,673 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:05,673 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:05,673 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [762773875] [2019-12-07 18:46:05,673 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:46:05,673 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:05,673 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:46:05,673 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:05,674 INFO L87 Difference]: Start difference. First operand 27707 states and 87481 transitions. Second operand 3 states. [2019-12-07 18:46:05,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:05,730 INFO L93 Difference]: Finished difference Result 23458 states and 72783 transitions. [2019-12-07 18:46:05,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:46:05,730 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:46:05,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:05,754 INFO L225 Difference]: With dead ends: 23458 [2019-12-07 18:46:05,755 INFO L226 Difference]: Without dead ends: 23458 [2019-12-07 18:46:05,755 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:05,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23458 states. [2019-12-07 18:46:06,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23458 to 22485. [2019-12-07 18:46:06,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22485 states. [2019-12-07 18:46:06,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22485 states to 22485 states and 69651 transitions. [2019-12-07 18:46:06,059 INFO L78 Accepts]: Start accepts. Automaton has 22485 states and 69651 transitions. Word has length 66 [2019-12-07 18:46:06,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:06,059 INFO L462 AbstractCegarLoop]: Abstraction has 22485 states and 69651 transitions. [2019-12-07 18:46:06,059 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:46:06,059 INFO L276 IsEmpty]: Start isEmpty. Operand 22485 states and 69651 transitions. [2019-12-07 18:46:06,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:46:06,078 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:06,078 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:06,079 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:06,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:06,079 INFO L82 PathProgramCache]: Analyzing trace with hash -2007326845, now seen corresponding path program 1 times [2019-12-07 18:46:06,079 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:06,079 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005743185] [2019-12-07 18:46:06,079 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:06,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:06,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:06,393 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1005743185] [2019-12-07 18:46:06,393 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:06,393 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:46:06,394 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2026476930] [2019-12-07 18:46:06,394 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:46:06,394 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:06,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:46:06,394 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=195, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:46:06,394 INFO L87 Difference]: Start difference. First operand 22485 states and 69651 transitions. Second operand 16 states. [2019-12-07 18:46:15,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:15,400 INFO L93 Difference]: Finished difference Result 55731 states and 169866 transitions. [2019-12-07 18:46:15,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 85 states. [2019-12-07 18:46:15,401 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 18:46:15,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:15,453 INFO L225 Difference]: With dead ends: 55731 [2019-12-07 18:46:15,453 INFO L226 Difference]: Without dead ends: 47184 [2019-12-07 18:46:15,455 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2588 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=1262, Invalid=6048, Unknown=0, NotChecked=0, Total=7310 [2019-12-07 18:46:15,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47184 states. [2019-12-07 18:46:15,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47184 to 23414. [2019-12-07 18:46:15,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23414 states. [2019-12-07 18:46:15,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23414 states to 23414 states and 72084 transitions. [2019-12-07 18:46:15,909 INFO L78 Accepts]: Start accepts. Automaton has 23414 states and 72084 transitions. Word has length 67 [2019-12-07 18:46:15,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:15,909 INFO L462 AbstractCegarLoop]: Abstraction has 23414 states and 72084 transitions. [2019-12-07 18:46:15,909 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:46:15,909 INFO L276 IsEmpty]: Start isEmpty. Operand 23414 states and 72084 transitions. [2019-12-07 18:46:15,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:46:15,928 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:15,928 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:15,928 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:15,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:15,929 INFO L82 PathProgramCache]: Analyzing trace with hash -1473001563, now seen corresponding path program 2 times [2019-12-07 18:46:15,929 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:15,929 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1969933791] [2019-12-07 18:46:15,929 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:15,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:16,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:16,276 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1969933791] [2019-12-07 18:46:16,276 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:16,276 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:46:16,277 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1676974161] [2019-12-07 18:46:16,277 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:46:16,277 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:16,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:46:16,277 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:46:16,277 INFO L87 Difference]: Start difference. First operand 23414 states and 72084 transitions. Second operand 16 states. [2019-12-07 18:46:22,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:22,359 INFO L93 Difference]: Finished difference Result 50727 states and 153779 transitions. [2019-12-07 18:46:22,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 87 states. [2019-12-07 18:46:22,360 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 18:46:22,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:22,429 INFO L225 Difference]: With dead ends: 50727 [2019-12-07 18:46:22,430 INFO L226 Difference]: Without dead ends: 46824 [2019-12-07 18:46:22,432 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 87 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2817 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=1260, Invalid=6572, Unknown=0, NotChecked=0, Total=7832 [2019-12-07 18:46:22,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46824 states. [2019-12-07 18:46:22,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46824 to 23294. [2019-12-07 18:46:22,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23294 states. [2019-12-07 18:46:22,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23294 states to 23294 states and 71756 transitions. [2019-12-07 18:46:22,890 INFO L78 Accepts]: Start accepts. Automaton has 23294 states and 71756 transitions. Word has length 67 [2019-12-07 18:46:22,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:22,890 INFO L462 AbstractCegarLoop]: Abstraction has 23294 states and 71756 transitions. [2019-12-07 18:46:22,890 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:46:22,890 INFO L276 IsEmpty]: Start isEmpty. Operand 23294 states and 71756 transitions. [2019-12-07 18:46:22,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:46:22,911 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:22,911 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:22,911 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:22,911 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:22,911 INFO L82 PathProgramCache]: Analyzing trace with hash -1816499453, now seen corresponding path program 3 times [2019-12-07 18:46:22,911 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:22,911 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [718895977] [2019-12-07 18:46:22,911 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:22,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:23,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:23,252 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [718895977] [2019-12-07 18:46:23,252 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:23,252 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:46:23,253 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [497919167] [2019-12-07 18:46:23,253 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:46:23,253 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:23,253 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:46:23,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:46:23,253 INFO L87 Difference]: Start difference. First operand 23294 states and 71756 transitions. Second operand 16 states. [2019-12-07 18:46:25,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:25,909 INFO L93 Difference]: Finished difference Result 60975 states and 186517 transitions. [2019-12-07 18:46:25,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2019-12-07 18:46:25,910 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 18:46:25,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:25,983 INFO L225 Difference]: With dead ends: 60975 [2019-12-07 18:46:25,984 INFO L226 Difference]: Without dead ends: 58823 [2019-12-07 18:46:25,985 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 681 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=391, Invalid=2261, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 18:46:26,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58823 states. [2019-12-07 18:46:26,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58823 to 26513. [2019-12-07 18:46:26,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26513 states. [2019-12-07 18:46:26,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26513 states to 26513 states and 81482 transitions. [2019-12-07 18:46:26,582 INFO L78 Accepts]: Start accepts. Automaton has 26513 states and 81482 transitions. Word has length 67 [2019-12-07 18:46:26,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:26,583 INFO L462 AbstractCegarLoop]: Abstraction has 26513 states and 81482 transitions. [2019-12-07 18:46:26,583 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:46:26,583 INFO L276 IsEmpty]: Start isEmpty. Operand 26513 states and 81482 transitions. [2019-12-07 18:46:26,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:46:26,609 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:26,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:26,609 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:26,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:26,609 INFO L82 PathProgramCache]: Analyzing trace with hash 1315765029, now seen corresponding path program 4 times [2019-12-07 18:46:26,609 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:26,609 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2030696985] [2019-12-07 18:46:26,610 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:26,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:26,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:26,926 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2030696985] [2019-12-07 18:46:26,926 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:26,926 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:46:26,927 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [852541305] [2019-12-07 18:46:26,927 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:46:26,927 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:26,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:46:26,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:46:26,927 INFO L87 Difference]: Start difference. First operand 26513 states and 81482 transitions. Second operand 16 states. [2019-12-07 18:46:29,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:29,630 INFO L93 Difference]: Finished difference Result 58924 states and 180120 transitions. [2019-12-07 18:46:29,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2019-12-07 18:46:29,630 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 18:46:29,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:29,700 INFO L225 Difference]: With dead ends: 58924 [2019-12-07 18:46:29,700 INFO L226 Difference]: Without dead ends: 58657 [2019-12-07 18:46:29,701 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 757 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=389, Invalid=2473, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 18:46:29,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58657 states. [2019-12-07 18:46:30,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58657 to 26513. [2019-12-07 18:46:30,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26513 states. [2019-12-07 18:46:30,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26513 states to 26513 states and 81280 transitions. [2019-12-07 18:46:30,273 INFO L78 Accepts]: Start accepts. Automaton has 26513 states and 81280 transitions. Word has length 67 [2019-12-07 18:46:30,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:30,273 INFO L462 AbstractCegarLoop]: Abstraction has 26513 states and 81280 transitions. [2019-12-07 18:46:30,273 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:46:30,273 INFO L276 IsEmpty]: Start isEmpty. Operand 26513 states and 81280 transitions. [2019-12-07 18:46:30,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:46:30,299 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:30,299 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:30,299 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:30,299 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:30,299 INFO L82 PathProgramCache]: Analyzing trace with hash -662102210, now seen corresponding path program 1 times [2019-12-07 18:46:30,299 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:30,300 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1786957666] [2019-12-07 18:46:30,300 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:30,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:30,394 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:30,394 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1786957666] [2019-12-07 18:46:30,394 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:30,394 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:46:30,394 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1603156580] [2019-12-07 18:46:30,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:46:30,395 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:30,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:46:30,395 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:30,395 INFO L87 Difference]: Start difference. First operand 26513 states and 81280 transitions. Second operand 3 states. [2019-12-07 18:46:30,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:30,488 INFO L93 Difference]: Finished difference Result 28842 states and 84097 transitions. [2019-12-07 18:46:30,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:46:30,489 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 18:46:30,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:30,520 INFO L225 Difference]: With dead ends: 28842 [2019-12-07 18:46:30,520 INFO L226 Difference]: Without dead ends: 28842 [2019-12-07 18:46:30,520 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:30,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28842 states. [2019-12-07 18:46:30,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28842 to 19394. [2019-12-07 18:46:30,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19394 states. [2019-12-07 18:46:30,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19394 states to 19394 states and 57386 transitions. [2019-12-07 18:46:30,837 INFO L78 Accepts]: Start accepts. Automaton has 19394 states and 57386 transitions. Word has length 67 [2019-12-07 18:46:30,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:30,837 INFO L462 AbstractCegarLoop]: Abstraction has 19394 states and 57386 transitions. [2019-12-07 18:46:30,837 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:46:30,837 INFO L276 IsEmpty]: Start isEmpty. Operand 19394 states and 57386 transitions. [2019-12-07 18:46:30,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:46:30,852 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:30,852 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:30,852 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:30,852 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:30,853 INFO L82 PathProgramCache]: Analyzing trace with hash -191274429, now seen corresponding path program 5 times [2019-12-07 18:46:30,853 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:30,853 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [679776149] [2019-12-07 18:46:30,853 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:30,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:31,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:31,154 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [679776149] [2019-12-07 18:46:31,154 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:31,154 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:46:31,154 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1535438416] [2019-12-07 18:46:31,154 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:46:31,154 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:31,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:46:31,155 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:46:31,155 INFO L87 Difference]: Start difference. First operand 19394 states and 57386 transitions. Second operand 16 states. [2019-12-07 18:46:35,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:35,981 INFO L93 Difference]: Finished difference Result 44786 states and 131194 transitions. [2019-12-07 18:46:35,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2019-12-07 18:46:35,982 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 18:46:35,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:36,037 INFO L225 Difference]: With dead ends: 44786 [2019-12-07 18:46:36,038 INFO L226 Difference]: Without dead ends: 39889 [2019-12-07 18:46:36,039 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 765 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=394, Invalid=2468, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 18:46:36,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39889 states. [2019-12-07 18:46:36,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39889 to 17313. [2019-12-07 18:46:36,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17313 states. [2019-12-07 18:46:36,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17313 states to 17313 states and 51386 transitions. [2019-12-07 18:46:36,410 INFO L78 Accepts]: Start accepts. Automaton has 17313 states and 51386 transitions. Word has length 67 [2019-12-07 18:46:36,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:36,410 INFO L462 AbstractCegarLoop]: Abstraction has 17313 states and 51386 transitions. [2019-12-07 18:46:36,410 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:46:36,411 INFO L276 IsEmpty]: Start isEmpty. Operand 17313 states and 51386 transitions. [2019-12-07 18:46:36,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:46:36,425 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:36,425 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:36,425 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:36,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:36,425 INFO L82 PathProgramCache]: Analyzing trace with hash 1885964539, now seen corresponding path program 6 times [2019-12-07 18:46:36,425 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:36,426 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [530420249] [2019-12-07 18:46:36,426 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:36,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:36,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:36,562 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [530420249] [2019-12-07 18:46:36,562 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:36,562 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:46:36,562 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [26676177] [2019-12-07 18:46:36,562 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:46:36,562 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:36,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:46:36,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:46:36,563 INFO L87 Difference]: Start difference. First operand 17313 states and 51386 transitions. Second operand 11 states. [2019-12-07 18:46:38,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:38,691 INFO L93 Difference]: Finished difference Result 50585 states and 150096 transitions. [2019-12-07 18:46:38,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 18:46:38,691 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:46:38,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:38,745 INFO L225 Difference]: With dead ends: 50585 [2019-12-07 18:46:38,745 INFO L226 Difference]: Without dead ends: 48670 [2019-12-07 18:46:38,745 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 505 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=364, Invalid=1442, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 18:46:38,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48670 states. [2019-12-07 18:46:39,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48670 to 21450. [2019-12-07 18:46:39,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21450 states. [2019-12-07 18:46:39,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21450 states to 21450 states and 63684 transitions. [2019-12-07 18:46:39,212 INFO L78 Accepts]: Start accepts. Automaton has 21450 states and 63684 transitions. Word has length 67 [2019-12-07 18:46:39,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:39,212 INFO L462 AbstractCegarLoop]: Abstraction has 21450 states and 63684 transitions. [2019-12-07 18:46:39,213 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:46:39,213 INFO L276 IsEmpty]: Start isEmpty. Operand 21450 states and 63684 transitions. [2019-12-07 18:46:39,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:46:39,231 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:39,231 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:39,231 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:39,232 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:39,232 INFO L82 PathProgramCache]: Analyzing trace with hash 723261725, now seen corresponding path program 7 times [2019-12-07 18:46:39,232 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:39,232 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2009659199] [2019-12-07 18:46:39,232 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:39,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:39,362 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:39,362 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2009659199] [2019-12-07 18:46:39,362 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:39,362 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:46:39,362 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [776815270] [2019-12-07 18:46:39,362 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:46:39,362 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:39,362 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:46:39,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:46:39,363 INFO L87 Difference]: Start difference. First operand 21450 states and 63684 transitions. Second operand 11 states. [2019-12-07 18:46:41,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:41,357 INFO L93 Difference]: Finished difference Result 48748 states and 142958 transitions. [2019-12-07 18:46:41,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 18:46:41,357 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:46:41,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:41,394 INFO L225 Difference]: With dead ends: 48748 [2019-12-07 18:46:41,394 INFO L226 Difference]: Without dead ends: 36051 [2019-12-07 18:46:41,395 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 568 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=389, Invalid=1591, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 18:46:41,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36051 states. [2019-12-07 18:46:41,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36051 to 16658. [2019-12-07 18:46:41,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16658 states. [2019-12-07 18:46:41,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16658 states to 16658 states and 49196 transitions. [2019-12-07 18:46:41,742 INFO L78 Accepts]: Start accepts. Automaton has 16658 states and 49196 transitions. Word has length 67 [2019-12-07 18:46:41,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:41,742 INFO L462 AbstractCegarLoop]: Abstraction has 16658 states and 49196 transitions. [2019-12-07 18:46:41,742 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:46:41,742 INFO L276 IsEmpty]: Start isEmpty. Operand 16658 states and 49196 transitions. [2019-12-07 18:46:41,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:46:41,756 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:41,756 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:41,756 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:41,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:41,756 INFO L82 PathProgramCache]: Analyzing trace with hash 204518299, now seen corresponding path program 8 times [2019-12-07 18:46:41,756 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:41,756 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312647710] [2019-12-07 18:46:41,757 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:41,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:42,008 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:42,008 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [312647710] [2019-12-07 18:46:42,008 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:42,008 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 18:46:42,008 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1670739646] [2019-12-07 18:46:42,008 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 18:46:42,008 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:42,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 18:46:42,009 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:46:42,009 INFO L87 Difference]: Start difference. First operand 16658 states and 49196 transitions. Second operand 15 states. [2019-12-07 18:46:47,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:47,932 INFO L93 Difference]: Finished difference Result 33040 states and 94609 transitions. [2019-12-07 18:46:47,932 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2019-12-07 18:46:47,932 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 18:46:47,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:47,968 INFO L225 Difference]: With dead ends: 33040 [2019-12-07 18:46:47,968 INFO L226 Difference]: Without dead ends: 31261 [2019-12-07 18:46:47,969 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1367 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=653, Invalid=3637, Unknown=0, NotChecked=0, Total=4290 [2019-12-07 18:46:48,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31261 states. [2019-12-07 18:46:48,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31261 to 16662. [2019-12-07 18:46:48,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16662 states. [2019-12-07 18:46:48,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16662 states to 16662 states and 49207 transitions. [2019-12-07 18:46:48,279 INFO L78 Accepts]: Start accepts. Automaton has 16662 states and 49207 transitions. Word has length 67 [2019-12-07 18:46:48,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:48,279 INFO L462 AbstractCegarLoop]: Abstraction has 16662 states and 49207 transitions. [2019-12-07 18:46:48,279 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 18:46:48,280 INFO L276 IsEmpty]: Start isEmpty. Operand 16662 states and 49207 transitions. [2019-12-07 18:46:48,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:46:48,293 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:48,293 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:48,294 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:48,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:48,294 INFO L82 PathProgramCache]: Analyzing trace with hash 1970362525, now seen corresponding path program 9 times [2019-12-07 18:46:48,294 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:48,294 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809766676] [2019-12-07 18:46:48,294 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:48,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:48,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:48,557 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809766676] [2019-12-07 18:46:48,557 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:48,557 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:46:48,557 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [986633439] [2019-12-07 18:46:48,557 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:46:48,557 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:48,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:46:48,557 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:46:48,557 INFO L87 Difference]: Start difference. First operand 16662 states and 49207 transitions. Second operand 16 states. [2019-12-07 18:46:52,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:52,050 INFO L93 Difference]: Finished difference Result 31778 states and 91683 transitions. [2019-12-07 18:46:52,051 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2019-12-07 18:46:52,052 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 18:46:52,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:52,100 INFO L225 Difference]: With dead ends: 31778 [2019-12-07 18:46:52,100 INFO L226 Difference]: Without dead ends: 31223 [2019-12-07 18:46:52,102 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1553 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=690, Invalid=4140, Unknown=0, NotChecked=0, Total=4830 [2019-12-07 18:46:52,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31223 states. [2019-12-07 18:46:52,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31223 to 16670. [2019-12-07 18:46:52,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16670 states. [2019-12-07 18:46:52,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16670 states to 16670 states and 49229 transitions. [2019-12-07 18:46:52,413 INFO L78 Accepts]: Start accepts. Automaton has 16670 states and 49229 transitions. Word has length 67 [2019-12-07 18:46:52,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:52,413 INFO L462 AbstractCegarLoop]: Abstraction has 16670 states and 49229 transitions. [2019-12-07 18:46:52,413 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:46:52,413 INFO L276 IsEmpty]: Start isEmpty. Operand 16670 states and 49229 transitions. [2019-12-07 18:46:52,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:46:52,427 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:52,427 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:52,427 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:52,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:52,427 INFO L82 PathProgramCache]: Analyzing trace with hash 842317367, now seen corresponding path program 10 times [2019-12-07 18:46:52,427 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:52,427 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [18248755] [2019-12-07 18:46:52,427 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:52,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:52,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:52,819 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [18248755] [2019-12-07 18:46:52,819 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:52,819 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 18:46:52,820 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1145627251] [2019-12-07 18:46:52,820 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 18:46:52,820 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:52,821 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 18:46:52,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=228, Unknown=0, NotChecked=0, Total=272 [2019-12-07 18:46:52,821 INFO L87 Difference]: Start difference. First operand 16670 states and 49229 transitions. Second operand 17 states. [2019-12-07 18:47:00,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:00,150 INFO L93 Difference]: Finished difference Result 32453 states and 93514 transitions. [2019-12-07 18:47:00,151 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2019-12-07 18:47:00,151 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 18:47:00,151 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:00,183 INFO L225 Difference]: With dead ends: 32453 [2019-12-07 18:47:00,184 INFO L226 Difference]: Without dead ends: 32090 [2019-12-07 18:47:00,185 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1661 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=703, Invalid=4409, Unknown=0, NotChecked=0, Total=5112 [2019-12-07 18:47:00,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32090 states. [2019-12-07 18:47:00,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32090 to 16662. [2019-12-07 18:47:00,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16662 states. [2019-12-07 18:47:00,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16662 states to 16662 states and 49207 transitions. [2019-12-07 18:47:00,501 INFO L78 Accepts]: Start accepts. Automaton has 16662 states and 49207 transitions. Word has length 67 [2019-12-07 18:47:00,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:00,501 INFO L462 AbstractCegarLoop]: Abstraction has 16662 states and 49207 transitions. [2019-12-07 18:47:00,501 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 18:47:00,501 INFO L276 IsEmpty]: Start isEmpty. Operand 16662 states and 49207 transitions. [2019-12-07 18:47:00,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:47:00,515 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:00,516 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:00,516 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:00,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:00,516 INFO L82 PathProgramCache]: Analyzing trace with hash 648115335, now seen corresponding path program 11 times [2019-12-07 18:47:00,516 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:00,516 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [360215658] [2019-12-07 18:47:00,516 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:00,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:00,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:00,633 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [360215658] [2019-12-07 18:47:00,633 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:00,633 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:47:00,633 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [543001942] [2019-12-07 18:47:00,633 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:47:00,634 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:00,634 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:47:00,634 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:47:00,634 INFO L87 Difference]: Start difference. First operand 16662 states and 49207 transitions. Second operand 11 states. [2019-12-07 18:47:01,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:01,734 INFO L93 Difference]: Finished difference Result 28383 states and 82076 transitions. [2019-12-07 18:47:01,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 18:47:01,734 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:47:01,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:01,762 INFO L225 Difference]: With dead ends: 28383 [2019-12-07 18:47:01,762 INFO L226 Difference]: Without dead ends: 27010 [2019-12-07 18:47:01,762 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 145 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=146, Invalid=666, Unknown=0, NotChecked=0, Total=812 [2019-12-07 18:47:01,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27010 states. [2019-12-07 18:47:02,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27010 to 16292. [2019-12-07 18:47:02,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16292 states. [2019-12-07 18:47:02,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16292 states to 16292 states and 48191 transitions. [2019-12-07 18:47:02,043 INFO L78 Accepts]: Start accepts. Automaton has 16292 states and 48191 transitions. Word has length 67 [2019-12-07 18:47:02,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:02,043 INFO L462 AbstractCegarLoop]: Abstraction has 16292 states and 48191 transitions. [2019-12-07 18:47:02,043 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:47:02,043 INFO L276 IsEmpty]: Start isEmpty. Operand 16292 states and 48191 transitions. [2019-12-07 18:47:02,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:47:02,094 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:02,094 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:02,094 INFO L410 AbstractCegarLoop]: === Iteration 39 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:02,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:02,094 INFO L82 PathProgramCache]: Analyzing trace with hash 2145287493, now seen corresponding path program 12 times [2019-12-07 18:47:02,094 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:02,094 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1684024502] [2019-12-07 18:47:02,094 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:02,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:02,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:02,201 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1684024502] [2019-12-07 18:47:02,202 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:02,202 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:47:02,202 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [253358150] [2019-12-07 18:47:02,202 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:47:02,202 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:02,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:47:02,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:47:02,202 INFO L87 Difference]: Start difference. First operand 16292 states and 48191 transitions. Second operand 11 states. [2019-12-07 18:47:04,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:04,992 INFO L93 Difference]: Finished difference Result 28052 states and 81475 transitions. [2019-12-07 18:47:04,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 18:47:04,992 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:47:04,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:05,021 INFO L225 Difference]: With dead ends: 28052 [2019-12-07 18:47:05,021 INFO L226 Difference]: Without dead ends: 27689 [2019-12-07 18:47:05,021 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 203 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=171, Invalid=821, Unknown=0, NotChecked=0, Total=992 [2019-12-07 18:47:05,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27689 states. [2019-12-07 18:47:05,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27689 to 16104. [2019-12-07 18:47:05,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16104 states. [2019-12-07 18:47:05,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16104 states to 16104 states and 47702 transitions. [2019-12-07 18:47:05,314 INFO L78 Accepts]: Start accepts. Automaton has 16104 states and 47702 transitions. Word has length 67 [2019-12-07 18:47:05,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:05,314 INFO L462 AbstractCegarLoop]: Abstraction has 16104 states and 47702 transitions. [2019-12-07 18:47:05,315 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:47:05,315 INFO L276 IsEmpty]: Start isEmpty. Operand 16104 states and 47702 transitions. [2019-12-07 18:47:05,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:47:05,328 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:05,328 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:05,328 INFO L410 AbstractCegarLoop]: === Iteration 40 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:05,328 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:05,328 INFO L82 PathProgramCache]: Analyzing trace with hash -2101838907, now seen corresponding path program 13 times [2019-12-07 18:47:05,328 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:05,329 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [654816920] [2019-12-07 18:47:05,329 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:05,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:47:05,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:47:05,408 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:47:05,408 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:47:05,412 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [894] [894] ULTIMATE.startENTRY-->L820: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_958 0) (= v_~x~0_72 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1391~0.base_26|)) (= v_~z$r_buff0_thd2~0_111 0) (= |v_#NULL.offset_6| 0) (= 0 v_~__unbuffered_p1_EAX~0_40) (= v_~z$r_buff1_thd0~0_129 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1391~0.base_26| 4)) (= v_~z$w_buff1_used~0_531 0) (= v_~y~0_19 0) (= v_~z$r_buff0_thd1~0_132 0) (= v_~z$r_buff1_thd1~0_108 0) (= v_~z$read_delayed_var~0.offset_7 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1391~0.base_26| 1) |v_#valid_69|) (= v_~main$tmp_guard1~0_39 0) (= v_~z$w_buff0~0_487 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$r_buff1_thd2~0_104 0) (= 0 v_~__unbuffered_p2_EAX~0_53) (= v_~z$w_buff1~0_307 0) (= 0 v_~z$r_buff1_thd3~0_237) (= 0 |v_#NULL.base_6|) (= 0 v_~z$flush_delayed~0_24) (= v_~z$r_buff0_thd0~0_141 0) (= 0 |v_ULTIMATE.start_main_~#t1391~0.offset_19|) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= v_~z$mem_tmp~0_13 0) (= v_~z~0_174 0) (= 0 v_~__unbuffered_cnt~0_91) (= 0 v_~z$r_buff0_thd3~0_332) (= v_~main$tmp_guard0~0_26 0) (= v_~weak$$choice2~0_107 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1391~0.base_26| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1391~0.base_26|) |v_ULTIMATE.start_main_~#t1391~0.offset_19| 0)) |v_#memory_int_21|) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t1391~0.base_26|) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_104, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_31|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_287|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_85|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_141, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_40, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_53, ULTIMATE.start_main_~#t1392~0.offset=|v_ULTIMATE.start_main_~#t1392~0.offset_19|, ULTIMATE.start_main_~#t1393~0.base=|v_ULTIMATE.start_main_~#t1393~0.base_16|, ~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_531, ~z$flush_delayed~0=v_~z$flush_delayed~0_24, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_108, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_332, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91, ~x~0=v_~x~0_72, ULTIMATE.start_main_~#t1393~0.offset=|v_ULTIMATE.start_main_~#t1393~0.offset_12|, ULTIMATE.start_main_~#t1392~0.base=|v_ULTIMATE.start_main_~#t1392~0.base_23|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_307, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_39, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_35|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_35|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_129, ~y~0=v_~y~0_19, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_111, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_958, ~z$w_buff0~0=v_~z$w_buff0~0_487, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_237, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ULTIMATE.start_main_~#t1391~0.base=|v_ULTIMATE.start_main_~#t1391~0.base_26|, ULTIMATE.start_main_~#t1391~0.offset=|v_ULTIMATE.start_main_~#t1391~0.offset_19|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_24|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_174, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_132} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1393~0.offset, ULTIMATE.start_main_~#t1392~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, #NULL.offset, ~z$w_buff1~0, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~__unbuffered_p1_EAX~0, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1392~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1393~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1391~0.base, ULTIMATE.start_main_~#t1391~0.offset, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#res, ~z$r_buff1_thd1~0, #valid, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 18:47:05,412 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L820-1-->L822: Formula: (and (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t1392~0.base_9| 4) |v_#length_13|) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t1392~0.base_9| 1)) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t1392~0.base_9|)) (not (= |v_ULTIMATE.start_main_~#t1392~0.base_9| 0)) (= |v_ULTIMATE.start_main_~#t1392~0.offset_8| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1392~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1392~0.base_9|) |v_ULTIMATE.start_main_~#t1392~0.offset_8| 1)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1392~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1392~0.base=|v_ULTIMATE.start_main_~#t1392~0.base_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_3|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1392~0.offset=|v_ULTIMATE.start_main_~#t1392~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1392~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1392~0.offset] because there is no mapped edge [2019-12-07 18:47:05,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] P0ENTRY-->L4-3: Formula: (and (= P0Thread1of1ForFork0_~arg.offset_Out-593102411 |P0Thread1of1ForFork0_#in~arg.offset_In-593102411|) (= ~z$w_buff0~0_Out-593102411 1) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-593102411)) (= (ite (not (and (not (= 0 (mod ~z$w_buff1_used~0_Out-593102411 256))) (not (= (mod ~z$w_buff0_used~0_Out-593102411 256) 0)))) 1 0) |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-593102411|) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-593102411| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-593102411) (= ~z$w_buff0_used~0_In-593102411 ~z$w_buff1_used~0_Out-593102411) (= ~z$w_buff0_used~0_Out-593102411 1) (= ~z$w_buff1~0_Out-593102411 ~z$w_buff0~0_In-593102411) (= |P0Thread1of1ForFork0_#in~arg.base_In-593102411| P0Thread1of1ForFork0_~arg.base_Out-593102411)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-593102411|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-593102411, ~z$w_buff0~0=~z$w_buff0~0_In-593102411, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-593102411|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-593102411|, ~z$w_buff0_used~0=~z$w_buff0_used~0_Out-593102411, ~z$w_buff0~0=~z$w_buff0~0_Out-593102411, ~z$w_buff1_used~0=~z$w_buff1_used~0_Out-593102411, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-593102411, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-593102411|, ~z$w_buff1~0=~z$w_buff1~0_Out-593102411, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out-593102411, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-593102411|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out-593102411} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 18:47:05,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L822-1-->L824: Formula: (and (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1393~0.base_11|) 0) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1393~0.base_11| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1393~0.base_11| 4)) (= |v_#memory_int_15| (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1393~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1393~0.base_11|) |v_ULTIMATE.start_main_~#t1393~0.offset_9| 2))) (not (= |v_ULTIMATE.start_main_~#t1393~0.base_11| 0)) (= |v_ULTIMATE.start_main_~#t1393~0.offset_9| 0) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1393~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1393~0.offset=|v_ULTIMATE.start_main_~#t1393~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1393~0.base=|v_ULTIMATE.start_main_~#t1393~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1393~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1393~0.base] because there is no mapped edge [2019-12-07 18:47:05,415 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L764-2-->L764-5: Formula: (let ((.cse2 (= |P1Thread1of1ForFork1_#t~ite9_Out360029157| |P1Thread1of1ForFork1_#t~ite10_Out360029157|)) (.cse0 (= (mod ~z$w_buff1_used~0_In360029157 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd2~0_In360029157 256) 0))) (or (and (or .cse0 .cse1) (= ~z~0_In360029157 |P1Thread1of1ForFork1_#t~ite9_Out360029157|) .cse2) (and .cse2 (not .cse0) (not .cse1) (= ~z$w_buff1~0_In360029157 |P1Thread1of1ForFork1_#t~ite9_Out360029157|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In360029157, ~z$w_buff1_used~0=~z$w_buff1_used~0_In360029157, ~z$w_buff1~0=~z$w_buff1~0_In360029157, ~z~0=~z~0_In360029157} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out360029157|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In360029157, ~z$w_buff1_used~0=~z$w_buff1_used~0_In360029157, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out360029157|, ~z$w_buff1~0=~z$w_buff1~0_In360029157, ~z~0=~z~0_In360029157} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 18:47:05,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L765-->L765-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-378631472 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-378631472 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-378631472| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-378631472| ~z$w_buff0_used~0_In-378631472)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-378631472, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-378631472} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-378631472, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-378631472|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-378631472} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 18:47:05,417 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L766-->L766-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In752503061 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In752503061 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In752503061 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In752503061 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out752503061| ~z$w_buff1_used~0_In752503061) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out752503061| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In752503061, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In752503061, ~z$w_buff1_used~0=~z$w_buff1_used~0_In752503061, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In752503061} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In752503061, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In752503061, ~z$w_buff1_used~0=~z$w_buff1_used~0_In752503061, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out752503061|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In752503061} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 18:47:05,417 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In797084839 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In797084839 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out797084839|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite13_Out797084839| ~z$r_buff0_thd2~0_In797084839)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In797084839, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In797084839} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In797084839, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out797084839|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In797084839} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 18:47:05,418 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L787-->L787-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1538135642 256) 0))) (or (and (= ~z$w_buff1~0_In1538135642 |P2Thread1of1ForFork2_#t~ite23_Out1538135642|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1538135642 256) 0))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1538135642 256) 0)) (= 0 (mod ~z$w_buff0_used~0_In1538135642 256)) (and (= 0 (mod ~z$w_buff1_used~0_In1538135642 256)) .cse1))) (= |P2Thread1of1ForFork2_#t~ite24_Out1538135642| |P2Thread1of1ForFork2_#t~ite23_Out1538135642|)) (and (= |P2Thread1of1ForFork2_#t~ite23_In1538135642| |P2Thread1of1ForFork2_#t~ite23_Out1538135642|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite24_Out1538135642| ~z$w_buff1~0_In1538135642)))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In1538135642|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1538135642, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1538135642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1538135642, ~z$w_buff1~0=~z$w_buff1~0_In1538135642, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1538135642, ~weak$$choice2~0=~weak$$choice2~0_In1538135642} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out1538135642|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out1538135642|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1538135642, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1538135642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1538135642, ~z$w_buff1~0=~z$w_buff1~0_In1538135642, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1538135642, ~weak$$choice2~0=~weak$$choice2~0_In1538135642} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 18:47:05,418 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L788-->L788-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-321007102 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite26_Out-321007102| ~z$w_buff0_used~0_In-321007102) (= |P2Thread1of1ForFork2_#t~ite26_Out-321007102| |P2Thread1of1ForFork2_#t~ite27_Out-321007102|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-321007102 256) 0))) (or (= (mod ~z$w_buff0_used~0_In-321007102 256) 0) (and (= (mod ~z$r_buff1_thd3~0_In-321007102 256) 0) .cse1) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-321007102 256)))))) (and (= |P2Thread1of1ForFork2_#t~ite26_In-321007102| |P2Thread1of1ForFork2_#t~ite26_Out-321007102|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite27_Out-321007102| ~z$w_buff0_used~0_In-321007102)))) InVars {P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In-321007102|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-321007102, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-321007102, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-321007102, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-321007102, ~weak$$choice2~0=~weak$$choice2~0_In-321007102} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out-321007102|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-321007102, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-321007102, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-321007102, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-321007102, ~weak$$choice2~0=~weak$$choice2~0_In-321007102, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out-321007102|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 18:47:05,418 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-1380227168 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd2~0_In-1380227168 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-1380227168 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1380227168 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-1380227168|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd2~0_In-1380227168 |P1Thread1of1ForFork1_#t~ite14_Out-1380227168|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1380227168, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1380227168, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1380227168, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1380227168} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1380227168, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1380227168, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1380227168, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1380227168|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1380227168} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 18:47:05,418 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L768-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_26| v_~z$r_buff1_thd2~0_55) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_26|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_55, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_25|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:47:05,419 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L789-->L789-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1510826899 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite29_In1510826899| |P2Thread1of1ForFork2_#t~ite29_Out1510826899|) (= ~z$w_buff1_used~0_In1510826899 |P2Thread1of1ForFork2_#t~ite30_Out1510826899|)) (and (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1510826899 256)))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1510826899 256) 0)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1510826899 256))) (= 0 (mod ~z$w_buff0_used~0_In1510826899 256)))) (= |P2Thread1of1ForFork2_#t~ite30_Out1510826899| |P2Thread1of1ForFork2_#t~ite29_Out1510826899|) .cse0 (= ~z$w_buff1_used~0_In1510826899 |P2Thread1of1ForFork2_#t~ite29_Out1510826899|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1510826899, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1510826899, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1510826899, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1510826899, ~weak$$choice2~0=~weak$$choice2~0_In1510826899, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_In1510826899|} OutVars{P2Thread1of1ForFork2_#t~ite30=|P2Thread1of1ForFork2_#t~ite30_Out1510826899|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1510826899, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1510826899, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1510826899, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1510826899, ~weak$$choice2~0=~weak$$choice2~0_In1510826899, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_Out1510826899|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite30, P2Thread1of1ForFork2_#t~ite29] because there is no mapped edge [2019-12-07 18:47:05,419 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L790-->L791: Formula: (and (= v_~z$r_buff0_thd3~0_68 v_~z$r_buff0_thd3~0_67) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_68, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 18:47:05,420 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L793-->L797: Formula: (and (= 0 v_~z$flush_delayed~0_6) (= v_~z~0_25 v_~z$mem_tmp~0_5) (not (= 0 (mod v_~z$flush_delayed~0_7 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_5, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_6, ~z~0=v_~z~0_25} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 18:47:05,420 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L745-->L745-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In190056877 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In190056877 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out190056877| 0) (not .cse0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out190056877| ~z$w_buff0_used~0_In190056877) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In190056877, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In190056877} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out190056877|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In190056877, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In190056877} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:47:05,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L746-->L746-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In-137214086 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-137214086 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-137214086 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-137214086 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-137214086 |P0Thread1of1ForFork0_#t~ite6_Out-137214086|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-137214086| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-137214086, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-137214086, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-137214086, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-137214086} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-137214086|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-137214086, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-137214086, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-137214086, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-137214086} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:47:05,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L747-->L748: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In-819092378 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-819092378 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_In-819092378 ~z$r_buff0_thd1~0_Out-819092378))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd1~0_Out-819092378) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-819092378, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-819092378} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-819092378, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-819092378|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-819092378} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:47:05,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L748-->L748-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1190157197 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd1~0_In-1190157197 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1190157197 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1190157197 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1190157197| ~z$r_buff1_thd1~0_In-1190157197) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1190157197| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1190157197, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1190157197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1190157197, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1190157197} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1190157197, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1190157197|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1190157197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1190157197, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1190157197} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:47:05,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L748-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_68 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= v_~__unbuffered_cnt~0_73 (+ v_~__unbuffered_cnt~0_74 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_68, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_73} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:47:05,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L797-2-->L797-5: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1126719429 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1126719429 256))) (.cse2 (= |P2Thread1of1ForFork2_#t~ite38_Out1126719429| |P2Thread1of1ForFork2_#t~ite39_Out1126719429|))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite38_Out1126719429| ~z~0_In1126719429) .cse2) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite38_Out1126719429| ~z$w_buff1~0_In1126719429) (not .cse0) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1126719429, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1126719429, ~z$w_buff1~0=~z$w_buff1~0_In1126719429, ~z~0=~z~0_In1126719429} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1126719429, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1126719429, ~z$w_buff1~0=~z$w_buff1~0_In1126719429, ~z~0=~z~0_In1126719429, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1126719429|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1126719429|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 18:47:05,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-599718594 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-599718594 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite40_Out-599718594|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-599718594 |P2Thread1of1ForFork2_#t~ite40_Out-599718594|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-599718594, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-599718594} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-599718594, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-599718594, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out-599718594|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 18:47:05,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L799-->L799-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-2030291433 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-2030291433 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-2030291433 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-2030291433 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite41_Out-2030291433| ~z$w_buff1_used~0_In-2030291433) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork2_#t~ite41_Out-2030291433| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2030291433, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2030291433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2030291433, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2030291433} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out-2030291433|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2030291433, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2030291433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2030291433, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2030291433} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 18:47:05,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L800-->L800-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-535919447 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-535919447 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out-535919447| ~z$r_buff0_thd3~0_In-535919447)) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out-535919447| 0) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-535919447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-535919447} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-535919447|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-535919447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-535919447} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 18:47:05,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L801-->L801-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In622205512 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In622205512 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In622205512 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In622205512 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite43_Out622205512|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd3~0_In622205512 |P2Thread1of1ForFork2_#t~ite43_Out622205512|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In622205512, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In622205512, ~z$w_buff1_used~0=~z$w_buff1_used~0_In622205512, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In622205512} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In622205512, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In622205512, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out622205512|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In622205512, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In622205512} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 18:47:05,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L801-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_136 |v_P2Thread1of1ForFork2_#t~ite43_28|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_136, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_27|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 18:47:05,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L824-1-->L830: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:47:05,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L830-2-->L830-5: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In-161011124 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-161011124 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite48_Out-161011124| |ULTIMATE.start_main_#t~ite47_Out-161011124|))) (or (and .cse0 (= ~z~0_In-161011124 |ULTIMATE.start_main_#t~ite47_Out-161011124|) (or .cse1 .cse2)) (and (not .cse2) (not .cse1) .cse0 (= ~z$w_buff1~0_In-161011124 |ULTIMATE.start_main_#t~ite47_Out-161011124|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-161011124, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-161011124, ~z$w_buff1~0=~z$w_buff1~0_In-161011124, ~z~0=~z~0_In-161011124} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-161011124, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-161011124|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-161011124, ~z$w_buff1~0=~z$w_buff1~0_In-161011124, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-161011124|, ~z~0=~z~0_In-161011124} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:47:05,425 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-1695208680 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1695208680 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1695208680| 0)) (and (= ~z$w_buff0_used~0_In-1695208680 |ULTIMATE.start_main_#t~ite49_Out-1695208680|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1695208680, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1695208680} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1695208680, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1695208680, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1695208680|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:47:05,425 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L832-->L832-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd0~0_In-302344885 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-302344885 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-302344885 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-302344885 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-302344885| 0)) (and (= ~z$w_buff1_used~0_In-302344885 |ULTIMATE.start_main_#t~ite50_Out-302344885|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-302344885, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-302344885, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-302344885, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-302344885} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-302344885|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-302344885, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-302344885, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-302344885, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-302344885} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:47:05,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-118094761 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-118094761 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-118094761| 0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-118094761 |ULTIMATE.start_main_#t~ite51_Out-118094761|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-118094761, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-118094761} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-118094761, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-118094761|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-118094761} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:47:05,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L834-->L834-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In754280231 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In754280231 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In754280231 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In754280231 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out754280231|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~z$r_buff1_thd0~0_In754280231 |ULTIMATE.start_main_#t~ite52_Out754280231|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In754280231, ~z$w_buff0_used~0=~z$w_buff0_used~0_In754280231, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In754280231, ~z$w_buff1_used~0=~z$w_buff1_used~0_In754280231} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out754280231|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In754280231, ~z$w_buff0_used~0=~z$w_buff0_used~0_In754280231, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In754280231, ~z$w_buff1_used~0=~z$w_buff1_used~0_In754280231} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:47:05,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L834-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_21 256)) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p2_EAX~0_28) (= 0 v_~__unbuffered_p1_EAX~0_23) (= v_~x~0_47 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_21) (= |v_ULTIMATE.start_main_#t~ite52_50| v_~z$r_buff1_thd0~0_94) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_50|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~x~0=v_~x~0_47} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_49|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_94, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~x~0=v_~x~0_47, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:47:05,477 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:47:05 BasicIcfg [2019-12-07 18:47:05,477 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:47:05,477 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:47:05,478 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:47:05,478 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:47:05,478 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:44:13" (3/4) ... [2019-12-07 18:47:05,480 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:47:05,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [894] [894] ULTIMATE.startENTRY-->L820: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_958 0) (= v_~x~0_72 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1391~0.base_26|)) (= v_~z$r_buff0_thd2~0_111 0) (= |v_#NULL.offset_6| 0) (= 0 v_~__unbuffered_p1_EAX~0_40) (= v_~z$r_buff1_thd0~0_129 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1391~0.base_26| 4)) (= v_~z$w_buff1_used~0_531 0) (= v_~y~0_19 0) (= v_~z$r_buff0_thd1~0_132 0) (= v_~z$r_buff1_thd1~0_108 0) (= v_~z$read_delayed_var~0.offset_7 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1391~0.base_26| 1) |v_#valid_69|) (= v_~main$tmp_guard1~0_39 0) (= v_~z$w_buff0~0_487 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$r_buff1_thd2~0_104 0) (= 0 v_~__unbuffered_p2_EAX~0_53) (= v_~z$w_buff1~0_307 0) (= 0 v_~z$r_buff1_thd3~0_237) (= 0 |v_#NULL.base_6|) (= 0 v_~z$flush_delayed~0_24) (= v_~z$r_buff0_thd0~0_141 0) (= 0 |v_ULTIMATE.start_main_~#t1391~0.offset_19|) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= v_~z$mem_tmp~0_13 0) (= v_~z~0_174 0) (= 0 v_~__unbuffered_cnt~0_91) (= 0 v_~z$r_buff0_thd3~0_332) (= v_~main$tmp_guard0~0_26 0) (= v_~weak$$choice2~0_107 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1391~0.base_26| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1391~0.base_26|) |v_ULTIMATE.start_main_~#t1391~0.offset_19| 0)) |v_#memory_int_21|) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t1391~0.base_26|) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_104, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_31|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_287|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_85|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_141, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_40, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_53, ULTIMATE.start_main_~#t1392~0.offset=|v_ULTIMATE.start_main_~#t1392~0.offset_19|, ULTIMATE.start_main_~#t1393~0.base=|v_ULTIMATE.start_main_~#t1393~0.base_16|, ~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_531, ~z$flush_delayed~0=v_~z$flush_delayed~0_24, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_108, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_332, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91, ~x~0=v_~x~0_72, ULTIMATE.start_main_~#t1393~0.offset=|v_ULTIMATE.start_main_~#t1393~0.offset_12|, ULTIMATE.start_main_~#t1392~0.base=|v_ULTIMATE.start_main_~#t1392~0.base_23|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_307, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_39, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_35|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_35|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_129, ~y~0=v_~y~0_19, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_111, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_958, ~z$w_buff0~0=v_~z$w_buff0~0_487, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_237, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ULTIMATE.start_main_~#t1391~0.base=|v_ULTIMATE.start_main_~#t1391~0.base_26|, ULTIMATE.start_main_~#t1391~0.offset=|v_ULTIMATE.start_main_~#t1391~0.offset_19|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_24|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_174, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_132} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1393~0.offset, ULTIMATE.start_main_~#t1392~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, #NULL.offset, ~z$w_buff1~0, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~__unbuffered_p1_EAX~0, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1392~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1393~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1391~0.base, ULTIMATE.start_main_~#t1391~0.offset, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#res, ~z$r_buff1_thd1~0, #valid, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 18:47:05,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L820-1-->L822: Formula: (and (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t1392~0.base_9| 4) |v_#length_13|) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t1392~0.base_9| 1)) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t1392~0.base_9|)) (not (= |v_ULTIMATE.start_main_~#t1392~0.base_9| 0)) (= |v_ULTIMATE.start_main_~#t1392~0.offset_8| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1392~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1392~0.base_9|) |v_ULTIMATE.start_main_~#t1392~0.offset_8| 1)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1392~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1392~0.base=|v_ULTIMATE.start_main_~#t1392~0.base_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_3|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1392~0.offset=|v_ULTIMATE.start_main_~#t1392~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1392~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1392~0.offset] because there is no mapped edge [2019-12-07 18:47:05,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] P0ENTRY-->L4-3: Formula: (and (= P0Thread1of1ForFork0_~arg.offset_Out-593102411 |P0Thread1of1ForFork0_#in~arg.offset_In-593102411|) (= ~z$w_buff0~0_Out-593102411 1) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-593102411)) (= (ite (not (and (not (= 0 (mod ~z$w_buff1_used~0_Out-593102411 256))) (not (= (mod ~z$w_buff0_used~0_Out-593102411 256) 0)))) 1 0) |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-593102411|) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-593102411| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-593102411) (= ~z$w_buff0_used~0_In-593102411 ~z$w_buff1_used~0_Out-593102411) (= ~z$w_buff0_used~0_Out-593102411 1) (= ~z$w_buff1~0_Out-593102411 ~z$w_buff0~0_In-593102411) (= |P0Thread1of1ForFork0_#in~arg.base_In-593102411| P0Thread1of1ForFork0_~arg.base_Out-593102411)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-593102411|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-593102411, ~z$w_buff0~0=~z$w_buff0~0_In-593102411, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-593102411|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-593102411|, ~z$w_buff0_used~0=~z$w_buff0_used~0_Out-593102411, ~z$w_buff0~0=~z$w_buff0~0_Out-593102411, ~z$w_buff1_used~0=~z$w_buff1_used~0_Out-593102411, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-593102411, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-593102411|, ~z$w_buff1~0=~z$w_buff1~0_Out-593102411, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out-593102411, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-593102411|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out-593102411} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 18:47:05,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L822-1-->L824: Formula: (and (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1393~0.base_11|) 0) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1393~0.base_11| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1393~0.base_11| 4)) (= |v_#memory_int_15| (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1393~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1393~0.base_11|) |v_ULTIMATE.start_main_~#t1393~0.offset_9| 2))) (not (= |v_ULTIMATE.start_main_~#t1393~0.base_11| 0)) (= |v_ULTIMATE.start_main_~#t1393~0.offset_9| 0) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1393~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1393~0.offset=|v_ULTIMATE.start_main_~#t1393~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1393~0.base=|v_ULTIMATE.start_main_~#t1393~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1393~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1393~0.base] because there is no mapped edge [2019-12-07 18:47:05,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L764-2-->L764-5: Formula: (let ((.cse2 (= |P1Thread1of1ForFork1_#t~ite9_Out360029157| |P1Thread1of1ForFork1_#t~ite10_Out360029157|)) (.cse0 (= (mod ~z$w_buff1_used~0_In360029157 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd2~0_In360029157 256) 0))) (or (and (or .cse0 .cse1) (= ~z~0_In360029157 |P1Thread1of1ForFork1_#t~ite9_Out360029157|) .cse2) (and .cse2 (not .cse0) (not .cse1) (= ~z$w_buff1~0_In360029157 |P1Thread1of1ForFork1_#t~ite9_Out360029157|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In360029157, ~z$w_buff1_used~0=~z$w_buff1_used~0_In360029157, ~z$w_buff1~0=~z$w_buff1~0_In360029157, ~z~0=~z~0_In360029157} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out360029157|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In360029157, ~z$w_buff1_used~0=~z$w_buff1_used~0_In360029157, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out360029157|, ~z$w_buff1~0=~z$w_buff1~0_In360029157, ~z~0=~z~0_In360029157} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 18:47:05,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L765-->L765-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-378631472 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-378631472 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-378631472| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-378631472| ~z$w_buff0_used~0_In-378631472)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-378631472, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-378631472} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-378631472, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-378631472|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-378631472} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 18:47:05,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L766-->L766-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In752503061 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In752503061 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In752503061 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In752503061 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out752503061| ~z$w_buff1_used~0_In752503061) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out752503061| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In752503061, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In752503061, ~z$w_buff1_used~0=~z$w_buff1_used~0_In752503061, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In752503061} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In752503061, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In752503061, ~z$w_buff1_used~0=~z$w_buff1_used~0_In752503061, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out752503061|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In752503061} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 18:47:05,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In797084839 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In797084839 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out797084839|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite13_Out797084839| ~z$r_buff0_thd2~0_In797084839)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In797084839, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In797084839} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In797084839, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out797084839|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In797084839} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 18:47:05,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L787-->L787-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1538135642 256) 0))) (or (and (= ~z$w_buff1~0_In1538135642 |P2Thread1of1ForFork2_#t~ite23_Out1538135642|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1538135642 256) 0))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1538135642 256) 0)) (= 0 (mod ~z$w_buff0_used~0_In1538135642 256)) (and (= 0 (mod ~z$w_buff1_used~0_In1538135642 256)) .cse1))) (= |P2Thread1of1ForFork2_#t~ite24_Out1538135642| |P2Thread1of1ForFork2_#t~ite23_Out1538135642|)) (and (= |P2Thread1of1ForFork2_#t~ite23_In1538135642| |P2Thread1of1ForFork2_#t~ite23_Out1538135642|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite24_Out1538135642| ~z$w_buff1~0_In1538135642)))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In1538135642|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1538135642, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1538135642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1538135642, ~z$w_buff1~0=~z$w_buff1~0_In1538135642, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1538135642, ~weak$$choice2~0=~weak$$choice2~0_In1538135642} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out1538135642|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out1538135642|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1538135642, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1538135642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1538135642, ~z$w_buff1~0=~z$w_buff1~0_In1538135642, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1538135642, ~weak$$choice2~0=~weak$$choice2~0_In1538135642} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 18:47:05,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L788-->L788-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-321007102 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite26_Out-321007102| ~z$w_buff0_used~0_In-321007102) (= |P2Thread1of1ForFork2_#t~ite26_Out-321007102| |P2Thread1of1ForFork2_#t~ite27_Out-321007102|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-321007102 256) 0))) (or (= (mod ~z$w_buff0_used~0_In-321007102 256) 0) (and (= (mod ~z$r_buff1_thd3~0_In-321007102 256) 0) .cse1) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-321007102 256)))))) (and (= |P2Thread1of1ForFork2_#t~ite26_In-321007102| |P2Thread1of1ForFork2_#t~ite26_Out-321007102|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite27_Out-321007102| ~z$w_buff0_used~0_In-321007102)))) InVars {P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In-321007102|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-321007102, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-321007102, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-321007102, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-321007102, ~weak$$choice2~0=~weak$$choice2~0_In-321007102} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out-321007102|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-321007102, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-321007102, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-321007102, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-321007102, ~weak$$choice2~0=~weak$$choice2~0_In-321007102, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out-321007102|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 18:47:05,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-1380227168 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd2~0_In-1380227168 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-1380227168 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1380227168 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-1380227168|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd2~0_In-1380227168 |P1Thread1of1ForFork1_#t~ite14_Out-1380227168|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1380227168, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1380227168, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1380227168, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1380227168} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1380227168, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1380227168, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1380227168, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1380227168|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1380227168} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 18:47:05,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L768-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_26| v_~z$r_buff1_thd2~0_55) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_26|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_55, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_25|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:47:05,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L789-->L789-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1510826899 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite29_In1510826899| |P2Thread1of1ForFork2_#t~ite29_Out1510826899|) (= ~z$w_buff1_used~0_In1510826899 |P2Thread1of1ForFork2_#t~ite30_Out1510826899|)) (and (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1510826899 256)))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1510826899 256) 0)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1510826899 256))) (= 0 (mod ~z$w_buff0_used~0_In1510826899 256)))) (= |P2Thread1of1ForFork2_#t~ite30_Out1510826899| |P2Thread1of1ForFork2_#t~ite29_Out1510826899|) .cse0 (= ~z$w_buff1_used~0_In1510826899 |P2Thread1of1ForFork2_#t~ite29_Out1510826899|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1510826899, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1510826899, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1510826899, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1510826899, ~weak$$choice2~0=~weak$$choice2~0_In1510826899, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_In1510826899|} OutVars{P2Thread1of1ForFork2_#t~ite30=|P2Thread1of1ForFork2_#t~ite30_Out1510826899|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1510826899, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1510826899, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1510826899, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1510826899, ~weak$$choice2~0=~weak$$choice2~0_In1510826899, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_Out1510826899|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite30, P2Thread1of1ForFork2_#t~ite29] because there is no mapped edge [2019-12-07 18:47:05,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L790-->L791: Formula: (and (= v_~z$r_buff0_thd3~0_68 v_~z$r_buff0_thd3~0_67) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_68, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 18:47:05,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L793-->L797: Formula: (and (= 0 v_~z$flush_delayed~0_6) (= v_~z~0_25 v_~z$mem_tmp~0_5) (not (= 0 (mod v_~z$flush_delayed~0_7 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_5, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_6, ~z~0=v_~z~0_25} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 18:47:05,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L745-->L745-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In190056877 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In190056877 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out190056877| 0) (not .cse0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out190056877| ~z$w_buff0_used~0_In190056877) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In190056877, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In190056877} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out190056877|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In190056877, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In190056877} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:47:05,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L746-->L746-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In-137214086 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-137214086 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-137214086 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-137214086 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-137214086 |P0Thread1of1ForFork0_#t~ite6_Out-137214086|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-137214086| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-137214086, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-137214086, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-137214086, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-137214086} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-137214086|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-137214086, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-137214086, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-137214086, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-137214086} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:47:05,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L747-->L748: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In-819092378 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-819092378 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_In-819092378 ~z$r_buff0_thd1~0_Out-819092378))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd1~0_Out-819092378) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-819092378, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-819092378} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-819092378, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-819092378|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-819092378} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:47:05,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L748-->L748-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1190157197 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd1~0_In-1190157197 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1190157197 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1190157197 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1190157197| ~z$r_buff1_thd1~0_In-1190157197) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1190157197| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1190157197, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1190157197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1190157197, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1190157197} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1190157197, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1190157197|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1190157197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1190157197, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1190157197} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:47:05,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L748-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_68 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= v_~__unbuffered_cnt~0_73 (+ v_~__unbuffered_cnt~0_74 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_68, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_73} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:47:05,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L797-2-->L797-5: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1126719429 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1126719429 256))) (.cse2 (= |P2Thread1of1ForFork2_#t~ite38_Out1126719429| |P2Thread1of1ForFork2_#t~ite39_Out1126719429|))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite38_Out1126719429| ~z~0_In1126719429) .cse2) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite38_Out1126719429| ~z$w_buff1~0_In1126719429) (not .cse0) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1126719429, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1126719429, ~z$w_buff1~0=~z$w_buff1~0_In1126719429, ~z~0=~z~0_In1126719429} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1126719429, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1126719429, ~z$w_buff1~0=~z$w_buff1~0_In1126719429, ~z~0=~z~0_In1126719429, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1126719429|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1126719429|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 18:47:05,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-599718594 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-599718594 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite40_Out-599718594|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-599718594 |P2Thread1of1ForFork2_#t~ite40_Out-599718594|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-599718594, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-599718594} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-599718594, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-599718594, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out-599718594|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 18:47:05,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L799-->L799-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-2030291433 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-2030291433 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-2030291433 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-2030291433 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite41_Out-2030291433| ~z$w_buff1_used~0_In-2030291433) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork2_#t~ite41_Out-2030291433| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2030291433, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2030291433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2030291433, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2030291433} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out-2030291433|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2030291433, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2030291433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2030291433, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2030291433} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 18:47:05,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L800-->L800-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-535919447 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-535919447 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out-535919447| ~z$r_buff0_thd3~0_In-535919447)) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out-535919447| 0) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-535919447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-535919447} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-535919447|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-535919447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-535919447} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 18:47:05,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L801-->L801-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In622205512 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In622205512 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In622205512 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In622205512 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite43_Out622205512|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd3~0_In622205512 |P2Thread1of1ForFork2_#t~ite43_Out622205512|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In622205512, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In622205512, ~z$w_buff1_used~0=~z$w_buff1_used~0_In622205512, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In622205512} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In622205512, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In622205512, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out622205512|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In622205512, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In622205512} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 18:47:05,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L801-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_136 |v_P2Thread1of1ForFork2_#t~ite43_28|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_136, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_27|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 18:47:05,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L824-1-->L830: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:47:05,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L830-2-->L830-5: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In-161011124 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-161011124 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite48_Out-161011124| |ULTIMATE.start_main_#t~ite47_Out-161011124|))) (or (and .cse0 (= ~z~0_In-161011124 |ULTIMATE.start_main_#t~ite47_Out-161011124|) (or .cse1 .cse2)) (and (not .cse2) (not .cse1) .cse0 (= ~z$w_buff1~0_In-161011124 |ULTIMATE.start_main_#t~ite47_Out-161011124|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-161011124, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-161011124, ~z$w_buff1~0=~z$w_buff1~0_In-161011124, ~z~0=~z~0_In-161011124} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-161011124, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-161011124|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-161011124, ~z$w_buff1~0=~z$w_buff1~0_In-161011124, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-161011124|, ~z~0=~z~0_In-161011124} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:47:05,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-1695208680 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1695208680 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1695208680| 0)) (and (= ~z$w_buff0_used~0_In-1695208680 |ULTIMATE.start_main_#t~ite49_Out-1695208680|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1695208680, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1695208680} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1695208680, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1695208680, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1695208680|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:47:05,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L832-->L832-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd0~0_In-302344885 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-302344885 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-302344885 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-302344885 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-302344885| 0)) (and (= ~z$w_buff1_used~0_In-302344885 |ULTIMATE.start_main_#t~ite50_Out-302344885|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-302344885, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-302344885, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-302344885, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-302344885} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-302344885|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-302344885, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-302344885, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-302344885, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-302344885} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:47:05,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-118094761 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-118094761 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-118094761| 0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-118094761 |ULTIMATE.start_main_#t~ite51_Out-118094761|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-118094761, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-118094761} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-118094761, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-118094761|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-118094761} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:47:05,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L834-->L834-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In754280231 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In754280231 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In754280231 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In754280231 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out754280231|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~z$r_buff1_thd0~0_In754280231 |ULTIMATE.start_main_#t~ite52_Out754280231|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In754280231, ~z$w_buff0_used~0=~z$w_buff0_used~0_In754280231, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In754280231, ~z$w_buff1_used~0=~z$w_buff1_used~0_In754280231} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out754280231|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In754280231, ~z$w_buff0_used~0=~z$w_buff0_used~0_In754280231, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In754280231, ~z$w_buff1_used~0=~z$w_buff1_used~0_In754280231} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:47:05,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L834-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_21 256)) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p2_EAX~0_28) (= 0 v_~__unbuffered_p1_EAX~0_23) (= v_~x~0_47 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_21) (= |v_ULTIMATE.start_main_#t~ite52_50| v_~z$r_buff1_thd0~0_94) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_50|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~x~0=v_~x~0_47} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_49|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_94, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~x~0=v_~x~0_47, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:47:05,541 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_7d0d3944-0a7a-410f-85cf-5494b4ead115/bin/uautomizer/witness.graphml [2019-12-07 18:47:05,541 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:47:05,542 INFO L168 Benchmark]: Toolchain (without parser) took 173131.89 ms. Allocated memory was 1.0 GB in the beginning and 7.9 GB in the end (delta: 6.9 GB). Free memory was 941.4 MB in the beginning and 3.9 GB in the end (delta: -3.0 GB). Peak memory consumption was 4.0 GB. Max. memory is 11.5 GB. [2019-12-07 18:47:05,542 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 963.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:47:05,543 INFO L168 Benchmark]: CACSL2BoogieTranslator took 392.17 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 108.0 MB). Free memory was 941.4 MB in the beginning and 1.1 GB in the end (delta: -134.2 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:47:05,543 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.99 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:47:05,543 INFO L168 Benchmark]: Boogie Preprocessor took 26.75 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:47:05,543 INFO L168 Benchmark]: RCFGBuilder took 410.78 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.2 MB). Peak memory consumption was 56.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:47:05,544 INFO L168 Benchmark]: TraceAbstraction took 172198.60 ms. Allocated memory was 1.1 GB in the beginning and 7.9 GB in the end (delta: 6.8 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 3.9 GB. Max. memory is 11.5 GB. [2019-12-07 18:47:05,544 INFO L168 Benchmark]: Witness Printer took 63.63 ms. Allocated memory is still 7.9 GB. Free memory was 3.9 GB in the beginning and 3.9 GB in the end (delta: 41.5 MB). Peak memory consumption was 41.5 MB. Max. memory is 11.5 GB. [2019-12-07 18:47:05,545 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 963.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 392.17 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 108.0 MB). Free memory was 941.4 MB in the beginning and 1.1 GB in the end (delta: -134.2 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.99 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.75 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 410.78 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.2 MB). Peak memory consumption was 56.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 172198.60 ms. Allocated memory was 1.1 GB in the beginning and 7.9 GB in the end (delta: 6.8 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 3.9 GB. Max. memory is 11.5 GB. * Witness Printer took 63.63 ms. Allocated memory is still 7.9 GB. Free memory was 3.9 GB in the beginning and 3.9 GB in the end (delta: 41.5 MB). Peak memory consumption was 41.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.5s, 175 ProgramPointsBefore, 92 ProgramPointsAfterwards, 212 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 32 TrivialSequentialCompositions, 54 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 31 ChoiceCompositions, 7186 VarBasedMoverChecksPositive, 380 VarBasedMoverChecksNegative, 188 SemBasedMoverChecksPositive, 286 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 125946 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L820] FCALL, FORK 0 pthread_create(&t1391, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L734] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L735] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L736] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L737] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L738] 1 z$r_buff0_thd1 = (_Bool)1 [L741] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L744] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L822] FCALL, FORK 0 pthread_create(&t1392, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t1393, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L758] 2 x = 2 [L761] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L778] 3 y = 1 [L781] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L782] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L783] 3 z$flush_delayed = weak$$choice2 [L784] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L765] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L786] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L786] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L787] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L767] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L788] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L789] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L791] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L792] 3 __unbuffered_p2_EAX = z VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L744] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L745] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L746] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L797] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L798] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L799] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L800] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L830] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L830] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L831] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L832] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L833] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 166 locations, 2 error locations. Result: UNSAFE, OverallTime: 172.0s, OverallIterations: 40, TraceHistogramMax: 1, AutomataDifference: 72.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 10837 SDtfs, 13893 SDslu, 45867 SDs, 0 SdLazy, 46744 SolverSat, 829 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 34.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 947 GetRequests, 61 SyntacticMatches, 35 SemanticMatches, 851 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14081 ImplicationChecksByTransitivity, 15.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=272392occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 75.8s AutomataMinimizationTime, 39 MinimizatonAttempts, 580002 StatesRemovedByMinimization, 36 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 3.8s InterpolantComputationTime, 2043 NumberOfCodeBlocks, 2043 NumberOfCodeBlocksAsserted, 40 NumberOfCheckSat, 1937 ConstructedInterpolants, 0 QuantifiedInterpolants, 789121 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 39 InterpolantComputations, 39 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...