./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix053_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_ceb31cbf-aa43-4bbc-b813-5ca9dcc8961a/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_ceb31cbf-aa43-4bbc-b813-5ca9dcc8961a/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_ceb31cbf-aa43-4bbc-b813-5ca9dcc8961a/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_ceb31cbf-aa43-4bbc-b813-5ca9dcc8961a/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix053_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_ceb31cbf-aa43-4bbc-b813-5ca9dcc8961a/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_ceb31cbf-aa43-4bbc-b813-5ca9dcc8961a/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 352ed7518bf9905c884f474ee3ff2a686e180ab5 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:21:48,920 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:21:48,921 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:21:48,928 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:21:48,929 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:21:48,929 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:21:48,930 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:21:48,932 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:21:48,933 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:21:48,933 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:21:48,934 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:21:48,935 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:21:48,935 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:21:48,936 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:21:48,937 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:21:48,937 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:21:48,938 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:21:48,939 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:21:48,940 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:21:48,941 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:21:48,942 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:21:48,943 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:21:48,944 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:21:48,944 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:21:48,946 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:21:48,946 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:21:48,946 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:21:48,947 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:21:48,947 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:21:48,948 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:21:48,948 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:21:48,948 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:21:48,949 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:21:48,949 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:21:48,950 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:21:48,950 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:21:48,950 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:21:48,950 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:21:48,951 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:21:48,951 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:21:48,952 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:21:48,952 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_ceb31cbf-aa43-4bbc-b813-5ca9dcc8961a/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 15:21:48,961 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:21:48,961 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:21:48,962 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 15:21:48,962 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 15:21:48,962 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 15:21:48,963 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:21:48,963 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:21:48,963 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:21:48,963 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:21:48,963 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:21:48,963 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:21:48,964 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:21:48,964 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:21:48,964 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:21:48,964 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:21:48,964 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:21:48,964 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:21:48,964 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:21:48,965 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 15:21:48,965 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:21:48,965 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:21:48,965 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:21:48,965 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:21:48,965 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:21:48,965 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:21:48,966 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 15:21:48,966 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:21:48,966 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:21:48,966 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:21:48,966 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_ceb31cbf-aa43-4bbc-b813-5ca9dcc8961a/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 352ed7518bf9905c884f474ee3ff2a686e180ab5 [2019-12-07 15:21:49,067 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:21:49,077 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:21:49,079 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:21:49,081 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:21:49,081 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:21:49,082 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_ceb31cbf-aa43-4bbc-b813-5ca9dcc8961a/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix053_power.opt.i [2019-12-07 15:21:49,124 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ceb31cbf-aa43-4bbc-b813-5ca9dcc8961a/bin/uautomizer/data/82f8e5205/d11d9eb295784549a1fd8db27b0d6ae5/FLAG157313623 [2019-12-07 15:21:49,584 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:21:49,585 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_ceb31cbf-aa43-4bbc-b813-5ca9dcc8961a/sv-benchmarks/c/pthread-wmm/mix053_power.opt.i [2019-12-07 15:21:49,595 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ceb31cbf-aa43-4bbc-b813-5ca9dcc8961a/bin/uautomizer/data/82f8e5205/d11d9eb295784549a1fd8db27b0d6ae5/FLAG157313623 [2019-12-07 15:21:49,603 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_ceb31cbf-aa43-4bbc-b813-5ca9dcc8961a/bin/uautomizer/data/82f8e5205/d11d9eb295784549a1fd8db27b0d6ae5 [2019-12-07 15:21:49,605 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:21:49,606 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:21:49,607 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:21:49,607 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:21:49,609 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:21:49,610 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:21:49" (1/1) ... [2019-12-07 15:21:49,611 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@650fc3e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:21:49, skipping insertion in model container [2019-12-07 15:21:49,611 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:21:49" (1/1) ... [2019-12-07 15:21:49,616 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:21:49,642 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:21:49,884 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:21:49,893 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:21:49,937 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:21:49,986 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:21:49,986 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:21:49 WrapperNode [2019-12-07 15:21:49,986 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:21:49,987 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:21:49,987 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:21:49,987 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:21:49,993 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:21:49" (1/1) ... [2019-12-07 15:21:50,007 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:21:49" (1/1) ... [2019-12-07 15:21:50,029 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:21:50,029 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:21:50,030 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:21:50,030 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:21:50,037 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:21:49" (1/1) ... [2019-12-07 15:21:50,037 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:21:49" (1/1) ... [2019-12-07 15:21:50,041 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:21:49" (1/1) ... [2019-12-07 15:21:50,041 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:21:49" (1/1) ... [2019-12-07 15:21:50,049 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:21:49" (1/1) ... [2019-12-07 15:21:50,051 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:21:49" (1/1) ... [2019-12-07 15:21:50,054 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:21:49" (1/1) ... [2019-12-07 15:21:50,058 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:21:50,058 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:21:50,058 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:21:50,059 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:21:50,059 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:21:49" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_ceb31cbf-aa43-4bbc-b813-5ca9dcc8961a/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:21:50,103 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:21:50,104 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:21:50,104 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:21:50,104 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:21:50,104 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:21:50,104 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:21:50,104 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:21:50,104 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:21:50,104 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 15:21:50,105 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 15:21:50,105 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 15:21:50,105 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 15:21:50,105 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:21:50,105 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:21:50,105 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:21:50,107 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:21:50,442 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:21:50,442 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 15:21:50,443 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:21:50 BoogieIcfgContainer [2019-12-07 15:21:50,443 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:21:50,443 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:21:50,443 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:21:50,445 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:21:50,445 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:21:49" (1/3) ... [2019-12-07 15:21:50,446 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3632d4fb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:21:50, skipping insertion in model container [2019-12-07 15:21:50,446 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:21:49" (2/3) ... [2019-12-07 15:21:50,446 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3632d4fb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:21:50, skipping insertion in model container [2019-12-07 15:21:50,446 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:21:50" (3/3) ... [2019-12-07 15:21:50,447 INFO L109 eAbstractionObserver]: Analyzing ICFG mix053_power.opt.i [2019-12-07 15:21:50,453 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:21:50,453 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:21:50,458 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 15:21:50,458 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:21:50,483 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,483 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,483 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,483 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,483 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,483 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,484 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,484 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,484 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,484 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,484 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,484 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,485 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,485 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,487 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,487 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,487 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,487 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,487 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,487 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,487 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,487 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,487 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,488 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,488 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,488 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,488 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,488 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,488 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,488 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,488 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,488 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,489 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,489 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,489 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,489 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,489 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,489 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,489 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,489 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,489 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,490 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,490 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,490 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,490 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,490 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,490 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,490 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,490 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,491 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,491 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,491 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,491 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,491 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,491 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,491 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,491 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,491 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,492 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,492 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,492 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,492 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,492 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,492 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,492 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,492 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,492 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,492 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,493 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,493 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,493 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,493 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,493 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,493 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,493 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,493 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,493 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,494 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,494 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,494 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,494 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,494 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,494 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,494 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,494 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,494 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,495 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,495 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,495 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,495 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,495 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,495 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,495 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,496 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,496 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,496 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,496 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,496 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,496 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,496 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,497 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,497 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,497 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,497 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,497 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,497 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,497 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,497 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,498 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,498 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,498 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,498 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,498 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,498 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,498 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,498 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,498 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,499 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,499 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,499 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,499 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,499 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,499 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,499 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,499 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,499 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,499 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:21:50,514 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 15:21:50,532 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:21:50,532 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:21:50,532 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:21:50,532 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:21:50,532 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:21:50,532 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:21:50,532 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:21:50,533 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:21:50,547 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 167 places, 189 transitions [2019-12-07 15:21:50,549 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 167 places, 189 transitions [2019-12-07 15:21:50,611 INFO L134 PetriNetUnfolder]: 35/185 cut-off events. [2019-12-07 15:21:50,612 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:21:50,623 INFO L76 FinitePrefix]: Finished finitePrefix Result has 198 conditions, 185 events. 35/185 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 568 event pairs. 12/160 useless extension candidates. Maximal degree in co-relation 154. Up to 2 conditions per place. [2019-12-07 15:21:50,639 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 167 places, 189 transitions [2019-12-07 15:21:50,673 INFO L134 PetriNetUnfolder]: 35/185 cut-off events. [2019-12-07 15:21:50,673 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:21:50,677 INFO L76 FinitePrefix]: Finished finitePrefix Result has 198 conditions, 185 events. 35/185 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 568 event pairs. 12/160 useless extension candidates. Maximal degree in co-relation 154. Up to 2 conditions per place. [2019-12-07 15:21:50,688 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12650 [2019-12-07 15:21:50,689 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:21:53,426 WARN L192 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 46 [2019-12-07 15:21:53,757 WARN L192 SmtUtils]: Spent 174.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 15:21:53,852 INFO L206 etLargeBlockEncoding]: Checked pairs total: 48182 [2019-12-07 15:21:53,852 INFO L214 etLargeBlockEncoding]: Total number of compositions: 118 [2019-12-07 15:21:53,855 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 78 places, 86 transitions [2019-12-07 15:21:55,203 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 25454 states. [2019-12-07 15:21:55,204 INFO L276 IsEmpty]: Start isEmpty. Operand 25454 states. [2019-12-07 15:21:55,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 15:21:55,209 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:21:55,209 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:21:55,210 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:21:55,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:21:55,213 INFO L82 PathProgramCache]: Analyzing trace with hash 1973922445, now seen corresponding path program 1 times [2019-12-07 15:21:55,218 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:21:55,219 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1007085483] [2019-12-07 15:21:55,219 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:21:55,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:21:55,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:21:55,368 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1007085483] [2019-12-07 15:21:55,369 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:21:55,369 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:21:55,370 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [971555381] [2019-12-07 15:21:55,373 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:21:55,373 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:21:55,381 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:21:55,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:21:55,383 INFO L87 Difference]: Start difference. First operand 25454 states. Second operand 3 states. [2019-12-07 15:21:55,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:21:55,717 INFO L93 Difference]: Finished difference Result 24966 states and 109408 transitions. [2019-12-07 15:21:55,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:21:55,719 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 15:21:55,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:21:55,875 INFO L225 Difference]: With dead ends: 24966 [2019-12-07 15:21:55,875 INFO L226 Difference]: Without dead ends: 23406 [2019-12-07 15:21:55,876 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:21:56,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23406 states. [2019-12-07 15:21:56,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23406 to 23406. [2019-12-07 15:21:56,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23406 states. [2019-12-07 15:21:56,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23406 states to 23406 states and 102424 transitions. [2019-12-07 15:21:56,652 INFO L78 Accepts]: Start accepts. Automaton has 23406 states and 102424 transitions. Word has length 9 [2019-12-07 15:21:56,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:21:56,653 INFO L462 AbstractCegarLoop]: Abstraction has 23406 states and 102424 transitions. [2019-12-07 15:21:56,653 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:21:56,653 INFO L276 IsEmpty]: Start isEmpty. Operand 23406 states and 102424 transitions. [2019-12-07 15:21:56,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 15:21:56,660 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:21:56,660 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:21:56,660 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:21:56,660 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:21:56,661 INFO L82 PathProgramCache]: Analyzing trace with hash 918860120, now seen corresponding path program 1 times [2019-12-07 15:21:56,661 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:21:56,661 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1379368791] [2019-12-07 15:21:56,661 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:21:56,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:21:56,737 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:21:56,737 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1379368791] [2019-12-07 15:21:56,738 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:21:56,738 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:21:56,738 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [154953148] [2019-12-07 15:21:56,739 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:21:56,739 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:21:56,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:21:56,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:21:56,739 INFO L87 Difference]: Start difference. First operand 23406 states and 102424 transitions. Second operand 4 states. [2019-12-07 15:21:57,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:21:57,075 INFO L93 Difference]: Finished difference Result 36358 states and 153628 transitions. [2019-12-07 15:21:57,076 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:21:57,076 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 15:21:57,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:21:57,182 INFO L225 Difference]: With dead ends: 36358 [2019-12-07 15:21:57,182 INFO L226 Difference]: Without dead ends: 36298 [2019-12-07 15:21:57,183 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:21:57,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36298 states. [2019-12-07 15:21:57,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36298 to 32658. [2019-12-07 15:21:57,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32658 states. [2019-12-07 15:21:58,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32658 states to 32658 states and 139904 transitions. [2019-12-07 15:21:58,081 INFO L78 Accepts]: Start accepts. Automaton has 32658 states and 139904 transitions. Word has length 15 [2019-12-07 15:21:58,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:21:58,082 INFO L462 AbstractCegarLoop]: Abstraction has 32658 states and 139904 transitions. [2019-12-07 15:21:58,082 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:21:58,082 INFO L276 IsEmpty]: Start isEmpty. Operand 32658 states and 139904 transitions. [2019-12-07 15:21:58,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:21:58,087 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:21:58,087 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:21:58,087 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:21:58,087 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:21:58,088 INFO L82 PathProgramCache]: Analyzing trace with hash -1944850996, now seen corresponding path program 1 times [2019-12-07 15:21:58,088 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:21:58,088 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [122983181] [2019-12-07 15:21:58,088 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:21:58,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:21:58,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:21:58,124 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [122983181] [2019-12-07 15:21:58,124 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:21:58,124 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:21:58,124 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [391536702] [2019-12-07 15:21:58,125 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:21:58,125 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:21:58,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:21:58,125 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:21:58,125 INFO L87 Difference]: Start difference. First operand 32658 states and 139904 transitions. Second operand 3 states. [2019-12-07 15:21:58,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:21:58,323 INFO L93 Difference]: Finished difference Result 43534 states and 182660 transitions. [2019-12-07 15:21:58,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:21:58,324 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:21:58,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:21:58,592 INFO L225 Difference]: With dead ends: 43534 [2019-12-07 15:21:58,593 INFO L226 Difference]: Without dead ends: 43534 [2019-12-07 15:21:58,593 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:21:58,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43534 states. [2019-12-07 15:21:59,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43534 to 36962. [2019-12-07 15:21:59,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36962 states. [2019-12-07 15:21:59,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36962 states to 36962 states and 157208 transitions. [2019-12-07 15:21:59,409 INFO L78 Accepts]: Start accepts. Automaton has 36962 states and 157208 transitions. Word has length 18 [2019-12-07 15:21:59,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:21:59,409 INFO L462 AbstractCegarLoop]: Abstraction has 36962 states and 157208 transitions. [2019-12-07 15:21:59,409 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:21:59,409 INFO L276 IsEmpty]: Start isEmpty. Operand 36962 states and 157208 transitions. [2019-12-07 15:21:59,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:21:59,415 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:21:59,416 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:21:59,416 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:21:59,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:21:59,416 INFO L82 PathProgramCache]: Analyzing trace with hash -1944972733, now seen corresponding path program 1 times [2019-12-07 15:21:59,416 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:21:59,416 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47313668] [2019-12-07 15:21:59,416 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:21:59,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:21:59,467 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:21:59,468 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47313668] [2019-12-07 15:21:59,468 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:21:59,468 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:21:59,468 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [197907012] [2019-12-07 15:21:59,468 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:21:59,468 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:21:59,468 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:21:59,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:21:59,469 INFO L87 Difference]: Start difference. First operand 36962 states and 157208 transitions. Second operand 4 states. [2019-12-07 15:21:59,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:21:59,853 INFO L93 Difference]: Finished difference Result 44442 states and 186032 transitions. [2019-12-07 15:21:59,854 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:21:59,854 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2019-12-07 15:21:59,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:21:59,953 INFO L225 Difference]: With dead ends: 44442 [2019-12-07 15:21:59,953 INFO L226 Difference]: Without dead ends: 44402 [2019-12-07 15:21:59,953 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:22:00,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44402 states. [2019-12-07 15:22:00,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44402 to 38806. [2019-12-07 15:22:00,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38806 states. [2019-12-07 15:22:00,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38806 states to 38806 states and 164516 transitions. [2019-12-07 15:22:00,940 INFO L78 Accepts]: Start accepts. Automaton has 38806 states and 164516 transitions. Word has length 18 [2019-12-07 15:22:00,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:00,940 INFO L462 AbstractCegarLoop]: Abstraction has 38806 states and 164516 transitions. [2019-12-07 15:22:00,940 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:22:00,940 INFO L276 IsEmpty]: Start isEmpty. Operand 38806 states and 164516 transitions. [2019-12-07 15:22:00,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:22:00,946 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:00,946 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:00,946 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:00,946 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:00,946 INFO L82 PathProgramCache]: Analyzing trace with hash -760266034, now seen corresponding path program 1 times [2019-12-07 15:22:00,946 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:00,946 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2126954840] [2019-12-07 15:22:00,947 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:00,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:00,983 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:00,983 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2126954840] [2019-12-07 15:22:00,984 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:00,984 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:22:00,984 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [794913074] [2019-12-07 15:22:00,984 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:22:00,984 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:00,985 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:22:00,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:22:00,985 INFO L87 Difference]: Start difference. First operand 38806 states and 164516 transitions. Second operand 4 states. [2019-12-07 15:22:01,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:01,291 INFO L93 Difference]: Finished difference Result 49014 states and 205764 transitions. [2019-12-07 15:22:01,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:22:01,292 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2019-12-07 15:22:01,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:01,403 INFO L225 Difference]: With dead ends: 49014 [2019-12-07 15:22:01,403 INFO L226 Difference]: Without dead ends: 48954 [2019-12-07 15:22:01,404 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:22:01,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48954 states. [2019-12-07 15:22:02,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48954 to 40442. [2019-12-07 15:22:02,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40442 states. [2019-12-07 15:22:02,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40442 states to 40442 states and 171796 transitions. [2019-12-07 15:22:02,451 INFO L78 Accepts]: Start accepts. Automaton has 40442 states and 171796 transitions. Word has length 18 [2019-12-07 15:22:02,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:02,451 INFO L462 AbstractCegarLoop]: Abstraction has 40442 states and 171796 transitions. [2019-12-07 15:22:02,451 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:22:02,451 INFO L276 IsEmpty]: Start isEmpty. Operand 40442 states and 171796 transitions. [2019-12-07 15:22:02,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 15:22:02,462 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:02,462 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:02,462 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:02,463 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:02,463 INFO L82 PathProgramCache]: Analyzing trace with hash 1833759190, now seen corresponding path program 1 times [2019-12-07 15:22:02,463 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:02,463 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695327817] [2019-12-07 15:22:02,463 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:02,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:02,522 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:02,522 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [695327817] [2019-12-07 15:22:02,522 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:02,523 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:22:02,523 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [751991207] [2019-12-07 15:22:02,523 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:22:02,523 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:02,523 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:22:02,523 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:22:02,523 INFO L87 Difference]: Start difference. First operand 40442 states and 171796 transitions. Second operand 3 states. [2019-12-07 15:22:02,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:02,813 INFO L93 Difference]: Finished difference Result 70689 states and 287794 transitions. [2019-12-07 15:22:02,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:22:02,814 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 15:22:02,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:02,966 INFO L225 Difference]: With dead ends: 70689 [2019-12-07 15:22:02,967 INFO L226 Difference]: Without dead ends: 68529 [2019-12-07 15:22:02,967 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:22:03,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68529 states. [2019-12-07 15:22:04,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68529 to 65870. [2019-12-07 15:22:04,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65870 states. [2019-12-07 15:22:04,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65870 states to 65870 states and 269267 transitions. [2019-12-07 15:22:04,466 INFO L78 Accepts]: Start accepts. Automaton has 65870 states and 269267 transitions. Word has length 20 [2019-12-07 15:22:04,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:04,467 INFO L462 AbstractCegarLoop]: Abstraction has 65870 states and 269267 transitions. [2019-12-07 15:22:04,467 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:22:04,467 INFO L276 IsEmpty]: Start isEmpty. Operand 65870 states and 269267 transitions. [2019-12-07 15:22:04,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 15:22:04,485 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:04,485 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:04,485 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:04,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:04,485 INFO L82 PathProgramCache]: Analyzing trace with hash -275146156, now seen corresponding path program 1 times [2019-12-07 15:22:04,485 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:04,485 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869924245] [2019-12-07 15:22:04,485 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:04,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:04,520 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:04,520 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869924245] [2019-12-07 15:22:04,521 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:04,521 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:22:04,521 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [717326577] [2019-12-07 15:22:04,521 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:22:04,521 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:04,521 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:22:04,521 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:22:04,521 INFO L87 Difference]: Start difference. First operand 65870 states and 269267 transitions. Second operand 3 states. [2019-12-07 15:22:04,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:04,783 INFO L93 Difference]: Finished difference Result 65870 states and 265956 transitions. [2019-12-07 15:22:04,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:22:04,784 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 15:22:04,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:04,930 INFO L225 Difference]: With dead ends: 65870 [2019-12-07 15:22:04,930 INFO L226 Difference]: Without dead ends: 65870 [2019-12-07 15:22:04,930 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:22:05,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65870 states. [2019-12-07 15:22:06,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65870 to 64440. [2019-12-07 15:22:06,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64440 states. [2019-12-07 15:22:06,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64440 states to 64440 states and 260872 transitions. [2019-12-07 15:22:06,400 INFO L78 Accepts]: Start accepts. Automaton has 64440 states and 260872 transitions. Word has length 21 [2019-12-07 15:22:06,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:06,401 INFO L462 AbstractCegarLoop]: Abstraction has 64440 states and 260872 transitions. [2019-12-07 15:22:06,401 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:22:06,401 INFO L276 IsEmpty]: Start isEmpty. Operand 64440 states and 260872 transitions. [2019-12-07 15:22:06,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 15:22:06,416 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:06,416 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:06,417 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:06,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:06,417 INFO L82 PathProgramCache]: Analyzing trace with hash 1829227400, now seen corresponding path program 1 times [2019-12-07 15:22:06,417 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:06,417 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [258178820] [2019-12-07 15:22:06,417 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:06,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:06,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:06,446 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [258178820] [2019-12-07 15:22:06,446 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:06,446 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:22:06,446 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [580590496] [2019-12-07 15:22:06,446 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:22:06,446 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:06,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:22:06,447 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:22:06,447 INFO L87 Difference]: Start difference. First operand 64440 states and 260872 transitions. Second operand 3 states. [2019-12-07 15:22:06,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:06,697 INFO L93 Difference]: Finished difference Result 63619 states and 256546 transitions. [2019-12-07 15:22:06,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:22:06,697 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 15:22:06,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:06,833 INFO L225 Difference]: With dead ends: 63619 [2019-12-07 15:22:06,833 INFO L226 Difference]: Without dead ends: 62987 [2019-12-07 15:22:06,833 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:22:07,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62987 states. [2019-12-07 15:22:08,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62987 to 62987. [2019-12-07 15:22:08,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62987 states. [2019-12-07 15:22:08,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62987 states to 62987 states and 254127 transitions. [2019-12-07 15:22:08,175 INFO L78 Accepts]: Start accepts. Automaton has 62987 states and 254127 transitions. Word has length 21 [2019-12-07 15:22:08,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:08,175 INFO L462 AbstractCegarLoop]: Abstraction has 62987 states and 254127 transitions. [2019-12-07 15:22:08,175 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:22:08,175 INFO L276 IsEmpty]: Start isEmpty. Operand 62987 states and 254127 transitions. [2019-12-07 15:22:08,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:22:08,193 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:08,193 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:08,193 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:08,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:08,194 INFO L82 PathProgramCache]: Analyzing trace with hash -482300191, now seen corresponding path program 1 times [2019-12-07 15:22:08,194 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:08,194 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1721111414] [2019-12-07 15:22:08,194 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:08,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:08,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:08,237 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1721111414] [2019-12-07 15:22:08,237 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:08,237 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:22:08,237 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [859651886] [2019-12-07 15:22:08,238 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:22:08,238 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:08,238 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:22:08,238 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:22:08,238 INFO L87 Difference]: Start difference. First operand 62987 states and 254127 transitions. Second operand 4 states. [2019-12-07 15:22:08,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:08,550 INFO L93 Difference]: Finished difference Result 80503 states and 308742 transitions. [2019-12-07 15:22:08,551 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:22:08,551 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2019-12-07 15:22:08,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:08,685 INFO L225 Difference]: With dead ends: 80503 [2019-12-07 15:22:08,685 INFO L226 Difference]: Without dead ends: 63600 [2019-12-07 15:22:08,685 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:22:08,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63600 states. [2019-12-07 15:22:09,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63600 to 53716. [2019-12-07 15:22:09,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53716 states. [2019-12-07 15:22:09,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53716 states to 53716 states and 198559 transitions. [2019-12-07 15:22:09,824 INFO L78 Accepts]: Start accepts. Automaton has 53716 states and 198559 transitions. Word has length 22 [2019-12-07 15:22:09,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:09,824 INFO L462 AbstractCegarLoop]: Abstraction has 53716 states and 198559 transitions. [2019-12-07 15:22:09,824 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:22:09,825 INFO L276 IsEmpty]: Start isEmpty. Operand 53716 states and 198559 transitions. [2019-12-07 15:22:09,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:22:09,841 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:09,841 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:09,841 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:09,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:09,841 INFO L82 PathProgramCache]: Analyzing trace with hash 907111406, now seen corresponding path program 1 times [2019-12-07 15:22:09,842 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:09,842 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1534736198] [2019-12-07 15:22:09,842 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:09,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:09,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:09,872 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1534736198] [2019-12-07 15:22:09,872 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:09,872 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:22:09,872 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [363216059] [2019-12-07 15:22:09,872 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:22:09,873 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:09,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:22:09,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:22:09,873 INFO L87 Difference]: Start difference. First operand 53716 states and 198559 transitions. Second operand 4 states. [2019-12-07 15:22:09,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:09,948 INFO L93 Difference]: Finished difference Result 21609 states and 68201 transitions. [2019-12-07 15:22:09,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:22:09,948 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2019-12-07 15:22:09,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:09,975 INFO L225 Difference]: With dead ends: 21609 [2019-12-07 15:22:09,975 INFO L226 Difference]: Without dead ends: 21609 [2019-12-07 15:22:09,976 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:22:10,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21609 states. [2019-12-07 15:22:10,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21609 to 21493. [2019-12-07 15:22:10,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21493 states. [2019-12-07 15:22:10,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21493 states to 21493 states and 67867 transitions. [2019-12-07 15:22:10,354 INFO L78 Accepts]: Start accepts. Automaton has 21493 states and 67867 transitions. Word has length 22 [2019-12-07 15:22:10,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:10,354 INFO L462 AbstractCegarLoop]: Abstraction has 21493 states and 67867 transitions. [2019-12-07 15:22:10,354 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:22:10,354 INFO L276 IsEmpty]: Start isEmpty. Operand 21493 states and 67867 transitions. [2019-12-07 15:22:10,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 15:22:10,360 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:10,360 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:10,361 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:10,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:10,361 INFO L82 PathProgramCache]: Analyzing trace with hash -2030767179, now seen corresponding path program 1 times [2019-12-07 15:22:10,361 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:10,361 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [704305386] [2019-12-07 15:22:10,361 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:10,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:10,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:10,400 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [704305386] [2019-12-07 15:22:10,400 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:10,400 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:22:10,400 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1207190885] [2019-12-07 15:22:10,400 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:22:10,400 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:10,400 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:22:10,400 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:22:10,400 INFO L87 Difference]: Start difference. First operand 21493 states and 67867 transitions. Second operand 5 states. [2019-12-07 15:22:10,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:10,435 INFO L93 Difference]: Finished difference Result 5085 states and 13746 transitions. [2019-12-07 15:22:10,435 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:22:10,435 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2019-12-07 15:22:10,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:10,439 INFO L225 Difference]: With dead ends: 5085 [2019-12-07 15:22:10,440 INFO L226 Difference]: Without dead ends: 5085 [2019-12-07 15:22:10,440 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:22:10,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5085 states. [2019-12-07 15:22:10,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5085 to 4486. [2019-12-07 15:22:10,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4486 states. [2019-12-07 15:22:10,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4486 states to 4486 states and 12330 transitions. [2019-12-07 15:22:10,488 INFO L78 Accepts]: Start accepts. Automaton has 4486 states and 12330 transitions. Word has length 23 [2019-12-07 15:22:10,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:10,488 INFO L462 AbstractCegarLoop]: Abstraction has 4486 states and 12330 transitions. [2019-12-07 15:22:10,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:22:10,489 INFO L276 IsEmpty]: Start isEmpty. Operand 4486 states and 12330 transitions. [2019-12-07 15:22:10,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 15:22:10,493 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:10,493 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:10,493 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:10,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:10,493 INFO L82 PathProgramCache]: Analyzing trace with hash 882681234, now seen corresponding path program 1 times [2019-12-07 15:22:10,493 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:10,493 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1050173185] [2019-12-07 15:22:10,494 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:10,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:10,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:10,529 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1050173185] [2019-12-07 15:22:10,530 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:10,530 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:22:10,530 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1484448936] [2019-12-07 15:22:10,530 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:22:10,530 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:10,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:22:10,531 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:22:10,531 INFO L87 Difference]: Start difference. First operand 4486 states and 12330 transitions. Second operand 5 states. [2019-12-07 15:22:10,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:10,652 INFO L93 Difference]: Finished difference Result 5732 states and 15248 transitions. [2019-12-07 15:22:10,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:22:10,652 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 32 [2019-12-07 15:22:10,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:10,657 INFO L225 Difference]: With dead ends: 5732 [2019-12-07 15:22:10,657 INFO L226 Difference]: Without dead ends: 5666 [2019-12-07 15:22:10,657 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:22:10,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5666 states. [2019-12-07 15:22:10,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5666 to 4746. [2019-12-07 15:22:10,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4746 states. [2019-12-07 15:22:10,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4746 states to 4746 states and 12993 transitions. [2019-12-07 15:22:10,708 INFO L78 Accepts]: Start accepts. Automaton has 4746 states and 12993 transitions. Word has length 32 [2019-12-07 15:22:10,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:10,708 INFO L462 AbstractCegarLoop]: Abstraction has 4746 states and 12993 transitions. [2019-12-07 15:22:10,708 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:22:10,708 INFO L276 IsEmpty]: Start isEmpty. Operand 4746 states and 12993 transitions. [2019-12-07 15:22:10,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 15:22:10,712 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:10,713 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:10,713 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:10,713 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:10,713 INFO L82 PathProgramCache]: Analyzing trace with hash 1233303667, now seen corresponding path program 1 times [2019-12-07 15:22:10,713 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:10,713 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1720643250] [2019-12-07 15:22:10,713 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:10,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:10,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:10,734 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1720643250] [2019-12-07 15:22:10,734 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:10,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:22:10,735 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1571973207] [2019-12-07 15:22:10,735 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:22:10,735 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:10,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:22:10,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:22:10,735 INFO L87 Difference]: Start difference. First operand 4746 states and 12993 transitions. Second operand 3 states. [2019-12-07 15:22:10,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:10,769 INFO L93 Difference]: Finished difference Result 5164 states and 13270 transitions. [2019-12-07 15:22:10,769 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:22:10,769 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 32 [2019-12-07 15:22:10,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:10,774 INFO L225 Difference]: With dead ends: 5164 [2019-12-07 15:22:10,774 INFO L226 Difference]: Without dead ends: 5164 [2019-12-07 15:22:10,774 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:22:10,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5164 states. [2019-12-07 15:22:10,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5164 to 4658. [2019-12-07 15:22:10,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4658 states. [2019-12-07 15:22:10,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4658 states to 4658 states and 12085 transitions. [2019-12-07 15:22:10,824 INFO L78 Accepts]: Start accepts. Automaton has 4658 states and 12085 transitions. Word has length 32 [2019-12-07 15:22:10,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:10,824 INFO L462 AbstractCegarLoop]: Abstraction has 4658 states and 12085 transitions. [2019-12-07 15:22:10,824 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:22:10,824 INFO L276 IsEmpty]: Start isEmpty. Operand 4658 states and 12085 transitions. [2019-12-07 15:22:10,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:22:10,828 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:10,828 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:10,829 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:10,829 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:10,829 INFO L82 PathProgramCache]: Analyzing trace with hash 1540331556, now seen corresponding path program 1 times [2019-12-07 15:22:10,829 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:10,829 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [385558310] [2019-12-07 15:22:10,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:10,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:10,862 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:10,862 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [385558310] [2019-12-07 15:22:10,862 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:10,862 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:22:10,863 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [378989226] [2019-12-07 15:22:10,863 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:22:10,863 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:10,863 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:22:10,863 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:22:10,863 INFO L87 Difference]: Start difference. First operand 4658 states and 12085 transitions. Second operand 5 states. [2019-12-07 15:22:10,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:10,989 INFO L93 Difference]: Finished difference Result 5265 states and 13401 transitions. [2019-12-07 15:22:10,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:22:10,990 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 33 [2019-12-07 15:22:10,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:10,994 INFO L225 Difference]: With dead ends: 5265 [2019-12-07 15:22:10,994 INFO L226 Difference]: Without dead ends: 5182 [2019-12-07 15:22:10,994 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:22:11,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5182 states. [2019-12-07 15:22:11,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5182 to 4401. [2019-12-07 15:22:11,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4401 states. [2019-12-07 15:22:11,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4401 states to 4401 states and 11433 transitions. [2019-12-07 15:22:11,041 INFO L78 Accepts]: Start accepts. Automaton has 4401 states and 11433 transitions. Word has length 33 [2019-12-07 15:22:11,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:11,041 INFO L462 AbstractCegarLoop]: Abstraction has 4401 states and 11433 transitions. [2019-12-07 15:22:11,041 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:22:11,041 INFO L276 IsEmpty]: Start isEmpty. Operand 4401 states and 11433 transitions. [2019-12-07 15:22:11,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:22:11,045 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:11,045 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:11,045 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:11,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:11,046 INFO L82 PathProgramCache]: Analyzing trace with hash -513213168, now seen corresponding path program 1 times [2019-12-07 15:22:11,046 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:11,046 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [718893097] [2019-12-07 15:22:11,046 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:11,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:11,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:11,092 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [718893097] [2019-12-07 15:22:11,092 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:11,092 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:22:11,092 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1411306087] [2019-12-07 15:22:11,092 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:22:11,092 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:11,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:22:11,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:22:11,093 INFO L87 Difference]: Start difference. First operand 4401 states and 11433 transitions. Second operand 4 states. [2019-12-07 15:22:11,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:11,137 INFO L93 Difference]: Finished difference Result 6716 states and 17073 transitions. [2019-12-07 15:22:11,137 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:22:11,137 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2019-12-07 15:22:11,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:11,143 INFO L225 Difference]: With dead ends: 6716 [2019-12-07 15:22:11,143 INFO L226 Difference]: Without dead ends: 6226 [2019-12-07 15:22:11,143 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:22:11,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6226 states. [2019-12-07 15:22:11,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6226 to 4109. [2019-12-07 15:22:11,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4109 states. [2019-12-07 15:22:11,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4109 states to 4109 states and 10720 transitions. [2019-12-07 15:22:11,194 INFO L78 Accepts]: Start accepts. Automaton has 4109 states and 10720 transitions. Word has length 33 [2019-12-07 15:22:11,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:11,195 INFO L462 AbstractCegarLoop]: Abstraction has 4109 states and 10720 transitions. [2019-12-07 15:22:11,195 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:22:11,195 INFO L276 IsEmpty]: Start isEmpty. Operand 4109 states and 10720 transitions. [2019-12-07 15:22:11,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 15:22:11,198 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:11,198 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:11,198 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:11,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:11,198 INFO L82 PathProgramCache]: Analyzing trace with hash 1411804038, now seen corresponding path program 1 times [2019-12-07 15:22:11,198 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:11,198 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1738924068] [2019-12-07 15:22:11,198 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:11,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:11,336 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:11,337 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1738924068] [2019-12-07 15:22:11,337 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:11,337 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:22:11,337 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [961463036] [2019-12-07 15:22:11,337 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 15:22:11,337 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:11,337 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 15:22:11,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:22:11,338 INFO L87 Difference]: Start difference. First operand 4109 states and 10720 transitions. Second operand 10 states. [2019-12-07 15:22:11,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:11,721 INFO L93 Difference]: Finished difference Result 8548 states and 21580 transitions. [2019-12-07 15:22:11,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:22:11,722 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2019-12-07 15:22:11,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:11,728 INFO L225 Difference]: With dead ends: 8548 [2019-12-07 15:22:11,729 INFO L226 Difference]: Without dead ends: 8548 [2019-12-07 15:22:11,729 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=88, Invalid=254, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:22:11,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8548 states. [2019-12-07 15:22:11,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8548 to 4146. [2019-12-07 15:22:11,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4146 states. [2019-12-07 15:22:11,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4146 states to 4146 states and 10807 transitions. [2019-12-07 15:22:11,787 INFO L78 Accepts]: Start accepts. Automaton has 4146 states and 10807 transitions. Word has length 34 [2019-12-07 15:22:11,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:11,787 INFO L462 AbstractCegarLoop]: Abstraction has 4146 states and 10807 transitions. [2019-12-07 15:22:11,787 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 15:22:11,787 INFO L276 IsEmpty]: Start isEmpty. Operand 4146 states and 10807 transitions. [2019-12-07 15:22:11,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 15:22:11,790 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:11,790 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:11,790 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:11,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:11,790 INFO L82 PathProgramCache]: Analyzing trace with hash 1558435352, now seen corresponding path program 2 times [2019-12-07 15:22:11,790 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:11,790 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [291038807] [2019-12-07 15:22:11,790 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:11,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:11,834 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:11,834 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [291038807] [2019-12-07 15:22:11,834 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:11,834 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:22:11,834 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [163850142] [2019-12-07 15:22:11,835 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:22:11,835 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:11,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:22:11,835 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:22:11,836 INFO L87 Difference]: Start difference. First operand 4146 states and 10807 transitions. Second operand 6 states. [2019-12-07 15:22:11,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:11,880 INFO L93 Difference]: Finished difference Result 2932 states and 8033 transitions. [2019-12-07 15:22:11,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:22:11,881 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 15:22:11,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:11,884 INFO L225 Difference]: With dead ends: 2932 [2019-12-07 15:22:11,884 INFO L226 Difference]: Without dead ends: 2235 [2019-12-07 15:22:11,884 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:22:11,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2235 states. [2019-12-07 15:22:11,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2235 to 1837. [2019-12-07 15:22:11,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1837 states. [2019-12-07 15:22:11,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1837 states to 1837 states and 5022 transitions. [2019-12-07 15:22:11,912 INFO L78 Accepts]: Start accepts. Automaton has 1837 states and 5022 transitions. Word has length 34 [2019-12-07 15:22:11,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:11,912 INFO L462 AbstractCegarLoop]: Abstraction has 1837 states and 5022 transitions. [2019-12-07 15:22:11,912 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:22:11,912 INFO L276 IsEmpty]: Start isEmpty. Operand 1837 states and 5022 transitions. [2019-12-07 15:22:11,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-12-07 15:22:11,915 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:11,915 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:11,915 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:11,915 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:11,915 INFO L82 PathProgramCache]: Analyzing trace with hash 801550181, now seen corresponding path program 1 times [2019-12-07 15:22:11,916 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:11,916 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1144495238] [2019-12-07 15:22:11,916 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:11,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:11,981 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:11,981 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1144495238] [2019-12-07 15:22:11,981 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:11,982 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:22:11,982 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [745116745] [2019-12-07 15:22:11,982 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:22:11,982 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:11,982 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:22:11,982 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:22:11,982 INFO L87 Difference]: Start difference. First operand 1837 states and 5022 transitions. Second operand 5 states. [2019-12-07 15:22:12,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:12,016 INFO L93 Difference]: Finished difference Result 3813 states and 10216 transitions. [2019-12-07 15:22:12,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:22:12,016 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 48 [2019-12-07 15:22:12,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:12,018 INFO L225 Difference]: With dead ends: 3813 [2019-12-07 15:22:12,018 INFO L226 Difference]: Without dead ends: 2335 [2019-12-07 15:22:12,018 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:22:12,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2335 states. [2019-12-07 15:22:12,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2335 to 1591. [2019-12-07 15:22:12,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1591 states. [2019-12-07 15:22:12,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1591 states to 1591 states and 4290 transitions. [2019-12-07 15:22:12,038 INFO L78 Accepts]: Start accepts. Automaton has 1591 states and 4290 transitions. Word has length 48 [2019-12-07 15:22:12,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:12,038 INFO L462 AbstractCegarLoop]: Abstraction has 1591 states and 4290 transitions. [2019-12-07 15:22:12,038 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:22:12,039 INFO L276 IsEmpty]: Start isEmpty. Operand 1591 states and 4290 transitions. [2019-12-07 15:22:12,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-12-07 15:22:12,040 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:12,040 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:12,040 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:12,040 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:12,040 INFO L82 PathProgramCache]: Analyzing trace with hash -704539785, now seen corresponding path program 2 times [2019-12-07 15:22:12,041 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:12,041 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1197318027] [2019-12-07 15:22:12,041 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:12,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:12,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:12,073 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1197318027] [2019-12-07 15:22:12,073 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:12,074 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:22:12,074 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1519361429] [2019-12-07 15:22:12,074 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:22:12,074 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:12,074 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:22:12,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:22:12,075 INFO L87 Difference]: Start difference. First operand 1591 states and 4290 transitions. Second operand 3 states. [2019-12-07 15:22:12,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:12,083 INFO L93 Difference]: Finished difference Result 2033 states and 5259 transitions. [2019-12-07 15:22:12,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:22:12,084 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2019-12-07 15:22:12,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:12,084 INFO L225 Difference]: With dead ends: 2033 [2019-12-07 15:22:12,084 INFO L226 Difference]: Without dead ends: 490 [2019-12-07 15:22:12,085 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:22:12,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 490 states. [2019-12-07 15:22:12,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 490 to 490. [2019-12-07 15:22:12,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 490 states. [2019-12-07 15:22:12,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 490 states to 490 states and 1054 transitions. [2019-12-07 15:22:12,090 INFO L78 Accepts]: Start accepts. Automaton has 490 states and 1054 transitions. Word has length 48 [2019-12-07 15:22:12,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:12,090 INFO L462 AbstractCegarLoop]: Abstraction has 490 states and 1054 transitions. [2019-12-07 15:22:12,090 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:22:12,090 INFO L276 IsEmpty]: Start isEmpty. Operand 490 states and 1054 transitions. [2019-12-07 15:22:12,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-12-07 15:22:12,091 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:12,091 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:12,091 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:12,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:12,091 INFO L82 PathProgramCache]: Analyzing trace with hash -880706143, now seen corresponding path program 3 times [2019-12-07 15:22:12,091 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:12,091 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1796626490] [2019-12-07 15:22:12,092 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:12,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:22:12,160 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:22:12,160 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1796626490] [2019-12-07 15:22:12,160 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:22:12,160 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:22:12,160 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [489715057] [2019-12-07 15:22:12,160 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:22:12,160 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:22:12,161 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:22:12,161 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:22:12,161 INFO L87 Difference]: Start difference. First operand 490 states and 1054 transitions. Second operand 7 states. [2019-12-07 15:22:12,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:22:12,314 INFO L93 Difference]: Finished difference Result 890 states and 1868 transitions. [2019-12-07 15:22:12,314 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 15:22:12,314 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 48 [2019-12-07 15:22:12,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:22:12,315 INFO L225 Difference]: With dead ends: 890 [2019-12-07 15:22:12,315 INFO L226 Difference]: Without dead ends: 604 [2019-12-07 15:22:12,315 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=48, Invalid=134, Unknown=0, NotChecked=0, Total=182 [2019-12-07 15:22:12,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 604 states. [2019-12-07 15:22:12,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 604 to 546. [2019-12-07 15:22:12,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 546 states. [2019-12-07 15:22:12,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 546 states to 546 states and 1139 transitions. [2019-12-07 15:22:12,319 INFO L78 Accepts]: Start accepts. Automaton has 546 states and 1139 transitions. Word has length 48 [2019-12-07 15:22:12,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:22:12,320 INFO L462 AbstractCegarLoop]: Abstraction has 546 states and 1139 transitions. [2019-12-07 15:22:12,320 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:22:12,320 INFO L276 IsEmpty]: Start isEmpty. Operand 546 states and 1139 transitions. [2019-12-07 15:22:12,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-12-07 15:22:12,320 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:22:12,320 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:22:12,320 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:22:12,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:22:12,321 INFO L82 PathProgramCache]: Analyzing trace with hash 81842901, now seen corresponding path program 4 times [2019-12-07 15:22:12,321 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:22:12,321 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [188004167] [2019-12-07 15:22:12,321 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:22:12,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:22:12,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:22:12,384 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 15:22:12,384 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:22:12,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] ULTIMATE.startENTRY-->L831: Formula: (let ((.cse0 (store |v_#valid_91| 0 0))) (and (= 0 v_~z$r_buff1_thd3~0_232) (= v_~weak$$choice2~0_162 0) (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t1413~0.base_44| 4) |v_#length_29|) (= v_~x~0_82 0) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1413~0.base_44| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1413~0.base_44|) |v_ULTIMATE.start_main_~#t1413~0.offset_29| 0)) |v_#memory_int_25|) (= v_~z$w_buff1~0_269 0) (= v_~z$mem_tmp~0_40 0) (= 0 v_~z$flush_delayed~0_66) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t1413~0.base_44|) (= v_~z$w_buff0_used~0_718 0) (= v_~z$r_buff0_thd2~0_22 0) (= v_~z$read_delayed~0_6 0) (= v_~z$read_delayed_var~0.base_8 0) (= 0 v_~z$r_buff0_thd4~0_134) (= v_~z$r_buff0_thd0~0_100 0) (= |v_#valid_89| (store .cse0 |v_ULTIMATE.start_main_~#t1413~0.base_44| 1)) (= v_~z$w_buff0~0_458 0) (= 0 v_~z$r_buff1_thd4~0_125) (= 0 |v_#NULL.base_4|) (= 0 |v_ULTIMATE.start_main_~#t1413~0.offset_29|) (= v_~__unbuffered_p3_EAX~0_102 0) (= v_~__unbuffered_cnt~0_156 0) (= 0 v_~weak$$choice0~0_37) (< 0 |v_#StackHeapBarrier_20|) (= 0 v_~__unbuffered_p2_EAX~0_62) (= v_~main$tmp_guard1~0_47 0) (= v_~y~0_80 0) (= v_~z$r_buff0_thd1~0_23 0) (= v_~a~0_45 0) (= |v_#NULL.offset_4| 0) (= v_~z$w_buff1_used~0_462 0) (= v_~z$r_buff1_thd0~0_156 0) (= v_~main$tmp_guard0~0_22 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1413~0.base_44|)) (= 0 v_~z$r_buff1_thd1~0_67) (= 0 v_~z$r_buff0_thd3~0_296) (= v_~z~0_165 0) (= v_~z$read_delayed_var~0.offset_8 0) (= 0 v_~z$r_buff1_thd2~0_67))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_91|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~nondet32=|v_ULTIMATE.start_main_#t~nondet32_8|, ULTIMATE.start_main_#t~nondet34=|v_ULTIMATE.start_main_#t~nondet34_9|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_67, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_~#t1415~0.base=|v_ULTIMATE.start_main_~#t1415~0.base_36|, ~a~0=v_~a~0_45, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_100, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_134, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_102, #length=|v_#length_29|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_62, ~z$mem_tmp~0=v_~z$mem_tmp~0_40, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_80|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_462, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_42|, ~z$flush_delayed~0=v_~z$flush_delayed~0_66, ULTIMATE.start_main_~#t1415~0.offset=|v_ULTIMATE.start_main_~#t1415~0.offset_20|, ~weak$$choice0~0=v_~weak$$choice0~0_37, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_30|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_67, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_8, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_296, ULTIMATE.start_main_~#t1413~0.base=|v_ULTIMATE.start_main_~#t1413~0.base_44|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_156, ~x~0=v_~x~0_82, ULTIMATE.start_main_~#t1416~0.offset=|v_ULTIMATE.start_main_~#t1416~0.offset_19|, ULTIMATE.start_main_~#t1414~0.offset=|v_ULTIMATE.start_main_~#t1414~0.offset_29|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_125, ULTIMATE.start_main_#t~nondet33=|v_ULTIMATE.start_main_#t~nondet33_9|, ULTIMATE.start_main_#t~nondet35=|v_ULTIMATE.start_main_#t~nondet35_22|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_269, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_47, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_8, ULTIMATE.start_main_~#t1414~0.base=|v_ULTIMATE.start_main_~#t1414~0.base_44|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_156, ~y~0=v_~y~0_80, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_22, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_718, ~z$w_buff0~0=v_~z$w_buff0~0_458, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_232, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_34|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_54|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_~#t1413~0.offset=|v_ULTIMATE.start_main_~#t1413~0.offset_29|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_106|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_34|, #valid=|v_#valid_89|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_~#t1416~0.base=|v_ULTIMATE.start_main_~#t1416~0.base_27|, ~z~0=v_~z~0_165, ~weak$$choice2~0=v_~weak$$choice2~0_162, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_23} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet32, ULTIMATE.start_main_#t~nondet34, ~z$r_buff1_thd2~0, #NULL.offset, ULTIMATE.start_main_~#t1415~0.base, ~a~0, ~z$r_buff0_thd0~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_~#t1415~0.offset, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t1413~0.base, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1416~0.offset, ULTIMATE.start_main_~#t1414~0.offset, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~nondet33, ULTIMATE.start_main_#t~nondet35, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1414~0.base, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1413~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t1416~0.base, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:22:12,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L831-1-->L833: Formula: (and (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1414~0.base_12|) (= 0 (select |v_#valid_45| |v_ULTIMATE.start_main_~#t1414~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t1414~0.offset_11|) (not (= |v_ULTIMATE.start_main_~#t1414~0.base_12| 0)) (= |v_#memory_int_17| (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1414~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1414~0.base_12|) |v_ULTIMATE.start_main_~#t1414~0.offset_11| 1))) (= |v_#valid_44| (store |v_#valid_45| |v_ULTIMATE.start_main_~#t1414~0.base_12| 1)) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1414~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1414~0.base=|v_ULTIMATE.start_main_~#t1414~0.base_12|, ULTIMATE.start_main_~#t1414~0.offset=|v_ULTIMATE.start_main_~#t1414~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~nondet32=|v_ULTIMATE.start_main_#t~nondet32_5|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_17|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1414~0.base, ULTIMATE.start_main_~#t1414~0.offset, ULTIMATE.start_main_#t~nondet32, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 15:22:12,388 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L833-1-->L835: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1415~0.base_11| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1415~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1415~0.base_11|) |v_ULTIMATE.start_main_~#t1415~0.offset_10| 2)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1415~0.base_11|) (= 0 |v_ULTIMATE.start_main_~#t1415~0.offset_10|) (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t1415~0.base_11|)) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t1415~0.base_11| 4)) (= |v_#valid_37| (store |v_#valid_38| |v_ULTIMATE.start_main_~#t1415~0.base_11| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~nondet33=|v_ULTIMATE.start_main_#t~nondet33_6|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1415~0.base=|v_ULTIMATE.start_main_~#t1415~0.base_11|, #length=|v_#length_19|, ULTIMATE.start_main_~#t1415~0.offset=|v_ULTIMATE.start_main_~#t1415~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet33, #valid, #memory_int, ULTIMATE.start_main_~#t1415~0.base, #length, ULTIMATE.start_main_~#t1415~0.offset] because there is no mapped edge [2019-12-07 15:22:12,388 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L835-1-->L837: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1416~0.base_12|)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1416~0.base_12| 4)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1416~0.base_12|) (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1416~0.base_12|)) (= |v_ULTIMATE.start_main_~#t1416~0.offset_10| 0) (= |v_#valid_48| (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1416~0.base_12| 1)) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1416~0.base_12| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1416~0.base_12|) |v_ULTIMATE.start_main_~#t1416~0.offset_10| 3)) |v_#memory_int_19|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet34=|v_ULTIMATE.start_main_#t~nondet34_6|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_19|, #length=|v_#length_23|, ULTIMATE.start_main_~#t1416~0.base=|v_ULTIMATE.start_main_~#t1416~0.base_12|, ULTIMATE.start_main_~#t1416~0.offset=|v_ULTIMATE.start_main_~#t1416~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet34, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1416~0.base, ULTIMATE.start_main_~#t1416~0.offset] because there is no mapped edge [2019-12-07 15:22:12,389 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] P3ENTRY-->L4-3: Formula: (and (= v_~z$w_buff0_used~0_100 v_~z$w_buff1_used~0_70) (= 1 v_~z$w_buff0~0_43) (= |v_P3Thread1of1ForFork1___VERIFIER_assert_#in~expression_13| v_P3Thread1of1ForFork1___VERIFIER_assert_~expression_15) (= v_P3Thread1of1ForFork1_~arg.offset_13 |v_P3Thread1of1ForFork1_#in~arg.offset_15|) (= v_P3Thread1of1ForFork1_~arg.base_13 |v_P3Thread1of1ForFork1_#in~arg.base_15|) (= v_~z$w_buff0_used~0_99 1) (= v_~z$w_buff0~0_44 v_~z$w_buff1~0_34) (not (= 0 v_P3Thread1of1ForFork1___VERIFIER_assert_~expression_15)) (= |v_P3Thread1of1ForFork1___VERIFIER_assert_#in~expression_13| (ite (not (and (not (= (mod v_~z$w_buff0_used~0_99 256) 0)) (not (= 0 (mod v_~z$w_buff1_used~0_70 256))))) 1 0))) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_100, ~z$w_buff0~0=v_~z$w_buff0~0_44, P3Thread1of1ForFork1_#in~arg.offset=|v_P3Thread1of1ForFork1_#in~arg.offset_15|, P3Thread1of1ForFork1_#in~arg.base=|v_P3Thread1of1ForFork1_#in~arg.base_15|} OutVars{P3Thread1of1ForFork1___VERIFIER_assert_~expression=v_P3Thread1of1ForFork1___VERIFIER_assert_~expression_15, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_99, ~z$w_buff0~0=v_~z$w_buff0~0_43, P3Thread1of1ForFork1_#in~arg.offset=|v_P3Thread1of1ForFork1_#in~arg.offset_15|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_70, P3Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P3Thread1of1ForFork1___VERIFIER_assert_#in~expression_13|, ~z$w_buff1~0=v_~z$w_buff1~0_34, P3Thread1of1ForFork1_~arg.offset=v_P3Thread1of1ForFork1_~arg.offset_13, P3Thread1of1ForFork1_#in~arg.base=|v_P3Thread1of1ForFork1_#in~arg.base_15|, P3Thread1of1ForFork1_~arg.base=v_P3Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[P3Thread1of1ForFork1___VERIFIER_assert_~expression, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, P3Thread1of1ForFork1___VERIFIER_assert_#in~expression, ~z$w_buff1~0, P3Thread1of1ForFork1_~arg.offset, P3Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 15:22:12,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [729] [729] P0ENTRY-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork2_#in~arg.offset_24| v_P0Thread1of1ForFork2_~arg.offset_22) (= v_P0Thread1of1ForFork2_~arg.base_22 |v_P0Thread1of1ForFork2_#in~arg.base_24|) (= v_~a~0_34 1) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_120 (+ v_~__unbuffered_cnt~0_121 1)) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|) (= v_~x~0_42 1)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_121, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_24|} OutVars{~a~0=v_~a~0_34, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_24|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_22, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_120, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_24|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~x~0=v_~x~0_42, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_22} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, ~x~0, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 15:22:12,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] P1ENTRY-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork3_#res.base_5|) (= 0 |v_P1Thread1of1ForFork3_#res.offset_5|) (= v_~x~0_38 2) (= v_~__unbuffered_cnt~0_114 (+ v_~__unbuffered_cnt~0_115 1)) (= v_~y~0_33 1) (= |v_P1Thread1of1ForFork3_#in~arg.offset_15| v_P1Thread1of1ForFork3_~arg.offset_13) (= |v_P1Thread1of1ForFork3_#in~arg.base_15| v_P1Thread1of1ForFork3_~arg.base_13)) InVars {P1Thread1of1ForFork3_#in~arg.base=|v_P1Thread1of1ForFork3_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_115, P1Thread1of1ForFork3_#in~arg.offset=|v_P1Thread1of1ForFork3_#in~arg.offset_15|} OutVars{P1Thread1of1ForFork3_#res.base=|v_P1Thread1of1ForFork3_#res.base_5|, P1Thread1of1ForFork3_~arg.offset=v_P1Thread1of1ForFork3_~arg.offset_13, P1Thread1of1ForFork3_#in~arg.base=|v_P1Thread1of1ForFork3_#in~arg.base_15|, P1Thread1of1ForFork3_~arg.base=v_P1Thread1of1ForFork3_~arg.base_13, P1Thread1of1ForFork3_#res.offset=|v_P1Thread1of1ForFork3_#res.offset_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_114, P1Thread1of1ForFork3_#in~arg.offset=|v_P1Thread1of1ForFork3_#in~arg.offset_15|, ~y~0=v_~y~0_33, ~x~0=v_~x~0_38} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#res.base, P1Thread1of1ForFork3_~arg.offset, P1Thread1of1ForFork3_~arg.base, P1Thread1of1ForFork3_#res.offset, ~__unbuffered_cnt~0, ~y~0, ~x~0] because there is no mapped edge [2019-12-07 15:22:12,391 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L809-->L809-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd4~0_In-1940796110 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1940796110 256) 0))) (or (and (not .cse0) (= |P3Thread1of1ForFork1_#t~ite28_Out-1940796110| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P3Thread1of1ForFork1_#t~ite28_Out-1940796110| ~z$w_buff0_used~0_In-1940796110)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1940796110, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1940796110} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1940796110, P3Thread1of1ForFork1_#t~ite28=|P3Thread1of1ForFork1_#t~ite28_Out-1940796110|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1940796110} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite28] because there is no mapped edge [2019-12-07 15:22:12,391 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L810-->L810-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In668354202 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd4~0_In668354202 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In668354202 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In668354202 256)))) (or (and (= 0 |P3Thread1of1ForFork1_#t~ite29_Out668354202|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~z$w_buff1_used~0_In668354202 |P3Thread1of1ForFork1_#t~ite29_Out668354202|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In668354202, ~z$w_buff0_used~0=~z$w_buff0_used~0_In668354202, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In668354202, ~z$w_buff1_used~0=~z$w_buff1_used~0_In668354202} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In668354202, P3Thread1of1ForFork1_#t~ite29=|P3Thread1of1ForFork1_#t~ite29_Out668354202|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In668354202, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In668354202, ~z$w_buff1_used~0=~z$w_buff1_used~0_In668354202} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite29] because there is no mapped edge [2019-12-07 15:22:12,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] L811-->L812: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd4~0_In1979357698 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1979357698 256) 0)) (.cse2 (= ~z$r_buff0_thd4~0_Out1979357698 ~z$r_buff0_thd4~0_In1979357698))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd4~0_Out1979357698) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1979357698, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1979357698} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1979357698, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out1979357698, P3Thread1of1ForFork1_#t~ite30=|P3Thread1of1ForFork1_#t~ite30_Out1979357698|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork1_#t~ite30] because there is no mapped edge [2019-12-07 15:22:12,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L812-->L812-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-1901579727 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd4~0_In-1901579727 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In-1901579727 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-1901579727 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd4~0_In-1901579727 |P3Thread1of1ForFork1_#t~ite31_Out-1901579727|)) (and (= 0 |P3Thread1of1ForFork1_#t~ite31_Out-1901579727|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1901579727, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1901579727, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1901579727, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1901579727} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1901579727, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1901579727, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1901579727, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1901579727, P3Thread1of1ForFork1_#t~ite31=|P3Thread1of1ForFork1_#t~ite31_Out-1901579727|} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 15:22:12,393 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L773-->L773-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1796081256 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite12_Out-1796081256| |P2Thread1of1ForFork0_#t~ite11_Out-1796081256|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1796081256 256) 0))) (or (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-1796081256 256))) (= (mod ~z$w_buff0_used~0_In-1796081256 256) 0) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In-1796081256 256) 0)))) (= ~z$w_buff1~0_In-1796081256 |P2Thread1of1ForFork0_#t~ite11_Out-1796081256|)) (and (not .cse0) (= ~z$w_buff1~0_In-1796081256 |P2Thread1of1ForFork0_#t~ite12_Out-1796081256|) (= |P2Thread1of1ForFork0_#t~ite11_In-1796081256| |P2Thread1of1ForFork0_#t~ite11_Out-1796081256|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1796081256, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_In-1796081256|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1796081256, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1796081256, ~z$w_buff1~0=~z$w_buff1~0_In-1796081256, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1796081256, ~weak$$choice2~0=~weak$$choice2~0_In-1796081256} OutVars{P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-1796081256|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1796081256, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-1796081256|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1796081256, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1796081256, ~z$w_buff1~0=~z$w_buff1~0_In-1796081256, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1796081256, ~weak$$choice2~0=~weak$$choice2~0_In-1796081256} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11, P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 15:22:12,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-2-->P3EXIT: Formula: (and (= v_~__unbuffered_cnt~0_98 (+ v_~__unbuffered_cnt~0_99 1)) (= v_~z$r_buff1_thd4~0_48 |v_P3Thread1of1ForFork1_#t~ite31_44|) (= |v_P3Thread1of1ForFork1_#res.offset_3| 0) (= |v_P3Thread1of1ForFork1_#res.base_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P3Thread1of1ForFork1_#t~ite31=|v_P3Thread1of1ForFork1_#t~ite31_44|} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_48, P3Thread1of1ForFork1_#res.base=|v_P3Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, P3Thread1of1ForFork1_#res.offset=|v_P3Thread1of1ForFork1_#res.offset_3|, P3Thread1of1ForFork1_#t~ite31=|v_P3Thread1of1ForFork1_#t~ite31_43|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork1_#res.offset, P3Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 15:22:12,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L776-->L777: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P2Thread1of1ForFork0_#t~ite21=|v_P2Thread1of1ForFork0_#t~ite21_5|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite20=|v_P2Thread1of1ForFork0_#t~ite20_5|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P2Thread1of1ForFork0_#t~ite19=|v_P2Thread1of1ForFork0_#t~ite19_11|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite20, P2Thread1of1ForFork0_#t~ite19] because there is no mapped edge [2019-12-07 15:22:12,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L779-->L787: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_14 256))) (= 0 v_~z$flush_delayed~0_13) (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= v_~z~0_33 v_~z$mem_tmp~0_8)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52, ~z$flush_delayed~0=v_~z$flush_delayed~0_14} OutVars{P2Thread1of1ForFork0_#t~ite25=|v_P2Thread1of1ForFork0_#t~ite25_9|, ~z$mem_tmp~0=v_~z$mem_tmp~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, ~z$flush_delayed~0=v_~z$flush_delayed~0_13, ~z~0=v_~z~0_33} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite25, ~__unbuffered_cnt~0, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 15:22:12,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [633] [633] L837-1-->L843: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_15) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet35=|v_ULTIMATE.start_main_#t~nondet35_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet35, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:22:12,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L843-2-->L843-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite37_Out-2022212678| |ULTIMATE.start_main_#t~ite36_Out-2022212678|)) (.cse0 (= (mod ~z$w_buff1_used~0_In-2022212678 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-2022212678 256)))) (or (and (or .cse0 .cse1) .cse2 (= ~z~0_In-2022212678 |ULTIMATE.start_main_#t~ite36_Out-2022212678|)) (and .cse2 (not .cse0) (= ~z$w_buff1~0_In-2022212678 |ULTIMATE.start_main_#t~ite36_Out-2022212678|) (not .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2022212678, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2022212678, ~z$w_buff1~0=~z$w_buff1~0_In-2022212678, ~z~0=~z~0_In-2022212678} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2022212678, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2022212678, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-2022212678|, ~z$w_buff1~0=~z$w_buff1~0_In-2022212678, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-2022212678|, ~z~0=~z~0_In-2022212678} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-07 15:22:12,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L844-->L844-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In2132619509 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In2132619509 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite38_Out2132619509| 0)) (and (= |ULTIMATE.start_main_#t~ite38_Out2132619509| ~z$w_buff0_used~0_In2132619509) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2132619509, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2132619509} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2132619509, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2132619509, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out2132619509|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 15:22:12,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [705] [705] L845-->L845-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd0~0_In561315904 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In561315904 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In561315904 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In561315904 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite39_Out561315904|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In561315904 |ULTIMATE.start_main_#t~ite39_Out561315904|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In561315904, ~z$w_buff0_used~0=~z$w_buff0_used~0_In561315904, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In561315904, ~z$w_buff1_used~0=~z$w_buff1_used~0_In561315904} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In561315904, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out561315904|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In561315904, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In561315904, ~z$w_buff1_used~0=~z$w_buff1_used~0_In561315904} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 15:22:12,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L846-->L846-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1528338251 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-1528338251 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite40_Out-1528338251|) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-1528338251 |ULTIMATE.start_main_#t~ite40_Out-1528338251|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1528338251, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1528338251} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1528338251, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-1528338251|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1528338251} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-12-07 15:22:12,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L847-->L847-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-187883431 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-187883431 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-187883431 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-187883431 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd0~0_In-187883431 |ULTIMATE.start_main_#t~ite41_Out-187883431|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite41_Out-187883431|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-187883431, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-187883431, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-187883431, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-187883431} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-187883431|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-187883431, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-187883431, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-187883431, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-187883431} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 15:22:12,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L847-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p3_EAX~0_70) (= v_~y~0_43 2) (= 0 v_~__unbuffered_p2_EAX~0_28) (= v_~x~0_52 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_~z$r_buff1_thd0~0_115 |v_ULTIMATE.start_main_#t~ite41_47|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0)) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_47|, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_70, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~y~0=v_~y~0_43, ~x~0=v_~x~0_52} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_46|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_115, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_70, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~y~0=v_~y~0_43, ~x~0=v_~x~0_52, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:22:12,460 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:22:12 BasicIcfg [2019-12-07 15:22:12,460 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:22:12,460 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:22:12,460 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:22:12,461 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:22:12,461 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:21:50" (3/4) ... [2019-12-07 15:22:12,463 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:22:12,464 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] ULTIMATE.startENTRY-->L831: Formula: (let ((.cse0 (store |v_#valid_91| 0 0))) (and (= 0 v_~z$r_buff1_thd3~0_232) (= v_~weak$$choice2~0_162 0) (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t1413~0.base_44| 4) |v_#length_29|) (= v_~x~0_82 0) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1413~0.base_44| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1413~0.base_44|) |v_ULTIMATE.start_main_~#t1413~0.offset_29| 0)) |v_#memory_int_25|) (= v_~z$w_buff1~0_269 0) (= v_~z$mem_tmp~0_40 0) (= 0 v_~z$flush_delayed~0_66) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t1413~0.base_44|) (= v_~z$w_buff0_used~0_718 0) (= v_~z$r_buff0_thd2~0_22 0) (= v_~z$read_delayed~0_6 0) (= v_~z$read_delayed_var~0.base_8 0) (= 0 v_~z$r_buff0_thd4~0_134) (= v_~z$r_buff0_thd0~0_100 0) (= |v_#valid_89| (store .cse0 |v_ULTIMATE.start_main_~#t1413~0.base_44| 1)) (= v_~z$w_buff0~0_458 0) (= 0 v_~z$r_buff1_thd4~0_125) (= 0 |v_#NULL.base_4|) (= 0 |v_ULTIMATE.start_main_~#t1413~0.offset_29|) (= v_~__unbuffered_p3_EAX~0_102 0) (= v_~__unbuffered_cnt~0_156 0) (= 0 v_~weak$$choice0~0_37) (< 0 |v_#StackHeapBarrier_20|) (= 0 v_~__unbuffered_p2_EAX~0_62) (= v_~main$tmp_guard1~0_47 0) (= v_~y~0_80 0) (= v_~z$r_buff0_thd1~0_23 0) (= v_~a~0_45 0) (= |v_#NULL.offset_4| 0) (= v_~z$w_buff1_used~0_462 0) (= v_~z$r_buff1_thd0~0_156 0) (= v_~main$tmp_guard0~0_22 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1413~0.base_44|)) (= 0 v_~z$r_buff1_thd1~0_67) (= 0 v_~z$r_buff0_thd3~0_296) (= v_~z~0_165 0) (= v_~z$read_delayed_var~0.offset_8 0) (= 0 v_~z$r_buff1_thd2~0_67))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_91|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~nondet32=|v_ULTIMATE.start_main_#t~nondet32_8|, ULTIMATE.start_main_#t~nondet34=|v_ULTIMATE.start_main_#t~nondet34_9|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_67, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_~#t1415~0.base=|v_ULTIMATE.start_main_~#t1415~0.base_36|, ~a~0=v_~a~0_45, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_100, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_134, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_102, #length=|v_#length_29|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_62, ~z$mem_tmp~0=v_~z$mem_tmp~0_40, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_80|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_462, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_42|, ~z$flush_delayed~0=v_~z$flush_delayed~0_66, ULTIMATE.start_main_~#t1415~0.offset=|v_ULTIMATE.start_main_~#t1415~0.offset_20|, ~weak$$choice0~0=v_~weak$$choice0~0_37, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_30|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_67, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_8, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_296, ULTIMATE.start_main_~#t1413~0.base=|v_ULTIMATE.start_main_~#t1413~0.base_44|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_156, ~x~0=v_~x~0_82, ULTIMATE.start_main_~#t1416~0.offset=|v_ULTIMATE.start_main_~#t1416~0.offset_19|, ULTIMATE.start_main_~#t1414~0.offset=|v_ULTIMATE.start_main_~#t1414~0.offset_29|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_125, ULTIMATE.start_main_#t~nondet33=|v_ULTIMATE.start_main_#t~nondet33_9|, ULTIMATE.start_main_#t~nondet35=|v_ULTIMATE.start_main_#t~nondet35_22|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_269, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_47, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_8, ULTIMATE.start_main_~#t1414~0.base=|v_ULTIMATE.start_main_~#t1414~0.base_44|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_156, ~y~0=v_~y~0_80, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_22, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_718, ~z$w_buff0~0=v_~z$w_buff0~0_458, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_232, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_34|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_54|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_~#t1413~0.offset=|v_ULTIMATE.start_main_~#t1413~0.offset_29|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_106|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_34|, #valid=|v_#valid_89|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_~#t1416~0.base=|v_ULTIMATE.start_main_~#t1416~0.base_27|, ~z~0=v_~z~0_165, ~weak$$choice2~0=v_~weak$$choice2~0_162, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_23} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet32, ULTIMATE.start_main_#t~nondet34, ~z$r_buff1_thd2~0, #NULL.offset, ULTIMATE.start_main_~#t1415~0.base, ~a~0, ~z$r_buff0_thd0~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_~#t1415~0.offset, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t1413~0.base, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1416~0.offset, ULTIMATE.start_main_~#t1414~0.offset, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~nondet33, ULTIMATE.start_main_#t~nondet35, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1414~0.base, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1413~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t1416~0.base, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:22:12,464 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L831-1-->L833: Formula: (and (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1414~0.base_12|) (= 0 (select |v_#valid_45| |v_ULTIMATE.start_main_~#t1414~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t1414~0.offset_11|) (not (= |v_ULTIMATE.start_main_~#t1414~0.base_12| 0)) (= |v_#memory_int_17| (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1414~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1414~0.base_12|) |v_ULTIMATE.start_main_~#t1414~0.offset_11| 1))) (= |v_#valid_44| (store |v_#valid_45| |v_ULTIMATE.start_main_~#t1414~0.base_12| 1)) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1414~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1414~0.base=|v_ULTIMATE.start_main_~#t1414~0.base_12|, ULTIMATE.start_main_~#t1414~0.offset=|v_ULTIMATE.start_main_~#t1414~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~nondet32=|v_ULTIMATE.start_main_#t~nondet32_5|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_17|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1414~0.base, ULTIMATE.start_main_~#t1414~0.offset, ULTIMATE.start_main_#t~nondet32, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 15:22:12,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L833-1-->L835: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1415~0.base_11| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1415~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1415~0.base_11|) |v_ULTIMATE.start_main_~#t1415~0.offset_10| 2)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1415~0.base_11|) (= 0 |v_ULTIMATE.start_main_~#t1415~0.offset_10|) (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t1415~0.base_11|)) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t1415~0.base_11| 4)) (= |v_#valid_37| (store |v_#valid_38| |v_ULTIMATE.start_main_~#t1415~0.base_11| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~nondet33=|v_ULTIMATE.start_main_#t~nondet33_6|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1415~0.base=|v_ULTIMATE.start_main_~#t1415~0.base_11|, #length=|v_#length_19|, ULTIMATE.start_main_~#t1415~0.offset=|v_ULTIMATE.start_main_~#t1415~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet33, #valid, #memory_int, ULTIMATE.start_main_~#t1415~0.base, #length, ULTIMATE.start_main_~#t1415~0.offset] because there is no mapped edge [2019-12-07 15:22:12,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L835-1-->L837: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1416~0.base_12|)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1416~0.base_12| 4)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1416~0.base_12|) (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1416~0.base_12|)) (= |v_ULTIMATE.start_main_~#t1416~0.offset_10| 0) (= |v_#valid_48| (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1416~0.base_12| 1)) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1416~0.base_12| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1416~0.base_12|) |v_ULTIMATE.start_main_~#t1416~0.offset_10| 3)) |v_#memory_int_19|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet34=|v_ULTIMATE.start_main_#t~nondet34_6|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_19|, #length=|v_#length_23|, ULTIMATE.start_main_~#t1416~0.base=|v_ULTIMATE.start_main_~#t1416~0.base_12|, ULTIMATE.start_main_~#t1416~0.offset=|v_ULTIMATE.start_main_~#t1416~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet34, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1416~0.base, ULTIMATE.start_main_~#t1416~0.offset] because there is no mapped edge [2019-12-07 15:22:12,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] P3ENTRY-->L4-3: Formula: (and (= v_~z$w_buff0_used~0_100 v_~z$w_buff1_used~0_70) (= 1 v_~z$w_buff0~0_43) (= |v_P3Thread1of1ForFork1___VERIFIER_assert_#in~expression_13| v_P3Thread1of1ForFork1___VERIFIER_assert_~expression_15) (= v_P3Thread1of1ForFork1_~arg.offset_13 |v_P3Thread1of1ForFork1_#in~arg.offset_15|) (= v_P3Thread1of1ForFork1_~arg.base_13 |v_P3Thread1of1ForFork1_#in~arg.base_15|) (= v_~z$w_buff0_used~0_99 1) (= v_~z$w_buff0~0_44 v_~z$w_buff1~0_34) (not (= 0 v_P3Thread1of1ForFork1___VERIFIER_assert_~expression_15)) (= |v_P3Thread1of1ForFork1___VERIFIER_assert_#in~expression_13| (ite (not (and (not (= (mod v_~z$w_buff0_used~0_99 256) 0)) (not (= 0 (mod v_~z$w_buff1_used~0_70 256))))) 1 0))) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_100, ~z$w_buff0~0=v_~z$w_buff0~0_44, P3Thread1of1ForFork1_#in~arg.offset=|v_P3Thread1of1ForFork1_#in~arg.offset_15|, P3Thread1of1ForFork1_#in~arg.base=|v_P3Thread1of1ForFork1_#in~arg.base_15|} OutVars{P3Thread1of1ForFork1___VERIFIER_assert_~expression=v_P3Thread1of1ForFork1___VERIFIER_assert_~expression_15, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_99, ~z$w_buff0~0=v_~z$w_buff0~0_43, P3Thread1of1ForFork1_#in~arg.offset=|v_P3Thread1of1ForFork1_#in~arg.offset_15|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_70, P3Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P3Thread1of1ForFork1___VERIFIER_assert_#in~expression_13|, ~z$w_buff1~0=v_~z$w_buff1~0_34, P3Thread1of1ForFork1_~arg.offset=v_P3Thread1of1ForFork1_~arg.offset_13, P3Thread1of1ForFork1_#in~arg.base=|v_P3Thread1of1ForFork1_#in~arg.base_15|, P3Thread1of1ForFork1_~arg.base=v_P3Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[P3Thread1of1ForFork1___VERIFIER_assert_~expression, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, P3Thread1of1ForFork1___VERIFIER_assert_#in~expression, ~z$w_buff1~0, P3Thread1of1ForFork1_~arg.offset, P3Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 15:22:12,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [729] [729] P0ENTRY-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork2_#in~arg.offset_24| v_P0Thread1of1ForFork2_~arg.offset_22) (= v_P0Thread1of1ForFork2_~arg.base_22 |v_P0Thread1of1ForFork2_#in~arg.base_24|) (= v_~a~0_34 1) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_120 (+ v_~__unbuffered_cnt~0_121 1)) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|) (= v_~x~0_42 1)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_121, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_24|} OutVars{~a~0=v_~a~0_34, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_24|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_22, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_120, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_24|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~x~0=v_~x~0_42, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_22} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, ~x~0, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 15:22:12,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] P1ENTRY-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork3_#res.base_5|) (= 0 |v_P1Thread1of1ForFork3_#res.offset_5|) (= v_~x~0_38 2) (= v_~__unbuffered_cnt~0_114 (+ v_~__unbuffered_cnt~0_115 1)) (= v_~y~0_33 1) (= |v_P1Thread1of1ForFork3_#in~arg.offset_15| v_P1Thread1of1ForFork3_~arg.offset_13) (= |v_P1Thread1of1ForFork3_#in~arg.base_15| v_P1Thread1of1ForFork3_~arg.base_13)) InVars {P1Thread1of1ForFork3_#in~arg.base=|v_P1Thread1of1ForFork3_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_115, P1Thread1of1ForFork3_#in~arg.offset=|v_P1Thread1of1ForFork3_#in~arg.offset_15|} OutVars{P1Thread1of1ForFork3_#res.base=|v_P1Thread1of1ForFork3_#res.base_5|, P1Thread1of1ForFork3_~arg.offset=v_P1Thread1of1ForFork3_~arg.offset_13, P1Thread1of1ForFork3_#in~arg.base=|v_P1Thread1of1ForFork3_#in~arg.base_15|, P1Thread1of1ForFork3_~arg.base=v_P1Thread1of1ForFork3_~arg.base_13, P1Thread1of1ForFork3_#res.offset=|v_P1Thread1of1ForFork3_#res.offset_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_114, P1Thread1of1ForFork3_#in~arg.offset=|v_P1Thread1of1ForFork3_#in~arg.offset_15|, ~y~0=v_~y~0_33, ~x~0=v_~x~0_38} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#res.base, P1Thread1of1ForFork3_~arg.offset, P1Thread1of1ForFork3_~arg.base, P1Thread1of1ForFork3_#res.offset, ~__unbuffered_cnt~0, ~y~0, ~x~0] because there is no mapped edge [2019-12-07 15:22:12,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L809-->L809-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd4~0_In-1940796110 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1940796110 256) 0))) (or (and (not .cse0) (= |P3Thread1of1ForFork1_#t~ite28_Out-1940796110| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P3Thread1of1ForFork1_#t~ite28_Out-1940796110| ~z$w_buff0_used~0_In-1940796110)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1940796110, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1940796110} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1940796110, P3Thread1of1ForFork1_#t~ite28=|P3Thread1of1ForFork1_#t~ite28_Out-1940796110|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1940796110} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite28] because there is no mapped edge [2019-12-07 15:22:12,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L810-->L810-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In668354202 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd4~0_In668354202 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In668354202 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In668354202 256)))) (or (and (= 0 |P3Thread1of1ForFork1_#t~ite29_Out668354202|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~z$w_buff1_used~0_In668354202 |P3Thread1of1ForFork1_#t~ite29_Out668354202|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In668354202, ~z$w_buff0_used~0=~z$w_buff0_used~0_In668354202, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In668354202, ~z$w_buff1_used~0=~z$w_buff1_used~0_In668354202} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In668354202, P3Thread1of1ForFork1_#t~ite29=|P3Thread1of1ForFork1_#t~ite29_Out668354202|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In668354202, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In668354202, ~z$w_buff1_used~0=~z$w_buff1_used~0_In668354202} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite29] because there is no mapped edge [2019-12-07 15:22:12,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] L811-->L812: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd4~0_In1979357698 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1979357698 256) 0)) (.cse2 (= ~z$r_buff0_thd4~0_Out1979357698 ~z$r_buff0_thd4~0_In1979357698))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd4~0_Out1979357698) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1979357698, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1979357698} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1979357698, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out1979357698, P3Thread1of1ForFork1_#t~ite30=|P3Thread1of1ForFork1_#t~ite30_Out1979357698|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork1_#t~ite30] because there is no mapped edge [2019-12-07 15:22:12,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L812-->L812-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-1901579727 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd4~0_In-1901579727 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In-1901579727 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-1901579727 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd4~0_In-1901579727 |P3Thread1of1ForFork1_#t~ite31_Out-1901579727|)) (and (= 0 |P3Thread1of1ForFork1_#t~ite31_Out-1901579727|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1901579727, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1901579727, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1901579727, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1901579727} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1901579727, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1901579727, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1901579727, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1901579727, P3Thread1of1ForFork1_#t~ite31=|P3Thread1of1ForFork1_#t~ite31_Out-1901579727|} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 15:22:12,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L773-->L773-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1796081256 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite12_Out-1796081256| |P2Thread1of1ForFork0_#t~ite11_Out-1796081256|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1796081256 256) 0))) (or (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-1796081256 256))) (= (mod ~z$w_buff0_used~0_In-1796081256 256) 0) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In-1796081256 256) 0)))) (= ~z$w_buff1~0_In-1796081256 |P2Thread1of1ForFork0_#t~ite11_Out-1796081256|)) (and (not .cse0) (= ~z$w_buff1~0_In-1796081256 |P2Thread1of1ForFork0_#t~ite12_Out-1796081256|) (= |P2Thread1of1ForFork0_#t~ite11_In-1796081256| |P2Thread1of1ForFork0_#t~ite11_Out-1796081256|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1796081256, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_In-1796081256|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1796081256, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1796081256, ~z$w_buff1~0=~z$w_buff1~0_In-1796081256, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1796081256, ~weak$$choice2~0=~weak$$choice2~0_In-1796081256} OutVars{P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-1796081256|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1796081256, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-1796081256|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1796081256, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1796081256, ~z$w_buff1~0=~z$w_buff1~0_In-1796081256, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1796081256, ~weak$$choice2~0=~weak$$choice2~0_In-1796081256} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11, P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 15:22:12,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-2-->P3EXIT: Formula: (and (= v_~__unbuffered_cnt~0_98 (+ v_~__unbuffered_cnt~0_99 1)) (= v_~z$r_buff1_thd4~0_48 |v_P3Thread1of1ForFork1_#t~ite31_44|) (= |v_P3Thread1of1ForFork1_#res.offset_3| 0) (= |v_P3Thread1of1ForFork1_#res.base_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P3Thread1of1ForFork1_#t~ite31=|v_P3Thread1of1ForFork1_#t~ite31_44|} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_48, P3Thread1of1ForFork1_#res.base=|v_P3Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, P3Thread1of1ForFork1_#res.offset=|v_P3Thread1of1ForFork1_#res.offset_3|, P3Thread1of1ForFork1_#t~ite31=|v_P3Thread1of1ForFork1_#t~ite31_43|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork1_#res.offset, P3Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 15:22:12,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L776-->L777: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P2Thread1of1ForFork0_#t~ite21=|v_P2Thread1of1ForFork0_#t~ite21_5|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite20=|v_P2Thread1of1ForFork0_#t~ite20_5|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P2Thread1of1ForFork0_#t~ite19=|v_P2Thread1of1ForFork0_#t~ite19_11|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite20, P2Thread1of1ForFork0_#t~ite19] because there is no mapped edge [2019-12-07 15:22:12,472 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L779-->L787: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_14 256))) (= 0 v_~z$flush_delayed~0_13) (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= v_~z~0_33 v_~z$mem_tmp~0_8)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52, ~z$flush_delayed~0=v_~z$flush_delayed~0_14} OutVars{P2Thread1of1ForFork0_#t~ite25=|v_P2Thread1of1ForFork0_#t~ite25_9|, ~z$mem_tmp~0=v_~z$mem_tmp~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, ~z$flush_delayed~0=v_~z$flush_delayed~0_13, ~z~0=v_~z~0_33} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite25, ~__unbuffered_cnt~0, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 15:22:12,472 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [633] [633] L837-1-->L843: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_15) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet35=|v_ULTIMATE.start_main_#t~nondet35_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet35, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:22:12,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L843-2-->L843-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite37_Out-2022212678| |ULTIMATE.start_main_#t~ite36_Out-2022212678|)) (.cse0 (= (mod ~z$w_buff1_used~0_In-2022212678 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-2022212678 256)))) (or (and (or .cse0 .cse1) .cse2 (= ~z~0_In-2022212678 |ULTIMATE.start_main_#t~ite36_Out-2022212678|)) (and .cse2 (not .cse0) (= ~z$w_buff1~0_In-2022212678 |ULTIMATE.start_main_#t~ite36_Out-2022212678|) (not .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2022212678, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2022212678, ~z$w_buff1~0=~z$w_buff1~0_In-2022212678, ~z~0=~z~0_In-2022212678} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2022212678, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2022212678, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-2022212678|, ~z$w_buff1~0=~z$w_buff1~0_In-2022212678, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-2022212678|, ~z~0=~z~0_In-2022212678} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-07 15:22:12,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L844-->L844-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In2132619509 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In2132619509 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite38_Out2132619509| 0)) (and (= |ULTIMATE.start_main_#t~ite38_Out2132619509| ~z$w_buff0_used~0_In2132619509) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2132619509, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2132619509} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2132619509, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2132619509, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out2132619509|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 15:22:12,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [705] [705] L845-->L845-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd0~0_In561315904 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In561315904 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In561315904 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In561315904 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite39_Out561315904|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In561315904 |ULTIMATE.start_main_#t~ite39_Out561315904|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In561315904, ~z$w_buff0_used~0=~z$w_buff0_used~0_In561315904, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In561315904, ~z$w_buff1_used~0=~z$w_buff1_used~0_In561315904} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In561315904, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out561315904|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In561315904, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In561315904, ~z$w_buff1_used~0=~z$w_buff1_used~0_In561315904} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 15:22:12,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L846-->L846-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1528338251 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-1528338251 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite40_Out-1528338251|) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-1528338251 |ULTIMATE.start_main_#t~ite40_Out-1528338251|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1528338251, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1528338251} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1528338251, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-1528338251|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1528338251} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-12-07 15:22:12,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L847-->L847-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-187883431 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-187883431 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-187883431 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-187883431 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd0~0_In-187883431 |ULTIMATE.start_main_#t~ite41_Out-187883431|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite41_Out-187883431|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-187883431, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-187883431, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-187883431, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-187883431} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-187883431|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-187883431, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-187883431, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-187883431, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-187883431} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 15:22:12,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L847-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p3_EAX~0_70) (= v_~y~0_43 2) (= 0 v_~__unbuffered_p2_EAX~0_28) (= v_~x~0_52 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_~z$r_buff1_thd0~0_115 |v_ULTIMATE.start_main_#t~ite41_47|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0)) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_47|, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_70, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~y~0=v_~y~0_43, ~x~0=v_~x~0_52} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_46|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_115, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_70, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ~y~0=v_~y~0_43, ~x~0=v_~x~0_52, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:22:12,538 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_ceb31cbf-aa43-4bbc-b813-5ca9dcc8961a/bin/uautomizer/witness.graphml [2019-12-07 15:22:12,539 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:22:12,540 INFO L168 Benchmark]: Toolchain (without parser) took 22933.68 ms. Allocated memory was 1.0 GB in the beginning and 3.1 GB in the end (delta: 2.1 GB). Free memory was 939.2 MB in the beginning and 1.1 GB in the end (delta: -122.3 MB). Peak memory consumption was 1.9 GB. Max. memory is 11.5 GB. [2019-12-07 15:22:12,540 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 957.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:22:12,541 INFO L168 Benchmark]: CACSL2BoogieTranslator took 379.64 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 939.2 MB in the beginning and 1.1 GB in the end (delta: -137.1 MB). Peak memory consumption was 22.8 MB. Max. memory is 11.5 GB. [2019-12-07 15:22:12,541 INFO L168 Benchmark]: Boogie Procedure Inliner took 42.48 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 11.5 GB. [2019-12-07 15:22:12,541 INFO L168 Benchmark]: Boogie Preprocessor took 28.68 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 11.5 GB. [2019-12-07 15:22:12,542 INFO L168 Benchmark]: RCFGBuilder took 384.30 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.4 MB). Peak memory consumption was 55.4 MB. Max. memory is 11.5 GB. [2019-12-07 15:22:12,542 INFO L168 Benchmark]: TraceAbstraction took 22016.92 ms. Allocated memory was 1.1 GB in the beginning and 3.1 GB in the end (delta: 2.0 GB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -92.9 MB). Peak memory consumption was 1.9 GB. Max. memory is 11.5 GB. [2019-12-07 15:22:12,542 INFO L168 Benchmark]: Witness Printer took 78.41 ms. Allocated memory is still 3.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.8 MB). Peak memory consumption was 45.8 MB. Max. memory is 11.5 GB. [2019-12-07 15:22:12,544 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 957.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 379.64 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 939.2 MB in the beginning and 1.1 GB in the end (delta: -137.1 MB). Peak memory consumption was 22.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 42.48 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 28.68 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 11.5 GB. * RCFGBuilder took 384.30 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.4 MB). Peak memory consumption was 55.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 22016.92 ms. Allocated memory was 1.1 GB in the beginning and 3.1 GB in the end (delta: 2.0 GB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -92.9 MB). Peak memory consumption was 1.9 GB. Max. memory is 11.5 GB. * Witness Printer took 78.41 ms. Allocated memory is still 3.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.8 MB). Peak memory consumption was 45.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 167 ProgramPointsBefore, 78 ProgramPointsAfterwards, 189 TransitionsBefore, 86 TransitionsAfterwards, 12650 CoEnabledTransitionPairs, 8 FixpointIterations, 35 TrivialSequentialCompositions, 50 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 19 ChoiceCompositions, 5650 VarBasedMoverChecksPositive, 211 VarBasedMoverChecksNegative, 67 SemBasedMoverChecksPositive, 185 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 48182 CheckedPairsTotal, 118 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L831] FCALL, FORK 0 pthread_create(&t1413, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] FCALL, FORK 0 pthread_create(&t1414, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L835] FCALL, FORK 0 pthread_create(&t1415, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] FCALL, FORK 0 pthread_create(&t1416, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L797] 4 z$r_buff1_thd0 = z$r_buff0_thd0 [L798] 4 z$r_buff1_thd1 = z$r_buff0_thd1 [L799] 4 z$r_buff1_thd2 = z$r_buff0_thd2 [L800] 4 z$r_buff1_thd3 = z$r_buff0_thd3 [L801] 4 z$r_buff1_thd4 = z$r_buff0_thd4 [L802] 4 z$r_buff0_thd4 = (_Bool)1 [L805] 4 __unbuffered_p3_EAX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L808] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 3 y = 2 [L767] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L768] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L769] 3 z$flush_delayed = weak$$choice2 [L770] 3 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L771] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, \result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L808] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L809] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L810] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L771] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L772] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L772] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L773] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L774] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=0, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L774] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L775] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L775] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L777] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L777] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L778] 3 __unbuffered_p2_EAX = z VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L843] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L843] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L844] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L845] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L846] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 155 locations, 2 error locations. Result: UNSAFE, OverallTime: 21.8s, OverallIterations: 21, TraceHistogramMax: 1, AutomataDifference: 5.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2515 SDtfs, 2649 SDslu, 3985 SDs, 0 SdLazy, 1322 SolverSat, 144 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 100 GetRequests, 23 SyntacticMatches, 3 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=65870occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 10.7s AutomataMinimizationTime, 20 MinimizatonAttempts, 48934 StatesRemovedByMinimization, 17 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.6s InterpolantComputationTime, 597 NumberOfCodeBlocks, 597 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 529 ConstructedInterpolants, 0 QuantifiedInterpolants, 93937 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 20 InterpolantComputations, 20 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...