./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix054_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_8bf64556-500e-43d9-9126-ff7d580323a5/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_8bf64556-500e-43d9-9126-ff7d580323a5/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_8bf64556-500e-43d9-9126-ff7d580323a5/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_8bf64556-500e-43d9-9126-ff7d580323a5/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix054_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_8bf64556-500e-43d9-9126-ff7d580323a5/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_8bf64556-500e-43d9-9126-ff7d580323a5/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 530d9436aa4f4ef82834180462660e57d00a5021 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 11:24:29,382 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 11:24:29,383 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 11:24:29,391 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 11:24:29,391 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 11:24:29,391 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 11:24:29,392 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 11:24:29,394 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 11:24:29,395 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 11:24:29,396 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 11:24:29,397 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 11:24:29,398 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 11:24:29,398 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 11:24:29,398 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 11:24:29,399 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 11:24:29,400 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 11:24:29,400 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 11:24:29,401 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 11:24:29,402 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 11:24:29,404 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 11:24:29,405 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 11:24:29,405 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 11:24:29,406 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 11:24:29,406 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 11:24:29,408 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 11:24:29,408 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 11:24:29,408 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 11:24:29,409 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 11:24:29,409 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 11:24:29,410 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 11:24:29,410 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 11:24:29,410 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 11:24:29,411 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 11:24:29,411 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 11:24:29,412 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 11:24:29,412 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 11:24:29,413 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 11:24:29,413 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 11:24:29,413 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 11:24:29,414 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 11:24:29,415 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 11:24:29,415 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_8bf64556-500e-43d9-9126-ff7d580323a5/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 11:24:29,428 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 11:24:29,428 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 11:24:29,429 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 11:24:29,429 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 11:24:29,429 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 11:24:29,430 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 11:24:29,430 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 11:24:29,430 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 11:24:29,430 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 11:24:29,430 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 11:24:29,430 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 11:24:29,431 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 11:24:29,431 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 11:24:29,431 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 11:24:29,431 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 11:24:29,431 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 11:24:29,432 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 11:24:29,432 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 11:24:29,432 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 11:24:29,432 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 11:24:29,432 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 11:24:29,432 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:24:29,433 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 11:24:29,433 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 11:24:29,433 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 11:24:29,433 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 11:24:29,433 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 11:24:29,433 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 11:24:29,434 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 11:24:29,434 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_8bf64556-500e-43d9-9126-ff7d580323a5/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 530d9436aa4f4ef82834180462660e57d00a5021 [2019-12-07 11:24:29,540 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 11:24:29,550 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 11:24:29,553 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 11:24:29,554 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 11:24:29,555 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 11:24:29,555 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_8bf64556-500e-43d9-9126-ff7d580323a5/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix054_pso.opt.i [2019-12-07 11:24:29,600 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_8bf64556-500e-43d9-9126-ff7d580323a5/bin/uautomizer/data/047858f42/1c7644374be7498b891153b66b42918c/FLAG9742ee5d1 [2019-12-07 11:24:29,990 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 11:24:29,990 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_8bf64556-500e-43d9-9126-ff7d580323a5/sv-benchmarks/c/pthread-wmm/mix054_pso.opt.i [2019-12-07 11:24:30,000 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_8bf64556-500e-43d9-9126-ff7d580323a5/bin/uautomizer/data/047858f42/1c7644374be7498b891153b66b42918c/FLAG9742ee5d1 [2019-12-07 11:24:30,374 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_8bf64556-500e-43d9-9126-ff7d580323a5/bin/uautomizer/data/047858f42/1c7644374be7498b891153b66b42918c [2019-12-07 11:24:30,376 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 11:24:30,377 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 11:24:30,377 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 11:24:30,377 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 11:24:30,380 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 11:24:30,380 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:24:30" (1/1) ... [2019-12-07 11:24:30,382 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@296938c1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:24:30, skipping insertion in model container [2019-12-07 11:24:30,382 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:24:30" (1/1) ... [2019-12-07 11:24:30,388 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 11:24:30,424 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 11:24:30,678 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:24:30,685 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 11:24:30,726 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:24:30,770 INFO L208 MainTranslator]: Completed translation [2019-12-07 11:24:30,771 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:24:30 WrapperNode [2019-12-07 11:24:30,771 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 11:24:30,771 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 11:24:30,771 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 11:24:30,771 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 11:24:30,777 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:24:30" (1/1) ... [2019-12-07 11:24:30,792 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:24:30" (1/1) ... [2019-12-07 11:24:30,813 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 11:24:30,813 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 11:24:30,814 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 11:24:30,814 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 11:24:30,820 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:24:30" (1/1) ... [2019-12-07 11:24:30,820 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:24:30" (1/1) ... [2019-12-07 11:24:30,823 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:24:30" (1/1) ... [2019-12-07 11:24:30,823 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:24:30" (1/1) ... [2019-12-07 11:24:30,830 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:24:30" (1/1) ... [2019-12-07 11:24:30,832 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:24:30" (1/1) ... [2019-12-07 11:24:30,835 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:24:30" (1/1) ... [2019-12-07 11:24:30,838 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 11:24:30,838 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 11:24:30,838 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 11:24:30,839 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 11:24:30,839 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:24:30" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_8bf64556-500e-43d9-9126-ff7d580323a5/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:24:30,878 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 11:24:30,878 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 11:24:30,878 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 11:24:30,879 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 11:24:30,879 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 11:24:30,879 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 11:24:30,879 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 11:24:30,879 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 11:24:30,879 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 11:24:30,879 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 11:24:30,879 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 11:24:30,880 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 11:24:31,216 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 11:24:31,216 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 11:24:31,217 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:24:31 BoogieIcfgContainer [2019-12-07 11:24:31,217 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 11:24:31,217 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 11:24:31,217 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 11:24:31,219 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 11:24:31,219 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 11:24:30" (1/3) ... [2019-12-07 11:24:31,220 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4f2a66cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:24:31, skipping insertion in model container [2019-12-07 11:24:31,220 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:24:30" (2/3) ... [2019-12-07 11:24:31,220 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4f2a66cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:24:31, skipping insertion in model container [2019-12-07 11:24:31,220 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:24:31" (3/3) ... [2019-12-07 11:24:31,221 INFO L109 eAbstractionObserver]: Analyzing ICFG mix054_pso.opt.i [2019-12-07 11:24:31,227 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 11:24:31,227 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 11:24:31,232 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 11:24:31,232 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 11:24:31,252 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,252 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,253 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,253 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,253 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,253 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,253 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,253 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,253 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,254 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,254 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,254 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,254 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,254 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,254 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,254 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,254 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,254 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,255 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,255 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,255 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,255 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,255 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,255 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,255 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,255 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,256 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,256 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,256 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,256 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,256 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,256 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,257 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,257 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,257 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,257 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,257 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,257 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,257 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,257 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,258 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,258 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,258 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,258 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,258 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,258 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,258 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,258 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,259 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,259 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,259 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,259 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,259 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,259 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,259 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,259 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,260 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,260 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,260 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,260 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,260 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,260 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,260 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,260 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:24:31,270 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 11:24:31,282 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 11:24:31,282 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 11:24:31,282 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 11:24:31,282 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 11:24:31,282 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 11:24:31,282 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 11:24:31,282 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 11:24:31,283 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 11:24:31,293 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 146 places, 180 transitions [2019-12-07 11:24:31,294 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-12-07 11:24:31,340 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-12-07 11:24:31,341 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:24:31,349 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 458 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 11:24:31,360 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-12-07 11:24:31,381 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-12-07 11:24:31,381 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:24:31,384 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 458 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 11:24:31,393 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-12-07 11:24:31,393 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 11:24:33,783 WARN L192 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 79 [2019-12-07 11:24:33,860 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46078 [2019-12-07 11:24:33,860 INFO L214 etLargeBlockEncoding]: Total number of compositions: 100 [2019-12-07 11:24:33,863 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 78 places, 90 transitions [2019-12-07 11:24:34,175 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8413 states. [2019-12-07 11:24:34,177 INFO L276 IsEmpty]: Start isEmpty. Operand 8413 states. [2019-12-07 11:24:34,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 11:24:34,181 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:34,181 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 11:24:34,181 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:34,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:34,185 INFO L82 PathProgramCache]: Analyzing trace with hash 693777882, now seen corresponding path program 1 times [2019-12-07 11:24:34,191 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:34,191 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689361153] [2019-12-07 11:24:34,191 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:34,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:24:34,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:24:34,334 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [689361153] [2019-12-07 11:24:34,335 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:24:34,335 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:24:34,336 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1748760867] [2019-12-07 11:24:34,340 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:24:34,340 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:24:34,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:24:34,353 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:24:34,355 INFO L87 Difference]: Start difference. First operand 8413 states. Second operand 3 states. [2019-12-07 11:24:34,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:24:34,531 INFO L93 Difference]: Finished difference Result 8377 states and 27415 transitions. [2019-12-07 11:24:34,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:24:34,532 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 11:24:34,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:24:34,616 INFO L225 Difference]: With dead ends: 8377 [2019-12-07 11:24:34,616 INFO L226 Difference]: Without dead ends: 8208 [2019-12-07 11:24:34,617 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:24:34,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8208 states. [2019-12-07 11:24:34,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8208 to 8208. [2019-12-07 11:24:34,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8208 states. [2019-12-07 11:24:34,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8208 states to 8208 states and 26895 transitions. [2019-12-07 11:24:34,900 INFO L78 Accepts]: Start accepts. Automaton has 8208 states and 26895 transitions. Word has length 5 [2019-12-07 11:24:34,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:24:34,900 INFO L462 AbstractCegarLoop]: Abstraction has 8208 states and 26895 transitions. [2019-12-07 11:24:34,901 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:24:34,901 INFO L276 IsEmpty]: Start isEmpty. Operand 8208 states and 26895 transitions. [2019-12-07 11:24:34,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 11:24:34,902 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:34,902 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:24:34,903 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:34,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:34,903 INFO L82 PathProgramCache]: Analyzing trace with hash 2143808117, now seen corresponding path program 1 times [2019-12-07 11:24:34,903 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:34,903 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [551096090] [2019-12-07 11:24:34,903 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:34,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:24:34,948 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:24:34,948 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [551096090] [2019-12-07 11:24:34,949 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:24:34,949 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:24:34,949 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [20402530] [2019-12-07 11:24:34,950 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:24:34,950 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:24:34,950 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:24:34,950 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:24:34,950 INFO L87 Difference]: Start difference. First operand 8208 states and 26895 transitions. Second operand 3 states. [2019-12-07 11:24:34,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:24:34,969 INFO L93 Difference]: Finished difference Result 1326 states and 3037 transitions. [2019-12-07 11:24:34,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:24:34,970 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2019-12-07 11:24:34,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:24:34,976 INFO L225 Difference]: With dead ends: 1326 [2019-12-07 11:24:34,976 INFO L226 Difference]: Without dead ends: 1326 [2019-12-07 11:24:34,976 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:24:34,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1326 states. [2019-12-07 11:24:34,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1326 to 1326. [2019-12-07 11:24:34,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1326 states. [2019-12-07 11:24:34,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1326 states to 1326 states and 3037 transitions. [2019-12-07 11:24:34,998 INFO L78 Accepts]: Start accepts. Automaton has 1326 states and 3037 transitions. Word has length 11 [2019-12-07 11:24:34,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:24:34,998 INFO L462 AbstractCegarLoop]: Abstraction has 1326 states and 3037 transitions. [2019-12-07 11:24:34,998 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:24:34,998 INFO L276 IsEmpty]: Start isEmpty. Operand 1326 states and 3037 transitions. [2019-12-07 11:24:34,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 11:24:34,999 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:34,999 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:24:34,999 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:34,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:34,999 INFO L82 PathProgramCache]: Analyzing trace with hash 1923085964, now seen corresponding path program 1 times [2019-12-07 11:24:34,999 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:34,999 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1891939862] [2019-12-07 11:24:35,000 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:35,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:24:35,053 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:24:35,054 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1891939862] [2019-12-07 11:24:35,054 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:24:35,054 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:24:35,054 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [965166555] [2019-12-07 11:24:35,054 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:24:35,054 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:24:35,054 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:24:35,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:24:35,055 INFO L87 Difference]: Start difference. First operand 1326 states and 3037 transitions. Second operand 4 states. [2019-12-07 11:24:35,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:24:35,224 INFO L93 Difference]: Finished difference Result 1806 states and 4001 transitions. [2019-12-07 11:24:35,225 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:24:35,225 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 11:24:35,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:24:35,233 INFO L225 Difference]: With dead ends: 1806 [2019-12-07 11:24:35,233 INFO L226 Difference]: Without dead ends: 1806 [2019-12-07 11:24:35,233 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:24:35,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1806 states. [2019-12-07 11:24:35,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1806 to 1654. [2019-12-07 11:24:35,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1654 states. [2019-12-07 11:24:35,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1654 states to 1654 states and 3712 transitions. [2019-12-07 11:24:35,267 INFO L78 Accepts]: Start accepts. Automaton has 1654 states and 3712 transitions. Word has length 11 [2019-12-07 11:24:35,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:24:35,267 INFO L462 AbstractCegarLoop]: Abstraction has 1654 states and 3712 transitions. [2019-12-07 11:24:35,267 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:24:35,267 INFO L276 IsEmpty]: Start isEmpty. Operand 1654 states and 3712 transitions. [2019-12-07 11:24:35,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 11:24:35,269 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:35,270 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:24:35,270 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:35,270 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:35,270 INFO L82 PathProgramCache]: Analyzing trace with hash 909891733, now seen corresponding path program 1 times [2019-12-07 11:24:35,270 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:35,270 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1133367076] [2019-12-07 11:24:35,270 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:35,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:24:35,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:24:35,378 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1133367076] [2019-12-07 11:24:35,378 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:24:35,378 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:24:35,378 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1847883175] [2019-12-07 11:24:35,378 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:24:35,378 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:24:35,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:24:35,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:24:35,379 INFO L87 Difference]: Start difference. First operand 1654 states and 3712 transitions. Second operand 6 states. [2019-12-07 11:24:35,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:24:35,701 INFO L93 Difference]: Finished difference Result 2088 states and 4578 transitions. [2019-12-07 11:24:35,702 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:24:35,702 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2019-12-07 11:24:35,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:24:35,712 INFO L225 Difference]: With dead ends: 2088 [2019-12-07 11:24:35,712 INFO L226 Difference]: Without dead ends: 2088 [2019-12-07 11:24:35,713 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:24:35,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2088 states. [2019-12-07 11:24:35,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2088 to 1868. [2019-12-07 11:24:35,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1868 states. [2019-12-07 11:24:35,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1868 states to 1868 states and 4151 transitions. [2019-12-07 11:24:35,752 INFO L78 Accepts]: Start accepts. Automaton has 1868 states and 4151 transitions. Word has length 23 [2019-12-07 11:24:35,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:24:35,753 INFO L462 AbstractCegarLoop]: Abstraction has 1868 states and 4151 transitions. [2019-12-07 11:24:35,753 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:24:35,753 INFO L276 IsEmpty]: Start isEmpty. Operand 1868 states and 4151 transitions. [2019-12-07 11:24:35,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 11:24:35,756 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:35,756 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:24:35,756 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:35,757 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:35,757 INFO L82 PathProgramCache]: Analyzing trace with hash -485993864, now seen corresponding path program 1 times [2019-12-07 11:24:35,757 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:35,757 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [54125136] [2019-12-07 11:24:35,757 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:35,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:24:35,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:24:35,817 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [54125136] [2019-12-07 11:24:35,817 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:24:35,817 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:24:35,818 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [733171174] [2019-12-07 11:24:35,818 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:24:35,818 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:24:35,818 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:24:35,818 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:24:35,819 INFO L87 Difference]: Start difference. First operand 1868 states and 4151 transitions. Second operand 4 states. [2019-12-07 11:24:35,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:24:35,830 INFO L93 Difference]: Finished difference Result 374 states and 679 transitions. [2019-12-07 11:24:35,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:24:35,830 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2019-12-07 11:24:35,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:24:35,832 INFO L225 Difference]: With dead ends: 374 [2019-12-07 11:24:35,832 INFO L226 Difference]: Without dead ends: 374 [2019-12-07 11:24:35,833 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:24:35,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 374 states. [2019-12-07 11:24:35,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 374 to 339. [2019-12-07 11:24:35,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 339 states. [2019-12-07 11:24:35,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 339 states to 339 states and 614 transitions. [2019-12-07 11:24:35,839 INFO L78 Accepts]: Start accepts. Automaton has 339 states and 614 transitions. Word has length 37 [2019-12-07 11:24:35,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:24:35,839 INFO L462 AbstractCegarLoop]: Abstraction has 339 states and 614 transitions. [2019-12-07 11:24:35,839 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:24:35,840 INFO L276 IsEmpty]: Start isEmpty. Operand 339 states and 614 transitions. [2019-12-07 11:24:35,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 11:24:35,841 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:35,841 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:24:35,841 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:35,842 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:35,842 INFO L82 PathProgramCache]: Analyzing trace with hash 763517816, now seen corresponding path program 1 times [2019-12-07 11:24:35,842 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:35,842 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [506608286] [2019-12-07 11:24:35,842 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:35,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:24:35,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:24:35,907 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [506608286] [2019-12-07 11:24:35,907 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:24:35,907 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:24:35,907 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1872042796] [2019-12-07 11:24:35,908 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:24:35,908 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:24:35,908 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:24:35,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:24:35,908 INFO L87 Difference]: Start difference. First operand 339 states and 614 transitions. Second operand 3 states. [2019-12-07 11:24:35,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:24:35,942 INFO L93 Difference]: Finished difference Result 352 states and 631 transitions. [2019-12-07 11:24:35,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:24:35,942 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-12-07 11:24:35,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:24:35,944 INFO L225 Difference]: With dead ends: 352 [2019-12-07 11:24:35,944 INFO L226 Difference]: Without dead ends: 352 [2019-12-07 11:24:35,944 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:24:35,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 352 states. [2019-12-07 11:24:35,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 352 to 348. [2019-12-07 11:24:35,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 348 states. [2019-12-07 11:24:35,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 627 transitions. [2019-12-07 11:24:35,949 INFO L78 Accepts]: Start accepts. Automaton has 348 states and 627 transitions. Word has length 52 [2019-12-07 11:24:35,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:24:35,949 INFO L462 AbstractCegarLoop]: Abstraction has 348 states and 627 transitions. [2019-12-07 11:24:35,949 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:24:35,950 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 627 transitions. [2019-12-07 11:24:35,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 11:24:35,950 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:35,950 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:24:35,950 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:35,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:35,951 INFO L82 PathProgramCache]: Analyzing trace with hash 1269350019, now seen corresponding path program 1 times [2019-12-07 11:24:35,951 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:35,951 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [969680413] [2019-12-07 11:24:35,951 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:35,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:24:36,008 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:24:36,008 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [969680413] [2019-12-07 11:24:36,008 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:24:36,009 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:24:36,009 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [932813786] [2019-12-07 11:24:36,009 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:24:36,009 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:24:36,009 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:24:36,009 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:24:36,009 INFO L87 Difference]: Start difference. First operand 348 states and 627 transitions. Second operand 5 states. [2019-12-07 11:24:36,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:24:36,137 INFO L93 Difference]: Finished difference Result 479 states and 863 transitions. [2019-12-07 11:24:36,137 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 11:24:36,137 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-12-07 11:24:36,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:24:36,140 INFO L225 Difference]: With dead ends: 479 [2019-12-07 11:24:36,140 INFO L226 Difference]: Without dead ends: 479 [2019-12-07 11:24:36,140 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:24:36,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 479 states. [2019-12-07 11:24:36,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 479 to 438. [2019-12-07 11:24:36,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 438 states. [2019-12-07 11:24:36,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 438 states to 438 states and 791 transitions. [2019-12-07 11:24:36,145 INFO L78 Accepts]: Start accepts. Automaton has 438 states and 791 transitions. Word has length 52 [2019-12-07 11:24:36,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:24:36,146 INFO L462 AbstractCegarLoop]: Abstraction has 438 states and 791 transitions. [2019-12-07 11:24:36,146 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:24:36,146 INFO L276 IsEmpty]: Start isEmpty. Operand 438 states and 791 transitions. [2019-12-07 11:24:36,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 11:24:36,147 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:36,147 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:24:36,147 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:36,147 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:36,147 INFO L82 PathProgramCache]: Analyzing trace with hash 544633013, now seen corresponding path program 2 times [2019-12-07 11:24:36,148 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:36,148 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [968775543] [2019-12-07 11:24:36,148 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:36,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:24:36,229 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:24:36,229 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [968775543] [2019-12-07 11:24:36,229 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:24:36,229 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:24:36,229 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1998565287] [2019-12-07 11:24:36,230 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:24:36,230 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:24:36,230 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:24:36,230 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:24:36,230 INFO L87 Difference]: Start difference. First operand 438 states and 791 transitions. Second operand 6 states. [2019-12-07 11:24:36,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:24:36,417 INFO L93 Difference]: Finished difference Result 577 states and 1038 transitions. [2019-12-07 11:24:36,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 11:24:36,417 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-07 11:24:36,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:24:36,420 INFO L225 Difference]: With dead ends: 577 [2019-12-07 11:24:36,420 INFO L226 Difference]: Without dead ends: 577 [2019-12-07 11:24:36,420 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:24:36,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 577 states. [2019-12-07 11:24:36,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 577 to 476. [2019-12-07 11:24:36,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 476 states. [2019-12-07 11:24:36,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 476 states to 476 states and 861 transitions. [2019-12-07 11:24:36,426 INFO L78 Accepts]: Start accepts. Automaton has 476 states and 861 transitions. Word has length 52 [2019-12-07 11:24:36,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:24:36,426 INFO L462 AbstractCegarLoop]: Abstraction has 476 states and 861 transitions. [2019-12-07 11:24:36,426 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:24:36,427 INFO L276 IsEmpty]: Start isEmpty. Operand 476 states and 861 transitions. [2019-12-07 11:24:36,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 11:24:36,427 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:36,428 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:24:36,428 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:36,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:36,428 INFO L82 PathProgramCache]: Analyzing trace with hash 1227473235, now seen corresponding path program 3 times [2019-12-07 11:24:36,428 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:36,428 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [376920509] [2019-12-07 11:24:36,428 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:36,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:24:36,490 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:24:36,490 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [376920509] [2019-12-07 11:24:36,491 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:24:36,491 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:24:36,491 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [520709597] [2019-12-07 11:24:36,491 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:24:36,491 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:24:36,492 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:24:36,492 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:24:36,492 INFO L87 Difference]: Start difference. First operand 476 states and 861 transitions. Second operand 6 states. [2019-12-07 11:24:36,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:24:36,709 INFO L93 Difference]: Finished difference Result 715 states and 1297 transitions. [2019-12-07 11:24:36,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:24:36,709 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-07 11:24:36,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:24:36,712 INFO L225 Difference]: With dead ends: 715 [2019-12-07 11:24:36,712 INFO L226 Difference]: Without dead ends: 715 [2019-12-07 11:24:36,713 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:24:36,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2019-12-07 11:24:36,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 517. [2019-12-07 11:24:36,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 517 states. [2019-12-07 11:24:36,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 944 transitions. [2019-12-07 11:24:36,720 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 944 transitions. Word has length 52 [2019-12-07 11:24:36,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:24:36,720 INFO L462 AbstractCegarLoop]: Abstraction has 517 states and 944 transitions. [2019-12-07 11:24:36,721 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:24:36,721 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 944 transitions. [2019-12-07 11:24:36,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 11:24:36,722 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:36,722 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:24:36,722 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:36,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:36,722 INFO L82 PathProgramCache]: Analyzing trace with hash 1833025349, now seen corresponding path program 4 times [2019-12-07 11:24:36,722 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:36,723 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1989967214] [2019-12-07 11:24:36,723 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:36,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:24:36,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:24:36,805 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1989967214] [2019-12-07 11:24:36,805 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:24:36,805 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 11:24:36,805 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1143686199] [2019-12-07 11:24:36,805 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:24:36,805 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:24:36,806 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:24:36,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:24:36,806 INFO L87 Difference]: Start difference. First operand 517 states and 944 transitions. Second operand 7 states. [2019-12-07 11:24:37,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:24:37,023 INFO L93 Difference]: Finished difference Result 772 states and 1396 transitions. [2019-12-07 11:24:37,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 11:24:37,023 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-12-07 11:24:37,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:24:37,027 INFO L225 Difference]: With dead ends: 772 [2019-12-07 11:24:37,027 INFO L226 Difference]: Without dead ends: 772 [2019-12-07 11:24:37,028 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 6 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:24:37,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 772 states. [2019-12-07 11:24:37,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 772 to 503. [2019-12-07 11:24:37,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 503 states. [2019-12-07 11:24:37,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 503 states to 503 states and 918 transitions. [2019-12-07 11:24:37,037 INFO L78 Accepts]: Start accepts. Automaton has 503 states and 918 transitions. Word has length 52 [2019-12-07 11:24:37,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:24:37,037 INFO L462 AbstractCegarLoop]: Abstraction has 503 states and 918 transitions. [2019-12-07 11:24:37,037 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:24:37,037 INFO L276 IsEmpty]: Start isEmpty. Operand 503 states and 918 transitions. [2019-12-07 11:24:37,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 11:24:37,038 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:37,038 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:24:37,038 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:37,039 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:37,039 INFO L82 PathProgramCache]: Analyzing trace with hash 513839464, now seen corresponding path program 1 times [2019-12-07 11:24:37,039 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:37,039 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2146947505] [2019-12-07 11:24:37,039 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:37,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:24:37,149 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:24:37,150 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2146947505] [2019-12-07 11:24:37,150 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:24:37,150 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:24:37,150 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1493331185] [2019-12-07 11:24:37,150 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 11:24:37,150 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:24:37,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 11:24:37,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 11:24:37,151 INFO L87 Difference]: Start difference. First operand 503 states and 918 transitions. Second operand 8 states. [2019-12-07 11:24:37,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:24:37,442 INFO L93 Difference]: Finished difference Result 788 states and 1383 transitions. [2019-12-07 11:24:37,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 11:24:37,443 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 53 [2019-12-07 11:24:37,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:24:37,445 INFO L225 Difference]: With dead ends: 788 [2019-12-07 11:24:37,445 INFO L226 Difference]: Without dead ends: 788 [2019-12-07 11:24:37,446 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2019-12-07 11:24:37,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 788 states. [2019-12-07 11:24:37,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 788 to 447. [2019-12-07 11:24:37,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 447 states. [2019-12-07 11:24:37,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 447 states to 447 states and 796 transitions. [2019-12-07 11:24:37,453 INFO L78 Accepts]: Start accepts. Automaton has 447 states and 796 transitions. Word has length 53 [2019-12-07 11:24:37,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:24:37,454 INFO L462 AbstractCegarLoop]: Abstraction has 447 states and 796 transitions. [2019-12-07 11:24:37,454 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 11:24:37,454 INFO L276 IsEmpty]: Start isEmpty. Operand 447 states and 796 transitions. [2019-12-07 11:24:37,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 11:24:37,455 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:37,455 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:24:37,455 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:37,456 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:37,456 INFO L82 PathProgramCache]: Analyzing trace with hash -162355984, now seen corresponding path program 2 times [2019-12-07 11:24:37,456 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:37,456 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [617884707] [2019-12-07 11:24:37,456 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:37,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:24:37,507 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:24:37,507 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [617884707] [2019-12-07 11:24:37,508 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:24:37,508 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:24:37,508 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1082786104] [2019-12-07 11:24:37,508 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:24:37,508 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:24:37,508 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:24:37,508 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:24:37,509 INFO L87 Difference]: Start difference. First operand 447 states and 796 transitions. Second operand 3 states. [2019-12-07 11:24:37,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:24:37,541 INFO L93 Difference]: Finished difference Result 447 states and 795 transitions. [2019-12-07 11:24:37,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:24:37,541 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 11:24:37,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:24:37,543 INFO L225 Difference]: With dead ends: 447 [2019-12-07 11:24:37,543 INFO L226 Difference]: Without dead ends: 447 [2019-12-07 11:24:37,543 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:24:37,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 447 states. [2019-12-07 11:24:37,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 447 to 354. [2019-12-07 11:24:37,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 354 states. [2019-12-07 11:24:37,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 354 states to 354 states and 621 transitions. [2019-12-07 11:24:37,548 INFO L78 Accepts]: Start accepts. Automaton has 354 states and 621 transitions. Word has length 53 [2019-12-07 11:24:37,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:24:37,549 INFO L462 AbstractCegarLoop]: Abstraction has 354 states and 621 transitions. [2019-12-07 11:24:37,549 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:24:37,549 INFO L276 IsEmpty]: Start isEmpty. Operand 354 states and 621 transitions. [2019-12-07 11:24:37,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 11:24:37,550 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:37,550 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:24:37,550 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:37,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:37,550 INFO L82 PathProgramCache]: Analyzing trace with hash 2112965781, now seen corresponding path program 1 times [2019-12-07 11:24:37,550 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:37,550 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [40558797] [2019-12-07 11:24:37,551 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:37,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:24:37,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:24:37,622 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [40558797] [2019-12-07 11:24:37,622 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:24:37,622 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:24:37,622 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [239492187] [2019-12-07 11:24:37,622 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:24:37,623 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:24:37,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:24:37,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:24:37,623 INFO L87 Difference]: Start difference. First operand 354 states and 621 transitions. Second operand 6 states. [2019-12-07 11:24:37,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:24:37,673 INFO L93 Difference]: Finished difference Result 544 states and 957 transitions. [2019-12-07 11:24:37,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 11:24:37,673 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-12-07 11:24:37,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:24:37,674 INFO L225 Difference]: With dead ends: 544 [2019-12-07 11:24:37,674 INFO L226 Difference]: Without dead ends: 207 [2019-12-07 11:24:37,674 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:24:37,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2019-12-07 11:24:37,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 207. [2019-12-07 11:24:37,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2019-12-07 11:24:37,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 362 transitions. [2019-12-07 11:24:37,677 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 362 transitions. Word has length 53 [2019-12-07 11:24:37,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:24:37,677 INFO L462 AbstractCegarLoop]: Abstraction has 207 states and 362 transitions. [2019-12-07 11:24:37,677 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:24:37,677 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 362 transitions. [2019-12-07 11:24:37,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 11:24:37,677 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:37,678 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:24:37,678 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:37,678 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:37,678 INFO L82 PathProgramCache]: Analyzing trace with hash -1571611631, now seen corresponding path program 2 times [2019-12-07 11:24:37,678 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:37,678 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [471305383] [2019-12-07 11:24:37,678 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:37,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:24:37,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:24:37,708 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [471305383] [2019-12-07 11:24:37,708 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:24:37,708 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:24:37,708 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1727441371] [2019-12-07 11:24:37,709 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:24:37,709 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:24:37,709 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:24:37,709 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:24:37,709 INFO L87 Difference]: Start difference. First operand 207 states and 362 transitions. Second operand 3 states. [2019-12-07 11:24:37,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:24:37,715 INFO L93 Difference]: Finished difference Result 197 states and 339 transitions. [2019-12-07 11:24:37,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:24:37,716 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 11:24:37,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:24:37,716 INFO L225 Difference]: With dead ends: 197 [2019-12-07 11:24:37,716 INFO L226 Difference]: Without dead ends: 197 [2019-12-07 11:24:37,716 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:24:37,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2019-12-07 11:24:37,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 197. [2019-12-07 11:24:37,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2019-12-07 11:24:37,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 339 transitions. [2019-12-07 11:24:37,719 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 339 transitions. Word has length 53 [2019-12-07 11:24:37,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:24:37,719 INFO L462 AbstractCegarLoop]: Abstraction has 197 states and 339 transitions. [2019-12-07 11:24:37,719 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:24:37,719 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 339 transitions. [2019-12-07 11:24:37,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:24:37,719 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:37,720 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:24:37,720 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:37,720 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:37,720 INFO L82 PathProgramCache]: Analyzing trace with hash 2120402622, now seen corresponding path program 1 times [2019-12-07 11:24:37,720 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:37,720 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [425170576] [2019-12-07 11:24:37,720 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:37,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:24:37,873 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:24:37,873 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [425170576] [2019-12-07 11:24:37,873 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:24:37,873 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 11:24:37,873 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [505053310] [2019-12-07 11:24:37,873 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 11:24:37,874 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:24:37,874 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 11:24:37,874 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:24:37,874 INFO L87 Difference]: Start difference. First operand 197 states and 339 transitions. Second operand 13 states. [2019-12-07 11:24:38,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:24:38,130 INFO L93 Difference]: Finished difference Result 348 states and 589 transitions. [2019-12-07 11:24:38,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 11:24:38,130 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-12-07 11:24:38,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:24:38,131 INFO L225 Difference]: With dead ends: 348 [2019-12-07 11:24:38,131 INFO L226 Difference]: Without dead ends: 315 [2019-12-07 11:24:38,131 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=90, Invalid=416, Unknown=0, NotChecked=0, Total=506 [2019-12-07 11:24:38,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2019-12-07 11:24:38,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 305. [2019-12-07 11:24:38,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 305 states. [2019-12-07 11:24:38,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 305 states and 524 transitions. [2019-12-07 11:24:38,135 INFO L78 Accepts]: Start accepts. Automaton has 305 states and 524 transitions. Word has length 54 [2019-12-07 11:24:38,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:24:38,135 INFO L462 AbstractCegarLoop]: Abstraction has 305 states and 524 transitions. [2019-12-07 11:24:38,135 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 11:24:38,135 INFO L276 IsEmpty]: Start isEmpty. Operand 305 states and 524 transitions. [2019-12-07 11:24:38,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:24:38,136 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:24:38,136 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:24:38,136 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:24:38,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:24:38,136 INFO L82 PathProgramCache]: Analyzing trace with hash 1631137646, now seen corresponding path program 2 times [2019-12-07 11:24:38,136 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:24:38,137 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [822761458] [2019-12-07 11:24:38,137 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:24:38,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:24:38,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:24:38,202 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 11:24:38,203 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 11:24:38,205 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [701] [701] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_49| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff0_thd0~0_317 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$r_buff1_thd2~0_153) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1447~0.base_22| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1447~0.base_22| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1447~0.base_22|) |v_ULTIMATE.start_main_~#t1447~0.offset_17| 0)) |v_#memory_int_13|) (= (select .cse0 |v_ULTIMATE.start_main_~#t1447~0.base_22|) 0) (= 0 v_~x~0_144) (= v_~x$r_buff0_thd1~0_115 0) (= |v_ULTIMATE.start_main_~#t1447~0.offset_17| 0) (= 0 v_~__unbuffered_cnt~0_78) (= v_~__unbuffered_p1_EAX~0_103 0) (= 0 v_~x$read_delayed~0_6) (< 0 |v_#StackHeapBarrier_14|) (= 0 v_~x$w_buff1_used~0_381) (= v_~x$flush_delayed~0_36 0) (= 0 |v_#NULL.base_4|) (= 0 v_~x$r_buff0_thd2~0_168) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1447~0.base_22|) (= 0 v_~x$w_buff1~0_166) (= |v_#NULL.offset_4| 0) (= v_~main$tmp_guard1~0_24 0) (= v_~y~0_67 0) (= 0 v_~x$w_buff0~0_193) (= v_~x$r_buff1_thd0~0_243 0) (= v_~main$tmp_guard0~0_24 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1447~0.base_22| 1) |v_#valid_47|) (= v_~weak$$choice2~0_114 0) (= 0 v_~weak$$choice0~0_12) (= 0 v_~x$w_buff0_used~0_609) (= v_~x$r_buff1_thd1~0_167 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_193, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, ~x$flush_delayed~0=v_~x$flush_delayed~0_36, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_167, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_139|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_31|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_~#t1448~0.offset=|v_ULTIMATE.start_main_~#t1448~0.offset_14|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_103, #length=|v_#length_15|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_317, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_31|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_19|, ~x$w_buff1~0=v_~x$w_buff1~0_166, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_28|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_381, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_153, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_37|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, ULTIMATE.start_main_~#t1448~0.base=|v_ULTIMATE.start_main_~#t1448~0.base_17|, ~x~0=v_~x~0_144, ULTIMATE.start_main_~#t1447~0.offset=|v_ULTIMATE.start_main_~#t1447~0.offset_17|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_115, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_23|, ULTIMATE.start_main_~#t1447~0.base=|v_ULTIMATE.start_main_~#t1447~0.base_22|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_40|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_32|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_36|, ~y~0=v_~y~0_67, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_27|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_39|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_243, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_168, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_609, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_21|, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1448~0.offset, ~__unbuffered_p1_EAX~0, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1448~0.base, ~x~0, ULTIMATE.start_main_~#t1447~0.offset, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_~#t1447~0.base, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 11:24:38,205 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L779-1-->L781: Formula: (and (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t1448~0.base_10| 4) |v_#length_9|) (not (= 0 |v_ULTIMATE.start_main_~#t1448~0.base_10|)) (= |v_#valid_25| (store |v_#valid_26| |v_ULTIMATE.start_main_~#t1448~0.base_10| 1)) (= 0 (select |v_#valid_26| |v_ULTIMATE.start_main_~#t1448~0.base_10|)) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t1448~0.base_10|) (= 0 |v_ULTIMATE.start_main_~#t1448~0.offset_9|) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1448~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1448~0.base_10|) |v_ULTIMATE.start_main_~#t1448~0.offset_9| 1)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_26|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t1448~0.offset=|v_ULTIMATE.start_main_~#t1448~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_25|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_9|, ULTIMATE.start_main_~#t1448~0.base=|v_ULTIMATE.start_main_~#t1448~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1448~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1448~0.base] because there is no mapped edge [2019-12-07 11:24:38,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1_#in~arg.offset_17| v_P1Thread1of1ForFork1_~arg.offset_15) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17)) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|) (= 2 v_~x$w_buff0~0_54) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_216 256))) (not (= 0 (mod v_~x$w_buff1_used~0_127 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.base_15 |v_P1Thread1of1ForFork1_#in~arg.base_17|) (= 1 v_~x$w_buff0_used~0_216) (= v_~x$w_buff0~0_55 v_~x$w_buff1~0_48) (= v_~x$w_buff0_used~0_217 v_~x$w_buff1_used~0_127)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_55, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_217} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17, ~x$w_buff0~0=v_~x$w_buff0~0_54, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_15, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_15, ~x$w_buff1~0=v_~x$w_buff1~0_48, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_127, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_216} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 11:24:38,207 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L728-2-->L728-5: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In1977888111 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In1977888111 256) 0)) (.cse2 (= |P0Thread1of1ForFork0_#t~ite3_Out1977888111| |P0Thread1of1ForFork0_#t~ite4_Out1977888111|))) (or (and (or .cse0 .cse1) .cse2 (= ~x~0_In1977888111 |P0Thread1of1ForFork0_#t~ite3_Out1977888111|)) (and (not .cse1) (not .cse0) .cse2 (= |P0Thread1of1ForFork0_#t~ite3_Out1977888111| ~x$w_buff1~0_In1977888111)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1977888111, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1977888111, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1977888111, ~x~0=~x~0_In1977888111} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out1977888111|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out1977888111|, ~x$w_buff1~0=~x$w_buff1~0_In1977888111, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1977888111, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1977888111, ~x~0=~x~0_In1977888111} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 11:24:38,207 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L729-->L729-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In2022490315 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In2022490315 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out2022490315|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In2022490315 |P0Thread1of1ForFork0_#t~ite5_Out2022490315|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2022490315, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2022490315} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out2022490315|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2022490315, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2022490315} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 11:24:38,207 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L730-->L730-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1888704854 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-1888704854 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-1888704854 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In-1888704854 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1888704854|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$w_buff1_used~0_In-1888704854 |P0Thread1of1ForFork0_#t~ite6_Out-1888704854|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1888704854, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1888704854, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1888704854, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1888704854} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1888704854|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1888704854, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1888704854, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1888704854, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1888704854} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 11:24:38,208 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L757-->L757-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In438798114 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In438798114 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In438798114 |P1Thread1of1ForFork1_#t~ite11_Out438798114|)) (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out438798114|) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In438798114, ~x$w_buff0_used~0=~x$w_buff0_used~0_In438798114} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out438798114|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In438798114, ~x$w_buff0_used~0=~x$w_buff0_used~0_In438798114} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 11:24:38,208 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L731-->L731-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1226845861 256))) (.cse1 (= (mod ~x$r_buff0_thd1~0_In1226845861 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite7_Out1226845861| 0) (not .cse1)) (and (= ~x$r_buff0_thd1~0_In1226845861 |P0Thread1of1ForFork0_#t~ite7_Out1226845861|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1226845861, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1226845861} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1226845861, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1226845861|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1226845861} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 11:24:38,208 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L732-->L732-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In968072109 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd1~0_In968072109 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd1~0_In968072109 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In968072109 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out968072109|)) (and (or .cse1 .cse0) (= ~x$r_buff1_thd1~0_In968072109 |P0Thread1of1ForFork0_#t~ite8_Out968072109|) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In968072109, ~x$w_buff1_used~0=~x$w_buff1_used~0_In968072109, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In968072109, ~x$w_buff0_used~0=~x$w_buff0_used~0_In968072109} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In968072109, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out968072109|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In968072109, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In968072109, ~x$w_buff0_used~0=~x$w_buff0_used~0_In968072109} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 11:24:38,208 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L732-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_125} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 11:24:38,208 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L758-->L758-2: Formula: (let ((.cse3 (= (mod ~x$r_buff1_thd2~0_In-1534604350 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1534604350 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1534604350 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1534604350 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-1534604350|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~x$w_buff1_used~0_In-1534604350 |P1Thread1of1ForFork1_#t~ite12_Out-1534604350|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1534604350, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1534604350, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1534604350, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1534604350} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1534604350, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1534604350, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1534604350|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1534604350, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1534604350} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 11:24:38,209 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L759-->L760: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_Out116570076 ~x$r_buff0_thd2~0_In116570076)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In116570076 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In116570076 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse0) (not .cse2) (= ~x$r_buff0_thd2~0_Out116570076 0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In116570076, ~x$w_buff0_used~0=~x$w_buff0_used~0_In116570076} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out116570076|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out116570076, ~x$w_buff0_used~0=~x$w_buff0_used~0_In116570076} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 11:24:38,209 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L760-->L760-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In1970608595 256))) (.cse0 (= (mod ~x$r_buff1_thd2~0_In1970608595 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In1970608595 256))) (.cse2 (= (mod ~x$r_buff0_thd2~0_In1970608595 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out1970608595|)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite14_Out1970608595| ~x$r_buff1_thd2~0_In1970608595) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1970608595, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1970608595, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1970608595, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1970608595} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1970608595, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1970608595, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1970608595, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1970608595|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1970608595} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 11:24:38,209 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L760-2-->P1EXIT: Formula: (and (= v_~x$r_buff1_thd2~0_125 |v_P1Thread1of1ForFork1_#t~ite14_34|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_34|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_33|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 11:24:38,209 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [586] [586] L781-1-->L787: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 2 v_~__unbuffered_cnt~0_11) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:24:38,209 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L787-2-->L787-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite18_Out-1884583143| |ULTIMATE.start_main_#t~ite17_Out-1884583143|)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1884583143 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-1884583143 256)))) (or (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite17_Out-1884583143| ~x$w_buff1~0_In-1884583143)) (and (= ~x~0_In-1884583143 |ULTIMATE.start_main_#t~ite17_Out-1884583143|) .cse2 (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1884583143, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1884583143, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1884583143, ~x~0=~x~0_In-1884583143} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-1884583143|, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1884583143|, ~x$w_buff1~0=~x$w_buff1~0_In-1884583143, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1884583143, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1884583143, ~x~0=~x~0_In-1884583143} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-12-07 11:24:38,209 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1225683503 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In1225683503 256)))) (or (and (= ~x$w_buff0_used~0_In1225683503 |ULTIMATE.start_main_#t~ite19_Out1225683503|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite19_Out1225683503|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1225683503, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1225683503} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1225683503, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1225683503|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1225683503} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 11:24:38,210 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L789-->L789-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In-415641299 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd0~0_In-415641299 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-415641299 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-415641299 256)))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out-415641299| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite20_Out-415641299| ~x$w_buff1_used~0_In-415641299)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-415641299, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-415641299, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-415641299, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-415641299} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-415641299, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-415641299, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-415641299|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-415641299, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-415641299} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 11:24:38,210 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L790-->L790-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In35455399 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In35455399 256) 0))) (or (and (= ~x$r_buff0_thd0~0_In35455399 |ULTIMATE.start_main_#t~ite21_Out35455399|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite21_Out35455399|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In35455399, ~x$w_buff0_used~0=~x$w_buff0_used~0_In35455399} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In35455399, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out35455399|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In35455399} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 11:24:38,210 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L791-->L791-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In1271721695 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd0~0_In1271721695 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1271721695 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1271721695 256)))) (or (and (= ~x$r_buff1_thd0~0_In1271721695 |ULTIMATE.start_main_#t~ite22_Out1271721695|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite22_Out1271721695| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1271721695, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1271721695, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1271721695, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1271721695} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1271721695, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1271721695, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1271721695, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1271721695|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1271721695} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 11:24:38,211 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L800-->L800-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-390473511 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite31_In-390473511| |ULTIMATE.start_main_#t~ite31_Out-390473511|) (= |ULTIMATE.start_main_#t~ite32_Out-390473511| ~x$w_buff1~0_In-390473511)) (and .cse0 (= |ULTIMATE.start_main_#t~ite31_Out-390473511| |ULTIMATE.start_main_#t~ite32_Out-390473511|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-390473511 256)))) (or (and (= 0 (mod ~x$w_buff1_used~0_In-390473511 256)) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-390473511 256)) (and (= 0 (mod ~x$r_buff1_thd0~0_In-390473511 256)) .cse1))) (= |ULTIMATE.start_main_#t~ite31_Out-390473511| ~x$w_buff1~0_In-390473511)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-390473511, ~x$w_buff1~0=~x$w_buff1~0_In-390473511, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-390473511, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-390473511, ~weak$$choice2~0=~weak$$choice2~0_In-390473511, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-390473511|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-390473511} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-390473511, ~x$w_buff1~0=~x$w_buff1~0_In-390473511, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-390473511, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-390473511|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-390473511, ~weak$$choice2~0=~weak$$choice2~0_In-390473511, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-390473511|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-390473511} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-12-07 11:24:38,212 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [628] [628] L803-->L804: Formula: (and (= v_~x$r_buff0_thd0~0_125 v_~x$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_35 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_35} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_19|, ~weak$$choice2~0=v_~weak$$choice2~0_35} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 11:24:38,212 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L806-->L809-1: Formula: (and (not (= (mod v_~x$flush_delayed~0_27 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_118) (= v_~x$flush_delayed~0_26 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_15 256))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_118, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_21|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:24:38,212 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 11:24:38,257 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 11:24:38 BasicIcfg [2019-12-07 11:24:38,257 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 11:24:38,257 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 11:24:38,257 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 11:24:38,258 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 11:24:38,258 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:24:31" (3/4) ... [2019-12-07 11:24:38,259 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 11:24:38,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [701] [701] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_49| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff0_thd0~0_317 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$r_buff1_thd2~0_153) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1447~0.base_22| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1447~0.base_22| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1447~0.base_22|) |v_ULTIMATE.start_main_~#t1447~0.offset_17| 0)) |v_#memory_int_13|) (= (select .cse0 |v_ULTIMATE.start_main_~#t1447~0.base_22|) 0) (= 0 v_~x~0_144) (= v_~x$r_buff0_thd1~0_115 0) (= |v_ULTIMATE.start_main_~#t1447~0.offset_17| 0) (= 0 v_~__unbuffered_cnt~0_78) (= v_~__unbuffered_p1_EAX~0_103 0) (= 0 v_~x$read_delayed~0_6) (< 0 |v_#StackHeapBarrier_14|) (= 0 v_~x$w_buff1_used~0_381) (= v_~x$flush_delayed~0_36 0) (= 0 |v_#NULL.base_4|) (= 0 v_~x$r_buff0_thd2~0_168) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1447~0.base_22|) (= 0 v_~x$w_buff1~0_166) (= |v_#NULL.offset_4| 0) (= v_~main$tmp_guard1~0_24 0) (= v_~y~0_67 0) (= 0 v_~x$w_buff0~0_193) (= v_~x$r_buff1_thd0~0_243 0) (= v_~main$tmp_guard0~0_24 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1447~0.base_22| 1) |v_#valid_47|) (= v_~weak$$choice2~0_114 0) (= 0 v_~weak$$choice0~0_12) (= 0 v_~x$w_buff0_used~0_609) (= v_~x$r_buff1_thd1~0_167 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_193, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, ~x$flush_delayed~0=v_~x$flush_delayed~0_36, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_167, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_139|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_31|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_~#t1448~0.offset=|v_ULTIMATE.start_main_~#t1448~0.offset_14|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_103, #length=|v_#length_15|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_317, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_31|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_19|, ~x$w_buff1~0=v_~x$w_buff1~0_166, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_28|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_381, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_153, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_37|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, ULTIMATE.start_main_~#t1448~0.base=|v_ULTIMATE.start_main_~#t1448~0.base_17|, ~x~0=v_~x~0_144, ULTIMATE.start_main_~#t1447~0.offset=|v_ULTIMATE.start_main_~#t1447~0.offset_17|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_115, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_23|, ULTIMATE.start_main_~#t1447~0.base=|v_ULTIMATE.start_main_~#t1447~0.base_22|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_40|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_32|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_36|, ~y~0=v_~y~0_67, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_27|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_39|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_243, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_168, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_609, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_21|, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1448~0.offset, ~__unbuffered_p1_EAX~0, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1448~0.base, ~x~0, ULTIMATE.start_main_~#t1447~0.offset, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_~#t1447~0.base, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 11:24:38,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L779-1-->L781: Formula: (and (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t1448~0.base_10| 4) |v_#length_9|) (not (= 0 |v_ULTIMATE.start_main_~#t1448~0.base_10|)) (= |v_#valid_25| (store |v_#valid_26| |v_ULTIMATE.start_main_~#t1448~0.base_10| 1)) (= 0 (select |v_#valid_26| |v_ULTIMATE.start_main_~#t1448~0.base_10|)) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t1448~0.base_10|) (= 0 |v_ULTIMATE.start_main_~#t1448~0.offset_9|) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1448~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1448~0.base_10|) |v_ULTIMATE.start_main_~#t1448~0.offset_9| 1)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_26|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t1448~0.offset=|v_ULTIMATE.start_main_~#t1448~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_25|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_9|, ULTIMATE.start_main_~#t1448~0.base=|v_ULTIMATE.start_main_~#t1448~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1448~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1448~0.base] because there is no mapped edge [2019-12-07 11:24:38,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1_#in~arg.offset_17| v_P1Thread1of1ForFork1_~arg.offset_15) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17)) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|) (= 2 v_~x$w_buff0~0_54) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_216 256))) (not (= 0 (mod v_~x$w_buff1_used~0_127 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.base_15 |v_P1Thread1of1ForFork1_#in~arg.base_17|) (= 1 v_~x$w_buff0_used~0_216) (= v_~x$w_buff0~0_55 v_~x$w_buff1~0_48) (= v_~x$w_buff0_used~0_217 v_~x$w_buff1_used~0_127)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_55, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_217} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17, ~x$w_buff0~0=v_~x$w_buff0~0_54, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_15, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_15, ~x$w_buff1~0=v_~x$w_buff1~0_48, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_127, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_216} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 11:24:38,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L728-2-->L728-5: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In1977888111 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In1977888111 256) 0)) (.cse2 (= |P0Thread1of1ForFork0_#t~ite3_Out1977888111| |P0Thread1of1ForFork0_#t~ite4_Out1977888111|))) (or (and (or .cse0 .cse1) .cse2 (= ~x~0_In1977888111 |P0Thread1of1ForFork0_#t~ite3_Out1977888111|)) (and (not .cse1) (not .cse0) .cse2 (= |P0Thread1of1ForFork0_#t~ite3_Out1977888111| ~x$w_buff1~0_In1977888111)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1977888111, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1977888111, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1977888111, ~x~0=~x~0_In1977888111} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out1977888111|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out1977888111|, ~x$w_buff1~0=~x$w_buff1~0_In1977888111, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1977888111, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1977888111, ~x~0=~x~0_In1977888111} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 11:24:38,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L729-->L729-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In2022490315 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In2022490315 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out2022490315|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In2022490315 |P0Thread1of1ForFork0_#t~ite5_Out2022490315|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2022490315, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2022490315} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out2022490315|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2022490315, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2022490315} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 11:24:38,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L730-->L730-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1888704854 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-1888704854 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-1888704854 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In-1888704854 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1888704854|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$w_buff1_used~0_In-1888704854 |P0Thread1of1ForFork0_#t~ite6_Out-1888704854|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1888704854, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1888704854, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1888704854, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1888704854} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1888704854|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1888704854, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1888704854, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1888704854, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1888704854} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 11:24:38,262 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L757-->L757-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In438798114 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In438798114 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In438798114 |P1Thread1of1ForFork1_#t~ite11_Out438798114|)) (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out438798114|) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In438798114, ~x$w_buff0_used~0=~x$w_buff0_used~0_In438798114} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out438798114|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In438798114, ~x$w_buff0_used~0=~x$w_buff0_used~0_In438798114} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 11:24:38,262 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L731-->L731-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1226845861 256))) (.cse1 (= (mod ~x$r_buff0_thd1~0_In1226845861 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite7_Out1226845861| 0) (not .cse1)) (and (= ~x$r_buff0_thd1~0_In1226845861 |P0Thread1of1ForFork0_#t~ite7_Out1226845861|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1226845861, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1226845861} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1226845861, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1226845861|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1226845861} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 11:24:38,262 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L732-->L732-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In968072109 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd1~0_In968072109 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd1~0_In968072109 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In968072109 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out968072109|)) (and (or .cse1 .cse0) (= ~x$r_buff1_thd1~0_In968072109 |P0Thread1of1ForFork0_#t~ite8_Out968072109|) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In968072109, ~x$w_buff1_used~0=~x$w_buff1_used~0_In968072109, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In968072109, ~x$w_buff0_used~0=~x$w_buff0_used~0_In968072109} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In968072109, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out968072109|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In968072109, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In968072109, ~x$w_buff0_used~0=~x$w_buff0_used~0_In968072109} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 11:24:38,262 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L732-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_125} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 11:24:38,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L758-->L758-2: Formula: (let ((.cse3 (= (mod ~x$r_buff1_thd2~0_In-1534604350 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1534604350 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1534604350 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1534604350 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-1534604350|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~x$w_buff1_used~0_In-1534604350 |P1Thread1of1ForFork1_#t~ite12_Out-1534604350|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1534604350, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1534604350, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1534604350, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1534604350} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1534604350, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1534604350, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1534604350|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1534604350, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1534604350} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 11:24:38,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L759-->L760: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_Out116570076 ~x$r_buff0_thd2~0_In116570076)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In116570076 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In116570076 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse0) (not .cse2) (= ~x$r_buff0_thd2~0_Out116570076 0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In116570076, ~x$w_buff0_used~0=~x$w_buff0_used~0_In116570076} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out116570076|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out116570076, ~x$w_buff0_used~0=~x$w_buff0_used~0_In116570076} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 11:24:38,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L760-->L760-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In1970608595 256))) (.cse0 (= (mod ~x$r_buff1_thd2~0_In1970608595 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In1970608595 256))) (.cse2 (= (mod ~x$r_buff0_thd2~0_In1970608595 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out1970608595|)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite14_Out1970608595| ~x$r_buff1_thd2~0_In1970608595) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1970608595, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1970608595, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1970608595, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1970608595} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1970608595, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1970608595, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1970608595, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1970608595|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1970608595} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 11:24:38,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L760-2-->P1EXIT: Formula: (and (= v_~x$r_buff1_thd2~0_125 |v_P1Thread1of1ForFork1_#t~ite14_34|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_34|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_33|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 11:24:38,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [586] [586] L781-1-->L787: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 2 v_~__unbuffered_cnt~0_11) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:24:38,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L787-2-->L787-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite18_Out-1884583143| |ULTIMATE.start_main_#t~ite17_Out-1884583143|)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1884583143 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-1884583143 256)))) (or (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite17_Out-1884583143| ~x$w_buff1~0_In-1884583143)) (and (= ~x~0_In-1884583143 |ULTIMATE.start_main_#t~ite17_Out-1884583143|) .cse2 (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1884583143, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1884583143, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1884583143, ~x~0=~x~0_In-1884583143} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-1884583143|, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1884583143|, ~x$w_buff1~0=~x$w_buff1~0_In-1884583143, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1884583143, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1884583143, ~x~0=~x~0_In-1884583143} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-12-07 11:24:38,264 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1225683503 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In1225683503 256)))) (or (and (= ~x$w_buff0_used~0_In1225683503 |ULTIMATE.start_main_#t~ite19_Out1225683503|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite19_Out1225683503|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1225683503, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1225683503} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1225683503, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1225683503|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1225683503} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 11:24:38,264 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L789-->L789-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In-415641299 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd0~0_In-415641299 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-415641299 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-415641299 256)))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out-415641299| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite20_Out-415641299| ~x$w_buff1_used~0_In-415641299)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-415641299, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-415641299, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-415641299, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-415641299} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-415641299, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-415641299, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-415641299|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-415641299, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-415641299} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 11:24:38,264 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L790-->L790-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In35455399 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In35455399 256) 0))) (or (and (= ~x$r_buff0_thd0~0_In35455399 |ULTIMATE.start_main_#t~ite21_Out35455399|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite21_Out35455399|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In35455399, ~x$w_buff0_used~0=~x$w_buff0_used~0_In35455399} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In35455399, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out35455399|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In35455399} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 11:24:38,264 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L791-->L791-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In1271721695 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd0~0_In1271721695 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1271721695 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1271721695 256)))) (or (and (= ~x$r_buff1_thd0~0_In1271721695 |ULTIMATE.start_main_#t~ite22_Out1271721695|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite22_Out1271721695| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1271721695, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1271721695, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1271721695, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1271721695} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1271721695, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1271721695, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1271721695, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1271721695|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1271721695} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 11:24:38,265 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L800-->L800-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-390473511 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite31_In-390473511| |ULTIMATE.start_main_#t~ite31_Out-390473511|) (= |ULTIMATE.start_main_#t~ite32_Out-390473511| ~x$w_buff1~0_In-390473511)) (and .cse0 (= |ULTIMATE.start_main_#t~ite31_Out-390473511| |ULTIMATE.start_main_#t~ite32_Out-390473511|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-390473511 256)))) (or (and (= 0 (mod ~x$w_buff1_used~0_In-390473511 256)) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-390473511 256)) (and (= 0 (mod ~x$r_buff1_thd0~0_In-390473511 256)) .cse1))) (= |ULTIMATE.start_main_#t~ite31_Out-390473511| ~x$w_buff1~0_In-390473511)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-390473511, ~x$w_buff1~0=~x$w_buff1~0_In-390473511, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-390473511, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-390473511, ~weak$$choice2~0=~weak$$choice2~0_In-390473511, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-390473511|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-390473511} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-390473511, ~x$w_buff1~0=~x$w_buff1~0_In-390473511, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-390473511, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-390473511|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-390473511, ~weak$$choice2~0=~weak$$choice2~0_In-390473511, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-390473511|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-390473511} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-12-07 11:24:38,266 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [628] [628] L803-->L804: Formula: (and (= v_~x$r_buff0_thd0~0_125 v_~x$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_35 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_35} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_19|, ~weak$$choice2~0=v_~weak$$choice2~0_35} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 11:24:38,266 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L806-->L809-1: Formula: (and (not (= (mod v_~x$flush_delayed~0_27 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_118) (= v_~x$flush_delayed~0_26 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_15 256))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_118, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_21|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:24:38,266 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 11:24:38,320 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_8bf64556-500e-43d9-9126-ff7d580323a5/bin/uautomizer/witness.graphml [2019-12-07 11:24:38,320 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 11:24:38,321 INFO L168 Benchmark]: Toolchain (without parser) took 7944.37 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 251.7 MB). Free memory was 939.3 MB in the beginning and 1.0 GB in the end (delta: -106.1 MB). Peak memory consumption was 145.6 MB. Max. memory is 11.5 GB. [2019-12-07 11:24:38,321 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:24:38,322 INFO L168 Benchmark]: CACSL2BoogieTranslator took 393.76 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 100.7 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -133.1 MB). Peak memory consumption was 29.0 MB. Max. memory is 11.5 GB. [2019-12-07 11:24:38,322 INFO L168 Benchmark]: Boogie Procedure Inliner took 42.04 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 11:24:38,322 INFO L168 Benchmark]: Boogie Preprocessor took 24.66 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:24:38,322 INFO L168 Benchmark]: RCFGBuilder took 378.35 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.1 MB). Peak memory consumption was 50.1 MB. Max. memory is 11.5 GB. [2019-12-07 11:24:38,323 INFO L168 Benchmark]: TraceAbstraction took 7039.91 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 151.0 MB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -47.8 MB). Peak memory consumption was 103.2 MB. Max. memory is 11.5 GB. [2019-12-07 11:24:38,323 INFO L168 Benchmark]: Witness Printer took 62.63 ms. Allocated memory is still 1.3 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 19.3 MB). Peak memory consumption was 19.3 MB. Max. memory is 11.5 GB. [2019-12-07 11:24:38,325 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 393.76 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 100.7 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -133.1 MB). Peak memory consumption was 29.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 42.04 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.66 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 378.35 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.1 MB). Peak memory consumption was 50.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 7039.91 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 151.0 MB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -47.8 MB). Peak memory consumption was 103.2 MB. Max. memory is 11.5 GB. * Witness Printer took 62.63 ms. Allocated memory is still 1.3 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 19.3 MB). Peak memory consumption was 19.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.5s, 146 ProgramPointsBefore, 78 ProgramPointsAfterwards, 180 TransitionsBefore, 90 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 28 TrivialSequentialCompositions, 36 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 36 ConcurrentYvCompositions, 25 ChoiceCompositions, 3816 VarBasedMoverChecksPositive, 194 VarBasedMoverChecksNegative, 52 SemBasedMoverChecksPositive, 191 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 46078 CheckedPairsTotal, 100 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L779] FCALL, FORK 0 pthread_create(&t1447, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L781] FCALL, FORK 0 pthread_create(&t1448, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L747] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L748] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L749] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L750] 2 x$r_buff0_thd2 = (_Bool)1 [L753] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L756] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L722] 1 y = 1 [L725] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L729] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L730] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L756] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L757] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L731] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L758] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L788] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L789] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L790] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L791] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 x$flush_delayed = weak$$choice2 [L797] 0 x$mem_tmp = x VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L799] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L799] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L800] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L801] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L801] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L802] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L804] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L804] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 0) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 140 locations, 2 error locations. Result: UNSAFE, OverallTime: 6.9s, OverallIterations: 16, TraceHistogramMax: 1, AutomataDifference: 2.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1646 SDtfs, 1269 SDslu, 3546 SDs, 0 SdLazy, 2318 SolverSat, 109 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 142 GetRequests, 34 SyntacticMatches, 19 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 138 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8413occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 15 MinimizatonAttempts, 1464 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 667 NumberOfCodeBlocks, 667 NumberOfCodeBlocksAsserted, 16 NumberOfCheckSat, 598 ConstructedInterpolants, 0 QuantifiedInterpolants, 84726 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 15 InterpolantComputations, 15 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...