./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix054_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_b96f02da-ec0a-49e0-9e9d-e719cf44ba58/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_b96f02da-ec0a-49e0-9e9d-e719cf44ba58/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_b96f02da-ec0a-49e0-9e9d-e719cf44ba58/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_b96f02da-ec0a-49e0-9e9d-e719cf44ba58/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix054_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_b96f02da-ec0a-49e0-9e9d-e719cf44ba58/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_b96f02da-ec0a-49e0-9e9d-e719cf44ba58/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2cfae812637f994f4499329b4635c7ce29b263dc ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:15:09,449 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:15:09,450 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:15:09,457 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:15:09,458 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:15:09,458 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:15:09,459 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:15:09,460 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:15:09,462 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:15:09,462 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:15:09,463 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:15:09,464 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:15:09,464 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:15:09,464 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:15:09,465 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:15:09,466 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:15:09,466 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:15:09,467 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:15:09,469 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:15:09,470 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:15:09,471 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:15:09,472 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:15:09,473 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:15:09,473 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:15:09,475 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:15:09,475 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:15:09,475 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:15:09,476 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:15:09,476 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:15:09,477 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:15:09,477 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:15:09,477 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:15:09,477 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:15:09,478 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:15:09,479 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:15:09,479 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:15:09,479 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:15:09,479 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:15:09,479 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:15:09,480 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:15:09,480 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:15:09,481 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_b96f02da-ec0a-49e0-9e9d-e719cf44ba58/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 13:15:09,490 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:15:09,490 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:15:09,491 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 13:15:09,491 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 13:15:09,491 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 13:15:09,491 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:15:09,491 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:15:09,491 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:15:09,491 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:15:09,491 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:15:09,491 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:15:09,492 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:15:09,492 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:15:09,492 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:15:09,492 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:15:09,492 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:15:09,492 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:15:09,492 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:15:09,492 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 13:15:09,492 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:15:09,493 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:15:09,493 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:15:09,493 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:15:09,493 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:15:09,493 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:15:09,493 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 13:15:09,493 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:15:09,493 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:15:09,494 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:15:09,494 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_b96f02da-ec0a-49e0-9e9d-e719cf44ba58/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2cfae812637f994f4499329b4635c7ce29b263dc [2019-12-07 13:15:09,596 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:15:09,606 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:15:09,609 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:15:09,610 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:15:09,611 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:15:09,611 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_b96f02da-ec0a-49e0-9e9d-e719cf44ba58/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix054_rmo.opt.i [2019-12-07 13:15:09,659 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b96f02da-ec0a-49e0-9e9d-e719cf44ba58/bin/uautomizer/data/d7ab46ee9/184d02f33a824a0cb5547d4357d24e93/FLAG8d12dfeb1 [2019-12-07 13:15:10,155 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:15:10,155 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_b96f02da-ec0a-49e0-9e9d-e719cf44ba58/sv-benchmarks/c/pthread-wmm/mix054_rmo.opt.i [2019-12-07 13:15:10,166 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b96f02da-ec0a-49e0-9e9d-e719cf44ba58/bin/uautomizer/data/d7ab46ee9/184d02f33a824a0cb5547d4357d24e93/FLAG8d12dfeb1 [2019-12-07 13:15:10,175 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_b96f02da-ec0a-49e0-9e9d-e719cf44ba58/bin/uautomizer/data/d7ab46ee9/184d02f33a824a0cb5547d4357d24e93 [2019-12-07 13:15:10,177 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:15:10,178 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:15:10,178 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:15:10,178 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:15:10,181 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:15:10,181 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:15:10" (1/1) ... [2019-12-07 13:15:10,183 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:15:10, skipping insertion in model container [2019-12-07 13:15:10,183 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:15:10" (1/1) ... [2019-12-07 13:15:10,188 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:15:10,217 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:15:10,477 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:15:10,486 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:15:10,529 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:15:10,581 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:15:10,581 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:15:10 WrapperNode [2019-12-07 13:15:10,581 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:15:10,582 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:15:10,582 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:15:10,582 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:15:10,588 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:15:10" (1/1) ... [2019-12-07 13:15:10,601 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:15:10" (1/1) ... [2019-12-07 13:15:10,622 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:15:10,623 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:15:10,623 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:15:10,623 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:15:10,629 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:15:10" (1/1) ... [2019-12-07 13:15:10,629 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:15:10" (1/1) ... [2019-12-07 13:15:10,633 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:15:10" (1/1) ... [2019-12-07 13:15:10,633 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:15:10" (1/1) ... [2019-12-07 13:15:10,639 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:15:10" (1/1) ... [2019-12-07 13:15:10,642 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:15:10" (1/1) ... [2019-12-07 13:15:10,644 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:15:10" (1/1) ... [2019-12-07 13:15:10,647 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:15:10,647 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:15:10,647 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:15:10,647 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:15:10,648 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:15:10" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_b96f02da-ec0a-49e0-9e9d-e719cf44ba58/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:15:10,688 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 13:15:10,688 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 13:15:10,688 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 13:15:10,688 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 13:15:10,688 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 13:15:10,688 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 13:15:10,688 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 13:15:10,688 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 13:15:10,689 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 13:15:10,689 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:15:10,689 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:15:10,690 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 13:15:11,019 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:15:11,019 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 13:15:11,020 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:15:11 BoogieIcfgContainer [2019-12-07 13:15:11,020 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:15:11,020 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:15:11,020 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:15:11,022 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:15:11,022 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:15:10" (1/3) ... [2019-12-07 13:15:11,023 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@47439f52 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:15:11, skipping insertion in model container [2019-12-07 13:15:11,023 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:15:10" (2/3) ... [2019-12-07 13:15:11,023 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@47439f52 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:15:11, skipping insertion in model container [2019-12-07 13:15:11,023 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:15:11" (3/3) ... [2019-12-07 13:15:11,024 INFO L109 eAbstractionObserver]: Analyzing ICFG mix054_rmo.opt.i [2019-12-07 13:15:11,031 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 13:15:11,031 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:15:11,036 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:15:11,036 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 13:15:11,057 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,057 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,057 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,057 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,057 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,060 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,060 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,060 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,060 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,060 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,060 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,060 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,060 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,061 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,061 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,061 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,061 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,061 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,061 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,062 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,062 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,062 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,062 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,062 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,062 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,062 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,062 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,063 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,063 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,063 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,063 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,063 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,063 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,063 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,063 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,064 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,064 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,064 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,064 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,064 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,064 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,064 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,064 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,064 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,064 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,065 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,065 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:15:11,075 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 13:15:11,087 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:15:11,087 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:15:11,087 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:15:11,087 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:15:11,087 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:15:11,088 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:15:11,088 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:15:11,088 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:15:11,098 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 146 places, 180 transitions [2019-12-07 13:15:11,099 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-12-07 13:15:11,145 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-12-07 13:15:11,146 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:15:11,154 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 458 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 13:15:11,165 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-12-07 13:15:11,186 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-12-07 13:15:11,186 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:15:11,189 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 458 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 13:15:11,198 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-12-07 13:15:11,199 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 13:15:13,571 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 79 [2019-12-07 13:15:13,649 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46078 [2019-12-07 13:15:13,650 INFO L214 etLargeBlockEncoding]: Total number of compositions: 100 [2019-12-07 13:15:13,652 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 78 places, 90 transitions [2019-12-07 13:15:13,947 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8413 states. [2019-12-07 13:15:13,949 INFO L276 IsEmpty]: Start isEmpty. Operand 8413 states. [2019-12-07 13:15:13,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 13:15:13,953 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:15:13,954 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 13:15:13,954 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:15:13,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:15:13,958 INFO L82 PathProgramCache]: Analyzing trace with hash 693777882, now seen corresponding path program 1 times [2019-12-07 13:15:13,964 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:15:13,964 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1014331566] [2019-12-07 13:15:13,964 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:15:14,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:15:14,107 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:15:14,108 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1014331566] [2019-12-07 13:15:14,108 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:15:14,109 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:15:14,109 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1486765226] [2019-12-07 13:15:14,112 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:15:14,113 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:15:14,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:15:14,123 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:15:14,124 INFO L87 Difference]: Start difference. First operand 8413 states. Second operand 3 states. [2019-12-07 13:15:14,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:15:14,315 INFO L93 Difference]: Finished difference Result 8377 states and 27415 transitions. [2019-12-07 13:15:14,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:15:14,316 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 13:15:14,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:15:14,373 INFO L225 Difference]: With dead ends: 8377 [2019-12-07 13:15:14,373 INFO L226 Difference]: Without dead ends: 8208 [2019-12-07 13:15:14,374 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:15:14,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8208 states. [2019-12-07 13:15:14,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8208 to 8208. [2019-12-07 13:15:14,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8208 states. [2019-12-07 13:15:14,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8208 states to 8208 states and 26895 transitions. [2019-12-07 13:15:14,650 INFO L78 Accepts]: Start accepts. Automaton has 8208 states and 26895 transitions. Word has length 5 [2019-12-07 13:15:14,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:15:14,650 INFO L462 AbstractCegarLoop]: Abstraction has 8208 states and 26895 transitions. [2019-12-07 13:15:14,650 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:15:14,651 INFO L276 IsEmpty]: Start isEmpty. Operand 8208 states and 26895 transitions. [2019-12-07 13:15:14,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 13:15:14,652 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:15:14,652 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:15:14,652 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:15:14,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:15:14,653 INFO L82 PathProgramCache]: Analyzing trace with hash 2143808117, now seen corresponding path program 1 times [2019-12-07 13:15:14,653 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:15:14,653 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1977211457] [2019-12-07 13:15:14,653 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:15:14,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:15:14,696 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:15:14,697 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1977211457] [2019-12-07 13:15:14,697 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:15:14,697 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:15:14,697 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1694495551] [2019-12-07 13:15:14,698 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:15:14,698 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:15:14,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:15:14,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:15:14,698 INFO L87 Difference]: Start difference. First operand 8208 states and 26895 transitions. Second operand 3 states. [2019-12-07 13:15:14,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:15:14,721 INFO L93 Difference]: Finished difference Result 1326 states and 3037 transitions. [2019-12-07 13:15:14,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:15:14,721 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2019-12-07 13:15:14,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:15:14,729 INFO L225 Difference]: With dead ends: 1326 [2019-12-07 13:15:14,730 INFO L226 Difference]: Without dead ends: 1326 [2019-12-07 13:15:14,730 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:15:14,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1326 states. [2019-12-07 13:15:14,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1326 to 1326. [2019-12-07 13:15:14,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1326 states. [2019-12-07 13:15:14,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1326 states to 1326 states and 3037 transitions. [2019-12-07 13:15:14,764 INFO L78 Accepts]: Start accepts. Automaton has 1326 states and 3037 transitions. Word has length 11 [2019-12-07 13:15:14,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:15:14,764 INFO L462 AbstractCegarLoop]: Abstraction has 1326 states and 3037 transitions. [2019-12-07 13:15:14,764 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:15:14,765 INFO L276 IsEmpty]: Start isEmpty. Operand 1326 states and 3037 transitions. [2019-12-07 13:15:14,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 13:15:14,765 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:15:14,766 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:15:14,766 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:15:14,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:15:14,766 INFO L82 PathProgramCache]: Analyzing trace with hash 1923085964, now seen corresponding path program 1 times [2019-12-07 13:15:14,766 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:15:14,766 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1880033265] [2019-12-07 13:15:14,767 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:15:14,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:15:14,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:15:14,833 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1880033265] [2019-12-07 13:15:14,833 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:15:14,833 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:15:14,833 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1394165307] [2019-12-07 13:15:14,834 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:15:14,834 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:15:14,834 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:15:14,834 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:15:14,834 INFO L87 Difference]: Start difference. First operand 1326 states and 3037 transitions. Second operand 4 states. [2019-12-07 13:15:15,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:15:15,036 INFO L93 Difference]: Finished difference Result 1806 states and 4001 transitions. [2019-12-07 13:15:15,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:15:15,037 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 13:15:15,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:15:15,047 INFO L225 Difference]: With dead ends: 1806 [2019-12-07 13:15:15,047 INFO L226 Difference]: Without dead ends: 1806 [2019-12-07 13:15:15,048 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:15:15,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1806 states. [2019-12-07 13:15:15,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1806 to 1654. [2019-12-07 13:15:15,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1654 states. [2019-12-07 13:15:15,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1654 states to 1654 states and 3712 transitions. [2019-12-07 13:15:15,092 INFO L78 Accepts]: Start accepts. Automaton has 1654 states and 3712 transitions. Word has length 11 [2019-12-07 13:15:15,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:15:15,092 INFO L462 AbstractCegarLoop]: Abstraction has 1654 states and 3712 transitions. [2019-12-07 13:15:15,092 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:15:15,093 INFO L276 IsEmpty]: Start isEmpty. Operand 1654 states and 3712 transitions. [2019-12-07 13:15:15,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 13:15:15,095 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:15:15,095 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:15:15,096 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:15:15,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:15:15,096 INFO L82 PathProgramCache]: Analyzing trace with hash 909891733, now seen corresponding path program 1 times [2019-12-07 13:15:15,096 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:15:15,096 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [732779411] [2019-12-07 13:15:15,096 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:15:15,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:15:15,151 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:15:15,152 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [732779411] [2019-12-07 13:15:15,152 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:15:15,152 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:15:15,152 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1187934659] [2019-12-07 13:15:15,153 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:15:15,153 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:15:15,153 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:15:15,153 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:15:15,153 INFO L87 Difference]: Start difference. First operand 1654 states and 3712 transitions. Second operand 4 states. [2019-12-07 13:15:15,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:15:15,167 INFO L93 Difference]: Finished difference Result 356 states and 659 transitions. [2019-12-07 13:15:15,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:15:15,167 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2019-12-07 13:15:15,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:15:15,169 INFO L225 Difference]: With dead ends: 356 [2019-12-07 13:15:15,169 INFO L226 Difference]: Without dead ends: 356 [2019-12-07 13:15:15,170 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:15:15,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 356 states. [2019-12-07 13:15:15,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 356 to 321. [2019-12-07 13:15:15,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321 states. [2019-12-07 13:15:15,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 594 transitions. [2019-12-07 13:15:15,178 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 594 transitions. Word has length 23 [2019-12-07 13:15:15,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:15:15,178 INFO L462 AbstractCegarLoop]: Abstraction has 321 states and 594 transitions. [2019-12-07 13:15:15,178 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:15:15,178 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 594 transitions. [2019-12-07 13:15:15,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 13:15:15,180 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:15:15,180 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:15:15,180 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:15:15,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:15:15,181 INFO L82 PathProgramCache]: Analyzing trace with hash 763517816, now seen corresponding path program 1 times [2019-12-07 13:15:15,181 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:15:15,181 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1172774498] [2019-12-07 13:15:15,181 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:15:15,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:15:15,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:15:15,235 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1172774498] [2019-12-07 13:15:15,235 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:15:15,235 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:15:15,235 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1570799787] [2019-12-07 13:15:15,235 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:15:15,236 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:15:15,236 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:15:15,236 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:15:15,236 INFO L87 Difference]: Start difference. First operand 321 states and 594 transitions. Second operand 3 states. [2019-12-07 13:15:15,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:15:15,270 INFO L93 Difference]: Finished difference Result 331 states and 608 transitions. [2019-12-07 13:15:15,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:15:15,270 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-12-07 13:15:15,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:15:15,272 INFO L225 Difference]: With dead ends: 331 [2019-12-07 13:15:15,272 INFO L226 Difference]: Without dead ends: 331 [2019-12-07 13:15:15,272 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:15:15,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2019-12-07 13:15:15,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 327. [2019-12-07 13:15:15,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2019-12-07 13:15:15,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 604 transitions. [2019-12-07 13:15:15,278 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 604 transitions. Word has length 52 [2019-12-07 13:15:15,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:15:15,278 INFO L462 AbstractCegarLoop]: Abstraction has 327 states and 604 transitions. [2019-12-07 13:15:15,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:15:15,279 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 604 transitions. [2019-12-07 13:15:15,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 13:15:15,280 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:15:15,280 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:15:15,280 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:15:15,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:15:15,280 INFO L82 PathProgramCache]: Analyzing trace with hash 1269350019, now seen corresponding path program 1 times [2019-12-07 13:15:15,280 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:15:15,280 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1176789775] [2019-12-07 13:15:15,280 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:15:15,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:15:15,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:15:15,341 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1176789775] [2019-12-07 13:15:15,342 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:15:15,342 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:15:15,342 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1533828275] [2019-12-07 13:15:15,342 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:15:15,342 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:15:15,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:15:15,342 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:15:15,343 INFO L87 Difference]: Start difference. First operand 327 states and 604 transitions. Second operand 5 states. [2019-12-07 13:15:15,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:15:15,477 INFO L93 Difference]: Finished difference Result 458 states and 840 transitions. [2019-12-07 13:15:15,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:15:15,477 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-12-07 13:15:15,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:15:15,479 INFO L225 Difference]: With dead ends: 458 [2019-12-07 13:15:15,479 INFO L226 Difference]: Without dead ends: 458 [2019-12-07 13:15:15,480 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:15:15,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 458 states. [2019-12-07 13:15:15,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 458 to 374. [2019-12-07 13:15:15,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 374 states. [2019-12-07 13:15:15,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 374 states to 374 states and 695 transitions. [2019-12-07 13:15:15,488 INFO L78 Accepts]: Start accepts. Automaton has 374 states and 695 transitions. Word has length 52 [2019-12-07 13:15:15,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:15:15,488 INFO L462 AbstractCegarLoop]: Abstraction has 374 states and 695 transitions. [2019-12-07 13:15:15,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:15:15,489 INFO L276 IsEmpty]: Start isEmpty. Operand 374 states and 695 transitions. [2019-12-07 13:15:15,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 13:15:15,490 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:15:15,490 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:15:15,490 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:15:15,490 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:15:15,490 INFO L82 PathProgramCache]: Analyzing trace with hash 544633013, now seen corresponding path program 2 times [2019-12-07 13:15:15,491 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:15:15,491 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2021980853] [2019-12-07 13:15:15,491 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:15:15,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:15:15,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:15:15,564 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2021980853] [2019-12-07 13:15:15,565 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:15:15,565 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:15:15,565 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [238596252] [2019-12-07 13:15:15,565 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:15:15,565 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:15:15,566 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:15:15,566 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:15:15,566 INFO L87 Difference]: Start difference. First operand 374 states and 695 transitions. Second operand 6 states. [2019-12-07 13:15:15,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:15:15,773 INFO L93 Difference]: Finished difference Result 513 states and 942 transitions. [2019-12-07 13:15:15,773 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 13:15:15,773 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-07 13:15:15,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:15:15,776 INFO L225 Difference]: With dead ends: 513 [2019-12-07 13:15:15,776 INFO L226 Difference]: Without dead ends: 513 [2019-12-07 13:15:15,776 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:15:15,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 513 states. [2019-12-07 13:15:15,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 513 to 406. [2019-12-07 13:15:15,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 406 states. [2019-12-07 13:15:15,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 406 states to 406 states and 754 transitions. [2019-12-07 13:15:15,783 INFO L78 Accepts]: Start accepts. Automaton has 406 states and 754 transitions. Word has length 52 [2019-12-07 13:15:15,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:15:15,784 INFO L462 AbstractCegarLoop]: Abstraction has 406 states and 754 transitions. [2019-12-07 13:15:15,784 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:15:15,784 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 754 transitions. [2019-12-07 13:15:15,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 13:15:15,785 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:15:15,785 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:15:15,785 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:15:15,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:15:15,786 INFO L82 PathProgramCache]: Analyzing trace with hash 1227473235, now seen corresponding path program 3 times [2019-12-07 13:15:15,786 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:15:15,786 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [496399029] [2019-12-07 13:15:15,786 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:15:15,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:15:15,853 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:15:15,853 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [496399029] [2019-12-07 13:15:15,853 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:15:15,853 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:15:15,853 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2071420935] [2019-12-07 13:15:15,854 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:15:15,854 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:15:15,854 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:15:15,854 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:15:15,854 INFO L87 Difference]: Start difference. First operand 406 states and 754 transitions. Second operand 6 states. [2019-12-07 13:15:16,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:15:16,048 INFO L93 Difference]: Finished difference Result 694 states and 1274 transitions. [2019-12-07 13:15:16,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:15:16,049 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-07 13:15:16,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:15:16,052 INFO L225 Difference]: With dead ends: 694 [2019-12-07 13:15:16,052 INFO L226 Difference]: Without dead ends: 694 [2019-12-07 13:15:16,053 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:15:16,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 694 states. [2019-12-07 13:15:16,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 694 to 445. [2019-12-07 13:15:16,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 445 states. [2019-12-07 13:15:16,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 833 transitions. [2019-12-07 13:15:16,060 INFO L78 Accepts]: Start accepts. Automaton has 445 states and 833 transitions. Word has length 52 [2019-12-07 13:15:16,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:15:16,060 INFO L462 AbstractCegarLoop]: Abstraction has 445 states and 833 transitions. [2019-12-07 13:15:16,060 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:15:16,060 INFO L276 IsEmpty]: Start isEmpty. Operand 445 states and 833 transitions. [2019-12-07 13:15:16,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 13:15:16,061 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:15:16,061 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:15:16,061 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:15:16,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:15:16,061 INFO L82 PathProgramCache]: Analyzing trace with hash 1833025349, now seen corresponding path program 4 times [2019-12-07 13:15:16,061 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:15:16,062 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [843271641] [2019-12-07 13:15:16,062 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:15:16,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:15:16,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:15:16,129 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [843271641] [2019-12-07 13:15:16,129 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:15:16,130 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:15:16,130 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1948630140] [2019-12-07 13:15:16,130 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:15:16,130 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:15:16,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:15:16,131 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:15:16,131 INFO L87 Difference]: Start difference. First operand 445 states and 833 transitions. Second operand 7 states. [2019-12-07 13:15:16,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:15:16,355 INFO L93 Difference]: Finished difference Result 702 states and 1289 transitions. [2019-12-07 13:15:16,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 13:15:16,355 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-12-07 13:15:16,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:15:16,358 INFO L225 Difference]: With dead ends: 702 [2019-12-07 13:15:16,358 INFO L226 Difference]: Without dead ends: 702 [2019-12-07 13:15:16,358 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:15:16,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 702 states. [2019-12-07 13:15:16,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 702 to 424. [2019-12-07 13:15:16,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 424 states. [2019-12-07 13:15:16,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 424 states to 424 states and 792 transitions. [2019-12-07 13:15:16,365 INFO L78 Accepts]: Start accepts. Automaton has 424 states and 792 transitions. Word has length 52 [2019-12-07 13:15:16,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:15:16,365 INFO L462 AbstractCegarLoop]: Abstraction has 424 states and 792 transitions. [2019-12-07 13:15:16,365 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:15:16,365 INFO L276 IsEmpty]: Start isEmpty. Operand 424 states and 792 transitions. [2019-12-07 13:15:16,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 13:15:16,366 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:15:16,366 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:15:16,366 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:15:16,366 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:15:16,367 INFO L82 PathProgramCache]: Analyzing trace with hash 513839464, now seen corresponding path program 1 times [2019-12-07 13:15:16,367 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:15:16,367 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1779228955] [2019-12-07 13:15:16,367 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:15:16,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:15:16,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:15:16,466 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1779228955] [2019-12-07 13:15:16,466 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:15:16,466 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:15:16,466 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [113591271] [2019-12-07 13:15:16,467 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 13:15:16,467 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:15:16,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 13:15:16,467 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 13:15:16,467 INFO L87 Difference]: Start difference. First operand 424 states and 792 transitions. Second operand 8 states. [2019-12-07 13:15:16,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:15:16,789 INFO L93 Difference]: Finished difference Result 687 states and 1228 transitions. [2019-12-07 13:15:16,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 13:15:16,789 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 53 [2019-12-07 13:15:16,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:15:16,792 INFO L225 Difference]: With dead ends: 687 [2019-12-07 13:15:16,792 INFO L226 Difference]: Without dead ends: 687 [2019-12-07 13:15:16,792 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2019-12-07 13:15:16,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 687 states. [2019-12-07 13:15:16,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 687 to 372. [2019-12-07 13:15:16,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 372 states. [2019-12-07 13:15:16,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 372 states to 372 states and 679 transitions. [2019-12-07 13:15:16,798 INFO L78 Accepts]: Start accepts. Automaton has 372 states and 679 transitions. Word has length 53 [2019-12-07 13:15:16,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:15:16,798 INFO L462 AbstractCegarLoop]: Abstraction has 372 states and 679 transitions. [2019-12-07 13:15:16,798 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 13:15:16,798 INFO L276 IsEmpty]: Start isEmpty. Operand 372 states and 679 transitions. [2019-12-07 13:15:16,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 13:15:16,799 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:15:16,799 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:15:16,799 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:15:16,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:15:16,799 INFO L82 PathProgramCache]: Analyzing trace with hash -162355984, now seen corresponding path program 2 times [2019-12-07 13:15:16,799 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:15:16,799 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2123321226] [2019-12-07 13:15:16,800 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:15:16,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:15:16,838 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:15:16,838 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2123321226] [2019-12-07 13:15:16,838 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:15:16,838 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:15:16,839 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1448432638] [2019-12-07 13:15:16,839 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:15:16,839 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:15:16,839 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:15:16,839 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:15:16,839 INFO L87 Difference]: Start difference. First operand 372 states and 679 transitions. Second operand 3 states. [2019-12-07 13:15:16,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:15:16,864 INFO L93 Difference]: Finished difference Result 372 states and 678 transitions. [2019-12-07 13:15:16,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:15:16,864 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 13:15:16,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:15:16,866 INFO L225 Difference]: With dead ends: 372 [2019-12-07 13:15:16,866 INFO L226 Difference]: Without dead ends: 372 [2019-12-07 13:15:16,866 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:15:16,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 372 states. [2019-12-07 13:15:16,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 372 to 279. [2019-12-07 13:15:16,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 279 states. [2019-12-07 13:15:16,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 279 states to 279 states and 504 transitions. [2019-12-07 13:15:16,870 INFO L78 Accepts]: Start accepts. Automaton has 279 states and 504 transitions. Word has length 53 [2019-12-07 13:15:16,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:15:16,870 INFO L462 AbstractCegarLoop]: Abstraction has 279 states and 504 transitions. [2019-12-07 13:15:16,870 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:15:16,871 INFO L276 IsEmpty]: Start isEmpty. Operand 279 states and 504 transitions. [2019-12-07 13:15:16,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 13:15:16,871 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:15:16,871 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:15:16,871 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:15:16,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:15:16,872 INFO L82 PathProgramCache]: Analyzing trace with hash 2112965781, now seen corresponding path program 1 times [2019-12-07 13:15:16,872 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:15:16,872 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1966078472] [2019-12-07 13:15:16,872 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:15:16,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:15:16,951 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:15:16,951 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1966078472] [2019-12-07 13:15:16,952 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:15:16,952 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:15:16,952 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1032368564] [2019-12-07 13:15:16,952 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:15:16,952 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:15:16,952 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:15:16,952 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:15:16,952 INFO L87 Difference]: Start difference. First operand 279 states and 504 transitions. Second operand 7 states. [2019-12-07 13:15:17,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:15:17,017 INFO L93 Difference]: Finished difference Result 493 states and 887 transitions. [2019-12-07 13:15:17,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 13:15:17,017 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 53 [2019-12-07 13:15:17,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:15:17,018 INFO L225 Difference]: With dead ends: 493 [2019-12-07 13:15:17,018 INFO L226 Difference]: Without dead ends: 231 [2019-12-07 13:15:17,018 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:15:17,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2019-12-07 13:15:17,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 207. [2019-12-07 13:15:17,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2019-12-07 13:15:17,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 362 transitions. [2019-12-07 13:15:17,021 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 362 transitions. Word has length 53 [2019-12-07 13:15:17,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:15:17,021 INFO L462 AbstractCegarLoop]: Abstraction has 207 states and 362 transitions. [2019-12-07 13:15:17,021 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:15:17,022 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 362 transitions. [2019-12-07 13:15:17,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 13:15:17,022 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:15:17,022 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:15:17,022 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:15:17,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:15:17,022 INFO L82 PathProgramCache]: Analyzing trace with hash -1571611631, now seen corresponding path program 2 times [2019-12-07 13:15:17,023 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:15:17,023 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1556713247] [2019-12-07 13:15:17,023 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:15:17,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:15:17,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:15:17,058 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1556713247] [2019-12-07 13:15:17,058 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:15:17,058 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:15:17,058 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1869724864] [2019-12-07 13:15:17,059 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:15:17,059 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:15:17,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:15:17,059 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:15:17,059 INFO L87 Difference]: Start difference. First operand 207 states and 362 transitions. Second operand 3 states. [2019-12-07 13:15:17,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:15:17,066 INFO L93 Difference]: Finished difference Result 197 states and 339 transitions. [2019-12-07 13:15:17,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:15:17,067 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 13:15:17,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:15:17,068 INFO L225 Difference]: With dead ends: 197 [2019-12-07 13:15:17,068 INFO L226 Difference]: Without dead ends: 197 [2019-12-07 13:15:17,068 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:15:17,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2019-12-07 13:15:17,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 197. [2019-12-07 13:15:17,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2019-12-07 13:15:17,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 339 transitions. [2019-12-07 13:15:17,072 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 339 transitions. Word has length 53 [2019-12-07 13:15:17,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:15:17,072 INFO L462 AbstractCegarLoop]: Abstraction has 197 states and 339 transitions. [2019-12-07 13:15:17,072 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:15:17,072 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 339 transitions. [2019-12-07 13:15:17,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 13:15:17,073 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:15:17,073 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:15:17,073 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:15:17,073 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:15:17,073 INFO L82 PathProgramCache]: Analyzing trace with hash 2120402622, now seen corresponding path program 1 times [2019-12-07 13:15:17,073 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:15:17,073 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1375171965] [2019-12-07 13:15:17,074 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:15:17,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:15:17,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:15:17,221 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1375171965] [2019-12-07 13:15:17,221 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:15:17,221 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 13:15:17,221 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1392703910] [2019-12-07 13:15:17,222 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 13:15:17,222 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:15:17,222 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 13:15:17,222 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:15:17,222 INFO L87 Difference]: Start difference. First operand 197 states and 339 transitions. Second operand 13 states. [2019-12-07 13:15:17,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:15:17,411 INFO L93 Difference]: Finished difference Result 348 states and 589 transitions. [2019-12-07 13:15:17,411 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:15:17,411 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-12-07 13:15:17,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:15:17,412 INFO L225 Difference]: With dead ends: 348 [2019-12-07 13:15:17,412 INFO L226 Difference]: Without dead ends: 315 [2019-12-07 13:15:17,413 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=70, Invalid=272, Unknown=0, NotChecked=0, Total=342 [2019-12-07 13:15:17,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2019-12-07 13:15:17,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 305. [2019-12-07 13:15:17,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 305 states. [2019-12-07 13:15:17,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 305 states and 524 transitions. [2019-12-07 13:15:17,417 INFO L78 Accepts]: Start accepts. Automaton has 305 states and 524 transitions. Word has length 54 [2019-12-07 13:15:17,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:15:17,417 INFO L462 AbstractCegarLoop]: Abstraction has 305 states and 524 transitions. [2019-12-07 13:15:17,417 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 13:15:17,417 INFO L276 IsEmpty]: Start isEmpty. Operand 305 states and 524 transitions. [2019-12-07 13:15:17,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 13:15:17,418 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:15:17,418 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:15:17,418 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:15:17,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:15:17,418 INFO L82 PathProgramCache]: Analyzing trace with hash 1631137646, now seen corresponding path program 2 times [2019-12-07 13:15:17,418 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:15:17,418 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2088509850] [2019-12-07 13:15:17,418 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:15:17,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:15:17,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:15:17,481 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 13:15:17,481 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:15:17,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [701] [701] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_49| 0 0))) (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1451~0.base_22| 4)) (= |v_ULTIMATE.start_main_~#t1451~0.offset_17| 0) (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff0_thd0~0_317 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1451~0.base_22| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1451~0.base_22|) |v_ULTIMATE.start_main_~#t1451~0.offset_17| 0)) |v_#memory_int_13|) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$r_buff1_thd2~0_153) (= 0 v_~x~0_144) (= v_~x$r_buff0_thd1~0_115 0) (= 0 v_~__unbuffered_cnt~0_78) (= v_~__unbuffered_p1_EAX~0_103 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1451~0.base_22|) (= 0 v_~x$read_delayed~0_6) (< 0 |v_#StackHeapBarrier_14|) (= 0 v_~x$w_buff1_used~0_381) (= v_~x$flush_delayed~0_36 0) (= 0 |v_#NULL.base_4|) (= 0 v_~x$r_buff0_thd2~0_168) (= 0 v_~x$w_buff1~0_166) (= |v_#NULL.offset_4| 0) (= |v_#valid_47| (store .cse0 |v_ULTIMATE.start_main_~#t1451~0.base_22| 1)) (= v_~main$tmp_guard1~0_24 0) (= v_~y~0_67 0) (= 0 v_~x$w_buff0~0_193) (= v_~x$r_buff1_thd0~0_243 0) (= v_~main$tmp_guard0~0_24 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1451~0.base_22|) 0) (= v_~weak$$choice2~0_114 0) (= 0 v_~weak$$choice0~0_12) (= 0 v_~x$w_buff0_used~0_609) (= v_~x$r_buff1_thd1~0_167 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_193, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, ~x$flush_delayed~0=v_~x$flush_delayed~0_36, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_167, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_139|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_31|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_~#t1452~0.base=|v_ULTIMATE.start_main_~#t1452~0.base_17|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_103, #length=|v_#length_15|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_317, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_31|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_19|, ~x$w_buff1~0=v_~x$w_buff1~0_166, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_28|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_381, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_153, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_37|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, ~x~0=v_~x~0_144, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_115, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_40|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_32|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_36|, ~y~0=v_~y~0_67, ULTIMATE.start_main_~#t1451~0.base=|v_ULTIMATE.start_main_~#t1451~0.base_22|, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_27|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_39|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_243, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_168, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, ULTIMATE.start_main_~#t1452~0.offset=|v_ULTIMATE.start_main_~#t1452~0.offset_14|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_609, ULTIMATE.start_main_~#t1451~0.offset=|v_ULTIMATE.start_main_~#t1451~0.offset_17|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_21|, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1452~0.base, ~__unbuffered_p1_EAX~0, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ULTIMATE.start_main_~#t1451~0.base, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1452~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_~#t1451~0.offset, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 13:15:17,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L779-1-->L781: Formula: (and (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t1452~0.base_10|) (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t1452~0.base_10| 4)) (not (= |v_ULTIMATE.start_main_~#t1452~0.base_10| 0)) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1452~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1452~0.base_10|) |v_ULTIMATE.start_main_~#t1452~0.offset_9| 1))) (= |v_ULTIMATE.start_main_~#t1452~0.offset_9| 0) (= |v_#valid_25| (store |v_#valid_26| |v_ULTIMATE.start_main_~#t1452~0.base_10| 1)) (= (select |v_#valid_26| |v_ULTIMATE.start_main_~#t1452~0.base_10|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_26|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_25|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_9|, ULTIMATE.start_main_~#t1452~0.offset=|v_ULTIMATE.start_main_~#t1452~0.offset_9|, ULTIMATE.start_main_~#t1452~0.base=|v_ULTIMATE.start_main_~#t1452~0.base_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1452~0.offset, ULTIMATE.start_main_~#t1452~0.base] because there is no mapped edge [2019-12-07 13:15:17,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1_#in~arg.offset_17| v_P1Thread1of1ForFork1_~arg.offset_15) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17)) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|) (= 2 v_~x$w_buff0~0_54) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_216 256))) (not (= 0 (mod v_~x$w_buff1_used~0_127 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.base_15 |v_P1Thread1of1ForFork1_#in~arg.base_17|) (= 1 v_~x$w_buff0_used~0_216) (= v_~x$w_buff0~0_55 v_~x$w_buff1~0_48) (= v_~x$w_buff0_used~0_217 v_~x$w_buff1_used~0_127)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_55, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_217} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17, ~x$w_buff0~0=v_~x$w_buff0~0_54, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_15, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_15, ~x$w_buff1~0=v_~x$w_buff1~0_48, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_127, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_216} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 13:15:17,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L728-2-->L728-5: Formula: (let ((.cse1 (= |P0Thread1of1ForFork0_#t~ite4_Out-1284752986| |P0Thread1of1ForFork0_#t~ite3_Out-1284752986|)) (.cse2 (= (mod ~x$w_buff1_used~0_In-1284752986 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd1~0_In-1284752986 256) 0))) (or (and (not .cse0) (= ~x$w_buff1~0_In-1284752986 |P0Thread1of1ForFork0_#t~ite3_Out-1284752986|) .cse1 (not .cse2)) (and .cse1 (= |P0Thread1of1ForFork0_#t~ite3_Out-1284752986| ~x~0_In-1284752986) (or .cse2 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1284752986, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1284752986, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1284752986, ~x~0=~x~0_In-1284752986} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-1284752986|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-1284752986|, ~x$w_buff1~0=~x$w_buff1~0_In-1284752986, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1284752986, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1284752986, ~x~0=~x~0_In-1284752986} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 13:15:17,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L729-->L729-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1923048266 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-1923048266 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1923048266|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In-1923048266 |P0Thread1of1ForFork0_#t~ite5_Out-1923048266|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1923048266, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1923048266} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1923048266|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1923048266, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1923048266} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 13:15:17,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L730-->L730-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In899094500 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In899094500 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In899094500 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In899094500 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In899094500 |P0Thread1of1ForFork0_#t~ite6_Out899094500|) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out899094500|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In899094500, ~x$w_buff1_used~0=~x$w_buff1_used~0_In899094500, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In899094500, ~x$w_buff0_used~0=~x$w_buff0_used~0_In899094500} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out899094500|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In899094500, ~x$w_buff1_used~0=~x$w_buff1_used~0_In899094500, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In899094500, ~x$w_buff0_used~0=~x$w_buff0_used~0_In899094500} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 13:15:17,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L757-->L757-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In282774483 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In282774483 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In282774483 |P1Thread1of1ForFork1_#t~ite11_Out282774483|)) (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out282774483| 0) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In282774483, ~x$w_buff0_used~0=~x$w_buff0_used~0_In282774483} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out282774483|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In282774483, ~x$w_buff0_used~0=~x$w_buff0_used~0_In282774483} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 13:15:17,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L731-->L731-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1498009456 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1498009456 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite7_Out1498009456|) (not .cse1)) (and (= ~x$r_buff0_thd1~0_In1498009456 |P0Thread1of1ForFork0_#t~ite7_Out1498009456|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1498009456, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1498009456} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1498009456, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1498009456|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1498009456} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 13:15:17,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L732-->L732-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In-335018041 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-335018041 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-335018041 256))) (.cse1 (= (mod ~x$r_buff0_thd1~0_In-335018041 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$r_buff1_thd1~0_In-335018041 |P0Thread1of1ForFork0_#t~ite8_Out-335018041|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out-335018041|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-335018041, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-335018041, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-335018041, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-335018041} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-335018041, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-335018041|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-335018041, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-335018041, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-335018041} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 13:15:17,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L732-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_125} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 13:15:17,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L758-->L758-2: Formula: (let ((.cse3 (= (mod ~x$r_buff0_thd2~0_In-704663350 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-704663350 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-704663350 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd2~0_In-704663350 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out-704663350| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite12_Out-704663350| ~x$w_buff1_used~0_In-704663350)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-704663350, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-704663350, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-704663350, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-704663350} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-704663350, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-704663350, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-704663350|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-704663350, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-704663350} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 13:15:17,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L759-->L760: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1313569809 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In-1313569809 256) 0)) (.cse1 (= ~x$r_buff0_thd2~0_Out-1313569809 ~x$r_buff0_thd2~0_In-1313569809))) (or (and .cse0 .cse1) (and (= ~x$r_buff0_thd2~0_Out-1313569809 0) (not .cse0) (not .cse2)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1313569809, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1313569809} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1313569809|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1313569809, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1313569809} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 13:15:17,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L760-->L760-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd2~0_In-1122923512 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1122923512 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-1122923512 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-1122923512 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd2~0_In-1122923512 |P1Thread1of1ForFork1_#t~ite14_Out-1122923512|) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out-1122923512| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1122923512, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1122923512, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1122923512, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1122923512} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1122923512, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1122923512, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1122923512, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1122923512|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1122923512} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 13:15:17,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L760-2-->P1EXIT: Formula: (and (= v_~x$r_buff1_thd2~0_125 |v_P1Thread1of1ForFork1_#t~ite14_34|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_34|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_33|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 13:15:17,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [586] [586] L781-1-->L787: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 2 v_~__unbuffered_cnt~0_11) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:15:17,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L787-2-->L787-5: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-1434157698 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1434157698 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite18_Out-1434157698| |ULTIMATE.start_main_#t~ite17_Out-1434157698|))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1434157698 |ULTIMATE.start_main_#t~ite17_Out-1434157698|) .cse2) (and (or .cse0 .cse1) (= ~x~0_In-1434157698 |ULTIMATE.start_main_#t~ite17_Out-1434157698|) .cse2))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1434157698, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1434157698, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1434157698, ~x~0=~x~0_In-1434157698} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-1434157698|, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1434157698|, ~x$w_buff1~0=~x$w_buff1~0_In-1434157698, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1434157698, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1434157698, ~x~0=~x~0_In-1434157698} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-12-07 13:15:17,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L788-->L788-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-1580939496 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1580939496 256)))) (or (and (= ~x$w_buff0_used~0_In-1580939496 |ULTIMATE.start_main_#t~ite19_Out-1580939496|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite19_Out-1580939496|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1580939496, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1580939496} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1580939496, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1580939496|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1580939496} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 13:15:17,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L789-->L789-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd0~0_In-2003908450 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-2003908450 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-2003908450 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-2003908450 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In-2003908450 |ULTIMATE.start_main_#t~ite20_Out-2003908450|)) (and (= |ULTIMATE.start_main_#t~ite20_Out-2003908450| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2003908450, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2003908450, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2003908450, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2003908450} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2003908450, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2003908450, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-2003908450|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2003908450, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2003908450} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 13:15:17,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L790-->L790-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In2079773294 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In2079773294 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite21_Out2079773294| 0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite21_Out2079773294| ~x$r_buff0_thd0~0_In2079773294) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2079773294, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2079773294} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2079773294, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out2079773294|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2079773294} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 13:15:17,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L791-->L791-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In1819303022 256))) (.cse2 (= (mod ~x$r_buff1_thd0~0_In1819303022 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1819303022 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In1819303022 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$r_buff1_thd0~0_In1819303022 |ULTIMATE.start_main_#t~ite22_Out1819303022|)) (and (= 0 |ULTIMATE.start_main_#t~ite22_Out1819303022|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1819303022, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1819303022, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1819303022, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1819303022} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1819303022, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1819303022, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1819303022, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1819303022|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1819303022} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 13:15:17,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L800-->L800-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-354047565 256) 0))) (or (and (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In-354047565 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In-354047565 256) 0) .cse0) (= (mod ~x$w_buff0_used~0_In-354047565 256) 0) (and (= 0 (mod ~x$r_buff1_thd0~0_In-354047565 256)) .cse0))) (= |ULTIMATE.start_main_#t~ite31_Out-354047565| |ULTIMATE.start_main_#t~ite32_Out-354047565|) .cse1 (= |ULTIMATE.start_main_#t~ite31_Out-354047565| ~x$w_buff1~0_In-354047565)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite32_Out-354047565| ~x$w_buff1~0_In-354047565) (= |ULTIMATE.start_main_#t~ite31_In-354047565| |ULTIMATE.start_main_#t~ite31_Out-354047565|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-354047565, ~x$w_buff1~0=~x$w_buff1~0_In-354047565, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-354047565, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-354047565, ~weak$$choice2~0=~weak$$choice2~0_In-354047565, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-354047565|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-354047565} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-354047565, ~x$w_buff1~0=~x$w_buff1~0_In-354047565, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-354047565, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-354047565|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-354047565, ~weak$$choice2~0=~weak$$choice2~0_In-354047565, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-354047565|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-354047565} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-12-07 13:15:17,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [628] [628] L803-->L804: Formula: (and (= v_~x$r_buff0_thd0~0_125 v_~x$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_35 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_35} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_19|, ~weak$$choice2~0=v_~weak$$choice2~0_35} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 13:15:17,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L806-->L809-1: Formula: (and (not (= (mod v_~x$flush_delayed~0_27 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_118) (= v_~x$flush_delayed~0_26 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_15 256))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_118, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_21|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:15:17,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 13:15:17,536 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:15:17 BasicIcfg [2019-12-07 13:15:17,536 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:15:17,537 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:15:17,537 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:15:17,537 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:15:17,537 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:15:11" (3/4) ... [2019-12-07 13:15:17,539 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:15:17,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [701] [701] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_49| 0 0))) (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1451~0.base_22| 4)) (= |v_ULTIMATE.start_main_~#t1451~0.offset_17| 0) (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff0_thd0~0_317 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1451~0.base_22| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1451~0.base_22|) |v_ULTIMATE.start_main_~#t1451~0.offset_17| 0)) |v_#memory_int_13|) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$r_buff1_thd2~0_153) (= 0 v_~x~0_144) (= v_~x$r_buff0_thd1~0_115 0) (= 0 v_~__unbuffered_cnt~0_78) (= v_~__unbuffered_p1_EAX~0_103 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1451~0.base_22|) (= 0 v_~x$read_delayed~0_6) (< 0 |v_#StackHeapBarrier_14|) (= 0 v_~x$w_buff1_used~0_381) (= v_~x$flush_delayed~0_36 0) (= 0 |v_#NULL.base_4|) (= 0 v_~x$r_buff0_thd2~0_168) (= 0 v_~x$w_buff1~0_166) (= |v_#NULL.offset_4| 0) (= |v_#valid_47| (store .cse0 |v_ULTIMATE.start_main_~#t1451~0.base_22| 1)) (= v_~main$tmp_guard1~0_24 0) (= v_~y~0_67 0) (= 0 v_~x$w_buff0~0_193) (= v_~x$r_buff1_thd0~0_243 0) (= v_~main$tmp_guard0~0_24 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1451~0.base_22|) 0) (= v_~weak$$choice2~0_114 0) (= 0 v_~weak$$choice0~0_12) (= 0 v_~x$w_buff0_used~0_609) (= v_~x$r_buff1_thd1~0_167 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_193, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, ~x$flush_delayed~0=v_~x$flush_delayed~0_36, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_167, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_139|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_31|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_~#t1452~0.base=|v_ULTIMATE.start_main_~#t1452~0.base_17|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_103, #length=|v_#length_15|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_317, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_31|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_19|, ~x$w_buff1~0=v_~x$w_buff1~0_166, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_28|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_381, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_153, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_37|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, ~x~0=v_~x~0_144, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_115, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_40|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_32|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_36|, ~y~0=v_~y~0_67, ULTIMATE.start_main_~#t1451~0.base=|v_ULTIMATE.start_main_~#t1451~0.base_22|, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_27|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_39|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_243, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_168, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, ULTIMATE.start_main_~#t1452~0.offset=|v_ULTIMATE.start_main_~#t1452~0.offset_14|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_609, ULTIMATE.start_main_~#t1451~0.offset=|v_ULTIMATE.start_main_~#t1451~0.offset_17|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_21|, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1452~0.base, ~__unbuffered_p1_EAX~0, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ULTIMATE.start_main_~#t1451~0.base, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1452~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_~#t1451~0.offset, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 13:15:17,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L779-1-->L781: Formula: (and (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t1452~0.base_10|) (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t1452~0.base_10| 4)) (not (= |v_ULTIMATE.start_main_~#t1452~0.base_10| 0)) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1452~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1452~0.base_10|) |v_ULTIMATE.start_main_~#t1452~0.offset_9| 1))) (= |v_ULTIMATE.start_main_~#t1452~0.offset_9| 0) (= |v_#valid_25| (store |v_#valid_26| |v_ULTIMATE.start_main_~#t1452~0.base_10| 1)) (= (select |v_#valid_26| |v_ULTIMATE.start_main_~#t1452~0.base_10|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_26|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_25|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_9|, ULTIMATE.start_main_~#t1452~0.offset=|v_ULTIMATE.start_main_~#t1452~0.offset_9|, ULTIMATE.start_main_~#t1452~0.base=|v_ULTIMATE.start_main_~#t1452~0.base_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1452~0.offset, ULTIMATE.start_main_~#t1452~0.base] because there is no mapped edge [2019-12-07 13:15:17,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1_#in~arg.offset_17| v_P1Thread1of1ForFork1_~arg.offset_15) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17)) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|) (= 2 v_~x$w_buff0~0_54) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_216 256))) (not (= 0 (mod v_~x$w_buff1_used~0_127 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.base_15 |v_P1Thread1of1ForFork1_#in~arg.base_17|) (= 1 v_~x$w_buff0_used~0_216) (= v_~x$w_buff0~0_55 v_~x$w_buff1~0_48) (= v_~x$w_buff0_used~0_217 v_~x$w_buff1_used~0_127)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_55, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_217} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17, ~x$w_buff0~0=v_~x$w_buff0~0_54, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_15, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_15, ~x$w_buff1~0=v_~x$w_buff1~0_48, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_127, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_216} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 13:15:17,540 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L728-2-->L728-5: Formula: (let ((.cse1 (= |P0Thread1of1ForFork0_#t~ite4_Out-1284752986| |P0Thread1of1ForFork0_#t~ite3_Out-1284752986|)) (.cse2 (= (mod ~x$w_buff1_used~0_In-1284752986 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd1~0_In-1284752986 256) 0))) (or (and (not .cse0) (= ~x$w_buff1~0_In-1284752986 |P0Thread1of1ForFork0_#t~ite3_Out-1284752986|) .cse1 (not .cse2)) (and .cse1 (= |P0Thread1of1ForFork0_#t~ite3_Out-1284752986| ~x~0_In-1284752986) (or .cse2 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1284752986, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1284752986, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1284752986, ~x~0=~x~0_In-1284752986} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-1284752986|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-1284752986|, ~x$w_buff1~0=~x$w_buff1~0_In-1284752986, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1284752986, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1284752986, ~x~0=~x~0_In-1284752986} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 13:15:17,540 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L729-->L729-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1923048266 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-1923048266 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1923048266|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In-1923048266 |P0Thread1of1ForFork0_#t~ite5_Out-1923048266|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1923048266, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1923048266} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1923048266|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1923048266, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1923048266} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 13:15:17,541 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L730-->L730-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In899094500 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In899094500 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In899094500 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In899094500 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In899094500 |P0Thread1of1ForFork0_#t~ite6_Out899094500|) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out899094500|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In899094500, ~x$w_buff1_used~0=~x$w_buff1_used~0_In899094500, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In899094500, ~x$w_buff0_used~0=~x$w_buff0_used~0_In899094500} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out899094500|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In899094500, ~x$w_buff1_used~0=~x$w_buff1_used~0_In899094500, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In899094500, ~x$w_buff0_used~0=~x$w_buff0_used~0_In899094500} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 13:15:17,541 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L757-->L757-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In282774483 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In282774483 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In282774483 |P1Thread1of1ForFork1_#t~ite11_Out282774483|)) (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out282774483| 0) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In282774483, ~x$w_buff0_used~0=~x$w_buff0_used~0_In282774483} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out282774483|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In282774483, ~x$w_buff0_used~0=~x$w_buff0_used~0_In282774483} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 13:15:17,541 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L731-->L731-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1498009456 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1498009456 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite7_Out1498009456|) (not .cse1)) (and (= ~x$r_buff0_thd1~0_In1498009456 |P0Thread1of1ForFork0_#t~ite7_Out1498009456|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1498009456, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1498009456} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1498009456, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1498009456|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1498009456} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 13:15:17,541 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L732-->L732-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In-335018041 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-335018041 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-335018041 256))) (.cse1 (= (mod ~x$r_buff0_thd1~0_In-335018041 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$r_buff1_thd1~0_In-335018041 |P0Thread1of1ForFork0_#t~ite8_Out-335018041|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out-335018041|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-335018041, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-335018041, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-335018041, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-335018041} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-335018041, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-335018041|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-335018041, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-335018041, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-335018041} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 13:15:17,541 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L732-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_125} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 13:15:17,541 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L758-->L758-2: Formula: (let ((.cse3 (= (mod ~x$r_buff0_thd2~0_In-704663350 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-704663350 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-704663350 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd2~0_In-704663350 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out-704663350| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite12_Out-704663350| ~x$w_buff1_used~0_In-704663350)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-704663350, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-704663350, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-704663350, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-704663350} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-704663350, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-704663350, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-704663350|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-704663350, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-704663350} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 13:15:17,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L759-->L760: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1313569809 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In-1313569809 256) 0)) (.cse1 (= ~x$r_buff0_thd2~0_Out-1313569809 ~x$r_buff0_thd2~0_In-1313569809))) (or (and .cse0 .cse1) (and (= ~x$r_buff0_thd2~0_Out-1313569809 0) (not .cse0) (not .cse2)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1313569809, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1313569809} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1313569809|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1313569809, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1313569809} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 13:15:17,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L760-->L760-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd2~0_In-1122923512 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1122923512 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-1122923512 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-1122923512 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd2~0_In-1122923512 |P1Thread1of1ForFork1_#t~ite14_Out-1122923512|) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out-1122923512| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1122923512, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1122923512, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1122923512, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1122923512} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1122923512, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1122923512, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1122923512, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1122923512|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1122923512} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 13:15:17,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L760-2-->P1EXIT: Formula: (and (= v_~x$r_buff1_thd2~0_125 |v_P1Thread1of1ForFork1_#t~ite14_34|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_34|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_33|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 13:15:17,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [586] [586] L781-1-->L787: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 2 v_~__unbuffered_cnt~0_11) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:15:17,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L787-2-->L787-5: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-1434157698 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1434157698 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite18_Out-1434157698| |ULTIMATE.start_main_#t~ite17_Out-1434157698|))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1434157698 |ULTIMATE.start_main_#t~ite17_Out-1434157698|) .cse2) (and (or .cse0 .cse1) (= ~x~0_In-1434157698 |ULTIMATE.start_main_#t~ite17_Out-1434157698|) .cse2))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1434157698, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1434157698, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1434157698, ~x~0=~x~0_In-1434157698} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-1434157698|, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1434157698|, ~x$w_buff1~0=~x$w_buff1~0_In-1434157698, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1434157698, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1434157698, ~x~0=~x~0_In-1434157698} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-12-07 13:15:17,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L788-->L788-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-1580939496 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1580939496 256)))) (or (and (= ~x$w_buff0_used~0_In-1580939496 |ULTIMATE.start_main_#t~ite19_Out-1580939496|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite19_Out-1580939496|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1580939496, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1580939496} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1580939496, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1580939496|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1580939496} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 13:15:17,543 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L789-->L789-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd0~0_In-2003908450 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-2003908450 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-2003908450 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-2003908450 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In-2003908450 |ULTIMATE.start_main_#t~ite20_Out-2003908450|)) (and (= |ULTIMATE.start_main_#t~ite20_Out-2003908450| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2003908450, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2003908450, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2003908450, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2003908450} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2003908450, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2003908450, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-2003908450|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2003908450, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2003908450} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 13:15:17,543 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L790-->L790-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In2079773294 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In2079773294 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite21_Out2079773294| 0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite21_Out2079773294| ~x$r_buff0_thd0~0_In2079773294) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2079773294, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2079773294} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2079773294, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out2079773294|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2079773294} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 13:15:17,543 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L791-->L791-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In1819303022 256))) (.cse2 (= (mod ~x$r_buff1_thd0~0_In1819303022 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1819303022 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In1819303022 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$r_buff1_thd0~0_In1819303022 |ULTIMATE.start_main_#t~ite22_Out1819303022|)) (and (= 0 |ULTIMATE.start_main_#t~ite22_Out1819303022|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1819303022, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1819303022, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1819303022, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1819303022} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1819303022, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1819303022, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1819303022, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1819303022|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1819303022} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 13:15:17,544 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L800-->L800-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-354047565 256) 0))) (or (and (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In-354047565 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In-354047565 256) 0) .cse0) (= (mod ~x$w_buff0_used~0_In-354047565 256) 0) (and (= 0 (mod ~x$r_buff1_thd0~0_In-354047565 256)) .cse0))) (= |ULTIMATE.start_main_#t~ite31_Out-354047565| |ULTIMATE.start_main_#t~ite32_Out-354047565|) .cse1 (= |ULTIMATE.start_main_#t~ite31_Out-354047565| ~x$w_buff1~0_In-354047565)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite32_Out-354047565| ~x$w_buff1~0_In-354047565) (= |ULTIMATE.start_main_#t~ite31_In-354047565| |ULTIMATE.start_main_#t~ite31_Out-354047565|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-354047565, ~x$w_buff1~0=~x$w_buff1~0_In-354047565, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-354047565, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-354047565, ~weak$$choice2~0=~weak$$choice2~0_In-354047565, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-354047565|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-354047565} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-354047565, ~x$w_buff1~0=~x$w_buff1~0_In-354047565, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-354047565, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-354047565|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-354047565, ~weak$$choice2~0=~weak$$choice2~0_In-354047565, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-354047565|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-354047565} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-12-07 13:15:17,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [628] [628] L803-->L804: Formula: (and (= v_~x$r_buff0_thd0~0_125 v_~x$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_35 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_35} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_19|, ~weak$$choice2~0=v_~weak$$choice2~0_35} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 13:15:17,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L806-->L809-1: Formula: (and (not (= (mod v_~x$flush_delayed~0_27 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_118) (= v_~x$flush_delayed~0_26 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_15 256))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_118, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_21|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:15:17,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 13:15:17,598 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_b96f02da-ec0a-49e0-9e9d-e719cf44ba58/bin/uautomizer/witness.graphml [2019-12-07 13:15:17,598 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:15:17,599 INFO L168 Benchmark]: Toolchain (without parser) took 7421.55 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 241.7 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -186.9 MB). Peak memory consumption was 54.8 MB. Max. memory is 11.5 GB. [2019-12-07 13:15:17,599 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:15:17,600 INFO L168 Benchmark]: CACSL2BoogieTranslator took 403.29 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.4 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -133.6 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 13:15:17,600 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.73 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:15:17,600 INFO L168 Benchmark]: Boogie Preprocessor took 24.03 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:15:17,600 INFO L168 Benchmark]: RCFGBuilder took 372.96 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 52.1 MB). Peak memory consumption was 52.1 MB. Max. memory is 11.5 GB. [2019-12-07 13:15:17,601 INFO L168 Benchmark]: TraceAbstraction took 6515.99 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 136.3 MB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -129.5 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2019-12-07 13:15:17,601 INFO L168 Benchmark]: Witness Printer took 61.47 ms. Allocated memory is still 1.3 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 18.8 MB). Peak memory consumption was 18.8 MB. Max. memory is 11.5 GB. [2019-12-07 13:15:17,602 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 403.29 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.4 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -133.6 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.73 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.03 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 372.96 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 52.1 MB). Peak memory consumption was 52.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 6515.99 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 136.3 MB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -129.5 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * Witness Printer took 61.47 ms. Allocated memory is still 1.3 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 18.8 MB). Peak memory consumption was 18.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.5s, 146 ProgramPointsBefore, 78 ProgramPointsAfterwards, 180 TransitionsBefore, 90 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 28 TrivialSequentialCompositions, 36 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 36 ConcurrentYvCompositions, 25 ChoiceCompositions, 3816 VarBasedMoverChecksPositive, 194 VarBasedMoverChecksNegative, 52 SemBasedMoverChecksPositive, 191 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 46078 CheckedPairsTotal, 100 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L779] FCALL, FORK 0 pthread_create(&t1451, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L781] FCALL, FORK 0 pthread_create(&t1452, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L747] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L748] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L749] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L750] 2 x$r_buff0_thd2 = (_Bool)1 [L753] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L756] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L722] 1 y = 1 [L725] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L729] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L730] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L756] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L757] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L731] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L758] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L788] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L789] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L790] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L791] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 x$flush_delayed = weak$$choice2 [L797] 0 x$mem_tmp = x VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L799] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L799] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L800] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L801] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L801] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L802] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L804] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L804] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 0) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 140 locations, 2 error locations. Result: UNSAFE, OverallTime: 6.3s, OverallIterations: 15, TraceHistogramMax: 1, AutomataDifference: 1.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1430 SDtfs, 1153 SDslu, 3091 SDs, 0 SdLazy, 1890 SolverSat, 102 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 127 GetRequests, 33 SyntacticMatches, 14 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 115 ImplicationChecksByTransitivity, 0.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8413occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 14 MinimizatonAttempts, 1351 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.6s InterpolantComputationTime, 630 NumberOfCodeBlocks, 630 NumberOfCodeBlocksAsserted, 15 NumberOfCheckSat, 562 ConstructedInterpolants, 0 QuantifiedInterpolants, 83778 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 14 InterpolantComputations, 14 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...