./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix056_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_af3b844b-5efb-465e-abfc-010e4ad41ef8/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_af3b844b-5efb-465e-abfc-010e4ad41ef8/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_af3b844b-5efb-465e-abfc-010e4ad41ef8/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_af3b844b-5efb-465e-abfc-010e4ad41ef8/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix056_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_af3b844b-5efb-465e-abfc-010e4ad41ef8/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_af3b844b-5efb-465e-abfc-010e4ad41ef8/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash acda756c414978330332dd1b1ae7a90b288c5309 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:13:51,546 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:13:51,547 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:13:51,555 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:13:51,555 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:13:51,556 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:13:51,557 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:13:51,558 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:13:51,560 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:13:51,560 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:13:51,561 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:13:51,562 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:13:51,562 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:13:51,563 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:13:51,563 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:13:51,564 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:13:51,565 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:13:51,565 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:13:51,567 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:13:51,568 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:13:51,570 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:13:51,570 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:13:51,571 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:13:51,571 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:13:51,573 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:13:51,573 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:13:51,573 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:13:51,574 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:13:51,574 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:13:51,575 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:13:51,575 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:13:51,575 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:13:51,576 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:13:51,576 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:13:51,577 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:13:51,577 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:13:51,577 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:13:51,577 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:13:51,578 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:13:51,578 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:13:51,579 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:13:51,579 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_af3b844b-5efb-465e-abfc-010e4ad41ef8/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:13:51,589 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:13:51,589 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:13:51,589 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:13:51,590 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:13:51,590 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:13:51,590 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:13:51,590 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:13:51,590 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:13:51,590 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:13:51,591 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:13:51,591 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:13:51,591 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:13:51,591 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:13:51,591 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:13:51,591 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:13:51,591 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:13:51,592 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:13:51,592 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:13:51,592 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:13:51,592 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:13:51,592 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:13:51,592 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:13:51,592 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:13:51,593 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:13:51,593 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:13:51,593 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:13:51,593 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:13:51,593 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:13:51,593 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:13:51,593 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_af3b844b-5efb-465e-abfc-010e4ad41ef8/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> acda756c414978330332dd1b1ae7a90b288c5309 [2019-12-07 12:13:51,692 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:13:51,700 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:13:51,702 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:13:51,703 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:13:51,703 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:13:51,704 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_af3b844b-5efb-465e-abfc-010e4ad41ef8/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix056_power.oepc.i [2019-12-07 12:13:51,740 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_af3b844b-5efb-465e-abfc-010e4ad41ef8/bin/uautomizer/data/ec28be129/43bf356179cb49139fc09b6424741e46/FLAGc79ef0720 [2019-12-07 12:13:52,209 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:13:52,209 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_af3b844b-5efb-465e-abfc-010e4ad41ef8/sv-benchmarks/c/pthread-wmm/mix056_power.oepc.i [2019-12-07 12:13:52,221 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_af3b844b-5efb-465e-abfc-010e4ad41ef8/bin/uautomizer/data/ec28be129/43bf356179cb49139fc09b6424741e46/FLAGc79ef0720 [2019-12-07 12:13:52,231 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_af3b844b-5efb-465e-abfc-010e4ad41ef8/bin/uautomizer/data/ec28be129/43bf356179cb49139fc09b6424741e46 [2019-12-07 12:13:52,233 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:13:52,234 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:13:52,234 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:13:52,234 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:13:52,237 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:13:52,237 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:13:52" (1/1) ... [2019-12-07 12:13:52,239 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@65544776 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:13:52, skipping insertion in model container [2019-12-07 12:13:52,239 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:13:52" (1/1) ... [2019-12-07 12:13:52,244 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:13:52,274 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:13:52,517 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:13:52,525 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:13:52,570 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:13:52,617 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:13:52,617 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:13:52 WrapperNode [2019-12-07 12:13:52,617 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:13:52,618 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:13:52,618 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:13:52,618 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:13:52,624 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:13:52" (1/1) ... [2019-12-07 12:13:52,638 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:13:52" (1/1) ... [2019-12-07 12:13:52,657 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:13:52,657 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:13:52,657 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:13:52,657 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:13:52,663 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:13:52" (1/1) ... [2019-12-07 12:13:52,664 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:13:52" (1/1) ... [2019-12-07 12:13:52,667 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:13:52" (1/1) ... [2019-12-07 12:13:52,667 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:13:52" (1/1) ... [2019-12-07 12:13:52,674 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:13:52" (1/1) ... [2019-12-07 12:13:52,678 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:13:52" (1/1) ... [2019-12-07 12:13:52,680 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:13:52" (1/1) ... [2019-12-07 12:13:52,683 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:13:52,684 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:13:52,684 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:13:52,684 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:13:52,684 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:13:52" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_af3b844b-5efb-465e-abfc-010e4ad41ef8/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:13:52,727 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:13:52,727 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:13:52,727 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:13:52,727 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:13:52,728 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:13:52,728 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:13:52,728 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:13:52,728 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:13:52,728 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 12:13:52,728 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 12:13:52,728 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:13:52,728 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:13:52,729 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:13:52,730 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:13:53,099 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:13:53,100 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:13:53,100 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:13:53 BoogieIcfgContainer [2019-12-07 12:13:53,100 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:13:53,101 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:13:53,101 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:13:53,103 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:13:53,103 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:13:52" (1/3) ... [2019-12-07 12:13:53,104 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@43781442 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:13:53, skipping insertion in model container [2019-12-07 12:13:53,104 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:13:52" (2/3) ... [2019-12-07 12:13:53,104 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@43781442 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:13:53, skipping insertion in model container [2019-12-07 12:13:53,104 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:13:53" (3/3) ... [2019-12-07 12:13:53,105 INFO L109 eAbstractionObserver]: Analyzing ICFG mix056_power.oepc.i [2019-12-07 12:13:53,112 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:13:53,112 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:13:53,117 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:13:53,117 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:13:53,143 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,143 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,143 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,143 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,143 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,143 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,144 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,144 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,144 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,144 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,144 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,144 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,145 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,145 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,145 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,145 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,145 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,145 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,145 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,145 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,145 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,146 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,146 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,146 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,146 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,146 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,146 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,146 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,146 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,146 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,147 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,147 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,147 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,147 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,147 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,147 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,147 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,148 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,148 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,148 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,148 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,148 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,148 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,148 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,148 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,151 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,151 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,151 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,151 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,152 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,152 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,152 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,152 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,152 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,152 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,152 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,152 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,152 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,152 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,153 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,153 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,153 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,153 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,153 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,153 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,153 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,153 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,153 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,154 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,154 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,154 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,154 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,154 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,154 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,154 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,154 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,154 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,155 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,155 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,155 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,155 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,155 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,155 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,155 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,155 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,155 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,155 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,156 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,156 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,156 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,156 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,156 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,156 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,156 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,156 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,156 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,157 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,157 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,157 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,157 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,157 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,157 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,157 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,157 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,157 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,157 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,158 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,159 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:13:53,177 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 12:13:53,192 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:13:53,192 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:13:53,192 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:13:53,192 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:13:53,192 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:13:53,192 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:13:53,192 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:13:53,192 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:13:53,203 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 174 places, 211 transitions [2019-12-07 12:13:53,204 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 12:13:53,270 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 12:13:53,270 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:13:53,282 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 705 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:13:53,298 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 12:13:53,327 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 12:13:53,327 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:13:53,332 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 705 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:13:53,348 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 12:13:53,349 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:13:56,319 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 40 [2019-12-07 12:13:56,497 WARN L192 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 12:13:56,584 INFO L206 etLargeBlockEncoding]: Checked pairs total: 77200 [2019-12-07 12:13:56,585 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-12-07 12:13:56,587 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 102 transitions [2019-12-07 12:14:07,790 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 102314 states. [2019-12-07 12:14:07,791 INFO L276 IsEmpty]: Start isEmpty. Operand 102314 states. [2019-12-07 12:14:07,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 12:14:07,795 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:14:07,795 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 12:14:07,796 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:14:07,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:14:07,799 INFO L82 PathProgramCache]: Analyzing trace with hash 909908, now seen corresponding path program 1 times [2019-12-07 12:14:07,805 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:14:07,805 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1060521291] [2019-12-07 12:14:07,805 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:14:07,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:14:07,935 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:14:07,935 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1060521291] [2019-12-07 12:14:07,936 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:14:07,936 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:14:07,936 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1588169814] [2019-12-07 12:14:07,939 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:14:07,940 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:14:07,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:14:07,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:14:07,950 INFO L87 Difference]: Start difference. First operand 102314 states. Second operand 3 states. [2019-12-07 12:14:08,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:14:08,690 INFO L93 Difference]: Finished difference Result 101472 states and 432734 transitions. [2019-12-07 12:14:08,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:14:08,692 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 12:14:08,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:14:09,111 INFO L225 Difference]: With dead ends: 101472 [2019-12-07 12:14:09,112 INFO L226 Difference]: Without dead ends: 95232 [2019-12-07 12:14:09,112 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:14:12,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95232 states. [2019-12-07 12:14:13,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95232 to 95232. [2019-12-07 12:14:13,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95232 states. [2019-12-07 12:14:13,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95232 states to 95232 states and 405538 transitions. [2019-12-07 12:14:13,708 INFO L78 Accepts]: Start accepts. Automaton has 95232 states and 405538 transitions. Word has length 3 [2019-12-07 12:14:13,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:14:13,708 INFO L462 AbstractCegarLoop]: Abstraction has 95232 states and 405538 transitions. [2019-12-07 12:14:13,708 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:14:13,708 INFO L276 IsEmpty]: Start isEmpty. Operand 95232 states and 405538 transitions. [2019-12-07 12:14:13,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 12:14:13,711 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:14:13,712 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:14:13,712 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:14:13,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:14:13,712 INFO L82 PathProgramCache]: Analyzing trace with hash 1729820714, now seen corresponding path program 1 times [2019-12-07 12:14:13,712 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:14:13,712 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [978538212] [2019-12-07 12:14:13,712 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:14:13,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:14:13,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:14:13,774 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [978538212] [2019-12-07 12:14:13,774 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:14:13,774 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:14:13,774 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [40271058] [2019-12-07 12:14:13,775 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:14:13,775 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:14:13,776 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:14:13,776 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:14:13,776 INFO L87 Difference]: Start difference. First operand 95232 states and 405538 transitions. Second operand 4 states. [2019-12-07 12:14:15,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:14:15,924 INFO L93 Difference]: Finished difference Result 151692 states and 619304 transitions. [2019-12-07 12:14:15,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:14:15,924 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 12:14:15,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:14:16,302 INFO L225 Difference]: With dead ends: 151692 [2019-12-07 12:14:16,302 INFO L226 Difference]: Without dead ends: 151643 [2019-12-07 12:14:16,302 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:14:19,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151643 states. [2019-12-07 12:14:21,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151643 to 138429. [2019-12-07 12:14:21,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138429 states. [2019-12-07 12:14:22,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138429 states to 138429 states and 572602 transitions. [2019-12-07 12:14:22,073 INFO L78 Accepts]: Start accepts. Automaton has 138429 states and 572602 transitions. Word has length 11 [2019-12-07 12:14:22,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:14:22,074 INFO L462 AbstractCegarLoop]: Abstraction has 138429 states and 572602 transitions. [2019-12-07 12:14:22,074 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:14:22,074 INFO L276 IsEmpty]: Start isEmpty. Operand 138429 states and 572602 transitions. [2019-12-07 12:14:22,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:14:22,078 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:14:22,078 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:14:22,078 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:14:22,078 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:14:22,078 INFO L82 PathProgramCache]: Analyzing trace with hash 1791451612, now seen corresponding path program 1 times [2019-12-07 12:14:22,078 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:14:22,079 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1124424579] [2019-12-07 12:14:22,079 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:14:22,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:14:22,126 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:14:22,126 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1124424579] [2019-12-07 12:14:22,126 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:14:22,127 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:14:22,127 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [297077848] [2019-12-07 12:14:22,127 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:14:22,127 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:14:22,127 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:14:22,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:14:22,128 INFO L87 Difference]: Start difference. First operand 138429 states and 572602 transitions. Second operand 4 states. [2019-12-07 12:14:24,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:14:24,860 INFO L93 Difference]: Finished difference Result 197916 states and 800228 transitions. [2019-12-07 12:14:24,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:14:24,861 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 12:14:24,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:14:25,343 INFO L225 Difference]: With dead ends: 197916 [2019-12-07 12:14:25,343 INFO L226 Difference]: Without dead ends: 197860 [2019-12-07 12:14:25,344 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:14:29,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197860 states. [2019-12-07 12:14:31,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197860 to 165384. [2019-12-07 12:14:31,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165384 states. [2019-12-07 12:14:32,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165384 states to 165384 states and 680683 transitions. [2019-12-07 12:14:32,295 INFO L78 Accepts]: Start accepts. Automaton has 165384 states and 680683 transitions. Word has length 13 [2019-12-07 12:14:32,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:14:32,296 INFO L462 AbstractCegarLoop]: Abstraction has 165384 states and 680683 transitions. [2019-12-07 12:14:32,296 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:14:32,296 INFO L276 IsEmpty]: Start isEmpty. Operand 165384 states and 680683 transitions. [2019-12-07 12:14:32,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:14:32,300 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:14:32,300 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:14:32,300 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:14:32,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:14:32,301 INFO L82 PathProgramCache]: Analyzing trace with hash -137996123, now seen corresponding path program 1 times [2019-12-07 12:14:32,301 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:14:32,301 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [583940123] [2019-12-07 12:14:32,301 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:14:32,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:14:32,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:14:32,328 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [583940123] [2019-12-07 12:14:32,328 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:14:32,328 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:14:32,328 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [396702844] [2019-12-07 12:14:32,329 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:14:32,329 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:14:32,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:14:32,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:14:32,329 INFO L87 Difference]: Start difference. First operand 165384 states and 680683 transitions. Second operand 3 states. [2019-12-07 12:14:33,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:14:33,361 INFO L93 Difference]: Finished difference Result 244100 states and 1002631 transitions. [2019-12-07 12:14:33,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:14:33,362 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 12:14:33,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:14:33,970 INFO L225 Difference]: With dead ends: 244100 [2019-12-07 12:14:33,970 INFO L226 Difference]: Without dead ends: 244100 [2019-12-07 12:14:33,970 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:14:38,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 244100 states. [2019-12-07 12:14:43,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 244100 to 183753. [2019-12-07 12:14:43,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183753 states. [2019-12-07 12:14:44,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183753 states to 183753 states and 759316 transitions. [2019-12-07 12:14:44,069 INFO L78 Accepts]: Start accepts. Automaton has 183753 states and 759316 transitions. Word has length 16 [2019-12-07 12:14:44,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:14:44,069 INFO L462 AbstractCegarLoop]: Abstraction has 183753 states and 759316 transitions. [2019-12-07 12:14:44,069 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:14:44,069 INFO L276 IsEmpty]: Start isEmpty. Operand 183753 states and 759316 transitions. [2019-12-07 12:14:44,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:14:44,075 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:14:44,075 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:14:44,075 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:14:44,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:14:44,075 INFO L82 PathProgramCache]: Analyzing trace with hash -137876649, now seen corresponding path program 1 times [2019-12-07 12:14:44,076 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:14:44,076 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552249582] [2019-12-07 12:14:44,076 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:14:44,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:14:44,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:14:44,119 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1552249582] [2019-12-07 12:14:44,120 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:14:44,120 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:14:44,120 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1196312125] [2019-12-07 12:14:44,120 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:14:44,120 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:14:44,120 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:14:44,121 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:14:44,121 INFO L87 Difference]: Start difference. First operand 183753 states and 759316 transitions. Second operand 4 states. [2019-12-07 12:14:45,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:14:45,657 INFO L93 Difference]: Finished difference Result 219863 states and 898035 transitions. [2019-12-07 12:14:45,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:14:45,658 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 12:14:45,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:14:46,195 INFO L225 Difference]: With dead ends: 219863 [2019-12-07 12:14:46,195 INFO L226 Difference]: Without dead ends: 219863 [2019-12-07 12:14:46,196 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:14:50,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219863 states. [2019-12-07 12:14:53,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219863 to 194030. [2019-12-07 12:14:53,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194030 states. [2019-12-07 12:14:57,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194030 states to 194030 states and 800411 transitions. [2019-12-07 12:14:57,133 INFO L78 Accepts]: Start accepts. Automaton has 194030 states and 800411 transitions. Word has length 16 [2019-12-07 12:14:57,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:14:57,133 INFO L462 AbstractCegarLoop]: Abstraction has 194030 states and 800411 transitions. [2019-12-07 12:14:57,133 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:14:57,133 INFO L276 IsEmpty]: Start isEmpty. Operand 194030 states and 800411 transitions. [2019-12-07 12:14:57,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:14:57,137 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:14:57,137 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:14:57,137 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:14:57,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:14:57,138 INFO L82 PathProgramCache]: Analyzing trace with hash -219444717, now seen corresponding path program 1 times [2019-12-07 12:14:57,138 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:14:57,138 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [287055997] [2019-12-07 12:14:57,138 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:14:57,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:14:57,176 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:14:57,176 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [287055997] [2019-12-07 12:14:57,176 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:14:57,176 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:14:57,176 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1669280237] [2019-12-07 12:14:57,176 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:14:57,177 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:14:57,177 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:14:57,177 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:14:57,177 INFO L87 Difference]: Start difference. First operand 194030 states and 800411 transitions. Second operand 4 states. [2019-12-07 12:14:58,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:14:58,291 INFO L93 Difference]: Finished difference Result 232254 states and 951651 transitions. [2019-12-07 12:14:58,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:14:58,292 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 12:14:58,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:14:58,889 INFO L225 Difference]: With dead ends: 232254 [2019-12-07 12:14:58,889 INFO L226 Difference]: Without dead ends: 232254 [2019-12-07 12:14:58,889 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:15:03,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232254 states. [2019-12-07 12:15:06,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232254 to 195815. [2019-12-07 12:15:06,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195815 states. [2019-12-07 12:15:07,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195815 states to 195815 states and 808686 transitions. [2019-12-07 12:15:07,226 INFO L78 Accepts]: Start accepts. Automaton has 195815 states and 808686 transitions. Word has length 16 [2019-12-07 12:15:07,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:07,226 INFO L462 AbstractCegarLoop]: Abstraction has 195815 states and 808686 transitions. [2019-12-07 12:15:07,226 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:15:07,226 INFO L276 IsEmpty]: Start isEmpty. Operand 195815 states and 808686 transitions. [2019-12-07 12:15:07,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 12:15:07,237 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:07,237 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:07,237 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:07,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:07,237 INFO L82 PathProgramCache]: Analyzing trace with hash -604356166, now seen corresponding path program 1 times [2019-12-07 12:15:07,237 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:07,238 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [561094931] [2019-12-07 12:15:07,238 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:07,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:07,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:07,268 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [561094931] [2019-12-07 12:15:07,268 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:07,268 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:15:07,268 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1494939864] [2019-12-07 12:15:07,268 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:15:07,268 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:07,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:15:07,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:15:07,269 INFO L87 Difference]: Start difference. First operand 195815 states and 808686 transitions. Second operand 3 states. [2019-12-07 12:15:07,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:07,400 INFO L93 Difference]: Finished difference Result 38445 states and 125143 transitions. [2019-12-07 12:15:07,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:15:07,400 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 12:15:07,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:07,458 INFO L225 Difference]: With dead ends: 38445 [2019-12-07 12:15:07,458 INFO L226 Difference]: Without dead ends: 38445 [2019-12-07 12:15:07,459 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:15:07,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38445 states. [2019-12-07 12:15:07,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38445 to 38365. [2019-12-07 12:15:07,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38365 states. [2019-12-07 12:15:08,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38365 states to 38365 states and 124903 transitions. [2019-12-07 12:15:08,055 INFO L78 Accepts]: Start accepts. Automaton has 38365 states and 124903 transitions. Word has length 18 [2019-12-07 12:15:08,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:08,055 INFO L462 AbstractCegarLoop]: Abstraction has 38365 states and 124903 transitions. [2019-12-07 12:15:08,055 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:15:08,056 INFO L276 IsEmpty]: Start isEmpty. Operand 38365 states and 124903 transitions. [2019-12-07 12:15:08,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 12:15:08,060 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:08,060 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:08,060 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:08,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:08,061 INFO L82 PathProgramCache]: Analyzing trace with hash -1066994180, now seen corresponding path program 1 times [2019-12-07 12:15:08,061 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:08,061 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2046232691] [2019-12-07 12:15:08,061 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:08,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:08,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:08,113 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2046232691] [2019-12-07 12:15:08,113 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:08,113 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:15:08,113 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1270948629] [2019-12-07 12:15:08,113 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:15:08,114 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:08,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:15:08,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:15:08,114 INFO L87 Difference]: Start difference. First operand 38365 states and 124903 transitions. Second operand 5 states. [2019-12-07 12:15:08,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:08,521 INFO L93 Difference]: Finished difference Result 53898 states and 171065 transitions. [2019-12-07 12:15:08,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:15:08,522 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 12:15:08,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:08,601 INFO L225 Difference]: With dead ends: 53898 [2019-12-07 12:15:08,601 INFO L226 Difference]: Without dead ends: 53891 [2019-12-07 12:15:08,601 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:15:08,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53891 states. [2019-12-07 12:15:09,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53891 to 39721. [2019-12-07 12:15:09,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39721 states. [2019-12-07 12:15:09,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39721 states to 39721 states and 129036 transitions. [2019-12-07 12:15:09,493 INFO L78 Accepts]: Start accepts. Automaton has 39721 states and 129036 transitions. Word has length 22 [2019-12-07 12:15:09,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:09,493 INFO L462 AbstractCegarLoop]: Abstraction has 39721 states and 129036 transitions. [2019-12-07 12:15:09,493 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:15:09,493 INFO L276 IsEmpty]: Start isEmpty. Operand 39721 states and 129036 transitions. [2019-12-07 12:15:09,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 12:15:09,498 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:09,498 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:09,498 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:09,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:09,498 INFO L82 PathProgramCache]: Analyzing trace with hash -1734556852, now seen corresponding path program 1 times [2019-12-07 12:15:09,498 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:09,498 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [276451828] [2019-12-07 12:15:09,498 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:09,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:09,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:09,532 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [276451828] [2019-12-07 12:15:09,532 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:09,532 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:15:09,532 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [125424068] [2019-12-07 12:15:09,532 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:15:09,533 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:09,533 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:15:09,533 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:15:09,533 INFO L87 Difference]: Start difference. First operand 39721 states and 129036 transitions. Second operand 5 states. [2019-12-07 12:15:09,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:09,969 INFO L93 Difference]: Finished difference Result 56181 states and 177938 transitions. [2019-12-07 12:15:09,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:15:09,970 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 12:15:09,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:10,053 INFO L225 Difference]: With dead ends: 56181 [2019-12-07 12:15:10,053 INFO L226 Difference]: Without dead ends: 56174 [2019-12-07 12:15:10,053 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:15:10,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56174 states. [2019-12-07 12:15:10,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56174 to 38054. [2019-12-07 12:15:10,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38054 states. [2019-12-07 12:15:10,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38054 states to 38054 states and 123745 transitions. [2019-12-07 12:15:10,765 INFO L78 Accepts]: Start accepts. Automaton has 38054 states and 123745 transitions. Word has length 22 [2019-12-07 12:15:10,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:10,765 INFO L462 AbstractCegarLoop]: Abstraction has 38054 states and 123745 transitions. [2019-12-07 12:15:10,765 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:15:10,766 INFO L276 IsEmpty]: Start isEmpty. Operand 38054 states and 123745 transitions. [2019-12-07 12:15:10,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 12:15:10,774 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:10,774 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:10,774 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:10,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:10,775 INFO L82 PathProgramCache]: Analyzing trace with hash -779030427, now seen corresponding path program 1 times [2019-12-07 12:15:10,775 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:10,775 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [997893725] [2019-12-07 12:15:10,775 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:10,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:10,816 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:10,816 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [997893725] [2019-12-07 12:15:10,817 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:10,817 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:15:10,817 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [802570926] [2019-12-07 12:15:10,817 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:15:10,817 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:10,817 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:15:10,817 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:15:10,817 INFO L87 Difference]: Start difference. First operand 38054 states and 123745 transitions. Second operand 5 states. [2019-12-07 12:15:11,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:11,232 INFO L93 Difference]: Finished difference Result 53064 states and 168438 transitions. [2019-12-07 12:15:11,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:15:11,232 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 12:15:11,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:11,310 INFO L225 Difference]: With dead ends: 53064 [2019-12-07 12:15:11,310 INFO L226 Difference]: Without dead ends: 53051 [2019-12-07 12:15:11,310 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:15:11,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53051 states. [2019-12-07 12:15:12,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53051 to 44527. [2019-12-07 12:15:12,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44527 states. [2019-12-07 12:15:12,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44527 states to 44527 states and 143877 transitions. [2019-12-07 12:15:12,118 INFO L78 Accepts]: Start accepts. Automaton has 44527 states and 143877 transitions. Word has length 25 [2019-12-07 12:15:12,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:12,118 INFO L462 AbstractCegarLoop]: Abstraction has 44527 states and 143877 transitions. [2019-12-07 12:15:12,118 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:15:12,118 INFO L276 IsEmpty]: Start isEmpty. Operand 44527 states and 143877 transitions. [2019-12-07 12:15:12,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:15:12,129 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:12,129 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:12,129 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:12,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:12,130 INFO L82 PathProgramCache]: Analyzing trace with hash -1740727520, now seen corresponding path program 1 times [2019-12-07 12:15:12,130 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:12,130 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1535891223] [2019-12-07 12:15:12,130 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:12,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:12,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:12,171 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1535891223] [2019-12-07 12:15:12,171 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:12,171 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:15:12,171 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2097916845] [2019-12-07 12:15:12,172 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:15:12,172 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:12,172 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:15:12,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:15:12,172 INFO L87 Difference]: Start difference. First operand 44527 states and 143877 transitions. Second operand 5 states. [2019-12-07 12:15:12,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:12,505 INFO L93 Difference]: Finished difference Result 57149 states and 181718 transitions. [2019-12-07 12:15:12,506 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:15:12,506 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 12:15:12,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:12,588 INFO L225 Difference]: With dead ends: 57149 [2019-12-07 12:15:12,588 INFO L226 Difference]: Without dead ends: 57125 [2019-12-07 12:15:12,588 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:15:12,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57125 states. [2019-12-07 12:15:13,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57125 to 49925. [2019-12-07 12:15:13,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49925 states. [2019-12-07 12:15:13,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49925 states to 49925 states and 160598 transitions. [2019-12-07 12:15:13,428 INFO L78 Accepts]: Start accepts. Automaton has 49925 states and 160598 transitions. Word has length 27 [2019-12-07 12:15:13,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:13,428 INFO L462 AbstractCegarLoop]: Abstraction has 49925 states and 160598 transitions. [2019-12-07 12:15:13,428 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:15:13,428 INFO L276 IsEmpty]: Start isEmpty. Operand 49925 states and 160598 transitions. [2019-12-07 12:15:13,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 12:15:13,443 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:13,443 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:13,443 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:13,443 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:13,444 INFO L82 PathProgramCache]: Analyzing trace with hash -1978987791, now seen corresponding path program 1 times [2019-12-07 12:15:13,444 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:13,444 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2077224727] [2019-12-07 12:15:13,444 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:13,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:13,481 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:13,481 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2077224727] [2019-12-07 12:15:13,481 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:13,481 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:15:13,482 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1823242949] [2019-12-07 12:15:13,482 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:15:13,482 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:13,482 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:15:13,482 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:15:13,482 INFO L87 Difference]: Start difference. First operand 49925 states and 160598 transitions. Second operand 5 states. [2019-12-07 12:15:13,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:13,829 INFO L93 Difference]: Finished difference Result 60112 states and 190425 transitions. [2019-12-07 12:15:13,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:15:13,830 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 12:15:13,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:13,917 INFO L225 Difference]: With dead ends: 60112 [2019-12-07 12:15:13,917 INFO L226 Difference]: Without dead ends: 60090 [2019-12-07 12:15:13,917 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:15:14,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60090 states. [2019-12-07 12:15:14,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60090 to 48583. [2019-12-07 12:15:14,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48583 states. [2019-12-07 12:15:14,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48583 states to 48583 states and 156497 transitions. [2019-12-07 12:15:14,771 INFO L78 Accepts]: Start accepts. Automaton has 48583 states and 156497 transitions. Word has length 28 [2019-12-07 12:15:14,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:14,771 INFO L462 AbstractCegarLoop]: Abstraction has 48583 states and 156497 transitions. [2019-12-07 12:15:14,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:15:14,772 INFO L276 IsEmpty]: Start isEmpty. Operand 48583 states and 156497 transitions. [2019-12-07 12:15:14,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 12:15:14,785 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:14,785 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:14,786 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:14,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:14,786 INFO L82 PathProgramCache]: Analyzing trace with hash -906370244, now seen corresponding path program 1 times [2019-12-07 12:15:14,786 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:14,786 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1135464989] [2019-12-07 12:15:14,786 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:14,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:14,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:14,832 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1135464989] [2019-12-07 12:15:14,833 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:14,833 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:15:14,833 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1077647112] [2019-12-07 12:15:14,833 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:15:14,833 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:14,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:15:14,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:15:14,833 INFO L87 Difference]: Start difference. First operand 48583 states and 156497 transitions. Second operand 5 states. [2019-12-07 12:15:15,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:15,356 INFO L93 Difference]: Finished difference Result 67084 states and 213778 transitions. [2019-12-07 12:15:15,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 12:15:15,356 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 12:15:15,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:15,452 INFO L225 Difference]: With dead ends: 67084 [2019-12-07 12:15:15,452 INFO L226 Difference]: Without dead ends: 67084 [2019-12-07 12:15:15,453 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:15:15,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67084 states. [2019-12-07 12:15:16,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67084 to 58697. [2019-12-07 12:15:16,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58697 states. [2019-12-07 12:15:16,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58697 states to 58697 states and 188868 transitions. [2019-12-07 12:15:16,435 INFO L78 Accepts]: Start accepts. Automaton has 58697 states and 188868 transitions. Word has length 28 [2019-12-07 12:15:16,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:16,435 INFO L462 AbstractCegarLoop]: Abstraction has 58697 states and 188868 transitions. [2019-12-07 12:15:16,435 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:15:16,435 INFO L276 IsEmpty]: Start isEmpty. Operand 58697 states and 188868 transitions. [2019-12-07 12:15:16,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 12:15:16,458 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:16,458 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:16,459 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:16,459 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:16,459 INFO L82 PathProgramCache]: Analyzing trace with hash -915242211, now seen corresponding path program 1 times [2019-12-07 12:15:16,459 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:16,459 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [253361186] [2019-12-07 12:15:16,459 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:16,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:16,488 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:16,488 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [253361186] [2019-12-07 12:15:16,488 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:16,489 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:15:16,489 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [208158099] [2019-12-07 12:15:16,489 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:15:16,489 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:16,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:15:16,489 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:15:16,490 INFO L87 Difference]: Start difference. First operand 58697 states and 188868 transitions. Second operand 4 states. [2019-12-07 12:15:16,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:16,637 INFO L93 Difference]: Finished difference Result 25808 states and 78317 transitions. [2019-12-07 12:15:16,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:15:16,637 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 12:15:16,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:16,665 INFO L225 Difference]: With dead ends: 25808 [2019-12-07 12:15:16,665 INFO L226 Difference]: Without dead ends: 25808 [2019-12-07 12:15:16,666 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:15:16,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25808 states. [2019-12-07 12:15:16,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25808 to 24073. [2019-12-07 12:15:16,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24073 states. [2019-12-07 12:15:16,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24073 states to 24073 states and 73199 transitions. [2019-12-07 12:15:16,981 INFO L78 Accepts]: Start accepts. Automaton has 24073 states and 73199 transitions. Word has length 29 [2019-12-07 12:15:16,981 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:16,981 INFO L462 AbstractCegarLoop]: Abstraction has 24073 states and 73199 transitions. [2019-12-07 12:15:16,981 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:15:16,982 INFO L276 IsEmpty]: Start isEmpty. Operand 24073 states and 73199 transitions. [2019-12-07 12:15:16,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 12:15:16,998 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:16,998 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:16,998 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:16,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:16,999 INFO L82 PathProgramCache]: Analyzing trace with hash 1850577991, now seen corresponding path program 1 times [2019-12-07 12:15:16,999 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:16,999 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [979202726] [2019-12-07 12:15:16,999 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:17,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:17,040 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:17,041 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [979202726] [2019-12-07 12:15:17,041 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:17,041 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:15:17,041 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1304292637] [2019-12-07 12:15:17,041 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:15:17,041 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:17,041 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:15:17,042 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:15:17,042 INFO L87 Difference]: Start difference. First operand 24073 states and 73199 transitions. Second operand 6 states. [2019-12-07 12:15:17,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:17,481 INFO L93 Difference]: Finished difference Result 32207 states and 96092 transitions. [2019-12-07 12:15:17,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:15:17,481 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 12:15:17,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:17,515 INFO L225 Difference]: With dead ends: 32207 [2019-12-07 12:15:17,516 INFO L226 Difference]: Without dead ends: 32207 [2019-12-07 12:15:17,516 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:15:17,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32207 states. [2019-12-07 12:15:17,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32207 to 25707. [2019-12-07 12:15:17,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25707 states. [2019-12-07 12:15:17,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25707 states to 25707 states and 77993 transitions. [2019-12-07 12:15:17,900 INFO L78 Accepts]: Start accepts. Automaton has 25707 states and 77993 transitions. Word has length 33 [2019-12-07 12:15:17,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:17,901 INFO L462 AbstractCegarLoop]: Abstraction has 25707 states and 77993 transitions. [2019-12-07 12:15:17,901 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:15:17,901 INFO L276 IsEmpty]: Start isEmpty. Operand 25707 states and 77993 transitions. [2019-12-07 12:15:17,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 12:15:17,918 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:17,918 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:17,918 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:17,918 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:17,918 INFO L82 PathProgramCache]: Analyzing trace with hash 1933444630, now seen corresponding path program 1 times [2019-12-07 12:15:17,918 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:17,918 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [545491742] [2019-12-07 12:15:17,919 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:17,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:17,963 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:17,963 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [545491742] [2019-12-07 12:15:17,963 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:17,963 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:15:17,963 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2104506109] [2019-12-07 12:15:17,963 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:15:17,964 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:17,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:15:17,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:15:17,964 INFO L87 Difference]: Start difference. First operand 25707 states and 77993 transitions. Second operand 6 states. [2019-12-07 12:15:18,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:18,397 INFO L93 Difference]: Finished difference Result 31740 states and 94616 transitions. [2019-12-07 12:15:18,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:15:18,397 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 12:15:18,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:18,431 INFO L225 Difference]: With dead ends: 31740 [2019-12-07 12:15:18,432 INFO L226 Difference]: Without dead ends: 31740 [2019-12-07 12:15:18,432 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:15:18,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31740 states. [2019-12-07 12:15:18,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31740 to 23196. [2019-12-07 12:15:18,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23196 states. [2019-12-07 12:15:18,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23196 states to 23196 states and 70521 transitions. [2019-12-07 12:15:18,787 INFO L78 Accepts]: Start accepts. Automaton has 23196 states and 70521 transitions. Word has length 34 [2019-12-07 12:15:18,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:18,787 INFO L462 AbstractCegarLoop]: Abstraction has 23196 states and 70521 transitions. [2019-12-07 12:15:18,787 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:15:18,787 INFO L276 IsEmpty]: Start isEmpty. Operand 23196 states and 70521 transitions. [2019-12-07 12:15:18,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 12:15:18,805 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:18,805 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:18,805 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:18,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:18,805 INFO L82 PathProgramCache]: Analyzing trace with hash -32326155, now seen corresponding path program 1 times [2019-12-07 12:15:18,805 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:18,805 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2135494500] [2019-12-07 12:15:18,805 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:18,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:18,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:18,839 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2135494500] [2019-12-07 12:15:18,839 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:18,839 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:15:18,839 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367729778] [2019-12-07 12:15:18,840 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:15:18,840 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:18,840 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:15:18,840 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:15:18,840 INFO L87 Difference]: Start difference. First operand 23196 states and 70521 transitions. Second operand 3 states. [2019-12-07 12:15:18,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:18,903 INFO L93 Difference]: Finished difference Result 23196 states and 69774 transitions. [2019-12-07 12:15:18,903 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:15:18,903 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 12:15:18,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:18,927 INFO L225 Difference]: With dead ends: 23196 [2019-12-07 12:15:18,927 INFO L226 Difference]: Without dead ends: 23196 [2019-12-07 12:15:18,927 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:15:18,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23196 states. [2019-12-07 12:15:19,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23196 to 23068. [2019-12-07 12:15:19,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23068 states. [2019-12-07 12:15:19,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23068 states to 23068 states and 69418 transitions. [2019-12-07 12:15:19,231 INFO L78 Accepts]: Start accepts. Automaton has 23068 states and 69418 transitions. Word has length 39 [2019-12-07 12:15:19,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:19,231 INFO L462 AbstractCegarLoop]: Abstraction has 23068 states and 69418 transitions. [2019-12-07 12:15:19,231 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:15:19,231 INFO L276 IsEmpty]: Start isEmpty. Operand 23068 states and 69418 transitions. [2019-12-07 12:15:19,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 12:15:19,248 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:19,248 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:19,248 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:19,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:19,248 INFO L82 PathProgramCache]: Analyzing trace with hash 1133369093, now seen corresponding path program 1 times [2019-12-07 12:15:19,248 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:19,249 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1258068610] [2019-12-07 12:15:19,249 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:19,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:19,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:19,308 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1258068610] [2019-12-07 12:15:19,308 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:19,308 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:15:19,308 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [44821682] [2019-12-07 12:15:19,309 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:15:19,309 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:19,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:15:19,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:15:19,309 INFO L87 Difference]: Start difference. First operand 23068 states and 69418 transitions. Second operand 6 states. [2019-12-07 12:15:20,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:20,089 INFO L93 Difference]: Finished difference Result 30235 states and 89609 transitions. [2019-12-07 12:15:20,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 12:15:20,090 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 12:15:20,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:20,122 INFO L225 Difference]: With dead ends: 30235 [2019-12-07 12:15:20,122 INFO L226 Difference]: Without dead ends: 30235 [2019-12-07 12:15:20,123 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 12:15:20,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30235 states. [2019-12-07 12:15:20,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30235 to 24421. [2019-12-07 12:15:20,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24421 states. [2019-12-07 12:15:20,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24421 states to 24421 states and 73481 transitions. [2019-12-07 12:15:20,488 INFO L78 Accepts]: Start accepts. Automaton has 24421 states and 73481 transitions. Word has length 40 [2019-12-07 12:15:20,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:20,488 INFO L462 AbstractCegarLoop]: Abstraction has 24421 states and 73481 transitions. [2019-12-07 12:15:20,488 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:15:20,488 INFO L276 IsEmpty]: Start isEmpty. Operand 24421 states and 73481 transitions. [2019-12-07 12:15:20,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 12:15:20,509 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:20,509 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:20,509 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:20,509 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:20,509 INFO L82 PathProgramCache]: Analyzing trace with hash -1613873579, now seen corresponding path program 2 times [2019-12-07 12:15:20,509 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:20,509 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [969395012] [2019-12-07 12:15:20,509 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:20,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:20,545 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:20,545 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [969395012] [2019-12-07 12:15:20,545 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:20,545 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:15:20,546 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [896389194] [2019-12-07 12:15:20,546 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:15:20,546 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:20,546 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:15:20,546 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:15:20,546 INFO L87 Difference]: Start difference. First operand 24421 states and 73481 transitions. Second operand 3 states. [2019-12-07 12:15:20,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:20,671 INFO L93 Difference]: Finished difference Result 46200 states and 139144 transitions. [2019-12-07 12:15:20,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:15:20,672 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 12:15:20,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:20,699 INFO L225 Difference]: With dead ends: 46200 [2019-12-07 12:15:20,699 INFO L226 Difference]: Without dead ends: 24874 [2019-12-07 12:15:20,699 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:15:20,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24874 states. [2019-12-07 12:15:20,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24874 to 24760. [2019-12-07 12:15:20,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24760 states. [2019-12-07 12:15:21,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24760 states to 24760 states and 72951 transitions. [2019-12-07 12:15:21,026 INFO L78 Accepts]: Start accepts. Automaton has 24760 states and 72951 transitions. Word has length 40 [2019-12-07 12:15:21,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:21,026 INFO L462 AbstractCegarLoop]: Abstraction has 24760 states and 72951 transitions. [2019-12-07 12:15:21,026 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:15:21,026 INFO L276 IsEmpty]: Start isEmpty. Operand 24760 states and 72951 transitions. [2019-12-07 12:15:21,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 12:15:21,045 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:21,045 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:21,045 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:21,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:21,046 INFO L82 PathProgramCache]: Analyzing trace with hash -380516314, now seen corresponding path program 1 times [2019-12-07 12:15:21,046 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:21,046 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [970448072] [2019-12-07 12:15:21,046 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:21,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:21,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:21,081 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [970448072] [2019-12-07 12:15:21,082 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:21,082 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:15:21,082 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1498448613] [2019-12-07 12:15:21,082 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:15:21,082 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:21,082 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:15:21,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:15:21,082 INFO L87 Difference]: Start difference. First operand 24760 states and 72951 transitions. Second operand 3 states. [2019-12-07 12:15:21,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:21,155 INFO L93 Difference]: Finished difference Result 24760 states and 72877 transitions. [2019-12-07 12:15:21,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:15:21,155 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 12:15:21,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:21,183 INFO L225 Difference]: With dead ends: 24760 [2019-12-07 12:15:21,183 INFO L226 Difference]: Without dead ends: 24760 [2019-12-07 12:15:21,183 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:15:21,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24760 states. [2019-12-07 12:15:21,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24760 to 20143. [2019-12-07 12:15:21,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20143 states. [2019-12-07 12:15:21,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20143 states to 20143 states and 59924 transitions. [2019-12-07 12:15:21,473 INFO L78 Accepts]: Start accepts. Automaton has 20143 states and 59924 transitions. Word has length 41 [2019-12-07 12:15:21,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:21,473 INFO L462 AbstractCegarLoop]: Abstraction has 20143 states and 59924 transitions. [2019-12-07 12:15:21,473 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:15:21,473 INFO L276 IsEmpty]: Start isEmpty. Operand 20143 states and 59924 transitions. [2019-12-07 12:15:21,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 12:15:21,489 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:21,489 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:21,489 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:21,489 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:21,489 INFO L82 PathProgramCache]: Analyzing trace with hash -1900542759, now seen corresponding path program 1 times [2019-12-07 12:15:21,489 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:21,489 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [212537870] [2019-12-07 12:15:21,490 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:21,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:21,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:21,579 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [212537870] [2019-12-07 12:15:21,580 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:21,580 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:15:21,580 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2132133883] [2019-12-07 12:15:21,580 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:15:21,580 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:21,580 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:15:21,581 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:15:21,581 INFO L87 Difference]: Start difference. First operand 20143 states and 59924 transitions. Second operand 5 states. [2019-12-07 12:15:21,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:21,643 INFO L93 Difference]: Finished difference Result 18694 states and 56727 transitions. [2019-12-07 12:15:21,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:15:21,644 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 12:15:21,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:21,663 INFO L225 Difference]: With dead ends: 18694 [2019-12-07 12:15:21,663 INFO L226 Difference]: Without dead ends: 17312 [2019-12-07 12:15:21,663 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:15:21,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17312 states. [2019-12-07 12:15:21,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17312 to 16108. [2019-12-07 12:15:21,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16108 states. [2019-12-07 12:15:21,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16108 states to 16108 states and 50136 transitions. [2019-12-07 12:15:21,888 INFO L78 Accepts]: Start accepts. Automaton has 16108 states and 50136 transitions. Word has length 42 [2019-12-07 12:15:21,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:21,888 INFO L462 AbstractCegarLoop]: Abstraction has 16108 states and 50136 transitions. [2019-12-07 12:15:21,888 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:15:21,888 INFO L276 IsEmpty]: Start isEmpty. Operand 16108 states and 50136 transitions. [2019-12-07 12:15:21,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:15:21,901 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:21,901 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:21,901 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:21,901 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:21,902 INFO L82 PathProgramCache]: Analyzing trace with hash 320095775, now seen corresponding path program 1 times [2019-12-07 12:15:21,902 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:21,902 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [558079585] [2019-12-07 12:15:21,902 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:21,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:21,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:21,930 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [558079585] [2019-12-07 12:15:21,930 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:21,930 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:15:21,931 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1138235511] [2019-12-07 12:15:21,931 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:15:21,931 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:21,931 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:15:21,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:15:21,931 INFO L87 Difference]: Start difference. First operand 16108 states and 50136 transitions. Second operand 3 states. [2019-12-07 12:15:21,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:21,995 INFO L93 Difference]: Finished difference Result 20304 states and 61140 transitions. [2019-12-07 12:15:21,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:15:21,995 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 12:15:21,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:22,015 INFO L225 Difference]: With dead ends: 20304 [2019-12-07 12:15:22,015 INFO L226 Difference]: Without dead ends: 20304 [2019-12-07 12:15:22,015 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:15:22,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20304 states. [2019-12-07 12:15:22,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20304 to 16305. [2019-12-07 12:15:22,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16305 states. [2019-12-07 12:15:22,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16305 states to 16305 states and 49108 transitions. [2019-12-07 12:15:22,256 INFO L78 Accepts]: Start accepts. Automaton has 16305 states and 49108 transitions. Word has length 66 [2019-12-07 12:15:22,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:22,257 INFO L462 AbstractCegarLoop]: Abstraction has 16305 states and 49108 transitions. [2019-12-07 12:15:22,257 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:15:22,257 INFO L276 IsEmpty]: Start isEmpty. Operand 16305 states and 49108 transitions. [2019-12-07 12:15:22,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:15:22,269 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:22,269 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:22,270 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:22,270 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:22,270 INFO L82 PathProgramCache]: Analyzing trace with hash -424379593, now seen corresponding path program 1 times [2019-12-07 12:15:22,270 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:22,270 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1622990006] [2019-12-07 12:15:22,270 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:22,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:22,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:22,309 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1622990006] [2019-12-07 12:15:22,309 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:22,310 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:15:22,310 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [941973053] [2019-12-07 12:15:22,310 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:15:22,310 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:22,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:15:22,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:15:22,310 INFO L87 Difference]: Start difference. First operand 16305 states and 49108 transitions. Second operand 3 states. [2019-12-07 12:15:22,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:22,397 INFO L93 Difference]: Finished difference Result 19632 states and 59202 transitions. [2019-12-07 12:15:22,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:15:22,398 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 12:15:22,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:22,419 INFO L225 Difference]: With dead ends: 19632 [2019-12-07 12:15:22,419 INFO L226 Difference]: Without dead ends: 19632 [2019-12-07 12:15:22,420 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:15:22,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19632 states. [2019-12-07 12:15:22,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19632 to 15013. [2019-12-07 12:15:22,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15013 states. [2019-12-07 12:15:22,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15013 states to 15013 states and 45559 transitions. [2019-12-07 12:15:22,643 INFO L78 Accepts]: Start accepts. Automaton has 15013 states and 45559 transitions. Word has length 66 [2019-12-07 12:15:22,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:22,643 INFO L462 AbstractCegarLoop]: Abstraction has 15013 states and 45559 transitions. [2019-12-07 12:15:22,643 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:15:22,643 INFO L276 IsEmpty]: Start isEmpty. Operand 15013 states and 45559 transitions. [2019-12-07 12:15:22,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:15:22,655 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:22,655 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:22,656 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:22,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:22,656 INFO L82 PathProgramCache]: Analyzing trace with hash -357179172, now seen corresponding path program 1 times [2019-12-07 12:15:22,656 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:22,656 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [800738980] [2019-12-07 12:15:22,656 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:22,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:22,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:22,703 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [800738980] [2019-12-07 12:15:22,703 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:22,704 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:15:22,704 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1430973039] [2019-12-07 12:15:22,704 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:15:22,704 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:22,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:15:22,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:15:22,705 INFO L87 Difference]: Start difference. First operand 15013 states and 45559 transitions. Second operand 4 states. [2019-12-07 12:15:22,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:22,781 INFO L93 Difference]: Finished difference Result 15013 states and 45357 transitions. [2019-12-07 12:15:22,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:15:22,781 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 12:15:22,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:22,797 INFO L225 Difference]: With dead ends: 15013 [2019-12-07 12:15:22,797 INFO L226 Difference]: Without dead ends: 15013 [2019-12-07 12:15:22,797 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:15:22,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15013 states. [2019-12-07 12:15:22,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15013 to 13589. [2019-12-07 12:15:22,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13589 states. [2019-12-07 12:15:22,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13589 states to 13589 states and 40900 transitions. [2019-12-07 12:15:22,991 INFO L78 Accepts]: Start accepts. Automaton has 13589 states and 40900 transitions. Word has length 67 [2019-12-07 12:15:22,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:22,991 INFO L462 AbstractCegarLoop]: Abstraction has 13589 states and 40900 transitions. [2019-12-07 12:15:22,991 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:15:22,991 INFO L276 IsEmpty]: Start isEmpty. Operand 13589 states and 40900 transitions. [2019-12-07 12:15:23,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:15:23,003 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:23,003 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:23,003 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:23,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:23,003 INFO L82 PathProgramCache]: Analyzing trace with hash 28997027, now seen corresponding path program 1 times [2019-12-07 12:15:23,003 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:23,004 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1116103705] [2019-12-07 12:15:23,004 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:23,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:23,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:23,119 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1116103705] [2019-12-07 12:15:23,119 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:23,119 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 12:15:23,119 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2069373924] [2019-12-07 12:15:23,120 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 12:15:23,120 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:23,120 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 12:15:23,120 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 12:15:23,120 INFO L87 Difference]: Start difference. First operand 13589 states and 40900 transitions. Second operand 12 states. [2019-12-07 12:15:24,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:24,102 INFO L93 Difference]: Finished difference Result 47386 states and 141817 transitions. [2019-12-07 12:15:24,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 12:15:24,102 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 12:15:24,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:24,133 INFO L225 Difference]: With dead ends: 47386 [2019-12-07 12:15:24,133 INFO L226 Difference]: Without dead ends: 30051 [2019-12-07 12:15:24,134 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 679 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=435, Invalid=1917, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 12:15:24,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30051 states. [2019-12-07 12:15:24,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30051 to 16132. [2019-12-07 12:15:24,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16132 states. [2019-12-07 12:15:24,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16132 states to 16132 states and 47983 transitions. [2019-12-07 12:15:24,456 INFO L78 Accepts]: Start accepts. Automaton has 16132 states and 47983 transitions. Word has length 67 [2019-12-07 12:15:24,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:24,456 INFO L462 AbstractCegarLoop]: Abstraction has 16132 states and 47983 transitions. [2019-12-07 12:15:24,456 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 12:15:24,456 INFO L276 IsEmpty]: Start isEmpty. Operand 16132 states and 47983 transitions. [2019-12-07 12:15:24,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:15:24,468 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:24,468 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:24,468 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:24,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:24,468 INFO L82 PathProgramCache]: Analyzing trace with hash -123948117, now seen corresponding path program 2 times [2019-12-07 12:15:24,469 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:24,469 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [987427688] [2019-12-07 12:15:24,469 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:24,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:24,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:24,521 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [987427688] [2019-12-07 12:15:24,521 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:24,521 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:15:24,521 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1354602743] [2019-12-07 12:15:24,521 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:15:24,522 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:24,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:15:24,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:15:24,522 INFO L87 Difference]: Start difference. First operand 16132 states and 47983 transitions. Second operand 7 states. [2019-12-07 12:15:24,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:24,758 INFO L93 Difference]: Finished difference Result 30098 states and 87405 transitions. [2019-12-07 12:15:24,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:15:24,759 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 12:15:24,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:24,787 INFO L225 Difference]: With dead ends: 30098 [2019-12-07 12:15:24,787 INFO L226 Difference]: Without dead ends: 26889 [2019-12-07 12:15:24,787 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 12:15:24,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26889 states. [2019-12-07 12:15:25,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26889 to 15494. [2019-12-07 12:15:25,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15494 states. [2019-12-07 12:15:25,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15494 states to 15494 states and 46120 transitions. [2019-12-07 12:15:25,058 INFO L78 Accepts]: Start accepts. Automaton has 15494 states and 46120 transitions. Word has length 67 [2019-12-07 12:15:25,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:25,059 INFO L462 AbstractCegarLoop]: Abstraction has 15494 states and 46120 transitions. [2019-12-07 12:15:25,059 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:15:25,059 INFO L276 IsEmpty]: Start isEmpty. Operand 15494 states and 46120 transitions. [2019-12-07 12:15:25,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:15:25,071 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:25,071 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:25,071 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:25,071 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:25,072 INFO L82 PathProgramCache]: Analyzing trace with hash 824690763, now seen corresponding path program 3 times [2019-12-07 12:15:25,072 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:25,072 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [653666358] [2019-12-07 12:15:25,072 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:25,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:25,200 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:25,200 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [653666358] [2019-12-07 12:15:25,200 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:25,200 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 12:15:25,200 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [982556890] [2019-12-07 12:15:25,200 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 12:15:25,200 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:25,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 12:15:25,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 12:15:25,201 INFO L87 Difference]: Start difference. First operand 15494 states and 46120 transitions. Second operand 12 states. [2019-12-07 12:15:25,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:25,863 INFO L93 Difference]: Finished difference Result 33428 states and 98720 transitions. [2019-12-07 12:15:25,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 12:15:25,863 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 12:15:25,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:25,893 INFO L225 Difference]: With dead ends: 33428 [2019-12-07 12:15:25,893 INFO L226 Difference]: Without dead ends: 29620 [2019-12-07 12:15:25,894 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 223 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=198, Invalid=858, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 12:15:25,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29620 states. [2019-12-07 12:15:26,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29620 to 16054. [2019-12-07 12:15:26,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16054 states. [2019-12-07 12:15:26,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16054 states to 16054 states and 47671 transitions. [2019-12-07 12:15:26,185 INFO L78 Accepts]: Start accepts. Automaton has 16054 states and 47671 transitions. Word has length 67 [2019-12-07 12:15:26,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:26,186 INFO L462 AbstractCegarLoop]: Abstraction has 16054 states and 47671 transitions. [2019-12-07 12:15:26,186 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 12:15:26,186 INFO L276 IsEmpty]: Start isEmpty. Operand 16054 states and 47671 transitions. [2019-12-07 12:15:26,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:15:26,199 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:26,199 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:26,199 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:26,199 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:26,199 INFO L82 PathProgramCache]: Analyzing trace with hash 1689948735, now seen corresponding path program 4 times [2019-12-07 12:15:26,199 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:26,199 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [341882818] [2019-12-07 12:15:26,199 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:26,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:15:26,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:15:26,341 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [341882818] [2019-12-07 12:15:26,342 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:15:26,342 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 12:15:26,342 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1063856681] [2019-12-07 12:15:26,342 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 12:15:26,342 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:15:26,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 12:15:26,342 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:15:26,342 INFO L87 Difference]: Start difference. First operand 16054 states and 47671 transitions. Second operand 13 states. [2019-12-07 12:15:27,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:15:27,646 INFO L93 Difference]: Finished difference Result 47827 states and 140496 transitions. [2019-12-07 12:15:27,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2019-12-07 12:15:27,647 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 12:15:27,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:15:27,688 INFO L225 Difference]: With dead ends: 47827 [2019-12-07 12:15:27,688 INFO L226 Difference]: Without dead ends: 39333 [2019-12-07 12:15:27,689 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 802 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=481, Invalid=2275, Unknown=0, NotChecked=0, Total=2756 [2019-12-07 12:15:27,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39333 states. [2019-12-07 12:15:28,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39333 to 14834. [2019-12-07 12:15:28,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14834 states. [2019-12-07 12:15:28,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14834 states to 14834 states and 44130 transitions. [2019-12-07 12:15:28,082 INFO L78 Accepts]: Start accepts. Automaton has 14834 states and 44130 transitions. Word has length 67 [2019-12-07 12:15:28,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:15:28,082 INFO L462 AbstractCegarLoop]: Abstraction has 14834 states and 44130 transitions. [2019-12-07 12:15:28,082 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 12:15:28,082 INFO L276 IsEmpty]: Start isEmpty. Operand 14834 states and 44130 transitions. [2019-12-07 12:15:28,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:15:28,092 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:15:28,092 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:15:28,092 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:15:28,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:15:28,093 INFO L82 PathProgramCache]: Analyzing trace with hash -778064925, now seen corresponding path program 5 times [2019-12-07 12:15:28,093 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:15:28,093 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [143854126] [2019-12-07 12:15:28,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:15:28,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:15:28,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:15:28,172 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:15:28,173 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 12:15:28,175 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= v_~z$r_buff0_thd0~0_144 0) (= v_~z$r_buff0_thd1~0_230 0) (= v_~z$w_buff0_used~0_947 0) (= v_~z$r_buff1_thd1~0_185 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= v_~z$w_buff1_used~0_563 0) (= v_~weak$$choice2~0_147 0) (= 0 v_~z$r_buff1_thd3~0_352) (= 0 v_~x~0_159) (< 0 |v_#StackHeapBarrier_17|) (= v_~z$read_delayed~0_6 0) (= v_~z$mem_tmp~0_24 0) (= |v_#valid_80| (store .cse0 |v_ULTIMATE.start_main_~#t1489~0.base_44| 1)) (= v_~z$r_buff0_thd2~0_126 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1489~0.base_44| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1489~0.base_44|) |v_ULTIMATE.start_main_~#t1489~0.offset_28| 0)) |v_#memory_int_19|) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_cnt~0_155 0) (= |v_ULTIMATE.start_main_~#t1489~0.offset_28| 0) (= v_~z$r_buff1_thd2~0_201 0) (= 0 v_~z$r_buff0_thd3~0_371) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1489~0.base_44|)) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1489~0.base_44|) (= v_~main$tmp_guard1~0_38 0) (= v_~z$r_buff1_thd0~0_199 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1489~0.base_44| 4) |v_#length_21|) (= 0 |v_#NULL.base_7|) (= 0 v_~weak$$choice0~0_19) (= v_~z$w_buff1~0_328 0) (= v_~z~0_152 0) (= v_~z$w_buff0~0_540 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$flush_delayed~0_35) (= v_~y~0_49 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1490~0.base=|v_ULTIMATE.start_main_~#t1490~0.base_44|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_201, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_59|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_328, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_37|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_99|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_75|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_199, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ~y~0=v_~y~0_49, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_126, ULTIMATE.start_main_~#t1491~0.base=|v_ULTIMATE.start_main_~#t1491~0.base_25|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_~#t1489~0.base=|v_ULTIMATE.start_main_~#t1489~0.base_44|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_947, ~z$w_buff0~0=v_~z$w_buff0~0_540, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_352, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_563, ULTIMATE.start_main_~#t1491~0.offset=|v_ULTIMATE.start_main_~#t1491~0.offset_18|, ~z$flush_delayed~0=v_~z$flush_delayed~0_35, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_~#t1489~0.offset=|v_ULTIMATE.start_main_~#t1489~0.offset_28|, #NULL.base=|v_#NULL.base_7|, ~weak$$choice0~0=v_~weak$$choice0~0_19, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, #valid=|v_#valid_80|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_185, #memory_int=|v_#memory_int_19|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_371, ULTIMATE.start_main_~#t1490~0.offset=|v_ULTIMATE.start_main_~#t1490~0.offset_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~z~0=v_~z~0_152, ~weak$$choice2~0=v_~weak$$choice2~0_147, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_230, ~x~0=v_~x~0_159} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1490~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, ~z$w_buff1~0, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1491~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_~#t1489~0.base, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ULTIMATE.start_main_~#t1491~0.offset, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1489~0.offset, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#res, #valid, ~z$r_buff1_thd1~0, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t1490~0.offset, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 12:15:28,176 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] L818-1-->L820: Formula: (and (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1490~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1490~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1490~0.base_13|) |v_ULTIMATE.start_main_~#t1490~0.offset_11| 1)) |v_#memory_int_13|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1490~0.base_13| 4) |v_#length_15|) (not (= |v_ULTIMATE.start_main_~#t1490~0.base_13| 0)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1490~0.base_13|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1490~0.base_13| 1) |v_#valid_36|) (= 0 |v_ULTIMATE.start_main_~#t1490~0.offset_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1490~0.base=|v_ULTIMATE.start_main_~#t1490~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1490~0.offset=|v_ULTIMATE.start_main_~#t1490~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1490~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1490~0.offset, #length] because there is no mapped edge [2019-12-07 12:15:28,176 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L820-1-->L822: Formula: (and (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1491~0.base_13|)) (not (= 0 |v_ULTIMATE.start_main_~#t1491~0.base_13|)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1491~0.base_13| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1491~0.base_13| 4)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1491~0.base_13|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1491~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1491~0.base_13|) |v_ULTIMATE.start_main_~#t1491~0.offset_11| 2)) |v_#memory_int_15|) (= 0 |v_ULTIMATE.start_main_~#t1491~0.offset_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1491~0.offset=|v_ULTIMATE.start_main_~#t1491~0.offset_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1491~0.base=|v_ULTIMATE.start_main_~#t1491~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1491~0.offset, #length, ULTIMATE.start_main_~#t1491~0.base] because there is no mapped edge [2019-12-07 12:15:28,176 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] P0ENTRY-->L4-3: Formula: (and (= v_P0Thread1of1ForFork0_~arg.offset_12 |v_P0Thread1of1ForFork0_#in~arg.offset_14|) (= v_~z$w_buff0_used~0_163 v_~z$w_buff1_used~0_112) (= (ite (not (and (not (= (mod v_~z$w_buff1_used~0_112 256) 0)) (not (= (mod v_~z$w_buff0_used~0_162 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (= v_~z$w_buff0~0_38 v_~z$w_buff1~0_37) (= v_~z$w_buff0_used~0_162 1) (= 1 v_~z$w_buff0~0_37) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 0)) (= v_P0Thread1of1ForFork0_~arg.base_12 |v_P0Thread1of1ForFork0_#in~arg.base_14|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_163, ~z$w_buff0~0=v_~z$w_buff0~0_38, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_162, ~z$w_buff0~0=v_~z$w_buff0~0_37, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_112, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|, ~z$w_buff1~0=v_~z$w_buff1~0_37, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_12, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_12} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 12:15:28,178 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L784-->L784-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In67924890 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In67924890 256)))) (or (and .cse0 (= (mod ~z$w_buff1_used~0_In67924890 256) 0)) (and .cse0 (= 0 (mod ~z$r_buff1_thd3~0_In67924890 256))) (= 0 (mod ~z$w_buff0_used~0_In67924890 256)))) .cse1 (= ~z$w_buff0~0_In67924890 |P2Thread1of1ForFork2_#t~ite20_Out67924890|) (= |P2Thread1of1ForFork2_#t~ite21_Out67924890| |P2Thread1of1ForFork2_#t~ite20_Out67924890|)) (and (= ~z$w_buff0~0_In67924890 |P2Thread1of1ForFork2_#t~ite21_Out67924890|) (= |P2Thread1of1ForFork2_#t~ite20_In67924890| |P2Thread1of1ForFork2_#t~ite20_Out67924890|) (not .cse1)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In67924890, ~z$w_buff0_used~0=~z$w_buff0_used~0_In67924890, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_In67924890|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In67924890, ~z$w_buff1_used~0=~z$w_buff1_used~0_In67924890, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In67924890, ~weak$$choice2~0=~weak$$choice2~0_In67924890} OutVars{~z$w_buff0~0=~z$w_buff0~0_In67924890, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out67924890|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In67924890, P2Thread1of1ForFork2_#t~ite21=|P2Thread1of1ForFork2_#t~ite21_Out67924890|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In67924890, ~z$w_buff1_used~0=~z$w_buff1_used~0_In67924890, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In67924890, ~weak$$choice2~0=~weak$$choice2~0_In67924890} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 12:15:28,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L762-2-->L762-5: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In2131824416 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In2131824416 256))) (.cse0 (= |P1Thread1of1ForFork1_#t~ite10_Out2131824416| |P1Thread1of1ForFork1_#t~ite9_Out2131824416|))) (or (and .cse0 (not .cse1) (= ~z$w_buff1~0_In2131824416 |P1Thread1of1ForFork1_#t~ite9_Out2131824416|) (not .cse2)) (and (or .cse1 .cse2) (= ~z~0_In2131824416 |P1Thread1of1ForFork1_#t~ite9_Out2131824416|) .cse0))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2131824416, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2131824416, ~z$w_buff1~0=~z$w_buff1~0_In2131824416, ~z~0=~z~0_In2131824416} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out2131824416|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2131824416, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2131824416, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out2131824416|, ~z$w_buff1~0=~z$w_buff1~0_In2131824416, ~z~0=~z~0_In2131824416} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 12:15:28,181 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L743-->L743-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In763329607 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In763329607 256)))) (or (and (= ~z$w_buff0_used~0_In763329607 |P0Thread1of1ForFork0_#t~ite5_Out763329607|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out763329607|) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In763329607, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In763329607} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out763329607|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In763329607, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In763329607} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 12:15:28,181 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L744-->L744-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-827579122 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In-827579122 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-827579122 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-827579122 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-827579122 |P0Thread1of1ForFork0_#t~ite6_Out-827579122|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-827579122|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-827579122, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-827579122, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-827579122, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-827579122} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-827579122|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-827579122, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-827579122, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-827579122, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-827579122} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 12:15:28,181 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L745-->L746: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In2142096195 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In2142096195 256))) (.cse2 (= ~z$r_buff0_thd1~0_Out2142096195 ~z$r_buff0_thd1~0_In2142096195))) (or (and (= ~z$r_buff0_thd1~0_Out2142096195 0) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2142096195, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2142096195} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2142096195, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out2142096195|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out2142096195} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:15:28,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L763-->L763-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1848025657 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-1848025657 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-1848025657|) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out-1848025657| ~z$w_buff0_used~0_In-1848025657)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1848025657, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1848025657} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1848025657, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1848025657|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1848025657} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 12:15:28,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L764-->L764-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In-1951893192 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1951893192 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1951893192 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1951893192 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite12_Out-1951893192| ~z$w_buff1_used~0_In-1951893192)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out-1951893192| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1951893192, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1951893192, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1951893192, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1951893192} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1951893192, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1951893192, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1951893192, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1951893192|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1951893192} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 12:15:28,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L765-->L765-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1369783460 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1369783460 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out-1369783460|)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In-1369783460 |P1Thread1of1ForFork1_#t~ite13_Out-1369783460|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1369783460, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1369783460} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1369783460, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1369783460|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1369783460} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 12:15:28,183 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L766-->L766-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In567262391 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In567262391 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In567262391 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In567262391 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out567262391| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite14_Out567262391| ~z$r_buff1_thd2~0_In567262391)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In567262391, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In567262391, ~z$w_buff1_used~0=~z$w_buff1_used~0_In567262391, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In567262391} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In567262391, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In567262391, ~z$w_buff1_used~0=~z$w_buff1_used~0_In567262391, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out567262391|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In567262391} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 12:15:28,183 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [854] [854] L766-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~z$r_buff1_thd2~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_92, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:15:28,183 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L788-->L789: Formula: (and (= v_~z$r_buff0_thd3~0_137 v_~z$r_buff0_thd3~0_136) (not (= (mod v_~weak$$choice2~0_34 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_137, ~weak$$choice2~0=v_~weak$$choice2~0_34} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_10|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_34} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 12:15:28,184 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L789-->L789-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1108244542 256) 0))) (or (and (= ~z$r_buff1_thd3~0_In1108244542 |P2Thread1of1ForFork2_#t~ite36_Out1108244542|) (= |P2Thread1of1ForFork2_#t~ite35_In1108244542| |P2Thread1of1ForFork2_#t~ite35_Out1108244542|) (not .cse0)) (and (= |P2Thread1of1ForFork2_#t~ite35_Out1108244542| |P2Thread1of1ForFork2_#t~ite36_Out1108244542|) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1108244542 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In1108244542 256)) (and (= (mod ~z$w_buff1_used~0_In1108244542 256) 0) .cse1) (and (= 0 (mod ~z$r_buff1_thd3~0_In1108244542 256)) .cse1))) .cse0 (= |P2Thread1of1ForFork2_#t~ite35_Out1108244542| ~z$r_buff1_thd3~0_In1108244542)))) InVars {P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_In1108244542|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1108244542, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1108244542, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1108244542, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1108244542, ~weak$$choice2~0=~weak$$choice2~0_In1108244542} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out1108244542|, P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out1108244542|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1108244542, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1108244542, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1108244542, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1108244542, ~weak$$choice2~0=~weak$$choice2~0_In1108244542} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35, P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 12:15:28,184 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L791-->L795: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= v_~z~0_62 v_~z$mem_tmp~0_7) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_7, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_62} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 12:15:28,184 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L795-2-->L795-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork2_#t~ite38_Out1774099192| |P2Thread1of1ForFork2_#t~ite39_Out1774099192|)) (.cse1 (= (mod ~z$w_buff1_used~0_In1774099192 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In1774099192 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite38_Out1774099192| ~z~0_In1774099192) .cse0 (or .cse1 .cse2)) (and .cse0 (not .cse1) (not .cse2) (= |P2Thread1of1ForFork2_#t~ite38_Out1774099192| ~z$w_buff1~0_In1774099192)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1774099192, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1774099192, ~z$w_buff1~0=~z$w_buff1~0_In1774099192, ~z~0=~z~0_In1774099192} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1774099192, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1774099192, ~z$w_buff1~0=~z$w_buff1~0_In1774099192, ~z~0=~z~0_In1774099192, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1774099192|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1774099192|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 12:15:28,185 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L796-->L796-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-488900930 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-488900930 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite40_Out-488900930| 0) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In-488900930 |P2Thread1of1ForFork2_#t~ite40_Out-488900930|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-488900930, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-488900930} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-488900930, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-488900930, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out-488900930|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 12:15:28,185 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L797-->L797-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1917493162 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-1917493162 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1917493162 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1917493162 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite41_Out-1917493162| ~z$w_buff1_used~0_In-1917493162) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork2_#t~ite41_Out-1917493162| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1917493162, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1917493162, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1917493162, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1917493162} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out-1917493162|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1917493162, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1917493162, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1917493162, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1917493162} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 12:15:28,185 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-544284739 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-544284739 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite42_Out-544284739| ~z$r_buff0_thd3~0_In-544284739) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite42_Out-544284739| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-544284739, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-544284739} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-544284739|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-544284739, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-544284739} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 12:15:28,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L799-->L799-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In-1299214993 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In-1299214993 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1299214993 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1299214993 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In-1299214993 |P2Thread1of1ForFork2_#t~ite43_Out-1299214993|)) (and (= 0 |P2Thread1of1ForFork2_#t~ite43_Out-1299214993|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1299214993, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1299214993, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1299214993, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1299214993} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1299214993, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1299214993, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-1299214993|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1299214993, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1299214993} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 12:15:28,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~z$r_buff1_thd3~0_167 |v_P2Thread1of1ForFork2_#t~ite43_38|)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_167, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_37|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 12:15:28,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L746-->L746-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1199486915 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1199486915 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1199486915 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In-1199486915 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-1199486915| ~z$r_buff1_thd1~0_In-1199486915)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1199486915| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1199486915, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1199486915, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1199486915, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1199486915} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1199486915, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1199486915|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1199486915, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1199486915, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1199486915} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 12:15:28,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L746-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_159 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_159, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 12:15:28,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L822-1-->L828: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:15:28,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L828-2-->L828-5: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In540598802 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In540598802 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out540598802| |ULTIMATE.start_main_#t~ite47_Out540598802|))) (or (and (or .cse0 .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out540598802| ~z~0_In540598802)) (and (not .cse1) (not .cse0) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out540598802| ~z$w_buff1~0_In540598802)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In540598802, ~z$w_buff1_used~0=~z$w_buff1_used~0_In540598802, ~z$w_buff1~0=~z$w_buff1~0_In540598802, ~z~0=~z~0_In540598802} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In540598802, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out540598802|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In540598802, ~z$w_buff1~0=~z$w_buff1~0_In540598802, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out540598802|, ~z~0=~z~0_In540598802} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:15:28,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L829-->L829-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1248400102 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1248400102 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1248400102|) (not .cse1)) (and (= ~z$w_buff0_used~0_In-1248400102 |ULTIMATE.start_main_#t~ite49_Out-1248400102|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1248400102, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1248400102} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1248400102, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1248400102, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1248400102|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:15:28,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L830-->L830-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd0~0_In-1246953497 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1246953497 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-1246953497 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In-1246953497 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-1246953497 |ULTIMATE.start_main_#t~ite50_Out-1246953497|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out-1246953497|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1246953497, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1246953497, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1246953497, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1246953497} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1246953497|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1246953497, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1246953497, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1246953497, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1246953497} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:15:28,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L831-->L831-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1396257745 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In1396257745 256) 0))) (or (and (= ~z$r_buff0_thd0~0_In1396257745 |ULTIMATE.start_main_#t~ite51_Out1396257745|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out1396257745|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1396257745, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1396257745} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1396257745, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1396257745|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1396257745} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:15:28,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L832-->L832-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd0~0_In-42035516 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-42035516 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-42035516 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd0~0_In-42035516 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out-42035516| 0)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-42035516| ~z$r_buff1_thd0~0_In-42035516) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-42035516, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-42035516, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-42035516, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-42035516} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-42035516|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-42035516, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-42035516, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-42035516, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-42035516} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:15:28,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 2 v_~x~0_130) (= 0 v_~__unbuffered_p2_EAX~0_21) (= v_~y~0_23 2))) 1 0)) 0 1)) (= v_~z$r_buff1_thd0~0_167 |v_ULTIMATE.start_main_#t~ite52_35|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:15:28,242 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:15:28 BasicIcfg [2019-12-07 12:15:28,242 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 12:15:28,243 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:15:28,243 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:15:28,243 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:15:28,243 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:13:53" (3/4) ... [2019-12-07 12:15:28,245 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 12:15:28,245 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= v_~z$r_buff0_thd0~0_144 0) (= v_~z$r_buff0_thd1~0_230 0) (= v_~z$w_buff0_used~0_947 0) (= v_~z$r_buff1_thd1~0_185 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= v_~z$w_buff1_used~0_563 0) (= v_~weak$$choice2~0_147 0) (= 0 v_~z$r_buff1_thd3~0_352) (= 0 v_~x~0_159) (< 0 |v_#StackHeapBarrier_17|) (= v_~z$read_delayed~0_6 0) (= v_~z$mem_tmp~0_24 0) (= |v_#valid_80| (store .cse0 |v_ULTIMATE.start_main_~#t1489~0.base_44| 1)) (= v_~z$r_buff0_thd2~0_126 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1489~0.base_44| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1489~0.base_44|) |v_ULTIMATE.start_main_~#t1489~0.offset_28| 0)) |v_#memory_int_19|) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_cnt~0_155 0) (= |v_ULTIMATE.start_main_~#t1489~0.offset_28| 0) (= v_~z$r_buff1_thd2~0_201 0) (= 0 v_~z$r_buff0_thd3~0_371) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1489~0.base_44|)) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1489~0.base_44|) (= v_~main$tmp_guard1~0_38 0) (= v_~z$r_buff1_thd0~0_199 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1489~0.base_44| 4) |v_#length_21|) (= 0 |v_#NULL.base_7|) (= 0 v_~weak$$choice0~0_19) (= v_~z$w_buff1~0_328 0) (= v_~z~0_152 0) (= v_~z$w_buff0~0_540 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$flush_delayed~0_35) (= v_~y~0_49 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1490~0.base=|v_ULTIMATE.start_main_~#t1490~0.base_44|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_201, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_59|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_328, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_37|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_99|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_75|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_199, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ~y~0=v_~y~0_49, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_126, ULTIMATE.start_main_~#t1491~0.base=|v_ULTIMATE.start_main_~#t1491~0.base_25|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_~#t1489~0.base=|v_ULTIMATE.start_main_~#t1489~0.base_44|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_947, ~z$w_buff0~0=v_~z$w_buff0~0_540, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_352, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_563, ULTIMATE.start_main_~#t1491~0.offset=|v_ULTIMATE.start_main_~#t1491~0.offset_18|, ~z$flush_delayed~0=v_~z$flush_delayed~0_35, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_~#t1489~0.offset=|v_ULTIMATE.start_main_~#t1489~0.offset_28|, #NULL.base=|v_#NULL.base_7|, ~weak$$choice0~0=v_~weak$$choice0~0_19, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, #valid=|v_#valid_80|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_185, #memory_int=|v_#memory_int_19|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_371, ULTIMATE.start_main_~#t1490~0.offset=|v_ULTIMATE.start_main_~#t1490~0.offset_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~z~0=v_~z~0_152, ~weak$$choice2~0=v_~weak$$choice2~0_147, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_230, ~x~0=v_~x~0_159} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1490~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, ~z$w_buff1~0, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1491~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_~#t1489~0.base, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ULTIMATE.start_main_~#t1491~0.offset, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1489~0.offset, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#res, #valid, ~z$r_buff1_thd1~0, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t1490~0.offset, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 12:15:28,245 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] L818-1-->L820: Formula: (and (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1490~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1490~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1490~0.base_13|) |v_ULTIMATE.start_main_~#t1490~0.offset_11| 1)) |v_#memory_int_13|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1490~0.base_13| 4) |v_#length_15|) (not (= |v_ULTIMATE.start_main_~#t1490~0.base_13| 0)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1490~0.base_13|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1490~0.base_13| 1) |v_#valid_36|) (= 0 |v_ULTIMATE.start_main_~#t1490~0.offset_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1490~0.base=|v_ULTIMATE.start_main_~#t1490~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1490~0.offset=|v_ULTIMATE.start_main_~#t1490~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1490~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1490~0.offset, #length] because there is no mapped edge [2019-12-07 12:15:28,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L820-1-->L822: Formula: (and (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1491~0.base_13|)) (not (= 0 |v_ULTIMATE.start_main_~#t1491~0.base_13|)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1491~0.base_13| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1491~0.base_13| 4)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1491~0.base_13|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1491~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1491~0.base_13|) |v_ULTIMATE.start_main_~#t1491~0.offset_11| 2)) |v_#memory_int_15|) (= 0 |v_ULTIMATE.start_main_~#t1491~0.offset_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1491~0.offset=|v_ULTIMATE.start_main_~#t1491~0.offset_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1491~0.base=|v_ULTIMATE.start_main_~#t1491~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1491~0.offset, #length, ULTIMATE.start_main_~#t1491~0.base] because there is no mapped edge [2019-12-07 12:15:28,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] P0ENTRY-->L4-3: Formula: (and (= v_P0Thread1of1ForFork0_~arg.offset_12 |v_P0Thread1of1ForFork0_#in~arg.offset_14|) (= v_~z$w_buff0_used~0_163 v_~z$w_buff1_used~0_112) (= (ite (not (and (not (= (mod v_~z$w_buff1_used~0_112 256) 0)) (not (= (mod v_~z$w_buff0_used~0_162 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (= v_~z$w_buff0~0_38 v_~z$w_buff1~0_37) (= v_~z$w_buff0_used~0_162 1) (= 1 v_~z$w_buff0~0_37) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 0)) (= v_P0Thread1of1ForFork0_~arg.base_12 |v_P0Thread1of1ForFork0_#in~arg.base_14|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_163, ~z$w_buff0~0=v_~z$w_buff0~0_38, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_162, ~z$w_buff0~0=v_~z$w_buff0~0_37, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_112, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|, ~z$w_buff1~0=v_~z$w_buff1~0_37, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_12, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_12} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 12:15:28,248 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L784-->L784-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In67924890 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In67924890 256)))) (or (and .cse0 (= (mod ~z$w_buff1_used~0_In67924890 256) 0)) (and .cse0 (= 0 (mod ~z$r_buff1_thd3~0_In67924890 256))) (= 0 (mod ~z$w_buff0_used~0_In67924890 256)))) .cse1 (= ~z$w_buff0~0_In67924890 |P2Thread1of1ForFork2_#t~ite20_Out67924890|) (= |P2Thread1of1ForFork2_#t~ite21_Out67924890| |P2Thread1of1ForFork2_#t~ite20_Out67924890|)) (and (= ~z$w_buff0~0_In67924890 |P2Thread1of1ForFork2_#t~ite21_Out67924890|) (= |P2Thread1of1ForFork2_#t~ite20_In67924890| |P2Thread1of1ForFork2_#t~ite20_Out67924890|) (not .cse1)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In67924890, ~z$w_buff0_used~0=~z$w_buff0_used~0_In67924890, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_In67924890|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In67924890, ~z$w_buff1_used~0=~z$w_buff1_used~0_In67924890, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In67924890, ~weak$$choice2~0=~weak$$choice2~0_In67924890} OutVars{~z$w_buff0~0=~z$w_buff0~0_In67924890, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out67924890|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In67924890, P2Thread1of1ForFork2_#t~ite21=|P2Thread1of1ForFork2_#t~ite21_Out67924890|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In67924890, ~z$w_buff1_used~0=~z$w_buff1_used~0_In67924890, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In67924890, ~weak$$choice2~0=~weak$$choice2~0_In67924890} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 12:15:28,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L762-2-->L762-5: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In2131824416 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In2131824416 256))) (.cse0 (= |P1Thread1of1ForFork1_#t~ite10_Out2131824416| |P1Thread1of1ForFork1_#t~ite9_Out2131824416|))) (or (and .cse0 (not .cse1) (= ~z$w_buff1~0_In2131824416 |P1Thread1of1ForFork1_#t~ite9_Out2131824416|) (not .cse2)) (and (or .cse1 .cse2) (= ~z~0_In2131824416 |P1Thread1of1ForFork1_#t~ite9_Out2131824416|) .cse0))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2131824416, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2131824416, ~z$w_buff1~0=~z$w_buff1~0_In2131824416, ~z~0=~z~0_In2131824416} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out2131824416|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2131824416, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2131824416, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out2131824416|, ~z$w_buff1~0=~z$w_buff1~0_In2131824416, ~z~0=~z~0_In2131824416} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 12:15:28,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L743-->L743-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In763329607 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In763329607 256)))) (or (and (= ~z$w_buff0_used~0_In763329607 |P0Thread1of1ForFork0_#t~ite5_Out763329607|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out763329607|) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In763329607, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In763329607} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out763329607|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In763329607, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In763329607} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 12:15:28,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L744-->L744-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-827579122 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In-827579122 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-827579122 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-827579122 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-827579122 |P0Thread1of1ForFork0_#t~ite6_Out-827579122|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-827579122|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-827579122, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-827579122, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-827579122, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-827579122} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-827579122|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-827579122, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-827579122, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-827579122, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-827579122} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 12:15:28,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L745-->L746: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In2142096195 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In2142096195 256))) (.cse2 (= ~z$r_buff0_thd1~0_Out2142096195 ~z$r_buff0_thd1~0_In2142096195))) (or (and (= ~z$r_buff0_thd1~0_Out2142096195 0) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2142096195, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2142096195} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2142096195, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out2142096195|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out2142096195} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:15:28,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L763-->L763-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1848025657 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-1848025657 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-1848025657|) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out-1848025657| ~z$w_buff0_used~0_In-1848025657)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1848025657, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1848025657} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1848025657, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1848025657|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1848025657} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 12:15:28,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L764-->L764-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In-1951893192 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1951893192 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1951893192 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1951893192 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite12_Out-1951893192| ~z$w_buff1_used~0_In-1951893192)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out-1951893192| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1951893192, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1951893192, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1951893192, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1951893192} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1951893192, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1951893192, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1951893192, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1951893192|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1951893192} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 12:15:28,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L765-->L765-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1369783460 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1369783460 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out-1369783460|)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In-1369783460 |P1Thread1of1ForFork1_#t~ite13_Out-1369783460|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1369783460, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1369783460} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1369783460, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1369783460|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1369783460} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 12:15:28,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L766-->L766-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In567262391 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In567262391 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In567262391 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In567262391 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out567262391| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite14_Out567262391| ~z$r_buff1_thd2~0_In567262391)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In567262391, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In567262391, ~z$w_buff1_used~0=~z$w_buff1_used~0_In567262391, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In567262391} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In567262391, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In567262391, ~z$w_buff1_used~0=~z$w_buff1_used~0_In567262391, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out567262391|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In567262391} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 12:15:28,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [854] [854] L766-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~z$r_buff1_thd2~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_92, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:15:28,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L788-->L789: Formula: (and (= v_~z$r_buff0_thd3~0_137 v_~z$r_buff0_thd3~0_136) (not (= (mod v_~weak$$choice2~0_34 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_137, ~weak$$choice2~0=v_~weak$$choice2~0_34} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_10|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_34} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 12:15:28,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L789-->L789-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1108244542 256) 0))) (or (and (= ~z$r_buff1_thd3~0_In1108244542 |P2Thread1of1ForFork2_#t~ite36_Out1108244542|) (= |P2Thread1of1ForFork2_#t~ite35_In1108244542| |P2Thread1of1ForFork2_#t~ite35_Out1108244542|) (not .cse0)) (and (= |P2Thread1of1ForFork2_#t~ite35_Out1108244542| |P2Thread1of1ForFork2_#t~ite36_Out1108244542|) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1108244542 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In1108244542 256)) (and (= (mod ~z$w_buff1_used~0_In1108244542 256) 0) .cse1) (and (= 0 (mod ~z$r_buff1_thd3~0_In1108244542 256)) .cse1))) .cse0 (= |P2Thread1of1ForFork2_#t~ite35_Out1108244542| ~z$r_buff1_thd3~0_In1108244542)))) InVars {P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_In1108244542|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1108244542, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1108244542, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1108244542, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1108244542, ~weak$$choice2~0=~weak$$choice2~0_In1108244542} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out1108244542|, P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out1108244542|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1108244542, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1108244542, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1108244542, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1108244542, ~weak$$choice2~0=~weak$$choice2~0_In1108244542} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35, P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 12:15:28,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L791-->L795: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= v_~z~0_62 v_~z$mem_tmp~0_7) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_7, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_62} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 12:15:28,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L795-2-->L795-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork2_#t~ite38_Out1774099192| |P2Thread1of1ForFork2_#t~ite39_Out1774099192|)) (.cse1 (= (mod ~z$w_buff1_used~0_In1774099192 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In1774099192 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite38_Out1774099192| ~z~0_In1774099192) .cse0 (or .cse1 .cse2)) (and .cse0 (not .cse1) (not .cse2) (= |P2Thread1of1ForFork2_#t~ite38_Out1774099192| ~z$w_buff1~0_In1774099192)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1774099192, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1774099192, ~z$w_buff1~0=~z$w_buff1~0_In1774099192, ~z~0=~z~0_In1774099192} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1774099192, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1774099192, ~z$w_buff1~0=~z$w_buff1~0_In1774099192, ~z~0=~z~0_In1774099192, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1774099192|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1774099192|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 12:15:28,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L796-->L796-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-488900930 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-488900930 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite40_Out-488900930| 0) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In-488900930 |P2Thread1of1ForFork2_#t~ite40_Out-488900930|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-488900930, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-488900930} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-488900930, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-488900930, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out-488900930|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 12:15:28,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L797-->L797-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1917493162 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-1917493162 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1917493162 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1917493162 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite41_Out-1917493162| ~z$w_buff1_used~0_In-1917493162) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork2_#t~ite41_Out-1917493162| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1917493162, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1917493162, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1917493162, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1917493162} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out-1917493162|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1917493162, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1917493162, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1917493162, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1917493162} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 12:15:28,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-544284739 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-544284739 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite42_Out-544284739| ~z$r_buff0_thd3~0_In-544284739) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite42_Out-544284739| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-544284739, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-544284739} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-544284739|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-544284739, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-544284739} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 12:15:28,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L799-->L799-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In-1299214993 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In-1299214993 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1299214993 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1299214993 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In-1299214993 |P2Thread1of1ForFork2_#t~ite43_Out-1299214993|)) (and (= 0 |P2Thread1of1ForFork2_#t~ite43_Out-1299214993|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1299214993, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1299214993, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1299214993, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1299214993} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1299214993, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1299214993, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-1299214993|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1299214993, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1299214993} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 12:15:28,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~z$r_buff1_thd3~0_167 |v_P2Thread1of1ForFork2_#t~ite43_38|)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_167, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_37|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 12:15:28,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L746-->L746-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1199486915 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1199486915 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1199486915 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In-1199486915 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-1199486915| ~z$r_buff1_thd1~0_In-1199486915)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1199486915| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1199486915, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1199486915, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1199486915, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1199486915} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1199486915, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1199486915|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1199486915, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1199486915, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1199486915} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 12:15:28,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L746-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_159 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_159, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 12:15:28,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L822-1-->L828: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:15:28,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L828-2-->L828-5: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In540598802 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In540598802 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out540598802| |ULTIMATE.start_main_#t~ite47_Out540598802|))) (or (and (or .cse0 .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out540598802| ~z~0_In540598802)) (and (not .cse1) (not .cse0) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out540598802| ~z$w_buff1~0_In540598802)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In540598802, ~z$w_buff1_used~0=~z$w_buff1_used~0_In540598802, ~z$w_buff1~0=~z$w_buff1~0_In540598802, ~z~0=~z~0_In540598802} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In540598802, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out540598802|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In540598802, ~z$w_buff1~0=~z$w_buff1~0_In540598802, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out540598802|, ~z~0=~z~0_In540598802} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:15:28,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L829-->L829-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1248400102 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1248400102 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1248400102|) (not .cse1)) (and (= ~z$w_buff0_used~0_In-1248400102 |ULTIMATE.start_main_#t~ite49_Out-1248400102|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1248400102, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1248400102} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1248400102, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1248400102, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1248400102|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:15:28,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L830-->L830-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd0~0_In-1246953497 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1246953497 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-1246953497 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In-1246953497 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-1246953497 |ULTIMATE.start_main_#t~ite50_Out-1246953497|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out-1246953497|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1246953497, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1246953497, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1246953497, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1246953497} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1246953497|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1246953497, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1246953497, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1246953497, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1246953497} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:15:28,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L831-->L831-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1396257745 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In1396257745 256) 0))) (or (and (= ~z$r_buff0_thd0~0_In1396257745 |ULTIMATE.start_main_#t~ite51_Out1396257745|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out1396257745|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1396257745, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1396257745} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1396257745, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1396257745|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1396257745} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:15:28,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L832-->L832-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd0~0_In-42035516 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-42035516 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-42035516 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd0~0_In-42035516 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out-42035516| 0)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-42035516| ~z$r_buff1_thd0~0_In-42035516) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-42035516, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-42035516, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-42035516, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-42035516} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-42035516|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-42035516, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-42035516, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-42035516, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-42035516} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:15:28,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 2 v_~x~0_130) (= 0 v_~__unbuffered_p2_EAX~0_21) (= v_~y~0_23 2))) 1 0)) 0 1)) (= v_~z$r_buff1_thd0~0_167 |v_ULTIMATE.start_main_#t~ite52_35|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:15:28,308 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_af3b844b-5efb-465e-abfc-010e4ad41ef8/bin/uautomizer/witness.graphml [2019-12-07 12:15:28,308 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:15:28,309 INFO L168 Benchmark]: Toolchain (without parser) took 96075.97 ms. Allocated memory was 1.0 GB in the beginning and 7.6 GB in the end (delta: 6.6 GB). Free memory was 942.5 MB in the beginning and 4.9 GB in the end (delta: -3.9 GB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. [2019-12-07 12:15:28,310 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 962.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:15:28,310 INFO L168 Benchmark]: CACSL2BoogieTranslator took 383.17 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.5 MB). Free memory was 942.5 MB in the beginning and 1.1 GB in the end (delta: -122.7 MB). Peak memory consumption was 22.8 MB. Max. memory is 11.5 GB. [2019-12-07 12:15:28,310 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.88 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 11.5 GB. [2019-12-07 12:15:28,310 INFO L168 Benchmark]: Boogie Preprocessor took 26.68 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 11.5 GB. [2019-12-07 12:15:28,311 INFO L168 Benchmark]: RCFGBuilder took 416.83 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 59.8 MB). Peak memory consumption was 59.8 MB. Max. memory is 11.5 GB. [2019-12-07 12:15:28,311 INFO L168 Benchmark]: TraceAbstraction took 95141.25 ms. Allocated memory was 1.1 GB in the beginning and 7.6 GB in the end (delta: 6.5 GB). Free memory was 998.9 MB in the beginning and 4.9 GB in the end (delta: -3.9 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. [2019-12-07 12:15:28,311 INFO L168 Benchmark]: Witness Printer took 66.02 ms. Allocated memory is still 7.6 GB. Free memory was 4.9 GB in the beginning and 4.9 GB in the end (delta: 42.7 MB). Peak memory consumption was 42.7 MB. Max. memory is 11.5 GB. [2019-12-07 12:15:28,313 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 962.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 383.17 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.5 MB). Free memory was 942.5 MB in the beginning and 1.1 GB in the end (delta: -122.7 MB). Peak memory consumption was 22.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.88 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.68 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 11.5 GB. * RCFGBuilder took 416.83 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 59.8 MB). Peak memory consumption was 59.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 95141.25 ms. Allocated memory was 1.1 GB in the beginning and 7.6 GB in the end (delta: 6.5 GB). Free memory was 998.9 MB in the beginning and 4.9 GB in the end (delta: -3.9 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. * Witness Printer took 66.02 ms. Allocated memory is still 7.6 GB. Free memory was 4.9 GB in the beginning and 4.9 GB in the end (delta: 42.7 MB). Peak memory consumption was 42.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 174 ProgramPointsBefore, 92 ProgramPointsAfterwards, 211 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 31 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 31 ChoiceCompositions, 6843 VarBasedMoverChecksPositive, 273 VarBasedMoverChecksNegative, 91 SemBasedMoverChecksPositive, 240 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 77200 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L818] FCALL, FORK 0 pthread_create(&t1489, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L820] FCALL, FORK 0 pthread_create(&t1490, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L822] FCALL, FORK 0 pthread_create(&t1491, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L732] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L733] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L734] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L735] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L736] 1 z$r_buff0_thd1 = (_Bool)1 [L739] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L756] 2 x = 2 [L759] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L776] 3 y = 2 [L779] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L780] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L781] 3 z$flush_delayed = weak$$choice2 [L782] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L783] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L783] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L784] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L785] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L786] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L786] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L762] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L743] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L744] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L762] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L763] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L764] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L765] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L787] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L789] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L790] 3 __unbuffered_p2_EAX = z VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L796] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L797] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L798] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L828] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L828] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L829] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L830] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L831] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 165 locations, 2 error locations. Result: UNSAFE, OverallTime: 94.9s, OverallIterations: 29, TraceHistogramMax: 1, AutomataDifference: 21.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6600 SDtfs, 7322 SDslu, 20850 SDs, 0 SdLazy, 8029 SolverSat, 241 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 296 GetRequests, 49 SyntacticMatches, 13 SemanticMatches, 234 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1780 ImplicationChecksByTransitivity, 1.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=195815occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 56.8s AutomataMinimizationTime, 28 MinimizatonAttempts, 338374 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 1077 NumberOfCodeBlocks, 1077 NumberOfCodeBlocksAsserted, 29 NumberOfCheckSat, 982 ConstructedInterpolants, 0 QuantifiedInterpolants, 160582 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 28 InterpolantComputations, 28 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...