./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix056_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_e0da10b9-16a7-4ef6-9891-0c2efaa0e9b4/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_e0da10b9-16a7-4ef6-9891-0c2efaa0e9b4/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_e0da10b9-16a7-4ef6-9891-0c2efaa0e9b4/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_e0da10b9-16a7-4ef6-9891-0c2efaa0e9b4/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix056_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_e0da10b9-16a7-4ef6-9891-0c2efaa0e9b4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_e0da10b9-16a7-4ef6-9891-0c2efaa0e9b4/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5b676ce6437ac80c313d6dd94676f0b49566a5c0 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:46:51,107 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:46:51,108 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:46:51,117 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:46:51,117 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:46:51,117 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:46:51,119 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:46:51,120 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:46:51,122 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:46:51,122 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:46:51,123 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:46:51,124 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:46:51,124 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:46:51,125 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:46:51,125 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:46:51,126 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:46:51,127 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:46:51,127 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:46:51,129 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:46:51,130 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:46:51,131 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:46:51,132 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:46:51,132 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:46:51,133 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:46:51,135 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:46:51,135 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:46:51,135 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:46:51,135 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:46:51,136 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:46:51,136 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:46:51,136 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:46:51,137 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:46:51,137 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:46:51,137 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:46:51,138 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:46:51,138 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:46:51,139 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:46:51,139 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:46:51,139 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:46:51,139 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:46:51,140 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:46:51,140 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_e0da10b9-16a7-4ef6-9891-0c2efaa0e9b4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:46:51,151 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:46:51,151 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:46:51,152 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:46:51,153 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:46:51,153 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:46:51,153 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:46:51,153 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:46:51,154 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:46:51,154 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:46:51,154 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:46:51,154 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:46:51,154 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:46:51,154 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:46:51,155 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:46:51,155 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:46:51,155 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:46:51,155 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:46:51,156 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:46:51,156 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:46:51,156 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:46:51,156 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:46:51,156 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:46:51,157 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:46:51,157 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:46:51,157 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:46:51,157 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:46:51,157 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:46:51,158 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:46:51,158 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:46:51,158 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_e0da10b9-16a7-4ef6-9891-0c2efaa0e9b4/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5b676ce6437ac80c313d6dd94676f0b49566a5c0 [2019-12-07 17:46:51,266 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:46:51,276 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:46:51,279 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:46:51,280 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:46:51,280 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:46:51,281 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_e0da10b9-16a7-4ef6-9891-0c2efaa0e9b4/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix056_pso.oepc.i [2019-12-07 17:46:51,318 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e0da10b9-16a7-4ef6-9891-0c2efaa0e9b4/bin/uautomizer/data/2afb340af/63818c20e8164c74b129c5ef216f103b/FLAG8d510dc4a [2019-12-07 17:46:51,766 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:46:51,766 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_e0da10b9-16a7-4ef6-9891-0c2efaa0e9b4/sv-benchmarks/c/pthread-wmm/mix056_pso.oepc.i [2019-12-07 17:46:51,776 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e0da10b9-16a7-4ef6-9891-0c2efaa0e9b4/bin/uautomizer/data/2afb340af/63818c20e8164c74b129c5ef216f103b/FLAG8d510dc4a [2019-12-07 17:46:51,785 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_e0da10b9-16a7-4ef6-9891-0c2efaa0e9b4/bin/uautomizer/data/2afb340af/63818c20e8164c74b129c5ef216f103b [2019-12-07 17:46:51,787 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:46:51,788 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:46:51,789 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:46:51,789 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:46:51,791 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:46:51,791 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:46:51" (1/1) ... [2019-12-07 17:46:51,793 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3482028c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:46:51, skipping insertion in model container [2019-12-07 17:46:51,793 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:46:51" (1/1) ... [2019-12-07 17:46:51,798 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:46:51,826 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:46:52,078 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:46:52,087 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:46:52,142 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:46:52,202 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:46:52,202 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:46:52 WrapperNode [2019-12-07 17:46:52,202 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:46:52,203 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:46:52,203 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:46:52,203 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:46:52,213 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:46:52" (1/1) ... [2019-12-07 17:46:52,232 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:46:52" (1/1) ... [2019-12-07 17:46:52,256 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:46:52,257 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:46:52,257 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:46:52,257 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:46:52,266 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:46:52" (1/1) ... [2019-12-07 17:46:52,266 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:46:52" (1/1) ... [2019-12-07 17:46:52,270 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:46:52" (1/1) ... [2019-12-07 17:46:52,270 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:46:52" (1/1) ... [2019-12-07 17:46:52,280 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:46:52" (1/1) ... [2019-12-07 17:46:52,283 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:46:52" (1/1) ... [2019-12-07 17:46:52,286 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:46:52" (1/1) ... [2019-12-07 17:46:52,291 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:46:52,292 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:46:52,292 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:46:52,292 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:46:52,293 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:46:52" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_e0da10b9-16a7-4ef6-9891-0c2efaa0e9b4/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:46:52,347 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:46:52,347 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:46:52,347 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:46:52,347 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:46:52,347 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:46:52,347 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:46:52,347 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:46:52,348 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:46:52,348 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:46:52,348 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:46:52,348 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:46:52,348 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:46:52,348 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:46:52,350 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:46:52,714 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:46:52,714 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:46:52,715 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:46:52 BoogieIcfgContainer [2019-12-07 17:46:52,716 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:46:52,716 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:46:52,716 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:46:52,719 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:46:52,719 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:46:51" (1/3) ... [2019-12-07 17:46:52,720 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@932d8d5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:46:52, skipping insertion in model container [2019-12-07 17:46:52,720 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:46:52" (2/3) ... [2019-12-07 17:46:52,720 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@932d8d5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:46:52, skipping insertion in model container [2019-12-07 17:46:52,720 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:46:52" (3/3) ... [2019-12-07 17:46:52,722 INFO L109 eAbstractionObserver]: Analyzing ICFG mix056_pso.oepc.i [2019-12-07 17:46:52,730 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:46:52,730 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:46:52,735 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:46:52,736 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:46:52,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,762 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,762 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,762 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,762 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,762 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,763 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,763 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,763 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,763 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,763 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,764 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,764 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,764 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,764 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,764 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,765 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,765 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,765 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,765 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,765 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,765 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,766 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,766 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,766 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,766 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,766 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,766 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,767 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,767 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,767 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,767 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,768 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,768 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,768 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,768 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,768 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,769 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,769 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,769 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,769 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,769 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,770 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,770 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,770 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,770 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,770 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,770 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,771 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,771 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,771 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,771 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,771 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,772 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,772 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,772 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,772 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,772 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,772 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,773 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,773 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,773 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,774 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,775 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,793 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:46:52,807 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:46:52,820 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:46:52,820 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:46:52,821 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:46:52,821 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:46:52,821 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:46:52,821 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:46:52,821 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:46:52,821 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:46:52,832 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 174 places, 211 transitions [2019-12-07 17:46:52,833 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 17:46:52,899 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 17:46:52,899 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:46:52,909 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 705 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:46:52,925 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 17:46:52,954 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 17:46:52,954 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:46:52,959 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 705 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:46:52,976 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 17:46:52,976 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:46:55,940 WARN L192 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 40 [2019-12-07 17:46:56,107 WARN L192 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 17:46:56,188 INFO L206 etLargeBlockEncoding]: Checked pairs total: 77200 [2019-12-07 17:46:56,188 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-12-07 17:46:56,190 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 102 transitions [2019-12-07 17:47:07,452 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 102314 states. [2019-12-07 17:47:07,453 INFO L276 IsEmpty]: Start isEmpty. Operand 102314 states. [2019-12-07 17:47:07,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 17:47:07,457 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:07,457 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 17:47:07,458 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:07,461 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:07,461 INFO L82 PathProgramCache]: Analyzing trace with hash 909908, now seen corresponding path program 1 times [2019-12-07 17:47:07,467 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:07,467 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456373552] [2019-12-07 17:47:07,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:07,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:07,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:07,595 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1456373552] [2019-12-07 17:47:07,595 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:07,595 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:47:07,596 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [620045363] [2019-12-07 17:47:07,599 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:47:07,599 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:07,608 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:47:07,608 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:07,609 INFO L87 Difference]: Start difference. First operand 102314 states. Second operand 3 states. [2019-12-07 17:47:08,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:08,274 INFO L93 Difference]: Finished difference Result 101472 states and 432734 transitions. [2019-12-07 17:47:08,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:47:08,276 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 17:47:08,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:08,673 INFO L225 Difference]: With dead ends: 101472 [2019-12-07 17:47:08,674 INFO L226 Difference]: Without dead ends: 95232 [2019-12-07 17:47:08,674 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:12,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95232 states. [2019-12-07 17:47:13,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95232 to 95232. [2019-12-07 17:47:13,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95232 states. [2019-12-07 17:47:14,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95232 states to 95232 states and 405538 transitions. [2019-12-07 17:47:14,105 INFO L78 Accepts]: Start accepts. Automaton has 95232 states and 405538 transitions. Word has length 3 [2019-12-07 17:47:14,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:14,106 INFO L462 AbstractCegarLoop]: Abstraction has 95232 states and 405538 transitions. [2019-12-07 17:47:14,106 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:47:14,106 INFO L276 IsEmpty]: Start isEmpty. Operand 95232 states and 405538 transitions. [2019-12-07 17:47:14,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 17:47:14,109 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:14,109 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:14,109 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:14,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:14,109 INFO L82 PathProgramCache]: Analyzing trace with hash 1729820714, now seen corresponding path program 1 times [2019-12-07 17:47:14,110 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:14,110 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1129872327] [2019-12-07 17:47:14,110 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:14,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:14,168 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:14,169 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1129872327] [2019-12-07 17:47:14,169 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:14,169 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:47:14,169 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1571889366] [2019-12-07 17:47:14,170 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:47:14,171 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:14,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:47:14,171 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:47:14,171 INFO L87 Difference]: Start difference. First operand 95232 states and 405538 transitions. Second operand 4 states. [2019-12-07 17:47:15,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:15,052 INFO L93 Difference]: Finished difference Result 151692 states and 619304 transitions. [2019-12-07 17:47:15,052 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:47:15,052 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 17:47:15,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:15,450 INFO L225 Difference]: With dead ends: 151692 [2019-12-07 17:47:15,451 INFO L226 Difference]: Without dead ends: 151643 [2019-12-07 17:47:15,451 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:47:21,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151643 states. [2019-12-07 17:47:23,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151643 to 138429. [2019-12-07 17:47:23,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138429 states. [2019-12-07 17:47:24,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138429 states to 138429 states and 572602 transitions. [2019-12-07 17:47:24,037 INFO L78 Accepts]: Start accepts. Automaton has 138429 states and 572602 transitions. Word has length 11 [2019-12-07 17:47:24,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:24,038 INFO L462 AbstractCegarLoop]: Abstraction has 138429 states and 572602 transitions. [2019-12-07 17:47:24,038 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:47:24,038 INFO L276 IsEmpty]: Start isEmpty. Operand 138429 states and 572602 transitions. [2019-12-07 17:47:24,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:47:24,042 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:24,042 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:24,042 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:24,042 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:24,042 INFO L82 PathProgramCache]: Analyzing trace with hash 1791451612, now seen corresponding path program 1 times [2019-12-07 17:47:24,042 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:24,043 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361279206] [2019-12-07 17:47:24,043 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:24,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:24,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:24,099 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361279206] [2019-12-07 17:47:24,099 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:24,099 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:47:24,099 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1673225074] [2019-12-07 17:47:24,099 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:47:24,100 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:24,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:47:24,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:47:24,100 INFO L87 Difference]: Start difference. First operand 138429 states and 572602 transitions. Second operand 4 states. [2019-12-07 17:47:25,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:25,103 INFO L93 Difference]: Finished difference Result 197916 states and 800228 transitions. [2019-12-07 17:47:25,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:47:25,103 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:47:25,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:25,614 INFO L225 Difference]: With dead ends: 197916 [2019-12-07 17:47:25,614 INFO L226 Difference]: Without dead ends: 197860 [2019-12-07 17:47:25,614 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:47:30,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197860 states. [2019-12-07 17:47:34,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197860 to 165384. [2019-12-07 17:47:34,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165384 states. [2019-12-07 17:47:35,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165384 states to 165384 states and 680683 transitions. [2019-12-07 17:47:35,231 INFO L78 Accepts]: Start accepts. Automaton has 165384 states and 680683 transitions. Word has length 13 [2019-12-07 17:47:35,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:35,232 INFO L462 AbstractCegarLoop]: Abstraction has 165384 states and 680683 transitions. [2019-12-07 17:47:35,232 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:47:35,232 INFO L276 IsEmpty]: Start isEmpty. Operand 165384 states and 680683 transitions. [2019-12-07 17:47:35,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:47:35,237 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:35,237 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:35,237 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:35,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:35,237 INFO L82 PathProgramCache]: Analyzing trace with hash -137996123, now seen corresponding path program 1 times [2019-12-07 17:47:35,237 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:35,238 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [655112056] [2019-12-07 17:47:35,238 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:35,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:35,264 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:35,264 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [655112056] [2019-12-07 17:47:35,264 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:35,264 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:47:35,264 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [245015359] [2019-12-07 17:47:35,265 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:47:35,265 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:35,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:47:35,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:35,265 INFO L87 Difference]: Start difference. First operand 165384 states and 680683 transitions. Second operand 3 states. [2019-12-07 17:47:36,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:36,665 INFO L93 Difference]: Finished difference Result 244100 states and 1002631 transitions. [2019-12-07 17:47:36,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:47:36,665 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 17:47:36,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:37,265 INFO L225 Difference]: With dead ends: 244100 [2019-12-07 17:47:37,265 INFO L226 Difference]: Without dead ends: 244100 [2019-12-07 17:47:37,265 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:42,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 244100 states. [2019-12-07 17:47:45,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 244100 to 183753. [2019-12-07 17:47:45,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183753 states. [2019-12-07 17:47:49,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183753 states to 183753 states and 759316 transitions. [2019-12-07 17:47:49,128 INFO L78 Accepts]: Start accepts. Automaton has 183753 states and 759316 transitions. Word has length 16 [2019-12-07 17:47:49,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:49,129 INFO L462 AbstractCegarLoop]: Abstraction has 183753 states and 759316 transitions. [2019-12-07 17:47:49,129 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:47:49,129 INFO L276 IsEmpty]: Start isEmpty. Operand 183753 states and 759316 transitions. [2019-12-07 17:47:49,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:47:49,134 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:49,135 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:49,135 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:49,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:49,135 INFO L82 PathProgramCache]: Analyzing trace with hash -137876649, now seen corresponding path program 1 times [2019-12-07 17:47:49,135 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:49,136 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1596638766] [2019-12-07 17:47:49,136 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:49,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:49,177 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:49,177 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1596638766] [2019-12-07 17:47:49,177 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:49,178 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:47:49,178 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1586859605] [2019-12-07 17:47:49,178 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:47:49,178 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:49,178 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:47:49,178 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:47:49,179 INFO L87 Difference]: Start difference. First operand 183753 states and 759316 transitions. Second operand 4 states. [2019-12-07 17:47:50,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:50,273 INFO L93 Difference]: Finished difference Result 219863 states and 898035 transitions. [2019-12-07 17:47:50,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:47:50,274 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 17:47:50,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:50,849 INFO L225 Difference]: With dead ends: 219863 [2019-12-07 17:47:50,849 INFO L226 Difference]: Without dead ends: 219863 [2019-12-07 17:47:50,850 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:47:55,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219863 states. [2019-12-07 17:47:58,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219863 to 194030. [2019-12-07 17:47:58,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194030 states. [2019-12-07 17:47:59,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194030 states to 194030 states and 800411 transitions. [2019-12-07 17:47:59,508 INFO L78 Accepts]: Start accepts. Automaton has 194030 states and 800411 transitions. Word has length 16 [2019-12-07 17:47:59,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:59,508 INFO L462 AbstractCegarLoop]: Abstraction has 194030 states and 800411 transitions. [2019-12-07 17:47:59,508 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:47:59,508 INFO L276 IsEmpty]: Start isEmpty. Operand 194030 states and 800411 transitions. [2019-12-07 17:47:59,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:47:59,513 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:59,513 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:59,513 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:59,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:59,513 INFO L82 PathProgramCache]: Analyzing trace with hash -219444717, now seen corresponding path program 1 times [2019-12-07 17:47:59,513 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:59,513 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1952514299] [2019-12-07 17:47:59,513 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:59,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:59,550 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:59,550 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1952514299] [2019-12-07 17:47:59,551 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:59,551 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:47:59,551 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1179786900] [2019-12-07 17:47:59,551 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:47:59,551 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:59,551 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:47:59,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:47:59,552 INFO L87 Difference]: Start difference. First operand 194030 states and 800411 transitions. Second operand 4 states. [2019-12-07 17:48:00,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:00,699 INFO L93 Difference]: Finished difference Result 232254 states and 951651 transitions. [2019-12-07 17:48:00,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:48:00,700 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 17:48:00,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:01,315 INFO L225 Difference]: With dead ends: 232254 [2019-12-07 17:48:01,315 INFO L226 Difference]: Without dead ends: 232254 [2019-12-07 17:48:01,316 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:06,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232254 states. [2019-12-07 17:48:11,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232254 to 195815. [2019-12-07 17:48:11,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195815 states. [2019-12-07 17:48:12,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195815 states to 195815 states and 808686 transitions. [2019-12-07 17:48:12,658 INFO L78 Accepts]: Start accepts. Automaton has 195815 states and 808686 transitions. Word has length 16 [2019-12-07 17:48:12,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:12,659 INFO L462 AbstractCegarLoop]: Abstraction has 195815 states and 808686 transitions. [2019-12-07 17:48:12,659 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:48:12,659 INFO L276 IsEmpty]: Start isEmpty. Operand 195815 states and 808686 transitions. [2019-12-07 17:48:12,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:48:12,669 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:12,670 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:12,670 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:12,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:12,670 INFO L82 PathProgramCache]: Analyzing trace with hash -604356166, now seen corresponding path program 1 times [2019-12-07 17:48:12,670 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:12,670 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [33459416] [2019-12-07 17:48:12,670 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:12,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:12,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:12,699 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [33459416] [2019-12-07 17:48:12,699 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:12,700 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:48:12,700 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1685290683] [2019-12-07 17:48:12,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:12,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:12,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:12,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:12,701 INFO L87 Difference]: Start difference. First operand 195815 states and 808686 transitions. Second operand 3 states. [2019-12-07 17:48:12,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:12,819 INFO L93 Difference]: Finished difference Result 38445 states and 125143 transitions. [2019-12-07 17:48:12,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:12,819 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:48:12,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:12,875 INFO L225 Difference]: With dead ends: 38445 [2019-12-07 17:48:12,876 INFO L226 Difference]: Without dead ends: 38445 [2019-12-07 17:48:12,876 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:13,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38445 states. [2019-12-07 17:48:13,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38445 to 38365. [2019-12-07 17:48:13,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38365 states. [2019-12-07 17:48:13,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38365 states to 38365 states and 124903 transitions. [2019-12-07 17:48:13,507 INFO L78 Accepts]: Start accepts. Automaton has 38365 states and 124903 transitions. Word has length 18 [2019-12-07 17:48:13,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:13,508 INFO L462 AbstractCegarLoop]: Abstraction has 38365 states and 124903 transitions. [2019-12-07 17:48:13,508 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:13,508 INFO L276 IsEmpty]: Start isEmpty. Operand 38365 states and 124903 transitions. [2019-12-07 17:48:13,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:48:13,512 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:13,513 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:13,513 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:13,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:13,513 INFO L82 PathProgramCache]: Analyzing trace with hash -1066994180, now seen corresponding path program 1 times [2019-12-07 17:48:13,513 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:13,513 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209185203] [2019-12-07 17:48:13,513 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:13,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:13,562 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:13,562 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1209185203] [2019-12-07 17:48:13,562 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:13,563 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:13,563 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [531267955] [2019-12-07 17:48:13,563 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:48:13,563 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:13,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:48:13,563 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:13,563 INFO L87 Difference]: Start difference. First operand 38365 states and 124903 transitions. Second operand 5 states. [2019-12-07 17:48:13,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:13,978 INFO L93 Difference]: Finished difference Result 53898 states and 171065 transitions. [2019-12-07 17:48:13,979 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:48:13,979 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 17:48:13,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:14,065 INFO L225 Difference]: With dead ends: 53898 [2019-12-07 17:48:14,065 INFO L226 Difference]: Without dead ends: 53891 [2019-12-07 17:48:14,065 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:48:14,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53891 states. [2019-12-07 17:48:14,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53891 to 39721. [2019-12-07 17:48:14,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39721 states. [2019-12-07 17:48:14,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39721 states to 39721 states and 129036 transitions. [2019-12-07 17:48:14,835 INFO L78 Accepts]: Start accepts. Automaton has 39721 states and 129036 transitions. Word has length 22 [2019-12-07 17:48:14,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:14,835 INFO L462 AbstractCegarLoop]: Abstraction has 39721 states and 129036 transitions. [2019-12-07 17:48:14,835 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:48:14,835 INFO L276 IsEmpty]: Start isEmpty. Operand 39721 states and 129036 transitions. [2019-12-07 17:48:14,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:48:14,840 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:14,840 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:14,840 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:14,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:14,840 INFO L82 PathProgramCache]: Analyzing trace with hash -1734556852, now seen corresponding path program 1 times [2019-12-07 17:48:14,840 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:14,841 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [887392454] [2019-12-07 17:48:14,841 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:14,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:14,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:14,875 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [887392454] [2019-12-07 17:48:14,876 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:14,876 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:14,876 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [160249461] [2019-12-07 17:48:14,876 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:48:14,876 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:14,877 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:48:14,877 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:14,877 INFO L87 Difference]: Start difference. First operand 39721 states and 129036 transitions. Second operand 5 states. [2019-12-07 17:48:15,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:15,567 INFO L93 Difference]: Finished difference Result 56181 states and 177938 transitions. [2019-12-07 17:48:15,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:48:15,568 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 17:48:15,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:15,648 INFO L225 Difference]: With dead ends: 56181 [2019-12-07 17:48:15,648 INFO L226 Difference]: Without dead ends: 56174 [2019-12-07 17:48:15,648 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:48:15,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56174 states. [2019-12-07 17:48:16,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56174 to 38054. [2019-12-07 17:48:16,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38054 states. [2019-12-07 17:48:16,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38054 states to 38054 states and 123745 transitions. [2019-12-07 17:48:16,382 INFO L78 Accepts]: Start accepts. Automaton has 38054 states and 123745 transitions. Word has length 22 [2019-12-07 17:48:16,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:16,382 INFO L462 AbstractCegarLoop]: Abstraction has 38054 states and 123745 transitions. [2019-12-07 17:48:16,382 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:48:16,382 INFO L276 IsEmpty]: Start isEmpty. Operand 38054 states and 123745 transitions. [2019-12-07 17:48:16,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 17:48:16,391 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:16,391 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:16,391 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:16,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:16,392 INFO L82 PathProgramCache]: Analyzing trace with hash -779030427, now seen corresponding path program 1 times [2019-12-07 17:48:16,392 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:16,392 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [49633782] [2019-12-07 17:48:16,392 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:16,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:16,431 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:16,431 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [49633782] [2019-12-07 17:48:16,431 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:16,431 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:16,431 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1277871056] [2019-12-07 17:48:16,432 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:48:16,432 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:16,432 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:48:16,432 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:16,432 INFO L87 Difference]: Start difference. First operand 38054 states and 123745 transitions. Second operand 5 states. [2019-12-07 17:48:16,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:16,862 INFO L93 Difference]: Finished difference Result 53064 states and 168438 transitions. [2019-12-07 17:48:16,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:48:16,863 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 17:48:16,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:16,948 INFO L225 Difference]: With dead ends: 53064 [2019-12-07 17:48:16,948 INFO L226 Difference]: Without dead ends: 53051 [2019-12-07 17:48:16,948 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:48:17,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53051 states. [2019-12-07 17:48:17,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53051 to 44527. [2019-12-07 17:48:17,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44527 states. [2019-12-07 17:48:17,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44527 states to 44527 states and 143877 transitions. [2019-12-07 17:48:17,735 INFO L78 Accepts]: Start accepts. Automaton has 44527 states and 143877 transitions. Word has length 25 [2019-12-07 17:48:17,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:17,736 INFO L462 AbstractCegarLoop]: Abstraction has 44527 states and 143877 transitions. [2019-12-07 17:48:17,736 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:48:17,736 INFO L276 IsEmpty]: Start isEmpty. Operand 44527 states and 143877 transitions. [2019-12-07 17:48:17,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:48:17,747 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:17,748 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:17,748 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:17,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:17,748 INFO L82 PathProgramCache]: Analyzing trace with hash -1740727520, now seen corresponding path program 1 times [2019-12-07 17:48:17,748 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:17,748 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2100428430] [2019-12-07 17:48:17,748 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:17,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:17,787 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:17,787 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2100428430] [2019-12-07 17:48:17,787 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:17,787 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:17,788 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [119189940] [2019-12-07 17:48:17,788 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:48:17,788 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:17,788 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:48:17,788 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:17,788 INFO L87 Difference]: Start difference. First operand 44527 states and 143877 transitions. Second operand 5 states. [2019-12-07 17:48:18,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:18,116 INFO L93 Difference]: Finished difference Result 57149 states and 181718 transitions. [2019-12-07 17:48:18,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:48:18,116 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 17:48:18,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:18,199 INFO L225 Difference]: With dead ends: 57149 [2019-12-07 17:48:18,199 INFO L226 Difference]: Without dead ends: 57125 [2019-12-07 17:48:18,200 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:48:18,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57125 states. [2019-12-07 17:48:19,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57125 to 49925. [2019-12-07 17:48:19,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49925 states. [2019-12-07 17:48:19,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49925 states to 49925 states and 160598 transitions. [2019-12-07 17:48:19,338 INFO L78 Accepts]: Start accepts. Automaton has 49925 states and 160598 transitions. Word has length 27 [2019-12-07 17:48:19,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:19,339 INFO L462 AbstractCegarLoop]: Abstraction has 49925 states and 160598 transitions. [2019-12-07 17:48:19,339 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:48:19,339 INFO L276 IsEmpty]: Start isEmpty. Operand 49925 states and 160598 transitions. [2019-12-07 17:48:19,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 17:48:19,354 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:19,354 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:19,354 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:19,354 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:19,354 INFO L82 PathProgramCache]: Analyzing trace with hash -1978987791, now seen corresponding path program 1 times [2019-12-07 17:48:19,355 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:19,355 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2108142356] [2019-12-07 17:48:19,355 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:19,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:19,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:19,392 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2108142356] [2019-12-07 17:48:19,393 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:19,393 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:19,393 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [952002016] [2019-12-07 17:48:19,393 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:48:19,393 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:19,393 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:48:19,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:19,393 INFO L87 Difference]: Start difference. First operand 49925 states and 160598 transitions. Second operand 5 states. [2019-12-07 17:48:19,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:19,755 INFO L93 Difference]: Finished difference Result 60112 states and 190425 transitions. [2019-12-07 17:48:19,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:48:19,756 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 17:48:19,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:19,844 INFO L225 Difference]: With dead ends: 60112 [2019-12-07 17:48:19,844 INFO L226 Difference]: Without dead ends: 60090 [2019-12-07 17:48:19,844 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:48:20,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60090 states. [2019-12-07 17:48:20,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60090 to 48583. [2019-12-07 17:48:20,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48583 states. [2019-12-07 17:48:20,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48583 states to 48583 states and 156497 transitions. [2019-12-07 17:48:20,702 INFO L78 Accepts]: Start accepts. Automaton has 48583 states and 156497 transitions. Word has length 28 [2019-12-07 17:48:20,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:20,702 INFO L462 AbstractCegarLoop]: Abstraction has 48583 states and 156497 transitions. [2019-12-07 17:48:20,702 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:48:20,702 INFO L276 IsEmpty]: Start isEmpty. Operand 48583 states and 156497 transitions. [2019-12-07 17:48:20,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 17:48:20,716 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:20,716 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:20,716 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:20,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:20,717 INFO L82 PathProgramCache]: Analyzing trace with hash -906370244, now seen corresponding path program 1 times [2019-12-07 17:48:20,717 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:20,717 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1873081256] [2019-12-07 17:48:20,717 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:20,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:20,764 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1873081256] [2019-12-07 17:48:20,764 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:20,764 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:48:20,765 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1167685417] [2019-12-07 17:48:20,765 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:48:20,765 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:20,765 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:48:20,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:20,765 INFO L87 Difference]: Start difference. First operand 48583 states and 156497 transitions. Second operand 5 states. [2019-12-07 17:48:21,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:21,579 INFO L93 Difference]: Finished difference Result 67084 states and 213778 transitions. [2019-12-07 17:48:21,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:48:21,580 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 17:48:21,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:21,676 INFO L225 Difference]: With dead ends: 67084 [2019-12-07 17:48:21,676 INFO L226 Difference]: Without dead ends: 67084 [2019-12-07 17:48:21,676 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:48:21,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67084 states. [2019-12-07 17:48:22,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67084 to 58697. [2019-12-07 17:48:22,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58697 states. [2019-12-07 17:48:22,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58697 states to 58697 states and 188868 transitions. [2019-12-07 17:48:22,701 INFO L78 Accepts]: Start accepts. Automaton has 58697 states and 188868 transitions. Word has length 28 [2019-12-07 17:48:22,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:22,701 INFO L462 AbstractCegarLoop]: Abstraction has 58697 states and 188868 transitions. [2019-12-07 17:48:22,701 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:48:22,701 INFO L276 IsEmpty]: Start isEmpty. Operand 58697 states and 188868 transitions. [2019-12-07 17:48:22,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 17:48:22,724 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:22,724 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:22,724 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:22,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:22,724 INFO L82 PathProgramCache]: Analyzing trace with hash -915242211, now seen corresponding path program 1 times [2019-12-07 17:48:22,724 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:22,724 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [46098795] [2019-12-07 17:48:22,725 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:22,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:22,755 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:22,756 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [46098795] [2019-12-07 17:48:22,756 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:22,756 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:22,756 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [494807932] [2019-12-07 17:48:22,756 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:48:22,756 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:22,756 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:48:22,756 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:48:22,757 INFO L87 Difference]: Start difference. First operand 58697 states and 188868 transitions. Second operand 4 states. [2019-12-07 17:48:22,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:22,833 INFO L93 Difference]: Finished difference Result 25808 states and 78317 transitions. [2019-12-07 17:48:22,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:48:22,834 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 17:48:22,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:22,866 INFO L225 Difference]: With dead ends: 25808 [2019-12-07 17:48:22,867 INFO L226 Difference]: Without dead ends: 25808 [2019-12-07 17:48:22,867 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:48:22,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25808 states. [2019-12-07 17:48:23,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25808 to 24073. [2019-12-07 17:48:23,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24073 states. [2019-12-07 17:48:23,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24073 states to 24073 states and 73199 transitions. [2019-12-07 17:48:23,208 INFO L78 Accepts]: Start accepts. Automaton has 24073 states and 73199 transitions. Word has length 29 [2019-12-07 17:48:23,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:23,209 INFO L462 AbstractCegarLoop]: Abstraction has 24073 states and 73199 transitions. [2019-12-07 17:48:23,209 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:48:23,209 INFO L276 IsEmpty]: Start isEmpty. Operand 24073 states and 73199 transitions. [2019-12-07 17:48:23,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:48:23,225 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:23,226 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:23,226 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:23,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:23,226 INFO L82 PathProgramCache]: Analyzing trace with hash 1850577991, now seen corresponding path program 1 times [2019-12-07 17:48:23,226 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:23,226 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [707450718] [2019-12-07 17:48:23,226 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:23,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:23,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:23,271 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [707450718] [2019-12-07 17:48:23,271 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:23,271 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:48:23,271 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1803651631] [2019-12-07 17:48:23,272 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:48:23,272 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:23,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:48:23,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:48:23,272 INFO L87 Difference]: Start difference. First operand 24073 states and 73199 transitions. Second operand 6 states. [2019-12-07 17:48:23,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:23,714 INFO L93 Difference]: Finished difference Result 32207 states and 96092 transitions. [2019-12-07 17:48:23,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:48:23,714 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 17:48:23,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:23,790 INFO L225 Difference]: With dead ends: 32207 [2019-12-07 17:48:23,791 INFO L226 Difference]: Without dead ends: 32207 [2019-12-07 17:48:23,791 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:48:23,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32207 states. [2019-12-07 17:48:24,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32207 to 25707. [2019-12-07 17:48:24,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25707 states. [2019-12-07 17:48:24,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25707 states to 25707 states and 77993 transitions. [2019-12-07 17:48:24,184 INFO L78 Accepts]: Start accepts. Automaton has 25707 states and 77993 transitions. Word has length 33 [2019-12-07 17:48:24,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:24,184 INFO L462 AbstractCegarLoop]: Abstraction has 25707 states and 77993 transitions. [2019-12-07 17:48:24,184 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:48:24,184 INFO L276 IsEmpty]: Start isEmpty. Operand 25707 states and 77993 transitions. [2019-12-07 17:48:24,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 17:48:24,202 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:24,202 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:24,202 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:24,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:24,203 INFO L82 PathProgramCache]: Analyzing trace with hash 1933444630, now seen corresponding path program 1 times [2019-12-07 17:48:24,203 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:24,203 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [622982313] [2019-12-07 17:48:24,203 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:24,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:24,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:24,246 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [622982313] [2019-12-07 17:48:24,246 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:24,246 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:48:24,246 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2074773173] [2019-12-07 17:48:24,246 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:48:24,247 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:24,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:48:24,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:48:24,247 INFO L87 Difference]: Start difference. First operand 25707 states and 77993 transitions. Second operand 6 states. [2019-12-07 17:48:24,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:24,685 INFO L93 Difference]: Finished difference Result 31740 states and 94616 transitions. [2019-12-07 17:48:24,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:48:24,685 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 17:48:24,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:24,720 INFO L225 Difference]: With dead ends: 31740 [2019-12-07 17:48:24,720 INFO L226 Difference]: Without dead ends: 31740 [2019-12-07 17:48:24,720 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:48:24,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31740 states. [2019-12-07 17:48:25,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31740 to 23196. [2019-12-07 17:48:25,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23196 states. [2019-12-07 17:48:25,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23196 states to 23196 states and 70521 transitions. [2019-12-07 17:48:25,087 INFO L78 Accepts]: Start accepts. Automaton has 23196 states and 70521 transitions. Word has length 34 [2019-12-07 17:48:25,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:25,087 INFO L462 AbstractCegarLoop]: Abstraction has 23196 states and 70521 transitions. [2019-12-07 17:48:25,087 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:48:25,087 INFO L276 IsEmpty]: Start isEmpty. Operand 23196 states and 70521 transitions. [2019-12-07 17:48:25,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 17:48:25,106 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:25,106 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:25,106 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:25,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:25,106 INFO L82 PathProgramCache]: Analyzing trace with hash -32326155, now seen corresponding path program 1 times [2019-12-07 17:48:25,106 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:25,106 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958814410] [2019-12-07 17:48:25,106 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:25,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:25,140 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:25,140 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958814410] [2019-12-07 17:48:25,140 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:25,140 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:48:25,140 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1470316746] [2019-12-07 17:48:25,141 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:25,141 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:25,141 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:25,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:25,141 INFO L87 Difference]: Start difference. First operand 23196 states and 70521 transitions. Second operand 3 states. [2019-12-07 17:48:25,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:25,200 INFO L93 Difference]: Finished difference Result 23196 states and 69774 transitions. [2019-12-07 17:48:25,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:25,200 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 17:48:25,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:25,224 INFO L225 Difference]: With dead ends: 23196 [2019-12-07 17:48:25,225 INFO L226 Difference]: Without dead ends: 23196 [2019-12-07 17:48:25,225 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:25,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23196 states. [2019-12-07 17:48:25,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23196 to 23068. [2019-12-07 17:48:25,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23068 states. [2019-12-07 17:48:25,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23068 states to 23068 states and 69418 transitions. [2019-12-07 17:48:25,527 INFO L78 Accepts]: Start accepts. Automaton has 23068 states and 69418 transitions. Word has length 39 [2019-12-07 17:48:25,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:25,527 INFO L462 AbstractCegarLoop]: Abstraction has 23068 states and 69418 transitions. [2019-12-07 17:48:25,527 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:25,528 INFO L276 IsEmpty]: Start isEmpty. Operand 23068 states and 69418 transitions. [2019-12-07 17:48:25,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:48:25,546 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:25,546 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:25,546 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:25,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:25,546 INFO L82 PathProgramCache]: Analyzing trace with hash 1133369093, now seen corresponding path program 1 times [2019-12-07 17:48:25,546 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:25,547 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1385165399] [2019-12-07 17:48:25,547 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:25,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:25,605 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:25,606 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1385165399] [2019-12-07 17:48:25,606 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:25,606 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:48:25,606 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1454457407] [2019-12-07 17:48:25,606 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:48:25,606 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:25,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:48:25,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:48:25,607 INFO L87 Difference]: Start difference. First operand 23068 states and 69418 transitions. Second operand 6 states. [2019-12-07 17:48:26,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:26,483 INFO L93 Difference]: Finished difference Result 30235 states and 89609 transitions. [2019-12-07 17:48:26,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 17:48:26,484 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 17:48:26,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:26,515 INFO L225 Difference]: With dead ends: 30235 [2019-12-07 17:48:26,515 INFO L226 Difference]: Without dead ends: 30235 [2019-12-07 17:48:26,516 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:48:26,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30235 states. [2019-12-07 17:48:26,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30235 to 24421. [2019-12-07 17:48:26,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24421 states. [2019-12-07 17:48:26,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24421 states to 24421 states and 73481 transitions. [2019-12-07 17:48:26,903 INFO L78 Accepts]: Start accepts. Automaton has 24421 states and 73481 transitions. Word has length 40 [2019-12-07 17:48:26,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:26,903 INFO L462 AbstractCegarLoop]: Abstraction has 24421 states and 73481 transitions. [2019-12-07 17:48:26,903 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:48:26,903 INFO L276 IsEmpty]: Start isEmpty. Operand 24421 states and 73481 transitions. [2019-12-07 17:48:26,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:48:26,923 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:26,923 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:26,923 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:26,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:26,923 INFO L82 PathProgramCache]: Analyzing trace with hash -1613873579, now seen corresponding path program 2 times [2019-12-07 17:48:26,923 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:26,923 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [538554340] [2019-12-07 17:48:26,923 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:26,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:26,971 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:26,971 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [538554340] [2019-12-07 17:48:26,971 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:26,971 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:48:26,972 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2084888355] [2019-12-07 17:48:26,972 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:26,972 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:26,972 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:26,972 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:26,972 INFO L87 Difference]: Start difference. First operand 24421 states and 73481 transitions. Second operand 3 states. [2019-12-07 17:48:27,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:27,086 INFO L93 Difference]: Finished difference Result 45325 states and 136556 transitions. [2019-12-07 17:48:27,087 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:27,087 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 17:48:27,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:27,128 INFO L225 Difference]: With dead ends: 45325 [2019-12-07 17:48:27,128 INFO L226 Difference]: Without dead ends: 38045 [2019-12-07 17:48:27,128 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:27,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38045 states. [2019-12-07 17:48:27,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38045 to 36258. [2019-12-07 17:48:27,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36258 states. [2019-12-07 17:48:27,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36258 states to 36258 states and 108888 transitions. [2019-12-07 17:48:27,630 INFO L78 Accepts]: Start accepts. Automaton has 36258 states and 108888 transitions. Word has length 40 [2019-12-07 17:48:27,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:27,630 INFO L462 AbstractCegarLoop]: Abstraction has 36258 states and 108888 transitions. [2019-12-07 17:48:27,630 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:27,630 INFO L276 IsEmpty]: Start isEmpty. Operand 36258 states and 108888 transitions. [2019-12-07 17:48:27,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 17:48:27,662 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:27,662 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:27,662 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:27,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:27,662 INFO L82 PathProgramCache]: Analyzing trace with hash -380516314, now seen corresponding path program 1 times [2019-12-07 17:48:27,663 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:27,663 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1056154296] [2019-12-07 17:48:27,663 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:27,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:27,696 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:27,697 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1056154296] [2019-12-07 17:48:27,697 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:27,697 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:48:27,697 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1667883580] [2019-12-07 17:48:27,697 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:27,697 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:27,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:27,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:27,698 INFO L87 Difference]: Start difference. First operand 36258 states and 108888 transitions. Second operand 3 states. [2019-12-07 17:48:27,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:27,805 INFO L93 Difference]: Finished difference Result 36258 states and 108783 transitions. [2019-12-07 17:48:27,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:27,805 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 17:48:27,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:27,845 INFO L225 Difference]: With dead ends: 36258 [2019-12-07 17:48:27,845 INFO L226 Difference]: Without dead ends: 36258 [2019-12-07 17:48:27,846 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:27,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36258 states. [2019-12-07 17:48:28,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36258 to 30961. [2019-12-07 17:48:28,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30961 states. [2019-12-07 17:48:28,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30961 states to 30961 states and 93997 transitions. [2019-12-07 17:48:28,333 INFO L78 Accepts]: Start accepts. Automaton has 30961 states and 93997 transitions. Word has length 41 [2019-12-07 17:48:28,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:28,333 INFO L462 AbstractCegarLoop]: Abstraction has 30961 states and 93997 transitions. [2019-12-07 17:48:28,333 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:28,333 INFO L276 IsEmpty]: Start isEmpty. Operand 30961 states and 93997 transitions. [2019-12-07 17:48:28,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 17:48:28,362 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:28,362 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:28,362 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:28,362 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:28,362 INFO L82 PathProgramCache]: Analyzing trace with hash -1900542759, now seen corresponding path program 1 times [2019-12-07 17:48:28,362 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:28,362 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [640680691] [2019-12-07 17:48:28,362 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:28,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:28,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:28,399 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [640680691] [2019-12-07 17:48:28,399 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:28,399 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:48:28,399 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1584793918] [2019-12-07 17:48:28,400 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:48:28,400 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:28,400 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:48:28,400 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:28,400 INFO L87 Difference]: Start difference. First operand 30961 states and 93997 transitions. Second operand 5 states. [2019-12-07 17:48:28,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:28,485 INFO L93 Difference]: Finished difference Result 28726 states and 89009 transitions. [2019-12-07 17:48:28,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:48:28,486 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 17:48:28,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:28,521 INFO L225 Difference]: With dead ends: 28726 [2019-12-07 17:48:28,521 INFO L226 Difference]: Without dead ends: 27827 [2019-12-07 17:48:28,521 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:28,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27827 states. [2019-12-07 17:48:28,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27827 to 16254. [2019-12-07 17:48:28,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16254 states. [2019-12-07 17:48:28,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16254 states to 16254 states and 50693 transitions. [2019-12-07 17:48:28,852 INFO L78 Accepts]: Start accepts. Automaton has 16254 states and 50693 transitions. Word has length 42 [2019-12-07 17:48:28,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:28,852 INFO L462 AbstractCegarLoop]: Abstraction has 16254 states and 50693 transitions. [2019-12-07 17:48:28,852 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:48:28,852 INFO L276 IsEmpty]: Start isEmpty. Operand 16254 states and 50693 transitions. [2019-12-07 17:48:28,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:48:28,866 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:28,866 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:28,866 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:28,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:28,866 INFO L82 PathProgramCache]: Analyzing trace with hash -479569301, now seen corresponding path program 1 times [2019-12-07 17:48:28,866 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:28,866 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [911983361] [2019-12-07 17:48:28,867 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:28,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:28,895 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:28,895 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [911983361] [2019-12-07 17:48:28,895 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:28,895 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:28,895 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [785132109] [2019-12-07 17:48:28,895 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:28,895 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:28,896 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:28,896 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:28,896 INFO L87 Difference]: Start difference. First operand 16254 states and 50693 transitions. Second operand 3 states. [2019-12-07 17:48:28,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:28,960 INFO L93 Difference]: Finished difference Result 19920 states and 59935 transitions. [2019-12-07 17:48:28,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:28,960 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:48:28,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:28,980 INFO L225 Difference]: With dead ends: 19920 [2019-12-07 17:48:28,980 INFO L226 Difference]: Without dead ends: 19920 [2019-12-07 17:48:28,980 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:29,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19920 states. [2019-12-07 17:48:29,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19920 to 16473. [2019-12-07 17:48:29,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16473 states. [2019-12-07 17:48:29,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16473 states to 16473 states and 49621 transitions. [2019-12-07 17:48:29,233 INFO L78 Accepts]: Start accepts. Automaton has 16473 states and 49621 transitions. Word has length 66 [2019-12-07 17:48:29,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:29,233 INFO L462 AbstractCegarLoop]: Abstraction has 16473 states and 49621 transitions. [2019-12-07 17:48:29,233 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:29,233 INFO L276 IsEmpty]: Start isEmpty. Operand 16473 states and 49621 transitions. [2019-12-07 17:48:29,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:48:29,246 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:29,247 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:29,247 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:29,247 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:29,247 INFO L82 PathProgramCache]: Analyzing trace with hash -1224044669, now seen corresponding path program 1 times [2019-12-07 17:48:29,247 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:29,247 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [263139363] [2019-12-07 17:48:29,247 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:29,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:29,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:29,280 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [263139363] [2019-12-07 17:48:29,281 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:29,281 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:48:29,281 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [154445183] [2019-12-07 17:48:29,281 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:29,281 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:29,281 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:29,281 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:29,281 INFO L87 Difference]: Start difference. First operand 16473 states and 49621 transitions. Second operand 3 states. [2019-12-07 17:48:29,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:29,355 INFO L93 Difference]: Finished difference Result 19362 states and 58306 transitions. [2019-12-07 17:48:29,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:29,355 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:48:29,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:29,374 INFO L225 Difference]: With dead ends: 19362 [2019-12-07 17:48:29,374 INFO L226 Difference]: Without dead ends: 19362 [2019-12-07 17:48:29,374 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:29,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19362 states. [2019-12-07 17:48:29,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19362 to 14994. [2019-12-07 17:48:29,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14994 states. [2019-12-07 17:48:29,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14994 states to 14994 states and 45457 transitions. [2019-12-07 17:48:29,605 INFO L78 Accepts]: Start accepts. Automaton has 14994 states and 45457 transitions. Word has length 66 [2019-12-07 17:48:29,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:29,605 INFO L462 AbstractCegarLoop]: Abstraction has 14994 states and 45457 transitions. [2019-12-07 17:48:29,606 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:29,606 INFO L276 IsEmpty]: Start isEmpty. Operand 14994 states and 45457 transitions. [2019-12-07 17:48:29,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:48:29,617 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:29,617 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:29,617 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:29,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:29,618 INFO L82 PathProgramCache]: Analyzing trace with hash -2069303088, now seen corresponding path program 1 times [2019-12-07 17:48:29,618 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:29,618 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [968577803] [2019-12-07 17:48:29,618 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:29,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:29,658 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:29,658 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [968577803] [2019-12-07 17:48:29,658 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:29,658 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:29,658 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1974511150] [2019-12-07 17:48:29,658 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:48:29,659 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:29,659 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:48:29,659 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:48:29,659 INFO L87 Difference]: Start difference. First operand 14994 states and 45457 transitions. Second operand 4 states. [2019-12-07 17:48:29,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:29,734 INFO L93 Difference]: Finished difference Result 14994 states and 45269 transitions. [2019-12-07 17:48:29,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:48:29,735 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 17:48:29,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:29,751 INFO L225 Difference]: With dead ends: 14994 [2019-12-07 17:48:29,751 INFO L226 Difference]: Without dead ends: 14994 [2019-12-07 17:48:29,752 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:29,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14994 states. [2019-12-07 17:48:29,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14994 to 13662. [2019-12-07 17:48:29,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13662 states. [2019-12-07 17:48:29,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13662 states to 13662 states and 41201 transitions. [2019-12-07 17:48:29,956 INFO L78 Accepts]: Start accepts. Automaton has 13662 states and 41201 transitions. Word has length 67 [2019-12-07 17:48:29,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:29,956 INFO L462 AbstractCegarLoop]: Abstraction has 13662 states and 41201 transitions. [2019-12-07 17:48:29,956 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:48:29,956 INFO L276 IsEmpty]: Start isEmpty. Operand 13662 states and 41201 transitions. [2019-12-07 17:48:29,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:48:29,968 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:29,968 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:29,968 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:29,968 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:29,968 INFO L82 PathProgramCache]: Analyzing trace with hash 1009183447, now seen corresponding path program 1 times [2019-12-07 17:48:29,969 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:29,969 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [428119689] [2019-12-07 17:48:29,969 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:29,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:30,033 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:30,033 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [428119689] [2019-12-07 17:48:30,033 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:30,033 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:30,033 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [237348863] [2019-12-07 17:48:30,033 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:48:30,033 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:30,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:48:30,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:48:30,034 INFO L87 Difference]: Start difference. First operand 13662 states and 41201 transitions. Second operand 4 states. [2019-12-07 17:48:30,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:30,119 INFO L93 Difference]: Finished difference Result 34209 states and 103803 transitions. [2019-12-07 17:48:30,119 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:48:30,119 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 17:48:30,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:30,141 INFO L225 Difference]: With dead ends: 34209 [2019-12-07 17:48:30,141 INFO L226 Difference]: Without dead ends: 21293 [2019-12-07 17:48:30,141 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:48:30,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21293 states. [2019-12-07 17:48:30,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21293 to 13031. [2019-12-07 17:48:30,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13031 states. [2019-12-07 17:48:30,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13031 states to 13031 states and 39206 transitions. [2019-12-07 17:48:30,392 INFO L78 Accepts]: Start accepts. Automaton has 13031 states and 39206 transitions. Word has length 67 [2019-12-07 17:48:30,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:30,393 INFO L462 AbstractCegarLoop]: Abstraction has 13031 states and 39206 transitions. [2019-12-07 17:48:30,393 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:48:30,393 INFO L276 IsEmpty]: Start isEmpty. Operand 13031 states and 39206 transitions. [2019-12-07 17:48:30,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:48:30,404 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:30,404 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:30,405 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:30,405 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:30,405 INFO L82 PathProgramCache]: Analyzing trace with hash 28997027, now seen corresponding path program 2 times [2019-12-07 17:48:30,405 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:30,405 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1865859393] [2019-12-07 17:48:30,405 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:30,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:30,535 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:30,535 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1865859393] [2019-12-07 17:48:30,535 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:30,535 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:48:30,535 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1895660177] [2019-12-07 17:48:30,535 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:48:30,535 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:30,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:48:30,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:48:30,536 INFO L87 Difference]: Start difference. First operand 13031 states and 39206 transitions. Second operand 11 states. [2019-12-07 17:48:31,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:31,782 INFO L93 Difference]: Finished difference Result 54219 states and 162482 transitions. [2019-12-07 17:48:31,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 17:48:31,782 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 17:48:31,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:31,821 INFO L225 Difference]: With dead ends: 54219 [2019-12-07 17:48:31,821 INFO L226 Difference]: Without dead ends: 37294 [2019-12-07 17:48:31,822 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 718 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=438, Invalid=1914, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 17:48:31,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37294 states. [2019-12-07 17:48:32,161 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37294 to 15574. [2019-12-07 17:48:32,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15574 states. [2019-12-07 17:48:32,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15574 states to 15574 states and 46269 transitions. [2019-12-07 17:48:32,184 INFO L78 Accepts]: Start accepts. Automaton has 15574 states and 46269 transitions. Word has length 67 [2019-12-07 17:48:32,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:32,185 INFO L462 AbstractCegarLoop]: Abstraction has 15574 states and 46269 transitions. [2019-12-07 17:48:32,185 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:48:32,185 INFO L276 IsEmpty]: Start isEmpty. Operand 15574 states and 46269 transitions. [2019-12-07 17:48:32,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:48:32,198 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:32,198 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:32,198 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:32,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:32,198 INFO L82 PathProgramCache]: Analyzing trace with hash -123948117, now seen corresponding path program 3 times [2019-12-07 17:48:32,198 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:32,198 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [890000554] [2019-12-07 17:48:32,198 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:32,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:32,262 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:32,262 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [890000554] [2019-12-07 17:48:32,262 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:32,263 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:48:32,263 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2057489059] [2019-12-07 17:48:32,263 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:48:32,263 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:32,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:48:32,263 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:48:32,264 INFO L87 Difference]: Start difference. First operand 15574 states and 46269 transitions. Second operand 7 states. [2019-12-07 17:48:32,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:32,636 INFO L93 Difference]: Finished difference Result 41459 states and 120275 transitions. [2019-12-07 17:48:32,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:48:32,636 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 17:48:32,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:32,675 INFO L225 Difference]: With dead ends: 41459 [2019-12-07 17:48:32,675 INFO L226 Difference]: Without dead ends: 36871 [2019-12-07 17:48:32,675 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:48:32,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36871 states. [2019-12-07 17:48:33,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36871 to 15496. [2019-12-07 17:48:33,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15496 states. [2019-12-07 17:48:33,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15496 states to 15496 states and 45951 transitions. [2019-12-07 17:48:33,033 INFO L78 Accepts]: Start accepts. Automaton has 15496 states and 45951 transitions. Word has length 67 [2019-12-07 17:48:33,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:33,033 INFO L462 AbstractCegarLoop]: Abstraction has 15496 states and 45951 transitions. [2019-12-07 17:48:33,033 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:48:33,033 INFO L276 IsEmpty]: Start isEmpty. Operand 15496 states and 45951 transitions. [2019-12-07 17:48:33,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:48:33,046 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:33,046 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:33,046 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:33,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:33,047 INFO L82 PathProgramCache]: Analyzing trace with hash 1689948735, now seen corresponding path program 4 times [2019-12-07 17:48:33,047 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:33,047 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1448525826] [2019-12-07 17:48:33,047 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:33,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:33,179 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:33,179 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1448525826] [2019-12-07 17:48:33,179 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:33,179 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 17:48:33,179 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1043751775] [2019-12-07 17:48:33,180 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:48:33,180 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:33,180 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:48:33,180 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:48:33,180 INFO L87 Difference]: Start difference. First operand 15496 states and 45951 transitions. Second operand 12 states. [2019-12-07 17:48:34,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:34,365 INFO L93 Difference]: Finished difference Result 37766 states and 111037 transitions. [2019-12-07 17:48:34,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 17:48:34,365 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 17:48:34,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:34,405 INFO L225 Difference]: With dead ends: 37766 [2019-12-07 17:48:34,405 INFO L226 Difference]: Without dead ends: 36381 [2019-12-07 17:48:34,406 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 500 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=330, Invalid=1562, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 17:48:34,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36381 states. [2019-12-07 17:48:34,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36381 to 14834. [2019-12-07 17:48:34,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14834 states. [2019-12-07 17:48:34,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14834 states to 14834 states and 44130 transitions. [2019-12-07 17:48:34,755 INFO L78 Accepts]: Start accepts. Automaton has 14834 states and 44130 transitions. Word has length 67 [2019-12-07 17:48:34,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:34,755 INFO L462 AbstractCegarLoop]: Abstraction has 14834 states and 44130 transitions. [2019-12-07 17:48:34,755 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:48:34,755 INFO L276 IsEmpty]: Start isEmpty. Operand 14834 states and 44130 transitions. [2019-12-07 17:48:34,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:48:34,768 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:34,768 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:34,768 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:34,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:34,768 INFO L82 PathProgramCache]: Analyzing trace with hash -778064925, now seen corresponding path program 5 times [2019-12-07 17:48:34,769 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:34,769 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1797914803] [2019-12-07 17:48:34,769 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:34,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:48:34,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:48:34,850 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:48:34,851 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:48:34,853 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= v_~z$r_buff0_thd0~0_144 0) (= v_~z$r_buff0_thd1~0_230 0) (= v_~z$w_buff0_used~0_947 0) (= v_~z$r_buff1_thd1~0_185 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1495~0.base_44|) 0) (= 0 |v_ULTIMATE.start_main_~#t1495~0.offset_28|) (= v_~z$w_buff1_used~0_563 0) (= v_~weak$$choice2~0_147 0) (= 0 v_~z$r_buff1_thd3~0_352) (= 0 v_~x~0_159) (< 0 |v_#StackHeapBarrier_17|) (= v_~z$read_delayed~0_6 0) (= v_~z$mem_tmp~0_24 0) (= v_~z$r_buff0_thd2~0_126 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1495~0.base_44| 4)) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_cnt~0_155 0) (= v_~z$r_buff1_thd2~0_201 0) (= 0 v_~z$r_buff0_thd3~0_371) (= |v_#valid_80| (store .cse0 |v_ULTIMATE.start_main_~#t1495~0.base_44| 1)) (= |v_#memory_int_19| (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1495~0.base_44| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1495~0.base_44|) |v_ULTIMATE.start_main_~#t1495~0.offset_28| 0))) (= v_~main$tmp_guard1~0_38 0) (= v_~z$r_buff1_thd0~0_199 0) (= 0 |v_#NULL.base_7|) (= 0 v_~weak$$choice0~0_19) (= v_~z$w_buff1~0_328 0) (= v_~z~0_152 0) (= v_~z$w_buff0~0_540 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$flush_delayed~0_35) (= v_~y~0_49 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1495~0.base_44|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1496~0.base=|v_ULTIMATE.start_main_~#t1496~0.base_44|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_201, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_59|, ULTIMATE.start_main_~#t1497~0.offset=|v_ULTIMATE.start_main_~#t1497~0.offset_18|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_328, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_37|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_99|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_75|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_199, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ~y~0=v_~y~0_49, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_126, ULTIMATE.start_main_~#t1496~0.offset=|v_ULTIMATE.start_main_~#t1496~0.offset_28|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_947, ~z$w_buff0~0=v_~z$w_buff0~0_540, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_352, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_563, ~z$flush_delayed~0=v_~z$flush_delayed~0_35, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_~#t1497~0.base=|v_ULTIMATE.start_main_~#t1497~0.base_25|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t1495~0.offset=|v_ULTIMATE.start_main_~#t1495~0.offset_28|, ~weak$$choice0~0=v_~weak$$choice0~0_19, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, #valid=|v_#valid_80|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_185, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t1495~0.base=|v_ULTIMATE.start_main_~#t1495~0.base_44|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_371, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~z~0=v_~z~0_152, ~weak$$choice2~0=v_~weak$$choice2~0_147, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_230, ~x~0=v_~x~0_159} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1496~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1497~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1496~0.offset, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1497~0.base, #NULL.base, ULTIMATE.start_main_~#t1495~0.offset, ~weak$$choice0~0, ULTIMATE.start_main_#res, #valid, ~z$r_buff1_thd1~0, #memory_int, ULTIMATE.start_main_~#t1495~0.base, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 17:48:34,854 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] L818-1-->L820: Formula: (and (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1496~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1496~0.base_13|)) (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1496~0.base_13|) 0) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1496~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1496~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1496~0.base_13|) |v_ULTIMATE.start_main_~#t1496~0.offset_11| 1)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t1496~0.offset_11|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1496~0.base_13| 4) |v_#length_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1496~0.base=|v_ULTIMATE.start_main_~#t1496~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1496~0.offset=|v_ULTIMATE.start_main_~#t1496~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1496~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1496~0.offset] because there is no mapped edge [2019-12-07 17:48:34,854 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L820-1-->L822: Formula: (and (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1497~0.base_13|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1497~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1497~0.base_13|) |v_ULTIMATE.start_main_~#t1497~0.offset_11| 2)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t1497~0.base_13| 0)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1497~0.base_13| 4)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1497~0.base_13| 1)) (= |v_ULTIMATE.start_main_~#t1497~0.offset_11| 0) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1497~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1497~0.offset=|v_ULTIMATE.start_main_~#t1497~0.offset_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1497~0.base=|v_ULTIMATE.start_main_~#t1497~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1497~0.offset, #length, ULTIMATE.start_main_~#t1497~0.base] because there is no mapped edge [2019-12-07 17:48:34,854 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] P0ENTRY-->L4-3: Formula: (and (= v_P0Thread1of1ForFork0_~arg.offset_12 |v_P0Thread1of1ForFork0_#in~arg.offset_14|) (= v_~z$w_buff0_used~0_163 v_~z$w_buff1_used~0_112) (= (ite (not (and (not (= (mod v_~z$w_buff1_used~0_112 256) 0)) (not (= (mod v_~z$w_buff0_used~0_162 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (= v_~z$w_buff0~0_38 v_~z$w_buff1~0_37) (= v_~z$w_buff0_used~0_162 1) (= 1 v_~z$w_buff0~0_37) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 0)) (= v_P0Thread1of1ForFork0_~arg.base_12 |v_P0Thread1of1ForFork0_#in~arg.base_14|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_163, ~z$w_buff0~0=v_~z$w_buff0~0_38, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_162, ~z$w_buff0~0=v_~z$w_buff0~0_37, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_112, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|, ~z$w_buff1~0=v_~z$w_buff1~0_37, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_12, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_12} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:48:34,856 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L784-->L784-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In809516594 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite21_Out809516594| |P2Thread1of1ForFork2_#t~ite20_Out809516594|) (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In809516594 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In809516594 256)) (and (= 0 (mod ~z$w_buff1_used~0_In809516594 256)) .cse0) (and (= (mod ~z$r_buff1_thd3~0_In809516594 256) 0) .cse0))) .cse1 (= ~z$w_buff0~0_In809516594 |P2Thread1of1ForFork2_#t~ite20_Out809516594|)) (and (= ~z$w_buff0~0_In809516594 |P2Thread1of1ForFork2_#t~ite21_Out809516594|) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite20_In809516594| |P2Thread1of1ForFork2_#t~ite20_Out809516594|)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In809516594, ~z$w_buff0_used~0=~z$w_buff0_used~0_In809516594, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_In809516594|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In809516594, ~z$w_buff1_used~0=~z$w_buff1_used~0_In809516594, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In809516594, ~weak$$choice2~0=~weak$$choice2~0_In809516594} OutVars{~z$w_buff0~0=~z$w_buff0~0_In809516594, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out809516594|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In809516594, P2Thread1of1ForFork2_#t~ite21=|P2Thread1of1ForFork2_#t~ite21_Out809516594|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In809516594, ~z$w_buff1_used~0=~z$w_buff1_used~0_In809516594, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In809516594, ~weak$$choice2~0=~weak$$choice2~0_In809516594} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 17:48:34,858 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L762-2-->L762-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In844759704 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In844759704 256) 0)) (.cse0 (= |P1Thread1of1ForFork1_#t~ite9_Out844759704| |P1Thread1of1ForFork1_#t~ite10_Out844759704|))) (or (and (= ~z$w_buff1~0_In844759704 |P1Thread1of1ForFork1_#t~ite9_Out844759704|) .cse0 (not .cse1) (not .cse2)) (and (or .cse1 .cse2) (= ~z~0_In844759704 |P1Thread1of1ForFork1_#t~ite9_Out844759704|) .cse0))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In844759704, ~z$w_buff1_used~0=~z$w_buff1_used~0_In844759704, ~z$w_buff1~0=~z$w_buff1~0_In844759704, ~z~0=~z~0_In844759704} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out844759704|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In844759704, ~z$w_buff1_used~0=~z$w_buff1_used~0_In844759704, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out844759704|, ~z$w_buff1~0=~z$w_buff1~0_In844759704, ~z~0=~z~0_In844759704} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 17:48:34,858 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L743-->L743-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In1733040433 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1733040433 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out1733040433| ~z$w_buff0_used~0_In1733040433) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out1733040433| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1733040433, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1733040433} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1733040433|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1733040433, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1733040433} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:48:34,859 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L744-->L744-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-1449176908 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1449176908 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1449176908 256))) (.cse3 (= (mod ~z$r_buff1_thd1~0_In-1449176908 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-1449176908 |P0Thread1of1ForFork0_#t~ite6_Out-1449176908|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1449176908|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1449176908, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1449176908, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1449176908, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1449176908} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1449176908|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1449176908, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1449176908, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1449176908, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1449176908} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:48:34,859 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L745-->L746: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1139643878 256))) (.cse2 (= ~z$r_buff0_thd1~0_In-1139643878 ~z$r_buff0_thd1~0_Out-1139643878)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1139643878 256)))) (or (and (not .cse0) (not .cse1) (= 0 ~z$r_buff0_thd1~0_Out-1139643878)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1139643878, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1139643878} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1139643878, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1139643878|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1139643878} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:48:34,859 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L763-->L763-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In1544286056 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1544286056 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out1544286056|) (not .cse1)) (and (= ~z$w_buff0_used~0_In1544286056 |P1Thread1of1ForFork1_#t~ite11_Out1544286056|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1544286056, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1544286056} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1544286056, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1544286056|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1544286056} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:48:34,860 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L764-->L764-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd2~0_In-918347524 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-918347524 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-918347524 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-918347524 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out-918347524| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In-918347524 |P1Thread1of1ForFork1_#t~ite12_Out-918347524|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-918347524, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-918347524, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-918347524, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-918347524} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-918347524, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-918347524, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-918347524, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-918347524|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-918347524} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:48:34,860 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In204024178 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In204024178 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite13_Out204024178| 0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out204024178| ~z$r_buff0_thd2~0_In204024178) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In204024178, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In204024178} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In204024178, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out204024178|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In204024178} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 17:48:34,861 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L766-->L766-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In416775555 256))) (.cse2 (= (mod ~z$r_buff1_thd2~0_In416775555 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In416775555 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In416775555 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out416775555| ~z$r_buff1_thd2~0_In416775555) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out416775555| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In416775555, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In416775555, ~z$w_buff1_used~0=~z$w_buff1_used~0_In416775555, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In416775555} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In416775555, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In416775555, ~z$w_buff1_used~0=~z$w_buff1_used~0_In416775555, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out416775555|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In416775555} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:48:34,861 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [854] [854] L766-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~z$r_buff1_thd2~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_92, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:48:34,861 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L788-->L789: Formula: (and (= v_~z$r_buff0_thd3~0_137 v_~z$r_buff0_thd3~0_136) (not (= (mod v_~weak$$choice2~0_34 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_137, ~weak$$choice2~0=v_~weak$$choice2~0_34} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_10|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_34} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 17:48:34,861 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L789-->L789-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In2128241816 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite35_Out2128241816| ~z$r_buff1_thd3~0_In2128241816) .cse0 (= |P2Thread1of1ForFork2_#t~ite36_Out2128241816| |P2Thread1of1ForFork2_#t~ite35_Out2128241816|) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In2128241816 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In2128241816 256)) (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In2128241816 256))) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In2128241816 256)))))) (and (= |P2Thread1of1ForFork2_#t~ite35_In2128241816| |P2Thread1of1ForFork2_#t~ite35_Out2128241816|) (= |P2Thread1of1ForFork2_#t~ite36_Out2128241816| ~z$r_buff1_thd3~0_In2128241816) (not .cse0)))) InVars {P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_In2128241816|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2128241816, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2128241816, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2128241816, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2128241816, ~weak$$choice2~0=~weak$$choice2~0_In2128241816} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out2128241816|, P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out2128241816|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2128241816, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2128241816, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2128241816, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2128241816, ~weak$$choice2~0=~weak$$choice2~0_In2128241816} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35, P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 17:48:34,862 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L791-->L795: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= v_~z~0_62 v_~z$mem_tmp~0_7) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_7, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_62} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 17:48:34,862 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L795-2-->L795-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork2_#t~ite39_Out945982351| |P2Thread1of1ForFork2_#t~ite38_Out945982351|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In945982351 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In945982351 256) 0))) (or (and (not .cse0) (= ~z$w_buff1~0_In945982351 |P2Thread1of1ForFork2_#t~ite38_Out945982351|) (not .cse1) .cse2) (and .cse2 (or .cse1 .cse0) (= |P2Thread1of1ForFork2_#t~ite38_Out945982351| ~z~0_In945982351)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In945982351, ~z$w_buff1_used~0=~z$w_buff1_used~0_In945982351, ~z$w_buff1~0=~z$w_buff1~0_In945982351, ~z~0=~z~0_In945982351} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In945982351, ~z$w_buff1_used~0=~z$w_buff1_used~0_In945982351, ~z$w_buff1~0=~z$w_buff1~0_In945982351, ~z~0=~z~0_In945982351, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out945982351|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out945982351|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 17:48:34,863 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L796-->L796-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-2147158336 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-2147158336 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-2147158336 |P2Thread1of1ForFork2_#t~ite40_Out-2147158336|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite40_Out-2147158336|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2147158336, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2147158336} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2147158336, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2147158336, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out-2147158336|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 17:48:34,863 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L797-->L797-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In731745472 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In731745472 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In731745472 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In731745472 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite41_Out731745472| ~z$w_buff1_used~0_In731745472) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite41_Out731745472| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In731745472, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In731745472, ~z$w_buff1_used~0=~z$w_buff1_used~0_In731745472, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In731745472} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out731745472|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In731745472, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In731745472, ~z$w_buff1_used~0=~z$w_buff1_used~0_In731745472, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In731745472} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 17:48:34,881 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1094120015 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1094120015 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite42_Out-1094120015|)) (and (= |P2Thread1of1ForFork2_#t~ite42_Out-1094120015| ~z$r_buff0_thd3~0_In-1094120015) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1094120015, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1094120015} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-1094120015|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1094120015, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1094120015} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 17:48:34,881 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L799-->L799-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-473415558 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-473415558 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-473415558 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-473415558 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite43_Out-473415558|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$r_buff1_thd3~0_In-473415558 |P2Thread1of1ForFork2_#t~ite43_Out-473415558|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-473415558, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-473415558, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-473415558, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-473415558} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-473415558, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-473415558, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-473415558|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-473415558, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-473415558} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 17:48:34,881 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~z$r_buff1_thd3~0_167 |v_P2Thread1of1ForFork2_#t~ite43_38|)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_167, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_37|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 17:48:34,881 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L746-->L746-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1639850088 256))) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-1639850088 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd1~0_In-1639850088 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1639850088 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite8_Out-1639850088| ~z$r_buff1_thd1~0_In-1639850088) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P0Thread1of1ForFork0_#t~ite8_Out-1639850088| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1639850088, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1639850088, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1639850088, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1639850088} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1639850088, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1639850088|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1639850088, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1639850088, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1639850088} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:48:34,881 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L746-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_159 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_159, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:48:34,882 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L822-1-->L828: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:48:34,882 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L828-2-->L828-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite48_Out1381934972| |ULTIMATE.start_main_#t~ite47_Out1381934972|)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1381934972 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1381934972 256)))) (or (and (not .cse0) (= ~z$w_buff1~0_In1381934972 |ULTIMATE.start_main_#t~ite47_Out1381934972|) .cse1 (not .cse2)) (and (= ~z~0_In1381934972 |ULTIMATE.start_main_#t~ite47_Out1381934972|) .cse1 (or .cse2 .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1381934972, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1381934972, ~z$w_buff1~0=~z$w_buff1~0_In1381934972, ~z~0=~z~0_In1381934972} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1381934972, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1381934972|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1381934972, ~z$w_buff1~0=~z$w_buff1~0_In1381934972, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1381934972|, ~z~0=~z~0_In1381934972} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:48:34,882 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L829-->L829-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In2080737174 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In2080737174 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out2080737174| ~z$w_buff0_used~0_In2080737174) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out2080737174|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2080737174, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2080737174} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2080737174, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2080737174, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out2080737174|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:48:34,883 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L830-->L830-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In2091308222 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In2091308222 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In2091308222 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In2091308222 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out2091308222|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In2091308222 |ULTIMATE.start_main_#t~ite50_Out2091308222|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2091308222, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2091308222, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2091308222, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2091308222} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out2091308222|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2091308222, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2091308222, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2091308222, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2091308222} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:48:34,883 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L831-->L831-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-2121974084 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-2121974084 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-2121974084| 0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite51_Out-2121974084| ~z$r_buff0_thd0~0_In-2121974084) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2121974084, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2121974084} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2121974084, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-2121974084|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2121974084} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:48:34,884 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L832-->L832-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-443706326 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-443706326 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-443706326 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-443706326 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-443706326| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$r_buff1_thd0~0_In-443706326 |ULTIMATE.start_main_#t~ite52_Out-443706326|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-443706326, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-443706326, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-443706326, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-443706326} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-443706326|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-443706326, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-443706326, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-443706326, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-443706326} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:48:34,884 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 2 v_~x~0_130) (= 0 v_~__unbuffered_p2_EAX~0_21) (= v_~y~0_23 2))) 1 0)) 0 1)) (= v_~z$r_buff1_thd0~0_167 |v_ULTIMATE.start_main_#t~ite52_35|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:48:34,936 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:48:34 BasicIcfg [2019-12-07 17:48:34,936 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:48:34,936 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:48:34,936 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:48:34,936 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:48:34,936 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:46:52" (3/4) ... [2019-12-07 17:48:34,938 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:48:34,938 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= v_~z$r_buff0_thd0~0_144 0) (= v_~z$r_buff0_thd1~0_230 0) (= v_~z$w_buff0_used~0_947 0) (= v_~z$r_buff1_thd1~0_185 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1495~0.base_44|) 0) (= 0 |v_ULTIMATE.start_main_~#t1495~0.offset_28|) (= v_~z$w_buff1_used~0_563 0) (= v_~weak$$choice2~0_147 0) (= 0 v_~z$r_buff1_thd3~0_352) (= 0 v_~x~0_159) (< 0 |v_#StackHeapBarrier_17|) (= v_~z$read_delayed~0_6 0) (= v_~z$mem_tmp~0_24 0) (= v_~z$r_buff0_thd2~0_126 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1495~0.base_44| 4)) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_cnt~0_155 0) (= v_~z$r_buff1_thd2~0_201 0) (= 0 v_~z$r_buff0_thd3~0_371) (= |v_#valid_80| (store .cse0 |v_ULTIMATE.start_main_~#t1495~0.base_44| 1)) (= |v_#memory_int_19| (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1495~0.base_44| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1495~0.base_44|) |v_ULTIMATE.start_main_~#t1495~0.offset_28| 0))) (= v_~main$tmp_guard1~0_38 0) (= v_~z$r_buff1_thd0~0_199 0) (= 0 |v_#NULL.base_7|) (= 0 v_~weak$$choice0~0_19) (= v_~z$w_buff1~0_328 0) (= v_~z~0_152 0) (= v_~z$w_buff0~0_540 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$flush_delayed~0_35) (= v_~y~0_49 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1495~0.base_44|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1496~0.base=|v_ULTIMATE.start_main_~#t1496~0.base_44|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_201, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_59|, ULTIMATE.start_main_~#t1497~0.offset=|v_ULTIMATE.start_main_~#t1497~0.offset_18|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_328, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_37|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_99|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_75|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_199, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ~y~0=v_~y~0_49, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_126, ULTIMATE.start_main_~#t1496~0.offset=|v_ULTIMATE.start_main_~#t1496~0.offset_28|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_947, ~z$w_buff0~0=v_~z$w_buff0~0_540, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_352, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_563, ~z$flush_delayed~0=v_~z$flush_delayed~0_35, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_~#t1497~0.base=|v_ULTIMATE.start_main_~#t1497~0.base_25|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t1495~0.offset=|v_ULTIMATE.start_main_~#t1495~0.offset_28|, ~weak$$choice0~0=v_~weak$$choice0~0_19, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, #valid=|v_#valid_80|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_185, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t1495~0.base=|v_ULTIMATE.start_main_~#t1495~0.base_44|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_371, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~z~0=v_~z~0_152, ~weak$$choice2~0=v_~weak$$choice2~0_147, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_230, ~x~0=v_~x~0_159} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1496~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1497~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1496~0.offset, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1497~0.base, #NULL.base, ULTIMATE.start_main_~#t1495~0.offset, ~weak$$choice0~0, ULTIMATE.start_main_#res, #valid, ~z$r_buff1_thd1~0, #memory_int, ULTIMATE.start_main_~#t1495~0.base, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 17:48:34,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] L818-1-->L820: Formula: (and (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1496~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1496~0.base_13|)) (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1496~0.base_13|) 0) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1496~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1496~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1496~0.base_13|) |v_ULTIMATE.start_main_~#t1496~0.offset_11| 1)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t1496~0.offset_11|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1496~0.base_13| 4) |v_#length_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1496~0.base=|v_ULTIMATE.start_main_~#t1496~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1496~0.offset=|v_ULTIMATE.start_main_~#t1496~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1496~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1496~0.offset] because there is no mapped edge [2019-12-07 17:48:34,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L820-1-->L822: Formula: (and (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1497~0.base_13|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1497~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1497~0.base_13|) |v_ULTIMATE.start_main_~#t1497~0.offset_11| 2)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t1497~0.base_13| 0)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1497~0.base_13| 4)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1497~0.base_13| 1)) (= |v_ULTIMATE.start_main_~#t1497~0.offset_11| 0) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1497~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1497~0.offset=|v_ULTIMATE.start_main_~#t1497~0.offset_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1497~0.base=|v_ULTIMATE.start_main_~#t1497~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1497~0.offset, #length, ULTIMATE.start_main_~#t1497~0.base] because there is no mapped edge [2019-12-07 17:48:34,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] P0ENTRY-->L4-3: Formula: (and (= v_P0Thread1of1ForFork0_~arg.offset_12 |v_P0Thread1of1ForFork0_#in~arg.offset_14|) (= v_~z$w_buff0_used~0_163 v_~z$w_buff1_used~0_112) (= (ite (not (and (not (= (mod v_~z$w_buff1_used~0_112 256) 0)) (not (= (mod v_~z$w_buff0_used~0_162 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (= v_~z$w_buff0~0_38 v_~z$w_buff1~0_37) (= v_~z$w_buff0_used~0_162 1) (= 1 v_~z$w_buff0~0_37) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 0)) (= v_P0Thread1of1ForFork0_~arg.base_12 |v_P0Thread1of1ForFork0_#in~arg.base_14|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_163, ~z$w_buff0~0=v_~z$w_buff0~0_38, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_162, ~z$w_buff0~0=v_~z$w_buff0~0_37, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_112, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|, ~z$w_buff1~0=v_~z$w_buff1~0_37, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_12, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_12} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:48:34,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L784-->L784-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In809516594 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite21_Out809516594| |P2Thread1of1ForFork2_#t~ite20_Out809516594|) (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In809516594 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In809516594 256)) (and (= 0 (mod ~z$w_buff1_used~0_In809516594 256)) .cse0) (and (= (mod ~z$r_buff1_thd3~0_In809516594 256) 0) .cse0))) .cse1 (= ~z$w_buff0~0_In809516594 |P2Thread1of1ForFork2_#t~ite20_Out809516594|)) (and (= ~z$w_buff0~0_In809516594 |P2Thread1of1ForFork2_#t~ite21_Out809516594|) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite20_In809516594| |P2Thread1of1ForFork2_#t~ite20_Out809516594|)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In809516594, ~z$w_buff0_used~0=~z$w_buff0_used~0_In809516594, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_In809516594|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In809516594, ~z$w_buff1_used~0=~z$w_buff1_used~0_In809516594, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In809516594, ~weak$$choice2~0=~weak$$choice2~0_In809516594} OutVars{~z$w_buff0~0=~z$w_buff0~0_In809516594, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out809516594|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In809516594, P2Thread1of1ForFork2_#t~ite21=|P2Thread1of1ForFork2_#t~ite21_Out809516594|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In809516594, ~z$w_buff1_used~0=~z$w_buff1_used~0_In809516594, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In809516594, ~weak$$choice2~0=~weak$$choice2~0_In809516594} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 17:48:34,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L762-2-->L762-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In844759704 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In844759704 256) 0)) (.cse0 (= |P1Thread1of1ForFork1_#t~ite9_Out844759704| |P1Thread1of1ForFork1_#t~ite10_Out844759704|))) (or (and (= ~z$w_buff1~0_In844759704 |P1Thread1of1ForFork1_#t~ite9_Out844759704|) .cse0 (not .cse1) (not .cse2)) (and (or .cse1 .cse2) (= ~z~0_In844759704 |P1Thread1of1ForFork1_#t~ite9_Out844759704|) .cse0))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In844759704, ~z$w_buff1_used~0=~z$w_buff1_used~0_In844759704, ~z$w_buff1~0=~z$w_buff1~0_In844759704, ~z~0=~z~0_In844759704} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out844759704|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In844759704, ~z$w_buff1_used~0=~z$w_buff1_used~0_In844759704, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out844759704|, ~z$w_buff1~0=~z$w_buff1~0_In844759704, ~z~0=~z~0_In844759704} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 17:48:34,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L743-->L743-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In1733040433 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1733040433 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out1733040433| ~z$w_buff0_used~0_In1733040433) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out1733040433| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1733040433, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1733040433} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1733040433|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1733040433, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1733040433} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:48:34,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L744-->L744-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-1449176908 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1449176908 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1449176908 256))) (.cse3 (= (mod ~z$r_buff1_thd1~0_In-1449176908 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-1449176908 |P0Thread1of1ForFork0_#t~ite6_Out-1449176908|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1449176908|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1449176908, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1449176908, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1449176908, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1449176908} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1449176908|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1449176908, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1449176908, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1449176908, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1449176908} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:48:34,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L745-->L746: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1139643878 256))) (.cse2 (= ~z$r_buff0_thd1~0_In-1139643878 ~z$r_buff0_thd1~0_Out-1139643878)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1139643878 256)))) (or (and (not .cse0) (not .cse1) (= 0 ~z$r_buff0_thd1~0_Out-1139643878)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1139643878, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1139643878} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1139643878, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1139643878|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1139643878} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:48:34,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L763-->L763-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In1544286056 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1544286056 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out1544286056|) (not .cse1)) (and (= ~z$w_buff0_used~0_In1544286056 |P1Thread1of1ForFork1_#t~ite11_Out1544286056|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1544286056, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1544286056} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1544286056, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1544286056|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1544286056} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:48:34,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L764-->L764-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd2~0_In-918347524 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-918347524 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-918347524 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-918347524 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out-918347524| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In-918347524 |P1Thread1of1ForFork1_#t~ite12_Out-918347524|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-918347524, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-918347524, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-918347524, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-918347524} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-918347524, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-918347524, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-918347524, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-918347524|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-918347524} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:48:34,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In204024178 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In204024178 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite13_Out204024178| 0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out204024178| ~z$r_buff0_thd2~0_In204024178) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In204024178, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In204024178} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In204024178, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out204024178|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In204024178} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 17:48:34,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L766-->L766-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In416775555 256))) (.cse2 (= (mod ~z$r_buff1_thd2~0_In416775555 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In416775555 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In416775555 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out416775555| ~z$r_buff1_thd2~0_In416775555) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out416775555| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In416775555, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In416775555, ~z$w_buff1_used~0=~z$w_buff1_used~0_In416775555, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In416775555} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In416775555, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In416775555, ~z$w_buff1_used~0=~z$w_buff1_used~0_In416775555, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out416775555|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In416775555} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:48:34,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [854] [854] L766-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~z$r_buff1_thd2~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_92, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:48:34,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L788-->L789: Formula: (and (= v_~z$r_buff0_thd3~0_137 v_~z$r_buff0_thd3~0_136) (not (= (mod v_~weak$$choice2~0_34 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_137, ~weak$$choice2~0=v_~weak$$choice2~0_34} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_10|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_34} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 17:48:34,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L789-->L789-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In2128241816 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite35_Out2128241816| ~z$r_buff1_thd3~0_In2128241816) .cse0 (= |P2Thread1of1ForFork2_#t~ite36_Out2128241816| |P2Thread1of1ForFork2_#t~ite35_Out2128241816|) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In2128241816 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In2128241816 256)) (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In2128241816 256))) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In2128241816 256)))))) (and (= |P2Thread1of1ForFork2_#t~ite35_In2128241816| |P2Thread1of1ForFork2_#t~ite35_Out2128241816|) (= |P2Thread1of1ForFork2_#t~ite36_Out2128241816| ~z$r_buff1_thd3~0_In2128241816) (not .cse0)))) InVars {P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_In2128241816|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2128241816, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2128241816, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2128241816, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2128241816, ~weak$$choice2~0=~weak$$choice2~0_In2128241816} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out2128241816|, P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out2128241816|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2128241816, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2128241816, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2128241816, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2128241816, ~weak$$choice2~0=~weak$$choice2~0_In2128241816} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35, P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 17:48:34,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L791-->L795: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= v_~z~0_62 v_~z$mem_tmp~0_7) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_7, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_62} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 17:48:34,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L795-2-->L795-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork2_#t~ite39_Out945982351| |P2Thread1of1ForFork2_#t~ite38_Out945982351|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In945982351 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In945982351 256) 0))) (or (and (not .cse0) (= ~z$w_buff1~0_In945982351 |P2Thread1of1ForFork2_#t~ite38_Out945982351|) (not .cse1) .cse2) (and .cse2 (or .cse1 .cse0) (= |P2Thread1of1ForFork2_#t~ite38_Out945982351| ~z~0_In945982351)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In945982351, ~z$w_buff1_used~0=~z$w_buff1_used~0_In945982351, ~z$w_buff1~0=~z$w_buff1~0_In945982351, ~z~0=~z~0_In945982351} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In945982351, ~z$w_buff1_used~0=~z$w_buff1_used~0_In945982351, ~z$w_buff1~0=~z$w_buff1~0_In945982351, ~z~0=~z~0_In945982351, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out945982351|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out945982351|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 17:48:34,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L796-->L796-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-2147158336 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-2147158336 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-2147158336 |P2Thread1of1ForFork2_#t~ite40_Out-2147158336|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite40_Out-2147158336|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2147158336, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2147158336} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2147158336, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2147158336, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out-2147158336|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 17:48:34,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L797-->L797-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In731745472 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In731745472 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In731745472 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In731745472 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite41_Out731745472| ~z$w_buff1_used~0_In731745472) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite41_Out731745472| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In731745472, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In731745472, ~z$w_buff1_used~0=~z$w_buff1_used~0_In731745472, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In731745472} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out731745472|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In731745472, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In731745472, ~z$w_buff1_used~0=~z$w_buff1_used~0_In731745472, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In731745472} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 17:48:34,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1094120015 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1094120015 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite42_Out-1094120015|)) (and (= |P2Thread1of1ForFork2_#t~ite42_Out-1094120015| ~z$r_buff0_thd3~0_In-1094120015) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1094120015, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1094120015} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-1094120015|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1094120015, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1094120015} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 17:48:34,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L799-->L799-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-473415558 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-473415558 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-473415558 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-473415558 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite43_Out-473415558|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$r_buff1_thd3~0_In-473415558 |P2Thread1of1ForFork2_#t~ite43_Out-473415558|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-473415558, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-473415558, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-473415558, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-473415558} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-473415558, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-473415558, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-473415558|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-473415558, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-473415558} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 17:48:34,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~z$r_buff1_thd3~0_167 |v_P2Thread1of1ForFork2_#t~ite43_38|)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_167, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_37|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 17:48:34,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L746-->L746-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1639850088 256))) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-1639850088 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd1~0_In-1639850088 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1639850088 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite8_Out-1639850088| ~z$r_buff1_thd1~0_In-1639850088) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P0Thread1of1ForFork0_#t~ite8_Out-1639850088| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1639850088, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1639850088, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1639850088, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1639850088} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1639850088, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1639850088|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1639850088, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1639850088, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1639850088} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:48:34,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L746-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_159 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_159, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:48:34,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L822-1-->L828: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:48:34,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L828-2-->L828-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite48_Out1381934972| |ULTIMATE.start_main_#t~ite47_Out1381934972|)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1381934972 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1381934972 256)))) (or (and (not .cse0) (= ~z$w_buff1~0_In1381934972 |ULTIMATE.start_main_#t~ite47_Out1381934972|) .cse1 (not .cse2)) (and (= ~z~0_In1381934972 |ULTIMATE.start_main_#t~ite47_Out1381934972|) .cse1 (or .cse2 .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1381934972, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1381934972, ~z$w_buff1~0=~z$w_buff1~0_In1381934972, ~z~0=~z~0_In1381934972} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1381934972, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1381934972|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1381934972, ~z$w_buff1~0=~z$w_buff1~0_In1381934972, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1381934972|, ~z~0=~z~0_In1381934972} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:48:34,950 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L829-->L829-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In2080737174 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In2080737174 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out2080737174| ~z$w_buff0_used~0_In2080737174) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out2080737174|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2080737174, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2080737174} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2080737174, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2080737174, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out2080737174|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:48:34,950 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L830-->L830-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In2091308222 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In2091308222 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In2091308222 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In2091308222 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out2091308222|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In2091308222 |ULTIMATE.start_main_#t~ite50_Out2091308222|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2091308222, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2091308222, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2091308222, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2091308222} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out2091308222|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2091308222, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2091308222, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2091308222, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2091308222} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:48:34,951 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L831-->L831-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-2121974084 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-2121974084 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-2121974084| 0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite51_Out-2121974084| ~z$r_buff0_thd0~0_In-2121974084) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2121974084, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2121974084} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2121974084, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-2121974084|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2121974084} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:48:34,951 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L832-->L832-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-443706326 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-443706326 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-443706326 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-443706326 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-443706326| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$r_buff1_thd0~0_In-443706326 |ULTIMATE.start_main_#t~ite52_Out-443706326|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-443706326, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-443706326, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-443706326, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-443706326} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-443706326|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-443706326, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-443706326, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-443706326, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-443706326} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:48:34,951 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 2 v_~x~0_130) (= 0 v_~__unbuffered_p2_EAX~0_21) (= v_~y~0_23 2))) 1 0)) 0 1)) (= v_~z$r_buff1_thd0~0_167 |v_ULTIMATE.start_main_#t~ite52_35|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:48:35,001 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_e0da10b9-16a7-4ef6-9891-0c2efaa0e9b4/bin/uautomizer/witness.graphml [2019-12-07 17:48:35,001 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:48:35,002 INFO L168 Benchmark]: Toolchain (without parser) took 103214.07 ms. Allocated memory was 1.0 GB in the beginning and 7.1 GB in the end (delta: 6.1 GB). Free memory was 940.7 MB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 2.5 GB. Max. memory is 11.5 GB. [2019-12-07 17:48:35,002 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:48:35,002 INFO L168 Benchmark]: CACSL2BoogieTranslator took 413.98 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.9 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -123.0 MB). Peak memory consumption was 19.6 MB. Max. memory is 11.5 GB. [2019-12-07 17:48:35,003 INFO L168 Benchmark]: Boogie Procedure Inliner took 53.51 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:48:35,003 INFO L168 Benchmark]: Boogie Preprocessor took 34.79 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:48:35,003 INFO L168 Benchmark]: RCFGBuilder took 423.84 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 57.3 MB). Peak memory consumption was 57.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:48:35,003 INFO L168 Benchmark]: TraceAbstraction took 102219.40 ms. Allocated memory was 1.1 GB in the beginning and 7.1 GB in the end (delta: 6.0 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.9 GB. Max. memory is 11.5 GB. [2019-12-07 17:48:35,004 INFO L168 Benchmark]: Witness Printer took 65.06 ms. Allocated memory is still 7.1 GB. Free memory was 4.5 GB in the beginning and 4.5 GB in the end (delta: 40.2 MB). Peak memory consumption was 40.2 MB. Max. memory is 11.5 GB. [2019-12-07 17:48:35,005 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 413.98 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.9 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -123.0 MB). Peak memory consumption was 19.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 53.51 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 34.79 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 423.84 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 57.3 MB). Peak memory consumption was 57.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 102219.40 ms. Allocated memory was 1.1 GB in the beginning and 7.1 GB in the end (delta: 6.0 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.9 GB. Max. memory is 11.5 GB. * Witness Printer took 65.06 ms. Allocated memory is still 7.1 GB. Free memory was 4.5 GB in the beginning and 4.5 GB in the end (delta: 40.2 MB). Peak memory consumption was 40.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 174 ProgramPointsBefore, 92 ProgramPointsAfterwards, 211 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 31 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 31 ChoiceCompositions, 6843 VarBasedMoverChecksPositive, 273 VarBasedMoverChecksNegative, 91 SemBasedMoverChecksPositive, 240 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 77200 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L818] FCALL, FORK 0 pthread_create(&t1495, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L820] FCALL, FORK 0 pthread_create(&t1496, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L822] FCALL, FORK 0 pthread_create(&t1497, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L732] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L733] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L734] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L735] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L736] 1 z$r_buff0_thd1 = (_Bool)1 [L739] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L756] 2 x = 2 [L759] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L776] 3 y = 2 [L779] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L780] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L781] 3 z$flush_delayed = weak$$choice2 [L782] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L783] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L783] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L784] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L785] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L786] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L786] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L762] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L743] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L744] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L762] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L763] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L764] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L765] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L787] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L789] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L790] 3 __unbuffered_p2_EAX = z VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L796] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L797] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L798] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L828] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L828] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L829] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L830] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L831] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 165 locations, 2 error locations. Result: UNSAFE, OverallTime: 102.0s, OverallIterations: 29, TraceHistogramMax: 1, AutomataDifference: 18.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6355 SDtfs, 6265 SDslu, 17404 SDs, 0 SdLazy, 7048 SolverSat, 245 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 267 GetRequests, 50 SyntacticMatches, 17 SemanticMatches, 200 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1325 ImplicationChecksByTransitivity, 1.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=195815occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 66.5s AutomataMinimizationTime, 28 MinimizatonAttempts, 359726 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 1077 NumberOfCodeBlocks, 1077 NumberOfCodeBlocksAsserted, 29 NumberOfCheckSat, 982 ConstructedInterpolants, 0 QuantifiedInterpolants, 213974 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 28 InterpolantComputations, 28 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...