./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix056_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_8d95f289-4c3b-416a-8def-c0d7bec8c213/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_8d95f289-4c3b-416a-8def-c0d7bec8c213/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_8d95f289-4c3b-416a-8def-c0d7bec8c213/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_8d95f289-4c3b-416a-8def-c0d7bec8c213/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix056_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_8d95f289-4c3b-416a-8def-c0d7bec8c213/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_8d95f289-4c3b-416a-8def-c0d7bec8c213/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 01a2d2a86964760e28ea31d301e2441385016406 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 10:27:34,557 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 10:27:34,558 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 10:27:34,566 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 10:27:34,566 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 10:27:34,567 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 10:27:34,568 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 10:27:34,569 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 10:27:34,571 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 10:27:34,572 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 10:27:34,573 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 10:27:34,574 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 10:27:34,574 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 10:27:34,575 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 10:27:34,576 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 10:27:34,577 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 10:27:34,578 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 10:27:34,579 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 10:27:34,580 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 10:27:34,582 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 10:27:34,584 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 10:27:34,585 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 10:27:34,586 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 10:27:34,586 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 10:27:34,589 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 10:27:34,589 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 10:27:34,589 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 10:27:34,590 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 10:27:34,590 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 10:27:34,591 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 10:27:34,591 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 10:27:34,592 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 10:27:34,592 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 10:27:34,593 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 10:27:34,593 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 10:27:34,594 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 10:27:34,594 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 10:27:34,594 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 10:27:34,594 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 10:27:34,595 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 10:27:34,596 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 10:27:34,596 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_8d95f289-4c3b-416a-8def-c0d7bec8c213/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 10:27:34,608 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 10:27:34,608 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 10:27:34,609 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 10:27:34,609 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 10:27:34,609 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 10:27:34,609 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 10:27:34,609 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 10:27:34,609 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 10:27:34,609 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 10:27:34,609 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 10:27:34,609 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 10:27:34,610 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 10:27:34,610 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 10:27:34,610 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 10:27:34,610 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 10:27:34,610 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 10:27:34,610 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 10:27:34,611 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 10:27:34,611 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 10:27:34,611 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 10:27:34,611 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 10:27:34,611 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:27:34,611 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 10:27:34,611 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 10:27:34,611 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 10:27:34,611 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 10:27:34,612 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 10:27:34,612 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 10:27:34,612 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 10:27:34,612 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_8d95f289-4c3b-416a-8def-c0d7bec8c213/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 01a2d2a86964760e28ea31d301e2441385016406 [2019-12-07 10:27:34,726 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 10:27:34,735 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 10:27:34,738 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 10:27:34,739 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 10:27:34,739 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 10:27:34,740 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_8d95f289-4c3b-416a-8def-c0d7bec8c213/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix056_pso.opt.i [2019-12-07 10:27:34,781 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_8d95f289-4c3b-416a-8def-c0d7bec8c213/bin/uautomizer/data/b3ee2be8a/c7025124d80c40f5806dc09e8e705dad/FLAG8ea5eb344 [2019-12-07 10:27:35,153 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 10:27:35,153 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_8d95f289-4c3b-416a-8def-c0d7bec8c213/sv-benchmarks/c/pthread-wmm/mix056_pso.opt.i [2019-12-07 10:27:35,163 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_8d95f289-4c3b-416a-8def-c0d7bec8c213/bin/uautomizer/data/b3ee2be8a/c7025124d80c40f5806dc09e8e705dad/FLAG8ea5eb344 [2019-12-07 10:27:35,552 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_8d95f289-4c3b-416a-8def-c0d7bec8c213/bin/uautomizer/data/b3ee2be8a/c7025124d80c40f5806dc09e8e705dad [2019-12-07 10:27:35,554 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 10:27:35,555 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 10:27:35,556 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 10:27:35,556 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 10:27:35,558 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 10:27:35,559 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:27:35" (1/1) ... [2019-12-07 10:27:35,561 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@77919ae6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:27:35, skipping insertion in model container [2019-12-07 10:27:35,561 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:27:35" (1/1) ... [2019-12-07 10:27:35,566 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 10:27:35,593 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 10:27:35,832 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:27:35,840 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 10:27:35,884 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:27:35,930 INFO L208 MainTranslator]: Completed translation [2019-12-07 10:27:35,931 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:27:35 WrapperNode [2019-12-07 10:27:35,931 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 10:27:35,931 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 10:27:35,931 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 10:27:35,932 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 10:27:35,937 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:27:35" (1/1) ... [2019-12-07 10:27:35,951 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:27:35" (1/1) ... [2019-12-07 10:27:35,975 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 10:27:35,975 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 10:27:35,976 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 10:27:35,976 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 10:27:35,982 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:27:35" (1/1) ... [2019-12-07 10:27:35,982 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:27:35" (1/1) ... [2019-12-07 10:27:35,986 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:27:35" (1/1) ... [2019-12-07 10:27:35,986 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:27:35" (1/1) ... [2019-12-07 10:27:35,993 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:27:35" (1/1) ... [2019-12-07 10:27:35,996 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:27:35" (1/1) ... [2019-12-07 10:27:35,998 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:27:35" (1/1) ... [2019-12-07 10:27:36,002 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 10:27:36,003 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 10:27:36,003 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 10:27:36,003 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 10:27:36,003 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:27:35" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_8d95f289-4c3b-416a-8def-c0d7bec8c213/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:27:36,045 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 10:27:36,045 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 10:27:36,046 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 10:27:36,046 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 10:27:36,046 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 10:27:36,046 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 10:27:36,046 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 10:27:36,046 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 10:27:36,046 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 10:27:36,046 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 10:27:36,046 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 10:27:36,046 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 10:27:36,046 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 10:27:36,047 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 10:27:36,408 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 10:27:36,408 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 10:27:36,409 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:27:36 BoogieIcfgContainer [2019-12-07 10:27:36,409 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 10:27:36,410 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 10:27:36,410 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 10:27:36,412 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 10:27:36,412 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 10:27:35" (1/3) ... [2019-12-07 10:27:36,413 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@33e9760d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:27:36, skipping insertion in model container [2019-12-07 10:27:36,413 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:27:35" (2/3) ... [2019-12-07 10:27:36,413 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@33e9760d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:27:36, skipping insertion in model container [2019-12-07 10:27:36,413 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:27:36" (3/3) ... [2019-12-07 10:27:36,414 INFO L109 eAbstractionObserver]: Analyzing ICFG mix056_pso.opt.i [2019-12-07 10:27:36,420 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 10:27:36,421 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 10:27:36,426 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 10:27:36,426 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 10:27:36,447 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,448 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,448 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,448 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,448 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,448 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,449 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,449 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,449 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,449 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,449 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,449 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,449 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,450 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,450 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,450 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,450 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,450 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,450 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,450 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,452 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,452 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,452 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,452 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,452 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,452 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,453 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,453 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,453 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,453 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,453 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,454 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,454 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,454 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,454 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,454 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,454 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,454 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,455 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,455 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,455 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,455 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,455 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,455 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,455 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,455 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,456 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,456 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,456 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,456 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,456 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,456 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,456 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:27:36,472 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 10:27:36,488 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 10:27:36,488 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 10:27:36,488 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 10:27:36,488 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 10:27:36,488 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 10:27:36,488 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 10:27:36,488 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 10:27:36,488 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 10:27:36,499 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 162 places, 193 transitions [2019-12-07 10:27:36,500 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 162 places, 193 transitions [2019-12-07 10:27:36,551 INFO L134 PetriNetUnfolder]: 41/190 cut-off events. [2019-12-07 10:27:36,551 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:27:36,560 INFO L76 FinitePrefix]: Finished finitePrefix Result has 200 conditions, 190 events. 41/190 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 465 event pairs. 9/156 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 10:27:36,571 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 162 places, 193 transitions [2019-12-07 10:27:36,596 INFO L134 PetriNetUnfolder]: 41/190 cut-off events. [2019-12-07 10:27:36,596 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:27:36,599 INFO L76 FinitePrefix]: Finished finitePrefix Result has 200 conditions, 190 events. 41/190 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 465 event pairs. 9/156 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 10:27:36,609 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-12-07 10:27:36,609 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 10:27:39,225 WARN L192 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 10:27:39,306 INFO L206 etLargeBlockEncoding]: Checked pairs total: 48383 [2019-12-07 10:27:39,306 INFO L214 etLargeBlockEncoding]: Total number of compositions: 109 [2019-12-07 10:27:39,308 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 92 transitions [2019-12-07 10:27:40,049 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 16526 states. [2019-12-07 10:27:40,050 INFO L276 IsEmpty]: Start isEmpty. Operand 16526 states. [2019-12-07 10:27:40,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 10:27:40,055 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:40,055 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:40,055 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:40,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:40,059 INFO L82 PathProgramCache]: Analyzing trace with hash 2128093424, now seen corresponding path program 1 times [2019-12-07 10:27:40,065 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:40,065 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [814446052] [2019-12-07 10:27:40,065 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:40,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:40,213 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:40,213 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [814446052] [2019-12-07 10:27:40,214 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:40,214 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:27:40,215 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [941580810] [2019-12-07 10:27:40,218 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:27:40,218 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:40,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:27:40,227 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:27:40,228 INFO L87 Difference]: Start difference. First operand 16526 states. Second operand 3 states. [2019-12-07 10:27:40,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:40,440 INFO L93 Difference]: Finished difference Result 16398 states and 61580 transitions. [2019-12-07 10:27:40,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:27:40,441 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 10:27:40,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:40,555 INFO L225 Difference]: With dead ends: 16398 [2019-12-07 10:27:40,555 INFO L226 Difference]: Without dead ends: 16062 [2019-12-07 10:27:40,556 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:27:40,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16062 states. [2019-12-07 10:27:40,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16062 to 16062. [2019-12-07 10:27:40,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16062 states. [2019-12-07 10:27:41,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16062 states to 16062 states and 60376 transitions. [2019-12-07 10:27:41,110 INFO L78 Accepts]: Start accepts. Automaton has 16062 states and 60376 transitions. Word has length 7 [2019-12-07 10:27:41,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:41,111 INFO L462 AbstractCegarLoop]: Abstraction has 16062 states and 60376 transitions. [2019-12-07 10:27:41,111 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:27:41,111 INFO L276 IsEmpty]: Start isEmpty. Operand 16062 states and 60376 transitions. [2019-12-07 10:27:41,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 10:27:41,114 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:41,114 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:41,115 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:41,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:41,115 INFO L82 PathProgramCache]: Analyzing trace with hash -1390331573, now seen corresponding path program 1 times [2019-12-07 10:27:41,115 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:41,115 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [62503975] [2019-12-07 10:27:41,115 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:41,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:41,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:41,172 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [62503975] [2019-12-07 10:27:41,172 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:41,172 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:27:41,172 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [44944335] [2019-12-07 10:27:41,173 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:27:41,173 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:41,174 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:27:41,174 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:27:41,174 INFO L87 Difference]: Start difference. First operand 16062 states and 60376 transitions. Second operand 4 states. [2019-12-07 10:27:41,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:41,453 INFO L93 Difference]: Finished difference Result 24942 states and 90524 transitions. [2019-12-07 10:27:41,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:27:41,454 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 10:27:41,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:41,520 INFO L225 Difference]: With dead ends: 24942 [2019-12-07 10:27:41,520 INFO L226 Difference]: Without dead ends: 24928 [2019-12-07 10:27:41,520 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:27:41,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24928 states. [2019-12-07 10:27:42,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24928 to 22166. [2019-12-07 10:27:42,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22166 states. [2019-12-07 10:27:42,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22166 states to 22166 states and 81470 transitions. [2019-12-07 10:27:42,060 INFO L78 Accepts]: Start accepts. Automaton has 22166 states and 81470 transitions. Word has length 13 [2019-12-07 10:27:42,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:42,060 INFO L462 AbstractCegarLoop]: Abstraction has 22166 states and 81470 transitions. [2019-12-07 10:27:42,060 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:27:42,060 INFO L276 IsEmpty]: Start isEmpty. Operand 22166 states and 81470 transitions. [2019-12-07 10:27:42,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 10:27:42,063 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:42,063 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:42,064 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:42,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:42,064 INFO L82 PathProgramCache]: Analyzing trace with hash -1371832765, now seen corresponding path program 1 times [2019-12-07 10:27:42,064 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:42,064 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1521580326] [2019-12-07 10:27:42,064 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:42,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:42,110 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:42,110 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1521580326] [2019-12-07 10:27:42,110 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:42,110 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:27:42,110 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [121932801] [2019-12-07 10:27:42,111 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:27:42,111 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:42,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:27:42,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:27:42,111 INFO L87 Difference]: Start difference. First operand 22166 states and 81470 transitions. Second operand 4 states. [2019-12-07 10:27:42,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:42,333 INFO L93 Difference]: Finished difference Result 27782 states and 100994 transitions. [2019-12-07 10:27:42,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:27:42,333 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 10:27:42,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:42,395 INFO L225 Difference]: With dead ends: 27782 [2019-12-07 10:27:42,395 INFO L226 Difference]: Without dead ends: 27782 [2019-12-07 10:27:42,395 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:27:42,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27782 states. [2019-12-07 10:27:42,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27782 to 24630. [2019-12-07 10:27:42,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24630 states. [2019-12-07 10:27:42,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24630 states to 24630 states and 90262 transitions. [2019-12-07 10:27:42,903 INFO L78 Accepts]: Start accepts. Automaton has 24630 states and 90262 transitions. Word has length 13 [2019-12-07 10:27:42,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:42,903 INFO L462 AbstractCegarLoop]: Abstraction has 24630 states and 90262 transitions. [2019-12-07 10:27:42,903 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:27:42,903 INFO L276 IsEmpty]: Start isEmpty. Operand 24630 states and 90262 transitions. [2019-12-07 10:27:42,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 10:27:42,909 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:42,909 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:42,909 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:42,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:42,909 INFO L82 PathProgramCache]: Analyzing trace with hash -1003212910, now seen corresponding path program 1 times [2019-12-07 10:27:42,909 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:42,910 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1186037883] [2019-12-07 10:27:42,910 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:42,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:42,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:42,962 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1186037883] [2019-12-07 10:27:42,962 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:42,962 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:27:42,962 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1429211752] [2019-12-07 10:27:42,962 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:27:42,962 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:42,962 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:27:42,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:27:42,963 INFO L87 Difference]: Start difference. First operand 24630 states and 90262 transitions. Second operand 5 states. [2019-12-07 10:27:43,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:43,270 INFO L93 Difference]: Finished difference Result 33042 states and 118962 transitions. [2019-12-07 10:27:43,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:27:43,271 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 10:27:43,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:43,336 INFO L225 Difference]: With dead ends: 33042 [2019-12-07 10:27:43,336 INFO L226 Difference]: Without dead ends: 33028 [2019-12-07 10:27:43,336 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:27:43,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33028 states. [2019-12-07 10:27:43,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33028 to 24716. [2019-12-07 10:27:43,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24716 states. [2019-12-07 10:27:43,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24716 states to 24716 states and 90325 transitions. [2019-12-07 10:27:43,943 INFO L78 Accepts]: Start accepts. Automaton has 24716 states and 90325 transitions. Word has length 19 [2019-12-07 10:27:43,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:43,943 INFO L462 AbstractCegarLoop]: Abstraction has 24716 states and 90325 transitions. [2019-12-07 10:27:43,943 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:27:43,943 INFO L276 IsEmpty]: Start isEmpty. Operand 24716 states and 90325 transitions. [2019-12-07 10:27:43,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 10:27:43,963 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:43,963 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:43,963 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:43,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:43,964 INFO L82 PathProgramCache]: Analyzing trace with hash -1251036613, now seen corresponding path program 1 times [2019-12-07 10:27:43,964 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:43,964 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432081769] [2019-12-07 10:27:43,964 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:43,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:43,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:43,995 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [432081769] [2019-12-07 10:27:43,995 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:43,995 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:27:43,996 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [701140939] [2019-12-07 10:27:43,996 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:27:43,996 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:43,996 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:27:43,996 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:27:43,996 INFO L87 Difference]: Start difference. First operand 24716 states and 90325 transitions. Second operand 3 states. [2019-12-07 10:27:44,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:44,110 INFO L93 Difference]: Finished difference Result 30008 states and 109703 transitions. [2019-12-07 10:27:44,110 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:27:44,110 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 10:27:44,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:44,164 INFO L225 Difference]: With dead ends: 30008 [2019-12-07 10:27:44,164 INFO L226 Difference]: Without dead ends: 30008 [2019-12-07 10:27:44,164 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:27:44,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30008 states. [2019-12-07 10:27:44,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30008 to 28190. [2019-12-07 10:27:44,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28190 states. [2019-12-07 10:27:44,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28190 states to 28190 states and 103378 transitions. [2019-12-07 10:27:44,697 INFO L78 Accepts]: Start accepts. Automaton has 28190 states and 103378 transitions. Word has length 27 [2019-12-07 10:27:44,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:44,698 INFO L462 AbstractCegarLoop]: Abstraction has 28190 states and 103378 transitions. [2019-12-07 10:27:44,698 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:27:44,698 INFO L276 IsEmpty]: Start isEmpty. Operand 28190 states and 103378 transitions. [2019-12-07 10:27:44,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 10:27:44,712 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:44,712 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:44,712 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:44,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:44,712 INFO L82 PathProgramCache]: Analyzing trace with hash -1250824263, now seen corresponding path program 1 times [2019-12-07 10:27:44,713 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:44,713 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1295060269] [2019-12-07 10:27:44,713 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:44,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:44,755 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:44,755 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1295060269] [2019-12-07 10:27:44,755 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:44,756 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:27:44,756 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1702204160] [2019-12-07 10:27:44,756 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:27:44,756 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:44,756 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:27:44,756 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:27:44,756 INFO L87 Difference]: Start difference. First operand 28190 states and 103378 transitions. Second operand 3 states. [2019-12-07 10:27:44,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:44,801 INFO L93 Difference]: Finished difference Result 16100 states and 51114 transitions. [2019-12-07 10:27:44,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:27:44,802 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 10:27:44,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:44,823 INFO L225 Difference]: With dead ends: 16100 [2019-12-07 10:27:44,823 INFO L226 Difference]: Without dead ends: 16100 [2019-12-07 10:27:44,823 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:27:44,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16100 states. [2019-12-07 10:27:45,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16100 to 16100. [2019-12-07 10:27:45,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16100 states. [2019-12-07 10:27:45,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16100 states to 16100 states and 51114 transitions. [2019-12-07 10:27:45,043 INFO L78 Accepts]: Start accepts. Automaton has 16100 states and 51114 transitions. Word has length 27 [2019-12-07 10:27:45,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:45,044 INFO L462 AbstractCegarLoop]: Abstraction has 16100 states and 51114 transitions. [2019-12-07 10:27:45,044 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:27:45,044 INFO L276 IsEmpty]: Start isEmpty. Operand 16100 states and 51114 transitions. [2019-12-07 10:27:45,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 10:27:45,051 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:45,051 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:45,051 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:45,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:45,051 INFO L82 PathProgramCache]: Analyzing trace with hash 411430761, now seen corresponding path program 1 times [2019-12-07 10:27:45,052 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:45,052 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665154419] [2019-12-07 10:27:45,052 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:45,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:45,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:45,092 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1665154419] [2019-12-07 10:27:45,092 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:45,092 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:27:45,093 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [827459461] [2019-12-07 10:27:45,093 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:27:45,093 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:45,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:27:45,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:27:45,094 INFO L87 Difference]: Start difference. First operand 16100 states and 51114 transitions. Second operand 4 states. [2019-12-07 10:27:45,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:45,108 INFO L93 Difference]: Finished difference Result 2377 states and 5510 transitions. [2019-12-07 10:27:45,109 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:27:45,109 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 28 [2019-12-07 10:27:45,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:45,111 INFO L225 Difference]: With dead ends: 2377 [2019-12-07 10:27:45,111 INFO L226 Difference]: Without dead ends: 2377 [2019-12-07 10:27:45,111 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:27:45,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2377 states. [2019-12-07 10:27:45,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2377 to 2377. [2019-12-07 10:27:45,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2377 states. [2019-12-07 10:27:45,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2377 states to 2377 states and 5510 transitions. [2019-12-07 10:27:45,130 INFO L78 Accepts]: Start accepts. Automaton has 2377 states and 5510 transitions. Word has length 28 [2019-12-07 10:27:45,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:45,130 INFO L462 AbstractCegarLoop]: Abstraction has 2377 states and 5510 transitions. [2019-12-07 10:27:45,130 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:27:45,131 INFO L276 IsEmpty]: Start isEmpty. Operand 2377 states and 5510 transitions. [2019-12-07 10:27:45,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 10:27:45,133 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:45,133 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:45,133 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:45,133 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:45,133 INFO L82 PathProgramCache]: Analyzing trace with hash -1388136454, now seen corresponding path program 1 times [2019-12-07 10:27:45,133 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:45,134 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1671354521] [2019-12-07 10:27:45,134 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:45,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:45,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:45,185 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1671354521] [2019-12-07 10:27:45,186 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:45,186 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:27:45,186 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1830806495] [2019-12-07 10:27:45,186 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:27:45,186 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:45,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:27:45,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:27:45,186 INFO L87 Difference]: Start difference. First operand 2377 states and 5510 transitions. Second operand 5 states. [2019-12-07 10:27:45,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:45,204 INFO L93 Difference]: Finished difference Result 678 states and 1563 transitions. [2019-12-07 10:27:45,205 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:27:45,205 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 10:27:45,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:45,206 INFO L225 Difference]: With dead ends: 678 [2019-12-07 10:27:45,206 INFO L226 Difference]: Without dead ends: 678 [2019-12-07 10:27:45,206 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:27:45,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 678 states. [2019-12-07 10:27:45,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 678 to 622. [2019-12-07 10:27:45,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 622 states. [2019-12-07 10:27:45,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 622 states to 622 states and 1431 transitions. [2019-12-07 10:27:45,214 INFO L78 Accepts]: Start accepts. Automaton has 622 states and 1431 transitions. Word has length 40 [2019-12-07 10:27:45,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:45,214 INFO L462 AbstractCegarLoop]: Abstraction has 622 states and 1431 transitions. [2019-12-07 10:27:45,215 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:27:45,215 INFO L276 IsEmpty]: Start isEmpty. Operand 622 states and 1431 transitions. [2019-12-07 10:27:45,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 10:27:45,216 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:45,216 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:45,217 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:45,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:45,217 INFO L82 PathProgramCache]: Analyzing trace with hash -826083081, now seen corresponding path program 1 times [2019-12-07 10:27:45,217 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:45,217 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [118719488] [2019-12-07 10:27:45,217 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:45,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:45,294 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:45,294 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [118719488] [2019-12-07 10:27:45,295 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:45,295 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:27:45,295 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1995607240] [2019-12-07 10:27:45,295 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:27:45,295 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:45,296 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:27:45,296 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:27:45,296 INFO L87 Difference]: Start difference. First operand 622 states and 1431 transitions. Second operand 5 states. [2019-12-07 10:27:45,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:45,414 INFO L93 Difference]: Finished difference Result 911 states and 2103 transitions. [2019-12-07 10:27:45,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:27:45,414 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 55 [2019-12-07 10:27:45,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:45,415 INFO L225 Difference]: With dead ends: 911 [2019-12-07 10:27:45,415 INFO L226 Difference]: Without dead ends: 911 [2019-12-07 10:27:45,416 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:27:45,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 911 states. [2019-12-07 10:27:45,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 911 to 821. [2019-12-07 10:27:45,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 821 states. [2019-12-07 10:27:45,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 821 states to 821 states and 1898 transitions. [2019-12-07 10:27:45,423 INFO L78 Accepts]: Start accepts. Automaton has 821 states and 1898 transitions. Word has length 55 [2019-12-07 10:27:45,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:45,423 INFO L462 AbstractCegarLoop]: Abstraction has 821 states and 1898 transitions. [2019-12-07 10:27:45,423 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:27:45,423 INFO L276 IsEmpty]: Start isEmpty. Operand 821 states and 1898 transitions. [2019-12-07 10:27:45,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 10:27:45,424 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:45,424 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:45,424 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:45,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:45,425 INFO L82 PathProgramCache]: Analyzing trace with hash 297273929, now seen corresponding path program 2 times [2019-12-07 10:27:45,425 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:45,425 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [211719786] [2019-12-07 10:27:45,425 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:45,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:45,496 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:45,496 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [211719786] [2019-12-07 10:27:45,496 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:45,496 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 10:27:45,496 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [106783549] [2019-12-07 10:27:45,497 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:27:45,497 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:45,497 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:27:45,497 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:27:45,497 INFO L87 Difference]: Start difference. First operand 821 states and 1898 transitions. Second operand 6 states. [2019-12-07 10:27:45,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:45,701 INFO L93 Difference]: Finished difference Result 1208 states and 2794 transitions. [2019-12-07 10:27:45,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:27:45,701 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 55 [2019-12-07 10:27:45,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:45,702 INFO L225 Difference]: With dead ends: 1208 [2019-12-07 10:27:45,702 INFO L226 Difference]: Without dead ends: 1208 [2019-12-07 10:27:45,702 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:27:45,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1208 states. [2019-12-07 10:27:45,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1208 to 893. [2019-12-07 10:27:45,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 893 states. [2019-12-07 10:27:45,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 893 states to 893 states and 2076 transitions. [2019-12-07 10:27:45,710 INFO L78 Accepts]: Start accepts. Automaton has 893 states and 2076 transitions. Word has length 55 [2019-12-07 10:27:45,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:45,710 INFO L462 AbstractCegarLoop]: Abstraction has 893 states and 2076 transitions. [2019-12-07 10:27:45,710 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:27:45,711 INFO L276 IsEmpty]: Start isEmpty. Operand 893 states and 2076 transitions. [2019-12-07 10:27:45,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 10:27:45,712 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:45,712 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:45,712 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:45,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:45,712 INFO L82 PathProgramCache]: Analyzing trace with hash 1649215159, now seen corresponding path program 3 times [2019-12-07 10:27:45,712 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:45,712 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1548222012] [2019-12-07 10:27:45,712 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:45,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:45,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:45,747 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1548222012] [2019-12-07 10:27:45,747 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:45,747 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:27:45,747 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [899360433] [2019-12-07 10:27:45,747 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:27:45,747 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:45,748 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:27:45,748 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:27:45,748 INFO L87 Difference]: Start difference. First operand 893 states and 2076 transitions. Second operand 3 states. [2019-12-07 10:27:45,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:45,757 INFO L93 Difference]: Finished difference Result 791 states and 1793 transitions. [2019-12-07 10:27:45,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:27:45,757 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 10:27:45,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:45,758 INFO L225 Difference]: With dead ends: 791 [2019-12-07 10:27:45,758 INFO L226 Difference]: Without dead ends: 791 [2019-12-07 10:27:45,758 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:27:45,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 791 states. [2019-12-07 10:27:45,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 791 to 767. [2019-12-07 10:27:45,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 767 states. [2019-12-07 10:27:45,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 767 states to 767 states and 1737 transitions. [2019-12-07 10:27:45,764 INFO L78 Accepts]: Start accepts. Automaton has 767 states and 1737 transitions. Word has length 55 [2019-12-07 10:27:45,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:45,764 INFO L462 AbstractCegarLoop]: Abstraction has 767 states and 1737 transitions. [2019-12-07 10:27:45,764 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:27:45,764 INFO L276 IsEmpty]: Start isEmpty. Operand 767 states and 1737 transitions. [2019-12-07 10:27:45,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 10:27:45,765 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:45,765 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:45,766 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:45,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:45,766 INFO L82 PathProgramCache]: Analyzing trace with hash 684538364, now seen corresponding path program 1 times [2019-12-07 10:27:45,766 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:45,766 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [579243499] [2019-12-07 10:27:45,766 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:45,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:45,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:45,802 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [579243499] [2019-12-07 10:27:45,802 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:45,802 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:27:45,802 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1642324464] [2019-12-07 10:27:45,802 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:27:45,802 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:45,803 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:27:45,803 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:27:45,803 INFO L87 Difference]: Start difference. First operand 767 states and 1737 transitions. Second operand 3 states. [2019-12-07 10:27:45,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:45,831 INFO L93 Difference]: Finished difference Result 766 states and 1735 transitions. [2019-12-07 10:27:45,831 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:27:45,831 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 10:27:45,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:45,832 INFO L225 Difference]: With dead ends: 766 [2019-12-07 10:27:45,832 INFO L226 Difference]: Without dead ends: 766 [2019-12-07 10:27:45,832 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:27:45,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 766 states. [2019-12-07 10:27:45,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 766 to 597. [2019-12-07 10:27:45,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 597 states. [2019-12-07 10:27:45,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 597 states to 597 states and 1345 transitions. [2019-12-07 10:27:45,838 INFO L78 Accepts]: Start accepts. Automaton has 597 states and 1345 transitions. Word has length 56 [2019-12-07 10:27:45,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:45,838 INFO L462 AbstractCegarLoop]: Abstraction has 597 states and 1345 transitions. [2019-12-07 10:27:45,838 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:27:45,838 INFO L276 IsEmpty]: Start isEmpty. Operand 597 states and 1345 transitions. [2019-12-07 10:27:45,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 10:27:45,839 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:45,839 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:45,839 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:45,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:45,839 INFO L82 PathProgramCache]: Analyzing trace with hash 816342703, now seen corresponding path program 1 times [2019-12-07 10:27:45,839 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:45,839 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1535060021] [2019-12-07 10:27:45,839 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:45,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:46,008 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:46,009 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1535060021] [2019-12-07 10:27:46,009 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:46,009 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 10:27:46,009 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [318999590] [2019-12-07 10:27:46,009 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:27:46,009 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:46,009 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:27:46,010 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:27:46,010 INFO L87 Difference]: Start difference. First operand 597 states and 1345 transitions. Second operand 12 states. [2019-12-07 10:27:46,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:46,382 INFO L93 Difference]: Finished difference Result 1387 states and 2744 transitions. [2019-12-07 10:27:46,382 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 10:27:46,383 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 57 [2019-12-07 10:27:46,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:46,383 INFO L225 Difference]: With dead ends: 1387 [2019-12-07 10:27:46,383 INFO L226 Difference]: Without dead ends: 755 [2019-12-07 10:27:46,384 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=173, Invalid=427, Unknown=0, NotChecked=0, Total=600 [2019-12-07 10:27:46,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 755 states. [2019-12-07 10:27:46,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 755 to 535. [2019-12-07 10:27:46,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 535 states. [2019-12-07 10:27:46,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 535 states to 535 states and 1166 transitions. [2019-12-07 10:27:46,415 INFO L78 Accepts]: Start accepts. Automaton has 535 states and 1166 transitions. Word has length 57 [2019-12-07 10:27:46,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:46,415 INFO L462 AbstractCegarLoop]: Abstraction has 535 states and 1166 transitions. [2019-12-07 10:27:46,416 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:27:46,416 INFO L276 IsEmpty]: Start isEmpty. Operand 535 states and 1166 transitions. [2019-12-07 10:27:46,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 10:27:46,416 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:46,416 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:46,417 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:46,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:46,417 INFO L82 PathProgramCache]: Analyzing trace with hash 729563135, now seen corresponding path program 2 times [2019-12-07 10:27:46,417 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:46,417 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [207917326] [2019-12-07 10:27:46,417 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:46,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:46,488 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:46,489 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [207917326] [2019-12-07 10:27:46,489 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:46,489 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:27:46,489 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1799044438] [2019-12-07 10:27:46,489 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:27:46,489 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:46,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:27:46,490 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:27:46,490 INFO L87 Difference]: Start difference. First operand 535 states and 1166 transitions. Second operand 6 states. [2019-12-07 10:27:46,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:46,538 INFO L93 Difference]: Finished difference Result 768 states and 1621 transitions. [2019-12-07 10:27:46,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:27:46,538 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 57 [2019-12-07 10:27:46,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:46,539 INFO L225 Difference]: With dead ends: 768 [2019-12-07 10:27:46,539 INFO L226 Difference]: Without dead ends: 231 [2019-12-07 10:27:46,539 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 10:27:46,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2019-12-07 10:27:46,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 207. [2019-12-07 10:27:46,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2019-12-07 10:27:46,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 364 transitions. [2019-12-07 10:27:46,541 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 364 transitions. Word has length 57 [2019-12-07 10:27:46,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:46,541 INFO L462 AbstractCegarLoop]: Abstraction has 207 states and 364 transitions. [2019-12-07 10:27:46,541 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:27:46,541 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 364 transitions. [2019-12-07 10:27:46,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 10:27:46,542 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:46,542 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:46,542 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:46,542 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:46,542 INFO L82 PathProgramCache]: Analyzing trace with hash -1516556909, now seen corresponding path program 3 times [2019-12-07 10:27:46,542 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:46,542 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1191918103] [2019-12-07 10:27:46,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:46,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:46,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:46,713 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1191918103] [2019-12-07 10:27:46,713 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:46,713 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 10:27:46,713 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1385907662] [2019-12-07 10:27:46,714 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 10:27:46,714 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:46,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 10:27:46,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:27:46,714 INFO L87 Difference]: Start difference. First operand 207 states and 364 transitions. Second operand 13 states. [2019-12-07 10:27:46,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:46,984 INFO L93 Difference]: Finished difference Result 371 states and 638 transitions. [2019-12-07 10:27:46,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 10:27:46,985 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2019-12-07 10:27:46,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:46,985 INFO L225 Difference]: With dead ends: 371 [2019-12-07 10:27:46,985 INFO L226 Difference]: Without dead ends: 341 [2019-12-07 10:27:46,985 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=339, Unknown=0, NotChecked=0, Total=420 [2019-12-07 10:27:46,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 341 states. [2019-12-07 10:27:46,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 341 to 303. [2019-12-07 10:27:46,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 303 states. [2019-12-07 10:27:46,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 303 states to 303 states and 528 transitions. [2019-12-07 10:27:46,988 INFO L78 Accepts]: Start accepts. Automaton has 303 states and 528 transitions. Word has length 57 [2019-12-07 10:27:46,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:46,988 INFO L462 AbstractCegarLoop]: Abstraction has 303 states and 528 transitions. [2019-12-07 10:27:46,988 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 10:27:46,988 INFO L276 IsEmpty]: Start isEmpty. Operand 303 states and 528 transitions. [2019-12-07 10:27:46,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 10:27:46,989 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:46,989 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:46,989 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:46,989 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:46,989 INFO L82 PathProgramCache]: Analyzing trace with hash 1886575453, now seen corresponding path program 4 times [2019-12-07 10:27:46,989 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:46,990 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1490637529] [2019-12-07 10:27:46,990 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:47,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:47,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:47,206 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1490637529] [2019-12-07 10:27:47,206 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:47,207 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 10:27:47,207 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [337453332] [2019-12-07 10:27:47,207 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 10:27:47,207 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:47,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 10:27:47,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=174, Unknown=0, NotChecked=0, Total=210 [2019-12-07 10:27:47,207 INFO L87 Difference]: Start difference. First operand 303 states and 528 transitions. Second operand 15 states. [2019-12-07 10:27:47,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:47,524 INFO L93 Difference]: Finished difference Result 427 states and 724 transitions. [2019-12-07 10:27:47,524 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 10:27:47,524 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 57 [2019-12-07 10:27:47,525 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:47,525 INFO L225 Difference]: With dead ends: 427 [2019-12-07 10:27:47,525 INFO L226 Difference]: Without dead ends: 397 [2019-12-07 10:27:47,525 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=112, Invalid=538, Unknown=0, NotChecked=0, Total=650 [2019-12-07 10:27:47,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states. [2019-12-07 10:27:47,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 307. [2019-12-07 10:27:47,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 307 states. [2019-12-07 10:27:47,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 307 states to 307 states and 535 transitions. [2019-12-07 10:27:47,528 INFO L78 Accepts]: Start accepts. Automaton has 307 states and 535 transitions. Word has length 57 [2019-12-07 10:27:47,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:47,528 INFO L462 AbstractCegarLoop]: Abstraction has 307 states and 535 transitions. [2019-12-07 10:27:47,528 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 10:27:47,528 INFO L276 IsEmpty]: Start isEmpty. Operand 307 states and 535 transitions. [2019-12-07 10:27:47,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 10:27:47,529 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:47,529 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:47,529 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:47,529 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:47,529 INFO L82 PathProgramCache]: Analyzing trace with hash -1834190715, now seen corresponding path program 5 times [2019-12-07 10:27:47,529 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:47,529 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1793955913] [2019-12-07 10:27:47,529 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:47,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:27:47,665 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:27:47,666 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1793955913] [2019-12-07 10:27:47,666 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:27:47,666 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:27:47,666 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1027815469] [2019-12-07 10:27:47,666 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:27:47,666 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:27:47,666 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:27:47,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:27:47,667 INFO L87 Difference]: Start difference. First operand 307 states and 535 transitions. Second operand 12 states. [2019-12-07 10:27:47,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:27:47,869 INFO L93 Difference]: Finished difference Result 407 states and 688 transitions. [2019-12-07 10:27:47,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 10:27:47,870 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 57 [2019-12-07 10:27:47,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:27:47,870 INFO L225 Difference]: With dead ends: 407 [2019-12-07 10:27:47,870 INFO L226 Difference]: Without dead ends: 377 [2019-12-07 10:27:47,871 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=308, Unknown=0, NotChecked=0, Total=380 [2019-12-07 10:27:47,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 377 states. [2019-12-07 10:27:47,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 377 to 315. [2019-12-07 10:27:47,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-12-07 10:27:47,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 549 transitions. [2019-12-07 10:27:47,873 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 549 transitions. Word has length 57 [2019-12-07 10:27:47,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:27:47,873 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 549 transitions. [2019-12-07 10:27:47,873 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:27:47,873 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 549 transitions. [2019-12-07 10:27:47,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 10:27:47,874 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:27:47,874 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:27:47,874 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:27:47,874 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:27:47,874 INFO L82 PathProgramCache]: Analyzing trace with hash 731376245, now seen corresponding path program 6 times [2019-12-07 10:27:47,874 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:27:47,874 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [774947095] [2019-12-07 10:27:47,874 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:27:47,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:27:47,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:27:47,937 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 10:27:47,937 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 10:27:47,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] ULTIMATE.startENTRY-->L800: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= 0 v_~weak$$choice0~0_25) (= (select .cse0 |v_ULTIMATE.start_main_~#t1498~0.base_26|) 0) (= 0 v_~y$r_buff0_thd3~0_151) (= v_~y$w_buff1~0_200 0) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1498~0.base_26| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1498~0.base_26|) |v_ULTIMATE.start_main_~#t1498~0.offset_19| 0)) |v_#memory_int_23|) (= v_~y$w_buff0_used~0_650 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1498~0.base_26| 4)) (= v_~__unbuffered_cnt~0_109 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~y$w_buff0~0_308) (= 0 v_~y$r_buff1_thd3~0_122) (= v_~y$read_delayed~0_6 0) (= 0 v_~y$r_buff1_thd1~0_76) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t1498~0.base_26|) (= v_~z~0_51 0) (= v_~y$r_buff0_thd1~0_29 0) (= v_~main$tmp_guard1~0_28 0) (= v_~y$r_buff0_thd0~0_312 0) (= 0 v_~__unbuffered_p2_EAX~0_90) (= 0 v_~y$flush_delayed~0_45) (= |v_ULTIMATE.start_main_~#t1498~0.offset_19| 0) (= v_~y$w_buff1_used~0_407 0) (= v_~y$r_buff0_thd2~0_88 0) (= |v_#NULL.offset_5| 0) (= 0 v_~y$r_buff1_thd2~0_131) (= v_~y$mem_tmp~0_31 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y~0_150 0) (= v_~weak$$choice2~0_131 0) (= v_~y$r_buff1_thd0~0_254 0) (= |v_#valid_60| (store .cse0 |v_ULTIMATE.start_main_~#t1498~0.base_26| 1)) (= v_~main$tmp_guard0~0_24 0) (= 0 |v_#NULL.base_5|) (= v_~x~0_80 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_26|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_104|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_52|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_38|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ULTIMATE.start_main_~#t1499~0.offset=|v_ULTIMATE.start_main_~#t1499~0.offset_19|, ~y$mem_tmp~0=v_~y$mem_tmp~0_31, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_122, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_29, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_90, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_34|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_142|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_44|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_31|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_98|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_27|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ~weak$$choice0~0=v_~weak$$choice0~0_25, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_28|, ~y$w_buff1~0=v_~y$w_buff1~0_200, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_88, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_254, ~x~0=v_~x~0_80, ULTIMATE.start_main_~#t1499~0.base=|v_ULTIMATE.start_main_~#t1499~0.base_26|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_650, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_38|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_31|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_32|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_16|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_58|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_76, ULTIMATE.start_main_~#t1500~0.offset=|v_ULTIMATE.start_main_~#t1500~0.offset_14|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_44|, ~y$w_buff0~0=v_~y$w_buff0~0_308, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_151, ~y~0=v_~y~0_150, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_30|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_44|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_26|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_96|, ULTIMATE.start_main_~#t1500~0.base=|v_ULTIMATE.start_main_~#t1500~0.base_21|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_31|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_31|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_131, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_28|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_312, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t1498~0.base=|v_ULTIMATE.start_main_~#t1498~0.base_26|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_51, ~weak$$choice2~0=v_~weak$$choice2~0_131, ULTIMATE.start_main_~#t1498~0.offset=|v_ULTIMATE.start_main_~#t1498~0.offset_19|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_407} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ULTIMATE.start_main_~#t1499~0.offset, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t1499~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_~#t1500~0.offset, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t1500~0.base, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_~#t1498~0.base, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t1498~0.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 10:27:47,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L800-1-->L802: Formula: (and (= |v_ULTIMATE.start_main_~#t1499~0.offset_11| 0) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1499~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1499~0.base_13|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1499~0.base_13|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1499~0.base_13| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1499~0.base_13|) |v_ULTIMATE.start_main_~#t1499~0.offset_11| 1)) |v_#memory_int_17|) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1499~0.base_13|)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1499~0.base_13| 4) |v_#length_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1499~0.base=|v_ULTIMATE.start_main_~#t1499~0.base_13|, ULTIMATE.start_main_~#t1499~0.offset=|v_ULTIMATE.start_main_~#t1499~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1499~0.base, ULTIMATE.start_main_~#t1499~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-12-07 10:27:47,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L802-1-->L804: Formula: (and (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1500~0.base_12| 4) |v_#length_15|) (= |v_ULTIMATE.start_main_~#t1500~0.offset_10| 0) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1500~0.base_12|) 0) (not (= |v_ULTIMATE.start_main_~#t1500~0.base_12| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1500~0.base_12| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1500~0.base_12|) |v_ULTIMATE.start_main_~#t1500~0.offset_10| 2)) |v_#memory_int_15|) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1500~0.base_12| 1) |v_#valid_38|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1500~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1500~0.offset=|v_ULTIMATE.start_main_~#t1500~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1500~0.base=|v_ULTIMATE.start_main_~#t1500~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1500~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1500~0.base] because there is no mapped edge [2019-12-07 10:27:47,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] P2ENTRY-->L4-3: Formula: (and (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_10)) (= 2 v_~y$w_buff0~0_40) (= v_~y$w_buff0_used~0_161 1) (= v_~y$w_buff0~0_41 v_~y$w_buff1~0_32) (= v_P2Thread1of1ForFork0_~arg.base_6 |v_P2Thread1of1ForFork0_#in~arg.base_8|) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_10 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6| (ite (not (and (not (= (mod v_~y$w_buff1_used~0_89 256) 0)) (not (= 0 (mod v_~y$w_buff0_used~0_161 256))))) 1 0)) (= v_P2Thread1of1ForFork0_~arg.offset_6 |v_P2Thread1of1ForFork0_#in~arg.offset_8|) (= v_~y$w_buff1_used~0_89 v_~y$w_buff0_used~0_162)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_162, ~y$w_buff0~0=v_~y$w_buff0~0_41, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_8|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_6, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_8|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_161, ~y$w_buff1~0=v_~y$w_buff1~0_32, ~y$w_buff0~0=v_~y$w_buff0~0_40, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_6, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_8|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_10, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_89} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 10:27:47,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] P0ENTRY-->P0EXIT: Formula: (and (= v_~z~0_35 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_9|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_9|) (= |v_P0Thread1of1ForFork1_#in~arg.base_21| v_P0Thread1of1ForFork1_~arg.base_19) (= v_P0Thread1of1ForFork1_~arg.offset_19 |v_P0Thread1of1ForFork1_#in~arg.offset_21|) (= v_~x~0_49 1) (= v_~__unbuffered_cnt~0_67 (+ v_~__unbuffered_cnt~0_68 1))) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|} OutVars{P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_9|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_9|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_19, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, ~z~0=v_~z~0_35, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|, ~x~0=v_~x~0_49, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_19} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~z~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 10:27:47,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L778-->L778-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1011184323 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd3~0_In1011184323 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite11_Out1011184323| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In1011184323 |P2Thread1of1ForFork0_#t~ite11_Out1011184323|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1011184323, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1011184323} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1011184323, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out1011184323|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1011184323} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 10:27:47,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L748-2-->L748-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd2~0_In745139152 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In745139152 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite3_Out745139152| ~y$w_buff1~0_In745139152) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out745139152| ~y~0_In745139152)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In745139152, ~y$w_buff1~0=~y$w_buff1~0_In745139152, ~y~0=~y~0_In745139152, ~y$w_buff1_used~0=~y$w_buff1_used~0_In745139152} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In745139152, ~y$w_buff1~0=~y$w_buff1~0_In745139152, ~y~0=~y~0_In745139152, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out745139152|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In745139152} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 10:27:47,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [618] [618] L748-4-->L749: Formula: (= |v_P1Thread1of1ForFork2_#t~ite3_10| v_~y~0_21) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_10|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_11|, ~y~0=v_~y~0_21, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_9|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 10:27:47,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L749-->L749-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In530178958 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd2~0_In530178958 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite5_Out530178958| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite5_Out530178958| ~y$w_buff0_used~0_In530178958)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In530178958, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In530178958} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In530178958, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In530178958, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out530178958|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 10:27:47,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L750-->L750-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In506336193 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In506336193 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In506336193 256))) (.cse0 (= (mod ~y$r_buff1_thd2~0_In506336193 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite6_Out506336193| ~y$w_buff1_used~0_In506336193)) (and (= |P1Thread1of1ForFork2_#t~ite6_Out506336193| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In506336193, ~y$w_buff0_used~0=~y$w_buff0_used~0_In506336193, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In506336193, ~y$w_buff1_used~0=~y$w_buff1_used~0_In506336193} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In506336193, ~y$w_buff0_used~0=~y$w_buff0_used~0_In506336193, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In506336193, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out506336193|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In506336193} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 10:27:47,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L751-->L751-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In141598029 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In141598029 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite7_Out141598029| ~y$r_buff0_thd2~0_In141598029) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite7_Out141598029| 0) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In141598029, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In141598029} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In141598029, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In141598029, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out141598029|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 10:27:47,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L779-->L779-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd3~0_In-1110084360 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1110084360 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-1110084360 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-1110084360 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite12_Out-1110084360| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P2Thread1of1ForFork0_#t~ite12_Out-1110084360| ~y$w_buff1_used~0_In-1110084360) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1110084360, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1110084360, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1110084360, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1110084360} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1110084360, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1110084360, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-1110084360|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1110084360, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1110084360} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 10:27:47,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L752-->L752-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In-2116334430 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-2116334430 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd2~0_In-2116334430 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-2116334430 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite8_Out-2116334430| 0)) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite8_Out-2116334430| ~y$r_buff1_thd2~0_In-2116334430) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2116334430, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2116334430, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2116334430, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2116334430} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2116334430, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2116334430, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-2116334430|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2116334430, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2116334430} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 10:27:47,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L752-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite8_26| v_~y$r_buff1_thd2~0_56) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_56, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_25|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 10:27:47,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L780-->L781: Formula: (let ((.cse0 (= ~y$r_buff0_thd3~0_In-1529251070 ~y$r_buff0_thd3~0_Out-1529251070)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1529251070 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd3~0_In-1529251070 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse1) (not .cse2) (= 0 ~y$r_buff0_thd3~0_Out-1529251070)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1529251070, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1529251070} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1529251070, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1529251070, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-1529251070|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 10:27:47,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L781-->L781-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1816325785 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1816325785 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-1816325785 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1816325785 256)))) (or (and (= ~y$r_buff1_thd3~0_In-1816325785 |P2Thread1of1ForFork0_#t~ite14_Out-1816325785|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite14_Out-1816325785| 0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1816325785, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1816325785, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1816325785, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1816325785} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out-1816325785|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1816325785, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1816325785, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1816325785, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1816325785} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 10:27:47,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L781-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#t~ite14_38| v_~y$r_buff1_thd3~0_68) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_37|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_68, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 10:27:47,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [617] [617] L804-1-->L810: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:27:47,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L810-2-->L810-4: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-531084114 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-531084114 256)))) (or (and (not .cse0) (= ~y$w_buff1~0_In-531084114 |ULTIMATE.start_main_#t~ite18_Out-531084114|) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite18_Out-531084114| ~y~0_In-531084114)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-531084114, ~y~0=~y~0_In-531084114, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-531084114, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-531084114} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-531084114, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-531084114|, ~y~0=~y~0_In-531084114, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-531084114, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-531084114} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-12-07 10:27:47,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L810-4-->L811: Formula: (= v_~y~0_40 |v_ULTIMATE.start_main_#t~ite18_13|) InVars {ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_13|} OutVars{ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_12|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_12|, ~y~0=v_~y~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19, ~y~0] because there is no mapped edge [2019-12-07 10:27:47,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L811-->L811-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In185604816 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd0~0_In185604816 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In185604816 |ULTIMATE.start_main_#t~ite20_Out185604816|)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite20_Out185604816|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In185604816, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In185604816} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In185604816, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In185604816, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out185604816|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 10:27:47,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L812-->L812-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1543466755 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In1543466755 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In1543466755 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In1543466755 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1543466755 |ULTIMATE.start_main_#t~ite21_Out1543466755|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite21_Out1543466755|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1543466755, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1543466755, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1543466755, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1543466755} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1543466755, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1543466755, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1543466755|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1543466755, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1543466755} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 10:27:47,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In848466720 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In848466720 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite22_Out848466720| ~y$r_buff0_thd0~0_In848466720)) (and (= 0 |ULTIMATE.start_main_#t~ite22_Out848466720|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In848466720, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In848466720} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In848466720, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In848466720, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out848466720|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 10:27:47,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L814-->L814-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In929073570 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In929073570 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In929073570 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In929073570 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite23_Out929073570| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite23_Out929073570| ~y$r_buff1_thd0~0_In929073570)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In929073570, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In929073570, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In929073570, ~y$w_buff1_used~0=~y$w_buff1_used~0_In929073570} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In929073570, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In929073570, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In929073570, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out929073570|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In929073570} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 10:27:47,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L822-->L822-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-598548221 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_In-598548221| |ULTIMATE.start_main_#t~ite29_Out-598548221|) (not .cse0) (= |ULTIMATE.start_main_#t~ite30_Out-598548221| ~y$w_buff0~0_In-598548221)) (and .cse0 (= |ULTIMATE.start_main_#t~ite30_Out-598548221| |ULTIMATE.start_main_#t~ite29_Out-598548221|) (= ~y$w_buff0~0_In-598548221 |ULTIMATE.start_main_#t~ite29_Out-598548221|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-598548221 256)))) (or (and .cse1 (= (mod ~y$w_buff1_used~0_In-598548221 256) 0)) (= (mod ~y$w_buff0_used~0_In-598548221 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-598548221 256)))))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-598548221, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In-598548221|, ~y$w_buff0~0=~y$w_buff0~0_In-598548221, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-598548221, ~weak$$choice2~0=~weak$$choice2~0_In-598548221, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-598548221, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-598548221} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-598548221|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-598548221, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-598548221|, ~y$w_buff0~0=~y$w_buff0~0_In-598548221, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-598548221, ~weak$$choice2~0=~weak$$choice2~0_In-598548221, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-598548221, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-598548221} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 10:27:47,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [631] [631] L826-->L827: Formula: (and (not (= (mod v_~weak$$choice2~0_27 256) 0)) (= v_~y$r_buff0_thd0~0_86 v_~y$r_buff0_thd0~0_85)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_86, ~weak$$choice2~0=v_~weak$$choice2~0_27} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_85, ~weak$$choice2~0=v_~weak$$choice2~0_27, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 10:27:47,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L829-->L832-1: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5| (mod v_~main$tmp_guard1~0_12 256)) (= v_~y~0_109 v_~y$mem_tmp~0_21) (not (= 0 (mod v_~y$flush_delayed~0_33 256))) (= 0 v_~y$flush_delayed~0_32)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~y$flush_delayed~0=v_~y$flush_delayed~0_33, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~y$flush_delayed~0=v_~y$flush_delayed~0_32, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_24|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_109, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:27:47,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L832-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 10:27:48,003 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 10:27:48 BasicIcfg [2019-12-07 10:27:48,003 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 10:27:48,003 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 10:27:48,003 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 10:27:48,003 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 10:27:48,004 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:27:36" (3/4) ... [2019-12-07 10:27:48,005 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 10:27:48,006 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] ULTIMATE.startENTRY-->L800: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= 0 v_~weak$$choice0~0_25) (= (select .cse0 |v_ULTIMATE.start_main_~#t1498~0.base_26|) 0) (= 0 v_~y$r_buff0_thd3~0_151) (= v_~y$w_buff1~0_200 0) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1498~0.base_26| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1498~0.base_26|) |v_ULTIMATE.start_main_~#t1498~0.offset_19| 0)) |v_#memory_int_23|) (= v_~y$w_buff0_used~0_650 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1498~0.base_26| 4)) (= v_~__unbuffered_cnt~0_109 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~y$w_buff0~0_308) (= 0 v_~y$r_buff1_thd3~0_122) (= v_~y$read_delayed~0_6 0) (= 0 v_~y$r_buff1_thd1~0_76) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t1498~0.base_26|) (= v_~z~0_51 0) (= v_~y$r_buff0_thd1~0_29 0) (= v_~main$tmp_guard1~0_28 0) (= v_~y$r_buff0_thd0~0_312 0) (= 0 v_~__unbuffered_p2_EAX~0_90) (= 0 v_~y$flush_delayed~0_45) (= |v_ULTIMATE.start_main_~#t1498~0.offset_19| 0) (= v_~y$w_buff1_used~0_407 0) (= v_~y$r_buff0_thd2~0_88 0) (= |v_#NULL.offset_5| 0) (= 0 v_~y$r_buff1_thd2~0_131) (= v_~y$mem_tmp~0_31 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y~0_150 0) (= v_~weak$$choice2~0_131 0) (= v_~y$r_buff1_thd0~0_254 0) (= |v_#valid_60| (store .cse0 |v_ULTIMATE.start_main_~#t1498~0.base_26| 1)) (= v_~main$tmp_guard0~0_24 0) (= 0 |v_#NULL.base_5|) (= v_~x~0_80 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_26|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_104|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_52|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_38|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ULTIMATE.start_main_~#t1499~0.offset=|v_ULTIMATE.start_main_~#t1499~0.offset_19|, ~y$mem_tmp~0=v_~y$mem_tmp~0_31, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_122, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_29, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_90, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_34|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_142|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_44|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_31|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_98|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_27|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ~weak$$choice0~0=v_~weak$$choice0~0_25, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_28|, ~y$w_buff1~0=v_~y$w_buff1~0_200, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_88, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_254, ~x~0=v_~x~0_80, ULTIMATE.start_main_~#t1499~0.base=|v_ULTIMATE.start_main_~#t1499~0.base_26|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_650, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_38|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_31|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_32|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_16|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_58|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_76, ULTIMATE.start_main_~#t1500~0.offset=|v_ULTIMATE.start_main_~#t1500~0.offset_14|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_44|, ~y$w_buff0~0=v_~y$w_buff0~0_308, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_151, ~y~0=v_~y~0_150, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_30|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_44|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_26|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_96|, ULTIMATE.start_main_~#t1500~0.base=|v_ULTIMATE.start_main_~#t1500~0.base_21|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_31|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_31|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_131, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_28|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_312, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t1498~0.base=|v_ULTIMATE.start_main_~#t1498~0.base_26|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_51, ~weak$$choice2~0=v_~weak$$choice2~0_131, ULTIMATE.start_main_~#t1498~0.offset=|v_ULTIMATE.start_main_~#t1498~0.offset_19|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_407} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ULTIMATE.start_main_~#t1499~0.offset, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t1499~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_~#t1500~0.offset, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t1500~0.base, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_~#t1498~0.base, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t1498~0.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 10:27:48,006 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L800-1-->L802: Formula: (and (= |v_ULTIMATE.start_main_~#t1499~0.offset_11| 0) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1499~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1499~0.base_13|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1499~0.base_13|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1499~0.base_13| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1499~0.base_13|) |v_ULTIMATE.start_main_~#t1499~0.offset_11| 1)) |v_#memory_int_17|) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1499~0.base_13|)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1499~0.base_13| 4) |v_#length_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1499~0.base=|v_ULTIMATE.start_main_~#t1499~0.base_13|, ULTIMATE.start_main_~#t1499~0.offset=|v_ULTIMATE.start_main_~#t1499~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1499~0.base, ULTIMATE.start_main_~#t1499~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-12-07 10:27:48,006 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L802-1-->L804: Formula: (and (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1500~0.base_12| 4) |v_#length_15|) (= |v_ULTIMATE.start_main_~#t1500~0.offset_10| 0) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1500~0.base_12|) 0) (not (= |v_ULTIMATE.start_main_~#t1500~0.base_12| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1500~0.base_12| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1500~0.base_12|) |v_ULTIMATE.start_main_~#t1500~0.offset_10| 2)) |v_#memory_int_15|) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1500~0.base_12| 1) |v_#valid_38|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1500~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1500~0.offset=|v_ULTIMATE.start_main_~#t1500~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1500~0.base=|v_ULTIMATE.start_main_~#t1500~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1500~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1500~0.base] because there is no mapped edge [2019-12-07 10:27:48,007 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] P2ENTRY-->L4-3: Formula: (and (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_10)) (= 2 v_~y$w_buff0~0_40) (= v_~y$w_buff0_used~0_161 1) (= v_~y$w_buff0~0_41 v_~y$w_buff1~0_32) (= v_P2Thread1of1ForFork0_~arg.base_6 |v_P2Thread1of1ForFork0_#in~arg.base_8|) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_10 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6| (ite (not (and (not (= (mod v_~y$w_buff1_used~0_89 256) 0)) (not (= 0 (mod v_~y$w_buff0_used~0_161 256))))) 1 0)) (= v_P2Thread1of1ForFork0_~arg.offset_6 |v_P2Thread1of1ForFork0_#in~arg.offset_8|) (= v_~y$w_buff1_used~0_89 v_~y$w_buff0_used~0_162)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_162, ~y$w_buff0~0=v_~y$w_buff0~0_41, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_8|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_6, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_8|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_161, ~y$w_buff1~0=v_~y$w_buff1~0_32, ~y$w_buff0~0=v_~y$w_buff0~0_40, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_6, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_8|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_10, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_89} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 10:27:48,007 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] P0ENTRY-->P0EXIT: Formula: (and (= v_~z~0_35 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_9|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_9|) (= |v_P0Thread1of1ForFork1_#in~arg.base_21| v_P0Thread1of1ForFork1_~arg.base_19) (= v_P0Thread1of1ForFork1_~arg.offset_19 |v_P0Thread1of1ForFork1_#in~arg.offset_21|) (= v_~x~0_49 1) (= v_~__unbuffered_cnt~0_67 (+ v_~__unbuffered_cnt~0_68 1))) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|} OutVars{P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_9|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_9|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_19, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, ~z~0=v_~z~0_35, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|, ~x~0=v_~x~0_49, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_19} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~z~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 10:27:48,008 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L778-->L778-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1011184323 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd3~0_In1011184323 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite11_Out1011184323| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In1011184323 |P2Thread1of1ForFork0_#t~ite11_Out1011184323|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1011184323, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1011184323} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1011184323, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out1011184323|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1011184323} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 10:27:48,008 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L748-2-->L748-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd2~0_In745139152 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In745139152 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite3_Out745139152| ~y$w_buff1~0_In745139152) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out745139152| ~y~0_In745139152)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In745139152, ~y$w_buff1~0=~y$w_buff1~0_In745139152, ~y~0=~y~0_In745139152, ~y$w_buff1_used~0=~y$w_buff1_used~0_In745139152} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In745139152, ~y$w_buff1~0=~y$w_buff1~0_In745139152, ~y~0=~y~0_In745139152, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out745139152|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In745139152} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 10:27:48,008 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [618] [618] L748-4-->L749: Formula: (= |v_P1Thread1of1ForFork2_#t~ite3_10| v_~y~0_21) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_10|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_11|, ~y~0=v_~y~0_21, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_9|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 10:27:48,008 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L749-->L749-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In530178958 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd2~0_In530178958 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite5_Out530178958| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite5_Out530178958| ~y$w_buff0_used~0_In530178958)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In530178958, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In530178958} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In530178958, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In530178958, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out530178958|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 10:27:48,008 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L750-->L750-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In506336193 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In506336193 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In506336193 256))) (.cse0 (= (mod ~y$r_buff1_thd2~0_In506336193 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite6_Out506336193| ~y$w_buff1_used~0_In506336193)) (and (= |P1Thread1of1ForFork2_#t~ite6_Out506336193| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In506336193, ~y$w_buff0_used~0=~y$w_buff0_used~0_In506336193, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In506336193, ~y$w_buff1_used~0=~y$w_buff1_used~0_In506336193} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In506336193, ~y$w_buff0_used~0=~y$w_buff0_used~0_In506336193, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In506336193, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out506336193|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In506336193} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 10:27:48,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L751-->L751-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In141598029 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In141598029 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite7_Out141598029| ~y$r_buff0_thd2~0_In141598029) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite7_Out141598029| 0) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In141598029, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In141598029} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In141598029, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In141598029, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out141598029|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 10:27:48,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L779-->L779-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd3~0_In-1110084360 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1110084360 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-1110084360 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-1110084360 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite12_Out-1110084360| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P2Thread1of1ForFork0_#t~ite12_Out-1110084360| ~y$w_buff1_used~0_In-1110084360) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1110084360, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1110084360, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1110084360, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1110084360} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1110084360, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1110084360, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-1110084360|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1110084360, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1110084360} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 10:27:48,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L752-->L752-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In-2116334430 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-2116334430 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd2~0_In-2116334430 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-2116334430 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite8_Out-2116334430| 0)) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite8_Out-2116334430| ~y$r_buff1_thd2~0_In-2116334430) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2116334430, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2116334430, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2116334430, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2116334430} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2116334430, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2116334430, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-2116334430|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2116334430, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2116334430} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 10:27:48,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L752-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite8_26| v_~y$r_buff1_thd2~0_56) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_56, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_25|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 10:27:48,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L780-->L781: Formula: (let ((.cse0 (= ~y$r_buff0_thd3~0_In-1529251070 ~y$r_buff0_thd3~0_Out-1529251070)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1529251070 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd3~0_In-1529251070 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse1) (not .cse2) (= 0 ~y$r_buff0_thd3~0_Out-1529251070)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1529251070, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1529251070} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1529251070, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1529251070, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-1529251070|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 10:27:48,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L781-->L781-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1816325785 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1816325785 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-1816325785 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1816325785 256)))) (or (and (= ~y$r_buff1_thd3~0_In-1816325785 |P2Thread1of1ForFork0_#t~ite14_Out-1816325785|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite14_Out-1816325785| 0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1816325785, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1816325785, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1816325785, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1816325785} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out-1816325785|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1816325785, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1816325785, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1816325785, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1816325785} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 10:27:48,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L781-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#t~ite14_38| v_~y$r_buff1_thd3~0_68) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_37|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_68, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 10:27:48,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [617] [617] L804-1-->L810: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:27:48,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L810-2-->L810-4: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-531084114 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-531084114 256)))) (or (and (not .cse0) (= ~y$w_buff1~0_In-531084114 |ULTIMATE.start_main_#t~ite18_Out-531084114|) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite18_Out-531084114| ~y~0_In-531084114)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-531084114, ~y~0=~y~0_In-531084114, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-531084114, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-531084114} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-531084114, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-531084114|, ~y~0=~y~0_In-531084114, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-531084114, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-531084114} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-12-07 10:27:48,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L810-4-->L811: Formula: (= v_~y~0_40 |v_ULTIMATE.start_main_#t~ite18_13|) InVars {ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_13|} OutVars{ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_12|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_12|, ~y~0=v_~y~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19, ~y~0] because there is no mapped edge [2019-12-07 10:27:48,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L811-->L811-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In185604816 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd0~0_In185604816 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In185604816 |ULTIMATE.start_main_#t~ite20_Out185604816|)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite20_Out185604816|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In185604816, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In185604816} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In185604816, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In185604816, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out185604816|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 10:27:48,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L812-->L812-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1543466755 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In1543466755 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In1543466755 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In1543466755 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1543466755 |ULTIMATE.start_main_#t~ite21_Out1543466755|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite21_Out1543466755|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1543466755, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1543466755, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1543466755, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1543466755} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1543466755, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1543466755, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1543466755|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1543466755, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1543466755} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 10:27:48,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In848466720 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In848466720 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite22_Out848466720| ~y$r_buff0_thd0~0_In848466720)) (and (= 0 |ULTIMATE.start_main_#t~ite22_Out848466720|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In848466720, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In848466720} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In848466720, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In848466720, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out848466720|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 10:27:48,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L814-->L814-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In929073570 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In929073570 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In929073570 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In929073570 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite23_Out929073570| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite23_Out929073570| ~y$r_buff1_thd0~0_In929073570)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In929073570, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In929073570, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In929073570, ~y$w_buff1_used~0=~y$w_buff1_used~0_In929073570} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In929073570, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In929073570, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In929073570, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out929073570|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In929073570} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 10:27:48,012 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L822-->L822-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-598548221 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_In-598548221| |ULTIMATE.start_main_#t~ite29_Out-598548221|) (not .cse0) (= |ULTIMATE.start_main_#t~ite30_Out-598548221| ~y$w_buff0~0_In-598548221)) (and .cse0 (= |ULTIMATE.start_main_#t~ite30_Out-598548221| |ULTIMATE.start_main_#t~ite29_Out-598548221|) (= ~y$w_buff0~0_In-598548221 |ULTIMATE.start_main_#t~ite29_Out-598548221|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-598548221 256)))) (or (and .cse1 (= (mod ~y$w_buff1_used~0_In-598548221 256) 0)) (= (mod ~y$w_buff0_used~0_In-598548221 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-598548221 256)))))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-598548221, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In-598548221|, ~y$w_buff0~0=~y$w_buff0~0_In-598548221, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-598548221, ~weak$$choice2~0=~weak$$choice2~0_In-598548221, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-598548221, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-598548221} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-598548221|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-598548221, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-598548221|, ~y$w_buff0~0=~y$w_buff0~0_In-598548221, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-598548221, ~weak$$choice2~0=~weak$$choice2~0_In-598548221, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-598548221, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-598548221} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 10:27:48,014 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [631] [631] L826-->L827: Formula: (and (not (= (mod v_~weak$$choice2~0_27 256) 0)) (= v_~y$r_buff0_thd0~0_86 v_~y$r_buff0_thd0~0_85)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_86, ~weak$$choice2~0=v_~weak$$choice2~0_27} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_85, ~weak$$choice2~0=v_~weak$$choice2~0_27, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 10:27:48,014 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L829-->L832-1: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5| (mod v_~main$tmp_guard1~0_12 256)) (= v_~y~0_109 v_~y$mem_tmp~0_21) (not (= 0 (mod v_~y$flush_delayed~0_33 256))) (= 0 v_~y$flush_delayed~0_32)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~y$flush_delayed~0=v_~y$flush_delayed~0_33, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~y$flush_delayed~0=v_~y$flush_delayed~0_32, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_24|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_109, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:27:48,014 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L832-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 10:27:48,068 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_8d95f289-4c3b-416a-8def-c0d7bec8c213/bin/uautomizer/witness.graphml [2019-12-07 10:27:48,068 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 10:27:48,069 INFO L168 Benchmark]: Toolchain (without parser) took 12513.95 ms. Allocated memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: 810.0 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -209.7 MB). Peak memory consumption was 600.3 MB. Max. memory is 11.5 GB. [2019-12-07 10:27:48,069 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:27:48,070 INFO L168 Benchmark]: CACSL2BoogieTranslator took 375.03 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 91.2 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -123.7 MB). Peak memory consumption was 29.0 MB. Max. memory is 11.5 GB. [2019-12-07 10:27:48,070 INFO L168 Benchmark]: Boogie Procedure Inliner took 43.98 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:27:48,070 INFO L168 Benchmark]: Boogie Preprocessor took 26.80 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:27:48,071 INFO L168 Benchmark]: RCFGBuilder took 407.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 10:27:48,071 INFO L168 Benchmark]: TraceAbstraction took 11592.78 ms. Allocated memory was 1.1 GB in the beginning and 1.8 GB in the end (delta: 718.8 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -167.1 MB). Peak memory consumption was 551.7 MB. Max. memory is 11.5 GB. [2019-12-07 10:27:48,071 INFO L168 Benchmark]: Witness Printer took 65.22 ms. Allocated memory is still 1.8 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 21.6 MB). Peak memory consumption was 21.6 MB. Max. memory is 11.5 GB. [2019-12-07 10:27:48,073 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 375.03 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 91.2 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -123.7 MB). Peak memory consumption was 29.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 43.98 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.80 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 407.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 11592.78 ms. Allocated memory was 1.1 GB in the beginning and 1.8 GB in the end (delta: 718.8 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -167.1 MB). Peak memory consumption was 551.7 MB. Max. memory is 11.5 GB. * Witness Printer took 65.22 ms. Allocated memory is still 1.8 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 21.6 MB). Peak memory consumption was 21.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.8s, 162 ProgramPointsBefore, 83 ProgramPointsAfterwards, 193 TransitionsBefore, 92 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 7 FixpointIterations, 31 TrivialSequentialCompositions, 44 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 26 ChoiceCompositions, 3955 VarBasedMoverChecksPositive, 193 VarBasedMoverChecksNegative, 45 SemBasedMoverChecksPositive, 196 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.7s, 0 MoverChecksTotal, 48383 CheckedPairsTotal, 109 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L800] FCALL, FORK 0 pthread_create(&t1498, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L802] FCALL, FORK 0 pthread_create(&t1499, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L804] FCALL, FORK 0 pthread_create(&t1500, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L767] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L768] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L769] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L770] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L771] 3 y$r_buff0_thd3 = (_Bool)1 [L774] 3 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L742] 2 x = 2 [L745] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L777] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L748] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L749] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L750] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L751] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L778] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L779] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L810] 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L811] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L812] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L813] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L814] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L817] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L818] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L819] 0 y$flush_delayed = weak$$choice2 [L820] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L821] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L821] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L822] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L823] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L823] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L824] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L825] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L825] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L827] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L827] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L828] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 153 locations, 2 error locations. Result: UNSAFE, OverallTime: 11.4s, OverallIterations: 18, TraceHistogramMax: 1, AutomataDifference: 3.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1840 SDtfs, 2252 SDslu, 4348 SDs, 0 SdLazy, 2418 SolverSat, 182 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 158 GetRequests, 22 SyntacticMatches, 12 SemanticMatches, 124 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 311 ImplicationChecksByTransitivity, 1.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=28190occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.0s AutomataMinimizationTime, 17 MinimizatonAttempts, 17132 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 737 NumberOfCodeBlocks, 737 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 663 ConstructedInterpolants, 0 QuantifiedInterpolants, 147011 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 17 InterpolantComputations, 17 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...