./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix056_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_ff7eb634-42ea-40a4-9428-af03dfed80a9/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_ff7eb634-42ea-40a4-9428-af03dfed80a9/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_ff7eb634-42ea-40a4-9428-af03dfed80a9/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_ff7eb634-42ea-40a4-9428-af03dfed80a9/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix056_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_ff7eb634-42ea-40a4-9428-af03dfed80a9/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_ff7eb634-42ea-40a4-9428-af03dfed80a9/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8d01f4fe4e7767d0e466afc46b518f3096817bc7 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:45:58,199 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:45:58,201 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:45:58,209 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:45:58,210 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:45:58,211 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:45:58,212 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:45:58,214 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:45:58,215 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:45:58,216 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:45:58,217 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:45:58,217 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:45:58,218 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:45:58,218 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:45:58,219 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:45:58,220 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:45:58,220 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:45:58,221 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:45:58,222 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:45:58,224 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:45:58,225 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:45:58,225 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:45:58,226 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:45:58,227 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:45:58,228 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:45:58,228 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:45:58,229 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:45:58,229 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:45:58,229 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:45:58,230 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:45:58,230 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:45:58,231 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:45:58,232 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:45:58,232 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:45:58,233 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:45:58,233 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:45:58,234 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:45:58,234 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:45:58,234 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:45:58,235 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:45:58,235 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:45:58,236 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_ff7eb634-42ea-40a4-9428-af03dfed80a9/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:45:58,248 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:45:58,248 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:45:58,249 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:45:58,249 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:45:58,249 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:45:58,249 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:45:58,250 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:45:58,250 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:45:58,250 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:45:58,250 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:45:58,250 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:45:58,250 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:45:58,250 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:45:58,251 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:45:58,251 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:45:58,251 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:45:58,251 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:45:58,251 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:45:58,251 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:45:58,252 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:45:58,252 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:45:58,252 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:45:58,252 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:45:58,252 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:45:58,252 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:45:58,253 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:45:58,253 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:45:58,253 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:45:58,253 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:45:58,253 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_ff7eb634-42ea-40a4-9428-af03dfed80a9/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8d01f4fe4e7767d0e466afc46b518f3096817bc7 [2019-12-07 17:45:58,354 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:45:58,362 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:45:58,364 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:45:58,365 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:45:58,365 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:45:58,366 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_ff7eb634-42ea-40a4-9428-af03dfed80a9/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix056_rmo.oepc.i [2019-12-07 17:45:58,403 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ff7eb634-42ea-40a4-9428-af03dfed80a9/bin/uautomizer/data/46d34f747/020ce36bd03f4d7f9f044935ca284409/FLAG91de628d7 [2019-12-07 17:45:58,872 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:45:58,873 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_ff7eb634-42ea-40a4-9428-af03dfed80a9/sv-benchmarks/c/pthread-wmm/mix056_rmo.oepc.i [2019-12-07 17:45:58,883 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ff7eb634-42ea-40a4-9428-af03dfed80a9/bin/uautomizer/data/46d34f747/020ce36bd03f4d7f9f044935ca284409/FLAG91de628d7 [2019-12-07 17:45:58,892 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_ff7eb634-42ea-40a4-9428-af03dfed80a9/bin/uautomizer/data/46d34f747/020ce36bd03f4d7f9f044935ca284409 [2019-12-07 17:45:58,894 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:45:58,894 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:45:58,895 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:45:58,895 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:45:58,897 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:45:58,898 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:45:58" (1/1) ... [2019-12-07 17:45:58,900 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:45:58, skipping insertion in model container [2019-12-07 17:45:58,900 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:45:58" (1/1) ... [2019-12-07 17:45:58,905 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:45:58,933 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:45:59,194 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:45:59,202 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:45:59,243 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:45:59,290 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:45:59,290 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:45:59 WrapperNode [2019-12-07 17:45:59,290 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:45:59,291 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:45:59,291 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:45:59,291 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:45:59,296 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:45:59" (1/1) ... [2019-12-07 17:45:59,310 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:45:59" (1/1) ... [2019-12-07 17:45:59,328 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:45:59,328 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:45:59,328 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:45:59,328 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:45:59,334 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:45:59" (1/1) ... [2019-12-07 17:45:59,335 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:45:59" (1/1) ... [2019-12-07 17:45:59,337 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:45:59" (1/1) ... [2019-12-07 17:45:59,338 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:45:59" (1/1) ... [2019-12-07 17:45:59,345 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:45:59" (1/1) ... [2019-12-07 17:45:59,347 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:45:59" (1/1) ... [2019-12-07 17:45:59,350 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:45:59" (1/1) ... [2019-12-07 17:45:59,353 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:45:59,354 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:45:59,354 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:45:59,354 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:45:59,354 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:45:59" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_ff7eb634-42ea-40a4-9428-af03dfed80a9/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:45:59,395 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:45:59,395 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:45:59,395 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:45:59,395 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:45:59,395 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:45:59,396 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:45:59,396 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:45:59,396 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:45:59,396 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:45:59,396 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:45:59,396 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:45:59,396 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:45:59,396 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:45:59,397 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:45:59,762 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:45:59,762 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:45:59,763 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:45:59 BoogieIcfgContainer [2019-12-07 17:45:59,763 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:45:59,764 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:45:59,764 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:45:59,766 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:45:59,766 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:45:58" (1/3) ... [2019-12-07 17:45:59,767 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1968f783 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:45:59, skipping insertion in model container [2019-12-07 17:45:59,767 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:45:59" (2/3) ... [2019-12-07 17:45:59,768 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1968f783 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:45:59, skipping insertion in model container [2019-12-07 17:45:59,768 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:45:59" (3/3) ... [2019-12-07 17:45:59,769 INFO L109 eAbstractionObserver]: Analyzing ICFG mix056_rmo.oepc.i [2019-12-07 17:45:59,778 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:45:59,778 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:45:59,783 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:45:59,783 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:45:59,808 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,809 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,809 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,809 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,809 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,809 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,809 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,809 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,810 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,810 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,810 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,810 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,810 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,810 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,810 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,810 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,811 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,811 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,811 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,811 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,811 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,811 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,811 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,811 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,811 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,812 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,812 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,812 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,812 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,812 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,812 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,812 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,812 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,812 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,813 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,813 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,813 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,813 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,813 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,813 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,813 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,814 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,814 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,814 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,814 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,814 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,814 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,814 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,814 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,814 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,815 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,815 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,815 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,815 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,815 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,815 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,815 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,815 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,815 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,816 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,816 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,816 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,816 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,816 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,817 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,817 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,822 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,822 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,822 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,822 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,822 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,822 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,822 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,822 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,822 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,823 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,823 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,823 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,823 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,823 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,823 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,823 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,823 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,823 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,823 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,823 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,824 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,824 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,824 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,824 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,824 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,824 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,824 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,824 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,824 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,825 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,825 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,825 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,825 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,825 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,825 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,825 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,825 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,825 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,825 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,826 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,826 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,826 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,826 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,826 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,826 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,826 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,826 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,826 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,826 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,827 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,827 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,827 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,827 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,827 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,827 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,827 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,827 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,827 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,827 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,828 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,828 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,828 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,828 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,828 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,828 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,828 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,828 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,828 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,828 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,829 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,829 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:45:59,839 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:45:59,852 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:45:59,852 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:45:59,852 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:45:59,852 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:45:59,852 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:45:59,852 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:45:59,852 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:45:59,852 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:45:59,863 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 174 places, 211 transitions [2019-12-07 17:45:59,864 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 17:45:59,920 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 17:45:59,920 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:45:59,930 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 705 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:45:59,946 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 17:45:59,979 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 17:45:59,980 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:45:59,985 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 705 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:46:00,000 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 17:46:00,001 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:46:02,977 WARN L192 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 40 [2019-12-07 17:46:03,143 WARN L192 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 17:46:03,223 INFO L206 etLargeBlockEncoding]: Checked pairs total: 77200 [2019-12-07 17:46:03,223 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-12-07 17:46:03,226 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 102 transitions [2019-12-07 17:46:14,827 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 102314 states. [2019-12-07 17:46:14,829 INFO L276 IsEmpty]: Start isEmpty. Operand 102314 states. [2019-12-07 17:46:14,832 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 17:46:14,832 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:46:14,833 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 17:46:14,833 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:46:14,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:46:14,837 INFO L82 PathProgramCache]: Analyzing trace with hash 909908, now seen corresponding path program 1 times [2019-12-07 17:46:14,843 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:46:14,843 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2091838814] [2019-12-07 17:46:14,843 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:46:14,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:46:14,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:46:14,986 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2091838814] [2019-12-07 17:46:14,987 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:46:14,987 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:46:14,988 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1988426759] [2019-12-07 17:46:14,990 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:46:14,991 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:46:14,999 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:46:15,000 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:46:15,001 INFO L87 Difference]: Start difference. First operand 102314 states. Second operand 3 states. [2019-12-07 17:46:15,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:46:15,729 INFO L93 Difference]: Finished difference Result 101472 states and 432734 transitions. [2019-12-07 17:46:15,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:46:15,731 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 17:46:15,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:46:16,151 INFO L225 Difference]: With dead ends: 101472 [2019-12-07 17:46:16,151 INFO L226 Difference]: Without dead ends: 95232 [2019-12-07 17:46:16,152 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:46:19,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95232 states. [2019-12-07 17:46:20,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95232 to 95232. [2019-12-07 17:46:20,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95232 states. [2019-12-07 17:46:22,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95232 states to 95232 states and 405538 transitions. [2019-12-07 17:46:22,980 INFO L78 Accepts]: Start accepts. Automaton has 95232 states and 405538 transitions. Word has length 3 [2019-12-07 17:46:22,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:46:22,980 INFO L462 AbstractCegarLoop]: Abstraction has 95232 states and 405538 transitions. [2019-12-07 17:46:22,980 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:46:22,980 INFO L276 IsEmpty]: Start isEmpty. Operand 95232 states and 405538 transitions. [2019-12-07 17:46:22,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 17:46:22,983 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:46:22,983 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:46:22,983 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:46:22,983 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:46:22,984 INFO L82 PathProgramCache]: Analyzing trace with hash 1729820714, now seen corresponding path program 1 times [2019-12-07 17:46:22,984 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:46:22,984 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [79974775] [2019-12-07 17:46:22,984 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:46:23,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:46:23,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:46:23,043 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [79974775] [2019-12-07 17:46:23,043 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:46:23,043 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:46:23,043 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [65809429] [2019-12-07 17:46:23,044 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:46:23,044 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:46:23,044 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:46:23,045 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:46:23,045 INFO L87 Difference]: Start difference. First operand 95232 states and 405538 transitions. Second operand 4 states. [2019-12-07 17:46:23,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:46:23,895 INFO L93 Difference]: Finished difference Result 151692 states and 619304 transitions. [2019-12-07 17:46:23,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:46:23,896 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 17:46:23,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:46:24,286 INFO L225 Difference]: With dead ends: 151692 [2019-12-07 17:46:24,287 INFO L226 Difference]: Without dead ends: 151643 [2019-12-07 17:46:24,287 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:46:28,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151643 states. [2019-12-07 17:46:30,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151643 to 138429. [2019-12-07 17:46:30,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138429 states. [2019-12-07 17:46:30,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138429 states to 138429 states and 572602 transitions. [2019-12-07 17:46:30,753 INFO L78 Accepts]: Start accepts. Automaton has 138429 states and 572602 transitions. Word has length 11 [2019-12-07 17:46:30,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:46:30,753 INFO L462 AbstractCegarLoop]: Abstraction has 138429 states and 572602 transitions. [2019-12-07 17:46:30,753 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:46:30,753 INFO L276 IsEmpty]: Start isEmpty. Operand 138429 states and 572602 transitions. [2019-12-07 17:46:30,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:46:30,759 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:46:30,759 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:46:30,759 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:46:30,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:46:30,759 INFO L82 PathProgramCache]: Analyzing trace with hash 1791451612, now seen corresponding path program 1 times [2019-12-07 17:46:30,759 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:46:30,759 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2139721853] [2019-12-07 17:46:30,759 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:46:30,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:46:30,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:46:30,819 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2139721853] [2019-12-07 17:46:30,819 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:46:30,819 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:46:30,819 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2051821090] [2019-12-07 17:46:30,820 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:46:30,820 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:46:30,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:46:30,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:46:30,820 INFO L87 Difference]: Start difference. First operand 138429 states and 572602 transitions. Second operand 4 states. [2019-12-07 17:46:33,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:46:33,324 INFO L93 Difference]: Finished difference Result 197916 states and 800228 transitions. [2019-12-07 17:46:33,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:46:33,325 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:46:33,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:46:33,819 INFO L225 Difference]: With dead ends: 197916 [2019-12-07 17:46:33,819 INFO L226 Difference]: Without dead ends: 197860 [2019-12-07 17:46:33,820 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:46:38,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197860 states. [2019-12-07 17:46:40,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197860 to 165384. [2019-12-07 17:46:40,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165384 states. [2019-12-07 17:46:41,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165384 states to 165384 states and 680683 transitions. [2019-12-07 17:46:41,222 INFO L78 Accepts]: Start accepts. Automaton has 165384 states and 680683 transitions. Word has length 13 [2019-12-07 17:46:41,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:46:41,223 INFO L462 AbstractCegarLoop]: Abstraction has 165384 states and 680683 transitions. [2019-12-07 17:46:41,223 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:46:41,223 INFO L276 IsEmpty]: Start isEmpty. Operand 165384 states and 680683 transitions. [2019-12-07 17:46:41,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:46:41,228 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:46:41,228 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:46:41,228 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:46:41,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:46:41,228 INFO L82 PathProgramCache]: Analyzing trace with hash -137996123, now seen corresponding path program 1 times [2019-12-07 17:46:41,228 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:46:41,228 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [150409244] [2019-12-07 17:46:41,229 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:46:41,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:46:41,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:46:41,256 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [150409244] [2019-12-07 17:46:41,257 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:46:41,257 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:46:41,257 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [54059281] [2019-12-07 17:46:41,257 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:46:41,257 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:46:41,257 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:46:41,257 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:46:41,258 INFO L87 Difference]: Start difference. First operand 165384 states and 680683 transitions. Second operand 3 states. [2019-12-07 17:46:42,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:46:42,259 INFO L93 Difference]: Finished difference Result 244100 states and 1002631 transitions. [2019-12-07 17:46:42,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:46:42,259 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 17:46:42,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:46:42,872 INFO L225 Difference]: With dead ends: 244100 [2019-12-07 17:46:42,872 INFO L226 Difference]: Without dead ends: 244100 [2019-12-07 17:46:42,872 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:46:48,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 244100 states. [2019-12-07 17:46:53,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 244100 to 183753. [2019-12-07 17:46:53,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183753 states. [2019-12-07 17:46:53,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183753 states to 183753 states and 759316 transitions. [2019-12-07 17:46:53,580 INFO L78 Accepts]: Start accepts. Automaton has 183753 states and 759316 transitions. Word has length 16 [2019-12-07 17:46:53,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:46:53,580 INFO L462 AbstractCegarLoop]: Abstraction has 183753 states and 759316 transitions. [2019-12-07 17:46:53,580 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:46:53,580 INFO L276 IsEmpty]: Start isEmpty. Operand 183753 states and 759316 transitions. [2019-12-07 17:46:53,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:46:53,585 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:46:53,585 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:46:53,585 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:46:53,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:46:53,585 INFO L82 PathProgramCache]: Analyzing trace with hash -137876649, now seen corresponding path program 1 times [2019-12-07 17:46:53,586 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:46:53,586 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2112684706] [2019-12-07 17:46:53,586 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:46:53,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:46:53,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:46:53,623 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2112684706] [2019-12-07 17:46:53,623 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:46:53,623 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:46:53,623 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [420815134] [2019-12-07 17:46:53,623 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:46:53,624 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:46:53,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:46:53,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:46:53,624 INFO L87 Difference]: Start difference. First operand 183753 states and 759316 transitions. Second operand 4 states. [2019-12-07 17:46:55,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:46:55,028 INFO L93 Difference]: Finished difference Result 219863 states and 898035 transitions. [2019-12-07 17:46:55,029 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:46:55,029 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 17:46:55,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:46:55,574 INFO L225 Difference]: With dead ends: 219863 [2019-12-07 17:46:55,574 INFO L226 Difference]: Without dead ends: 219863 [2019-12-07 17:46:55,574 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:47:00,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219863 states. [2019-12-07 17:47:03,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219863 to 194030. [2019-12-07 17:47:03,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194030 states. [2019-12-07 17:47:07,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194030 states to 194030 states and 800411 transitions. [2019-12-07 17:47:07,245 INFO L78 Accepts]: Start accepts. Automaton has 194030 states and 800411 transitions. Word has length 16 [2019-12-07 17:47:07,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:07,245 INFO L462 AbstractCegarLoop]: Abstraction has 194030 states and 800411 transitions. [2019-12-07 17:47:07,245 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:47:07,246 INFO L276 IsEmpty]: Start isEmpty. Operand 194030 states and 800411 transitions. [2019-12-07 17:47:07,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:47:07,250 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:07,250 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:07,250 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:07,250 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:07,250 INFO L82 PathProgramCache]: Analyzing trace with hash -219444717, now seen corresponding path program 1 times [2019-12-07 17:47:07,250 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:07,250 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [336600580] [2019-12-07 17:47:07,250 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:07,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:07,281 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:07,281 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [336600580] [2019-12-07 17:47:07,281 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:07,281 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:47:07,282 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1621140817] [2019-12-07 17:47:07,282 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:47:07,282 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:07,282 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:47:07,282 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:47:07,282 INFO L87 Difference]: Start difference. First operand 194030 states and 800411 transitions. Second operand 4 states. [2019-12-07 17:47:08,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:08,387 INFO L93 Difference]: Finished difference Result 232254 states and 951651 transitions. [2019-12-07 17:47:08,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:47:08,388 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 17:47:08,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:08,996 INFO L225 Difference]: With dead ends: 232254 [2019-12-07 17:47:08,997 INFO L226 Difference]: Without dead ends: 232254 [2019-12-07 17:47:08,997 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:47:13,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232254 states. [2019-12-07 17:47:16,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232254 to 195815. [2019-12-07 17:47:16,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195815 states. [2019-12-07 17:47:17,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195815 states to 195815 states and 808686 transitions. [2019-12-07 17:47:17,430 INFO L78 Accepts]: Start accepts. Automaton has 195815 states and 808686 transitions. Word has length 16 [2019-12-07 17:47:17,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:17,430 INFO L462 AbstractCegarLoop]: Abstraction has 195815 states and 808686 transitions. [2019-12-07 17:47:17,430 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:47:17,430 INFO L276 IsEmpty]: Start isEmpty. Operand 195815 states and 808686 transitions. [2019-12-07 17:47:17,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:47:17,443 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:17,443 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:17,443 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:17,443 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:17,443 INFO L82 PathProgramCache]: Analyzing trace with hash -604356166, now seen corresponding path program 1 times [2019-12-07 17:47:17,443 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:17,444 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [555372363] [2019-12-07 17:47:17,444 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:17,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:17,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:17,473 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [555372363] [2019-12-07 17:47:17,474 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:17,474 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:47:17,474 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1962845571] [2019-12-07 17:47:17,474 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:47:17,474 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:17,474 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:47:17,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:17,474 INFO L87 Difference]: Start difference. First operand 195815 states and 808686 transitions. Second operand 3 states. [2019-12-07 17:47:17,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:17,592 INFO L93 Difference]: Finished difference Result 38445 states and 125143 transitions. [2019-12-07 17:47:17,593 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:47:17,593 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:47:17,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:17,649 INFO L225 Difference]: With dead ends: 38445 [2019-12-07 17:47:17,649 INFO L226 Difference]: Without dead ends: 38445 [2019-12-07 17:47:17,649 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:17,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38445 states. [2019-12-07 17:47:18,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38445 to 38365. [2019-12-07 17:47:18,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38365 states. [2019-12-07 17:47:18,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38365 states to 38365 states and 124903 transitions. [2019-12-07 17:47:18,653 INFO L78 Accepts]: Start accepts. Automaton has 38365 states and 124903 transitions. Word has length 18 [2019-12-07 17:47:18,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:18,653 INFO L462 AbstractCegarLoop]: Abstraction has 38365 states and 124903 transitions. [2019-12-07 17:47:18,654 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:47:18,654 INFO L276 IsEmpty]: Start isEmpty. Operand 38365 states and 124903 transitions. [2019-12-07 17:47:18,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:47:18,658 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:18,658 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:18,658 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:18,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:18,659 INFO L82 PathProgramCache]: Analyzing trace with hash -1066994180, now seen corresponding path program 1 times [2019-12-07 17:47:18,659 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:18,659 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912116090] [2019-12-07 17:47:18,659 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:18,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:18,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:18,711 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [912116090] [2019-12-07 17:47:18,711 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:18,711 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:47:18,711 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1308797192] [2019-12-07 17:47:18,711 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:47:18,712 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:18,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:47:18,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:47:18,712 INFO L87 Difference]: Start difference. First operand 38365 states and 124903 transitions. Second operand 5 states. [2019-12-07 17:47:19,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:19,120 INFO L93 Difference]: Finished difference Result 53898 states and 171065 transitions. [2019-12-07 17:47:19,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:47:19,121 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 17:47:19,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:19,200 INFO L225 Difference]: With dead ends: 53898 [2019-12-07 17:47:19,200 INFO L226 Difference]: Without dead ends: 53891 [2019-12-07 17:47:19,201 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:47:19,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53891 states. [2019-12-07 17:47:19,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53891 to 39721. [2019-12-07 17:47:19,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39721 states. [2019-12-07 17:47:19,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39721 states to 39721 states and 129036 transitions. [2019-12-07 17:47:19,947 INFO L78 Accepts]: Start accepts. Automaton has 39721 states and 129036 transitions. Word has length 22 [2019-12-07 17:47:19,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:19,947 INFO L462 AbstractCegarLoop]: Abstraction has 39721 states and 129036 transitions. [2019-12-07 17:47:19,947 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:47:19,948 INFO L276 IsEmpty]: Start isEmpty. Operand 39721 states and 129036 transitions. [2019-12-07 17:47:19,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:47:19,953 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:19,953 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:19,953 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:19,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:19,953 INFO L82 PathProgramCache]: Analyzing trace with hash -1734556852, now seen corresponding path program 1 times [2019-12-07 17:47:19,953 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:19,953 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1004700594] [2019-12-07 17:47:19,953 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:19,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:19,988 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:19,989 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1004700594] [2019-12-07 17:47:19,989 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:19,989 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:47:19,989 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1778307177] [2019-12-07 17:47:19,990 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:47:19,990 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:19,990 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:47:19,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:47:19,990 INFO L87 Difference]: Start difference. First operand 39721 states and 129036 transitions. Second operand 5 states. [2019-12-07 17:47:20,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:20,399 INFO L93 Difference]: Finished difference Result 56181 states and 177938 transitions. [2019-12-07 17:47:20,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:47:20,400 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 17:47:20,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:20,482 INFO L225 Difference]: With dead ends: 56181 [2019-12-07 17:47:20,483 INFO L226 Difference]: Without dead ends: 56174 [2019-12-07 17:47:20,483 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:47:20,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56174 states. [2019-12-07 17:47:21,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56174 to 38054. [2019-12-07 17:47:21,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38054 states. [2019-12-07 17:47:21,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38054 states to 38054 states and 123745 transitions. [2019-12-07 17:47:21,374 INFO L78 Accepts]: Start accepts. Automaton has 38054 states and 123745 transitions. Word has length 22 [2019-12-07 17:47:21,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:21,374 INFO L462 AbstractCegarLoop]: Abstraction has 38054 states and 123745 transitions. [2019-12-07 17:47:21,374 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:47:21,375 INFO L276 IsEmpty]: Start isEmpty. Operand 38054 states and 123745 transitions. [2019-12-07 17:47:21,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 17:47:21,383 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:21,383 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:21,383 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:21,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:21,384 INFO L82 PathProgramCache]: Analyzing trace with hash -779030427, now seen corresponding path program 1 times [2019-12-07 17:47:21,384 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:21,384 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1307751295] [2019-12-07 17:47:21,384 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:21,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:21,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:21,421 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1307751295] [2019-12-07 17:47:21,421 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:21,421 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:47:21,422 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [228781615] [2019-12-07 17:47:21,422 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:47:21,422 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:21,422 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:47:21,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:47:21,422 INFO L87 Difference]: Start difference. First operand 38054 states and 123745 transitions. Second operand 5 states. [2019-12-07 17:47:21,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:21,820 INFO L93 Difference]: Finished difference Result 53064 states and 168438 transitions. [2019-12-07 17:47:21,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:47:21,821 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 17:47:21,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:21,904 INFO L225 Difference]: With dead ends: 53064 [2019-12-07 17:47:21,905 INFO L226 Difference]: Without dead ends: 53051 [2019-12-07 17:47:21,905 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:47:22,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53051 states. [2019-12-07 17:47:22,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53051 to 44527. [2019-12-07 17:47:22,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44527 states. [2019-12-07 17:47:22,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44527 states to 44527 states and 143877 transitions. [2019-12-07 17:47:22,700 INFO L78 Accepts]: Start accepts. Automaton has 44527 states and 143877 transitions. Word has length 25 [2019-12-07 17:47:22,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:22,700 INFO L462 AbstractCegarLoop]: Abstraction has 44527 states and 143877 transitions. [2019-12-07 17:47:22,700 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:47:22,700 INFO L276 IsEmpty]: Start isEmpty. Operand 44527 states and 143877 transitions. [2019-12-07 17:47:22,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:47:22,712 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:22,712 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:22,712 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:22,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:22,712 INFO L82 PathProgramCache]: Analyzing trace with hash -1740727520, now seen corresponding path program 1 times [2019-12-07 17:47:22,712 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:22,713 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1099856640] [2019-12-07 17:47:22,713 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:22,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:22,745 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:22,745 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1099856640] [2019-12-07 17:47:22,746 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:22,746 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:47:22,746 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1989237769] [2019-12-07 17:47:22,746 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:47:22,746 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:22,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:47:22,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:47:22,747 INFO L87 Difference]: Start difference. First operand 44527 states and 143877 transitions. Second operand 5 states. [2019-12-07 17:47:23,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:23,080 INFO L93 Difference]: Finished difference Result 57149 states and 181718 transitions. [2019-12-07 17:47:23,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:47:23,080 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 17:47:23,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:23,168 INFO L225 Difference]: With dead ends: 57149 [2019-12-07 17:47:23,168 INFO L226 Difference]: Without dead ends: 57125 [2019-12-07 17:47:23,168 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:47:23,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57125 states. [2019-12-07 17:47:24,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57125 to 49925. [2019-12-07 17:47:24,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49925 states. [2019-12-07 17:47:24,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49925 states to 49925 states and 160598 transitions. [2019-12-07 17:47:24,201 INFO L78 Accepts]: Start accepts. Automaton has 49925 states and 160598 transitions. Word has length 27 [2019-12-07 17:47:24,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:24,201 INFO L462 AbstractCegarLoop]: Abstraction has 49925 states and 160598 transitions. [2019-12-07 17:47:24,201 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:47:24,201 INFO L276 IsEmpty]: Start isEmpty. Operand 49925 states and 160598 transitions. [2019-12-07 17:47:24,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 17:47:24,217 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:24,217 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:24,217 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:24,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:24,217 INFO L82 PathProgramCache]: Analyzing trace with hash -1978987791, now seen corresponding path program 1 times [2019-12-07 17:47:24,217 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:24,218 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [948947120] [2019-12-07 17:47:24,218 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:24,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:24,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:24,251 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [948947120] [2019-12-07 17:47:24,251 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:24,251 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:47:24,251 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [783288375] [2019-12-07 17:47:24,251 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:47:24,251 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:24,251 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:47:24,251 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:47:24,252 INFO L87 Difference]: Start difference. First operand 49925 states and 160598 transitions. Second operand 5 states. [2019-12-07 17:47:24,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:24,586 INFO L93 Difference]: Finished difference Result 60112 states and 190425 transitions. [2019-12-07 17:47:24,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:47:24,587 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 17:47:24,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:24,677 INFO L225 Difference]: With dead ends: 60112 [2019-12-07 17:47:24,677 INFO L226 Difference]: Without dead ends: 60090 [2019-12-07 17:47:24,677 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:47:24,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60090 states. [2019-12-07 17:47:25,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60090 to 48583. [2019-12-07 17:47:25,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48583 states. [2019-12-07 17:47:25,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48583 states to 48583 states and 156497 transitions. [2019-12-07 17:47:25,527 INFO L78 Accepts]: Start accepts. Automaton has 48583 states and 156497 transitions. Word has length 28 [2019-12-07 17:47:25,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:25,528 INFO L462 AbstractCegarLoop]: Abstraction has 48583 states and 156497 transitions. [2019-12-07 17:47:25,528 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:47:25,528 INFO L276 IsEmpty]: Start isEmpty. Operand 48583 states and 156497 transitions. [2019-12-07 17:47:25,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 17:47:25,542 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:25,542 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:25,542 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:25,542 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:25,542 INFO L82 PathProgramCache]: Analyzing trace with hash -906370244, now seen corresponding path program 1 times [2019-12-07 17:47:25,542 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:25,543 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [611723808] [2019-12-07 17:47:25,543 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:25,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:25,591 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:25,591 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [611723808] [2019-12-07 17:47:25,592 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:25,592 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:47:25,592 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [147925122] [2019-12-07 17:47:25,592 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:47:25,592 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:25,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:47:25,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:47:25,592 INFO L87 Difference]: Start difference. First operand 48583 states and 156497 transitions. Second operand 5 states. [2019-12-07 17:47:26,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:26,093 INFO L93 Difference]: Finished difference Result 67084 states and 213778 transitions. [2019-12-07 17:47:26,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:47:26,093 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 17:47:26,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:26,196 INFO L225 Difference]: With dead ends: 67084 [2019-12-07 17:47:26,196 INFO L226 Difference]: Without dead ends: 67084 [2019-12-07 17:47:26,196 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:47:26,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67084 states. [2019-12-07 17:47:27,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67084 to 58697. [2019-12-07 17:47:27,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58697 states. [2019-12-07 17:47:27,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58697 states to 58697 states and 188868 transitions. [2019-12-07 17:47:27,303 INFO L78 Accepts]: Start accepts. Automaton has 58697 states and 188868 transitions. Word has length 28 [2019-12-07 17:47:27,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:27,303 INFO L462 AbstractCegarLoop]: Abstraction has 58697 states and 188868 transitions. [2019-12-07 17:47:27,303 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:47:27,303 INFO L276 IsEmpty]: Start isEmpty. Operand 58697 states and 188868 transitions. [2019-12-07 17:47:27,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 17:47:27,327 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:27,327 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:27,327 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:27,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:27,327 INFO L82 PathProgramCache]: Analyzing trace with hash -915242211, now seen corresponding path program 1 times [2019-12-07 17:47:27,327 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:27,328 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1881034196] [2019-12-07 17:47:27,328 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:27,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:27,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:27,358 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1881034196] [2019-12-07 17:47:27,358 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:27,359 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:47:27,359 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [712772723] [2019-12-07 17:47:27,359 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:47:27,359 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:27,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:47:27,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:47:27,360 INFO L87 Difference]: Start difference. First operand 58697 states and 188868 transitions. Second operand 4 states. [2019-12-07 17:47:27,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:27,447 INFO L93 Difference]: Finished difference Result 25808 states and 78317 transitions. [2019-12-07 17:47:27,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:47:27,448 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 17:47:27,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:27,479 INFO L225 Difference]: With dead ends: 25808 [2019-12-07 17:47:27,479 INFO L226 Difference]: Without dead ends: 25808 [2019-12-07 17:47:27,479 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:47:27,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25808 states. [2019-12-07 17:47:27,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25808 to 24073. [2019-12-07 17:47:27,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24073 states. [2019-12-07 17:47:27,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24073 states to 24073 states and 73199 transitions. [2019-12-07 17:47:27,806 INFO L78 Accepts]: Start accepts. Automaton has 24073 states and 73199 transitions. Word has length 29 [2019-12-07 17:47:27,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:27,807 INFO L462 AbstractCegarLoop]: Abstraction has 24073 states and 73199 transitions. [2019-12-07 17:47:27,807 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:47:27,807 INFO L276 IsEmpty]: Start isEmpty. Operand 24073 states and 73199 transitions. [2019-12-07 17:47:27,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:47:27,824 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:27,824 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:27,824 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:27,825 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:27,825 INFO L82 PathProgramCache]: Analyzing trace with hash 1850577991, now seen corresponding path program 1 times [2019-12-07 17:47:27,825 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:27,825 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1367257522] [2019-12-07 17:47:27,825 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:27,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:27,863 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:27,863 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1367257522] [2019-12-07 17:47:27,863 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:27,864 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:47:27,864 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1837375369] [2019-12-07 17:47:27,864 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:47:27,864 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:27,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:47:27,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:47:27,864 INFO L87 Difference]: Start difference. First operand 24073 states and 73199 transitions. Second operand 6 states. [2019-12-07 17:47:28,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:28,284 INFO L93 Difference]: Finished difference Result 32207 states and 96092 transitions. [2019-12-07 17:47:28,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:47:28,285 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 17:47:28,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:28,321 INFO L225 Difference]: With dead ends: 32207 [2019-12-07 17:47:28,321 INFO L226 Difference]: Without dead ends: 32207 [2019-12-07 17:47:28,321 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:47:28,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32207 states. [2019-12-07 17:47:28,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32207 to 25707. [2019-12-07 17:47:28,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25707 states. [2019-12-07 17:47:28,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25707 states to 25707 states and 77993 transitions. [2019-12-07 17:47:28,729 INFO L78 Accepts]: Start accepts. Automaton has 25707 states and 77993 transitions. Word has length 33 [2019-12-07 17:47:28,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:28,729 INFO L462 AbstractCegarLoop]: Abstraction has 25707 states and 77993 transitions. [2019-12-07 17:47:28,729 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:47:28,730 INFO L276 IsEmpty]: Start isEmpty. Operand 25707 states and 77993 transitions. [2019-12-07 17:47:28,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 17:47:28,747 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:28,748 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:28,748 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:28,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:28,748 INFO L82 PathProgramCache]: Analyzing trace with hash 1933444630, now seen corresponding path program 1 times [2019-12-07 17:47:28,748 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:28,748 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [526472505] [2019-12-07 17:47:28,748 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:28,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:28,798 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:28,799 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [526472505] [2019-12-07 17:47:28,799 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:28,799 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:47:28,799 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1136177040] [2019-12-07 17:47:28,799 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:47:28,799 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:28,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:47:28,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:47:28,800 INFO L87 Difference]: Start difference. First operand 25707 states and 77993 transitions. Second operand 6 states. [2019-12-07 17:47:29,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:29,230 INFO L93 Difference]: Finished difference Result 31740 states and 94616 transitions. [2019-12-07 17:47:29,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:47:29,230 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 17:47:29,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:29,265 INFO L225 Difference]: With dead ends: 31740 [2019-12-07 17:47:29,265 INFO L226 Difference]: Without dead ends: 31740 [2019-12-07 17:47:29,266 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:47:29,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31740 states. [2019-12-07 17:47:29,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31740 to 23196. [2019-12-07 17:47:29,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23196 states. [2019-12-07 17:47:29,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23196 states to 23196 states and 70521 transitions. [2019-12-07 17:47:29,711 INFO L78 Accepts]: Start accepts. Automaton has 23196 states and 70521 transitions. Word has length 34 [2019-12-07 17:47:29,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:29,711 INFO L462 AbstractCegarLoop]: Abstraction has 23196 states and 70521 transitions. [2019-12-07 17:47:29,711 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:47:29,711 INFO L276 IsEmpty]: Start isEmpty. Operand 23196 states and 70521 transitions. [2019-12-07 17:47:29,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 17:47:29,729 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:29,729 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:29,729 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:29,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:29,729 INFO L82 PathProgramCache]: Analyzing trace with hash -32326155, now seen corresponding path program 1 times [2019-12-07 17:47:29,729 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:29,730 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1608259776] [2019-12-07 17:47:29,730 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:29,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:29,763 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:29,764 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1608259776] [2019-12-07 17:47:29,764 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:29,764 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:47:29,764 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1027998180] [2019-12-07 17:47:29,764 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:47:29,765 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:29,765 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:47:29,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:29,765 INFO L87 Difference]: Start difference. First operand 23196 states and 70521 transitions. Second operand 3 states. [2019-12-07 17:47:29,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:29,829 INFO L93 Difference]: Finished difference Result 23196 states and 69774 transitions. [2019-12-07 17:47:29,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:47:29,830 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 17:47:29,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:29,857 INFO L225 Difference]: With dead ends: 23196 [2019-12-07 17:47:29,857 INFO L226 Difference]: Without dead ends: 23196 [2019-12-07 17:47:29,857 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:29,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23196 states. [2019-12-07 17:47:30,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23196 to 23068. [2019-12-07 17:47:30,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23068 states. [2019-12-07 17:47:30,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23068 states to 23068 states and 69418 transitions. [2019-12-07 17:47:30,173 INFO L78 Accepts]: Start accepts. Automaton has 23068 states and 69418 transitions. Word has length 39 [2019-12-07 17:47:30,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:30,173 INFO L462 AbstractCegarLoop]: Abstraction has 23068 states and 69418 transitions. [2019-12-07 17:47:30,173 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:47:30,173 INFO L276 IsEmpty]: Start isEmpty. Operand 23068 states and 69418 transitions. [2019-12-07 17:47:30,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:47:30,191 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:30,191 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:30,191 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:30,191 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:30,191 INFO L82 PathProgramCache]: Analyzing trace with hash 1133369093, now seen corresponding path program 1 times [2019-12-07 17:47:30,191 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:30,192 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [757593467] [2019-12-07 17:47:30,192 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:30,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:30,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:30,245 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [757593467] [2019-12-07 17:47:30,245 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:30,245 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:47:30,246 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1229287201] [2019-12-07 17:47:30,246 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:47:30,246 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:30,246 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:47:30,246 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:47:30,246 INFO L87 Difference]: Start difference. First operand 23068 states and 69418 transitions. Second operand 6 states. [2019-12-07 17:47:31,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:31,005 INFO L93 Difference]: Finished difference Result 30235 states and 89609 transitions. [2019-12-07 17:47:31,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 17:47:31,006 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 17:47:31,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:31,039 INFO L225 Difference]: With dead ends: 30235 [2019-12-07 17:47:31,039 INFO L226 Difference]: Without dead ends: 30235 [2019-12-07 17:47:31,039 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 8 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:47:31,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30235 states. [2019-12-07 17:47:31,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30235 to 24421. [2019-12-07 17:47:31,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24421 states. [2019-12-07 17:47:31,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24421 states to 24421 states and 73481 transitions. [2019-12-07 17:47:31,412 INFO L78 Accepts]: Start accepts. Automaton has 24421 states and 73481 transitions. Word has length 40 [2019-12-07 17:47:31,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:31,412 INFO L462 AbstractCegarLoop]: Abstraction has 24421 states and 73481 transitions. [2019-12-07 17:47:31,412 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:47:31,413 INFO L276 IsEmpty]: Start isEmpty. Operand 24421 states and 73481 transitions. [2019-12-07 17:47:31,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:47:31,433 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:31,433 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:31,433 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:31,433 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:31,433 INFO L82 PathProgramCache]: Analyzing trace with hash -1613873579, now seen corresponding path program 2 times [2019-12-07 17:47:31,433 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:31,433 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1920937292] [2019-12-07 17:47:31,433 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:31,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:31,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:31,475 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1920937292] [2019-12-07 17:47:31,475 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:31,475 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:47:31,475 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1939962831] [2019-12-07 17:47:31,475 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:47:31,475 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:31,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:47:31,476 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:31,476 INFO L87 Difference]: Start difference. First operand 24421 states and 73481 transitions. Second operand 3 states. [2019-12-07 17:47:31,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:31,582 INFO L93 Difference]: Finished difference Result 45325 states and 136556 transitions. [2019-12-07 17:47:31,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:47:31,582 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 17:47:31,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:31,624 INFO L225 Difference]: With dead ends: 45325 [2019-12-07 17:47:31,624 INFO L226 Difference]: Without dead ends: 38045 [2019-12-07 17:47:31,624 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:31,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38045 states. [2019-12-07 17:47:32,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38045 to 36258. [2019-12-07 17:47:32,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36258 states. [2019-12-07 17:47:32,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36258 states to 36258 states and 108888 transitions. [2019-12-07 17:47:32,142 INFO L78 Accepts]: Start accepts. Automaton has 36258 states and 108888 transitions. Word has length 40 [2019-12-07 17:47:32,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:32,142 INFO L462 AbstractCegarLoop]: Abstraction has 36258 states and 108888 transitions. [2019-12-07 17:47:32,142 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:47:32,143 INFO L276 IsEmpty]: Start isEmpty. Operand 36258 states and 108888 transitions. [2019-12-07 17:47:32,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 17:47:32,175 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:32,175 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:32,175 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:32,175 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:32,175 INFO L82 PathProgramCache]: Analyzing trace with hash -380516314, now seen corresponding path program 1 times [2019-12-07 17:47:32,175 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:32,175 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1698663864] [2019-12-07 17:47:32,175 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:32,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:32,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:32,206 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1698663864] [2019-12-07 17:47:32,206 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:32,206 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:47:32,207 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [781993834] [2019-12-07 17:47:32,207 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:47:32,207 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:32,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:47:32,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:32,208 INFO L87 Difference]: Start difference. First operand 36258 states and 108888 transitions. Second operand 3 states. [2019-12-07 17:47:32,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:32,307 INFO L93 Difference]: Finished difference Result 36258 states and 108783 transitions. [2019-12-07 17:47:32,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:47:32,307 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 17:47:32,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:32,348 INFO L225 Difference]: With dead ends: 36258 [2019-12-07 17:47:32,348 INFO L226 Difference]: Without dead ends: 36258 [2019-12-07 17:47:32,348 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:32,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36258 states. [2019-12-07 17:47:32,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36258 to 30961. [2019-12-07 17:47:32,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30961 states. [2019-12-07 17:47:32,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30961 states to 30961 states and 93997 transitions. [2019-12-07 17:47:32,936 INFO L78 Accepts]: Start accepts. Automaton has 30961 states and 93997 transitions. Word has length 41 [2019-12-07 17:47:32,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:32,937 INFO L462 AbstractCegarLoop]: Abstraction has 30961 states and 93997 transitions. [2019-12-07 17:47:32,937 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:47:32,937 INFO L276 IsEmpty]: Start isEmpty. Operand 30961 states and 93997 transitions. [2019-12-07 17:47:32,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 17:47:32,966 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:32,966 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:32,966 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:32,966 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:32,966 INFO L82 PathProgramCache]: Analyzing trace with hash -1900542759, now seen corresponding path program 1 times [2019-12-07 17:47:32,966 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:32,966 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [891916802] [2019-12-07 17:47:32,966 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:32,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:33,005 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:33,006 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [891916802] [2019-12-07 17:47:33,006 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:33,006 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:47:33,006 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1181600373] [2019-12-07 17:47:33,006 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:47:33,006 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:33,006 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:47:33,006 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:47:33,006 INFO L87 Difference]: Start difference. First operand 30961 states and 93997 transitions. Second operand 5 states. [2019-12-07 17:47:33,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:33,093 INFO L93 Difference]: Finished difference Result 28726 states and 89009 transitions. [2019-12-07 17:47:33,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:47:33,093 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 17:47:33,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:33,130 INFO L225 Difference]: With dead ends: 28726 [2019-12-07 17:47:33,130 INFO L226 Difference]: Without dead ends: 27827 [2019-12-07 17:47:33,130 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:47:33,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27827 states. [2019-12-07 17:47:33,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27827 to 16254. [2019-12-07 17:47:33,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16254 states. [2019-12-07 17:47:33,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16254 states to 16254 states and 50693 transitions. [2019-12-07 17:47:33,439 INFO L78 Accepts]: Start accepts. Automaton has 16254 states and 50693 transitions. Word has length 42 [2019-12-07 17:47:33,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:33,439 INFO L462 AbstractCegarLoop]: Abstraction has 16254 states and 50693 transitions. [2019-12-07 17:47:33,439 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:47:33,440 INFO L276 IsEmpty]: Start isEmpty. Operand 16254 states and 50693 transitions. [2019-12-07 17:47:33,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:47:33,454 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:33,454 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:33,454 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:33,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:33,454 INFO L82 PathProgramCache]: Analyzing trace with hash -479569301, now seen corresponding path program 1 times [2019-12-07 17:47:33,454 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:33,454 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1630920425] [2019-12-07 17:47:33,454 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:33,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:33,483 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:33,484 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1630920425] [2019-12-07 17:47:33,484 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:33,484 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:47:33,484 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2027464885] [2019-12-07 17:47:33,484 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:47:33,484 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:33,484 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:47:33,484 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:33,484 INFO L87 Difference]: Start difference. First operand 16254 states and 50693 transitions. Second operand 3 states. [2019-12-07 17:47:33,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:33,546 INFO L93 Difference]: Finished difference Result 19920 states and 59935 transitions. [2019-12-07 17:47:33,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:47:33,547 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:47:33,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:33,567 INFO L225 Difference]: With dead ends: 19920 [2019-12-07 17:47:33,567 INFO L226 Difference]: Without dead ends: 19920 [2019-12-07 17:47:33,567 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:33,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19920 states. [2019-12-07 17:47:33,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19920 to 16473. [2019-12-07 17:47:33,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16473 states. [2019-12-07 17:47:33,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16473 states to 16473 states and 49621 transitions. [2019-12-07 17:47:33,822 INFO L78 Accepts]: Start accepts. Automaton has 16473 states and 49621 transitions. Word has length 66 [2019-12-07 17:47:33,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:33,822 INFO L462 AbstractCegarLoop]: Abstraction has 16473 states and 49621 transitions. [2019-12-07 17:47:33,822 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:47:33,822 INFO L276 IsEmpty]: Start isEmpty. Operand 16473 states and 49621 transitions. [2019-12-07 17:47:33,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:47:33,835 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:33,836 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:33,836 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:33,836 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:33,836 INFO L82 PathProgramCache]: Analyzing trace with hash -1224044669, now seen corresponding path program 1 times [2019-12-07 17:47:33,836 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:33,836 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [463789546] [2019-12-07 17:47:33,836 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:33,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:33,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:33,869 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [463789546] [2019-12-07 17:47:33,869 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:33,869 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:47:33,869 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [562636892] [2019-12-07 17:47:33,869 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:47:33,870 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:33,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:47:33,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:33,870 INFO L87 Difference]: Start difference. First operand 16473 states and 49621 transitions. Second operand 3 states. [2019-12-07 17:47:33,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:33,942 INFO L93 Difference]: Finished difference Result 19362 states and 58306 transitions. [2019-12-07 17:47:33,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:47:33,942 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:47:33,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:33,961 INFO L225 Difference]: With dead ends: 19362 [2019-12-07 17:47:33,961 INFO L226 Difference]: Without dead ends: 19362 [2019-12-07 17:47:33,962 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:34,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19362 states. [2019-12-07 17:47:34,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19362 to 14994. [2019-12-07 17:47:34,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14994 states. [2019-12-07 17:47:34,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14994 states to 14994 states and 45457 transitions. [2019-12-07 17:47:34,194 INFO L78 Accepts]: Start accepts. Automaton has 14994 states and 45457 transitions. Word has length 66 [2019-12-07 17:47:34,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:34,195 INFO L462 AbstractCegarLoop]: Abstraction has 14994 states and 45457 transitions. [2019-12-07 17:47:34,195 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:47:34,195 INFO L276 IsEmpty]: Start isEmpty. Operand 14994 states and 45457 transitions. [2019-12-07 17:47:34,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:47:34,207 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:34,207 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:34,207 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:34,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:34,208 INFO L82 PathProgramCache]: Analyzing trace with hash -2069303088, now seen corresponding path program 1 times [2019-12-07 17:47:34,208 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:34,208 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [397447540] [2019-12-07 17:47:34,208 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:34,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:34,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:34,246 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [397447540] [2019-12-07 17:47:34,246 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:34,246 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:47:34,246 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [363971502] [2019-12-07 17:47:34,246 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:47:34,246 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:34,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:47:34,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:47:34,247 INFO L87 Difference]: Start difference. First operand 14994 states and 45457 transitions. Second operand 4 states. [2019-12-07 17:47:34,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:34,327 INFO L93 Difference]: Finished difference Result 14994 states and 45269 transitions. [2019-12-07 17:47:34,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:47:34,327 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 17:47:34,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:34,343 INFO L225 Difference]: With dead ends: 14994 [2019-12-07 17:47:34,343 INFO L226 Difference]: Without dead ends: 14994 [2019-12-07 17:47:34,343 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:47:34,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14994 states. [2019-12-07 17:47:34,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14994 to 13662. [2019-12-07 17:47:34,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13662 states. [2019-12-07 17:47:34,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13662 states to 13662 states and 41201 transitions. [2019-12-07 17:47:34,548 INFO L78 Accepts]: Start accepts. Automaton has 13662 states and 41201 transitions. Word has length 67 [2019-12-07 17:47:34,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:34,549 INFO L462 AbstractCegarLoop]: Abstraction has 13662 states and 41201 transitions. [2019-12-07 17:47:34,549 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:47:34,549 INFO L276 IsEmpty]: Start isEmpty. Operand 13662 states and 41201 transitions. [2019-12-07 17:47:34,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:47:34,560 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:34,561 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:34,561 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:34,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:34,561 INFO L82 PathProgramCache]: Analyzing trace with hash 1009183447, now seen corresponding path program 1 times [2019-12-07 17:47:34,561 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:34,561 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225435251] [2019-12-07 17:47:34,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:34,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:34,617 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:34,618 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [225435251] [2019-12-07 17:47:34,618 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:34,618 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:47:34,618 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [415287160] [2019-12-07 17:47:34,618 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:47:34,618 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:34,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:47:34,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:47:34,618 INFO L87 Difference]: Start difference. First operand 13662 states and 41201 transitions. Second operand 4 states. [2019-12-07 17:47:34,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:34,696 INFO L93 Difference]: Finished difference Result 34209 states and 103803 transitions. [2019-12-07 17:47:34,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:47:34,697 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 17:47:34,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:34,721 INFO L225 Difference]: With dead ends: 34209 [2019-12-07 17:47:34,721 INFO L226 Difference]: Without dead ends: 21293 [2019-12-07 17:47:34,721 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:47:34,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21293 states. [2019-12-07 17:47:34,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21293 to 13031. [2019-12-07 17:47:34,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13031 states. [2019-12-07 17:47:34,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13031 states to 13031 states and 39206 transitions. [2019-12-07 17:47:34,954 INFO L78 Accepts]: Start accepts. Automaton has 13031 states and 39206 transitions. Word has length 67 [2019-12-07 17:47:34,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:34,954 INFO L462 AbstractCegarLoop]: Abstraction has 13031 states and 39206 transitions. [2019-12-07 17:47:34,955 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:47:34,955 INFO L276 IsEmpty]: Start isEmpty. Operand 13031 states and 39206 transitions. [2019-12-07 17:47:34,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:47:34,966 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:34,966 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:34,966 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:34,966 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:34,967 INFO L82 PathProgramCache]: Analyzing trace with hash 28997027, now seen corresponding path program 2 times [2019-12-07 17:47:34,967 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:34,967 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2626375] [2019-12-07 17:47:34,967 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:34,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:35,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:35,081 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2626375] [2019-12-07 17:47:35,081 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:35,081 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:47:35,081 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [200863464] [2019-12-07 17:47:35,081 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:47:35,081 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:35,081 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:47:35,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:47:35,082 INFO L87 Difference]: Start difference. First operand 13031 states and 39206 transitions. Second operand 11 states. [2019-12-07 17:47:36,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:36,351 INFO L93 Difference]: Finished difference Result 54219 states and 162482 transitions. [2019-12-07 17:47:36,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 17:47:36,351 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 17:47:36,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:36,392 INFO L225 Difference]: With dead ends: 54219 [2019-12-07 17:47:36,393 INFO L226 Difference]: Without dead ends: 37294 [2019-12-07 17:47:36,393 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 718 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=438, Invalid=1914, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 17:47:36,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37294 states. [2019-12-07 17:47:36,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37294 to 15574. [2019-12-07 17:47:36,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15574 states. [2019-12-07 17:47:36,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15574 states to 15574 states and 46269 transitions. [2019-12-07 17:47:36,754 INFO L78 Accepts]: Start accepts. Automaton has 15574 states and 46269 transitions. Word has length 67 [2019-12-07 17:47:36,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:36,755 INFO L462 AbstractCegarLoop]: Abstraction has 15574 states and 46269 transitions. [2019-12-07 17:47:36,755 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:47:36,755 INFO L276 IsEmpty]: Start isEmpty. Operand 15574 states and 46269 transitions. [2019-12-07 17:47:36,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:47:36,768 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:36,768 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:36,768 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:36,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:36,768 INFO L82 PathProgramCache]: Analyzing trace with hash -123948117, now seen corresponding path program 3 times [2019-12-07 17:47:36,768 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:36,768 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [773596323] [2019-12-07 17:47:36,769 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:36,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:36,829 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:36,829 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [773596323] [2019-12-07 17:47:36,829 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:36,829 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:47:36,829 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1948020408] [2019-12-07 17:47:36,829 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:47:36,830 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:36,830 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:47:36,830 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:47:36,830 INFO L87 Difference]: Start difference. First operand 15574 states and 46269 transitions. Second operand 7 states. [2019-12-07 17:47:37,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:37,171 INFO L93 Difference]: Finished difference Result 41459 states and 120275 transitions. [2019-12-07 17:47:37,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:47:37,172 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 17:47:37,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:37,209 INFO L225 Difference]: With dead ends: 41459 [2019-12-07 17:47:37,209 INFO L226 Difference]: Without dead ends: 36871 [2019-12-07 17:47:37,210 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:47:37,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36871 states. [2019-12-07 17:47:37,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36871 to 15496. [2019-12-07 17:47:37,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15496 states. [2019-12-07 17:47:37,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15496 states to 15496 states and 45951 transitions. [2019-12-07 17:47:37,568 INFO L78 Accepts]: Start accepts. Automaton has 15496 states and 45951 transitions. Word has length 67 [2019-12-07 17:47:37,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:37,569 INFO L462 AbstractCegarLoop]: Abstraction has 15496 states and 45951 transitions. [2019-12-07 17:47:37,569 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:47:37,569 INFO L276 IsEmpty]: Start isEmpty. Operand 15496 states and 45951 transitions. [2019-12-07 17:47:37,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:47:37,581 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:37,581 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:37,582 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:37,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:37,582 INFO L82 PathProgramCache]: Analyzing trace with hash 1689948735, now seen corresponding path program 4 times [2019-12-07 17:47:37,582 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:37,582 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958597098] [2019-12-07 17:47:37,582 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:37,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:37,921 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:37,921 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958597098] [2019-12-07 17:47:37,921 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:37,922 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 17:47:37,922 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [337723993] [2019-12-07 17:47:37,922 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 17:47:37,922 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:37,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 17:47:37,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=202, Unknown=0, NotChecked=0, Total=240 [2019-12-07 17:47:37,922 INFO L87 Difference]: Start difference. First operand 15496 states and 45951 transitions. Second operand 16 states. [2019-12-07 17:47:41,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:41,572 INFO L93 Difference]: Finished difference Result 29640 states and 86463 transitions. [2019-12-07 17:47:41,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-12-07 17:47:41,572 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 17:47:41,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:41,606 INFO L225 Difference]: With dead ends: 29640 [2019-12-07 17:47:41,606 INFO L226 Difference]: Without dead ends: 28939 [2019-12-07 17:47:41,607 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 670 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=426, Invalid=2226, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 17:47:41,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28939 states. [2019-12-07 17:47:41,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28939 to 15418. [2019-12-07 17:47:41,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15418 states. [2019-12-07 17:47:41,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15418 states to 15418 states and 45747 transitions. [2019-12-07 17:47:41,906 INFO L78 Accepts]: Start accepts. Automaton has 15418 states and 45747 transitions. Word has length 67 [2019-12-07 17:47:41,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:41,906 INFO L462 AbstractCegarLoop]: Abstraction has 15418 states and 45747 transitions. [2019-12-07 17:47:41,906 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 17:47:41,906 INFO L276 IsEmpty]: Start isEmpty. Operand 15418 states and 45747 transitions. [2019-12-07 17:47:41,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:47:41,919 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:41,919 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:41,919 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:41,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:41,920 INFO L82 PathProgramCache]: Analyzing trace with hash 145290943, now seen corresponding path program 5 times [2019-12-07 17:47:41,920 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:41,920 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1187112079] [2019-12-07 17:47:41,920 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:41,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:42,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:42,149 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1187112079] [2019-12-07 17:47:42,149 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:42,149 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:47:42,149 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1116055789] [2019-12-07 17:47:42,149 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:47:42,149 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:42,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:47:42,149 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:47:42,150 INFO L87 Difference]: Start difference. First operand 15418 states and 45747 transitions. Second operand 11 states. [2019-12-07 17:47:43,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:47:43,082 INFO L93 Difference]: Finished difference Result 19551 states and 57244 transitions. [2019-12-07 17:47:43,083 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 17:47:43,083 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 17:47:43,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:47:43,114 INFO L225 Difference]: With dead ends: 19551 [2019-12-07 17:47:43,114 INFO L226 Difference]: Without dead ends: 18752 [2019-12-07 17:47:43,115 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=277, Unknown=0, NotChecked=0, Total=342 [2019-12-07 17:47:43,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18752 states. [2019-12-07 17:47:43,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18752 to 14834. [2019-12-07 17:47:43,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14834 states. [2019-12-07 17:47:43,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14834 states to 14834 states and 44130 transitions. [2019-12-07 17:47:43,347 INFO L78 Accepts]: Start accepts. Automaton has 14834 states and 44130 transitions. Word has length 67 [2019-12-07 17:47:43,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:47:43,347 INFO L462 AbstractCegarLoop]: Abstraction has 14834 states and 44130 transitions. [2019-12-07 17:47:43,347 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:47:43,347 INFO L276 IsEmpty]: Start isEmpty. Operand 14834 states and 44130 transitions. [2019-12-07 17:47:43,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:47:43,360 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:43,360 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:47:43,360 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:43,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:43,361 INFO L82 PathProgramCache]: Analyzing trace with hash -778064925, now seen corresponding path program 6 times [2019-12-07 17:47:43,361 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:43,361 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2047405615] [2019-12-07 17:47:43,361 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:43,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:47:43,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:47:43,445 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:47:43,445 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:47:43,448 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= v_~z$r_buff0_thd0~0_144 0) (= v_~z$r_buff0_thd1~0_230 0) (= v_~z$w_buff0_used~0_947 0) (= v_~z$r_buff1_thd1~0_185 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1501~0.base_44| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1501~0.base_44|) |v_ULTIMATE.start_main_~#t1501~0.offset_28| 0)) |v_#memory_int_19|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1501~0.base_44| 4)) (= v_~z$w_buff1_used~0_563 0) (= v_~weak$$choice2~0_147 0) (= 0 v_~z$r_buff1_thd3~0_352) (= 0 v_~x~0_159) (< 0 |v_#StackHeapBarrier_17|) (= v_~z$read_delayed~0_6 0) (= v_~z$mem_tmp~0_24 0) (= v_~z$r_buff0_thd2~0_126 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= |v_#valid_80| (store .cse0 |v_ULTIMATE.start_main_~#t1501~0.base_44| 1)) (= |v_ULTIMATE.start_main_~#t1501~0.offset_28| 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_cnt~0_155 0) (= v_~z$r_buff1_thd2~0_201 0) (= 0 v_~z$r_buff0_thd3~0_371) (= (select .cse0 |v_ULTIMATE.start_main_~#t1501~0.base_44|) 0) (= v_~main$tmp_guard1~0_38 0) (= v_~z$r_buff1_thd0~0_199 0) (= 0 |v_#NULL.base_7|) (= 0 v_~weak$$choice0~0_19) (= v_~z$w_buff1~0_328 0) (= v_~z~0_152 0) (= v_~z$w_buff0~0_540 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$flush_delayed~0_35) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1501~0.base_44|) (= v_~y~0_49 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1501~0.base=|v_ULTIMATE.start_main_~#t1501~0.base_44|, ULTIMATE.start_main_~#t1501~0.offset=|v_ULTIMATE.start_main_~#t1501~0.offset_28|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_201, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_59|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_328, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_37|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_99|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_75|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_199, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ~y~0=v_~y~0_49, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_126, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_947, ~z$w_buff0~0=v_~z$w_buff0~0_540, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_352, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ULTIMATE.start_main_~#t1502~0.offset=|v_ULTIMATE.start_main_~#t1502~0.offset_28|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_563, ~z$flush_delayed~0=v_~z$flush_delayed~0_35, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_~#t1503~0.base=|v_ULTIMATE.start_main_~#t1503~0.base_25|, #NULL.base=|v_#NULL.base_7|, ~weak$$choice0~0=v_~weak$$choice0~0_19, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_~#t1503~0.offset=|v_ULTIMATE.start_main_~#t1503~0.offset_18|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, #valid=|v_#valid_80|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_185, #memory_int=|v_#memory_int_19|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_371, ULTIMATE.start_main_~#t1502~0.base=|v_ULTIMATE.start_main_~#t1502~0.base_44|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~z~0=v_~z~0_152, ~weak$$choice2~0=v_~weak$$choice2~0_147, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_230, ~x~0=v_~x~0_159} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1501~0.base, ULTIMATE.start_main_~#t1501~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, ~z$w_buff1~0, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ULTIMATE.start_main_~#t1502~0.offset, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1503~0.base, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_~#t1503~0.offset, ULTIMATE.start_main_#res, #valid, ~z$r_buff1_thd1~0, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t1502~0.base, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 17:47:43,448 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] L818-1-->L820: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1502~0.base_13| 0)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1502~0.base_13|) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1502~0.base_13| 1)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1502~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1502~0.base_13|) |v_ULTIMATE.start_main_~#t1502~0.offset_11| 1))) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1502~0.base_13| 4)) (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1502~0.base_13|) 0) (= |v_ULTIMATE.start_main_~#t1502~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1502~0.offset=|v_ULTIMATE.start_main_~#t1502~0.offset_11|, ULTIMATE.start_main_~#t1502~0.base=|v_ULTIMATE.start_main_~#t1502~0.base_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1502~0.offset, ULTIMATE.start_main_~#t1502~0.base, #length] because there is no mapped edge [2019-12-07 17:47:43,448 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L820-1-->L822: Formula: (and (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1503~0.base_13| 1)) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1503~0.base_13|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1503~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1503~0.base_13|) |v_ULTIMATE.start_main_~#t1503~0.offset_11| 2)) |v_#memory_int_15|) (= |v_ULTIMATE.start_main_~#t1503~0.offset_11| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1503~0.base_13| 4)) (not (= 0 |v_ULTIMATE.start_main_~#t1503~0.base_13|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1503~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1503~0.offset=|v_ULTIMATE.start_main_~#t1503~0.offset_11|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1503~0.base=|v_ULTIMATE.start_main_~#t1503~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1503~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1503~0.base] because there is no mapped edge [2019-12-07 17:47:43,449 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] P0ENTRY-->L4-3: Formula: (and (= v_P0Thread1of1ForFork0_~arg.offset_12 |v_P0Thread1of1ForFork0_#in~arg.offset_14|) (= v_~z$w_buff0_used~0_163 v_~z$w_buff1_used~0_112) (= (ite (not (and (not (= (mod v_~z$w_buff1_used~0_112 256) 0)) (not (= (mod v_~z$w_buff0_used~0_162 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (= v_~z$w_buff0~0_38 v_~z$w_buff1~0_37) (= v_~z$w_buff0_used~0_162 1) (= 1 v_~z$w_buff0~0_37) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 0)) (= v_P0Thread1of1ForFork0_~arg.base_12 |v_P0Thread1of1ForFork0_#in~arg.base_14|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_163, ~z$w_buff0~0=v_~z$w_buff0~0_38, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_162, ~z$w_buff0~0=v_~z$w_buff0~0_37, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_112, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|, ~z$w_buff1~0=v_~z$w_buff1~0_37, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_12, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_12} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:47:43,451 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L784-->L784-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1857803482 256)))) (or (and .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1857803482 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In1857803482 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1857803482 256))) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1857803482 256) 0)))) (= |P2Thread1of1ForFork2_#t~ite20_Out1857803482| |P2Thread1of1ForFork2_#t~ite21_Out1857803482|) (= |P2Thread1of1ForFork2_#t~ite20_Out1857803482| ~z$w_buff0~0_In1857803482)) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite20_In1857803482| |P2Thread1of1ForFork2_#t~ite20_Out1857803482|) (= ~z$w_buff0~0_In1857803482 |P2Thread1of1ForFork2_#t~ite21_Out1857803482|)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In1857803482, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1857803482, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_In1857803482|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1857803482, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1857803482, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1857803482, ~weak$$choice2~0=~weak$$choice2~0_In1857803482} OutVars{~z$w_buff0~0=~z$w_buff0~0_In1857803482, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out1857803482|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1857803482, P2Thread1of1ForFork2_#t~ite21=|P2Thread1of1ForFork2_#t~ite21_Out1857803482|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1857803482, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1857803482, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1857803482, ~weak$$choice2~0=~weak$$choice2~0_In1857803482} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 17:47:43,452 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L762-2-->L762-5: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1799671188 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In-1799671188 256))) (.cse1 (= |P1Thread1of1ForFork1_#t~ite9_Out-1799671188| |P1Thread1of1ForFork1_#t~ite10_Out-1799671188|))) (or (and (= |P1Thread1of1ForFork1_#t~ite9_Out-1799671188| ~z$w_buff1~0_In-1799671188) (not .cse0) .cse1 (not .cse2)) (and (or .cse0 .cse2) (= |P1Thread1of1ForFork1_#t~ite9_Out-1799671188| ~z~0_In-1799671188) .cse1))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1799671188, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799671188, ~z$w_buff1~0=~z$w_buff1~0_In-1799671188, ~z~0=~z~0_In-1799671188} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1799671188|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1799671188, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799671188, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out-1799671188|, ~z$w_buff1~0=~z$w_buff1~0_In-1799671188, ~z~0=~z~0_In-1799671188} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 17:47:43,453 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L743-->L743-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-736413263 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-736413263 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out-736413263| 0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out-736413263| ~z$w_buff0_used~0_In-736413263) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-736413263, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-736413263} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-736413263|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-736413263, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-736413263} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:47:43,453 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L744-->L744-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd1~0_In-32700654 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-32700654 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-32700654 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-32700654 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-32700654 |P0Thread1of1ForFork0_#t~ite6_Out-32700654|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-32700654|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-32700654, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-32700654, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-32700654, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-32700654} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-32700654|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-32700654, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-32700654, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-32700654, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-32700654} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:47:43,454 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L745-->L746: Formula: (let ((.cse1 (= ~z$r_buff0_thd1~0_In-1253092928 ~z$r_buff0_thd1~0_Out-1253092928)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1253092928 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1253092928 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse0) (not .cse2) (= 0 ~z$r_buff0_thd1~0_Out-1253092928)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1253092928, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1253092928} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1253092928, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1253092928|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1253092928} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:47:43,454 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L763-->L763-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In2096920974 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In2096920974 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out2096920974|)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out2096920974| ~z$w_buff0_used~0_In2096920974)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2096920974, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2096920974} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2096920974, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out2096920974|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2096920974} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:47:43,454 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L764-->L764-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In-1569616202 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1569616202 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1569616202 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-1569616202 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-1569616202 |P1Thread1of1ForFork1_#t~ite12_Out-1569616202|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-1569616202|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1569616202, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1569616202, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1569616202, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1569616202} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1569616202, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1569616202, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1569616202, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1569616202|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1569616202} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:47:43,455 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L765-->L765-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In1320499684 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1320499684 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out1320499684|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In1320499684 |P1Thread1of1ForFork1_#t~ite13_Out1320499684|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1320499684, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1320499684} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1320499684, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1320499684|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1320499684} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 17:47:43,455 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L766-->L766-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-239285138 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-239285138 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd2~0_In-239285138 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-239285138 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out-239285138| ~z$r_buff1_thd2~0_In-239285138) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite14_Out-239285138| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-239285138, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-239285138, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-239285138, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-239285138} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-239285138, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-239285138, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-239285138, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-239285138|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-239285138} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:47:43,455 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [854] [854] L766-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~z$r_buff1_thd2~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_92, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:47:43,456 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L788-->L789: Formula: (and (= v_~z$r_buff0_thd3~0_137 v_~z$r_buff0_thd3~0_136) (not (= (mod v_~weak$$choice2~0_34 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_137, ~weak$$choice2~0=v_~weak$$choice2~0_34} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_10|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_34} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 17:47:43,456 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L789-->L789-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1134272488 256) 0))) (or (and (not .cse0) (= ~z$r_buff1_thd3~0_In1134272488 |P2Thread1of1ForFork2_#t~ite36_Out1134272488|) (= |P2Thread1of1ForFork2_#t~ite35_In1134272488| |P2Thread1of1ForFork2_#t~ite35_Out1134272488|)) (and (= |P2Thread1of1ForFork2_#t~ite35_Out1134272488| |P2Thread1of1ForFork2_#t~ite36_Out1134272488|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1134272488 256)))) (or (and (= 0 (mod ~z$w_buff1_used~0_In1134272488 256)) .cse1) (and (= (mod ~z$r_buff1_thd3~0_In1134272488 256) 0) .cse1) (= 0 (mod ~z$w_buff0_used~0_In1134272488 256)))) (= |P2Thread1of1ForFork2_#t~ite35_Out1134272488| ~z$r_buff1_thd3~0_In1134272488) .cse0))) InVars {P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_In1134272488|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1134272488, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1134272488, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1134272488, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1134272488, ~weak$$choice2~0=~weak$$choice2~0_In1134272488} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out1134272488|, P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out1134272488|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1134272488, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1134272488, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1134272488, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1134272488, ~weak$$choice2~0=~weak$$choice2~0_In1134272488} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35, P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 17:47:43,456 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L791-->L795: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= v_~z~0_62 v_~z$mem_tmp~0_7) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_7, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_62} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 17:47:43,456 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L795-2-->L795-5: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-545988864 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-545988864 256))) (.cse2 (= |P2Thread1of1ForFork2_#t~ite39_Out-545988864| |P2Thread1of1ForFork2_#t~ite38_Out-545988864|))) (or (and (or .cse0 .cse1) .cse2 (= ~z~0_In-545988864 |P2Thread1of1ForFork2_#t~ite38_Out-545988864|)) (and (= |P2Thread1of1ForFork2_#t~ite38_Out-545988864| ~z$w_buff1~0_In-545988864) (not .cse0) (not .cse1) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-545988864, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-545988864, ~z$w_buff1~0=~z$w_buff1~0_In-545988864, ~z~0=~z~0_In-545988864} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-545988864, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-545988864, ~z$w_buff1~0=~z$w_buff1~0_In-545988864, ~z~0=~z~0_In-545988864, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out-545988864|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out-545988864|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 17:47:43,457 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L796-->L796-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1205892062 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1205892062 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite40_Out1205892062| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite40_Out1205892062| ~z$w_buff0_used~0_In1205892062) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1205892062, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1205892062} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1205892062, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1205892062, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out1205892062|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 17:47:43,457 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L797-->L797-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1048776956 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1048776956 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1048776956 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In1048776956 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite41_Out1048776956|)) (and (= ~z$w_buff1_used~0_In1048776956 |P2Thread1of1ForFork2_#t~ite41_Out1048776956|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1048776956, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1048776956, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1048776956, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1048776956} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out1048776956|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1048776956, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1048776956, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1048776956, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1048776956} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 17:47:43,458 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L798-->L798-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-174543520 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-174543520 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out-174543520| 0)) (and (= |P2Thread1of1ForFork2_#t~ite42_Out-174543520| ~z$r_buff0_thd3~0_In-174543520) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-174543520, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-174543520} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-174543520|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-174543520, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-174543520} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 17:47:43,458 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L799-->L799-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In533619339 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In533619339 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In533619339 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In533619339 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite43_Out533619339| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite43_Out533619339| ~z$r_buff1_thd3~0_In533619339) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In533619339, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In533619339, ~z$w_buff1_used~0=~z$w_buff1_used~0_In533619339, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In533619339} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In533619339, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In533619339, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out533619339|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In533619339, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In533619339} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 17:47:43,458 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~z$r_buff1_thd3~0_167 |v_P2Thread1of1ForFork2_#t~ite43_38|)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_167, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_37|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 17:47:43,458 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L746-->L746-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd1~0_In364430610 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In364430610 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In364430610 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In364430610 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out364430610| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~z$r_buff1_thd1~0_In364430610 |P0Thread1of1ForFork0_#t~ite8_Out364430610|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In364430610, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In364430610, ~z$w_buff1_used~0=~z$w_buff1_used~0_In364430610, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In364430610} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In364430610, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out364430610|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In364430610, ~z$w_buff1_used~0=~z$w_buff1_used~0_In364430610, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In364430610} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:47:43,458 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L746-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_159 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_159, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:47:43,458 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L822-1-->L828: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:47:43,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L828-2-->L828-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite48_Out354752223| |ULTIMATE.start_main_#t~ite47_Out354752223|)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In354752223 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In354752223 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite47_Out354752223| ~z$w_buff1~0_In354752223) (not .cse1) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~ite47_Out354752223| ~z~0_In354752223)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In354752223, ~z$w_buff1_used~0=~z$w_buff1_used~0_In354752223, ~z$w_buff1~0=~z$w_buff1~0_In354752223, ~z~0=~z~0_In354752223} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In354752223, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out354752223|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In354752223, ~z$w_buff1~0=~z$w_buff1~0_In354752223, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out354752223|, ~z~0=~z~0_In354752223} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:47:43,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L829-->L829-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1231769165 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-1231769165 256) 0))) (or (and (= ~z$w_buff0_used~0_In-1231769165 |ULTIMATE.start_main_#t~ite49_Out-1231769165|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1231769165|) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1231769165, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1231769165} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1231769165, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1231769165, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1231769165|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:47:43,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L830-->L830-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1898472795 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1898472795 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In1898472795 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd0~0_In1898472795 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1898472795|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In1898472795 |ULTIMATE.start_main_#t~ite50_Out1898472795|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1898472795, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1898472795, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1898472795, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1898472795} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1898472795|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1898472795, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1898472795, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1898472795, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1898472795} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:47:43,460 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In1901767841 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1901767841 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out1901767841|)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In1901767841 |ULTIMATE.start_main_#t~ite51_Out1901767841|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1901767841, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1901767841} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1901767841, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1901767841|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1901767841} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:47:43,460 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L832-->L832-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd0~0_In1699270972 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1699270972 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1699270972 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In1699270972 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd0~0_In1699270972 |ULTIMATE.start_main_#t~ite52_Out1699270972|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out1699270972|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1699270972, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1699270972, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1699270972, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1699270972} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1699270972|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1699270972, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1699270972, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1699270972, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1699270972} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:47:43,460 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 2 v_~x~0_130) (= 0 v_~__unbuffered_p2_EAX~0_21) (= v_~y~0_23 2))) 1 0)) 0 1)) (= v_~z$r_buff1_thd0~0_167 |v_ULTIMATE.start_main_#t~ite52_35|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:47:43,513 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:47:43 BasicIcfg [2019-12-07 17:47:43,513 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:47:43,514 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:47:43,514 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:47:43,514 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:47:43,515 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:45:59" (3/4) ... [2019-12-07 17:47:43,516 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:47:43,516 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= v_~z$r_buff0_thd0~0_144 0) (= v_~z$r_buff0_thd1~0_230 0) (= v_~z$w_buff0_used~0_947 0) (= v_~z$r_buff1_thd1~0_185 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1501~0.base_44| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1501~0.base_44|) |v_ULTIMATE.start_main_~#t1501~0.offset_28| 0)) |v_#memory_int_19|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1501~0.base_44| 4)) (= v_~z$w_buff1_used~0_563 0) (= v_~weak$$choice2~0_147 0) (= 0 v_~z$r_buff1_thd3~0_352) (= 0 v_~x~0_159) (< 0 |v_#StackHeapBarrier_17|) (= v_~z$read_delayed~0_6 0) (= v_~z$mem_tmp~0_24 0) (= v_~z$r_buff0_thd2~0_126 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= |v_#valid_80| (store .cse0 |v_ULTIMATE.start_main_~#t1501~0.base_44| 1)) (= |v_ULTIMATE.start_main_~#t1501~0.offset_28| 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_cnt~0_155 0) (= v_~z$r_buff1_thd2~0_201 0) (= 0 v_~z$r_buff0_thd3~0_371) (= (select .cse0 |v_ULTIMATE.start_main_~#t1501~0.base_44|) 0) (= v_~main$tmp_guard1~0_38 0) (= v_~z$r_buff1_thd0~0_199 0) (= 0 |v_#NULL.base_7|) (= 0 v_~weak$$choice0~0_19) (= v_~z$w_buff1~0_328 0) (= v_~z~0_152 0) (= v_~z$w_buff0~0_540 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$flush_delayed~0_35) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1501~0.base_44|) (= v_~y~0_49 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1501~0.base=|v_ULTIMATE.start_main_~#t1501~0.base_44|, ULTIMATE.start_main_~#t1501~0.offset=|v_ULTIMATE.start_main_~#t1501~0.offset_28|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_201, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_59|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_328, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_37|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_99|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_75|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_199, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ~y~0=v_~y~0_49, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_126, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_947, ~z$w_buff0~0=v_~z$w_buff0~0_540, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_352, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ULTIMATE.start_main_~#t1502~0.offset=|v_ULTIMATE.start_main_~#t1502~0.offset_28|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_563, ~z$flush_delayed~0=v_~z$flush_delayed~0_35, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_~#t1503~0.base=|v_ULTIMATE.start_main_~#t1503~0.base_25|, #NULL.base=|v_#NULL.base_7|, ~weak$$choice0~0=v_~weak$$choice0~0_19, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_~#t1503~0.offset=|v_ULTIMATE.start_main_~#t1503~0.offset_18|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, #valid=|v_#valid_80|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_185, #memory_int=|v_#memory_int_19|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_371, ULTIMATE.start_main_~#t1502~0.base=|v_ULTIMATE.start_main_~#t1502~0.base_44|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~z~0=v_~z~0_152, ~weak$$choice2~0=v_~weak$$choice2~0_147, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_230, ~x~0=v_~x~0_159} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1501~0.base, ULTIMATE.start_main_~#t1501~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, ~z$w_buff1~0, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ULTIMATE.start_main_~#t1502~0.offset, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1503~0.base, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_~#t1503~0.offset, ULTIMATE.start_main_#res, #valid, ~z$r_buff1_thd1~0, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t1502~0.base, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 17:47:43,517 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] L818-1-->L820: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1502~0.base_13| 0)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1502~0.base_13|) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1502~0.base_13| 1)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1502~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1502~0.base_13|) |v_ULTIMATE.start_main_~#t1502~0.offset_11| 1))) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1502~0.base_13| 4)) (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1502~0.base_13|) 0) (= |v_ULTIMATE.start_main_~#t1502~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1502~0.offset=|v_ULTIMATE.start_main_~#t1502~0.offset_11|, ULTIMATE.start_main_~#t1502~0.base=|v_ULTIMATE.start_main_~#t1502~0.base_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1502~0.offset, ULTIMATE.start_main_~#t1502~0.base, #length] because there is no mapped edge [2019-12-07 17:47:43,517 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L820-1-->L822: Formula: (and (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1503~0.base_13| 1)) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1503~0.base_13|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1503~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1503~0.base_13|) |v_ULTIMATE.start_main_~#t1503~0.offset_11| 2)) |v_#memory_int_15|) (= |v_ULTIMATE.start_main_~#t1503~0.offset_11| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1503~0.base_13| 4)) (not (= 0 |v_ULTIMATE.start_main_~#t1503~0.base_13|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1503~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1503~0.offset=|v_ULTIMATE.start_main_~#t1503~0.offset_11|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1503~0.base=|v_ULTIMATE.start_main_~#t1503~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1503~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1503~0.base] because there is no mapped edge [2019-12-07 17:47:43,517 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] P0ENTRY-->L4-3: Formula: (and (= v_P0Thread1of1ForFork0_~arg.offset_12 |v_P0Thread1of1ForFork0_#in~arg.offset_14|) (= v_~z$w_buff0_used~0_163 v_~z$w_buff1_used~0_112) (= (ite (not (and (not (= (mod v_~z$w_buff1_used~0_112 256) 0)) (not (= (mod v_~z$w_buff0_used~0_162 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (= v_~z$w_buff0~0_38 v_~z$w_buff1~0_37) (= v_~z$w_buff0_used~0_162 1) (= 1 v_~z$w_buff0~0_37) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 0)) (= v_P0Thread1of1ForFork0_~arg.base_12 |v_P0Thread1of1ForFork0_#in~arg.base_14|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_163, ~z$w_buff0~0=v_~z$w_buff0~0_38, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_162, ~z$w_buff0~0=v_~z$w_buff0~0_37, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_112, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|, ~z$w_buff1~0=v_~z$w_buff1~0_37, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_12, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_12} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:47:43,519 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L784-->L784-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1857803482 256)))) (or (and .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1857803482 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In1857803482 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1857803482 256))) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1857803482 256) 0)))) (= |P2Thread1of1ForFork2_#t~ite20_Out1857803482| |P2Thread1of1ForFork2_#t~ite21_Out1857803482|) (= |P2Thread1of1ForFork2_#t~ite20_Out1857803482| ~z$w_buff0~0_In1857803482)) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite20_In1857803482| |P2Thread1of1ForFork2_#t~ite20_Out1857803482|) (= ~z$w_buff0~0_In1857803482 |P2Thread1of1ForFork2_#t~ite21_Out1857803482|)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In1857803482, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1857803482, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_In1857803482|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1857803482, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1857803482, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1857803482, ~weak$$choice2~0=~weak$$choice2~0_In1857803482} OutVars{~z$w_buff0~0=~z$w_buff0~0_In1857803482, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out1857803482|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1857803482, P2Thread1of1ForFork2_#t~ite21=|P2Thread1of1ForFork2_#t~ite21_Out1857803482|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1857803482, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1857803482, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1857803482, ~weak$$choice2~0=~weak$$choice2~0_In1857803482} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 17:47:43,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L762-2-->L762-5: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1799671188 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In-1799671188 256))) (.cse1 (= |P1Thread1of1ForFork1_#t~ite9_Out-1799671188| |P1Thread1of1ForFork1_#t~ite10_Out-1799671188|))) (or (and (= |P1Thread1of1ForFork1_#t~ite9_Out-1799671188| ~z$w_buff1~0_In-1799671188) (not .cse0) .cse1 (not .cse2)) (and (or .cse0 .cse2) (= |P1Thread1of1ForFork1_#t~ite9_Out-1799671188| ~z~0_In-1799671188) .cse1))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1799671188, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799671188, ~z$w_buff1~0=~z$w_buff1~0_In-1799671188, ~z~0=~z~0_In-1799671188} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1799671188|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1799671188, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799671188, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out-1799671188|, ~z$w_buff1~0=~z$w_buff1~0_In-1799671188, ~z~0=~z~0_In-1799671188} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 17:47:43,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L743-->L743-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-736413263 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-736413263 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out-736413263| 0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out-736413263| ~z$w_buff0_used~0_In-736413263) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-736413263, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-736413263} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-736413263|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-736413263, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-736413263} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:47:43,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L744-->L744-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd1~0_In-32700654 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-32700654 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-32700654 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-32700654 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-32700654 |P0Thread1of1ForFork0_#t~ite6_Out-32700654|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-32700654|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-32700654, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-32700654, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-32700654, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-32700654} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-32700654|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-32700654, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-32700654, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-32700654, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-32700654} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:47:43,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L745-->L746: Formula: (let ((.cse1 (= ~z$r_buff0_thd1~0_In-1253092928 ~z$r_buff0_thd1~0_Out-1253092928)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1253092928 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1253092928 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse0) (not .cse2) (= 0 ~z$r_buff0_thd1~0_Out-1253092928)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1253092928, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1253092928} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1253092928, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1253092928|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1253092928} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:47:43,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L763-->L763-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In2096920974 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In2096920974 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out2096920974|)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out2096920974| ~z$w_buff0_used~0_In2096920974)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2096920974, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2096920974} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2096920974, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out2096920974|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2096920974} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:47:43,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L764-->L764-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In-1569616202 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1569616202 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1569616202 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-1569616202 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-1569616202 |P1Thread1of1ForFork1_#t~ite12_Out-1569616202|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-1569616202|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1569616202, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1569616202, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1569616202, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1569616202} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1569616202, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1569616202, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1569616202, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1569616202|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1569616202} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:47:43,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L765-->L765-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In1320499684 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1320499684 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out1320499684|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In1320499684 |P1Thread1of1ForFork1_#t~ite13_Out1320499684|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1320499684, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1320499684} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1320499684, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1320499684|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1320499684} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 17:47:43,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L766-->L766-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-239285138 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-239285138 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd2~0_In-239285138 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-239285138 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out-239285138| ~z$r_buff1_thd2~0_In-239285138) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite14_Out-239285138| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-239285138, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-239285138, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-239285138, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-239285138} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-239285138, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-239285138, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-239285138, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-239285138|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-239285138} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:47:43,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [854] [854] L766-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~z$r_buff1_thd2~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_92, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:47:43,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L788-->L789: Formula: (and (= v_~z$r_buff0_thd3~0_137 v_~z$r_buff0_thd3~0_136) (not (= (mod v_~weak$$choice2~0_34 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_137, ~weak$$choice2~0=v_~weak$$choice2~0_34} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_10|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_34} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 17:47:43,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L789-->L789-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1134272488 256) 0))) (or (and (not .cse0) (= ~z$r_buff1_thd3~0_In1134272488 |P2Thread1of1ForFork2_#t~ite36_Out1134272488|) (= |P2Thread1of1ForFork2_#t~ite35_In1134272488| |P2Thread1of1ForFork2_#t~ite35_Out1134272488|)) (and (= |P2Thread1of1ForFork2_#t~ite35_Out1134272488| |P2Thread1of1ForFork2_#t~ite36_Out1134272488|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1134272488 256)))) (or (and (= 0 (mod ~z$w_buff1_used~0_In1134272488 256)) .cse1) (and (= (mod ~z$r_buff1_thd3~0_In1134272488 256) 0) .cse1) (= 0 (mod ~z$w_buff0_used~0_In1134272488 256)))) (= |P2Thread1of1ForFork2_#t~ite35_Out1134272488| ~z$r_buff1_thd3~0_In1134272488) .cse0))) InVars {P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_In1134272488|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1134272488, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1134272488, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1134272488, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1134272488, ~weak$$choice2~0=~weak$$choice2~0_In1134272488} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out1134272488|, P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out1134272488|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1134272488, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1134272488, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1134272488, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1134272488, ~weak$$choice2~0=~weak$$choice2~0_In1134272488} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35, P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 17:47:43,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L791-->L795: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= v_~z~0_62 v_~z$mem_tmp~0_7) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_7, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_62} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 17:47:43,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L795-2-->L795-5: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-545988864 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-545988864 256))) (.cse2 (= |P2Thread1of1ForFork2_#t~ite39_Out-545988864| |P2Thread1of1ForFork2_#t~ite38_Out-545988864|))) (or (and (or .cse0 .cse1) .cse2 (= ~z~0_In-545988864 |P2Thread1of1ForFork2_#t~ite38_Out-545988864|)) (and (= |P2Thread1of1ForFork2_#t~ite38_Out-545988864| ~z$w_buff1~0_In-545988864) (not .cse0) (not .cse1) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-545988864, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-545988864, ~z$w_buff1~0=~z$w_buff1~0_In-545988864, ~z~0=~z~0_In-545988864} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-545988864, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-545988864, ~z$w_buff1~0=~z$w_buff1~0_In-545988864, ~z~0=~z~0_In-545988864, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out-545988864|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out-545988864|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 17:47:43,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L796-->L796-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1205892062 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1205892062 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite40_Out1205892062| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite40_Out1205892062| ~z$w_buff0_used~0_In1205892062) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1205892062, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1205892062} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1205892062, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1205892062, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out1205892062|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 17:47:43,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L797-->L797-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1048776956 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1048776956 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1048776956 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In1048776956 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite41_Out1048776956|)) (and (= ~z$w_buff1_used~0_In1048776956 |P2Thread1of1ForFork2_#t~ite41_Out1048776956|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1048776956, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1048776956, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1048776956, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1048776956} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out1048776956|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1048776956, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1048776956, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1048776956, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1048776956} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 17:47:43,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L798-->L798-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-174543520 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-174543520 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out-174543520| 0)) (and (= |P2Thread1of1ForFork2_#t~ite42_Out-174543520| ~z$r_buff0_thd3~0_In-174543520) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-174543520, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-174543520} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-174543520|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-174543520, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-174543520} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 17:47:43,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L799-->L799-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In533619339 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In533619339 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In533619339 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In533619339 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite43_Out533619339| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite43_Out533619339| ~z$r_buff1_thd3~0_In533619339) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In533619339, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In533619339, ~z$w_buff1_used~0=~z$w_buff1_used~0_In533619339, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In533619339} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In533619339, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In533619339, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out533619339|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In533619339, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In533619339} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 17:47:43,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~z$r_buff1_thd3~0_167 |v_P2Thread1of1ForFork2_#t~ite43_38|)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_167, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_37|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 17:47:43,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L746-->L746-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd1~0_In364430610 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In364430610 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In364430610 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In364430610 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out364430610| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~z$r_buff1_thd1~0_In364430610 |P0Thread1of1ForFork0_#t~ite8_Out364430610|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In364430610, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In364430610, ~z$w_buff1_used~0=~z$w_buff1_used~0_In364430610, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In364430610} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In364430610, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out364430610|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In364430610, ~z$w_buff1_used~0=~z$w_buff1_used~0_In364430610, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In364430610} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:47:43,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L746-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_159 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_159, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:47:43,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L822-1-->L828: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:47:43,527 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L828-2-->L828-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite48_Out354752223| |ULTIMATE.start_main_#t~ite47_Out354752223|)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In354752223 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In354752223 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite47_Out354752223| ~z$w_buff1~0_In354752223) (not .cse1) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~ite47_Out354752223| ~z~0_In354752223)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In354752223, ~z$w_buff1_used~0=~z$w_buff1_used~0_In354752223, ~z$w_buff1~0=~z$w_buff1~0_In354752223, ~z~0=~z~0_In354752223} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In354752223, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out354752223|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In354752223, ~z$w_buff1~0=~z$w_buff1~0_In354752223, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out354752223|, ~z~0=~z~0_In354752223} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:47:43,527 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L829-->L829-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1231769165 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-1231769165 256) 0))) (or (and (= ~z$w_buff0_used~0_In-1231769165 |ULTIMATE.start_main_#t~ite49_Out-1231769165|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1231769165|) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1231769165, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1231769165} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1231769165, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1231769165, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1231769165|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:47:43,527 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L830-->L830-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1898472795 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1898472795 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In1898472795 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd0~0_In1898472795 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1898472795|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In1898472795 |ULTIMATE.start_main_#t~ite50_Out1898472795|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1898472795, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1898472795, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1898472795, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1898472795} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1898472795|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1898472795, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1898472795, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1898472795, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1898472795} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:47:43,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In1901767841 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1901767841 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out1901767841|)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In1901767841 |ULTIMATE.start_main_#t~ite51_Out1901767841|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1901767841, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1901767841} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1901767841, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1901767841|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1901767841} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:47:43,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L832-->L832-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd0~0_In1699270972 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1699270972 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1699270972 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In1699270972 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd0~0_In1699270972 |ULTIMATE.start_main_#t~ite52_Out1699270972|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out1699270972|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1699270972, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1699270972, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1699270972, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1699270972} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1699270972|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1699270972, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1699270972, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1699270972, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1699270972} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:47:43,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 2 v_~x~0_130) (= 0 v_~__unbuffered_p2_EAX~0_21) (= v_~y~0_23 2))) 1 0)) 0 1)) (= v_~z$r_buff1_thd0~0_167 |v_ULTIMATE.start_main_#t~ite52_35|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:47:43,583 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_ff7eb634-42ea-40a4-9428-af03dfed80a9/bin/uautomizer/witness.graphml [2019-12-07 17:47:43,583 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:47:43,584 INFO L168 Benchmark]: Toolchain (without parser) took 104689.75 ms. Allocated memory was 1.0 GB in the beginning and 7.9 GB in the end (delta: 6.9 GB). Free memory was 937.1 MB in the beginning and 4.9 GB in the end (delta: -3.9 GB). Peak memory consumption was 2.9 GB. Max. memory is 11.5 GB. [2019-12-07 17:47:43,584 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:47:43,585 INFO L168 Benchmark]: CACSL2BoogieTranslator took 395.51 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.9 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -126.6 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:47:43,585 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.26 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:47:43,585 INFO L168 Benchmark]: Boogie Preprocessor took 25.16 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:47:43,585 INFO L168 Benchmark]: RCFGBuilder took 409.54 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 17:47:43,585 INFO L168 Benchmark]: TraceAbstraction took 103749.71 ms. Allocated memory was 1.1 GB in the beginning and 7.9 GB in the end (delta: 6.8 GB). Free memory was 1.0 GB in the beginning and 4.9 GB in the end (delta: -3.9 GB). Peak memory consumption was 2.9 GB. Max. memory is 11.5 GB. [2019-12-07 17:47:43,586 INFO L168 Benchmark]: Witness Printer took 69.42 ms. Allocated memory is still 7.9 GB. Free memory was 4.9 GB in the beginning and 4.9 GB in the end (delta: 12.4 MB). Peak memory consumption was 12.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:47:43,587 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 395.51 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.9 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -126.6 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.26 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.16 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 409.54 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 103749.71 ms. Allocated memory was 1.1 GB in the beginning and 7.9 GB in the end (delta: 6.8 GB). Free memory was 1.0 GB in the beginning and 4.9 GB in the end (delta: -3.9 GB). Peak memory consumption was 2.9 GB. Max. memory is 11.5 GB. * Witness Printer took 69.42 ms. Allocated memory is still 7.9 GB. Free memory was 4.9 GB in the beginning and 4.9 GB in the end (delta: 12.4 MB). Peak memory consumption was 12.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 174 ProgramPointsBefore, 92 ProgramPointsAfterwards, 211 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 31 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 31 ChoiceCompositions, 6843 VarBasedMoverChecksPositive, 273 VarBasedMoverChecksNegative, 91 SemBasedMoverChecksPositive, 240 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 77200 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L818] FCALL, FORK 0 pthread_create(&t1501, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L820] FCALL, FORK 0 pthread_create(&t1502, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L822] FCALL, FORK 0 pthread_create(&t1503, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L732] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L733] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L734] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L735] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L736] 1 z$r_buff0_thd1 = (_Bool)1 [L739] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L756] 2 x = 2 [L759] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L776] 3 y = 2 [L779] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L780] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L781] 3 z$flush_delayed = weak$$choice2 [L782] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L783] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L783] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L784] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L785] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L786] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L786] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L762] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L743] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L744] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L762] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L763] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L764] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L765] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L787] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L789] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L790] 3 __unbuffered_p2_EAX = z VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L796] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L797] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L798] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L828] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L828] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L829] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L830] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L831] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 165 locations, 2 error locations. Result: UNSAFE, OverallTime: 103.5s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 22.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6455 SDtfs, 6502 SDslu, 18373 SDs, 0 SdLazy, 10804 SolverSat, 267 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 296 GetRequests, 51 SyntacticMatches, 20 SemanticMatches, 225 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1526 ImplicationChecksByTransitivity, 2.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=195815occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 63.3s AutomataMinimizationTime, 29 MinimizatonAttempts, 355618 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 1144 NumberOfCodeBlocks, 1144 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 1048 ConstructedInterpolants, 0 QuantifiedInterpolants, 220742 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...