./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_Triplicated.1.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_Triplicated.1.ufo.BOUNDED-10.pals.c -s /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0f7cb1fb9d530fed5cffc0369d2ffc038bc6f50c ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:36:40,290 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:36:40,291 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:36:40,299 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:36:40,299 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:36:40,300 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:36:40,301 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:36:40,302 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:36:40,303 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:36:40,304 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:36:40,304 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:36:40,305 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:36:40,305 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:36:40,306 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:36:40,307 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:36:40,308 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:36:40,308 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:36:40,309 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:36:40,310 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:36:40,311 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:36:40,312 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:36:40,313 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:36:40,314 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:36:40,314 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:36:40,316 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:36:40,316 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:36:40,316 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:36:40,317 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:36:40,317 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:36:40,318 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:36:40,318 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:36:40,318 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:36:40,319 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:36:40,319 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:36:40,320 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:36:40,320 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:36:40,320 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:36:40,320 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:36:40,320 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:36:40,321 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:36:40,321 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:36:40,322 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:36:40,331 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:36:40,331 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:36:40,332 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:36:40,332 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:36:40,332 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:36:40,332 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:36:40,333 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:36:40,333 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:36:40,333 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:36:40,333 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:36:40,333 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:36:40,333 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:36:40,333 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:36:40,333 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:36:40,334 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:36:40,334 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:36:40,334 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:36:40,334 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:36:40,334 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:36:40,334 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:36:40,334 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:36:40,334 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:36:40,335 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:36:40,335 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:36:40,335 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:36:40,335 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:36:40,335 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:36:40,335 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:36:40,335 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:36:40,335 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0f7cb1fb9d530fed5cffc0369d2ffc038bc6f50c [2019-12-07 17:36:40,438 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:36:40,446 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:36:40,448 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:36:40,449 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:36:40,450 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:36:40,450 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_Triplicated.1.ufo.BOUNDED-10.pals.c [2019-12-07 17:36:40,493 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/data/490552346/e585e774bbd24ec0915e00cbc8eac3b4/FLAG94eed8466 [2019-12-07 17:36:40,869 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:36:40,869 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_Triplicated.1.ufo.BOUNDED-10.pals.c [2019-12-07 17:36:40,876 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/data/490552346/e585e774bbd24ec0915e00cbc8eac3b4/FLAG94eed8466 [2019-12-07 17:36:40,885 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/data/490552346/e585e774bbd24ec0915e00cbc8eac3b4 [2019-12-07 17:36:40,887 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:36:40,887 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:36:40,888 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:36:40,888 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:36:40,891 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:36:40,891 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:36:40" (1/1) ... [2019-12-07 17:36:40,893 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@581b80cd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:36:40, skipping insertion in model container [2019-12-07 17:36:40,893 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:36:40" (1/1) ... [2019-12-07 17:36:40,897 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:36:40,928 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:36:41,106 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:36:41,111 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:36:41,146 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:36:41,158 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:36:41,158 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:36:41 WrapperNode [2019-12-07 17:36:41,158 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:36:41,159 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:36:41,159 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:36:41,159 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:36:41,164 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:36:41" (1/1) ... [2019-12-07 17:36:41,172 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:36:41" (1/1) ... [2019-12-07 17:36:41,212 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:36:41,212 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:36:41,212 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:36:41,212 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:36:41,219 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:36:41" (1/1) ... [2019-12-07 17:36:41,219 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:36:41" (1/1) ... [2019-12-07 17:36:41,225 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:36:41" (1/1) ... [2019-12-07 17:36:41,225 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:36:41" (1/1) ... [2019-12-07 17:36:41,245 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:36:41" (1/1) ... [2019-12-07 17:36:41,262 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:36:41" (1/1) ... [2019-12-07 17:36:41,265 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:36:41" (1/1) ... [2019-12-07 17:36:41,271 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:36:41,271 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:36:41,271 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:36:41,271 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:36:41,272 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:36:41" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:36:41,320 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:36:41,320 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:36:42,092 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:36:42,092 INFO L287 CfgBuilder]: Removed 173 assume(true) statements. [2019-12-07 17:36:42,093 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:36:42 BoogieIcfgContainer [2019-12-07 17:36:42,094 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:36:42,095 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:36:42,095 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:36:42,097 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:36:42,097 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:36:40" (1/3) ... [2019-12-07 17:36:42,098 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2c251486 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:36:42, skipping insertion in model container [2019-12-07 17:36:42,098 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:36:41" (2/3) ... [2019-12-07 17:36:42,098 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2c251486 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:36:42, skipping insertion in model container [2019-12-07 17:36:42,098 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:36:42" (3/3) ... [2019-12-07 17:36:42,100 INFO L109 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_Triplicated.1.ufo.BOUNDED-10.pals.c [2019-12-07 17:36:42,106 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:36:42,112 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 37 error locations. [2019-12-07 17:36:42,119 INFO L249 AbstractCegarLoop]: Starting to check reachability of 37 error locations. [2019-12-07 17:36:42,141 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:36:42,141 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:36:42,141 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:36:42,141 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:36:42,141 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:36:42,142 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:36:42,142 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:36:42,142 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:36:42,166 INFO L276 IsEmpty]: Start isEmpty. Operand 515 states. [2019-12-07 17:36:42,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 17:36:42,171 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:42,171 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:42,172 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:42,175 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:42,175 INFO L82 PathProgramCache]: Analyzing trace with hash 595705480, now seen corresponding path program 1 times [2019-12-07 17:36:42,181 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:42,181 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1164400230] [2019-12-07 17:36:42,181 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:42,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:42,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:36:42,317 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1164400230] [2019-12-07 17:36:42,318 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:42,318 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:42,320 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [431057229] [2019-12-07 17:36:42,323 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:42,324 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:42,332 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:42,333 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:42,334 INFO L87 Difference]: Start difference. First operand 515 states. Second operand 3 states. [2019-12-07 17:36:42,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:42,499 INFO L93 Difference]: Finished difference Result 1235 states and 2033 transitions. [2019-12-07 17:36:42,499 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:42,500 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 17:36:42,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:42,514 INFO L225 Difference]: With dead ends: 1235 [2019-12-07 17:36:42,514 INFO L226 Difference]: Without dead ends: 714 [2019-12-07 17:36:42,518 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:42,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 714 states. [2019-12-07 17:36:42,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 714 to 451. [2019-12-07 17:36:42,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 451 states. [2019-12-07 17:36:42,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 451 states to 451 states and 706 transitions. [2019-12-07 17:36:42,567 INFO L78 Accepts]: Start accepts. Automaton has 451 states and 706 transitions. Word has length 9 [2019-12-07 17:36:42,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:42,568 INFO L462 AbstractCegarLoop]: Abstraction has 451 states and 706 transitions. [2019-12-07 17:36:42,568 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:42,568 INFO L276 IsEmpty]: Start isEmpty. Operand 451 states and 706 transitions. [2019-12-07 17:36:42,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2019-12-07 17:36:42,569 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:42,569 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:42,569 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:42,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:42,570 INFO L82 PathProgramCache]: Analyzing trace with hash -503954138, now seen corresponding path program 1 times [2019-12-07 17:36:42,570 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:42,570 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871781127] [2019-12-07 17:36:42,570 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:42,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:42,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:36:42,602 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [871781127] [2019-12-07 17:36:42,602 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:42,602 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:42,602 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [214482972] [2019-12-07 17:36:42,603 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:42,604 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:42,604 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:42,604 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:42,604 INFO L87 Difference]: Start difference. First operand 451 states and 706 transitions. Second operand 3 states. [2019-12-07 17:36:42,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:42,650 INFO L93 Difference]: Finished difference Result 1113 states and 1728 transitions. [2019-12-07 17:36:42,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:42,651 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 10 [2019-12-07 17:36:42,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:42,654 INFO L225 Difference]: With dead ends: 1113 [2019-12-07 17:36:42,654 INFO L226 Difference]: Without dead ends: 664 [2019-12-07 17:36:42,656 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:42,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 664 states. [2019-12-07 17:36:42,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 664 to 418. [2019-12-07 17:36:42,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 418 states. [2019-12-07 17:36:42,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 418 states to 418 states and 648 transitions. [2019-12-07 17:36:42,671 INFO L78 Accepts]: Start accepts. Automaton has 418 states and 648 transitions. Word has length 10 [2019-12-07 17:36:42,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:42,671 INFO L462 AbstractCegarLoop]: Abstraction has 418 states and 648 transitions. [2019-12-07 17:36:42,671 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:42,671 INFO L276 IsEmpty]: Start isEmpty. Operand 418 states and 648 transitions. [2019-12-07 17:36:42,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:36:42,672 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:42,672 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:42,673 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:42,673 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:42,673 INFO L82 PathProgramCache]: Analyzing trace with hash -674152124, now seen corresponding path program 1 times [2019-12-07 17:36:42,673 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:42,673 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [396492429] [2019-12-07 17:36:42,674 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:42,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:42,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:36:42,703 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [396492429] [2019-12-07 17:36:42,704 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:42,704 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:42,704 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1905637857] [2019-12-07 17:36:42,704 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:42,704 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:42,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:42,705 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:42,705 INFO L87 Difference]: Start difference. First operand 418 states and 648 transitions. Second operand 3 states. [2019-12-07 17:36:42,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:42,750 INFO L93 Difference]: Finished difference Result 1232 states and 1915 transitions. [2019-12-07 17:36:42,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:42,750 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 17:36:42,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:42,754 INFO L225 Difference]: With dead ends: 1232 [2019-12-07 17:36:42,754 INFO L226 Difference]: Without dead ends: 824 [2019-12-07 17:36:42,755 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:42,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 824 states. [2019-12-07 17:36:42,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 824 to 422. [2019-12-07 17:36:42,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 422 states. [2019-12-07 17:36:42,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 422 states to 422 states and 652 transitions. [2019-12-07 17:36:42,767 INFO L78 Accepts]: Start accepts. Automaton has 422 states and 652 transitions. Word has length 13 [2019-12-07 17:36:42,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:42,768 INFO L462 AbstractCegarLoop]: Abstraction has 422 states and 652 transitions. [2019-12-07 17:36:42,768 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:42,768 INFO L276 IsEmpty]: Start isEmpty. Operand 422 states and 652 transitions. [2019-12-07 17:36:42,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 17:36:42,769 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:42,769 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:42,770 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:42,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:42,770 INFO L82 PathProgramCache]: Analyzing trace with hash 1826556945, now seen corresponding path program 1 times [2019-12-07 17:36:42,770 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:42,770 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1153502083] [2019-12-07 17:36:42,770 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:42,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:42,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:36:42,816 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1153502083] [2019-12-07 17:36:42,816 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:42,816 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:42,816 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1839681907] [2019-12-07 17:36:42,816 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:42,816 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:42,817 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:42,817 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:42,817 INFO L87 Difference]: Start difference. First operand 422 states and 652 transitions. Second operand 3 states. [2019-12-07 17:36:42,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:42,833 INFO L93 Difference]: Finished difference Result 659 states and 1012 transitions. [2019-12-07 17:36:42,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:42,834 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2019-12-07 17:36:42,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:42,837 INFO L225 Difference]: With dead ends: 659 [2019-12-07 17:36:42,837 INFO L226 Difference]: Without dead ends: 422 [2019-12-07 17:36:42,838 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:42,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 422 states. [2019-12-07 17:36:42,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 422 to 422. [2019-12-07 17:36:42,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 422 states. [2019-12-07 17:36:42,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 422 states to 422 states and 648 transitions. [2019-12-07 17:36:42,847 INFO L78 Accepts]: Start accepts. Automaton has 422 states and 648 transitions. Word has length 17 [2019-12-07 17:36:42,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:42,847 INFO L462 AbstractCegarLoop]: Abstraction has 422 states and 648 transitions. [2019-12-07 17:36:42,847 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:42,847 INFO L276 IsEmpty]: Start isEmpty. Operand 422 states and 648 transitions. [2019-12-07 17:36:42,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:36:42,848 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:42,848 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:42,848 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:42,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:42,849 INFO L82 PathProgramCache]: Analyzing trace with hash -35486156, now seen corresponding path program 1 times [2019-12-07 17:36:42,849 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:42,849 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1468941993] [2019-12-07 17:36:42,849 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:42,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:42,877 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:36:42,877 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1468941993] [2019-12-07 17:36:42,878 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:42,878 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:36:42,878 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1400160371] [2019-12-07 17:36:42,878 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:36:42,878 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:42,878 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:36:42,878 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:36:42,878 INFO L87 Difference]: Start difference. First operand 422 states and 648 transitions. Second operand 4 states. [2019-12-07 17:36:42,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:42,928 INFO L93 Difference]: Finished difference Result 1075 states and 1646 transitions. [2019-12-07 17:36:42,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:36:42,929 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2019-12-07 17:36:42,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:42,932 INFO L225 Difference]: With dead ends: 1075 [2019-12-07 17:36:42,932 INFO L226 Difference]: Without dead ends: 665 [2019-12-07 17:36:42,934 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:36:42,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 665 states. [2019-12-07 17:36:42,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 665 to 422. [2019-12-07 17:36:42,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 422 states. [2019-12-07 17:36:42,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 422 states to 422 states and 647 transitions. [2019-12-07 17:36:42,946 INFO L78 Accepts]: Start accepts. Automaton has 422 states and 647 transitions. Word has length 18 [2019-12-07 17:36:42,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:42,947 INFO L462 AbstractCegarLoop]: Abstraction has 422 states and 647 transitions. [2019-12-07 17:36:42,947 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:36:42,947 INFO L276 IsEmpty]: Start isEmpty. Operand 422 states and 647 transitions. [2019-12-07 17:36:42,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 17:36:42,948 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:42,948 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:42,948 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:42,949 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:42,949 INFO L82 PathProgramCache]: Analyzing trace with hash 1967275947, now seen corresponding path program 1 times [2019-12-07 17:36:42,949 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:42,949 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [945040070] [2019-12-07 17:36:42,949 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:42,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:42,982 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 17:36:42,982 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [945040070] [2019-12-07 17:36:42,983 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:42,983 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:42,983 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [27697625] [2019-12-07 17:36:42,983 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:42,983 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:42,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:42,984 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:42,984 INFO L87 Difference]: Start difference. First operand 422 states and 647 transitions. Second operand 3 states. [2019-12-07 17:36:43,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:43,061 INFO L93 Difference]: Finished difference Result 1017 states and 1548 transitions. [2019-12-07 17:36:43,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:43,061 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 17:36:43,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:43,065 INFO L225 Difference]: With dead ends: 1017 [2019-12-07 17:36:43,065 INFO L226 Difference]: Without dead ends: 610 [2019-12-07 17:36:43,066 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 610 states. [2019-12-07 17:36:43,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 610 to 377. [2019-12-07 17:36:43,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 377 states. [2019-12-07 17:36:43,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 377 states and 567 transitions. [2019-12-07 17:36:43,078 INFO L78 Accepts]: Start accepts. Automaton has 377 states and 567 transitions. Word has length 21 [2019-12-07 17:36:43,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:43,078 INFO L462 AbstractCegarLoop]: Abstraction has 377 states and 567 transitions. [2019-12-07 17:36:43,078 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:43,078 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 567 transitions. [2019-12-07 17:36:43,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 17:36:43,079 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:43,079 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:43,079 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:43,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:43,080 INFO L82 PathProgramCache]: Analyzing trace with hash -385095713, now seen corresponding path program 1 times [2019-12-07 17:36:43,080 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:43,080 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1063044508] [2019-12-07 17:36:43,080 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:43,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:43,107 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 17:36:43,107 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1063044508] [2019-12-07 17:36:43,107 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:43,107 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:43,107 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [554233038] [2019-12-07 17:36:43,107 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:43,108 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:43,108 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:43,108 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,108 INFO L87 Difference]: Start difference. First operand 377 states and 567 transitions. Second operand 3 states. [2019-12-07 17:36:43,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:43,148 INFO L93 Difference]: Finished difference Result 938 states and 1410 transitions. [2019-12-07 17:36:43,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:43,148 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 17:36:43,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:43,152 INFO L225 Difference]: With dead ends: 938 [2019-12-07 17:36:43,152 INFO L226 Difference]: Without dead ends: 576 [2019-12-07 17:36:43,153 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 576 states. [2019-12-07 17:36:43,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 576 to 351. [2019-12-07 17:36:43,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 351 states. [2019-12-07 17:36:43,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 351 states to 351 states and 521 transitions. [2019-12-07 17:36:43,163 INFO L78 Accepts]: Start accepts. Automaton has 351 states and 521 transitions. Word has length 21 [2019-12-07 17:36:43,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:43,163 INFO L462 AbstractCegarLoop]: Abstraction has 351 states and 521 transitions. [2019-12-07 17:36:43,164 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:43,164 INFO L276 IsEmpty]: Start isEmpty. Operand 351 states and 521 transitions. [2019-12-07 17:36:43,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 17:36:43,164 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:43,165 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:43,165 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:43,165 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:43,165 INFO L82 PathProgramCache]: Analyzing trace with hash 2032684668, now seen corresponding path program 1 times [2019-12-07 17:36:43,165 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:43,166 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1177936732] [2019-12-07 17:36:43,166 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:43,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:43,191 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 17:36:43,191 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1177936732] [2019-12-07 17:36:43,191 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:43,191 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:36:43,192 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [598969076] [2019-12-07 17:36:43,192 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:36:43,192 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:43,192 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:36:43,192 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:36:43,192 INFO L87 Difference]: Start difference. First operand 351 states and 521 transitions. Second operand 4 states. [2019-12-07 17:36:43,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:43,229 INFO L93 Difference]: Finished difference Result 899 states and 1341 transitions. [2019-12-07 17:36:43,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:36:43,229 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 17:36:43,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:43,231 INFO L225 Difference]: With dead ends: 899 [2019-12-07 17:36:43,231 INFO L226 Difference]: Without dead ends: 574 [2019-12-07 17:36:43,232 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:36:43,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 574 states. [2019-12-07 17:36:43,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 574 to 351. [2019-12-07 17:36:43,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 351 states. [2019-12-07 17:36:43,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 351 states to 351 states and 520 transitions. [2019-12-07 17:36:43,240 INFO L78 Accepts]: Start accepts. Automaton has 351 states and 520 transitions. Word has length 31 [2019-12-07 17:36:43,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:43,240 INFO L462 AbstractCegarLoop]: Abstraction has 351 states and 520 transitions. [2019-12-07 17:36:43,240 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:36:43,240 INFO L276 IsEmpty]: Start isEmpty. Operand 351 states and 520 transitions. [2019-12-07 17:36:43,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 17:36:43,241 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:43,241 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:43,241 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:43,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:43,241 INFO L82 PathProgramCache]: Analyzing trace with hash -290926641, now seen corresponding path program 1 times [2019-12-07 17:36:43,242 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:43,242 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1590868937] [2019-12-07 17:36:43,242 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:43,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:43,264 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-12-07 17:36:43,264 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1590868937] [2019-12-07 17:36:43,264 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:43,264 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:43,264 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1309352221] [2019-12-07 17:36:43,265 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:43,265 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:43,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:43,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,265 INFO L87 Difference]: Start difference. First operand 351 states and 520 transitions. Second operand 3 states. [2019-12-07 17:36:43,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:43,298 INFO L93 Difference]: Finished difference Result 872 states and 1304 transitions. [2019-12-07 17:36:43,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:43,299 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2019-12-07 17:36:43,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:43,302 INFO L225 Difference]: With dead ends: 872 [2019-12-07 17:36:43,302 INFO L226 Difference]: Without dead ends: 550 [2019-12-07 17:36:43,303 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 550 states. [2019-12-07 17:36:43,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 550 to 328. [2019-12-07 17:36:43,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328 states. [2019-12-07 17:36:43,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 482 transitions. [2019-12-07 17:36:43,313 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 482 transitions. Word has length 34 [2019-12-07 17:36:43,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:43,313 INFO L462 AbstractCegarLoop]: Abstraction has 328 states and 482 transitions. [2019-12-07 17:36:43,313 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:43,314 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 482 transitions. [2019-12-07 17:36:43,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 17:36:43,314 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:43,314 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:43,315 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:43,315 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:43,315 INFO L82 PathProgramCache]: Analyzing trace with hash 1984299198, now seen corresponding path program 1 times [2019-12-07 17:36:43,315 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:43,315 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1986261612] [2019-12-07 17:36:43,315 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:43,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:43,339 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-12-07 17:36:43,339 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1986261612] [2019-12-07 17:36:43,339 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:43,339 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:43,340 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1482000550] [2019-12-07 17:36:43,340 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:43,340 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:43,340 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:43,340 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,340 INFO L87 Difference]: Start difference. First operand 328 states and 482 transitions. Second operand 3 states. [2019-12-07 17:36:43,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:43,387 INFO L93 Difference]: Finished difference Result 734 states and 1080 transitions. [2019-12-07 17:36:43,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:43,387 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2019-12-07 17:36:43,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:43,389 INFO L225 Difference]: With dead ends: 734 [2019-12-07 17:36:43,389 INFO L226 Difference]: Without dead ends: 435 [2019-12-07 17:36:43,390 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 435 states. [2019-12-07 17:36:43,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 435 to 296. [2019-12-07 17:36:43,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 296 states. [2019-12-07 17:36:43,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 296 states to 296 states and 422 transitions. [2019-12-07 17:36:43,396 INFO L78 Accepts]: Start accepts. Automaton has 296 states and 422 transitions. Word has length 35 [2019-12-07 17:36:43,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:43,396 INFO L462 AbstractCegarLoop]: Abstraction has 296 states and 422 transitions. [2019-12-07 17:36:43,396 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:43,396 INFO L276 IsEmpty]: Start isEmpty. Operand 296 states and 422 transitions. [2019-12-07 17:36:43,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-12-07 17:36:43,397 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:43,397 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:43,397 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:43,397 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:43,397 INFO L82 PathProgramCache]: Analyzing trace with hash -1766202321, now seen corresponding path program 1 times [2019-12-07 17:36:43,397 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:43,397 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [530515606] [2019-12-07 17:36:43,397 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:43,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:43,423 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-12-07 17:36:43,423 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [530515606] [2019-12-07 17:36:43,423 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:43,423 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:36:43,423 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1702742382] [2019-12-07 17:36:43,424 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:36:43,424 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:43,424 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:36:43,424 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:36:43,424 INFO L87 Difference]: Start difference. First operand 296 states and 422 transitions. Second operand 4 states. [2019-12-07 17:36:43,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:43,452 INFO L93 Difference]: Finished difference Result 755 states and 1092 transitions. [2019-12-07 17:36:43,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:36:43,453 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 46 [2019-12-07 17:36:43,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:43,455 INFO L225 Difference]: With dead ends: 755 [2019-12-07 17:36:43,455 INFO L226 Difference]: Without dead ends: 501 [2019-12-07 17:36:43,456 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:36:43,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 501 states. [2019-12-07 17:36:43,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 501 to 296. [2019-12-07 17:36:43,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 296 states. [2019-12-07 17:36:43,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 296 states to 296 states and 421 transitions. [2019-12-07 17:36:43,462 INFO L78 Accepts]: Start accepts. Automaton has 296 states and 421 transitions. Word has length 46 [2019-12-07 17:36:43,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:43,462 INFO L462 AbstractCegarLoop]: Abstraction has 296 states and 421 transitions. [2019-12-07 17:36:43,462 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:36:43,462 INFO L276 IsEmpty]: Start isEmpty. Operand 296 states and 421 transitions. [2019-12-07 17:36:43,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-12-07 17:36:43,463 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:43,463 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:43,463 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:43,463 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:43,463 INFO L82 PathProgramCache]: Analyzing trace with hash -544708160, now seen corresponding path program 1 times [2019-12-07 17:36:43,463 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:43,464 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [842347121] [2019-12-07 17:36:43,464 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:43,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:43,486 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 17:36:43,487 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [842347121] [2019-12-07 17:36:43,487 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:43,487 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:43,487 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2061804775] [2019-12-07 17:36:43,487 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:43,487 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:43,487 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:43,487 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,488 INFO L87 Difference]: Start difference. First operand 296 states and 421 transitions. Second operand 3 states. [2019-12-07 17:36:43,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:43,513 INFO L93 Difference]: Finished difference Result 636 states and 939 transitions. [2019-12-07 17:36:43,513 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:43,513 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-12-07 17:36:43,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:43,516 INFO L225 Difference]: With dead ends: 636 [2019-12-07 17:36:43,516 INFO L226 Difference]: Without dead ends: 385 [2019-12-07 17:36:43,516 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 385 states. [2019-12-07 17:36:43,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 385 to 256. [2019-12-07 17:36:43,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 256 states. [2019-12-07 17:36:43,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 256 states to 256 states and 371 transitions. [2019-12-07 17:36:43,525 INFO L78 Accepts]: Start accepts. Automaton has 256 states and 371 transitions. Word has length 49 [2019-12-07 17:36:43,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:43,525 INFO L462 AbstractCegarLoop]: Abstraction has 256 states and 371 transitions. [2019-12-07 17:36:43,525 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:43,525 INFO L276 IsEmpty]: Start isEmpty. Operand 256 states and 371 transitions. [2019-12-07 17:36:43,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:36:43,526 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:43,526 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:43,526 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:43,526 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:43,526 INFO L82 PathProgramCache]: Analyzing trace with hash 390941353, now seen corresponding path program 1 times [2019-12-07 17:36:43,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:43,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [539979181] [2019-12-07 17:36:43,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:43,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:43,561 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 17:36:43,561 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [539979181] [2019-12-07 17:36:43,561 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:43,562 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:43,562 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1148582272] [2019-12-07 17:36:43,562 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:43,562 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:43,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:43,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,563 INFO L87 Difference]: Start difference. First operand 256 states and 371 transitions. Second operand 3 states. [2019-12-07 17:36:43,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:43,584 INFO L93 Difference]: Finished difference Result 437 states and 646 transitions. [2019-12-07 17:36:43,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:43,584 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 17:36:43,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:43,585 INFO L225 Difference]: With dead ends: 437 [2019-12-07 17:36:43,585 INFO L226 Difference]: Without dead ends: 226 [2019-12-07 17:36:43,586 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2019-12-07 17:36:43,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 226. [2019-12-07 17:36:43,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226 states. [2019-12-07 17:36:43,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 325 transitions. [2019-12-07 17:36:43,593 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 325 transitions. Word has length 56 [2019-12-07 17:36:43,593 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:43,593 INFO L462 AbstractCegarLoop]: Abstraction has 226 states and 325 transitions. [2019-12-07 17:36:43,593 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:43,593 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 325 transitions. [2019-12-07 17:36:43,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:36:43,594 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:43,594 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:43,594 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:43,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:43,594 INFO L82 PathProgramCache]: Analyzing trace with hash -1746044383, now seen corresponding path program 1 times [2019-12-07 17:36:43,594 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:43,595 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [114412070] [2019-12-07 17:36:43,595 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:43,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:43,630 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 17:36:43,631 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [114412070] [2019-12-07 17:36:43,631 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:43,631 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:36:43,631 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1323271255] [2019-12-07 17:36:43,631 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:36:43,631 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:43,631 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:36:43,631 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:36:43,631 INFO L87 Difference]: Start difference. First operand 226 states and 325 transitions. Second operand 4 states. [2019-12-07 17:36:43,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:43,657 INFO L93 Difference]: Finished difference Result 395 states and 580 transitions. [2019-12-07 17:36:43,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:36:43,657 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2019-12-07 17:36:43,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:43,659 INFO L225 Difference]: With dead ends: 395 [2019-12-07 17:36:43,659 INFO L226 Difference]: Without dead ends: 226 [2019-12-07 17:36:43,659 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:36:43,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2019-12-07 17:36:43,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 226. [2019-12-07 17:36:43,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226 states. [2019-12-07 17:36:43,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 324 transitions. [2019-12-07 17:36:43,666 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 324 transitions. Word has length 59 [2019-12-07 17:36:43,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:43,667 INFO L462 AbstractCegarLoop]: Abstraction has 226 states and 324 transitions. [2019-12-07 17:36:43,667 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:36:43,667 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 324 transitions. [2019-12-07 17:36:43,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-12-07 17:36:43,667 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:43,667 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:43,668 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:43,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:43,668 INFO L82 PathProgramCache]: Analyzing trace with hash 621112538, now seen corresponding path program 1 times [2019-12-07 17:36:43,668 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:43,668 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [577975087] [2019-12-07 17:36:43,668 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:43,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:43,702 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 17:36:43,702 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [577975087] [2019-12-07 17:36:43,702 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:43,702 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:43,702 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1476404758] [2019-12-07 17:36:43,703 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:43,703 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:43,703 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:43,703 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,703 INFO L87 Difference]: Start difference. First operand 226 states and 324 transitions. Second operand 3 states. [2019-12-07 17:36:43,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:43,722 INFO L93 Difference]: Finished difference Result 525 states and 779 transitions. [2019-12-07 17:36:43,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:43,722 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 62 [2019-12-07 17:36:43,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:43,724 INFO L225 Difference]: With dead ends: 525 [2019-12-07 17:36:43,724 INFO L226 Difference]: Without dead ends: 359 [2019-12-07 17:36:43,724 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 359 states. [2019-12-07 17:36:43,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 359 to 221. [2019-12-07 17:36:43,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states. [2019-12-07 17:36:43,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 316 transitions. [2019-12-07 17:36:43,730 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 316 transitions. Word has length 62 [2019-12-07 17:36:43,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:43,731 INFO L462 AbstractCegarLoop]: Abstraction has 221 states and 316 transitions. [2019-12-07 17:36:43,731 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:43,731 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 316 transitions. [2019-12-07 17:36:43,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:36:43,731 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:43,731 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:43,731 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:43,731 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:43,732 INFO L82 PathProgramCache]: Analyzing trace with hash 114301335, now seen corresponding path program 1 times [2019-12-07 17:36:43,732 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:43,732 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [244640539] [2019-12-07 17:36:43,732 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:43,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:43,770 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 17:36:43,771 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [244640539] [2019-12-07 17:36:43,771 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:43,771 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:43,771 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [849801693] [2019-12-07 17:36:43,771 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:43,771 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:43,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:43,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,772 INFO L87 Difference]: Start difference. First operand 221 states and 316 transitions. Second operand 3 states. [2019-12-07 17:36:43,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:43,793 INFO L93 Difference]: Finished difference Result 506 states and 750 transitions. [2019-12-07 17:36:43,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:43,794 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 17:36:43,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:43,795 INFO L225 Difference]: With dead ends: 506 [2019-12-07 17:36:43,795 INFO L226 Difference]: Without dead ends: 345 [2019-12-07 17:36:43,796 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states. [2019-12-07 17:36:43,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 217. [2019-12-07 17:36:43,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217 states. [2019-12-07 17:36:43,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 309 transitions. [2019-12-07 17:36:43,801 INFO L78 Accepts]: Start accepts. Automaton has 217 states and 309 transitions. Word has length 67 [2019-12-07 17:36:43,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:43,802 INFO L462 AbstractCegarLoop]: Abstraction has 217 states and 309 transitions. [2019-12-07 17:36:43,802 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:43,802 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 309 transitions. [2019-12-07 17:36:43,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-12-07 17:36:43,802 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:43,802 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:43,802 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:43,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:43,803 INFO L82 PathProgramCache]: Analyzing trace with hash 2093726931, now seen corresponding path program 1 times [2019-12-07 17:36:43,803 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:43,803 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1776976266] [2019-12-07 17:36:43,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:43,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:43,829 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 17:36:43,830 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1776976266] [2019-12-07 17:36:43,830 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:43,830 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:43,830 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [403322364] [2019-12-07 17:36:43,830 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:43,830 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:43,830 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:43,830 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,831 INFO L87 Difference]: Start difference. First operand 217 states and 309 transitions. Second operand 3 states. [2019-12-07 17:36:43,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:43,847 INFO L93 Difference]: Finished difference Result 372 states and 544 transitions. [2019-12-07 17:36:43,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:43,847 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 73 [2019-12-07 17:36:43,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:43,849 INFO L225 Difference]: With dead ends: 372 [2019-12-07 17:36:43,849 INFO L226 Difference]: Without dead ends: 215 [2019-12-07 17:36:43,850 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2019-12-07 17:36:43,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 214. [2019-12-07 17:36:43,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2019-12-07 17:36:43,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 303 transitions. [2019-12-07 17:36:43,858 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 303 transitions. Word has length 73 [2019-12-07 17:36:43,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:43,858 INFO L462 AbstractCegarLoop]: Abstraction has 214 states and 303 transitions. [2019-12-07 17:36:43,858 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:43,858 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 303 transitions. [2019-12-07 17:36:43,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-07 17:36:43,859 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:43,859 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:43,859 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:43,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:43,859 INFO L82 PathProgramCache]: Analyzing trace with hash -953900745, now seen corresponding path program 1 times [2019-12-07 17:36:43,860 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:43,860 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [123322256] [2019-12-07 17:36:43,860 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:43,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:43,901 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 17:36:43,901 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [123322256] [2019-12-07 17:36:43,901 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:43,901 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:43,901 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1142656098] [2019-12-07 17:36:43,902 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:43,902 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:43,902 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:43,902 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,902 INFO L87 Difference]: Start difference. First operand 214 states and 303 transitions. Second operand 3 states. [2019-12-07 17:36:43,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:43,913 INFO L93 Difference]: Finished difference Result 414 states and 603 transitions. [2019-12-07 17:36:43,914 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:43,914 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2019-12-07 17:36:43,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:43,915 INFO L225 Difference]: With dead ends: 414 [2019-12-07 17:36:43,915 INFO L226 Difference]: Without dead ends: 260 [2019-12-07 17:36:43,916 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:43,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 260 states. [2019-12-07 17:36:43,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 260 to 211. [2019-12-07 17:36:43,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211 states. [2019-12-07 17:36:43,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 299 transitions. [2019-12-07 17:36:43,923 INFO L78 Accepts]: Start accepts. Automaton has 211 states and 299 transitions. Word has length 80 [2019-12-07 17:36:43,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:43,923 INFO L462 AbstractCegarLoop]: Abstraction has 211 states and 299 transitions. [2019-12-07 17:36:43,923 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:43,923 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 299 transitions. [2019-12-07 17:36:43,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 17:36:43,923 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:43,923 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:43,924 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:43,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:43,924 INFO L82 PathProgramCache]: Analyzing trace with hash 1940476615, now seen corresponding path program 1 times [2019-12-07 17:36:43,924 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:43,924 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [7412910] [2019-12-07 17:36:43,924 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:43,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:43,984 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 17:36:43,984 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [7412910] [2019-12-07 17:36:43,984 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:43,984 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:36:43,985 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1004114493] [2019-12-07 17:36:43,985 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:36:43,985 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:43,985 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:36:43,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:36:43,985 INFO L87 Difference]: Start difference. First operand 211 states and 299 transitions. Second operand 4 states. [2019-12-07 17:36:44,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:44,054 INFO L93 Difference]: Finished difference Result 537 states and 782 transitions. [2019-12-07 17:36:44,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:36:44,054 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 83 [2019-12-07 17:36:44,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:44,055 INFO L225 Difference]: With dead ends: 537 [2019-12-07 17:36:44,056 INFO L226 Difference]: Without dead ends: 386 [2019-12-07 17:36:44,056 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:36:44,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 386 states. [2019-12-07 17:36:44,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 386 to 292. [2019-12-07 17:36:44,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 292 states. [2019-12-07 17:36:44,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 292 states to 292 states and 416 transitions. [2019-12-07 17:36:44,065 INFO L78 Accepts]: Start accepts. Automaton has 292 states and 416 transitions. Word has length 83 [2019-12-07 17:36:44,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:44,065 INFO L462 AbstractCegarLoop]: Abstraction has 292 states and 416 transitions. [2019-12-07 17:36:44,066 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:36:44,066 INFO L276 IsEmpty]: Start isEmpty. Operand 292 states and 416 transitions. [2019-12-07 17:36:44,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2019-12-07 17:36:44,066 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:44,066 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:44,066 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:44,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:44,067 INFO L82 PathProgramCache]: Analyzing trace with hash 1284591471, now seen corresponding path program 1 times [2019-12-07 17:36:44,067 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:44,067 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [226468787] [2019-12-07 17:36:44,067 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:44,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:44,105 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 17:36:44,105 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [226468787] [2019-12-07 17:36:44,106 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:44,106 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:44,106 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1273918257] [2019-12-07 17:36:44,106 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:44,106 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:44,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:44,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:44,106 INFO L87 Difference]: Start difference. First operand 292 states and 416 transitions. Second operand 3 states. [2019-12-07 17:36:44,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:44,131 INFO L93 Difference]: Finished difference Result 693 states and 1012 transitions. [2019-12-07 17:36:44,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:44,131 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 99 [2019-12-07 17:36:44,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:44,133 INFO L225 Difference]: With dead ends: 693 [2019-12-07 17:36:44,133 INFO L226 Difference]: Without dead ends: 499 [2019-12-07 17:36:44,134 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:44,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 499 states. [2019-12-07 17:36:44,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 499 to 362. [2019-12-07 17:36:44,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 362 states. [2019-12-07 17:36:44,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 362 states to 362 states and 515 transitions. [2019-12-07 17:36:44,148 INFO L78 Accepts]: Start accepts. Automaton has 362 states and 515 transitions. Word has length 99 [2019-12-07 17:36:44,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:44,148 INFO L462 AbstractCegarLoop]: Abstraction has 362 states and 515 transitions. [2019-12-07 17:36:44,148 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:44,148 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states and 515 transitions. [2019-12-07 17:36:44,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2019-12-07 17:36:44,149 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:44,149 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:44,149 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:44,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:44,149 INFO L82 PathProgramCache]: Analyzing trace with hash 1539198065, now seen corresponding path program 1 times [2019-12-07 17:36:44,150 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:44,150 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [806328813] [2019-12-07 17:36:44,150 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:44,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:44,189 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 17:36:44,189 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [806328813] [2019-12-07 17:36:44,189 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:44,189 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:44,189 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2085193446] [2019-12-07 17:36:44,190 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:44,190 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:44,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:44,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:44,190 INFO L87 Difference]: Start difference. First operand 362 states and 515 transitions. Second operand 3 states. [2019-12-07 17:36:44,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:44,221 INFO L93 Difference]: Finished difference Result 842 states and 1225 transitions. [2019-12-07 17:36:44,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:44,221 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 100 [2019-12-07 17:36:44,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:44,224 INFO L225 Difference]: With dead ends: 842 [2019-12-07 17:36:44,224 INFO L226 Difference]: Without dead ends: 605 [2019-12-07 17:36:44,224 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:44,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2019-12-07 17:36:44,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 456. [2019-12-07 17:36:44,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 456 states. [2019-12-07 17:36:44,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 456 states to 456 states and 649 transitions. [2019-12-07 17:36:44,239 INFO L78 Accepts]: Start accepts. Automaton has 456 states and 649 transitions. Word has length 100 [2019-12-07 17:36:44,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:44,240 INFO L462 AbstractCegarLoop]: Abstraction has 456 states and 649 transitions. [2019-12-07 17:36:44,240 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:44,240 INFO L276 IsEmpty]: Start isEmpty. Operand 456 states and 649 transitions. [2019-12-07 17:36:44,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2019-12-07 17:36:44,240 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:44,240 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:44,241 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:44,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:44,241 INFO L82 PathProgramCache]: Analyzing trace with hash 1069877832, now seen corresponding path program 1 times [2019-12-07 17:36:44,241 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:44,241 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2040242027] [2019-12-07 17:36:44,241 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:44,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:44,275 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 17:36:44,275 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2040242027] [2019-12-07 17:36:44,275 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1953978963] [2019-12-07 17:36:44,275 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:36:44,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:44,377 INFO L264 TraceCheckSpWp]: Trace formula consists of 510 conjuncts, 3 conjunts are in the unsatisfiable core [2019-12-07 17:36:44,385 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:36:44,413 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 17:36:44,413 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:36:44,414 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2019-12-07 17:36:44,414 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2110008470] [2019-12-07 17:36:44,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:36:44,414 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:44,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:36:44,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:36:44,415 INFO L87 Difference]: Start difference. First operand 456 states and 649 transitions. Second operand 6 states. [2019-12-07 17:36:44,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:44,637 INFO L93 Difference]: Finished difference Result 1192 states and 1648 transitions. [2019-12-07 17:36:44,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:36:44,637 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 101 [2019-12-07 17:36:44,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:44,640 INFO L225 Difference]: With dead ends: 1192 [2019-12-07 17:36:44,640 INFO L226 Difference]: Without dead ends: 747 [2019-12-07 17:36:44,641 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 108 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:36:44,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 747 states. [2019-12-07 17:36:44,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 747 to 497. [2019-12-07 17:36:44,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 497 states. [2019-12-07 17:36:44,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 497 states to 497 states and 689 transitions. [2019-12-07 17:36:44,658 INFO L78 Accepts]: Start accepts. Automaton has 497 states and 689 transitions. Word has length 101 [2019-12-07 17:36:44,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:44,659 INFO L462 AbstractCegarLoop]: Abstraction has 497 states and 689 transitions. [2019-12-07 17:36:44,659 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:36:44,659 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 689 transitions. [2019-12-07 17:36:44,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2019-12-07 17:36:44,660 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:44,660 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:44,860 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:36:44,861 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:44,861 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:44,861 INFO L82 PathProgramCache]: Analyzing trace with hash -958769693, now seen corresponding path program 1 times [2019-12-07 17:36:44,861 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:44,861 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [904758247] [2019-12-07 17:36:44,861 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:44,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:44,921 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2019-12-07 17:36:44,921 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [904758247] [2019-12-07 17:36:44,921 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1833085890] [2019-12-07 17:36:44,921 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:36:45,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:45,013 INFO L264 TraceCheckSpWp]: Trace formula consists of 614 conjuncts, 4 conjunts are in the unsatisfiable core [2019-12-07 17:36:45,017 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:36:45,044 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2019-12-07 17:36:45,044 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:36:45,044 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5] total 7 [2019-12-07 17:36:45,045 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [457714449] [2019-12-07 17:36:45,045 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:36:45,045 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:45,045 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:36:45,045 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:36:45,045 INFO L87 Difference]: Start difference. First operand 497 states and 689 transitions. Second operand 7 states. [2019-12-07 17:36:45,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:45,244 INFO L93 Difference]: Finished difference Result 1398 states and 1938 transitions. [2019-12-07 17:36:45,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:36:45,245 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 139 [2019-12-07 17:36:45,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:45,249 INFO L225 Difference]: With dead ends: 1398 [2019-12-07 17:36:45,250 INFO L226 Difference]: Without dead ends: 920 [2019-12-07 17:36:45,251 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:36:45,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 920 states. [2019-12-07 17:36:45,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 920 to 538. [2019-12-07 17:36:45,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 538 states. [2019-12-07 17:36:45,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 538 states to 538 states and 737 transitions. [2019-12-07 17:36:45,274 INFO L78 Accepts]: Start accepts. Automaton has 538 states and 737 transitions. Word has length 139 [2019-12-07 17:36:45,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:45,274 INFO L462 AbstractCegarLoop]: Abstraction has 538 states and 737 transitions. [2019-12-07 17:36:45,275 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:36:45,275 INFO L276 IsEmpty]: Start isEmpty. Operand 538 states and 737 transitions. [2019-12-07 17:36:45,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2019-12-07 17:36:45,276 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:45,276 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:45,476 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:36:45,477 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:45,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:45,477 INFO L82 PathProgramCache]: Analyzing trace with hash 818430710, now seen corresponding path program 1 times [2019-12-07 17:36:45,477 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:45,477 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1284081803] [2019-12-07 17:36:45,477 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:45,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:45,551 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:36:45,551 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1284081803] [2019-12-07 17:36:45,551 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:45,551 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:36:45,551 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1572497693] [2019-12-07 17:36:45,552 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:36:45,552 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:45,552 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:36:45,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:36:45,552 INFO L87 Difference]: Start difference. First operand 538 states and 737 transitions. Second operand 4 states. [2019-12-07 17:36:45,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:45,603 INFO L93 Difference]: Finished difference Result 853 states and 1188 transitions. [2019-12-07 17:36:45,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:36:45,604 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 177 [2019-12-07 17:36:45,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:45,607 INFO L225 Difference]: With dead ends: 853 [2019-12-07 17:36:45,607 INFO L226 Difference]: Without dead ends: 851 [2019-12-07 17:36:45,607 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:36:45,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 851 states. [2019-12-07 17:36:45,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 851 to 540. [2019-12-07 17:36:45,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-12-07 17:36:45,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 739 transitions. [2019-12-07 17:36:45,625 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 739 transitions. Word has length 177 [2019-12-07 17:36:45,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:45,625 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 739 transitions. [2019-12-07 17:36:45,625 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:36:45,625 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 739 transitions. [2019-12-07 17:36:45,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2019-12-07 17:36:45,626 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:45,626 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:45,627 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:45,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:45,627 INFO L82 PathProgramCache]: Analyzing trace with hash 1245468310, now seen corresponding path program 1 times [2019-12-07 17:36:45,627 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:45,627 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [527887197] [2019-12-07 17:36:45,627 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:45,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:45,738 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2019-12-07 17:36:45,738 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [527887197] [2019-12-07 17:36:45,738 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1008180048] [2019-12-07 17:36:45,738 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:36:45,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:45,868 INFO L264 TraceCheckSpWp]: Trace formula consists of 737 conjuncts, 8 conjunts are in the unsatisfiable core [2019-12-07 17:36:45,871 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:36:45,924 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2019-12-07 17:36:45,924 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:36:45,925 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2019-12-07 17:36:45,925 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [968976458] [2019-12-07 17:36:45,925 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:36:45,925 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:45,925 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:36:45,926 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:36:45,926 INFO L87 Difference]: Start difference. First operand 540 states and 739 transitions. Second operand 11 states. [2019-12-07 17:36:46,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:46,448 INFO L93 Difference]: Finished difference Result 3003 states and 4244 transitions. [2019-12-07 17:36:46,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 17:36:46,449 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 180 [2019-12-07 17:36:46,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:46,462 INFO L225 Difference]: With dead ends: 3003 [2019-12-07 17:36:46,462 INFO L226 Difference]: Without dead ends: 2700 [2019-12-07 17:36:46,464 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 179 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 148 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=158, Invalid=598, Unknown=0, NotChecked=0, Total=756 [2019-12-07 17:36:46,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2700 states. [2019-12-07 17:36:46,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2700 to 728. [2019-12-07 17:36:46,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 728 states. [2019-12-07 17:36:46,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 728 states to 728 states and 988 transitions. [2019-12-07 17:36:46,508 INFO L78 Accepts]: Start accepts. Automaton has 728 states and 988 transitions. Word has length 180 [2019-12-07 17:36:46,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:46,509 INFO L462 AbstractCegarLoop]: Abstraction has 728 states and 988 transitions. [2019-12-07 17:36:46,509 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:36:46,509 INFO L276 IsEmpty]: Start isEmpty. Operand 728 states and 988 transitions. [2019-12-07 17:36:46,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2019-12-07 17:36:46,510 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:46,510 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:46,711 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:36:46,711 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:46,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:46,711 INFO L82 PathProgramCache]: Analyzing trace with hash -34395368, now seen corresponding path program 1 times [2019-12-07 17:36:46,712 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:46,712 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2130414710] [2019-12-07 17:36:46,712 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:46,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:46,771 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:36:46,772 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2130414710] [2019-12-07 17:36:46,772 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:46,772 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:46,772 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [945583174] [2019-12-07 17:36:46,772 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:46,772 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:46,773 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:46,773 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:46,773 INFO L87 Difference]: Start difference. First operand 728 states and 988 transitions. Second operand 3 states. [2019-12-07 17:36:46,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:46,858 INFO L93 Difference]: Finished difference Result 1575 states and 2169 transitions. [2019-12-07 17:36:46,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:46,858 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 180 [2019-12-07 17:36:46,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:46,863 INFO L225 Difference]: With dead ends: 1575 [2019-12-07 17:36:46,863 INFO L226 Difference]: Without dead ends: 1272 [2019-12-07 17:36:46,864 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:46,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1272 states. [2019-12-07 17:36:46,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1272 to 728. [2019-12-07 17:36:46,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 728 states. [2019-12-07 17:36:46,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 728 states to 728 states and 986 transitions. [2019-12-07 17:36:46,899 INFO L78 Accepts]: Start accepts. Automaton has 728 states and 986 transitions. Word has length 180 [2019-12-07 17:36:46,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:46,899 INFO L462 AbstractCegarLoop]: Abstraction has 728 states and 986 transitions. [2019-12-07 17:36:46,899 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:46,899 INFO L276 IsEmpty]: Start isEmpty. Operand 728 states and 986 transitions. [2019-12-07 17:36:46,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2019-12-07 17:36:46,901 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:46,901 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:46,902 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:46,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:46,902 INFO L82 PathProgramCache]: Analyzing trace with hash 1859951354, now seen corresponding path program 1 times [2019-12-07 17:36:46,902 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:46,902 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [417110596] [2019-12-07 17:36:46,902 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:46,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:46,963 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 111 trivial. 0 not checked. [2019-12-07 17:36:46,963 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [417110596] [2019-12-07 17:36:46,963 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:46,964 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:46,964 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [79768350] [2019-12-07 17:36:46,964 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:46,964 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:46,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:46,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:46,965 INFO L87 Difference]: Start difference. First operand 728 states and 986 transitions. Second operand 3 states. [2019-12-07 17:36:47,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:47,028 INFO L93 Difference]: Finished difference Result 1194 states and 1630 transitions. [2019-12-07 17:36:47,029 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:47,029 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 183 [2019-12-07 17:36:47,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:47,031 INFO L225 Difference]: With dead ends: 1194 [2019-12-07 17:36:47,031 INFO L226 Difference]: Without dead ends: 587 [2019-12-07 17:36:47,031 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:47,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 587 states. [2019-12-07 17:36:47,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 587 to 586. [2019-12-07 17:36:47,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 586 states. [2019-12-07 17:36:47,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 586 states to 586 states and 770 transitions. [2019-12-07 17:36:47,053 INFO L78 Accepts]: Start accepts. Automaton has 586 states and 770 transitions. Word has length 183 [2019-12-07 17:36:47,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:47,054 INFO L462 AbstractCegarLoop]: Abstraction has 586 states and 770 transitions. [2019-12-07 17:36:47,054 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:47,054 INFO L276 IsEmpty]: Start isEmpty. Operand 586 states and 770 transitions. [2019-12-07 17:36:47,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 189 [2019-12-07 17:36:47,055 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:47,055 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:47,055 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:47,055 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:47,056 INFO L82 PathProgramCache]: Analyzing trace with hash 2102972572, now seen corresponding path program 1 times [2019-12-07 17:36:47,056 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:47,056 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [180189526] [2019-12-07 17:36:47,056 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:47,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:47,182 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:36:47,182 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [180189526] [2019-12-07 17:36:47,182 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:47,183 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:36:47,183 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2146026521] [2019-12-07 17:36:47,183 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 17:36:47,183 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:47,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 17:36:47,183 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:36:47,183 INFO L87 Difference]: Start difference. First operand 586 states and 770 transitions. Second operand 9 states. [2019-12-07 17:36:48,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:48,108 INFO L93 Difference]: Finished difference Result 1917 states and 2591 transitions. [2019-12-07 17:36:48,109 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 17:36:48,109 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 188 [2019-12-07 17:36:48,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:48,114 INFO L225 Difference]: With dead ends: 1917 [2019-12-07 17:36:48,115 INFO L226 Difference]: Without dead ends: 1625 [2019-12-07 17:36:48,116 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 481 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=384, Invalid=1256, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 17:36:48,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1625 states. [2019-12-07 17:36:48,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1625 to 676. [2019-12-07 17:36:48,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 676 states. [2019-12-07 17:36:48,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 676 states to 676 states and 886 transitions. [2019-12-07 17:36:48,144 INFO L78 Accepts]: Start accepts. Automaton has 676 states and 886 transitions. Word has length 188 [2019-12-07 17:36:48,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:48,144 INFO L462 AbstractCegarLoop]: Abstraction has 676 states and 886 transitions. [2019-12-07 17:36:48,144 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 17:36:48,144 INFO L276 IsEmpty]: Start isEmpty. Operand 676 states and 886 transitions. [2019-12-07 17:36:48,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2019-12-07 17:36:48,145 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:48,146 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:48,146 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:48,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:48,146 INFO L82 PathProgramCache]: Analyzing trace with hash -567802538, now seen corresponding path program 1 times [2019-12-07 17:36:48,146 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:48,146 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [569586669] [2019-12-07 17:36:48,146 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:48,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:48,215 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:36:48,215 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [569586669] [2019-12-07 17:36:48,215 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:48,216 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:36:48,216 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1049084221] [2019-12-07 17:36:48,216 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:36:48,216 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:48,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:36:48,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:36:48,217 INFO L87 Difference]: Start difference. First operand 676 states and 886 transitions. Second operand 6 states. [2019-12-07 17:36:48,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:48,318 INFO L93 Difference]: Finished difference Result 2098 states and 2832 transitions. [2019-12-07 17:36:48,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:36:48,319 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 194 [2019-12-07 17:36:48,319 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:48,325 INFO L225 Difference]: With dead ends: 2098 [2019-12-07 17:36:48,325 INFO L226 Difference]: Without dead ends: 1710 [2019-12-07 17:36:48,325 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:36:48,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1710 states. [2019-12-07 17:36:48,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1710 to 753. [2019-12-07 17:36:48,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 753 states. [2019-12-07 17:36:48,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 753 states to 753 states and 984 transitions. [2019-12-07 17:36:48,358 INFO L78 Accepts]: Start accepts. Automaton has 753 states and 984 transitions. Word has length 194 [2019-12-07 17:36:48,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:48,359 INFO L462 AbstractCegarLoop]: Abstraction has 753 states and 984 transitions. [2019-12-07 17:36:48,359 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:36:48,359 INFO L276 IsEmpty]: Start isEmpty. Operand 753 states and 984 transitions. [2019-12-07 17:36:48,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2019-12-07 17:36:48,360 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:48,360 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:48,360 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:48,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:48,361 INFO L82 PathProgramCache]: Analyzing trace with hash 190520342, now seen corresponding path program 1 times [2019-12-07 17:36:48,361 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:48,361 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031554076] [2019-12-07 17:36:48,361 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:48,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:48,453 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:36:48,453 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031554076] [2019-12-07 17:36:48,453 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:48,453 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:36:48,453 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [58174542] [2019-12-07 17:36:48,453 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:36:48,453 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:48,454 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:36:48,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:36:48,454 INFO L87 Difference]: Start difference. First operand 753 states and 984 transitions. Second operand 7 states. [2019-12-07 17:36:48,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:48,746 INFO L93 Difference]: Finished difference Result 1788 states and 2367 transitions. [2019-12-07 17:36:48,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 17:36:48,746 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 194 [2019-12-07 17:36:48,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:48,753 INFO L225 Difference]: With dead ends: 1788 [2019-12-07 17:36:48,753 INFO L226 Difference]: Without dead ends: 1326 [2019-12-07 17:36:48,754 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=48, Invalid=84, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:36:48,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1326 states. [2019-12-07 17:36:48,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1326 to 794. [2019-12-07 17:36:48,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 794 states. [2019-12-07 17:36:48,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 794 states to 794 states and 1030 transitions. [2019-12-07 17:36:48,800 INFO L78 Accepts]: Start accepts. Automaton has 794 states and 1030 transitions. Word has length 194 [2019-12-07 17:36:48,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:48,800 INFO L462 AbstractCegarLoop]: Abstraction has 794 states and 1030 transitions. [2019-12-07 17:36:48,800 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:36:48,800 INFO L276 IsEmpty]: Start isEmpty. Operand 794 states and 1030 transitions. [2019-12-07 17:36:48,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2019-12-07 17:36:48,801 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:48,801 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:48,802 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:48,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:48,802 INFO L82 PathProgramCache]: Analyzing trace with hash -1531612590, now seen corresponding path program 1 times [2019-12-07 17:36:48,802 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:48,802 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101775167] [2019-12-07 17:36:48,802 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:48,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:48,899 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:36:48,899 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1101775167] [2019-12-07 17:36:48,899 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:48,899 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:36:48,899 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [77430967] [2019-12-07 17:36:48,900 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:36:48,900 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:48,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:36:48,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:36:48,900 INFO L87 Difference]: Start difference. First operand 794 states and 1030 transitions. Second operand 7 states. [2019-12-07 17:36:49,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:49,207 INFO L93 Difference]: Finished difference Result 1858 states and 2447 transitions. [2019-12-07 17:36:49,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 17:36:49,207 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 194 [2019-12-07 17:36:49,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:49,211 INFO L225 Difference]: With dead ends: 1858 [2019-12-07 17:36:49,212 INFO L226 Difference]: Without dead ends: 1350 [2019-12-07 17:36:49,212 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=48, Invalid=84, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:36:49,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1350 states. [2019-12-07 17:36:49,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1350 to 813. [2019-12-07 17:36:49,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 813 states. [2019-12-07 17:36:49,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 813 states to 813 states and 1054 transitions. [2019-12-07 17:36:49,261 INFO L78 Accepts]: Start accepts. Automaton has 813 states and 1054 transitions. Word has length 194 [2019-12-07 17:36:49,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:49,261 INFO L462 AbstractCegarLoop]: Abstraction has 813 states and 1054 transitions. [2019-12-07 17:36:49,261 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:36:49,261 INFO L276 IsEmpty]: Start isEmpty. Operand 813 states and 1054 transitions. [2019-12-07 17:36:49,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2019-12-07 17:36:49,263 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:49,263 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:49,264 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:49,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:49,264 INFO L82 PathProgramCache]: Analyzing trace with hash 440473311, now seen corresponding path program 1 times [2019-12-07 17:36:49,264 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:49,264 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1284121659] [2019-12-07 17:36:49,264 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:49,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:49,351 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 141 trivial. 0 not checked. [2019-12-07 17:36:49,352 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1284121659] [2019-12-07 17:36:49,352 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:49,352 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:36:49,352 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1512790747] [2019-12-07 17:36:49,352 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:36:49,352 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:49,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:36:49,353 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:36:49,353 INFO L87 Difference]: Start difference. First operand 813 states and 1054 transitions. Second operand 4 states. [2019-12-07 17:36:49,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:49,464 INFO L93 Difference]: Finished difference Result 1471 states and 1934 transitions. [2019-12-07 17:36:49,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:36:49,464 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 204 [2019-12-07 17:36:49,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:49,468 INFO L225 Difference]: With dead ends: 1471 [2019-12-07 17:36:49,468 INFO L226 Difference]: Without dead ends: 952 [2019-12-07 17:36:49,468 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:36:49,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 952 states. [2019-12-07 17:36:49,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 952 to 643. [2019-12-07 17:36:49,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 643 states. [2019-12-07 17:36:49,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 643 states to 643 states and 823 transitions. [2019-12-07 17:36:49,497 INFO L78 Accepts]: Start accepts. Automaton has 643 states and 823 transitions. Word has length 204 [2019-12-07 17:36:49,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:49,498 INFO L462 AbstractCegarLoop]: Abstraction has 643 states and 823 transitions. [2019-12-07 17:36:49,498 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:36:49,498 INFO L276 IsEmpty]: Start isEmpty. Operand 643 states and 823 transitions. [2019-12-07 17:36:49,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2019-12-07 17:36:49,499 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:49,499 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:49,499 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:49,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:49,499 INFO L82 PathProgramCache]: Analyzing trace with hash 1123003554, now seen corresponding path program 1 times [2019-12-07 17:36:49,500 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:49,500 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1329480547] [2019-12-07 17:36:49,500 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:49,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:49,695 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 2 proven. 38 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:36:49,695 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1329480547] [2019-12-07 17:36:49,695 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [231935725] [2019-12-07 17:36:49,695 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:36:49,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:49,811 INFO L264 TraceCheckSpWp]: Trace formula consists of 945 conjuncts, 14 conjunts are in the unsatisfiable core [2019-12-07 17:36:49,814 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:36:49,936 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 9 proven. 31 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:36:49,937 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:36:49,937 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8] total 19 [2019-12-07 17:36:49,937 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [984847630] [2019-12-07 17:36:49,937 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 17:36:49,937 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:49,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 17:36:49,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=306, Unknown=0, NotChecked=0, Total=342 [2019-12-07 17:36:49,938 INFO L87 Difference]: Start difference. First operand 643 states and 823 transitions. Second operand 19 states. [2019-12-07 17:37:14,952 WARN L192 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 39 [2019-12-07 17:37:16,492 WARN L192 SmtUtils]: Spent 104.00 ms on a formula simplification that was a NOOP. DAG size: 40 [2019-12-07 17:37:18,865 WARN L192 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 30 [2019-12-07 17:37:19,437 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 27 [2019-12-07 17:37:20,416 WARN L192 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 45 [2019-12-07 17:37:21,254 WARN L192 SmtUtils]: Spent 188.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 42 [2019-12-07 17:37:23,574 WARN L192 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 39 [2019-12-07 17:37:24,151 WARN L192 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 36 [2019-12-07 17:37:42,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:42,698 INFO L93 Difference]: Finished difference Result 19642 states and 25843 transitions. [2019-12-07 17:37:42,698 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 948 states. [2019-12-07 17:37:42,698 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 227 [2019-12-07 17:37:42,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:42,727 INFO L225 Difference]: With dead ends: 19642 [2019-12-07 17:37:42,727 INFO L226 Difference]: Without dead ends: 19249 [2019-12-07 17:37:42,765 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1184 GetRequests, 222 SyntacticMatches, 0 SemanticMatches, 962 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 443379 ImplicationChecksByTransitivity, 43.4s TimeCoverageRelationStatistics Valid=62902, Invalid=865430, Unknown=0, NotChecked=0, Total=928332 [2019-12-07 17:37:42,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19249 states. [2019-12-07 17:37:42,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19249 to 1981. [2019-12-07 17:37:42,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1981 states. [2019-12-07 17:37:42,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1981 states to 1981 states and 2506 transitions. [2019-12-07 17:37:42,968 INFO L78 Accepts]: Start accepts. Automaton has 1981 states and 2506 transitions. Word has length 227 [2019-12-07 17:37:42,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:42,969 INFO L462 AbstractCegarLoop]: Abstraction has 1981 states and 2506 transitions. [2019-12-07 17:37:42,969 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 17:37:42,969 INFO L276 IsEmpty]: Start isEmpty. Operand 1981 states and 2506 transitions. [2019-12-07 17:37:42,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2019-12-07 17:37:42,971 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:42,972 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:43,172 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:37:43,173 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:43,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:43,174 INFO L82 PathProgramCache]: Analyzing trace with hash 1517205090, now seen corresponding path program 1 times [2019-12-07 17:37:43,175 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:43,175 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [715438955] [2019-12-07 17:37:43,176 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:43,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:43,233 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 150 trivial. 0 not checked. [2019-12-07 17:37:43,233 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [715438955] [2019-12-07 17:37:43,233 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:43,233 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:37:43,233 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1046145498] [2019-12-07 17:37:43,234 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:37:43,234 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:43,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:37:43,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:37:43,234 INFO L87 Difference]: Start difference. First operand 1981 states and 2506 transitions. Second operand 3 states. [2019-12-07 17:37:43,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:43,386 INFO L93 Difference]: Finished difference Result 3907 states and 4933 transitions. [2019-12-07 17:37:43,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:37:43,386 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 227 [2019-12-07 17:37:43,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:43,390 INFO L225 Difference]: With dead ends: 3907 [2019-12-07 17:37:43,390 INFO L226 Difference]: Without dead ends: 2206 [2019-12-07 17:37:43,391 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:37:43,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2206 states. [2019-12-07 17:37:43,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2206 to 1975. [2019-12-07 17:37:43,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1975 states. [2019-12-07 17:37:43,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1975 states to 1975 states and 2410 transitions. [2019-12-07 17:37:43,520 INFO L78 Accepts]: Start accepts. Automaton has 1975 states and 2410 transitions. Word has length 227 [2019-12-07 17:37:43,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:43,520 INFO L462 AbstractCegarLoop]: Abstraction has 1975 states and 2410 transitions. [2019-12-07 17:37:43,521 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:37:43,521 INFO L276 IsEmpty]: Start isEmpty. Operand 1975 states and 2410 transitions. [2019-12-07 17:37:43,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2019-12-07 17:37:43,523 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:43,523 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:43,523 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:43,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:43,523 INFO L82 PathProgramCache]: Analyzing trace with hash 1152779492, now seen corresponding path program 1 times [2019-12-07 17:37:43,523 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:43,524 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [508779472] [2019-12-07 17:37:43,524 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:43,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:43,583 INFO L134 CoverageAnalysis]: Checked inductivity of 159 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 137 trivial. 0 not checked. [2019-12-07 17:37:43,583 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [508779472] [2019-12-07 17:37:43,583 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:43,583 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:37:43,583 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [399597692] [2019-12-07 17:37:43,583 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:37:43,583 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:43,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:37:43,584 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:37:43,584 INFO L87 Difference]: Start difference. First operand 1975 states and 2410 transitions. Second operand 3 states. [2019-12-07 17:37:43,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:43,833 INFO L93 Difference]: Finished difference Result 5180 states and 6289 transitions. [2019-12-07 17:37:43,833 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:37:43,833 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 227 [2019-12-07 17:37:43,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:43,838 INFO L225 Difference]: With dead ends: 5180 [2019-12-07 17:37:43,839 INFO L226 Difference]: Without dead ends: 3565 [2019-12-07 17:37:43,841 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:37:43,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3565 states. [2019-12-07 17:37:43,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3565 to 2157. [2019-12-07 17:37:43,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2157 states. [2019-12-07 17:37:43,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2157 states to 2157 states and 2636 transitions. [2019-12-07 17:37:43,997 INFO L78 Accepts]: Start accepts. Automaton has 2157 states and 2636 transitions. Word has length 227 [2019-12-07 17:37:43,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:43,997 INFO L462 AbstractCegarLoop]: Abstraction has 2157 states and 2636 transitions. [2019-12-07 17:37:43,997 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:37:43,997 INFO L276 IsEmpty]: Start isEmpty. Operand 2157 states and 2636 transitions. [2019-12-07 17:37:43,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2019-12-07 17:37:44,000 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:44,000 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:44,000 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:44,000 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:44,000 INFO L82 PathProgramCache]: Analyzing trace with hash 1229680290, now seen corresponding path program 1 times [2019-12-07 17:37:44,000 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:44,000 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [391530368] [2019-12-07 17:37:44,000 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:44,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:44,096 INFO L134 CoverageAnalysis]: Checked inductivity of 159 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2019-12-07 17:37:44,096 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [391530368] [2019-12-07 17:37:44,096 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:44,096 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:37:44,096 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1709185547] [2019-12-07 17:37:44,096 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:37:44,097 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:44,097 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:37:44,097 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:37:44,097 INFO L87 Difference]: Start difference. First operand 2157 states and 2636 transitions. Second operand 3 states. [2019-12-07 17:37:44,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:44,246 INFO L93 Difference]: Finished difference Result 3950 states and 4834 transitions. [2019-12-07 17:37:44,247 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:37:44,247 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 227 [2019-12-07 17:37:44,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:44,248 INFO L225 Difference]: With dead ends: 3950 [2019-12-07 17:37:44,249 INFO L226 Difference]: Without dead ends: 2052 [2019-12-07 17:37:44,250 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:37:44,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2052 states. [2019-12-07 17:37:44,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2052 to 2052. [2019-12-07 17:37:44,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2052 states. [2019-12-07 17:37:44,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2052 states to 2052 states and 2487 transitions. [2019-12-07 17:37:44,382 INFO L78 Accepts]: Start accepts. Automaton has 2052 states and 2487 transitions. Word has length 227 [2019-12-07 17:37:44,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:44,382 INFO L462 AbstractCegarLoop]: Abstraction has 2052 states and 2487 transitions. [2019-12-07 17:37:44,382 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:37:44,383 INFO L276 IsEmpty]: Start isEmpty. Operand 2052 states and 2487 transitions. [2019-12-07 17:37:44,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2019-12-07 17:37:44,385 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:44,385 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:44,385 INFO L410 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:44,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:44,385 INFO L82 PathProgramCache]: Analyzing trace with hash -1966251894, now seen corresponding path program 1 times [2019-12-07 17:37:44,385 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:44,385 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [513238507] [2019-12-07 17:37:44,385 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:44,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:44,592 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 34 proven. 9 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2019-12-07 17:37:44,592 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [513238507] [2019-12-07 17:37:44,592 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1609048082] [2019-12-07 17:37:44,592 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:37:44,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:44,699 INFO L264 TraceCheckSpWp]: Trace formula consists of 946 conjuncts, 14 conjunts are in the unsatisfiable core [2019-12-07 17:37:44,702 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:37:44,797 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 3 proven. 31 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:37:44,797 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:37:44,797 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 16 [2019-12-07 17:37:44,797 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [893387557] [2019-12-07 17:37:44,798 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 17:37:44,798 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:44,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 17:37:44,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-12-07 17:37:44,798 INFO L87 Difference]: Start difference. First operand 2052 states and 2487 transitions. Second operand 16 states. [2019-12-07 17:37:49,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:49,459 INFO L93 Difference]: Finished difference Result 8491 states and 10576 transitions. [2019-12-07 17:37:49,460 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 106 states. [2019-12-07 17:37:49,460 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 228 [2019-12-07 17:37:49,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:49,465 INFO L225 Difference]: With dead ends: 8491 [2019-12-07 17:37:49,465 INFO L226 Difference]: Without dead ends: 6817 [2019-12-07 17:37:49,467 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 339 GetRequests, 224 SyntacticMatches, 0 SemanticMatches, 115 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4759 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=1357, Invalid=12215, Unknown=0, NotChecked=0, Total=13572 [2019-12-07 17:37:49,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6817 states. [2019-12-07 17:37:49,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6817 to 2669. [2019-12-07 17:37:49,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2669 states. [2019-12-07 17:37:49,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2669 states to 2669 states and 3222 transitions. [2019-12-07 17:37:49,659 INFO L78 Accepts]: Start accepts. Automaton has 2669 states and 3222 transitions. Word has length 228 [2019-12-07 17:37:49,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:49,659 INFO L462 AbstractCegarLoop]: Abstraction has 2669 states and 3222 transitions. [2019-12-07 17:37:49,659 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 17:37:49,659 INFO L276 IsEmpty]: Start isEmpty. Operand 2669 states and 3222 transitions. [2019-12-07 17:37:49,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 237 [2019-12-07 17:37:49,662 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:49,662 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:49,862 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:37:49,864 INFO L410 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:49,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:49,865 INFO L82 PathProgramCache]: Analyzing trace with hash -2076085201, now seen corresponding path program 1 times [2019-12-07 17:37:49,865 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:49,866 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [822761458] [2019-12-07 17:37:49,866 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:49,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:49,909 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 157 trivial. 0 not checked. [2019-12-07 17:37:49,910 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [822761458] [2019-12-07 17:37:49,910 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:49,910 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:37:49,910 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1550136246] [2019-12-07 17:37:49,910 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:37:49,910 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:49,910 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:37:49,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:37:49,911 INFO L87 Difference]: Start difference. First operand 2669 states and 3222 transitions. Second operand 3 states. [2019-12-07 17:37:50,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:50,090 INFO L93 Difference]: Finished difference Result 5032 states and 6063 transitions. [2019-12-07 17:37:50,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:37:50,090 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 236 [2019-12-07 17:37:50,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:50,092 INFO L225 Difference]: With dead ends: 5032 [2019-12-07 17:37:50,092 INFO L226 Difference]: Without dead ends: 2376 [2019-12-07 17:37:50,094 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:37:50,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2376 states. [2019-12-07 17:37:50,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2376 to 2376. [2019-12-07 17:37:50,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2376 states. [2019-12-07 17:37:50,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2376 states to 2376 states and 2847 transitions. [2019-12-07 17:37:50,264 INFO L78 Accepts]: Start accepts. Automaton has 2376 states and 2847 transitions. Word has length 236 [2019-12-07 17:37:50,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:50,264 INFO L462 AbstractCegarLoop]: Abstraction has 2376 states and 2847 transitions. [2019-12-07 17:37:50,265 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:37:50,265 INFO L276 IsEmpty]: Start isEmpty. Operand 2376 states and 2847 transitions. [2019-12-07 17:37:50,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 240 [2019-12-07 17:37:50,267 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:50,267 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:50,267 INFO L410 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:50,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:50,268 INFO L82 PathProgramCache]: Analyzing trace with hash -1025167456, now seen corresponding path program 1 times [2019-12-07 17:37:50,268 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:50,268 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1310962092] [2019-12-07 17:37:50,268 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:50,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:50,372 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 40 proven. 6 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:37:50,372 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1310962092] [2019-12-07 17:37:50,373 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [33899377] [2019-12-07 17:37:50,373 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:37:50,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:50,497 INFO L264 TraceCheckSpWp]: Trace formula consists of 983 conjuncts, 5 conjunts are in the unsatisfiable core [2019-12-07 17:37:50,501 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:37:50,573 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2019-12-07 17:37:50,573 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-12-07 17:37:50,573 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 9 [2019-12-07 17:37:50,573 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1419348289] [2019-12-07 17:37:50,574 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:37:50,574 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:50,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:37:50,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:37:50,574 INFO L87 Difference]: Start difference. First operand 2376 states and 2847 transitions. Second operand 5 states. [2019-12-07 17:37:50,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:50,776 INFO L93 Difference]: Finished difference Result 4440 states and 5345 transitions. [2019-12-07 17:37:50,776 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:37:50,776 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 239 [2019-12-07 17:37:50,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:50,778 INFO L225 Difference]: With dead ends: 4440 [2019-12-07 17:37:50,778 INFO L226 Difference]: Without dead ends: 2388 [2019-12-07 17:37:50,779 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 244 GetRequests, 237 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:37:50,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2388 states. [2019-12-07 17:37:50,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2388 to 2384. [2019-12-07 17:37:50,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2384 states. [2019-12-07 17:37:50,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2384 states to 2384 states and 2851 transitions. [2019-12-07 17:37:50,946 INFO L78 Accepts]: Start accepts. Automaton has 2384 states and 2851 transitions. Word has length 239 [2019-12-07 17:37:50,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:50,946 INFO L462 AbstractCegarLoop]: Abstraction has 2384 states and 2851 transitions. [2019-12-07 17:37:50,947 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:37:50,947 INFO L276 IsEmpty]: Start isEmpty. Operand 2384 states and 2851 transitions. [2019-12-07 17:37:50,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2019-12-07 17:37:50,949 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:50,949 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:51,150 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:37:51,151 INFO L410 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:51,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:51,152 INFO L82 PathProgramCache]: Analyzing trace with hash -142468327, now seen corresponding path program 1 times [2019-12-07 17:37:51,152 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:51,152 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [26072440] [2019-12-07 17:37:51,153 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:51,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:51,363 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 2 proven. 44 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:37:51,363 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [26072440] [2019-12-07 17:37:51,363 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1562271363] [2019-12-07 17:37:51,363 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:37:51,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:51,461 INFO L264 TraceCheckSpWp]: Trace formula consists of 986 conjuncts, 30 conjunts are in the unsatisfiable core [2019-12-07 17:37:51,464 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:37:51,792 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 38 proven. 30 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked. [2019-12-07 17:37:51,793 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:37:51,793 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 17] total 28 [2019-12-07 17:37:51,793 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1121402002] [2019-12-07 17:37:51,793 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2019-12-07 17:37:51,793 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:51,793 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2019-12-07 17:37:51,793 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=687, Unknown=0, NotChecked=0, Total=756 [2019-12-07 17:37:51,794 INFO L87 Difference]: Start difference. First operand 2384 states and 2851 transitions. Second operand 28 states. [2019-12-07 17:37:53,376 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 30 [2019-12-07 17:37:54,112 WARN L192 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 33 [2019-12-07 17:37:58,895 WARN L192 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 36 [2019-12-07 17:38:04,458 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 30 [2019-12-07 17:38:14,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:38:14,107 INFO L93 Difference]: Finished difference Result 17921 states and 22663 transitions. [2019-12-07 17:38:14,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 237 states. [2019-12-07 17:38:14,107 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 240 [2019-12-07 17:38:14,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:38:14,117 INFO L225 Difference]: With dead ends: 17921 [2019-12-07 17:38:14,117 INFO L226 Difference]: Without dead ends: 15908 [2019-12-07 17:38:14,123 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 486 GetRequests, 225 SyntacticMatches, 0 SemanticMatches, 261 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28101 ImplicationChecksByTransitivity, 9.7s TimeCoverageRelationStatistics Valid=6878, Invalid=62028, Unknown=0, NotChecked=0, Total=68906 [2019-12-07 17:38:14,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15908 states. [2019-12-07 17:38:14,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15908 to 2384. [2019-12-07 17:38:14,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2384 states. [2019-12-07 17:38:14,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2384 states to 2384 states and 2848 transitions. [2019-12-07 17:38:14,417 INFO L78 Accepts]: Start accepts. Automaton has 2384 states and 2848 transitions. Word has length 240 [2019-12-07 17:38:14,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:38:14,417 INFO L462 AbstractCegarLoop]: Abstraction has 2384 states and 2848 transitions. [2019-12-07 17:38:14,417 INFO L463 AbstractCegarLoop]: Interpolant automaton has 28 states. [2019-12-07 17:38:14,418 INFO L276 IsEmpty]: Start isEmpty. Operand 2384 states and 2848 transitions. [2019-12-07 17:38:14,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 248 [2019-12-07 17:38:14,420 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:38:14,420 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:38:14,620 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:38:14,622 INFO L410 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:38:14,622 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:38:14,622 INFO L82 PathProgramCache]: Analyzing trace with hash 141943766, now seen corresponding path program 1 times [2019-12-07 17:38:14,623 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:38:14,623 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1573326474] [2019-12-07 17:38:14,623 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:38:14,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:38:14,828 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 42 proven. 9 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2019-12-07 17:38:14,828 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1573326474] [2019-12-07 17:38:14,828 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2038812319] [2019-12-07 17:38:14,828 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:38:14,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:38:14,930 INFO L264 TraceCheckSpWp]: Trace formula consists of 1006 conjuncts, 30 conjunts are in the unsatisfiable core [2019-12-07 17:38:14,933 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:38:15,159 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 26 proven. 34 refuted. 0 times theorem prover too weak. 97 trivial. 0 not checked. [2019-12-07 17:38:15,160 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:38:15,160 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 17] total 21 [2019-12-07 17:38:15,160 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2058218783] [2019-12-07 17:38:15,160 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 17:38:15,160 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:38:15,160 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 17:38:15,161 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=358, Unknown=0, NotChecked=0, Total=420 [2019-12-07 17:38:15,161 INFO L87 Difference]: Start difference. First operand 2384 states and 2848 transitions. Second operand 21 states. [2019-12-07 17:38:16,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:38:16,052 INFO L93 Difference]: Finished difference Result 5943 states and 7264 transitions. [2019-12-07 17:38:16,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 17:38:16,053 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 247 [2019-12-07 17:38:16,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:38:16,055 INFO L225 Difference]: With dead ends: 5943 [2019-12-07 17:38:16,056 INFO L226 Difference]: Without dead ends: 3930 [2019-12-07 17:38:16,057 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 275 GetRequests, 236 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 378 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=234, Invalid=1326, Unknown=0, NotChecked=0, Total=1560 [2019-12-07 17:38:16,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3930 states. [2019-12-07 17:38:16,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3930 to 2384. [2019-12-07 17:38:16,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2384 states. [2019-12-07 17:38:16,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2384 states to 2384 states and 2845 transitions. [2019-12-07 17:38:16,271 INFO L78 Accepts]: Start accepts. Automaton has 2384 states and 2845 transitions. Word has length 247 [2019-12-07 17:38:16,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:38:16,272 INFO L462 AbstractCegarLoop]: Abstraction has 2384 states and 2845 transitions. [2019-12-07 17:38:16,272 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 17:38:16,272 INFO L276 IsEmpty]: Start isEmpty. Operand 2384 states and 2845 transitions. [2019-12-07 17:38:16,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2019-12-07 17:38:16,274 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:38:16,274 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:38:16,475 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:38:16,476 INFO L410 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:38:16,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:38:16,477 INFO L82 PathProgramCache]: Analyzing trace with hash -1242684788, now seen corresponding path program 1 times [2019-12-07 17:38:16,478 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:38:16,478 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [742641787] [2019-12-07 17:38:16,478 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:38:16,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:38:16,772 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 2 proven. 32 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:38:16,773 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [742641787] [2019-12-07 17:38:16,773 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1370148007] [2019-12-07 17:38:16,773 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:38:16,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:38:16,884 INFO L264 TraceCheckSpWp]: Trace formula consists of 1078 conjuncts, 44 conjunts are in the unsatisfiable core [2019-12-07 17:38:16,887 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:38:17,399 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 2 proven. 45 refuted. 0 times theorem prover too weak. 110 trivial. 0 not checked. [2019-12-07 17:38:17,400 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:38:17,400 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 20] total 33 [2019-12-07 17:38:17,400 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1658886360] [2019-12-07 17:38:17,400 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2019-12-07 17:38:17,400 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:38:17,401 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2019-12-07 17:38:17,401 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=957, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 17:38:17,401 INFO L87 Difference]: Start difference. First operand 2384 states and 2845 transitions. Second operand 34 states. [2019-12-07 17:38:27,077 WARN L192 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 47 [2019-12-07 17:38:33,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:38:33,189 INFO L93 Difference]: Finished difference Result 34903 states and 43194 transitions. [2019-12-07 17:38:33,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 212 states. [2019-12-07 17:38:33,189 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 263 [2019-12-07 17:38:33,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:38:33,212 INFO L225 Difference]: With dead ends: 34903 [2019-12-07 17:38:33,212 INFO L226 Difference]: Without dead ends: 32923 [2019-12-07 17:38:33,219 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 485 GetRequests, 244 SyntacticMatches, 0 SemanticMatches, 241 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23286 ImplicationChecksByTransitivity, 7.9s TimeCoverageRelationStatistics Valid=7826, Invalid=50980, Unknown=0, NotChecked=0, Total=58806 [2019-12-07 17:38:33,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32923 states. [2019-12-07 17:38:33,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32923 to 3730. [2019-12-07 17:38:33,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3730 states. [2019-12-07 17:38:33,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3730 states to 3730 states and 4630 transitions. [2019-12-07 17:38:33,766 INFO L78 Accepts]: Start accepts. Automaton has 3730 states and 4630 transitions. Word has length 263 [2019-12-07 17:38:33,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:38:33,766 INFO L462 AbstractCegarLoop]: Abstraction has 3730 states and 4630 transitions. [2019-12-07 17:38:33,766 INFO L463 AbstractCegarLoop]: Interpolant automaton has 34 states. [2019-12-07 17:38:33,766 INFO L276 IsEmpty]: Start isEmpty. Operand 3730 states and 4630 transitions. [2019-12-07 17:38:33,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2019-12-07 17:38:33,770 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:38:33,770 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:38:33,970 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:38:33,971 INFO L410 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:38:33,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:38:33,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1001873610, now seen corresponding path program 1 times [2019-12-07 17:38:33,973 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:38:33,973 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834039848] [2019-12-07 17:38:33,973 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:38:34,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:38:34,094 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 150 trivial. 0 not checked. [2019-12-07 17:38:34,094 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [834039848] [2019-12-07 17:38:34,094 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:38:34,094 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:38:34,094 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2093889895] [2019-12-07 17:38:34,095 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:38:34,095 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:38:34,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:38:34,095 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:38:34,095 INFO L87 Difference]: Start difference. First operand 3730 states and 4630 transitions. Second operand 5 states. [2019-12-07 17:38:34,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:38:34,608 INFO L93 Difference]: Finished difference Result 6787 states and 8420 transitions. [2019-12-07 17:38:34,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:38:34,608 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 263 [2019-12-07 17:38:34,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:38:34,611 INFO L225 Difference]: With dead ends: 6787 [2019-12-07 17:38:34,611 INFO L226 Difference]: Without dead ends: 3811 [2019-12-07 17:38:34,613 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:38:34,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3811 states. [2019-12-07 17:38:35,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3811 to 3784. [2019-12-07 17:38:35,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3784 states. [2019-12-07 17:38:35,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3784 states to 3784 states and 4665 transitions. [2019-12-07 17:38:35,047 INFO L78 Accepts]: Start accepts. Automaton has 3784 states and 4665 transitions. Word has length 263 [2019-12-07 17:38:35,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:38:35,047 INFO L462 AbstractCegarLoop]: Abstraction has 3784 states and 4665 transitions. [2019-12-07 17:38:35,047 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:38:35,047 INFO L276 IsEmpty]: Start isEmpty. Operand 3784 states and 4665 transitions. [2019-12-07 17:38:35,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2019-12-07 17:38:35,051 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:38:35,051 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:38:35,051 INFO L410 AbstractCegarLoop]: === Iteration 44 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:38:35,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:38:35,051 INFO L82 PathProgramCache]: Analyzing trace with hash 1049882029, now seen corresponding path program 1 times [2019-12-07 17:38:35,052 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:38:35,052 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1435508392] [2019-12-07 17:38:35,052 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:38:35,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:38:35,262 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 2 proven. 44 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:38:35,262 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1435508392] [2019-12-07 17:38:35,262 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [376192611] [2019-12-07 17:38:35,263 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:38:35,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:38:35,384 INFO L264 TraceCheckSpWp]: Trace formula consists of 1080 conjuncts, 26 conjunts are in the unsatisfiable core [2019-12-07 17:38:35,387 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:38:35,631 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 6 proven. 40 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:38:35,632 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:38:35,632 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 23 [2019-12-07 17:38:35,632 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [990357127] [2019-12-07 17:38:35,632 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 17:38:35,633 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:38:35,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 17:38:35,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=475, Unknown=0, NotChecked=0, Total=552 [2019-12-07 17:38:35,633 INFO L87 Difference]: Start difference. First operand 3784 states and 4665 transitions. Second operand 24 states. [2019-12-07 17:38:47,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:38:47,540 INFO L93 Difference]: Finished difference Result 32517 states and 40961 transitions. [2019-12-07 17:38:47,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 231 states. [2019-12-07 17:38:47,540 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 264 [2019-12-07 17:38:47,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:38:47,562 INFO L225 Difference]: With dead ends: 32517 [2019-12-07 17:38:47,562 INFO L226 Difference]: Without dead ends: 29900 [2019-12-07 17:38:47,567 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 499 GetRequests, 253 SyntacticMatches, 0 SemanticMatches, 246 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24766 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=9015, Invalid=52241, Unknown=0, NotChecked=0, Total=61256 [2019-12-07 17:38:47,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29900 states. [2019-12-07 17:38:48,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29900 to 3766. [2019-12-07 17:38:48,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3766 states. [2019-12-07 17:38:48,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3766 states to 3766 states and 4647 transitions. [2019-12-07 17:38:48,139 INFO L78 Accepts]: Start accepts. Automaton has 3766 states and 4647 transitions. Word has length 264 [2019-12-07 17:38:48,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:38:48,140 INFO L462 AbstractCegarLoop]: Abstraction has 3766 states and 4647 transitions. [2019-12-07 17:38:48,140 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 17:38:48,140 INFO L276 IsEmpty]: Start isEmpty. Operand 3766 states and 4647 transitions. [2019-12-07 17:38:48,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2019-12-07 17:38:48,143 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:38:48,143 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:38:48,344 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:38:48,345 INFO L410 AbstractCegarLoop]: === Iteration 45 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:38:48,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:38:48,345 INFO L82 PathProgramCache]: Analyzing trace with hash 101830063, now seen corresponding path program 1 times [2019-12-07 17:38:48,346 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:38:48,346 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1208592179] [2019-12-07 17:38:48,346 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:38:48,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:38:48,409 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 164 trivial. 0 not checked. [2019-12-07 17:38:48,410 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1208592179] [2019-12-07 17:38:48,410 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:38:48,410 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:38:48,410 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2108821090] [2019-12-07 17:38:48,410 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:38:48,410 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:38:48,410 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:38:48,410 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:38:48,410 INFO L87 Difference]: Start difference. First operand 3766 states and 4647 transitions. Second operand 3 states. [2019-12-07 17:38:48,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:38:48,677 INFO L93 Difference]: Finished difference Result 5059 states and 6220 transitions. [2019-12-07 17:38:48,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:38:48,677 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 264 [2019-12-07 17:38:48,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:38:48,679 INFO L225 Difference]: With dead ends: 5059 [2019-12-07 17:38:48,679 INFO L226 Difference]: Without dead ends: 2007 [2019-12-07 17:38:48,681 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:38:48,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2007 states. [2019-12-07 17:38:48,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2007 to 2007. [2019-12-07 17:38:48,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2007 states. [2019-12-07 17:38:48,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2007 states to 2007 states and 2431 transitions. [2019-12-07 17:38:48,947 INFO L78 Accepts]: Start accepts. Automaton has 2007 states and 2431 transitions. Word has length 264 [2019-12-07 17:38:48,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:38:48,948 INFO L462 AbstractCegarLoop]: Abstraction has 2007 states and 2431 transitions. [2019-12-07 17:38:48,948 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:38:48,948 INFO L276 IsEmpty]: Start isEmpty. Operand 2007 states and 2431 transitions. [2019-12-07 17:38:48,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2019-12-07 17:38:48,950 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:38:48,950 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:38:48,950 INFO L410 AbstractCegarLoop]: === Iteration 46 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:38:48,950 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:38:48,950 INFO L82 PathProgramCache]: Analyzing trace with hash -1980513461, now seen corresponding path program 1 times [2019-12-07 17:38:48,950 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:38:48,950 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [670540419] [2019-12-07 17:38:48,951 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:38:48,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:38:49,228 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 2 proven. 32 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:38:49,229 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [670540419] [2019-12-07 17:38:49,229 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [699816801] [2019-12-07 17:38:49,229 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:38:49,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:38:49,340 INFO L264 TraceCheckSpWp]: Trace formula consists of 1079 conjuncts, 29 conjunts are in the unsatisfiable core [2019-12-07 17:38:49,343 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:38:49,592 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 9 proven. 25 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:38:49,592 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:38:49,593 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12] total 25 [2019-12-07 17:38:49,593 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [475829095] [2019-12-07 17:38:49,593 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-12-07 17:38:49,593 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:38:49,593 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 17:38:49,593 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=545, Unknown=0, NotChecked=0, Total=650 [2019-12-07 17:38:49,593 INFO L87 Difference]: Start difference. First operand 2007 states and 2431 transitions. Second operand 26 states. [2019-12-07 17:38:59,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:38:59,609 INFO L93 Difference]: Finished difference Result 16848 states and 20993 transitions. [2019-12-07 17:38:59,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 200 states. [2019-12-07 17:38:59,610 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 264 [2019-12-07 17:38:59,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:38:59,619 INFO L225 Difference]: With dead ends: 16848 [2019-12-07 17:38:59,619 INFO L226 Difference]: Without dead ends: 15564 [2019-12-07 17:38:59,623 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 470 GetRequests, 253 SyntacticMatches, 0 SemanticMatches, 217 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18425 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=7715, Invalid=40027, Unknown=0, NotChecked=0, Total=47742 [2019-12-07 17:38:59,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15564 states. [2019-12-07 17:39:00,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15564 to 2803. [2019-12-07 17:39:00,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2803 states. [2019-12-07 17:39:00,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2803 states to 2803 states and 3403 transitions. [2019-12-07 17:39:00,119 INFO L78 Accepts]: Start accepts. Automaton has 2803 states and 3403 transitions. Word has length 264 [2019-12-07 17:39:00,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:39:00,119 INFO L462 AbstractCegarLoop]: Abstraction has 2803 states and 3403 transitions. [2019-12-07 17:39:00,119 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-12-07 17:39:00,120 INFO L276 IsEmpty]: Start isEmpty. Operand 2803 states and 3403 transitions. [2019-12-07 17:39:00,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2019-12-07 17:39:00,122 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:39:00,122 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:39:00,323 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:39:00,323 INFO L410 AbstractCegarLoop]: === Iteration 47 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:39:00,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:39:00,324 INFO L82 PathProgramCache]: Analyzing trace with hash -1384604213, now seen corresponding path program 1 times [2019-12-07 17:39:00,325 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:39:00,325 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1638224110] [2019-12-07 17:39:00,325 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:39:00,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:39:00,537 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 6 proven. 28 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:39:00,537 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1638224110] [2019-12-07 17:39:00,537 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [330018585] [2019-12-07 17:39:00,538 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:39:00,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:39:00,649 INFO L264 TraceCheckSpWp]: Trace formula consists of 1079 conjuncts, 14 conjunts are in the unsatisfiable core [2019-12-07 17:39:00,652 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:39:00,753 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 6 proven. 28 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:39:00,754 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:39:00,754 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 9 [2019-12-07 17:39:00,754 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [383760543] [2019-12-07 17:39:00,754 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 17:39:00,754 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:39:00,755 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 17:39:00,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:39:00,755 INFO L87 Difference]: Start difference. First operand 2803 states and 3403 transitions. Second operand 9 states. [2019-12-07 17:39:03,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:39:03,784 INFO L93 Difference]: Finished difference Result 15324 states and 19033 transitions. [2019-12-07 17:39:03,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 17:39:03,784 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 264 [2019-12-07 17:39:03,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:39:03,793 INFO L225 Difference]: With dead ends: 15324 [2019-12-07 17:39:03,793 INFO L226 Difference]: Without dead ends: 12992 [2019-12-07 17:39:03,796 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 313 GetRequests, 271 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 503 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=340, Invalid=1382, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 17:39:03,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12992 states. [2019-12-07 17:39:04,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12992 to 3602. [2019-12-07 17:39:04,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3602 states. [2019-12-07 17:39:04,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3602 states to 3602 states and 4327 transitions. [2019-12-07 17:39:04,380 INFO L78 Accepts]: Start accepts. Automaton has 3602 states and 4327 transitions. Word has length 264 [2019-12-07 17:39:04,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:39:04,381 INFO L462 AbstractCegarLoop]: Abstraction has 3602 states and 4327 transitions. [2019-12-07 17:39:04,381 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 17:39:04,381 INFO L276 IsEmpty]: Start isEmpty. Operand 3602 states and 4327 transitions. [2019-12-07 17:39:04,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 266 [2019-12-07 17:39:04,384 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:39:04,384 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:39:04,585 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:39:04,586 INFO L410 AbstractCegarLoop]: === Iteration 48 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:39:04,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:39:04,587 INFO L82 PathProgramCache]: Analyzing trace with hash 1379689948, now seen corresponding path program 1 times [2019-12-07 17:39:04,587 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:39:04,587 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [971664524] [2019-12-07 17:39:04,588 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:39:04,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:39:04,669 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 139 trivial. 0 not checked. [2019-12-07 17:39:04,669 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [971664524] [2019-12-07 17:39:04,669 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:39:04,669 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:39:04,669 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1844902074] [2019-12-07 17:39:04,670 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:39:04,670 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:39:04,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:39:04,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:39:04,670 INFO L87 Difference]: Start difference. First operand 3602 states and 4327 transitions. Second operand 7 states. [2019-12-07 17:39:06,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:39:06,071 INFO L93 Difference]: Finished difference Result 9425 states and 11654 transitions. [2019-12-07 17:39:06,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:39:06,072 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 265 [2019-12-07 17:39:06,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:39:06,076 INFO L225 Difference]: With dead ends: 9425 [2019-12-07 17:39:06,076 INFO L226 Difference]: Without dead ends: 6340 [2019-12-07 17:39:06,078 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:39:06,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6340 states. [2019-12-07 17:39:06,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6340 to 3830. [2019-12-07 17:39:06,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3830 states. [2019-12-07 17:39:06,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3830 states to 3830 states and 4615 transitions. [2019-12-07 17:39:06,682 INFO L78 Accepts]: Start accepts. Automaton has 3830 states and 4615 transitions. Word has length 265 [2019-12-07 17:39:06,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:39:06,683 INFO L462 AbstractCegarLoop]: Abstraction has 3830 states and 4615 transitions. [2019-12-07 17:39:06,683 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:39:06,683 INFO L276 IsEmpty]: Start isEmpty. Operand 3830 states and 4615 transitions. [2019-12-07 17:39:06,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 266 [2019-12-07 17:39:06,686 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:39:06,687 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:39:06,687 INFO L410 AbstractCegarLoop]: === Iteration 49 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:39:06,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:39:06,687 INFO L82 PathProgramCache]: Analyzing trace with hash -1010771129, now seen corresponding path program 1 times [2019-12-07 17:39:06,687 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:39:06,687 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1308493911] [2019-12-07 17:39:06,687 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:39:06,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:39:06,959 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 2 proven. 32 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:39:06,959 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1308493911] [2019-12-07 17:39:06,960 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1905098681] [2019-12-07 17:39:06,960 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:39:07,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:39:07,065 INFO L264 TraceCheckSpWp]: Trace formula consists of 1080 conjuncts, 28 conjunts are in the unsatisfiable core [2019-12-07 17:39:07,068 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:39:07,308 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 9 proven. 25 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:39:07,308 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:39:07,308 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12] total 25 [2019-12-07 17:39:07,308 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2090088283] [2019-12-07 17:39:07,309 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-12-07 17:39:07,309 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:39:07,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 17:39:07,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=545, Unknown=0, NotChecked=0, Total=650 [2019-12-07 17:39:07,309 INFO L87 Difference]: Start difference. First operand 3830 states and 4615 transitions. Second operand 26 states. [2019-12-07 17:39:20,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:39:20,876 INFO L93 Difference]: Finished difference Result 33948 states and 42322 transitions. [2019-12-07 17:39:20,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 200 states. [2019-12-07 17:39:20,877 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 265 [2019-12-07 17:39:20,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:39:20,897 INFO L225 Difference]: With dead ends: 33948 [2019-12-07 17:39:20,897 INFO L226 Difference]: Without dead ends: 30635 [2019-12-07 17:39:20,903 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 471 GetRequests, 254 SyntacticMatches, 0 SemanticMatches, 217 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18257 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=7715, Invalid=40027, Unknown=0, NotChecked=0, Total=47742 [2019-12-07 17:39:20,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30635 states. [2019-12-07 17:39:21,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30635 to 3814. [2019-12-07 17:39:21,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3814 states. [2019-12-07 17:39:21,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3814 states to 3814 states and 4599 transitions. [2019-12-07 17:39:21,636 INFO L78 Accepts]: Start accepts. Automaton has 3814 states and 4599 transitions. Word has length 265 [2019-12-07 17:39:21,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:39:21,636 INFO L462 AbstractCegarLoop]: Abstraction has 3814 states and 4599 transitions. [2019-12-07 17:39:21,636 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-12-07 17:39:21,636 INFO L276 IsEmpty]: Start isEmpty. Operand 3814 states and 4599 transitions. [2019-12-07 17:39:21,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 266 [2019-12-07 17:39:21,639 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:39:21,640 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:39:21,840 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:39:21,841 INFO L410 AbstractCegarLoop]: === Iteration 50 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:39:21,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:39:21,841 INFO L82 PathProgramCache]: Analyzing trace with hash -63733243, now seen corresponding path program 1 times [2019-12-07 17:39:21,842 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:39:21,842 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [390077057] [2019-12-07 17:39:21,842 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:39:21,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:39:21,927 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 150 trivial. 0 not checked. [2019-12-07 17:39:21,928 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [390077057] [2019-12-07 17:39:21,928 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:39:21,928 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:39:21,928 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1214045069] [2019-12-07 17:39:21,928 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:39:21,928 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:39:21,928 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:39:21,929 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:39:21,929 INFO L87 Difference]: Start difference. First operand 3814 states and 4599 transitions. Second operand 3 states. [2019-12-07 17:39:22,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:39:22,425 INFO L93 Difference]: Finished difference Result 6234 states and 7548 transitions. [2019-12-07 17:39:22,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:39:22,425 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 265 [2019-12-07 17:39:22,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:39:22,427 INFO L225 Difference]: With dead ends: 6234 [2019-12-07 17:39:22,427 INFO L226 Difference]: Without dead ends: 2732 [2019-12-07 17:39:22,430 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:39:22,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2732 states. [2019-12-07 17:39:22,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2732 to 2732. [2019-12-07 17:39:22,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2732 states. [2019-12-07 17:39:22,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2732 states to 2732 states and 3281 transitions. [2019-12-07 17:39:22,943 INFO L78 Accepts]: Start accepts. Automaton has 2732 states and 3281 transitions. Word has length 265 [2019-12-07 17:39:22,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:39:22,943 INFO L462 AbstractCegarLoop]: Abstraction has 2732 states and 3281 transitions. [2019-12-07 17:39:22,944 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:39:22,944 INFO L276 IsEmpty]: Start isEmpty. Operand 2732 states and 3281 transitions. [2019-12-07 17:39:22,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 268 [2019-12-07 17:39:22,946 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:39:22,946 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:39:22,947 INFO L410 AbstractCegarLoop]: === Iteration 51 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:39:22,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:39:22,947 INFO L82 PathProgramCache]: Analyzing trace with hash 555037377, now seen corresponding path program 1 times [2019-12-07 17:39:22,947 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:39:22,947 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1712990630] [2019-12-07 17:39:22,947 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:39:22,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:39:23,018 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 139 trivial. 0 not checked. [2019-12-07 17:39:23,018 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1712990630] [2019-12-07 17:39:23,018 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:39:23,018 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:39:23,018 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [51043203] [2019-12-07 17:39:23,019 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:39:23,019 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:39:23,019 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:39:23,019 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:39:23,019 INFO L87 Difference]: Start difference. First operand 2732 states and 3281 transitions. Second operand 7 states. [2019-12-07 17:39:24,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:39:24,053 INFO L93 Difference]: Finished difference Result 6302 states and 7702 transitions. [2019-12-07 17:39:24,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 17:39:24,054 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 267 [2019-12-07 17:39:24,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:39:24,056 INFO L225 Difference]: With dead ends: 6302 [2019-12-07 17:39:24,056 INFO L226 Difference]: Without dead ends: 4004 [2019-12-07 17:39:24,058 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:39:24,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4004 states. [2019-12-07 17:39:24,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4004 to 2712. [2019-12-07 17:39:24,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2712 states. [2019-12-07 17:39:24,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2712 states to 2712 states and 3251 transitions. [2019-12-07 17:39:24,570 INFO L78 Accepts]: Start accepts. Automaton has 2712 states and 3251 transitions. Word has length 267 [2019-12-07 17:39:24,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:39:24,571 INFO L462 AbstractCegarLoop]: Abstraction has 2712 states and 3251 transitions. [2019-12-07 17:39:24,571 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:39:24,571 INFO L276 IsEmpty]: Start isEmpty. Operand 2712 states and 3251 transitions. [2019-12-07 17:39:24,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 272 [2019-12-07 17:39:24,574 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:39:24,574 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:39:24,574 INFO L410 AbstractCegarLoop]: === Iteration 52 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:39:24,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:39:24,574 INFO L82 PathProgramCache]: Analyzing trace with hash -2013982804, now seen corresponding path program 1 times [2019-12-07 17:39:24,574 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:39:24,574 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1802150226] [2019-12-07 17:39:24,574 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:39:24,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:39:24,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:39:24,716 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:39:24,716 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:39:24,850 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:39:24 BoogieIcfgContainer [2019-12-07 17:39:24,850 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:39:24,851 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:39:24,851 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:39:24,851 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:39:24,851 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:36:42" (3/4) ... [2019-12-07 17:39:24,853 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:39:25,024 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_260921f1-39e3-4fe1-b7f6-da915ff5ae38/bin/uautomizer/witness.graphml [2019-12-07 17:39:25,024 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:39:25,025 INFO L168 Benchmark]: Toolchain (without parser) took 164137.93 ms. Allocated memory was 1.0 GB in the beginning and 2.4 GB in the end (delta: 1.4 GB). Free memory was 945.1 MB in the beginning and 2.1 GB in the end (delta: -1.2 GB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. [2019-12-07 17:39:25,025 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:39:25,026 INFO L168 Benchmark]: CACSL2BoogieTranslator took 270.16 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 106.4 MB). Free memory was 945.1 MB in the beginning and 1.1 GB in the end (delta: -150.8 MB). Peak memory consumption was 23.0 MB. Max. memory is 11.5 GB. [2019-12-07 17:39:25,026 INFO L168 Benchmark]: Boogie Procedure Inliner took 53.50 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:39:25,026 INFO L168 Benchmark]: Boogie Preprocessor took 58.72 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:39:25,026 INFO L168 Benchmark]: RCFGBuilder took 822.44 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 942.0 MB in the end (delta: 143.2 MB). Peak memory consumption was 143.2 MB. Max. memory is 11.5 GB. [2019-12-07 17:39:25,026 INFO L168 Benchmark]: TraceAbstraction took 162755.59 ms. Allocated memory was 1.1 GB in the beginning and 2.4 GB in the end (delta: 1.2 GB). Free memory was 942.0 MB in the beginning and 643.1 MB in the end (delta: 298.9 MB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2019-12-07 17:39:25,027 INFO L168 Benchmark]: Witness Printer took 173.73 ms. Allocated memory was 2.4 GB in the beginning and 2.4 GB in the end (delta: -4.7 MB). Free memory was 643.1 MB in the beginning and 2.1 GB in the end (delta: -1.5 GB). Peak memory consumption was 11.2 MB. Max. memory is 11.5 GB. [2019-12-07 17:39:25,028 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 270.16 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 106.4 MB). Free memory was 945.1 MB in the beginning and 1.1 GB in the end (delta: -150.8 MB). Peak memory consumption was 23.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 53.50 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 58.72 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 822.44 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 942.0 MB in the end (delta: 143.2 MB). Peak memory consumption was 143.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 162755.59 ms. Allocated memory was 1.1 GB in the beginning and 2.4 GB in the end (delta: 1.2 GB). Free memory was 942.0 MB in the beginning and 643.1 MB in the end (delta: 298.9 MB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. * Witness Printer took 173.73 ms. Allocated memory was 2.4 GB in the beginning and 2.4 GB in the end (delta: -4.7 MB). Free memory was 643.1 MB in the beginning and 2.1 GB in the end (delta: -1.5 GB). Peak memory consumption was 11.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 581]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L68] msg_t nomsg = (msg_t )-1; [L69] port_t g1v ; [L70] int8_t g1v_old ; [L71] int8_t g1v_new ; [L72] port_t g2v ; [L73] int8_t g2v_old ; [L74] int8_t g2v_new ; [L75] port_t g3v ; [L76] int8_t g3v_old ; [L77] int8_t g3v_new ; [L81] _Bool gate1Failed ; [L82] _Bool gate2Failed ; [L83] _Bool gate3Failed ; [L84] msg_t VALUE1 ; [L85] msg_t VALUE2 ; [L86] msg_t VALUE3 ; [L88] _Bool gate1Failed_History_0 ; [L89] _Bool gate1Failed_History_1 ; [L90] _Bool gate1Failed_History_2 ; [L91] _Bool gate2Failed_History_0 ; [L92] _Bool gate2Failed_History_1 ; [L93] _Bool gate2Failed_History_2 ; [L94] _Bool gate3Failed_History_0 ; [L95] _Bool gate3Failed_History_1 ; [L96] _Bool gate3Failed_History_2 ; [L97] int8_t votedValue_History_0 ; [L98] int8_t votedValue_History_1 ; [L99] int8_t votedValue_History_2 ; [L519] void (*nodes[4])(void) = { & gate1_each_pals_period, & gate2_each_pals_period, & gate3_each_pals_period, & voter}; VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=0, votedValue_History_1=0, votedValue_History_2=0] [L522] int c1 ; [L523] int i2 ; [L526] c1 = 0 [L527] gate1Failed = __VERIFIER_nondet_bool() [L528] gate2Failed = __VERIFIER_nondet_bool() [L529] gate3Failed = __VERIFIER_nondet_bool() [L530] VALUE1 = __VERIFIER_nondet_char() [L531] VALUE2 = __VERIFIER_nondet_char() [L532] VALUE3 = __VERIFIER_nondet_char() [L533] gate1Failed_History_0 = __VERIFIER_nondet_bool() [L534] gate1Failed_History_1 = __VERIFIER_nondet_bool() [L535] gate1Failed_History_2 = __VERIFIER_nondet_bool() [L536] gate2Failed_History_0 = __VERIFIER_nondet_bool() [L537] gate2Failed_History_1 = __VERIFIER_nondet_bool() [L538] gate2Failed_History_2 = __VERIFIER_nondet_bool() [L539] gate3Failed_History_0 = __VERIFIER_nondet_bool() [L540] gate3Failed_History_1 = __VERIFIER_nondet_bool() [L541] gate3Failed_History_2 = __VERIFIER_nondet_bool() [L542] votedValue_History_0 = __VERIFIER_nondet_char() [L543] votedValue_History_1 = __VERIFIER_nondet_char() [L544] votedValue_History_2 = __VERIFIER_nondet_char() [L248] int tmp ; [L249] int tmp___0 ; [L250] int tmp___1 ; [L251] int tmp___2 ; [L104] _Bool ini_bool ; [L105] int8_t ini_int ; [L106] int var ; [L107] int tmp ; [L108] int tmp___0 ; [L109] int tmp___1 ; [L110] int tmp___2 ; [L113] ini_bool = (_Bool)0 [L114] ini_int = (int8_t )-2 [L115] var = 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND TRUE history_id == 0 [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L172] COND TRUE historyIndex == 0 [L173] return (gate1Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L118] tmp = (int )read_history_bool(0, 0) [L119] COND FALSE !(! (tmp == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND TRUE history_id == 0 [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L172] COND TRUE historyIndex == 0 [L173] return (gate1Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L118] tmp = (int )read_history_bool(0, 0) [L119] COND FALSE !(! (tmp == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND TRUE history_id == 0 [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L172] COND TRUE historyIndex == 0 [L173] return (gate1Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L118] tmp = (int )read_history_bool(0, 0) [L119] COND FALSE !(! (tmp == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND FALSE !(var < 3) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L143] return (1); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L254] tmp = add_history_type(0) [L255] COND FALSE !(! tmp) [L104] _Bool ini_bool ; [L105] int8_t ini_int ; [L106] int var ; [L107] int tmp ; [L108] int tmp___0 ; [L109] int tmp___1 ; [L110] int tmp___2 ; [L113] ini_bool = (_Bool)0 [L114] ini_int = (int8_t )-2 [L115] var = 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND TRUE history_id == 1 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND TRUE history_id == 1 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L182] COND TRUE historyIndex == 0 [L183] return (gate2Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L124] tmp___0 = (int )read_history_bool(1, 0) [L125] COND FALSE !(! (tmp___0 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND TRUE history_id == 1 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND TRUE history_id == 1 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L182] COND TRUE historyIndex == 0 [L183] return (gate2Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L124] tmp___0 = (int )read_history_bool(1, 0) [L125] COND FALSE !(! (tmp___0 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND TRUE history_id == 1 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND TRUE history_id == 1 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L182] COND TRUE historyIndex == 0 [L183] return (gate2Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L124] tmp___0 = (int )read_history_bool(1, 0) [L125] COND FALSE !(! (tmp___0 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND FALSE !(var < 3) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L143] return (1); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L258] tmp___0 = add_history_type(1) [L259] COND FALSE !(! tmp___0) [L104] _Bool ini_bool ; [L105] int8_t ini_int ; [L106] int var ; [L107] int tmp ; [L108] int tmp___0 ; [L109] int tmp___1 ; [L110] int tmp___2 ; [L113] ini_bool = (_Bool)0 [L114] ini_int = (int8_t )-2 [L115] var = 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND TRUE history_id == 2 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L191] COND TRUE history_id == 2 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L192] COND TRUE historyIndex == 0 [L193] return (gate3Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L130] tmp___1 = (int )read_history_bool(2, 0) [L131] COND FALSE !(! (tmp___1 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND TRUE history_id == 2 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L191] COND TRUE history_id == 2 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L192] COND TRUE historyIndex == 0 [L193] return (gate3Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L130] tmp___1 = (int )read_history_bool(2, 0) [L131] COND FALSE !(! (tmp___1 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND TRUE history_id == 2 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L191] COND TRUE history_id == 2 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L192] COND TRUE historyIndex == 0 [L193] return (gate3Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L130] tmp___1 = (int )read_history_bool(2, 0) [L131] COND FALSE !(! (tmp___1 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND FALSE !(var < 3) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L143] return (1); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L262] tmp___1 = add_history_type(2) [L263] COND FALSE !(! tmp___1) [L104] _Bool ini_bool ; [L105] int8_t ini_int ; [L106] int var ; [L107] int tmp ; [L108] int tmp___0 ; [L109] int tmp___1 ; [L110] int tmp___2 ; [L113] ini_bool = (_Bool)0 [L114] ini_int = (int8_t )-2 [L115] var = 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND FALSE !(history_id == 2) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L135] COND TRUE history_id == 3 [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L136] tmp___2 = (int )read_history_int8(3, 0) [L137] COND FALSE !(! (tmp___2 == (int )ini_int)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND FALSE !(history_id == 2) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L135] COND TRUE history_id == 3 [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L136] tmp___2 = (int )read_history_int8(3, 0) [L137] COND FALSE !(! (tmp___2 == (int )ini_int)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND FALSE !(history_id == 2) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L135] COND TRUE history_id == 3 [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L136] tmp___2 = (int )read_history_int8(3, 0) [L137] COND FALSE !(! (tmp___2 == (int )ini_int)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND FALSE !(var < 3) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L143] return (1); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L266] tmp___2 = add_history_type(3) [L267] COND FALSE !(! tmp___2) [L270] return (1); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L545] i2 = init() [L547] g1v_old = nomsg [L548] g1v_new = nomsg [L549] g2v_old = nomsg [L550] g2v_new = nomsg [L551] g3v_old = nomsg [L552] g3v_new = nomsg [L553] i2 = 0 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L554] COND TRUE i2 < 10 [L383] int8_t next_state ; [L384] msg_t tmp ; [L385] int tmp___0 ; [L388] gate1Failed = __VERIFIER_nondet_bool() [L226] COND TRUE history_id == 0 [L227] gate1Failed_History_2 = gate1Failed_History_1 [L228] gate1Failed_History_1 = gate1Failed_History_0 [L229] gate1Failed_History_0 = buf VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L390] COND TRUE \read(gate1Failed) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L391] EXPR nomsg != nomsg && g1v_new == nomsg ? nomsg : g1v_new VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L391] g1v_new = nomsg != nomsg && g1v_new == nomsg ? nomsg : g1v_new [L414] int8_t next_state ; [L415] msg_t tmp ; [L416] int tmp___0 ; [L419] gate2Failed = __VERIFIER_nondet_bool() [L226] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L231] COND TRUE history_id == 1 [L232] gate2Failed_History_2 = gate2Failed_History_1 [L233] gate2Failed_History_1 = gate2Failed_History_0 [L234] gate2Failed_History_0 = buf VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L421] COND TRUE \read(gate2Failed) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L422] EXPR nomsg != nomsg && g2v_new == nomsg ? nomsg : g2v_new VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L422] g2v_new = nomsg != nomsg && g2v_new == nomsg ? nomsg : g2v_new [L445] int8_t next_state ; [L446] msg_t tmp ; [L447] int tmp___0 ; [L450] gate3Failed = __VERIFIER_nondet_bool() [L226] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L231] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L236] COND TRUE history_id == 2 [L237] gate3Failed_History_2 = gate3Failed_History_1 [L238] gate3Failed_History_1 = gate3Failed_History_0 [L239] gate3Failed_History_0 = buf VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L452] COND FALSE !(\read(gate3Failed)) [L456] tmp = __VERIFIER_nondet_char() [L457] next_state = tmp VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L458] COND TRUE (int )next_state == 0 [L459] tmp___0 = 1 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L470] EXPR next_state != nomsg && g3v_new == nomsg ? next_state : g3v_new VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L470] g3v_new = next_state != nomsg && g3v_new == nomsg ? next_state : g3v_new [L476] int8_t voted_value ; [L479] voted_value = nomsg [L480] VALUE1 = g1v_old [L481] g1v_old = nomsg [L482] VALUE2 = g2v_old [L483] g2v_old = nomsg [L484] VALUE3 = g3v_old [L485] g3v_old = nomsg VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=0, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L486] COND TRUE (int )VALUE1 == (int )VALUE2 [L487] voted_value = VALUE1 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=0, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L211] COND TRUE history_id == 3 [L212] votedValue_History_2 = votedValue_History_1 [L213] votedValue_History_1 = votedValue_History_0 [L214] votedValue_History_0 = buf VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=0, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L560] g1v_old = g1v_new [L561] g1v_new = nomsg [L562] g2v_old = g2v_new [L563] g2v_new = nomsg [L564] g3v_old = g3v_new [L565] g3v_new = nomsg [L275] int tmp ; [L276] int temp_count ; [L277] int8_t tmp___0 ; [L278] int8_t tmp___1 ; [L279] int8_t tmp___2 ; [L280] _Bool tmp___3 ; [L281] _Bool tmp___4 ; [L282] _Bool tmp___5 ; [L283] int8_t tmp___6 ; [L284] _Bool tmp___7 ; [L285] _Bool tmp___8 ; [L286] _Bool tmp___9 ; [L287] int8_t tmp___10 ; [L288] int8_t tmp___11 ; [L289] int8_t tmp___12 ; [L290] int8_t tmp___13 ; [L291] int8_t tmp___14 ; VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L294] COND FALSE !(! gate1Failed) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L297] COND FALSE !(! gate2Failed) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L300] COND TRUE ! gate3Failed [L301] tmp = 1 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L172] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L175] COND TRUE historyIndex == 1 [L176] return (gate1Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L306] tmp___3 = read_history_bool(0, 1) [L307] COND TRUE ! tmp___3 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L181] COND TRUE history_id == 1 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L182] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L185] COND TRUE historyIndex == 1 [L186] return (gate2Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L308] tmp___4 = read_history_bool(1, 1) [L309] COND TRUE ! tmp___4 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L181] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L191] COND TRUE history_id == 2 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L192] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L195] COND TRUE historyIndex == 1 [L196] return (gate3Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L310] tmp___5 = read_history_bool(2, 1) [L311] COND TRUE ! tmp___5 [L312] temp_count = 0 [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L313] tmp___0 = read_history_int8(3, 0) [L314] COND TRUE (int )VALUE1 == (int )tmp___0 [L315] temp_count ++ VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L317] tmp___1 = read_history_int8(3, 0) [L318] COND TRUE (int )VALUE2 == (int )tmp___1 [L319] temp_count ++ VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L321] tmp___2 = read_history_int8(3, 0) [L322] COND TRUE (int )VALUE3 == (int )tmp___2 [L323] temp_count ++ VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L325] COND FALSE !((int )VALUE1 != (int )VALUE2) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L339] COND FALSE !(! (temp_count > 1)) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L152] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L155] COND TRUE historyIndex == 1 [L156] return (votedValue_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L345] tmp___10 = read_history_int8(3, 1) [L346] COND FALSE !((int )tmp___10 > -2) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L365] tmp___11 = read_history_int8(3, 0) [L366] COND FALSE !((int )tmp___11 != (int )nomsg) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L378] return (1); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L566] c1 = check() [L579] COND FALSE !(! arg) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L568] i2 ++ VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L554] COND TRUE i2 < 10 [L383] int8_t next_state ; [L384] msg_t tmp ; [L385] int tmp___0 ; [L388] gate1Failed = __VERIFIER_nondet_bool() [L226] COND TRUE history_id == 0 [L227] gate1Failed_History_2 = gate1Failed_History_1 [L228] gate1Failed_History_1 = gate1Failed_History_0 [L229] gate1Failed_History_0 = buf VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L390] COND FALSE !(\read(gate1Failed)) [L394] tmp = __VERIFIER_nondet_char() [L395] next_state = tmp VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L396] COND TRUE (int )next_state == 0 [L397] tmp___0 = 1 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L408] EXPR next_state != nomsg && g1v_new == nomsg ? next_state : g1v_new VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L408] g1v_new = next_state != nomsg && g1v_new == nomsg ? next_state : g1v_new [L414] int8_t next_state ; [L415] msg_t tmp ; [L416] int tmp___0 ; [L419] gate2Failed = __VERIFIER_nondet_bool() [L226] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L231] COND TRUE history_id == 1 [L232] gate2Failed_History_2 = gate2Failed_History_1 [L233] gate2Failed_History_1 = gate2Failed_History_0 [L234] gate2Failed_History_0 = buf VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L421] COND TRUE \read(gate2Failed) VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L422] EXPR nomsg != nomsg && g2v_new == nomsg ? nomsg : g2v_new VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L422] g2v_new = nomsg != nomsg && g2v_new == nomsg ? nomsg : g2v_new [L445] int8_t next_state ; [L446] msg_t tmp ; [L447] int tmp___0 ; [L450] gate3Failed = __VERIFIER_nondet_bool() [L226] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L231] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L236] COND TRUE history_id == 2 [L237] gate3Failed_History_2 = gate3Failed_History_1 [L238] gate3Failed_History_1 = gate3Failed_History_0 [L239] gate3Failed_History_0 = buf VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L452] COND TRUE \read(gate3Failed) VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L453] EXPR nomsg != nomsg && g3v_new == nomsg ? nomsg : g3v_new VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L453] g3v_new = nomsg != nomsg && g3v_new == nomsg ? nomsg : g3v_new [L476] int8_t voted_value ; [L479] voted_value = nomsg [L480] VALUE1 = g1v_old [L481] g1v_old = nomsg [L482] VALUE2 = g2v_old [L483] g2v_old = nomsg [L484] VALUE3 = g3v_old [L485] g3v_old = nomsg VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L486] COND TRUE (int )VALUE1 == (int )VALUE2 [L487] voted_value = VALUE1 VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L211] COND TRUE history_id == 3 [L212] votedValue_History_2 = votedValue_History_1 [L213] votedValue_History_1 = votedValue_History_0 [L214] votedValue_History_0 = buf VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L560] g1v_old = g1v_new [L561] g1v_new = nomsg [L562] g2v_old = g2v_new [L563] g2v_new = nomsg [L564] g3v_old = g3v_new [L565] g3v_new = nomsg [L275] int tmp ; [L276] int temp_count ; [L277] int8_t tmp___0 ; [L278] int8_t tmp___1 ; [L279] int8_t tmp___2 ; [L280] _Bool tmp___3 ; [L281] _Bool tmp___4 ; [L282] _Bool tmp___5 ; [L283] int8_t tmp___6 ; [L284] _Bool tmp___7 ; [L285] _Bool tmp___8 ; [L286] _Bool tmp___9 ; [L287] int8_t tmp___10 ; [L288] int8_t tmp___11 ; [L289] int8_t tmp___12 ; [L290] int8_t tmp___13 ; [L291] int8_t tmp___14 ; VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L294] COND TRUE ! gate1Failed [L295] tmp = 1 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L172] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L175] COND TRUE historyIndex == 1 [L176] return (gate1Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L306] tmp___3 = read_history_bool(0, 1) [L307] COND FALSE !(! tmp___3) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L152] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L155] COND TRUE historyIndex == 1 [L156] return (votedValue_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L345] tmp___10 = read_history_int8(3, 1) [L346] COND TRUE (int )tmp___10 > -2 [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L347] tmp___6 = read_history_int8(3, 0) [L348] COND TRUE (int )tmp___6 == (int )nomsg [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L172] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L175] COND TRUE historyIndex == 1 [L176] return (gate1Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L349] tmp___7 = read_history_bool(0, 1) [L350] COND TRUE \read(tmp___7) [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L181] COND TRUE history_id == 1 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L182] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L185] COND TRUE historyIndex == 1 [L186] return (gate2Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L351] tmp___8 = read_history_bool(1, 1) [L352] COND TRUE \read(tmp___8) [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L181] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L191] COND TRUE history_id == 2 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L192] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L195] COND TRUE historyIndex == 1 [L196] return (gate3Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L353] tmp___9 = read_history_bool(2, 1) [L354] COND TRUE ! tmp___9 [L355] return (0); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L566] c1 = check() [L579] COND TRUE ! arg VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L581] __VERIFIER_error() VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 515 locations, 37 error locations. Result: UNSAFE, OverallTime: 162.5s, OverallIterations: 52, TraceHistogramMax: 3, AutomataDifference: 143.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 30267 SDtfs, 53386 SDslu, 176986 SDs, 0 SdLazy, 53823 SolverSat, 1560 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 28.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5464 GetRequests, 2938 SyntacticMatches, 4 SemanticMatches, 2522 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 562524 ImplicationChecksByTransitivity, 77.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=3830occurred in iteration=48, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 7.4s AutomataMinimizationTime, 51 MinimizatonAttempts, 156227 StatesRemovedByMinimization, 44 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.5s SsaConstructionTime, 1.5s SatisfiabilityAnalysisTime, 4.6s InterpolantComputationTime, 10851 NumberOfCodeBlocks, 10851 NumberOfCodeBlocksAsserted, 65 NumberOfCheckSat, 10516 ConstructedInterpolants, 0 QuantifiedInterpolants, 8529598 SizeOfPredicates, 98 NumberOfNonLiveVariables, 12123 ConjunctsInSsa, 249 ConjunctsInUnsatCore, 64 InterpolantComputations, 39 PerfectInterpolantSequences, 5458/6073 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...