./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_Triplicated.1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_Triplicated.1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a2255bd39401605e8aa4bbdae0287bc8d412fffe ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:33:07,889 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:33:07,891 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:33:07,898 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:33:07,898 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:33:07,899 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:33:07,900 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:33:07,901 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:33:07,902 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:33:07,903 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:33:07,904 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:33:07,904 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:33:07,905 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:33:07,905 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:33:07,906 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:33:07,907 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:33:07,907 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:33:07,908 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:33:07,909 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:33:07,911 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:33:07,912 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:33:07,913 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:33:07,913 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:33:07,914 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:33:07,915 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:33:07,916 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:33:07,916 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:33:07,916 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:33:07,916 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:33:07,917 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:33:07,917 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:33:07,918 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:33:07,918 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:33:07,918 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:33:07,919 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:33:07,919 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:33:07,920 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:33:07,920 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:33:07,920 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:33:07,920 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:33:07,921 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:33:07,921 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 14:33:07,930 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:33:07,931 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:33:07,931 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 14:33:07,932 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 14:33:07,932 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 14:33:07,932 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:33:07,932 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:33:07,932 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:33:07,932 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:33:07,932 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:33:07,933 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:33:07,933 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:33:07,933 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:33:07,933 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:33:07,933 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:33:07,933 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:33:07,933 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:33:07,934 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:33:07,934 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 14:33:07,934 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:33:07,934 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:33:07,934 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:33:07,934 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:33:07,934 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:33:07,935 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:33:07,935 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 14:33:07,935 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:33:07,935 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:33:07,935 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:33:07,935 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a2255bd39401605e8aa4bbdae0287bc8d412fffe [2019-12-07 14:33:08,033 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:33:08,043 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:33:08,046 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:33:08,047 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:33:08,048 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:33:08,048 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_Triplicated.1.ufo.UNBOUNDED.pals.c [2019-12-07 14:33:08,087 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/data/1b70311b4/015ce25418bd4722b8246a00d7163b36/FLAG9141e3fbd [2019-12-07 14:33:08,436 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:33:08,436 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_Triplicated.1.ufo.UNBOUNDED.pals.c [2019-12-07 14:33:08,443 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/data/1b70311b4/015ce25418bd4722b8246a00d7163b36/FLAG9141e3fbd [2019-12-07 14:33:08,452 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/data/1b70311b4/015ce25418bd4722b8246a00d7163b36 [2019-12-07 14:33:08,453 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:33:08,454 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:33:08,455 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:33:08,455 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:33:08,458 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:33:08,458 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:33:08" (1/1) ... [2019-12-07 14:33:08,461 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@881d7f9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:33:08, skipping insertion in model container [2019-12-07 14:33:08,461 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:33:08" (1/1) ... [2019-12-07 14:33:08,467 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:33:08,495 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:33:08,674 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:33:08,679 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:33:08,715 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:33:08,727 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:33:08,727 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:33:08 WrapperNode [2019-12-07 14:33:08,728 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:33:08,728 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:33:08,728 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:33:08,728 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:33:08,733 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:33:08" (1/1) ... [2019-12-07 14:33:08,742 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:33:08" (1/1) ... [2019-12-07 14:33:08,779 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:33:08,780 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:33:08,780 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:33:08,780 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:33:08,786 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:33:08" (1/1) ... [2019-12-07 14:33:08,786 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:33:08" (1/1) ... [2019-12-07 14:33:08,792 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:33:08" (1/1) ... [2019-12-07 14:33:08,792 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:33:08" (1/1) ... [2019-12-07 14:33:08,808 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:33:08" (1/1) ... [2019-12-07 14:33:08,822 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:33:08" (1/1) ... [2019-12-07 14:33:08,826 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:33:08" (1/1) ... [2019-12-07 14:33:08,832 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:33:08,832 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:33:08,833 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:33:08,833 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:33:08,834 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:33:08" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:33:08,875 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:33:08,875 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:33:09,664 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:33:09,664 INFO L287 CfgBuilder]: Removed 173 assume(true) statements. [2019-12-07 14:33:09,665 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:33:09 BoogieIcfgContainer [2019-12-07 14:33:09,665 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:33:09,666 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:33:09,666 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:33:09,668 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:33:09,668 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:33:08" (1/3) ... [2019-12-07 14:33:09,668 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@72e56853 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:33:09, skipping insertion in model container [2019-12-07 14:33:09,668 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:33:08" (2/3) ... [2019-12-07 14:33:09,669 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@72e56853 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:33:09, skipping insertion in model container [2019-12-07 14:33:09,669 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:33:09" (3/3) ... [2019-12-07 14:33:09,670 INFO L109 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_Triplicated.1.ufo.UNBOUNDED.pals.c [2019-12-07 14:33:09,676 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:33:09,682 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 37 error locations. [2019-12-07 14:33:09,690 INFO L249 AbstractCegarLoop]: Starting to check reachability of 37 error locations. [2019-12-07 14:33:09,712 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:33:09,712 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:33:09,712 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:33:09,712 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:33:09,712 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:33:09,713 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:33:09,713 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:33:09,713 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:33:09,735 INFO L276 IsEmpty]: Start isEmpty. Operand 514 states. [2019-12-07 14:33:09,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 14:33:09,739 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:09,740 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:09,740 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:09,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:09,744 INFO L82 PathProgramCache]: Analyzing trace with hash 595705480, now seen corresponding path program 1 times [2019-12-07 14:33:09,750 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:09,750 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1455515] [2019-12-07 14:33:09,750 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:09,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:09,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:33:09,872 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1455515] [2019-12-07 14:33:09,873 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:09,873 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:09,874 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1772400926] [2019-12-07 14:33:09,877 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:09,877 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:09,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:09,886 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:09,887 INFO L87 Difference]: Start difference. First operand 514 states. Second operand 3 states. [2019-12-07 14:33:10,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:10,045 INFO L93 Difference]: Finished difference Result 1224 states and 2024 transitions. [2019-12-07 14:33:10,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:10,046 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 14:33:10,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:10,063 INFO L225 Difference]: With dead ends: 1224 [2019-12-07 14:33:10,063 INFO L226 Difference]: Without dead ends: 712 [2019-12-07 14:33:10,068 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:10,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 712 states. [2019-12-07 14:33:10,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 712 to 450. [2019-12-07 14:33:10,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 450 states. [2019-12-07 14:33:10,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 450 states to 450 states and 705 transitions. [2019-12-07 14:33:10,122 INFO L78 Accepts]: Start accepts. Automaton has 450 states and 705 transitions. Word has length 9 [2019-12-07 14:33:10,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:10,122 INFO L462 AbstractCegarLoop]: Abstraction has 450 states and 705 transitions. [2019-12-07 14:33:10,122 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:10,122 INFO L276 IsEmpty]: Start isEmpty. Operand 450 states and 705 transitions. [2019-12-07 14:33:10,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2019-12-07 14:33:10,124 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:10,124 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:10,124 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:10,125 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:10,125 INFO L82 PathProgramCache]: Analyzing trace with hash -503954138, now seen corresponding path program 1 times [2019-12-07 14:33:10,125 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:10,125 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2097399411] [2019-12-07 14:33:10,126 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:10,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:10,160 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:33:10,161 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2097399411] [2019-12-07 14:33:10,161 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:10,161 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:10,161 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [721130891] [2019-12-07 14:33:10,162 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:10,162 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:10,162 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:10,163 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:10,163 INFO L87 Difference]: Start difference. First operand 450 states and 705 transitions. Second operand 3 states. [2019-12-07 14:33:10,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:10,216 INFO L93 Difference]: Finished difference Result 1110 states and 1725 transitions. [2019-12-07 14:33:10,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:10,217 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 10 [2019-12-07 14:33:10,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:10,220 INFO L225 Difference]: With dead ends: 1110 [2019-12-07 14:33:10,221 INFO L226 Difference]: Without dead ends: 662 [2019-12-07 14:33:10,222 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:10,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 662 states. [2019-12-07 14:33:10,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 662 to 417. [2019-12-07 14:33:10,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 417 states. [2019-12-07 14:33:10,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 417 states to 417 states and 647 transitions. [2019-12-07 14:33:10,238 INFO L78 Accepts]: Start accepts. Automaton has 417 states and 647 transitions. Word has length 10 [2019-12-07 14:33:10,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:10,238 INFO L462 AbstractCegarLoop]: Abstraction has 417 states and 647 transitions. [2019-12-07 14:33:10,238 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:10,238 INFO L276 IsEmpty]: Start isEmpty. Operand 417 states and 647 transitions. [2019-12-07 14:33:10,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:33:10,239 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:10,239 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:10,240 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:10,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:10,240 INFO L82 PathProgramCache]: Analyzing trace with hash -674152124, now seen corresponding path program 1 times [2019-12-07 14:33:10,240 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:10,240 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [999825049] [2019-12-07 14:33:10,240 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:10,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:10,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:33:10,273 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [999825049] [2019-12-07 14:33:10,273 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:10,273 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:10,273 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1366965002] [2019-12-07 14:33:10,274 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:10,274 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:10,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:10,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:10,274 INFO L87 Difference]: Start difference. First operand 417 states and 647 transitions. Second operand 3 states. [2019-12-07 14:33:10,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:10,321 INFO L93 Difference]: Finished difference Result 1229 states and 1912 transitions. [2019-12-07 14:33:10,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:10,322 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 14:33:10,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:10,327 INFO L225 Difference]: With dead ends: 1229 [2019-12-07 14:33:10,327 INFO L226 Difference]: Without dead ends: 822 [2019-12-07 14:33:10,328 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:10,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 822 states. [2019-12-07 14:33:10,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 822 to 421. [2019-12-07 14:33:10,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 421 states. [2019-12-07 14:33:10,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 421 states to 421 states and 651 transitions. [2019-12-07 14:33:10,341 INFO L78 Accepts]: Start accepts. Automaton has 421 states and 651 transitions. Word has length 13 [2019-12-07 14:33:10,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:10,341 INFO L462 AbstractCegarLoop]: Abstraction has 421 states and 651 transitions. [2019-12-07 14:33:10,341 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:10,341 INFO L276 IsEmpty]: Start isEmpty. Operand 421 states and 651 transitions. [2019-12-07 14:33:10,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 14:33:10,342 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:10,342 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:10,343 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:10,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:10,343 INFO L82 PathProgramCache]: Analyzing trace with hash 1826556945, now seen corresponding path program 1 times [2019-12-07 14:33:10,343 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:10,344 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [709790358] [2019-12-07 14:33:10,344 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:10,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:10,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:33:10,387 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [709790358] [2019-12-07 14:33:10,387 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:10,388 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:10,388 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [909045971] [2019-12-07 14:33:10,388 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:10,388 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:10,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:10,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:10,389 INFO L87 Difference]: Start difference. First operand 421 states and 651 transitions. Second operand 3 states. [2019-12-07 14:33:10,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:10,406 INFO L93 Difference]: Finished difference Result 657 states and 1010 transitions. [2019-12-07 14:33:10,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:10,407 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2019-12-07 14:33:10,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:10,410 INFO L225 Difference]: With dead ends: 657 [2019-12-07 14:33:10,410 INFO L226 Difference]: Without dead ends: 421 [2019-12-07 14:33:10,411 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:10,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 421 states. [2019-12-07 14:33:10,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 421 to 421. [2019-12-07 14:33:10,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 421 states. [2019-12-07 14:33:10,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 421 states to 421 states and 647 transitions. [2019-12-07 14:33:10,424 INFO L78 Accepts]: Start accepts. Automaton has 421 states and 647 transitions. Word has length 17 [2019-12-07 14:33:10,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:10,424 INFO L462 AbstractCegarLoop]: Abstraction has 421 states and 647 transitions. [2019-12-07 14:33:10,425 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:10,425 INFO L276 IsEmpty]: Start isEmpty. Operand 421 states and 647 transitions. [2019-12-07 14:33:10,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 14:33:10,426 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:10,426 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:10,426 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:10,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:10,427 INFO L82 PathProgramCache]: Analyzing trace with hash -35486156, now seen corresponding path program 1 times [2019-12-07 14:33:10,427 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:10,427 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [862341889] [2019-12-07 14:33:10,427 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:10,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:10,462 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:33:10,463 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [862341889] [2019-12-07 14:33:10,463 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:10,463 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:33:10,463 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [818441798] [2019-12-07 14:33:10,463 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:33:10,464 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:10,464 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:33:10,464 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:33:10,464 INFO L87 Difference]: Start difference. First operand 421 states and 647 transitions. Second operand 4 states. [2019-12-07 14:33:10,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:10,508 INFO L93 Difference]: Finished difference Result 1072 states and 1643 transitions. [2019-12-07 14:33:10,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:33:10,508 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2019-12-07 14:33:10,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:10,511 INFO L225 Difference]: With dead ends: 1072 [2019-12-07 14:33:10,511 INFO L226 Difference]: Without dead ends: 663 [2019-12-07 14:33:10,512 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:33:10,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 663 states. [2019-12-07 14:33:10,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 663 to 421. [2019-12-07 14:33:10,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 421 states. [2019-12-07 14:33:10,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 421 states to 421 states and 646 transitions. [2019-12-07 14:33:10,522 INFO L78 Accepts]: Start accepts. Automaton has 421 states and 646 transitions. Word has length 18 [2019-12-07 14:33:10,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:10,522 INFO L462 AbstractCegarLoop]: Abstraction has 421 states and 646 transitions. [2019-12-07 14:33:10,522 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:33:10,522 INFO L276 IsEmpty]: Start isEmpty. Operand 421 states and 646 transitions. [2019-12-07 14:33:10,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 14:33:10,523 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:10,523 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:10,523 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:10,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:10,523 INFO L82 PathProgramCache]: Analyzing trace with hash 1967275947, now seen corresponding path program 1 times [2019-12-07 14:33:10,524 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:10,524 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2041693617] [2019-12-07 14:33:10,524 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:10,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:10,556 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 14:33:10,556 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2041693617] [2019-12-07 14:33:10,556 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:10,556 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:10,557 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1400847468] [2019-12-07 14:33:10,557 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:10,557 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:10,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:10,557 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:10,558 INFO L87 Difference]: Start difference. First operand 421 states and 646 transitions. Second operand 3 states. [2019-12-07 14:33:10,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:10,629 INFO L93 Difference]: Finished difference Result 1014 states and 1545 transitions. [2019-12-07 14:33:10,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:10,629 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 14:33:10,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:10,632 INFO L225 Difference]: With dead ends: 1014 [2019-12-07 14:33:10,632 INFO L226 Difference]: Without dead ends: 608 [2019-12-07 14:33:10,633 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:10,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 608 states. [2019-12-07 14:33:10,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 608 to 376. [2019-12-07 14:33:10,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 376 states. [2019-12-07 14:33:10,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 376 states to 376 states and 566 transitions. [2019-12-07 14:33:10,641 INFO L78 Accepts]: Start accepts. Automaton has 376 states and 566 transitions. Word has length 21 [2019-12-07 14:33:10,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:10,641 INFO L462 AbstractCegarLoop]: Abstraction has 376 states and 566 transitions. [2019-12-07 14:33:10,641 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:10,641 INFO L276 IsEmpty]: Start isEmpty. Operand 376 states and 566 transitions. [2019-12-07 14:33:10,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 14:33:10,641 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:10,642 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:10,642 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:10,642 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:10,642 INFO L82 PathProgramCache]: Analyzing trace with hash -385095713, now seen corresponding path program 1 times [2019-12-07 14:33:10,642 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:10,642 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [873463493] [2019-12-07 14:33:10,642 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:10,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:10,661 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 14:33:10,661 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [873463493] [2019-12-07 14:33:10,661 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:10,662 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:10,662 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1533939210] [2019-12-07 14:33:10,662 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:10,662 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:10,662 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:10,662 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:10,662 INFO L87 Difference]: Start difference. First operand 376 states and 566 transitions. Second operand 3 states. [2019-12-07 14:33:10,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:10,699 INFO L93 Difference]: Finished difference Result 935 states and 1407 transitions. [2019-12-07 14:33:10,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:10,699 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 14:33:10,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:10,701 INFO L225 Difference]: With dead ends: 935 [2019-12-07 14:33:10,701 INFO L226 Difference]: Without dead ends: 574 [2019-12-07 14:33:10,702 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:10,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 574 states. [2019-12-07 14:33:10,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 574 to 350. [2019-12-07 14:33:10,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 350 states. [2019-12-07 14:33:10,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 350 states to 350 states and 520 transitions. [2019-12-07 14:33:10,710 INFO L78 Accepts]: Start accepts. Automaton has 350 states and 520 transitions. Word has length 21 [2019-12-07 14:33:10,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:10,710 INFO L462 AbstractCegarLoop]: Abstraction has 350 states and 520 transitions. [2019-12-07 14:33:10,710 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:10,710 INFO L276 IsEmpty]: Start isEmpty. Operand 350 states and 520 transitions. [2019-12-07 14:33:10,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 14:33:10,711 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:10,711 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:10,711 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:10,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:10,711 INFO L82 PathProgramCache]: Analyzing trace with hash 2032684668, now seen corresponding path program 1 times [2019-12-07 14:33:10,711 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:10,711 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [435709960] [2019-12-07 14:33:10,712 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:10,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:10,737 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 14:33:10,737 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [435709960] [2019-12-07 14:33:10,737 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:10,737 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:33:10,737 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1970392221] [2019-12-07 14:33:10,737 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:33:10,738 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:10,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:33:10,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:33:10,738 INFO L87 Difference]: Start difference. First operand 350 states and 520 transitions. Second operand 4 states. [2019-12-07 14:33:10,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:10,771 INFO L93 Difference]: Finished difference Result 896 states and 1338 transitions. [2019-12-07 14:33:10,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:33:10,772 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 14:33:10,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:10,774 INFO L225 Difference]: With dead ends: 896 [2019-12-07 14:33:10,774 INFO L226 Difference]: Without dead ends: 572 [2019-12-07 14:33:10,775 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:33:10,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 572 states. [2019-12-07 14:33:10,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 572 to 350. [2019-12-07 14:33:10,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 350 states. [2019-12-07 14:33:10,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 350 states to 350 states and 519 transitions. [2019-12-07 14:33:10,782 INFO L78 Accepts]: Start accepts. Automaton has 350 states and 519 transitions. Word has length 31 [2019-12-07 14:33:10,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:10,782 INFO L462 AbstractCegarLoop]: Abstraction has 350 states and 519 transitions. [2019-12-07 14:33:10,782 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:33:10,782 INFO L276 IsEmpty]: Start isEmpty. Operand 350 states and 519 transitions. [2019-12-07 14:33:10,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 14:33:10,783 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:10,783 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:10,783 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:10,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:10,784 INFO L82 PathProgramCache]: Analyzing trace with hash -290926641, now seen corresponding path program 1 times [2019-12-07 14:33:10,784 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:10,784 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [919674395] [2019-12-07 14:33:10,784 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:10,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:10,805 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-12-07 14:33:10,806 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [919674395] [2019-12-07 14:33:10,806 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:10,806 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:10,806 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1448238014] [2019-12-07 14:33:10,806 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:10,806 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:10,806 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:10,807 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:10,807 INFO L87 Difference]: Start difference. First operand 350 states and 519 transitions. Second operand 3 states. [2019-12-07 14:33:10,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:10,837 INFO L93 Difference]: Finished difference Result 869 states and 1301 transitions. [2019-12-07 14:33:10,837 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:10,837 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2019-12-07 14:33:10,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:10,840 INFO L225 Difference]: With dead ends: 869 [2019-12-07 14:33:10,841 INFO L226 Difference]: Without dead ends: 548 [2019-12-07 14:33:10,841 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:10,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 548 states. [2019-12-07 14:33:10,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 548 to 327. [2019-12-07 14:33:10,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2019-12-07 14:33:10,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 481 transitions. [2019-12-07 14:33:10,851 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 481 transitions. Word has length 34 [2019-12-07 14:33:10,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:10,851 INFO L462 AbstractCegarLoop]: Abstraction has 327 states and 481 transitions. [2019-12-07 14:33:10,852 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:10,852 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 481 transitions. [2019-12-07 14:33:10,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 14:33:10,852 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:10,852 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:10,853 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:10,853 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:10,853 INFO L82 PathProgramCache]: Analyzing trace with hash 1984299198, now seen corresponding path program 1 times [2019-12-07 14:33:10,853 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:10,853 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1713485972] [2019-12-07 14:33:10,853 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:10,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:10,882 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-12-07 14:33:10,882 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1713485972] [2019-12-07 14:33:10,882 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:10,883 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:10,883 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [640180495] [2019-12-07 14:33:10,883 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:10,883 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:10,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:10,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:10,883 INFO L87 Difference]: Start difference. First operand 327 states and 481 transitions. Second operand 3 states. [2019-12-07 14:33:10,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:10,928 INFO L93 Difference]: Finished difference Result 731 states and 1077 transitions. [2019-12-07 14:33:10,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:10,929 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2019-12-07 14:33:10,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:10,931 INFO L225 Difference]: With dead ends: 731 [2019-12-07 14:33:10,931 INFO L226 Difference]: Without dead ends: 433 [2019-12-07 14:33:10,931 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:10,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 433 states. [2019-12-07 14:33:10,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 433 to 295. [2019-12-07 14:33:10,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 295 states. [2019-12-07 14:33:10,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 295 states to 295 states and 421 transitions. [2019-12-07 14:33:10,938 INFO L78 Accepts]: Start accepts. Automaton has 295 states and 421 transitions. Word has length 35 [2019-12-07 14:33:10,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:10,938 INFO L462 AbstractCegarLoop]: Abstraction has 295 states and 421 transitions. [2019-12-07 14:33:10,938 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:10,938 INFO L276 IsEmpty]: Start isEmpty. Operand 295 states and 421 transitions. [2019-12-07 14:33:10,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-12-07 14:33:10,939 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:10,939 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:10,939 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:10,939 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:10,939 INFO L82 PathProgramCache]: Analyzing trace with hash -1766202321, now seen corresponding path program 1 times [2019-12-07 14:33:10,939 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:10,940 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905499052] [2019-12-07 14:33:10,940 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:10,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:10,966 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-12-07 14:33:10,966 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [905499052] [2019-12-07 14:33:10,966 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:10,966 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:33:10,966 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [586194428] [2019-12-07 14:33:10,967 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:33:10,967 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:10,967 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:33:10,967 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:33:10,967 INFO L87 Difference]: Start difference. First operand 295 states and 421 transitions. Second operand 4 states. [2019-12-07 14:33:11,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:11,001 INFO L93 Difference]: Finished difference Result 752 states and 1089 transitions. [2019-12-07 14:33:11,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:33:11,001 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 46 [2019-12-07 14:33:11,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:11,004 INFO L225 Difference]: With dead ends: 752 [2019-12-07 14:33:11,004 INFO L226 Difference]: Without dead ends: 499 [2019-12-07 14:33:11,005 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:33:11,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 499 states. [2019-12-07 14:33:11,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 499 to 295. [2019-12-07 14:33:11,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 295 states. [2019-12-07 14:33:11,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 295 states to 295 states and 420 transitions. [2019-12-07 14:33:11,015 INFO L78 Accepts]: Start accepts. Automaton has 295 states and 420 transitions. Word has length 46 [2019-12-07 14:33:11,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:11,015 INFO L462 AbstractCegarLoop]: Abstraction has 295 states and 420 transitions. [2019-12-07 14:33:11,015 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:33:11,015 INFO L276 IsEmpty]: Start isEmpty. Operand 295 states and 420 transitions. [2019-12-07 14:33:11,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-12-07 14:33:11,015 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:11,016 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:11,016 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:11,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:11,016 INFO L82 PathProgramCache]: Analyzing trace with hash -544708160, now seen corresponding path program 1 times [2019-12-07 14:33:11,016 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:11,017 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1549184697] [2019-12-07 14:33:11,017 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:11,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:11,047 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 14:33:11,047 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1549184697] [2019-12-07 14:33:11,048 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:11,048 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:11,048 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1421651268] [2019-12-07 14:33:11,048 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:11,048 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:11,048 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:11,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,049 INFO L87 Difference]: Start difference. First operand 295 states and 420 transitions. Second operand 3 states. [2019-12-07 14:33:11,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:11,078 INFO L93 Difference]: Finished difference Result 634 states and 937 transitions. [2019-12-07 14:33:11,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:11,078 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-12-07 14:33:11,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:11,080 INFO L225 Difference]: With dead ends: 634 [2019-12-07 14:33:11,081 INFO L226 Difference]: Without dead ends: 384 [2019-12-07 14:33:11,081 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 384 states. [2019-12-07 14:33:11,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 384 to 255. [2019-12-07 14:33:11,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 255 states. [2019-12-07 14:33:11,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 255 states to 255 states and 370 transitions. [2019-12-07 14:33:11,090 INFO L78 Accepts]: Start accepts. Automaton has 255 states and 370 transitions. Word has length 49 [2019-12-07 14:33:11,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:11,090 INFO L462 AbstractCegarLoop]: Abstraction has 255 states and 370 transitions. [2019-12-07 14:33:11,090 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:11,090 INFO L276 IsEmpty]: Start isEmpty. Operand 255 states and 370 transitions. [2019-12-07 14:33:11,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:33:11,090 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:11,091 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:11,091 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:11,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:11,091 INFO L82 PathProgramCache]: Analyzing trace with hash 390941353, now seen corresponding path program 1 times [2019-12-07 14:33:11,091 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:11,091 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [119005137] [2019-12-07 14:33:11,091 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:11,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:11,117 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 14:33:11,117 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [119005137] [2019-12-07 14:33:11,117 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:11,117 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:11,118 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [185922149] [2019-12-07 14:33:11,118 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:11,118 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:11,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:11,118 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,118 INFO L87 Difference]: Start difference. First operand 255 states and 370 transitions. Second operand 3 states. [2019-12-07 14:33:11,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:11,135 INFO L93 Difference]: Finished difference Result 435 states and 644 transitions. [2019-12-07 14:33:11,135 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:11,135 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 14:33:11,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:11,137 INFO L225 Difference]: With dead ends: 435 [2019-12-07 14:33:11,137 INFO L226 Difference]: Without dead ends: 225 [2019-12-07 14:33:11,137 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2019-12-07 14:33:11,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 225. [2019-12-07 14:33:11,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2019-12-07 14:33:11,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 324 transitions. [2019-12-07 14:33:11,142 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 324 transitions. Word has length 56 [2019-12-07 14:33:11,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:11,142 INFO L462 AbstractCegarLoop]: Abstraction has 225 states and 324 transitions. [2019-12-07 14:33:11,142 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:11,142 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 324 transitions. [2019-12-07 14:33:11,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 14:33:11,143 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:11,143 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:11,143 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:11,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:11,143 INFO L82 PathProgramCache]: Analyzing trace with hash -1746044383, now seen corresponding path program 1 times [2019-12-07 14:33:11,143 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:11,143 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [300681604] [2019-12-07 14:33:11,143 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:11,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:11,171 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 14:33:11,171 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [300681604] [2019-12-07 14:33:11,171 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:11,171 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:33:11,172 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1187626866] [2019-12-07 14:33:11,172 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:33:11,172 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:11,172 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:33:11,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:33:11,172 INFO L87 Difference]: Start difference. First operand 225 states and 324 transitions. Second operand 4 states. [2019-12-07 14:33:11,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:11,196 INFO L93 Difference]: Finished difference Result 393 states and 578 transitions. [2019-12-07 14:33:11,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:33:11,196 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2019-12-07 14:33:11,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:11,198 INFO L225 Difference]: With dead ends: 393 [2019-12-07 14:33:11,198 INFO L226 Difference]: Without dead ends: 225 [2019-12-07 14:33:11,198 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:33:11,199 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2019-12-07 14:33:11,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 225. [2019-12-07 14:33:11,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2019-12-07 14:33:11,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 323 transitions. [2019-12-07 14:33:11,206 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 323 transitions. Word has length 59 [2019-12-07 14:33:11,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:11,206 INFO L462 AbstractCegarLoop]: Abstraction has 225 states and 323 transitions. [2019-12-07 14:33:11,206 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:33:11,206 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 323 transitions. [2019-12-07 14:33:11,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-12-07 14:33:11,206 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:11,207 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:11,207 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:11,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:11,207 INFO L82 PathProgramCache]: Analyzing trace with hash 621112538, now seen corresponding path program 1 times [2019-12-07 14:33:11,207 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:11,207 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [502460808] [2019-12-07 14:33:11,208 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:11,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:11,241 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 14:33:11,241 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [502460808] [2019-12-07 14:33:11,241 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:11,241 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:11,241 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1785371537] [2019-12-07 14:33:11,242 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:11,242 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:11,242 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:11,242 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,242 INFO L87 Difference]: Start difference. First operand 225 states and 323 transitions. Second operand 3 states. [2019-12-07 14:33:11,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:11,259 INFO L93 Difference]: Finished difference Result 522 states and 776 transitions. [2019-12-07 14:33:11,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:11,260 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 62 [2019-12-07 14:33:11,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:11,261 INFO L225 Difference]: With dead ends: 522 [2019-12-07 14:33:11,261 INFO L226 Difference]: Without dead ends: 357 [2019-12-07 14:33:11,262 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2019-12-07 14:33:11,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 220. [2019-12-07 14:33:11,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2019-12-07 14:33:11,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 315 transitions. [2019-12-07 14:33:11,268 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 315 transitions. Word has length 62 [2019-12-07 14:33:11,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:11,268 INFO L462 AbstractCegarLoop]: Abstraction has 220 states and 315 transitions. [2019-12-07 14:33:11,268 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:11,268 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 315 transitions. [2019-12-07 14:33:11,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:33:11,268 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:11,269 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:11,269 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:11,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:11,269 INFO L82 PathProgramCache]: Analyzing trace with hash 114301335, now seen corresponding path program 1 times [2019-12-07 14:33:11,269 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:11,269 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [801281675] [2019-12-07 14:33:11,269 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:11,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:11,307 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 14:33:11,307 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [801281675] [2019-12-07 14:33:11,307 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:11,307 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:11,307 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [83414394] [2019-12-07 14:33:11,308 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:11,308 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:11,308 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:11,308 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,308 INFO L87 Difference]: Start difference. First operand 220 states and 315 transitions. Second operand 3 states. [2019-12-07 14:33:11,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:11,326 INFO L93 Difference]: Finished difference Result 503 states and 747 transitions. [2019-12-07 14:33:11,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:11,326 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 14:33:11,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:11,328 INFO L225 Difference]: With dead ends: 503 [2019-12-07 14:33:11,328 INFO L226 Difference]: Without dead ends: 343 [2019-12-07 14:33:11,328 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 343 states. [2019-12-07 14:33:11,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 343 to 216. [2019-12-07 14:33:11,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 216 states. [2019-12-07 14:33:11,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216 states to 216 states and 308 transitions. [2019-12-07 14:33:11,334 INFO L78 Accepts]: Start accepts. Automaton has 216 states and 308 transitions. Word has length 67 [2019-12-07 14:33:11,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:11,335 INFO L462 AbstractCegarLoop]: Abstraction has 216 states and 308 transitions. [2019-12-07 14:33:11,335 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:11,335 INFO L276 IsEmpty]: Start isEmpty. Operand 216 states and 308 transitions. [2019-12-07 14:33:11,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-12-07 14:33:11,335 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:11,335 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:11,335 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:11,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:11,336 INFO L82 PathProgramCache]: Analyzing trace with hash 2093726931, now seen corresponding path program 1 times [2019-12-07 14:33:11,336 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:11,336 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [526214612] [2019-12-07 14:33:11,336 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:11,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:11,362 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 14:33:11,362 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [526214612] [2019-12-07 14:33:11,362 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:11,363 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:11,363 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [577742082] [2019-12-07 14:33:11,363 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:11,363 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:11,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:11,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,363 INFO L87 Difference]: Start difference. First operand 216 states and 308 transitions. Second operand 3 states. [2019-12-07 14:33:11,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:11,378 INFO L93 Difference]: Finished difference Result 370 states and 542 transitions. [2019-12-07 14:33:11,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:11,379 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 73 [2019-12-07 14:33:11,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:11,380 INFO L225 Difference]: With dead ends: 370 [2019-12-07 14:33:11,380 INFO L226 Difference]: Without dead ends: 214 [2019-12-07 14:33:11,380 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2019-12-07 14:33:11,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 213. [2019-12-07 14:33:11,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2019-12-07 14:33:11,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 302 transitions. [2019-12-07 14:33:11,386 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 302 transitions. Word has length 73 [2019-12-07 14:33:11,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:11,386 INFO L462 AbstractCegarLoop]: Abstraction has 213 states and 302 transitions. [2019-12-07 14:33:11,386 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:11,386 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 302 transitions. [2019-12-07 14:33:11,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-07 14:33:11,387 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:11,387 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:11,387 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:11,387 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:11,387 INFO L82 PathProgramCache]: Analyzing trace with hash -953900745, now seen corresponding path program 1 times [2019-12-07 14:33:11,387 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:11,388 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2159739] [2019-12-07 14:33:11,388 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:11,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:11,416 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 14:33:11,417 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2159739] [2019-12-07 14:33:11,417 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:11,417 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:11,417 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2013971747] [2019-12-07 14:33:11,417 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:11,417 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:11,417 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:11,418 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,418 INFO L87 Difference]: Start difference. First operand 213 states and 302 transitions. Second operand 3 states. [2019-12-07 14:33:11,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:11,425 INFO L93 Difference]: Finished difference Result 412 states and 601 transitions. [2019-12-07 14:33:11,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:11,425 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2019-12-07 14:33:11,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:11,426 INFO L225 Difference]: With dead ends: 412 [2019-12-07 14:33:11,426 INFO L226 Difference]: Without dead ends: 259 [2019-12-07 14:33:11,427 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states. [2019-12-07 14:33:11,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 210. [2019-12-07 14:33:11,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2019-12-07 14:33:11,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 298 transitions. [2019-12-07 14:33:11,433 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 298 transitions. Word has length 80 [2019-12-07 14:33:11,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:11,433 INFO L462 AbstractCegarLoop]: Abstraction has 210 states and 298 transitions. [2019-12-07 14:33:11,433 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:11,433 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 298 transitions. [2019-12-07 14:33:11,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 14:33:11,434 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:11,434 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:11,434 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:11,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:11,434 INFO L82 PathProgramCache]: Analyzing trace with hash 1940476615, now seen corresponding path program 1 times [2019-12-07 14:33:11,434 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:11,434 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [853174067] [2019-12-07 14:33:11,434 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:11,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:11,495 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 14:33:11,495 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [853174067] [2019-12-07 14:33:11,495 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:11,495 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:33:11,495 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1815586343] [2019-12-07 14:33:11,496 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:33:11,496 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:11,496 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:33:11,496 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:33:11,496 INFO L87 Difference]: Start difference. First operand 210 states and 298 transitions. Second operand 4 states. [2019-12-07 14:33:11,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:11,563 INFO L93 Difference]: Finished difference Result 534 states and 779 transitions. [2019-12-07 14:33:11,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:33:11,563 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 83 [2019-12-07 14:33:11,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:11,565 INFO L225 Difference]: With dead ends: 534 [2019-12-07 14:33:11,565 INFO L226 Difference]: Without dead ends: 384 [2019-12-07 14:33:11,565 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:33:11,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 384 states. [2019-12-07 14:33:11,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 384 to 291. [2019-12-07 14:33:11,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 291 states. [2019-12-07 14:33:11,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 415 transitions. [2019-12-07 14:33:11,574 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 415 transitions. Word has length 83 [2019-12-07 14:33:11,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:11,574 INFO L462 AbstractCegarLoop]: Abstraction has 291 states and 415 transitions. [2019-12-07 14:33:11,574 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:33:11,575 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 415 transitions. [2019-12-07 14:33:11,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2019-12-07 14:33:11,575 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:11,575 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:11,575 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:11,575 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:11,576 INFO L82 PathProgramCache]: Analyzing trace with hash 1284591471, now seen corresponding path program 1 times [2019-12-07 14:33:11,576 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:11,576 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312697133] [2019-12-07 14:33:11,576 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:11,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:11,621 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 14:33:11,621 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [312697133] [2019-12-07 14:33:11,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:11,622 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:11,622 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1518458501] [2019-12-07 14:33:11,622 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:11,622 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:11,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:11,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,623 INFO L87 Difference]: Start difference. First operand 291 states and 415 transitions. Second operand 3 states. [2019-12-07 14:33:11,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:11,652 INFO L93 Difference]: Finished difference Result 690 states and 1009 transitions. [2019-12-07 14:33:11,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:11,652 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 99 [2019-12-07 14:33:11,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:11,655 INFO L225 Difference]: With dead ends: 690 [2019-12-07 14:33:11,656 INFO L226 Difference]: Without dead ends: 497 [2019-12-07 14:33:11,656 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 497 states. [2019-12-07 14:33:11,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 497 to 361. [2019-12-07 14:33:11,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 361 states. [2019-12-07 14:33:11,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 361 states to 361 states and 514 transitions. [2019-12-07 14:33:11,674 INFO L78 Accepts]: Start accepts. Automaton has 361 states and 514 transitions. Word has length 99 [2019-12-07 14:33:11,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:11,674 INFO L462 AbstractCegarLoop]: Abstraction has 361 states and 514 transitions. [2019-12-07 14:33:11,674 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:11,675 INFO L276 IsEmpty]: Start isEmpty. Operand 361 states and 514 transitions. [2019-12-07 14:33:11,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2019-12-07 14:33:11,675 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:11,675 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:11,676 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:11,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:11,676 INFO L82 PathProgramCache]: Analyzing trace with hash 1539198065, now seen corresponding path program 1 times [2019-12-07 14:33:11,676 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:11,676 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2048067607] [2019-12-07 14:33:11,676 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:11,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:11,723 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 14:33:11,724 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2048067607] [2019-12-07 14:33:11,724 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:11,724 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:11,724 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1309964356] [2019-12-07 14:33:11,724 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:11,724 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:11,724 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:11,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,725 INFO L87 Difference]: Start difference. First operand 361 states and 514 transitions. Second operand 3 states. [2019-12-07 14:33:11,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:11,757 INFO L93 Difference]: Finished difference Result 839 states and 1222 transitions. [2019-12-07 14:33:11,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:11,758 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 100 [2019-12-07 14:33:11,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:11,761 INFO L225 Difference]: With dead ends: 839 [2019-12-07 14:33:11,761 INFO L226 Difference]: Without dead ends: 603 [2019-12-07 14:33:11,762 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:11,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 603 states. [2019-12-07 14:33:11,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 603 to 455. [2019-12-07 14:33:11,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 455 states. [2019-12-07 14:33:11,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 455 states to 455 states and 648 transitions. [2019-12-07 14:33:11,781 INFO L78 Accepts]: Start accepts. Automaton has 455 states and 648 transitions. Word has length 100 [2019-12-07 14:33:11,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:11,781 INFO L462 AbstractCegarLoop]: Abstraction has 455 states and 648 transitions. [2019-12-07 14:33:11,781 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:11,781 INFO L276 IsEmpty]: Start isEmpty. Operand 455 states and 648 transitions. [2019-12-07 14:33:11,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2019-12-07 14:33:11,782 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:11,782 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:11,782 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:11,782 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:11,782 INFO L82 PathProgramCache]: Analyzing trace with hash 1069877832, now seen corresponding path program 1 times [2019-12-07 14:33:11,782 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:11,782 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1890600977] [2019-12-07 14:33:11,783 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:11,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:11,818 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 14:33:11,818 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1890600977] [2019-12-07 14:33:11,818 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1955028201] [2019-12-07 14:33:11,818 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:33:11,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:11,922 INFO L264 TraceCheckSpWp]: Trace formula consists of 509 conjuncts, 3 conjunts are in the unsatisfiable core [2019-12-07 14:33:11,929 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 14:33:11,963 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 14:33:11,964 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 14:33:11,964 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2019-12-07 14:33:11,964 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1025852434] [2019-12-07 14:33:11,964 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:33:11,964 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:11,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:33:11,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:33:11,965 INFO L87 Difference]: Start difference. First operand 455 states and 648 transitions. Second operand 6 states. [2019-12-07 14:33:12,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:12,182 INFO L93 Difference]: Finished difference Result 1190 states and 1646 transitions. [2019-12-07 14:33:12,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 14:33:12,182 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 101 [2019-12-07 14:33:12,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:12,185 INFO L225 Difference]: With dead ends: 1190 [2019-12-07 14:33:12,185 INFO L226 Difference]: Without dead ends: 746 [2019-12-07 14:33:12,186 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 108 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:33:12,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 746 states. [2019-12-07 14:33:12,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 746 to 496. [2019-12-07 14:33:12,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 496 states. [2019-12-07 14:33:12,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 496 states to 496 states and 688 transitions. [2019-12-07 14:33:12,204 INFO L78 Accepts]: Start accepts. Automaton has 496 states and 688 transitions. Word has length 101 [2019-12-07 14:33:12,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:12,213 INFO L462 AbstractCegarLoop]: Abstraction has 496 states and 688 transitions. [2019-12-07 14:33:12,214 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:33:12,214 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 688 transitions. [2019-12-07 14:33:12,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2019-12-07 14:33:12,215 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:12,215 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:12,415 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:33:12,416 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:12,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:12,416 INFO L82 PathProgramCache]: Analyzing trace with hash -958769693, now seen corresponding path program 1 times [2019-12-07 14:33:12,416 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:12,417 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541561212] [2019-12-07 14:33:12,417 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:12,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:12,468 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2019-12-07 14:33:12,468 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [541561212] [2019-12-07 14:33:12,469 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1911640904] [2019-12-07 14:33:12,469 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:33:12,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:12,571 INFO L264 TraceCheckSpWp]: Trace formula consists of 613 conjuncts, 4 conjunts are in the unsatisfiable core [2019-12-07 14:33:12,575 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 14:33:12,604 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2019-12-07 14:33:12,605 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 14:33:12,605 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5] total 7 [2019-12-07 14:33:12,605 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1611201719] [2019-12-07 14:33:12,605 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:33:12,605 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:12,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:33:12,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:33:12,606 INFO L87 Difference]: Start difference. First operand 496 states and 688 transitions. Second operand 7 states. [2019-12-07 14:33:12,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:12,805 INFO L93 Difference]: Finished difference Result 1395 states and 1935 transitions. [2019-12-07 14:33:12,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 14:33:12,806 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 139 [2019-12-07 14:33:12,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:12,811 INFO L225 Difference]: With dead ends: 1395 [2019-12-07 14:33:12,811 INFO L226 Difference]: Without dead ends: 918 [2019-12-07 14:33:12,812 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:33:12,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 918 states. [2019-12-07 14:33:12,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 918 to 537. [2019-12-07 14:33:12,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 537 states. [2019-12-07 14:33:12,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 537 states to 537 states and 736 transitions. [2019-12-07 14:33:12,837 INFO L78 Accepts]: Start accepts. Automaton has 537 states and 736 transitions. Word has length 139 [2019-12-07 14:33:12,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:12,838 INFO L462 AbstractCegarLoop]: Abstraction has 537 states and 736 transitions. [2019-12-07 14:33:12,838 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:33:12,838 INFO L276 IsEmpty]: Start isEmpty. Operand 537 states and 736 transitions. [2019-12-07 14:33:12,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2019-12-07 14:33:12,840 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:12,840 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:13,040 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:33:13,041 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:13,041 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:13,041 INFO L82 PathProgramCache]: Analyzing trace with hash 818430710, now seen corresponding path program 1 times [2019-12-07 14:33:13,041 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:13,041 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1830326085] [2019-12-07 14:33:13,042 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:13,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:13,137 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:33:13,137 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1830326085] [2019-12-07 14:33:13,138 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:13,138 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:33:13,138 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [601147666] [2019-12-07 14:33:13,138 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:33:13,138 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:13,138 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:33:13,138 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:33:13,138 INFO L87 Difference]: Start difference. First operand 537 states and 736 transitions. Second operand 4 states. [2019-12-07 14:33:13,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:13,193 INFO L93 Difference]: Finished difference Result 851 states and 1186 transitions. [2019-12-07 14:33:13,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:33:13,194 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 177 [2019-12-07 14:33:13,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:13,198 INFO L225 Difference]: With dead ends: 851 [2019-12-07 14:33:13,198 INFO L226 Difference]: Without dead ends: 849 [2019-12-07 14:33:13,199 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:33:13,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 849 states. [2019-12-07 14:33:13,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 849 to 539. [2019-12-07 14:33:13,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 539 states. [2019-12-07 14:33:13,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 539 states to 539 states and 738 transitions. [2019-12-07 14:33:13,225 INFO L78 Accepts]: Start accepts. Automaton has 539 states and 738 transitions. Word has length 177 [2019-12-07 14:33:13,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:13,225 INFO L462 AbstractCegarLoop]: Abstraction has 539 states and 738 transitions. [2019-12-07 14:33:13,225 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:33:13,225 INFO L276 IsEmpty]: Start isEmpty. Operand 539 states and 738 transitions. [2019-12-07 14:33:13,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2019-12-07 14:33:13,227 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:13,227 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:13,227 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:13,227 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:13,228 INFO L82 PathProgramCache]: Analyzing trace with hash 1245468310, now seen corresponding path program 1 times [2019-12-07 14:33:13,228 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:13,228 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1757642971] [2019-12-07 14:33:13,228 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:13,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:13,353 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2019-12-07 14:33:13,354 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1757642971] [2019-12-07 14:33:13,354 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [384265903] [2019-12-07 14:33:13,354 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:33:13,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:13,476 INFO L264 TraceCheckSpWp]: Trace formula consists of 736 conjuncts, 8 conjunts are in the unsatisfiable core [2019-12-07 14:33:13,480 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 14:33:13,536 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2019-12-07 14:33:13,536 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 14:33:13,536 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2019-12-07 14:33:13,536 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [490862562] [2019-12-07 14:33:13,537 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:33:13,537 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:13,537 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:33:13,537 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:33:13,537 INFO L87 Difference]: Start difference. First operand 539 states and 738 transitions. Second operand 11 states. [2019-12-07 14:33:14,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:14,083 INFO L93 Difference]: Finished difference Result 2992 states and 4233 transitions. [2019-12-07 14:33:14,083 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 14:33:14,083 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 180 [2019-12-07 14:33:14,083 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:14,093 INFO L225 Difference]: With dead ends: 2992 [2019-12-07 14:33:14,093 INFO L226 Difference]: Without dead ends: 2690 [2019-12-07 14:33:14,094 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 179 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 148 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=158, Invalid=598, Unknown=0, NotChecked=0, Total=756 [2019-12-07 14:33:14,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2690 states. [2019-12-07 14:33:14,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2690 to 727. [2019-12-07 14:33:14,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 727 states. [2019-12-07 14:33:14,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 727 states to 727 states and 987 transitions. [2019-12-07 14:33:14,130 INFO L78 Accepts]: Start accepts. Automaton has 727 states and 987 transitions. Word has length 180 [2019-12-07 14:33:14,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:14,131 INFO L462 AbstractCegarLoop]: Abstraction has 727 states and 987 transitions. [2019-12-07 14:33:14,131 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:33:14,131 INFO L276 IsEmpty]: Start isEmpty. Operand 727 states and 987 transitions. [2019-12-07 14:33:14,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2019-12-07 14:33:14,132 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:14,132 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:14,333 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:33:14,333 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:14,333 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:14,333 INFO L82 PathProgramCache]: Analyzing trace with hash -34395368, now seen corresponding path program 1 times [2019-12-07 14:33:14,334 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:14,334 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1938606514] [2019-12-07 14:33:14,334 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:14,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:14,399 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:33:14,400 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1938606514] [2019-12-07 14:33:14,400 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:14,400 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:14,400 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2041079569] [2019-12-07 14:33:14,400 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:14,400 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:14,401 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:14,401 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:14,401 INFO L87 Difference]: Start difference. First operand 727 states and 987 transitions. Second operand 3 states. [2019-12-07 14:33:14,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:14,498 INFO L93 Difference]: Finished difference Result 1572 states and 2166 transitions. [2019-12-07 14:33:14,499 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:14,499 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 180 [2019-12-07 14:33:14,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:14,505 INFO L225 Difference]: With dead ends: 1572 [2019-12-07 14:33:14,506 INFO L226 Difference]: Without dead ends: 1270 [2019-12-07 14:33:14,507 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:14,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1270 states. [2019-12-07 14:33:14,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1270 to 727. [2019-12-07 14:33:14,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 727 states. [2019-12-07 14:33:14,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 727 states to 727 states and 985 transitions. [2019-12-07 14:33:14,555 INFO L78 Accepts]: Start accepts. Automaton has 727 states and 985 transitions. Word has length 180 [2019-12-07 14:33:14,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:14,556 INFO L462 AbstractCegarLoop]: Abstraction has 727 states and 985 transitions. [2019-12-07 14:33:14,556 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:14,556 INFO L276 IsEmpty]: Start isEmpty. Operand 727 states and 985 transitions. [2019-12-07 14:33:14,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2019-12-07 14:33:14,558 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:14,558 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:14,558 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:14,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:14,559 INFO L82 PathProgramCache]: Analyzing trace with hash 1859951354, now seen corresponding path program 1 times [2019-12-07 14:33:14,559 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:14,559 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [309065350] [2019-12-07 14:33:14,559 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:14,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:14,621 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 111 trivial. 0 not checked. [2019-12-07 14:33:14,621 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [309065350] [2019-12-07 14:33:14,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:14,621 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:14,621 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2055166191] [2019-12-07 14:33:14,622 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:14,622 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:14,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:14,622 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:14,622 INFO L87 Difference]: Start difference. First operand 727 states and 985 transitions. Second operand 3 states. [2019-12-07 14:33:14,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:14,662 INFO L93 Difference]: Finished difference Result 1192 states and 1628 transitions. [2019-12-07 14:33:14,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:14,662 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 183 [2019-12-07 14:33:14,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:14,664 INFO L225 Difference]: With dead ends: 1192 [2019-12-07 14:33:14,664 INFO L226 Difference]: Without dead ends: 586 [2019-12-07 14:33:14,665 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:14,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 586 states. [2019-12-07 14:33:14,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 586 to 585. [2019-12-07 14:33:14,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 585 states. [2019-12-07 14:33:14,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 585 states to 585 states and 769 transitions. [2019-12-07 14:33:14,685 INFO L78 Accepts]: Start accepts. Automaton has 585 states and 769 transitions. Word has length 183 [2019-12-07 14:33:14,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:14,685 INFO L462 AbstractCegarLoop]: Abstraction has 585 states and 769 transitions. [2019-12-07 14:33:14,685 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:14,686 INFO L276 IsEmpty]: Start isEmpty. Operand 585 states and 769 transitions. [2019-12-07 14:33:14,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 189 [2019-12-07 14:33:14,687 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:14,687 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:14,687 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:14,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:14,687 INFO L82 PathProgramCache]: Analyzing trace with hash 2102972572, now seen corresponding path program 1 times [2019-12-07 14:33:14,688 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:14,688 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [6707401] [2019-12-07 14:33:14,688 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:14,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:14,809 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:33:14,809 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [6707401] [2019-12-07 14:33:14,810 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:14,810 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:33:14,810 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [812673634] [2019-12-07 14:33:14,810 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 14:33:14,810 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:14,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 14:33:14,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:33:14,811 INFO L87 Difference]: Start difference. First operand 585 states and 769 transitions. Second operand 9 states. [2019-12-07 14:33:15,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:15,685 INFO L93 Difference]: Finished difference Result 1910 states and 2584 transitions. [2019-12-07 14:33:15,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 14:33:15,685 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 188 [2019-12-07 14:33:15,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:15,692 INFO L225 Difference]: With dead ends: 1910 [2019-12-07 14:33:15,692 INFO L226 Difference]: Without dead ends: 1619 [2019-12-07 14:33:15,694 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 481 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=384, Invalid=1256, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 14:33:15,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1619 states. [2019-12-07 14:33:15,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1619 to 675. [2019-12-07 14:33:15,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 675 states. [2019-12-07 14:33:15,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 675 states to 675 states and 885 transitions. [2019-12-07 14:33:15,738 INFO L78 Accepts]: Start accepts. Automaton has 675 states and 885 transitions. Word has length 188 [2019-12-07 14:33:15,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:15,739 INFO L462 AbstractCegarLoop]: Abstraction has 675 states and 885 transitions. [2019-12-07 14:33:15,739 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 14:33:15,739 INFO L276 IsEmpty]: Start isEmpty. Operand 675 states and 885 transitions. [2019-12-07 14:33:15,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2019-12-07 14:33:15,741 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:15,741 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:15,742 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:15,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:15,742 INFO L82 PathProgramCache]: Analyzing trace with hash -567802538, now seen corresponding path program 1 times [2019-12-07 14:33:15,742 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:15,742 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1697164932] [2019-12-07 14:33:15,743 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:15,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:15,845 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:33:15,846 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1697164932] [2019-12-07 14:33:15,846 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:15,846 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:33:15,846 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1393002315] [2019-12-07 14:33:15,847 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:33:15,847 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:15,847 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:33:15,847 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:33:15,847 INFO L87 Difference]: Start difference. First operand 675 states and 885 transitions. Second operand 6 states. [2019-12-07 14:33:15,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:15,972 INFO L93 Difference]: Finished difference Result 2092 states and 2826 transitions. [2019-12-07 14:33:15,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:33:15,973 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 194 [2019-12-07 14:33:15,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:15,981 INFO L225 Difference]: With dead ends: 2092 [2019-12-07 14:33:15,981 INFO L226 Difference]: Without dead ends: 1705 [2019-12-07 14:33:15,982 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:33:15,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1705 states. [2019-12-07 14:33:16,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1705 to 752. [2019-12-07 14:33:16,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 752 states. [2019-12-07 14:33:16,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 752 states to 752 states and 983 transitions. [2019-12-07 14:33:16,027 INFO L78 Accepts]: Start accepts. Automaton has 752 states and 983 transitions. Word has length 194 [2019-12-07 14:33:16,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:16,028 INFO L462 AbstractCegarLoop]: Abstraction has 752 states and 983 transitions. [2019-12-07 14:33:16,028 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:33:16,028 INFO L276 IsEmpty]: Start isEmpty. Operand 752 states and 983 transitions. [2019-12-07 14:33:16,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2019-12-07 14:33:16,029 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:16,029 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:16,030 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:16,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:16,030 INFO L82 PathProgramCache]: Analyzing trace with hash 190520342, now seen corresponding path program 1 times [2019-12-07 14:33:16,030 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:16,030 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1537188086] [2019-12-07 14:33:16,030 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:16,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:16,127 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:33:16,127 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1537188086] [2019-12-07 14:33:16,127 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:16,127 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:33:16,127 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1255588279] [2019-12-07 14:33:16,128 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:33:16,128 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:16,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:33:16,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:33:16,128 INFO L87 Difference]: Start difference. First operand 752 states and 983 transitions. Second operand 7 states. [2019-12-07 14:33:16,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:16,398 INFO L93 Difference]: Finished difference Result 1783 states and 2362 transitions. [2019-12-07 14:33:16,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 14:33:16,399 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 194 [2019-12-07 14:33:16,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:16,403 INFO L225 Difference]: With dead ends: 1783 [2019-12-07 14:33:16,404 INFO L226 Difference]: Without dead ends: 1322 [2019-12-07 14:33:16,404 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=48, Invalid=84, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:33:16,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1322 states. [2019-12-07 14:33:16,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1322 to 793. [2019-12-07 14:33:16,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 793 states. [2019-12-07 14:33:16,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 793 states to 793 states and 1029 transitions. [2019-12-07 14:33:16,439 INFO L78 Accepts]: Start accepts. Automaton has 793 states and 1029 transitions. Word has length 194 [2019-12-07 14:33:16,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:16,439 INFO L462 AbstractCegarLoop]: Abstraction has 793 states and 1029 transitions. [2019-12-07 14:33:16,439 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:33:16,440 INFO L276 IsEmpty]: Start isEmpty. Operand 793 states and 1029 transitions. [2019-12-07 14:33:16,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2019-12-07 14:33:16,441 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:16,441 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:16,441 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:16,441 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:16,442 INFO L82 PathProgramCache]: Analyzing trace with hash -1531612590, now seen corresponding path program 1 times [2019-12-07 14:33:16,442 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:16,442 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [825776589] [2019-12-07 14:33:16,442 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:16,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:16,546 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:33:16,546 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [825776589] [2019-12-07 14:33:16,546 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:16,546 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:33:16,546 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1796202946] [2019-12-07 14:33:16,547 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:33:16,547 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:16,547 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:33:16,547 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:33:16,547 INFO L87 Difference]: Start difference. First operand 793 states and 1029 transitions. Second operand 7 states. [2019-12-07 14:33:16,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:16,855 INFO L93 Difference]: Finished difference Result 1853 states and 2442 transitions. [2019-12-07 14:33:16,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 14:33:16,856 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 194 [2019-12-07 14:33:16,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:16,860 INFO L225 Difference]: With dead ends: 1853 [2019-12-07 14:33:16,860 INFO L226 Difference]: Without dead ends: 1346 [2019-12-07 14:33:16,861 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=48, Invalid=84, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:33:16,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1346 states. [2019-12-07 14:33:16,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1346 to 812. [2019-12-07 14:33:16,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 812 states. [2019-12-07 14:33:16,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 812 states to 812 states and 1053 transitions. [2019-12-07 14:33:16,897 INFO L78 Accepts]: Start accepts. Automaton has 812 states and 1053 transitions. Word has length 194 [2019-12-07 14:33:16,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:16,898 INFO L462 AbstractCegarLoop]: Abstraction has 812 states and 1053 transitions. [2019-12-07 14:33:16,898 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:33:16,898 INFO L276 IsEmpty]: Start isEmpty. Operand 812 states and 1053 transitions. [2019-12-07 14:33:16,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2019-12-07 14:33:16,899 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:16,900 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:16,900 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:16,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:16,900 INFO L82 PathProgramCache]: Analyzing trace with hash 1585508679, now seen corresponding path program 1 times [2019-12-07 14:33:16,900 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:16,900 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [701738950] [2019-12-07 14:33:16,901 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:16,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:16,960 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 141 trivial. 0 not checked. [2019-12-07 14:33:16,960 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [701738950] [2019-12-07 14:33:16,960 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:16,961 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:33:16,961 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1318870518] [2019-12-07 14:33:16,961 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:33:16,961 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:16,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:33:16,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:33:16,962 INFO L87 Difference]: Start difference. First operand 812 states and 1053 transitions. Second operand 4 states. [2019-12-07 14:33:17,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:17,086 INFO L93 Difference]: Finished difference Result 1467 states and 1930 transitions. [2019-12-07 14:33:17,086 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:33:17,086 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 203 [2019-12-07 14:33:17,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:17,091 INFO L225 Difference]: With dead ends: 1467 [2019-12-07 14:33:17,091 INFO L226 Difference]: Without dead ends: 949 [2019-12-07 14:33:17,092 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:33:17,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 949 states. [2019-12-07 14:33:17,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 949 to 642. [2019-12-07 14:33:17,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 642 states. [2019-12-07 14:33:17,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 642 states to 642 states and 822 transitions. [2019-12-07 14:33:17,124 INFO L78 Accepts]: Start accepts. Automaton has 642 states and 822 transitions. Word has length 203 [2019-12-07 14:33:17,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:17,124 INFO L462 AbstractCegarLoop]: Abstraction has 642 states and 822 transitions. [2019-12-07 14:33:17,124 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:33:17,124 INFO L276 IsEmpty]: Start isEmpty. Operand 642 states and 822 transitions. [2019-12-07 14:33:17,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2019-12-07 14:33:17,125 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:17,125 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:17,126 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:17,126 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:17,126 INFO L82 PathProgramCache]: Analyzing trace with hash 1545379130, now seen corresponding path program 1 times [2019-12-07 14:33:17,126 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:17,126 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1760730170] [2019-12-07 14:33:17,126 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:17,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:17,319 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 2 proven. 38 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:33:17,320 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1760730170] [2019-12-07 14:33:17,320 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [377390277] [2019-12-07 14:33:17,320 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:33:17,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:17,452 INFO L264 TraceCheckSpWp]: Trace formula consists of 941 conjuncts, 14 conjunts are in the unsatisfiable core [2019-12-07 14:33:17,455 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 14:33:17,587 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 9 proven. 31 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:33:17,587 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 14:33:17,587 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8] total 19 [2019-12-07 14:33:17,588 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [21076541] [2019-12-07 14:33:17,588 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 14:33:17,588 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:17,588 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 14:33:17,588 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=306, Unknown=0, NotChecked=0, Total=342 [2019-12-07 14:33:17,588 INFO L87 Difference]: Start difference. First operand 642 states and 822 transitions. Second operand 19 states. [2019-12-07 14:33:53,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:53,789 INFO L93 Difference]: Finished difference Result 19537 states and 25738 transitions. [2019-12-07 14:33:53,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 948 states. [2019-12-07 14:33:53,790 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 226 [2019-12-07 14:33:53,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:53,820 INFO L225 Difference]: With dead ends: 19537 [2019-12-07 14:33:53,821 INFO L226 Difference]: Without dead ends: 19145 [2019-12-07 14:33:53,861 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1183 GetRequests, 221 SyntacticMatches, 0 SemanticMatches, 962 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 443379 ImplicationChecksByTransitivity, 28.7s TimeCoverageRelationStatistics Valid=62902, Invalid=865430, Unknown=0, NotChecked=0, Total=928332 [2019-12-07 14:33:53,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19145 states. [2019-12-07 14:33:54,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19145 to 1978. [2019-12-07 14:33:54,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1978 states. [2019-12-07 14:33:54,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1978 states to 1978 states and 2503 transitions. [2019-12-07 14:33:54,062 INFO L78 Accepts]: Start accepts. Automaton has 1978 states and 2503 transitions. Word has length 226 [2019-12-07 14:33:54,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:54,062 INFO L462 AbstractCegarLoop]: Abstraction has 1978 states and 2503 transitions. [2019-12-07 14:33:54,062 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 14:33:54,062 INFO L276 IsEmpty]: Start isEmpty. Operand 1978 states and 2503 transitions. [2019-12-07 14:33:54,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2019-12-07 14:33:54,064 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:54,064 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:54,265 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:33:54,265 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:54,266 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:54,266 INFO L82 PathProgramCache]: Analyzing trace with hash 27498942, now seen corresponding path program 1 times [2019-12-07 14:33:54,266 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:54,266 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089626296] [2019-12-07 14:33:54,266 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:54,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:54,324 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 150 trivial. 0 not checked. [2019-12-07 14:33:54,324 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2089626296] [2019-12-07 14:33:54,324 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:54,324 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:54,324 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1143188955] [2019-12-07 14:33:54,324 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:54,325 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:54,325 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:54,325 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:54,325 INFO L87 Difference]: Start difference. First operand 1978 states and 2503 transitions. Second operand 3 states. [2019-12-07 14:33:54,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:54,487 INFO L93 Difference]: Finished difference Result 3901 states and 4927 transitions. [2019-12-07 14:33:54,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:54,488 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 226 [2019-12-07 14:33:54,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:54,491 INFO L225 Difference]: With dead ends: 3901 [2019-12-07 14:33:54,491 INFO L226 Difference]: Without dead ends: 2203 [2019-12-07 14:33:54,493 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:54,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2203 states. [2019-12-07 14:33:54,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2203 to 1972. [2019-12-07 14:33:54,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1972 states. [2019-12-07 14:33:54,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1972 states to 1972 states and 2407 transitions. [2019-12-07 14:33:54,666 INFO L78 Accepts]: Start accepts. Automaton has 1972 states and 2407 transitions. Word has length 226 [2019-12-07 14:33:54,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:54,666 INFO L462 AbstractCegarLoop]: Abstraction has 1972 states and 2407 transitions. [2019-12-07 14:33:54,666 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:54,667 INFO L276 IsEmpty]: Start isEmpty. Operand 1972 states and 2407 transitions. [2019-12-07 14:33:54,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2019-12-07 14:33:54,669 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:54,669 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:54,669 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:54,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:54,670 INFO L82 PathProgramCache]: Analyzing trace with hash 1407792312, now seen corresponding path program 1 times [2019-12-07 14:33:54,670 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:54,670 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [697306212] [2019-12-07 14:33:54,670 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:54,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:54,736 INFO L134 CoverageAnalysis]: Checked inductivity of 159 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 137 trivial. 0 not checked. [2019-12-07 14:33:54,736 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [697306212] [2019-12-07 14:33:54,736 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:54,737 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:54,737 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [890859348] [2019-12-07 14:33:54,737 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:54,737 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:54,737 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:54,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:54,738 INFO L87 Difference]: Start difference. First operand 1972 states and 2407 transitions. Second operand 3 states. [2019-12-07 14:33:54,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:54,981 INFO L93 Difference]: Finished difference Result 5171 states and 6280 transitions. [2019-12-07 14:33:54,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:54,981 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 226 [2019-12-07 14:33:54,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:54,986 INFO L225 Difference]: With dead ends: 5171 [2019-12-07 14:33:54,986 INFO L226 Difference]: Without dead ends: 3559 [2019-12-07 14:33:54,987 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:54,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3559 states. [2019-12-07 14:33:55,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3559 to 2154. [2019-12-07 14:33:55,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2154 states. [2019-12-07 14:33:55,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2154 states to 2154 states and 2633 transitions. [2019-12-07 14:33:55,134 INFO L78 Accepts]: Start accepts. Automaton has 2154 states and 2633 transitions. Word has length 226 [2019-12-07 14:33:55,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:55,134 INFO L462 AbstractCegarLoop]: Abstraction has 2154 states and 2633 transitions. [2019-12-07 14:33:55,134 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:55,134 INFO L276 IsEmpty]: Start isEmpty. Operand 2154 states and 2633 transitions. [2019-12-07 14:33:55,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2019-12-07 14:33:55,136 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:55,137 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:55,137 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:55,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:55,137 INFO L82 PathProgramCache]: Analyzing trace with hash 440441658, now seen corresponding path program 1 times [2019-12-07 14:33:55,137 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:55,137 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1042578453] [2019-12-07 14:33:55,137 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:55,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:55,202 INFO L134 CoverageAnalysis]: Checked inductivity of 159 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2019-12-07 14:33:55,202 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1042578453] [2019-12-07 14:33:55,202 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:55,203 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:55,203 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [97476207] [2019-12-07 14:33:55,203 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:55,203 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:55,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:55,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:55,204 INFO L87 Difference]: Start difference. First operand 2154 states and 2633 transitions. Second operand 3 states. [2019-12-07 14:33:55,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:55,349 INFO L93 Difference]: Finished difference Result 3944 states and 4828 transitions. [2019-12-07 14:33:55,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:55,350 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 226 [2019-12-07 14:33:55,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:55,352 INFO L225 Difference]: With dead ends: 3944 [2019-12-07 14:33:55,352 INFO L226 Difference]: Without dead ends: 2049 [2019-12-07 14:33:55,354 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:55,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2049 states. [2019-12-07 14:33:55,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2049 to 2049. [2019-12-07 14:33:55,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2049 states. [2019-12-07 14:33:55,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2049 states to 2049 states and 2484 transitions. [2019-12-07 14:33:55,484 INFO L78 Accepts]: Start accepts. Automaton has 2049 states and 2484 transitions. Word has length 226 [2019-12-07 14:33:55,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:55,485 INFO L462 AbstractCegarLoop]: Abstraction has 2049 states and 2484 transitions. [2019-12-07 14:33:55,485 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:55,485 INFO L276 IsEmpty]: Start isEmpty. Operand 2049 states and 2484 transitions. [2019-12-07 14:33:55,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2019-12-07 14:33:55,487 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:55,487 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:55,487 INFO L410 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:55,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:55,487 INFO L82 PathProgramCache]: Analyzing trace with hash -1186673582, now seen corresponding path program 1 times [2019-12-07 14:33:55,487 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:55,487 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1233227980] [2019-12-07 14:33:55,487 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:55,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:55,750 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 34 proven. 9 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2019-12-07 14:33:55,750 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1233227980] [2019-12-07 14:33:55,750 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [66305173] [2019-12-07 14:33:55,750 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:33:55,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:55,859 INFO L264 TraceCheckSpWp]: Trace formula consists of 942 conjuncts, 14 conjunts are in the unsatisfiable core [2019-12-07 14:33:55,862 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 14:33:55,957 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 3 proven. 31 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:33:55,957 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 14:33:55,958 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 16 [2019-12-07 14:33:55,958 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [321088012] [2019-12-07 14:33:55,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 14:33:55,958 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:55,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 14:33:55,958 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-12-07 14:33:55,958 INFO L87 Difference]: Start difference. First operand 2049 states and 2484 transitions. Second operand 16 states. [2019-12-07 14:33:58,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:58,873 INFO L93 Difference]: Finished difference Result 8461 states and 10546 transitions. [2019-12-07 14:33:58,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 106 states. [2019-12-07 14:33:58,874 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 227 [2019-12-07 14:33:58,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:58,878 INFO L225 Difference]: With dead ends: 8461 [2019-12-07 14:33:58,878 INFO L226 Difference]: Without dead ends: 6790 [2019-12-07 14:33:58,880 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 338 GetRequests, 223 SyntacticMatches, 0 SemanticMatches, 115 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4759 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1357, Invalid=12215, Unknown=0, NotChecked=0, Total=13572 [2019-12-07 14:33:58,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6790 states. [2019-12-07 14:33:59,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6790 to 2666. [2019-12-07 14:33:59,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2666 states. [2019-12-07 14:33:59,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2666 states to 2666 states and 3219 transitions. [2019-12-07 14:33:59,067 INFO L78 Accepts]: Start accepts. Automaton has 2666 states and 3219 transitions. Word has length 227 [2019-12-07 14:33:59,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:59,067 INFO L462 AbstractCegarLoop]: Abstraction has 2666 states and 3219 transitions. [2019-12-07 14:33:59,068 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 14:33:59,068 INFO L276 IsEmpty]: Start isEmpty. Operand 2666 states and 3219 transitions. [2019-12-07 14:33:59,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2019-12-07 14:33:59,070 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:59,070 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:59,271 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:33:59,271 INFO L410 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:59,272 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:59,272 INFO L82 PathProgramCache]: Analyzing trace with hash -390808351, now seen corresponding path program 1 times [2019-12-07 14:33:59,272 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:59,272 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1553709575] [2019-12-07 14:33:59,272 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:59,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:59,325 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 157 trivial. 0 not checked. [2019-12-07 14:33:59,326 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1553709575] [2019-12-07 14:33:59,326 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:33:59,326 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:33:59,326 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [62113095] [2019-12-07 14:33:59,326 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:33:59,326 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:59,326 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:33:59,326 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:59,326 INFO L87 Difference]: Start difference. First operand 2666 states and 3219 transitions. Second operand 3 states. [2019-12-07 14:33:59,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:33:59,501 INFO L93 Difference]: Finished difference Result 5026 states and 6057 transitions. [2019-12-07 14:33:59,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:33:59,501 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 235 [2019-12-07 14:33:59,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:33:59,503 INFO L225 Difference]: With dead ends: 5026 [2019-12-07 14:33:59,503 INFO L226 Difference]: Without dead ends: 2373 [2019-12-07 14:33:59,505 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:33:59,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2373 states. [2019-12-07 14:33:59,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2373 to 2373. [2019-12-07 14:33:59,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2373 states. [2019-12-07 14:33:59,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2373 states to 2373 states and 2844 transitions. [2019-12-07 14:33:59,669 INFO L78 Accepts]: Start accepts. Automaton has 2373 states and 2844 transitions. Word has length 235 [2019-12-07 14:33:59,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:33:59,669 INFO L462 AbstractCegarLoop]: Abstraction has 2373 states and 2844 transitions. [2019-12-07 14:33:59,669 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:33:59,669 INFO L276 IsEmpty]: Start isEmpty. Operand 2373 states and 2844 transitions. [2019-12-07 14:33:59,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 239 [2019-12-07 14:33:59,672 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:33:59,672 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:33:59,672 INFO L410 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:33:59,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:33:59,672 INFO L82 PathProgramCache]: Analyzing trace with hash -1880928432, now seen corresponding path program 1 times [2019-12-07 14:33:59,672 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:33:59,672 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [886221980] [2019-12-07 14:33:59,672 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:33:59,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:59,749 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 40 proven. 6 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:33:59,749 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [886221980] [2019-12-07 14:33:59,749 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [914873626] [2019-12-07 14:33:59,749 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:33:59,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:33:59,867 INFO L264 TraceCheckSpWp]: Trace formula consists of 979 conjuncts, 5 conjunts are in the unsatisfiable core [2019-12-07 14:33:59,869 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 14:33:59,939 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2019-12-07 14:33:59,939 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-12-07 14:33:59,939 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 9 [2019-12-07 14:33:59,939 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [595934339] [2019-12-07 14:33:59,940 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:33:59,940 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:33:59,940 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:33:59,940 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:33:59,940 INFO L87 Difference]: Start difference. First operand 2373 states and 2844 transitions. Second operand 5 states. [2019-12-07 14:34:00,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:34:00,177 INFO L93 Difference]: Finished difference Result 4434 states and 5339 transitions. [2019-12-07 14:34:00,178 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:34:00,178 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 238 [2019-12-07 14:34:00,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:34:00,179 INFO L225 Difference]: With dead ends: 4434 [2019-12-07 14:34:00,179 INFO L226 Difference]: Without dead ends: 2385 [2019-12-07 14:34:00,180 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 243 GetRequests, 236 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:34:00,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2385 states. [2019-12-07 14:34:00,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2385 to 2381. [2019-12-07 14:34:00,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2381 states. [2019-12-07 14:34:00,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2381 states to 2381 states and 2848 transitions. [2019-12-07 14:34:00,344 INFO L78 Accepts]: Start accepts. Automaton has 2381 states and 2848 transitions. Word has length 238 [2019-12-07 14:34:00,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:34:00,344 INFO L462 AbstractCegarLoop]: Abstraction has 2381 states and 2848 transitions. [2019-12-07 14:34:00,344 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:34:00,344 INFO L276 IsEmpty]: Start isEmpty. Operand 2381 states and 2848 transitions. [2019-12-07 14:34:00,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 240 [2019-12-07 14:34:00,346 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:34:00,346 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:34:00,547 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:34:00,547 INFO L410 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:34:00,547 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:34:00,548 INFO L82 PathProgramCache]: Analyzing trace with hash -189886281, now seen corresponding path program 1 times [2019-12-07 14:34:00,548 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:34:00,548 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1102942564] [2019-12-07 14:34:00,548 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:34:00,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:34:00,759 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 2 proven. 44 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:34:00,760 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1102942564] [2019-12-07 14:34:00,760 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1484728868] [2019-12-07 14:34:00,760 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:34:00,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:34:00,858 INFO L264 TraceCheckSpWp]: Trace formula consists of 982 conjuncts, 30 conjunts are in the unsatisfiable core [2019-12-07 14:34:00,861 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 14:34:01,195 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 38 proven. 30 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked. [2019-12-07 14:34:01,195 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 14:34:01,195 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 17] total 28 [2019-12-07 14:34:01,195 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [338141213] [2019-12-07 14:34:01,196 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2019-12-07 14:34:01,196 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:34:01,196 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2019-12-07 14:34:01,196 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=687, Unknown=0, NotChecked=0, Total=756 [2019-12-07 14:34:01,196 INFO L87 Difference]: Start difference. First operand 2381 states and 2848 transitions. Second operand 28 states. [2019-12-07 14:34:19,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:34:19,706 INFO L93 Difference]: Finished difference Result 17866 states and 22608 transitions. [2019-12-07 14:34:19,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 237 states. [2019-12-07 14:34:19,707 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 239 [2019-12-07 14:34:19,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:34:19,716 INFO L225 Difference]: With dead ends: 17866 [2019-12-07 14:34:19,716 INFO L226 Difference]: Without dead ends: 15856 [2019-12-07 14:34:19,722 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 485 GetRequests, 224 SyntacticMatches, 0 SemanticMatches, 261 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28099 ImplicationChecksByTransitivity, 8.0s TimeCoverageRelationStatistics Valid=6878, Invalid=62028, Unknown=0, NotChecked=0, Total=68906 [2019-12-07 14:34:19,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15856 states. [2019-12-07 14:34:19,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15856 to 2381. [2019-12-07 14:34:19,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2381 states. [2019-12-07 14:34:19,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2381 states to 2381 states and 2845 transitions. [2019-12-07 14:34:19,964 INFO L78 Accepts]: Start accepts. Automaton has 2381 states and 2845 transitions. Word has length 239 [2019-12-07 14:34:19,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:34:19,964 INFO L462 AbstractCegarLoop]: Abstraction has 2381 states and 2845 transitions. [2019-12-07 14:34:19,964 INFO L463 AbstractCegarLoop]: Interpolant automaton has 28 states. [2019-12-07 14:34:19,964 INFO L276 IsEmpty]: Start isEmpty. Operand 2381 states and 2845 transitions. [2019-12-07 14:34:19,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 247 [2019-12-07 14:34:19,966 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:34:19,966 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:34:20,167 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:34:20,167 INFO L410 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:34:20,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:34:20,168 INFO L82 PathProgramCache]: Analyzing trace with hash -1182283854, now seen corresponding path program 1 times [2019-12-07 14:34:20,168 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:34:20,168 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [140593442] [2019-12-07 14:34:20,168 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:34:20,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:34:20,470 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 2 proven. 32 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:34:20,471 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [140593442] [2019-12-07 14:34:20,471 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1870489937] [2019-12-07 14:34:20,471 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:34:20,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:34:20,570 INFO L264 TraceCheckSpWp]: Trace formula consists of 1002 conjuncts, 30 conjunts are in the unsatisfiable core [2019-12-07 14:34:20,574 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 14:34:20,912 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 26 proven. 34 refuted. 0 times theorem prover too weak. 97 trivial. 0 not checked. [2019-12-07 14:34:20,912 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 14:34:20,913 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 17] total 30 [2019-12-07 14:34:20,913 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1920531351] [2019-12-07 14:34:20,913 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2019-12-07 14:34:20,913 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:34:20,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2019-12-07 14:34:20,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=795, Unknown=0, NotChecked=0, Total=870 [2019-12-07 14:34:20,913 INFO L87 Difference]: Start difference. First operand 2381 states and 2845 transitions. Second operand 30 states. [2019-12-07 14:34:43,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:34:43,481 INFO L93 Difference]: Finished difference Result 32621 states and 40938 transitions. [2019-12-07 14:34:43,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 233 states. [2019-12-07 14:34:43,482 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 246 [2019-12-07 14:34:43,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:34:43,505 INFO L225 Difference]: With dead ends: 32621 [2019-12-07 14:34:43,505 INFO L226 Difference]: Without dead ends: 30611 [2019-12-07 14:34:43,512 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 490 GetRequests, 231 SyntacticMatches, 0 SemanticMatches, 259 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27117 ImplicationChecksByTransitivity, 10.5s TimeCoverageRelationStatistics Valid=6772, Invalid=61088, Unknown=0, NotChecked=0, Total=67860 [2019-12-07 14:34:43,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30611 states. [2019-12-07 14:34:43,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30611 to 3131. [2019-12-07 14:34:43,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3131 states. [2019-12-07 14:34:43,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3131 states to 3131 states and 3799 transitions. [2019-12-07 14:34:43,948 INFO L78 Accepts]: Start accepts. Automaton has 3131 states and 3799 transitions. Word has length 246 [2019-12-07 14:34:43,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:34:43,949 INFO L462 AbstractCegarLoop]: Abstraction has 3131 states and 3799 transitions. [2019-12-07 14:34:43,949 INFO L463 AbstractCegarLoop]: Interpolant automaton has 30 states. [2019-12-07 14:34:43,949 INFO L276 IsEmpty]: Start isEmpty. Operand 3131 states and 3799 transitions. [2019-12-07 14:34:43,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 263 [2019-12-07 14:34:43,952 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:34:43,952 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:34:44,152 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:34:44,153 INFO L410 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:34:44,153 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:34:44,153 INFO L82 PathProgramCache]: Analyzing trace with hash -1570186178, now seen corresponding path program 1 times [2019-12-07 14:34:44,153 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:34:44,154 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1050594144] [2019-12-07 14:34:44,154 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:34:44,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:34:44,310 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 150 trivial. 0 not checked. [2019-12-07 14:34:44,310 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1050594144] [2019-12-07 14:34:44,310 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:34:44,310 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:34:44,310 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1958181418] [2019-12-07 14:34:44,311 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:34:44,311 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:34:44,311 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:34:44,311 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:34:44,311 INFO L87 Difference]: Start difference. First operand 3131 states and 3799 transitions. Second operand 5 states. [2019-12-07 14:34:44,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:34:44,689 INFO L93 Difference]: Finished difference Result 5974 states and 7285 transitions. [2019-12-07 14:34:44,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:34:44,689 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 262 [2019-12-07 14:34:44,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:34:44,691 INFO L225 Difference]: With dead ends: 5974 [2019-12-07 14:34:44,692 INFO L226 Difference]: Without dead ends: 3185 [2019-12-07 14:34:44,694 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:34:44,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3185 states. [2019-12-07 14:34:45,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3185 to 3167. [2019-12-07 14:34:45,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3167 states. [2019-12-07 14:34:45,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3167 states to 3167 states and 3823 transitions. [2019-12-07 14:34:45,031 INFO L78 Accepts]: Start accepts. Automaton has 3167 states and 3823 transitions. Word has length 262 [2019-12-07 14:34:45,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:34:45,032 INFO L462 AbstractCegarLoop]: Abstraction has 3167 states and 3823 transitions. [2019-12-07 14:34:45,032 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:34:45,032 INFO L276 IsEmpty]: Start isEmpty. Operand 3167 states and 3823 transitions. [2019-12-07 14:34:45,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2019-12-07 14:34:45,035 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:34:45,035 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:34:45,035 INFO L410 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:34:45,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:34:45,035 INFO L82 PathProgramCache]: Analyzing trace with hash 1234049955, now seen corresponding path program 1 times [2019-12-07 14:34:45,036 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:34:45,036 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1908184866] [2019-12-07 14:34:45,036 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:34:45,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:34:45,233 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 2 proven. 44 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:34:45,233 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1908184866] [2019-12-07 14:34:45,233 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2107162064] [2019-12-07 14:34:45,233 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:34:45,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:34:45,344 INFO L264 TraceCheckSpWp]: Trace formula consists of 1076 conjuncts, 26 conjunts are in the unsatisfiable core [2019-12-07 14:34:45,346 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 14:34:45,591 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 6 proven. 40 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:34:45,591 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 14:34:45,591 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 23 [2019-12-07 14:34:45,591 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2108803976] [2019-12-07 14:34:45,592 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 14:34:45,592 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:34:45,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 14:34:45,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=475, Unknown=0, NotChecked=0, Total=552 [2019-12-07 14:34:45,592 INFO L87 Difference]: Start difference. First operand 3167 states and 3823 transitions. Second operand 24 states. [2019-12-07 14:34:56,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:34:56,782 INFO L93 Difference]: Finished difference Result 31432 states and 39494 transitions. [2019-12-07 14:34:56,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 231 states. [2019-12-07 14:34:56,783 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 263 [2019-12-07 14:34:56,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:34:56,801 INFO L225 Difference]: With dead ends: 31432 [2019-12-07 14:34:56,801 INFO L226 Difference]: Without dead ends: 28820 [2019-12-07 14:34:56,808 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 498 GetRequests, 252 SyntacticMatches, 0 SemanticMatches, 246 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24764 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=9015, Invalid=52241, Unknown=0, NotChecked=0, Total=61256 [2019-12-07 14:34:56,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28820 states. [2019-12-07 14:34:57,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28820 to 3155. [2019-12-07 14:34:57,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3155 states. [2019-12-07 14:34:57,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3155 states to 3155 states and 3811 transitions. [2019-12-07 14:34:57,278 INFO L78 Accepts]: Start accepts. Automaton has 3155 states and 3811 transitions. Word has length 263 [2019-12-07 14:34:57,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:34:57,278 INFO L462 AbstractCegarLoop]: Abstraction has 3155 states and 3811 transitions. [2019-12-07 14:34:57,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 14:34:57,278 INFO L276 IsEmpty]: Start isEmpty. Operand 3155 states and 3811 transitions. [2019-12-07 14:34:57,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2019-12-07 14:34:57,281 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:34:57,282 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:34:57,482 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:34:57,483 INFO L410 AbstractCegarLoop]: === Iteration 44 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:34:57,483 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:34:57,484 INFO L82 PathProgramCache]: Analyzing trace with hash 649278305, now seen corresponding path program 1 times [2019-12-07 14:34:57,484 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:34:57,484 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [338963316] [2019-12-07 14:34:57,484 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:34:57,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:34:57,566 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 164 trivial. 0 not checked. [2019-12-07 14:34:57,566 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [338963316] [2019-12-07 14:34:57,566 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:34:57,566 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:34:57,566 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1925820515] [2019-12-07 14:34:57,567 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:34:57,567 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:34:57,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:34:57,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:34:57,567 INFO L87 Difference]: Start difference. First operand 3155 states and 3811 transitions. Second operand 3 states. [2019-12-07 14:34:57,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:34:57,791 INFO L93 Difference]: Finished difference Result 4439 states and 5375 transitions. [2019-12-07 14:34:57,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:34:57,791 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 263 [2019-12-07 14:34:57,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:34:57,793 INFO L225 Difference]: With dead ends: 4439 [2019-12-07 14:34:57,793 INFO L226 Difference]: Without dead ends: 1684 [2019-12-07 14:34:57,795 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:34:57,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1684 states. [2019-12-07 14:34:58,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1684 to 1684. [2019-12-07 14:34:58,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1684 states. [2019-12-07 14:34:58,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1684 states to 1684 states and 2002 transitions. [2019-12-07 14:34:58,007 INFO L78 Accepts]: Start accepts. Automaton has 1684 states and 2002 transitions. Word has length 263 [2019-12-07 14:34:58,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:34:58,008 INFO L462 AbstractCegarLoop]: Abstraction has 1684 states and 2002 transitions. [2019-12-07 14:34:58,008 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:34:58,008 INFO L276 IsEmpty]: Start isEmpty. Operand 1684 states and 2002 transitions. [2019-12-07 14:34:58,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2019-12-07 14:34:58,010 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:34:58,010 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:34:58,010 INFO L410 AbstractCegarLoop]: === Iteration 45 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:34:58,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:34:58,010 INFO L82 PathProgramCache]: Analyzing trace with hash -3824227, now seen corresponding path program 1 times [2019-12-07 14:34:58,010 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:34:58,010 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1835795880] [2019-12-07 14:34:58,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:34:58,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:34:58,282 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 2 proven. 32 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:34:58,282 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1835795880] [2019-12-07 14:34:58,282 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1735228186] [2019-12-07 14:34:58,282 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:34:58,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:34:58,390 INFO L264 TraceCheckSpWp]: Trace formula consists of 1075 conjuncts, 29 conjunts are in the unsatisfiable core [2019-12-07 14:34:58,393 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 14:34:58,624 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 9 proven. 25 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:34:58,625 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 14:34:58,625 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12] total 25 [2019-12-07 14:34:58,625 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [981192855] [2019-12-07 14:34:58,625 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-12-07 14:34:58,625 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:34:58,625 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 14:34:58,626 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=545, Unknown=0, NotChecked=0, Total=650 [2019-12-07 14:34:58,626 INFO L87 Difference]: Start difference. First operand 1684 states and 2002 transitions. Second operand 26 states. [2019-12-07 14:35:07,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:35:07,913 INFO L93 Difference]: Finished difference Result 16391 states and 20392 transitions. [2019-12-07 14:35:07,914 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 200 states. [2019-12-07 14:35:07,914 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 263 [2019-12-07 14:35:07,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:35:07,924 INFO L225 Difference]: With dead ends: 16391 [2019-12-07 14:35:07,924 INFO L226 Difference]: Without dead ends: 15110 [2019-12-07 14:35:07,927 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 469 GetRequests, 252 SyntacticMatches, 0 SemanticMatches, 217 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18423 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=7725, Invalid=40017, Unknown=0, NotChecked=0, Total=47742 [2019-12-07 14:35:07,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15110 states. [2019-12-07 14:35:08,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15110 to 2875. [2019-12-07 14:35:08,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2875 states. [2019-12-07 14:35:08,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2875 states to 2875 states and 3482 transitions. [2019-12-07 14:35:08,388 INFO L78 Accepts]: Start accepts. Automaton has 2875 states and 3482 transitions. Word has length 263 [2019-12-07 14:35:08,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:35:08,389 INFO L462 AbstractCegarLoop]: Abstraction has 2875 states and 3482 transitions. [2019-12-07 14:35:08,389 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-12-07 14:35:08,389 INFO L276 IsEmpty]: Start isEmpty. Operand 2875 states and 3482 transitions. [2019-12-07 14:35:08,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2019-12-07 14:35:08,392 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:35:08,392 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:35:08,592 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:35:08,593 INFO L410 AbstractCegarLoop]: === Iteration 46 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:35:08,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:35:08,593 INFO L82 PathProgramCache]: Analyzing trace with hash 1123777309, now seen corresponding path program 1 times [2019-12-07 14:35:08,594 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:35:08,594 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1586204487] [2019-12-07 14:35:08,594 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:35:08,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:35:08,774 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 6 proven. 28 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:35:08,774 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1586204487] [2019-12-07 14:35:08,774 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1828028397] [2019-12-07 14:35:08,774 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:35:08,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:35:08,888 INFO L264 TraceCheckSpWp]: Trace formula consists of 1075 conjuncts, 14 conjunts are in the unsatisfiable core [2019-12-07 14:35:08,891 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 14:35:08,988 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 6 proven. 28 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:35:08,988 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 14:35:08,988 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 9 [2019-12-07 14:35:08,988 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1715783924] [2019-12-07 14:35:08,989 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 14:35:08,989 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:35:08,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 14:35:08,989 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:35:08,989 INFO L87 Difference]: Start difference. First operand 2875 states and 3482 transitions. Second operand 9 states. [2019-12-07 14:35:11,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:35:11,961 INFO L93 Difference]: Finished difference Result 15397 states and 19114 transitions. [2019-12-07 14:35:11,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 14:35:11,962 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 263 [2019-12-07 14:35:11,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:35:11,970 INFO L225 Difference]: With dead ends: 15397 [2019-12-07 14:35:11,970 INFO L226 Difference]: Without dead ends: 13070 [2019-12-07 14:35:11,972 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 312 GetRequests, 270 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 503 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=340, Invalid=1382, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 14:35:11,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13070 states. [2019-12-07 14:35:12,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13070 to 3673. [2019-12-07 14:35:12,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3673 states. [2019-12-07 14:35:12,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3673 states to 3673 states and 4405 transitions. [2019-12-07 14:35:12,528 INFO L78 Accepts]: Start accepts. Automaton has 3673 states and 4405 transitions. Word has length 263 [2019-12-07 14:35:12,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:35:12,528 INFO L462 AbstractCegarLoop]: Abstraction has 3673 states and 4405 transitions. [2019-12-07 14:35:12,528 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 14:35:12,528 INFO L276 IsEmpty]: Start isEmpty. Operand 3673 states and 4405 transitions. [2019-12-07 14:35:12,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2019-12-07 14:35:12,532 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:35:12,532 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:35:12,733 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:35:12,733 INFO L410 AbstractCegarLoop]: === Iteration 47 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:35:12,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:35:12,734 INFO L82 PathProgramCache]: Analyzing trace with hash -678366836, now seen corresponding path program 1 times [2019-12-07 14:35:12,734 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:35:12,734 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [451163504] [2019-12-07 14:35:12,734 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:35:12,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:35:12,823 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 139 trivial. 0 not checked. [2019-12-07 14:35:12,824 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [451163504] [2019-12-07 14:35:12,824 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:35:12,824 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:35:12,824 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [426670109] [2019-12-07 14:35:12,824 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:35:12,824 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:35:12,824 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:35:12,825 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:35:12,825 INFO L87 Difference]: Start difference. First operand 3673 states and 4405 transitions. Second operand 7 states. [2019-12-07 14:35:14,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:35:14,188 INFO L93 Difference]: Finished difference Result 9472 states and 11708 transitions. [2019-12-07 14:35:14,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:35:14,188 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 264 [2019-12-07 14:35:14,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:35:14,192 INFO L225 Difference]: With dead ends: 9472 [2019-12-07 14:35:14,192 INFO L226 Difference]: Without dead ends: 6393 [2019-12-07 14:35:14,195 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:35:14,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6393 states. [2019-12-07 14:35:14,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6393 to 3901. [2019-12-07 14:35:14,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3901 states. [2019-12-07 14:35:14,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3901 states to 3901 states and 4693 transitions. [2019-12-07 14:35:14,778 INFO L78 Accepts]: Start accepts. Automaton has 3901 states and 4693 transitions. Word has length 264 [2019-12-07 14:35:14,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:35:14,778 INFO L462 AbstractCegarLoop]: Abstraction has 3901 states and 4693 transitions. [2019-12-07 14:35:14,778 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:35:14,778 INFO L276 IsEmpty]: Start isEmpty. Operand 3901 states and 4693 transitions. [2019-12-07 14:35:14,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2019-12-07 14:35:14,782 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:35:14,782 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:35:14,782 INFO L410 AbstractCegarLoop]: === Iteration 48 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:35:14,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:35:14,783 INFO L82 PathProgramCache]: Analyzing trace with hash 1412931105, now seen corresponding path program 1 times [2019-12-07 14:35:14,783 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:35:14,783 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1394354631] [2019-12-07 14:35:14,783 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:35:14,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:35:15,068 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 2 proven. 32 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:35:15,069 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1394354631] [2019-12-07 14:35:15,069 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1896015862] [2019-12-07 14:35:15,069 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:35:15,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:35:15,194 INFO L264 TraceCheckSpWp]: Trace formula consists of 1076 conjuncts, 28 conjunts are in the unsatisfiable core [2019-12-07 14:35:15,198 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 14:35:15,448 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 9 proven. 25 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 14:35:15,448 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 14:35:15,448 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12] total 25 [2019-12-07 14:35:15,448 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134533999] [2019-12-07 14:35:15,449 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-12-07 14:35:15,449 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:35:15,449 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 14:35:15,449 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=545, Unknown=0, NotChecked=0, Total=650 [2019-12-07 14:35:15,449 INFO L87 Difference]: Start difference. First operand 3901 states and 4693 transitions. Second operand 26 states. [2019-12-07 14:35:28,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:35:28,907 INFO L93 Difference]: Finished difference Result 33949 states and 42330 transitions. [2019-12-07 14:35:28,907 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 200 states. [2019-12-07 14:35:28,907 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 264 [2019-12-07 14:35:28,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:35:28,930 INFO L225 Difference]: With dead ends: 33949 [2019-12-07 14:35:28,930 INFO L226 Difference]: Without dead ends: 30642 [2019-12-07 14:35:28,937 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 470 GetRequests, 253 SyntacticMatches, 0 SemanticMatches, 217 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18257 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=7715, Invalid=40027, Unknown=0, NotChecked=0, Total=47742 [2019-12-07 14:35:28,952 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30642 states. [2019-12-07 14:35:29,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30642 to 3887. [2019-12-07 14:35:29,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3887 states. [2019-12-07 14:35:29,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3887 states to 3887 states and 4679 transitions. [2019-12-07 14:35:29,649 INFO L78 Accepts]: Start accepts. Automaton has 3887 states and 4679 transitions. Word has length 264 [2019-12-07 14:35:29,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:35:29,649 INFO L462 AbstractCegarLoop]: Abstraction has 3887 states and 4679 transitions. [2019-12-07 14:35:29,650 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-12-07 14:35:29,650 INFO L276 IsEmpty]: Start isEmpty. Operand 3887 states and 4679 transitions. [2019-12-07 14:35:29,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2019-12-07 14:35:29,654 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:35:29,654 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:35:29,854 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 14:35:29,855 INFO L410 AbstractCegarLoop]: === Iteration 49 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:35:29,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:35:29,855 INFO L82 PathProgramCache]: Analyzing trace with hash -2020202589, now seen corresponding path program 1 times [2019-12-07 14:35:29,856 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:35:29,856 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1257000405] [2019-12-07 14:35:29,856 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:35:29,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:35:29,926 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 150 trivial. 0 not checked. [2019-12-07 14:35:29,927 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1257000405] [2019-12-07 14:35:29,927 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:35:29,927 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:35:29,927 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1340595229] [2019-12-07 14:35:29,927 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:35:29,927 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:35:29,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:35:29,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:35:29,927 INFO L87 Difference]: Start difference. First operand 3887 states and 4679 transitions. Second operand 3 states. [2019-12-07 14:35:30,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:35:30,420 INFO L93 Difference]: Finished difference Result 6303 states and 7624 transitions. [2019-12-07 14:35:30,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:35:30,421 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 264 [2019-12-07 14:35:30,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:35:30,423 INFO L225 Difference]: With dead ends: 6303 [2019-12-07 14:35:30,423 INFO L226 Difference]: Without dead ends: 2807 [2019-12-07 14:35:30,425 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:35:30,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2807 states. [2019-12-07 14:35:30,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2807 to 2807. [2019-12-07 14:35:30,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2807 states. [2019-12-07 14:35:30,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2807 states to 2807 states and 3363 transitions. [2019-12-07 14:35:30,910 INFO L78 Accepts]: Start accepts. Automaton has 2807 states and 3363 transitions. Word has length 264 [2019-12-07 14:35:30,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:35:30,910 INFO L462 AbstractCegarLoop]: Abstraction has 2807 states and 3363 transitions. [2019-12-07 14:35:30,910 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:35:30,910 INFO L276 IsEmpty]: Start isEmpty. Operand 2807 states and 3363 transitions. [2019-12-07 14:35:30,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 267 [2019-12-07 14:35:30,913 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:35:30,913 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:35:30,914 INFO L410 AbstractCegarLoop]: === Iteration 50 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:35:30,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:35:30,914 INFO L82 PathProgramCache]: Analyzing trace with hash -1552575887, now seen corresponding path program 1 times [2019-12-07 14:35:30,914 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:35:30,914 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1642006650] [2019-12-07 14:35:30,914 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:35:30,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:35:30,988 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 139 trivial. 0 not checked. [2019-12-07 14:35:30,989 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1642006650] [2019-12-07 14:35:30,989 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:35:30,989 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:35:30,989 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1345195483] [2019-12-07 14:35:30,989 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:35:30,989 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:35:30,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:35:30,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:35:30,990 INFO L87 Difference]: Start difference. First operand 2807 states and 3363 transitions. Second operand 7 states. [2019-12-07 14:35:32,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:35:32,005 INFO L93 Difference]: Finished difference Result 6362 states and 7769 transitions. [2019-12-07 14:35:32,005 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 14:35:32,005 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 266 [2019-12-07 14:35:32,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:35:32,008 INFO L225 Difference]: With dead ends: 6362 [2019-12-07 14:35:32,008 INFO L226 Difference]: Without dead ends: 4069 [2019-12-07 14:35:32,009 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:35:32,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4069 states. [2019-12-07 14:35:32,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4069 to 2787. [2019-12-07 14:35:32,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2787 states. [2019-12-07 14:35:32,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2787 states to 2787 states and 3333 transitions. [2019-12-07 14:35:32,513 INFO L78 Accepts]: Start accepts. Automaton has 2787 states and 3333 transitions. Word has length 266 [2019-12-07 14:35:32,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:35:32,513 INFO L462 AbstractCegarLoop]: Abstraction has 2787 states and 3333 transitions. [2019-12-07 14:35:32,513 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:35:32,513 INFO L276 IsEmpty]: Start isEmpty. Operand 2787 states and 3333 transitions. [2019-12-07 14:35:32,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 271 [2019-12-07 14:35:32,516 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:35:32,516 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:35:32,516 INFO L410 AbstractCegarLoop]: === Iteration 51 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:35:32,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:35:32,517 INFO L82 PathProgramCache]: Analyzing trace with hash -972033510, now seen corresponding path program 1 times [2019-12-07 14:35:32,517 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:35:32,517 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2038969035] [2019-12-07 14:35:32,517 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:35:32,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:35:32,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:35:32,692 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 14:35:32,692 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:35:32,827 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:35:32 BoogieIcfgContainer [2019-12-07 14:35:32,828 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:35:32,828 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:35:32,828 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:35:32,828 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:35:32,828 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:33:09" (3/4) ... [2019-12-07 14:35:32,830 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:35:32,978 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_100bc206-4b16-4327-bd61-df51f7639610/bin/uautomizer/witness.graphml [2019-12-07 14:35:32,978 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:35:32,979 INFO L168 Benchmark]: Toolchain (without parser) took 144524.62 ms. Allocated memory was 1.0 GB in the beginning and 2.2 GB in the end (delta: 1.1 GB). Free memory was 946.2 MB in the beginning and 1.5 GB in the end (delta: -541.4 MB). Peak memory consumption was 604.7 MB. Max. memory is 11.5 GB. [2019-12-07 14:35:32,979 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:35:32,980 INFO L168 Benchmark]: CACSL2BoogieTranslator took 272.83 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 144.2 MB). Free memory was 946.2 MB in the beginning and 1.1 GB in the end (delta: -187.3 MB). Peak memory consumption was 24.5 MB. Max. memory is 11.5 GB. [2019-12-07 14:35:32,980 INFO L168 Benchmark]: Boogie Procedure Inliner took 51.47 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:35:32,980 INFO L168 Benchmark]: Boogie Preprocessor took 52.61 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:35:32,980 INFO L168 Benchmark]: RCFGBuilder took 832.95 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 979.8 MB in the end (delta: 143.0 MB). Peak memory consumption was 143.0 MB. Max. memory is 11.5 GB. [2019-12-07 14:35:32,980 INFO L168 Benchmark]: TraceAbstraction took 143161.68 ms. Allocated memory was 1.2 GB in the beginning and 2.2 GB in the end (delta: 1.0 GB). Free memory was 979.8 MB in the beginning and 1.5 GB in the end (delta: -565.5 MB). Peak memory consumption was 436.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:35:32,981 INFO L168 Benchmark]: Witness Printer took 150.09 ms. Allocated memory is still 2.2 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 57.7 MB). Peak memory consumption was 57.7 MB. Max. memory is 11.5 GB. [2019-12-07 14:35:32,982 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 272.83 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 144.2 MB). Free memory was 946.2 MB in the beginning and 1.1 GB in the end (delta: -187.3 MB). Peak memory consumption was 24.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 51.47 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 52.61 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 832.95 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 979.8 MB in the end (delta: 143.0 MB). Peak memory consumption was 143.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 143161.68 ms. Allocated memory was 1.2 GB in the beginning and 2.2 GB in the end (delta: 1.0 GB). Free memory was 979.8 MB in the beginning and 1.5 GB in the end (delta: -565.5 MB). Peak memory consumption was 436.4 MB. Max. memory is 11.5 GB. * Witness Printer took 150.09 ms. Allocated memory is still 2.2 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 57.7 MB). Peak memory consumption was 57.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 580]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L68] msg_t nomsg = (msg_t )-1; [L69] port_t g1v ; [L70] int8_t g1v_old ; [L71] int8_t g1v_new ; [L72] port_t g2v ; [L73] int8_t g2v_old ; [L74] int8_t g2v_new ; [L75] port_t g3v ; [L76] int8_t g3v_old ; [L77] int8_t g3v_new ; [L81] _Bool gate1Failed ; [L82] _Bool gate2Failed ; [L83] _Bool gate3Failed ; [L84] msg_t VALUE1 ; [L85] msg_t VALUE2 ; [L86] msg_t VALUE3 ; [L88] _Bool gate1Failed_History_0 ; [L89] _Bool gate1Failed_History_1 ; [L90] _Bool gate1Failed_History_2 ; [L91] _Bool gate2Failed_History_0 ; [L92] _Bool gate2Failed_History_1 ; [L93] _Bool gate2Failed_History_2 ; [L94] _Bool gate3Failed_History_0 ; [L95] _Bool gate3Failed_History_1 ; [L96] _Bool gate3Failed_History_2 ; [L97] int8_t votedValue_History_0 ; [L98] int8_t votedValue_History_1 ; [L99] int8_t votedValue_History_2 ; [L519] void (*nodes[4])(void) = { & gate1_each_pals_period, & gate2_each_pals_period, & gate3_each_pals_period, & voter}; VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=0, votedValue_History_1=0, votedValue_History_2=0] [L522] int c1 ; [L523] int i2 ; [L526] c1 = 0 [L527] gate1Failed = __VERIFIER_nondet_bool() [L528] gate2Failed = __VERIFIER_nondet_bool() [L529] gate3Failed = __VERIFIER_nondet_bool() [L530] VALUE1 = __VERIFIER_nondet_char() [L531] VALUE2 = __VERIFIER_nondet_char() [L532] VALUE3 = __VERIFIER_nondet_char() [L533] gate1Failed_History_0 = __VERIFIER_nondet_bool() [L534] gate1Failed_History_1 = __VERIFIER_nondet_bool() [L535] gate1Failed_History_2 = __VERIFIER_nondet_bool() [L536] gate2Failed_History_0 = __VERIFIER_nondet_bool() [L537] gate2Failed_History_1 = __VERIFIER_nondet_bool() [L538] gate2Failed_History_2 = __VERIFIER_nondet_bool() [L539] gate3Failed_History_0 = __VERIFIER_nondet_bool() [L540] gate3Failed_History_1 = __VERIFIER_nondet_bool() [L541] gate3Failed_History_2 = __VERIFIER_nondet_bool() [L542] votedValue_History_0 = __VERIFIER_nondet_char() [L543] votedValue_History_1 = __VERIFIER_nondet_char() [L544] votedValue_History_2 = __VERIFIER_nondet_char() [L248] int tmp ; [L249] int tmp___0 ; [L250] int tmp___1 ; [L251] int tmp___2 ; [L104] _Bool ini_bool ; [L105] int8_t ini_int ; [L106] int var ; [L107] int tmp ; [L108] int tmp___0 ; [L109] int tmp___1 ; [L110] int tmp___2 ; [L113] ini_bool = (_Bool)0 [L114] ini_int = (int8_t )-2 [L115] var = 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND TRUE history_id == 0 [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L172] COND TRUE historyIndex == 0 [L173] return (gate1Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L118] tmp = (int )read_history_bool(0, 0) [L119] COND FALSE !(! (tmp == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND TRUE history_id == 0 [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L172] COND TRUE historyIndex == 0 [L173] return (gate1Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L118] tmp = (int )read_history_bool(0, 0) [L119] COND FALSE !(! (tmp == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND TRUE history_id == 0 [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L172] COND TRUE historyIndex == 0 [L173] return (gate1Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L118] tmp = (int )read_history_bool(0, 0) [L119] COND FALSE !(! (tmp == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND FALSE !(var < 3) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L143] return (1); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L254] tmp = add_history_type(0) [L255] COND FALSE !(! tmp) [L104] _Bool ini_bool ; [L105] int8_t ini_int ; [L106] int var ; [L107] int tmp ; [L108] int tmp___0 ; [L109] int tmp___1 ; [L110] int tmp___2 ; [L113] ini_bool = (_Bool)0 [L114] ini_int = (int8_t )-2 [L115] var = 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND TRUE history_id == 1 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND TRUE history_id == 1 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L182] COND TRUE historyIndex == 0 [L183] return (gate2Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L124] tmp___0 = (int )read_history_bool(1, 0) [L125] COND FALSE !(! (tmp___0 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND TRUE history_id == 1 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND TRUE history_id == 1 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L182] COND TRUE historyIndex == 0 [L183] return (gate2Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L124] tmp___0 = (int )read_history_bool(1, 0) [L125] COND FALSE !(! (tmp___0 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND TRUE history_id == 1 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND TRUE history_id == 1 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L182] COND TRUE historyIndex == 0 [L183] return (gate2Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L124] tmp___0 = (int )read_history_bool(1, 0) [L125] COND FALSE !(! (tmp___0 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND FALSE !(var < 3) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L143] return (1); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L258] tmp___0 = add_history_type(1) [L259] COND FALSE !(! tmp___0) [L104] _Bool ini_bool ; [L105] int8_t ini_int ; [L106] int var ; [L107] int tmp ; [L108] int tmp___0 ; [L109] int tmp___1 ; [L110] int tmp___2 ; [L113] ini_bool = (_Bool)0 [L114] ini_int = (int8_t )-2 [L115] var = 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND TRUE history_id == 2 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L191] COND TRUE history_id == 2 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L192] COND TRUE historyIndex == 0 [L193] return (gate3Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L130] tmp___1 = (int )read_history_bool(2, 0) [L131] COND FALSE !(! (tmp___1 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND TRUE history_id == 2 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L191] COND TRUE history_id == 2 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L192] COND TRUE historyIndex == 0 [L193] return (gate3Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L130] tmp___1 = (int )read_history_bool(2, 0) [L131] COND FALSE !(! (tmp___1 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND TRUE history_id == 2 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L191] COND TRUE history_id == 2 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L192] COND TRUE historyIndex == 0 [L193] return (gate3Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L130] tmp___1 = (int )read_history_bool(2, 0) [L131] COND FALSE !(! (tmp___1 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND FALSE !(var < 3) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L143] return (1); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L262] tmp___1 = add_history_type(2) [L263] COND FALSE !(! tmp___1) [L104] _Bool ini_bool ; [L105] int8_t ini_int ; [L106] int var ; [L107] int tmp ; [L108] int tmp___0 ; [L109] int tmp___1 ; [L110] int tmp___2 ; [L113] ini_bool = (_Bool)0 [L114] ini_int = (int8_t )-2 [L115] var = 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND FALSE !(history_id == 2) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L135] COND TRUE history_id == 3 [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L136] tmp___2 = (int )read_history_int8(3, 0) [L137] COND FALSE !(! (tmp___2 == (int )ini_int)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND FALSE !(history_id == 2) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L135] COND TRUE history_id == 3 [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L136] tmp___2 = (int )read_history_int8(3, 0) [L137] COND FALSE !(! (tmp___2 == (int )ini_int)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND FALSE !(history_id == 2) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L135] COND TRUE history_id == 3 [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L136] tmp___2 = (int )read_history_int8(3, 0) [L137] COND FALSE !(! (tmp___2 == (int )ini_int)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND FALSE !(var < 3) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L143] return (1); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L266] tmp___2 = add_history_type(3) [L267] COND FALSE !(! tmp___2) [L270] return (1); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L545] i2 = init() [L547] g1v_old = nomsg [L548] g1v_new = nomsg [L549] g2v_old = nomsg [L550] g2v_new = nomsg [L551] g3v_old = nomsg [L552] g3v_new = nomsg [L553] i2 = 0 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L554] COND TRUE 1 [L383] int8_t next_state ; [L384] msg_t tmp ; [L385] int tmp___0 ; [L388] gate1Failed = __VERIFIER_nondet_bool() [L226] COND TRUE history_id == 0 [L227] gate1Failed_History_2 = gate1Failed_History_1 [L228] gate1Failed_History_1 = gate1Failed_History_0 [L229] gate1Failed_History_0 = buf VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L390] COND TRUE \read(gate1Failed) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L391] EXPR nomsg != nomsg && g1v_new == nomsg ? nomsg : g1v_new VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L391] g1v_new = nomsg != nomsg && g1v_new == nomsg ? nomsg : g1v_new [L414] int8_t next_state ; [L415] msg_t tmp ; [L416] int tmp___0 ; [L419] gate2Failed = __VERIFIER_nondet_bool() [L226] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L231] COND TRUE history_id == 1 [L232] gate2Failed_History_2 = gate2Failed_History_1 [L233] gate2Failed_History_1 = gate2Failed_History_0 [L234] gate2Failed_History_0 = buf VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L421] COND TRUE \read(gate2Failed) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L422] EXPR nomsg != nomsg && g2v_new == nomsg ? nomsg : g2v_new VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L422] g2v_new = nomsg != nomsg && g2v_new == nomsg ? nomsg : g2v_new [L445] int8_t next_state ; [L446] msg_t tmp ; [L447] int tmp___0 ; [L450] gate3Failed = __VERIFIER_nondet_bool() [L226] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L231] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L236] COND TRUE history_id == 2 [L237] gate3Failed_History_2 = gate3Failed_History_1 [L238] gate3Failed_History_1 = gate3Failed_History_0 [L239] gate3Failed_History_0 = buf VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L452] COND FALSE !(\read(gate3Failed)) [L456] tmp = __VERIFIER_nondet_char() [L457] next_state = tmp VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L458] COND TRUE (int )next_state == 0 [L459] tmp___0 = 1 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L470] EXPR next_state != nomsg && g3v_new == nomsg ? next_state : g3v_new VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L470] g3v_new = next_state != nomsg && g3v_new == nomsg ? next_state : g3v_new [L476] int8_t voted_value ; [L479] voted_value = nomsg [L480] VALUE1 = g1v_old [L481] g1v_old = nomsg [L482] VALUE2 = g2v_old [L483] g2v_old = nomsg [L484] VALUE3 = g3v_old [L485] g3v_old = nomsg VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=0, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L486] COND TRUE (int )VALUE1 == (int )VALUE2 [L487] voted_value = VALUE1 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=0, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L211] COND TRUE history_id == 3 [L212] votedValue_History_2 = votedValue_History_1 [L213] votedValue_History_1 = votedValue_History_0 [L214] votedValue_History_0 = buf VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=0, g3v_old=-1, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L560] g1v_old = g1v_new [L561] g1v_new = nomsg [L562] g2v_old = g2v_new [L563] g2v_new = nomsg [L564] g3v_old = g3v_new [L565] g3v_new = nomsg [L275] int tmp ; [L276] int temp_count ; [L277] int8_t tmp___0 ; [L278] int8_t tmp___1 ; [L279] int8_t tmp___2 ; [L280] _Bool tmp___3 ; [L281] _Bool tmp___4 ; [L282] _Bool tmp___5 ; [L283] int8_t tmp___6 ; [L284] _Bool tmp___7 ; [L285] _Bool tmp___8 ; [L286] _Bool tmp___9 ; [L287] int8_t tmp___10 ; [L288] int8_t tmp___11 ; [L289] int8_t tmp___12 ; [L290] int8_t tmp___13 ; [L291] int8_t tmp___14 ; VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L294] COND FALSE !(! gate1Failed) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L297] COND FALSE !(! gate2Failed) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L300] COND TRUE ! gate3Failed [L301] tmp = 1 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L172] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L175] COND TRUE historyIndex == 1 [L176] return (gate1Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L306] tmp___3 = read_history_bool(0, 1) [L307] COND TRUE ! tmp___3 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L181] COND TRUE history_id == 1 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L182] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L185] COND TRUE historyIndex == 1 [L186] return (gate2Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L308] tmp___4 = read_history_bool(1, 1) [L309] COND TRUE ! tmp___4 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L181] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L191] COND TRUE history_id == 2 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L192] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L195] COND TRUE historyIndex == 1 [L196] return (gate3Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L310] tmp___5 = read_history_bool(2, 1) [L311] COND TRUE ! tmp___5 [L312] temp_count = 0 [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L313] tmp___0 = read_history_int8(3, 0) [L314] COND TRUE (int )VALUE1 == (int )tmp___0 [L315] temp_count ++ VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L317] tmp___1 = read_history_int8(3, 0) [L318] COND TRUE (int )VALUE2 == (int )tmp___1 [L319] temp_count ++ VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L321] tmp___2 = read_history_int8(3, 0) [L322] COND TRUE (int )VALUE3 == (int )tmp___2 [L323] temp_count ++ VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L325] COND FALSE !((int )VALUE1 != (int )VALUE2) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L339] COND FALSE !(! (temp_count > 1)) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L152] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L155] COND TRUE historyIndex == 1 [L156] return (votedValue_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L345] tmp___10 = read_history_int8(3, 1) [L346] COND FALSE !((int )tmp___10 > -2) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L365] tmp___11 = read_history_int8(3, 0) [L366] COND FALSE !((int )tmp___11 != (int )nomsg) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L378] return (1); VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L566] c1 = check() [L578] COND FALSE !(! arg) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=1, gate1Failed_History_0=1, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L554] COND TRUE 1 [L383] int8_t next_state ; [L384] msg_t tmp ; [L385] int tmp___0 ; [L388] gate1Failed = __VERIFIER_nondet_bool() [L226] COND TRUE history_id == 0 [L227] gate1Failed_History_2 = gate1Failed_History_1 [L228] gate1Failed_History_1 = gate1Failed_History_0 [L229] gate1Failed_History_0 = buf VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L390] COND FALSE !(\read(gate1Failed)) [L394] tmp = __VERIFIER_nondet_char() [L395] next_state = tmp VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L396] COND TRUE (int )next_state == 0 [L397] tmp___0 = 1 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L408] EXPR next_state != nomsg && g1v_new == nomsg ? next_state : g1v_new VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L408] g1v_new = next_state != nomsg && g1v_new == nomsg ? next_state : g1v_new [L414] int8_t next_state ; [L415] msg_t tmp ; [L416] int tmp___0 ; [L419] gate2Failed = __VERIFIER_nondet_bool() [L226] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L231] COND TRUE history_id == 1 [L232] gate2Failed_History_2 = gate2Failed_History_1 [L233] gate2Failed_History_1 = gate2Failed_History_0 [L234] gate2Failed_History_0 = buf VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L421] COND TRUE \read(gate2Failed) VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L422] EXPR nomsg != nomsg && g2v_new == nomsg ? nomsg : g2v_new VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L422] g2v_new = nomsg != nomsg && g2v_new == nomsg ? nomsg : g2v_new [L445] int8_t next_state ; [L446] msg_t tmp ; [L447] int tmp___0 ; [L450] gate3Failed = __VERIFIER_nondet_bool() [L226] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L231] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L236] COND TRUE history_id == 2 [L237] gate3Failed_History_2 = gate3Failed_History_1 [L238] gate3Failed_History_1 = gate3Failed_History_0 [L239] gate3Failed_History_0 = buf VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L452] COND TRUE \read(gate3Failed) VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L453] EXPR nomsg != nomsg && g3v_new == nomsg ? nomsg : g3v_new VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L453] g3v_new = nomsg != nomsg && g3v_new == nomsg ? nomsg : g3v_new [L476] int8_t voted_value ; [L479] voted_value = nomsg [L480] VALUE1 = g1v_old [L481] g1v_old = nomsg [L482] VALUE2 = g2v_old [L483] g2v_old = nomsg [L484] VALUE3 = g3v_old [L485] g3v_old = nomsg VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L486] COND TRUE (int )VALUE1 == (int )VALUE2 [L487] voted_value = VALUE1 VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L211] COND TRUE history_id == 3 [L212] votedValue_History_2 = votedValue_History_1 [L213] votedValue_History_1 = votedValue_History_0 [L214] votedValue_History_0 = buf VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L560] g1v_old = g1v_new [L561] g1v_new = nomsg [L562] g2v_old = g2v_new [L563] g2v_new = nomsg [L564] g3v_old = g3v_new [L565] g3v_new = nomsg [L275] int tmp ; [L276] int temp_count ; [L277] int8_t tmp___0 ; [L278] int8_t tmp___1 ; [L279] int8_t tmp___2 ; [L280] _Bool tmp___3 ; [L281] _Bool tmp___4 ; [L282] _Bool tmp___5 ; [L283] int8_t tmp___6 ; [L284] _Bool tmp___7 ; [L285] _Bool tmp___8 ; [L286] _Bool tmp___9 ; [L287] int8_t tmp___10 ; [L288] int8_t tmp___11 ; [L289] int8_t tmp___12 ; [L290] int8_t tmp___13 ; [L291] int8_t tmp___14 ; VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L294] COND TRUE ! gate1Failed [L295] tmp = 1 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L172] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L175] COND TRUE historyIndex == 1 [L176] return (gate1Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L306] tmp___3 = read_history_bool(0, 1) [L307] COND FALSE !(! tmp___3) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L152] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L155] COND TRUE historyIndex == 1 [L156] return (votedValue_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L345] tmp___10 = read_history_int8(3, 1) [L346] COND TRUE (int )tmp___10 > -2 [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L347] tmp___6 = read_history_int8(3, 0) [L348] COND TRUE (int )tmp___6 == (int )nomsg [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L172] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L175] COND TRUE historyIndex == 1 [L176] return (gate1Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L349] tmp___7 = read_history_bool(0, 1) [L350] COND TRUE \read(tmp___7) [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L181] COND TRUE history_id == 1 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L182] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L185] COND TRUE historyIndex == 1 [L186] return (gate2Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L351] tmp___8 = read_history_bool(1, 1) [L352] COND TRUE \read(tmp___8) [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L181] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L191] COND TRUE history_id == 2 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L192] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L195] COND TRUE historyIndex == 1 [L196] return (gate3Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L353] tmp___9 = read_history_bool(2, 1) [L354] COND TRUE ! tmp___9 [L355] return (0); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L566] c1 = check() [L578] COND TRUE ! arg VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] [L580] __VERIFIER_error() VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=1, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=1, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-1, votedValue_History_2=-2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 514 locations, 37 error locations. Result: UNSAFE, OverallTime: 142.9s, OverallIterations: 51, TraceHistogramMax: 3, AutomataDifference: 125.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 30394 SDtfs, 53152 SDslu, 168055 SDs, 0 SdLazy, 53751 SolverSat, 1581 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 27.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5186 GetRequests, 2681 SyntacticMatches, 3 SemanticMatches, 2502 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 565971 ImplicationChecksByTransitivity, 61.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=3901occurred in iteration=47, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 6.7s AutomataMinimizationTime, 50 MinimizatonAttempts, 151656 StatesRemovedByMinimization, 43 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.4s SsaConstructionTime, 1.3s SatisfiabilityAnalysisTime, 4.3s InterpolantComputationTime, 10296 NumberOfCodeBlocks, 10296 NumberOfCodeBlocksAsserted, 63 NumberOfCheckSat, 9964 ConstructedInterpolants, 0 QuantifiedInterpolants, 7369463 SizeOfPredicates, 81 NumberOfNonLiveVariables, 11006 ConjunctsInSsa, 205 ConjunctsInUnsatCore, 62 InterpolantComputations, 39 PerfectInterpolantSequences, 5198/5759 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...