./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_Triplicated.2.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_Triplicated.2.ufo.UNBOUNDED.pals.c -s /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 077fe0fcd97be15aa2e10e89ce167f8b22d1af7e ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:48:17,050 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:48:17,051 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:48:17,059 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:48:17,059 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:48:17,060 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:48:17,061 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:48:17,062 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:48:17,063 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:48:17,064 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:48:17,064 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:48:17,065 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:48:17,065 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:48:17,066 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:48:17,067 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:48:17,068 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:48:17,068 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:48:17,069 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:48:17,070 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:48:17,072 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:48:17,073 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:48:17,074 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:48:17,075 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:48:17,075 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:48:17,077 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:48:17,077 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:48:17,077 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:48:17,078 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:48:17,078 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:48:17,079 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:48:17,079 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:48:17,079 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:48:17,080 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:48:17,080 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:48:17,081 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:48:17,081 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:48:17,081 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:48:17,081 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:48:17,082 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:48:17,082 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:48:17,083 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:48:17,083 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:48:17,092 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:48:17,092 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:48:17,093 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:48:17,093 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:48:17,093 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:48:17,093 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:48:17,094 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:48:17,094 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:48:17,094 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:48:17,094 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:48:17,094 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:48:17,094 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:48:17,094 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:48:17,094 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:48:17,094 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:48:17,095 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:48:17,095 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:48:17,095 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:48:17,095 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:48:17,095 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:48:17,095 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:48:17,095 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:48:17,096 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:48:17,096 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:48:17,096 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:48:17,096 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:48:17,096 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:48:17,096 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:48:17,096 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:48:17,096 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 077fe0fcd97be15aa2e10e89ce167f8b22d1af7e [2019-12-07 17:48:17,203 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:48:17,211 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:48:17,213 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:48:17,214 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:48:17,214 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:48:17,215 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_Triplicated.2.ufo.UNBOUNDED.pals.c [2019-12-07 17:48:17,258 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/data/806966e91/7f520ba3c5154897ae75bc82859b7474/FLAG1582a0e71 [2019-12-07 17:48:17,614 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:48:17,615 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_Triplicated.2.ufo.UNBOUNDED.pals.c [2019-12-07 17:48:17,622 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/data/806966e91/7f520ba3c5154897ae75bc82859b7474/FLAG1582a0e71 [2019-12-07 17:48:18,024 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/data/806966e91/7f520ba3c5154897ae75bc82859b7474 [2019-12-07 17:48:18,027 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:48:18,028 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:48:18,029 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:48:18,029 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:48:18,032 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:48:18,033 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:48:18" (1/1) ... [2019-12-07 17:48:18,036 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4f2f5a3c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:18, skipping insertion in model container [2019-12-07 17:48:18,036 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:48:18" (1/1) ... [2019-12-07 17:48:18,042 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:48:18,073 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:48:18,255 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:48:18,261 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:48:18,301 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:48:18,312 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:48:18,313 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:18 WrapperNode [2019-12-07 17:48:18,313 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:48:18,313 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:48:18,313 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:48:18,313 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:48:18,318 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:18" (1/1) ... [2019-12-07 17:48:18,327 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:18" (1/1) ... [2019-12-07 17:48:18,365 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:48:18,366 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:48:18,366 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:48:18,366 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:48:18,372 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:18" (1/1) ... [2019-12-07 17:48:18,372 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:18" (1/1) ... [2019-12-07 17:48:18,378 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:18" (1/1) ... [2019-12-07 17:48:18,378 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:18" (1/1) ... [2019-12-07 17:48:18,398 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:18" (1/1) ... [2019-12-07 17:48:18,415 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:18" (1/1) ... [2019-12-07 17:48:18,419 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:18" (1/1) ... [2019-12-07 17:48:18,427 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:48:18,428 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:48:18,428 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:48:18,428 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:48:18,429 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:18" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:48:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:48:18,476 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:48:19,235 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:48:19,235 INFO L287 CfgBuilder]: Removed 173 assume(true) statements. [2019-12-07 17:48:19,236 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:48:19 BoogieIcfgContainer [2019-12-07 17:48:19,236 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:48:19,237 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:48:19,237 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:48:19,239 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:48:19,239 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:48:18" (1/3) ... [2019-12-07 17:48:19,239 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@64ca7675 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:48:19, skipping insertion in model container [2019-12-07 17:48:19,239 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:18" (2/3) ... [2019-12-07 17:48:19,240 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@64ca7675 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:48:19, skipping insertion in model container [2019-12-07 17:48:19,240 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:48:19" (3/3) ... [2019-12-07 17:48:19,241 INFO L109 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_Triplicated.2.ufo.UNBOUNDED.pals.c [2019-12-07 17:48:19,248 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:48:19,253 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 37 error locations. [2019-12-07 17:48:19,260 INFO L249 AbstractCegarLoop]: Starting to check reachability of 37 error locations. [2019-12-07 17:48:19,280 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:48:19,280 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:48:19,280 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:48:19,280 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:48:19,281 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:48:19,281 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:48:19,281 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:48:19,281 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:48:19,303 INFO L276 IsEmpty]: Start isEmpty. Operand 513 states. [2019-12-07 17:48:19,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 17:48:19,308 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:19,308 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:19,309 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:19,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:19,313 INFO L82 PathProgramCache]: Analyzing trace with hash 595705480, now seen corresponding path program 1 times [2019-12-07 17:48:19,319 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:19,319 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2120752526] [2019-12-07 17:48:19,319 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:19,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:19,442 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:19,443 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2120752526] [2019-12-07 17:48:19,443 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:19,444 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:19,445 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [974445267] [2019-12-07 17:48:19,448 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:19,448 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:19,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:19,457 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:19,458 INFO L87 Difference]: Start difference. First operand 513 states. Second operand 3 states. [2019-12-07 17:48:19,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:19,626 INFO L93 Difference]: Finished difference Result 1221 states and 2018 transitions. [2019-12-07 17:48:19,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:19,628 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 17:48:19,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:19,643 INFO L225 Difference]: With dead ends: 1221 [2019-12-07 17:48:19,643 INFO L226 Difference]: Without dead ends: 710 [2019-12-07 17:48:19,647 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:19,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 710 states. [2019-12-07 17:48:19,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 710 to 449. [2019-12-07 17:48:19,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 449 states. [2019-12-07 17:48:19,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 449 states to 449 states and 703 transitions. [2019-12-07 17:48:19,704 INFO L78 Accepts]: Start accepts. Automaton has 449 states and 703 transitions. Word has length 9 [2019-12-07 17:48:19,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:19,705 INFO L462 AbstractCegarLoop]: Abstraction has 449 states and 703 transitions. [2019-12-07 17:48:19,705 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:19,705 INFO L276 IsEmpty]: Start isEmpty. Operand 449 states and 703 transitions. [2019-12-07 17:48:19,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2019-12-07 17:48:19,706 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:19,706 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:19,707 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:19,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:19,707 INFO L82 PathProgramCache]: Analyzing trace with hash -503954138, now seen corresponding path program 1 times [2019-12-07 17:48:19,708 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:19,708 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [838741727] [2019-12-07 17:48:19,708 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:19,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:19,741 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:19,741 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [838741727] [2019-12-07 17:48:19,742 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:19,742 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:19,742 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1174993208] [2019-12-07 17:48:19,743 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:19,743 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:19,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:19,743 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:19,744 INFO L87 Difference]: Start difference. First operand 449 states and 703 transitions. Second operand 3 states. [2019-12-07 17:48:19,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:19,793 INFO L93 Difference]: Finished difference Result 1107 states and 1719 transitions. [2019-12-07 17:48:19,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:19,793 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 10 [2019-12-07 17:48:19,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:19,798 INFO L225 Difference]: With dead ends: 1107 [2019-12-07 17:48:19,798 INFO L226 Difference]: Without dead ends: 660 [2019-12-07 17:48:19,800 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:19,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 660 states. [2019-12-07 17:48:19,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 660 to 416. [2019-12-07 17:48:19,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 416 states. [2019-12-07 17:48:19,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 416 states to 416 states and 645 transitions. [2019-12-07 17:48:19,818 INFO L78 Accepts]: Start accepts. Automaton has 416 states and 645 transitions. Word has length 10 [2019-12-07 17:48:19,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:19,818 INFO L462 AbstractCegarLoop]: Abstraction has 416 states and 645 transitions. [2019-12-07 17:48:19,818 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:19,818 INFO L276 IsEmpty]: Start isEmpty. Operand 416 states and 645 transitions. [2019-12-07 17:48:19,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:48:19,819 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:19,820 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:19,820 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:19,820 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:19,820 INFO L82 PathProgramCache]: Analyzing trace with hash -674152124, now seen corresponding path program 1 times [2019-12-07 17:48:19,821 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:19,821 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [299582371] [2019-12-07 17:48:19,821 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:19,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:19,856 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:19,856 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [299582371] [2019-12-07 17:48:19,857 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:19,857 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:19,857 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1046267126] [2019-12-07 17:48:19,857 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:19,857 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:19,858 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:19,858 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:19,858 INFO L87 Difference]: Start difference. First operand 416 states and 645 transitions. Second operand 3 states. [2019-12-07 17:48:19,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:19,902 INFO L93 Difference]: Finished difference Result 1226 states and 1906 transitions. [2019-12-07 17:48:19,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:19,903 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 17:48:19,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:19,906 INFO L225 Difference]: With dead ends: 1226 [2019-12-07 17:48:19,906 INFO L226 Difference]: Without dead ends: 820 [2019-12-07 17:48:19,907 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:19,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 820 states. [2019-12-07 17:48:19,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 820 to 420. [2019-12-07 17:48:19,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 420 states. [2019-12-07 17:48:19,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 420 states to 420 states and 649 transitions. [2019-12-07 17:48:19,930 INFO L78 Accepts]: Start accepts. Automaton has 420 states and 649 transitions. Word has length 13 [2019-12-07 17:48:19,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:19,931 INFO L462 AbstractCegarLoop]: Abstraction has 420 states and 649 transitions. [2019-12-07 17:48:19,931 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:19,931 INFO L276 IsEmpty]: Start isEmpty. Operand 420 states and 649 transitions. [2019-12-07 17:48:19,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 17:48:19,932 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:19,932 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:19,932 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:19,933 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:19,933 INFO L82 PathProgramCache]: Analyzing trace with hash 1826556945, now seen corresponding path program 1 times [2019-12-07 17:48:19,933 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:19,934 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [776391876] [2019-12-07 17:48:19,934 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:19,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:19,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:19,962 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [776391876] [2019-12-07 17:48:19,962 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:19,962 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:19,962 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1206086366] [2019-12-07 17:48:19,963 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:19,963 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:19,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:19,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:19,963 INFO L87 Difference]: Start difference. First operand 420 states and 649 transitions. Second operand 3 states. [2019-12-07 17:48:19,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:19,980 INFO L93 Difference]: Finished difference Result 655 states and 1006 transitions. [2019-12-07 17:48:19,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:19,980 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2019-12-07 17:48:19,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:19,983 INFO L225 Difference]: With dead ends: 655 [2019-12-07 17:48:19,983 INFO L226 Difference]: Without dead ends: 420 [2019-12-07 17:48:19,984 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:19,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 420 states. [2019-12-07 17:48:19,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 420 to 420. [2019-12-07 17:48:19,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 420 states. [2019-12-07 17:48:19,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 420 states to 420 states and 645 transitions. [2019-12-07 17:48:19,992 INFO L78 Accepts]: Start accepts. Automaton has 420 states and 645 transitions. Word has length 17 [2019-12-07 17:48:19,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:19,992 INFO L462 AbstractCegarLoop]: Abstraction has 420 states and 645 transitions. [2019-12-07 17:48:19,992 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:19,992 INFO L276 IsEmpty]: Start isEmpty. Operand 420 states and 645 transitions. [2019-12-07 17:48:19,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:48:19,992 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:19,993 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:19,993 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:19,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:19,993 INFO L82 PathProgramCache]: Analyzing trace with hash -35486156, now seen corresponding path program 1 times [2019-12-07 17:48:19,993 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:19,993 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356114029] [2019-12-07 17:48:19,993 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:20,022 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:20,022 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [356114029] [2019-12-07 17:48:20,022 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:20,022 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:48:20,023 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1786054568] [2019-12-07 17:48:20,023 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:48:20,023 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:20,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:48:20,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:48:20,024 INFO L87 Difference]: Start difference. First operand 420 states and 645 transitions. Second operand 4 states. [2019-12-07 17:48:20,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:20,066 INFO L93 Difference]: Finished difference Result 1069 states and 1637 transitions. [2019-12-07 17:48:20,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:48:20,066 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2019-12-07 17:48:20,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:20,069 INFO L225 Difference]: With dead ends: 1069 [2019-12-07 17:48:20,069 INFO L226 Difference]: Without dead ends: 661 [2019-12-07 17:48:20,070 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:20,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 661 states. [2019-12-07 17:48:20,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 661 to 420. [2019-12-07 17:48:20,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 420 states. [2019-12-07 17:48:20,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 420 states to 420 states and 644 transitions. [2019-12-07 17:48:20,079 INFO L78 Accepts]: Start accepts. Automaton has 420 states and 644 transitions. Word has length 18 [2019-12-07 17:48:20,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:20,079 INFO L462 AbstractCegarLoop]: Abstraction has 420 states and 644 transitions. [2019-12-07 17:48:20,079 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:48:20,079 INFO L276 IsEmpty]: Start isEmpty. Operand 420 states and 644 transitions. [2019-12-07 17:48:20,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 17:48:20,080 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:20,080 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:20,080 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:20,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:20,080 INFO L82 PathProgramCache]: Analyzing trace with hash 1967275947, now seen corresponding path program 1 times [2019-12-07 17:48:20,080 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:20,081 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2065853528] [2019-12-07 17:48:20,081 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:20,103 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 17:48:20,104 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2065853528] [2019-12-07 17:48:20,104 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:20,104 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:20,104 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [742010086] [2019-12-07 17:48:20,104 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:20,104 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:20,105 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:20,105 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,105 INFO L87 Difference]: Start difference. First operand 420 states and 644 transitions. Second operand 3 states. [2019-12-07 17:48:20,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:20,173 INFO L93 Difference]: Finished difference Result 1011 states and 1539 transitions. [2019-12-07 17:48:20,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:20,173 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 17:48:20,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:20,176 INFO L225 Difference]: With dead ends: 1011 [2019-12-07 17:48:20,176 INFO L226 Difference]: Without dead ends: 606 [2019-12-07 17:48:20,177 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 606 states. [2019-12-07 17:48:20,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 606 to 375. [2019-12-07 17:48:20,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 375 states. [2019-12-07 17:48:20,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 375 states to 375 states and 564 transitions. [2019-12-07 17:48:20,185 INFO L78 Accepts]: Start accepts. Automaton has 375 states and 564 transitions. Word has length 21 [2019-12-07 17:48:20,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:20,185 INFO L462 AbstractCegarLoop]: Abstraction has 375 states and 564 transitions. [2019-12-07 17:48:20,185 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:20,185 INFO L276 IsEmpty]: Start isEmpty. Operand 375 states and 564 transitions. [2019-12-07 17:48:20,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 17:48:20,185 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:20,185 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:20,186 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:20,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:20,186 INFO L82 PathProgramCache]: Analyzing trace with hash -385095713, now seen corresponding path program 1 times [2019-12-07 17:48:20,186 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:20,186 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [125798991] [2019-12-07 17:48:20,186 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:20,205 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 17:48:20,206 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [125798991] [2019-12-07 17:48:20,206 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:20,206 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:20,206 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [234141147] [2019-12-07 17:48:20,206 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:20,206 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:20,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:20,206 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,207 INFO L87 Difference]: Start difference. First operand 375 states and 564 transitions. Second operand 3 states. [2019-12-07 17:48:20,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:20,244 INFO L93 Difference]: Finished difference Result 932 states and 1401 transitions. [2019-12-07 17:48:20,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:20,244 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 17:48:20,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:20,247 INFO L225 Difference]: With dead ends: 932 [2019-12-07 17:48:20,248 INFO L226 Difference]: Without dead ends: 572 [2019-12-07 17:48:20,249 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 572 states. [2019-12-07 17:48:20,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 572 to 349. [2019-12-07 17:48:20,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 349 states. [2019-12-07 17:48:20,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 349 states to 349 states and 518 transitions. [2019-12-07 17:48:20,259 INFO L78 Accepts]: Start accepts. Automaton has 349 states and 518 transitions. Word has length 21 [2019-12-07 17:48:20,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:20,259 INFO L462 AbstractCegarLoop]: Abstraction has 349 states and 518 transitions. [2019-12-07 17:48:20,259 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:20,260 INFO L276 IsEmpty]: Start isEmpty. Operand 349 states and 518 transitions. [2019-12-07 17:48:20,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 17:48:20,260 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:20,260 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:20,261 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:20,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:20,261 INFO L82 PathProgramCache]: Analyzing trace with hash 2032684668, now seen corresponding path program 1 times [2019-12-07 17:48:20,261 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:20,261 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [215880597] [2019-12-07 17:48:20,262 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:20,294 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 17:48:20,295 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [215880597] [2019-12-07 17:48:20,295 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:20,295 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:48:20,295 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1504251508] [2019-12-07 17:48:20,295 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:48:20,296 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:20,296 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:48:20,296 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:48:20,296 INFO L87 Difference]: Start difference. First operand 349 states and 518 transitions. Second operand 4 states. [2019-12-07 17:48:20,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:20,331 INFO L93 Difference]: Finished difference Result 893 states and 1332 transitions. [2019-12-07 17:48:20,331 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:48:20,331 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 17:48:20,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:20,333 INFO L225 Difference]: With dead ends: 893 [2019-12-07 17:48:20,334 INFO L226 Difference]: Without dead ends: 570 [2019-12-07 17:48:20,334 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:20,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 570 states. [2019-12-07 17:48:20,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 570 to 349. [2019-12-07 17:48:20,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 349 states. [2019-12-07 17:48:20,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 349 states to 349 states and 517 transitions. [2019-12-07 17:48:20,342 INFO L78 Accepts]: Start accepts. Automaton has 349 states and 517 transitions. Word has length 31 [2019-12-07 17:48:20,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:20,342 INFO L462 AbstractCegarLoop]: Abstraction has 349 states and 517 transitions. [2019-12-07 17:48:20,342 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:48:20,342 INFO L276 IsEmpty]: Start isEmpty. Operand 349 states and 517 transitions. [2019-12-07 17:48:20,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 17:48:20,343 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:20,343 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:20,343 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:20,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:20,343 INFO L82 PathProgramCache]: Analyzing trace with hash -290926641, now seen corresponding path program 1 times [2019-12-07 17:48:20,343 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:20,343 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [280345005] [2019-12-07 17:48:20,343 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:20,365 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-12-07 17:48:20,366 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [280345005] [2019-12-07 17:48:20,366 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:20,366 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:20,366 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [46825543] [2019-12-07 17:48:20,366 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:20,366 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:20,366 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:20,366 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,367 INFO L87 Difference]: Start difference. First operand 349 states and 517 transitions. Second operand 3 states. [2019-12-07 17:48:20,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:20,396 INFO L93 Difference]: Finished difference Result 866 states and 1295 transitions. [2019-12-07 17:48:20,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:20,396 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2019-12-07 17:48:20,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:20,398 INFO L225 Difference]: With dead ends: 866 [2019-12-07 17:48:20,399 INFO L226 Difference]: Without dead ends: 546 [2019-12-07 17:48:20,399 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 546 states. [2019-12-07 17:48:20,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 546 to 326. [2019-12-07 17:48:20,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 326 states. [2019-12-07 17:48:20,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 479 transitions. [2019-12-07 17:48:20,407 INFO L78 Accepts]: Start accepts. Automaton has 326 states and 479 transitions. Word has length 34 [2019-12-07 17:48:20,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:20,407 INFO L462 AbstractCegarLoop]: Abstraction has 326 states and 479 transitions. [2019-12-07 17:48:20,407 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:20,407 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 479 transitions. [2019-12-07 17:48:20,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 17:48:20,408 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:20,408 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:20,408 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:20,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:20,408 INFO L82 PathProgramCache]: Analyzing trace with hash 1984299198, now seen corresponding path program 1 times [2019-12-07 17:48:20,408 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:20,408 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [870766654] [2019-12-07 17:48:20,408 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:20,433 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-12-07 17:48:20,433 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [870766654] [2019-12-07 17:48:20,433 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:20,433 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:20,433 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [106904545] [2019-12-07 17:48:20,434 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:20,434 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:20,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:20,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,434 INFO L87 Difference]: Start difference. First operand 326 states and 479 transitions. Second operand 3 states. [2019-12-07 17:48:20,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:20,485 INFO L93 Difference]: Finished difference Result 728 states and 1071 transitions. [2019-12-07 17:48:20,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:20,485 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2019-12-07 17:48:20,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:20,487 INFO L225 Difference]: With dead ends: 728 [2019-12-07 17:48:20,487 INFO L226 Difference]: Without dead ends: 431 [2019-12-07 17:48:20,488 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 431 states. [2019-12-07 17:48:20,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 431 to 294. [2019-12-07 17:48:20,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2019-12-07 17:48:20,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 419 transitions. [2019-12-07 17:48:20,495 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 419 transitions. Word has length 35 [2019-12-07 17:48:20,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:20,496 INFO L462 AbstractCegarLoop]: Abstraction has 294 states and 419 transitions. [2019-12-07 17:48:20,496 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:20,496 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 419 transitions. [2019-12-07 17:48:20,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-12-07 17:48:20,496 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:20,496 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:20,497 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:20,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:20,497 INFO L82 PathProgramCache]: Analyzing trace with hash -1766202321, now seen corresponding path program 1 times [2019-12-07 17:48:20,497 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:20,497 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [104823583] [2019-12-07 17:48:20,497 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:20,525 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-12-07 17:48:20,526 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [104823583] [2019-12-07 17:48:20,526 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:20,526 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:48:20,526 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1620542476] [2019-12-07 17:48:20,526 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:48:20,526 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:20,527 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:48:20,527 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:48:20,527 INFO L87 Difference]: Start difference. First operand 294 states and 419 transitions. Second operand 4 states. [2019-12-07 17:48:20,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:20,562 INFO L93 Difference]: Finished difference Result 749 states and 1083 transitions. [2019-12-07 17:48:20,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:48:20,563 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 46 [2019-12-07 17:48:20,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:20,566 INFO L225 Difference]: With dead ends: 749 [2019-12-07 17:48:20,566 INFO L226 Difference]: Without dead ends: 497 [2019-12-07 17:48:20,567 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:20,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 497 states. [2019-12-07 17:48:20,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 497 to 294. [2019-12-07 17:48:20,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2019-12-07 17:48:20,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 418 transitions. [2019-12-07 17:48:20,578 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 418 transitions. Word has length 46 [2019-12-07 17:48:20,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:20,578 INFO L462 AbstractCegarLoop]: Abstraction has 294 states and 418 transitions. [2019-12-07 17:48:20,578 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:48:20,578 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 418 transitions. [2019-12-07 17:48:20,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-12-07 17:48:20,579 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:20,579 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:20,579 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:20,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:20,580 INFO L82 PathProgramCache]: Analyzing trace with hash -544708160, now seen corresponding path program 1 times [2019-12-07 17:48:20,580 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:20,580 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1291902097] [2019-12-07 17:48:20,580 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:20,613 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 17:48:20,613 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1291902097] [2019-12-07 17:48:20,613 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:20,613 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:20,614 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1106492227] [2019-12-07 17:48:20,614 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:20,614 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:20,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:20,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,614 INFO L87 Difference]: Start difference. First operand 294 states and 418 transitions. Second operand 3 states. [2019-12-07 17:48:20,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:20,643 INFO L93 Difference]: Finished difference Result 631 states and 931 transitions. [2019-12-07 17:48:20,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:20,644 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-12-07 17:48:20,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:20,646 INFO L225 Difference]: With dead ends: 631 [2019-12-07 17:48:20,646 INFO L226 Difference]: Without dead ends: 382 [2019-12-07 17:48:20,647 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states. [2019-12-07 17:48:20,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 254. [2019-12-07 17:48:20,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2019-12-07 17:48:20,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 368 transitions. [2019-12-07 17:48:20,656 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 368 transitions. Word has length 49 [2019-12-07 17:48:20,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:20,656 INFO L462 AbstractCegarLoop]: Abstraction has 254 states and 368 transitions. [2019-12-07 17:48:20,656 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:20,656 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 368 transitions. [2019-12-07 17:48:20,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:48:20,657 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:20,657 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:20,657 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:20,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:20,657 INFO L82 PathProgramCache]: Analyzing trace with hash 390941353, now seen corresponding path program 1 times [2019-12-07 17:48:20,658 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:20,658 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [637082840] [2019-12-07 17:48:20,658 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:20,693 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 17:48:20,694 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [637082840] [2019-12-07 17:48:20,694 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:20,694 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:20,694 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1296871322] [2019-12-07 17:48:20,694 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:20,695 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:20,695 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:20,695 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,695 INFO L87 Difference]: Start difference. First operand 254 states and 368 transitions. Second operand 3 states. [2019-12-07 17:48:20,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:20,713 INFO L93 Difference]: Finished difference Result 433 states and 640 transitions. [2019-12-07 17:48:20,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:20,713 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 17:48:20,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:20,714 INFO L225 Difference]: With dead ends: 433 [2019-12-07 17:48:20,714 INFO L226 Difference]: Without dead ends: 224 [2019-12-07 17:48:20,715 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2019-12-07 17:48:20,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 224. [2019-12-07 17:48:20,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2019-12-07 17:48:20,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 322 transitions. [2019-12-07 17:48:20,720 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 322 transitions. Word has length 56 [2019-12-07 17:48:20,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:20,720 INFO L462 AbstractCegarLoop]: Abstraction has 224 states and 322 transitions. [2019-12-07 17:48:20,720 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:20,720 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 322 transitions. [2019-12-07 17:48:20,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:48:20,721 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:20,721 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:20,721 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:20,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:20,721 INFO L82 PathProgramCache]: Analyzing trace with hash -1746044383, now seen corresponding path program 1 times [2019-12-07 17:48:20,721 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:20,721 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1980077728] [2019-12-07 17:48:20,721 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:20,750 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 17:48:20,750 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1980077728] [2019-12-07 17:48:20,751 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:20,751 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:48:20,751 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1343603783] [2019-12-07 17:48:20,751 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:48:20,751 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:20,751 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:48:20,751 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:48:20,751 INFO L87 Difference]: Start difference. First operand 224 states and 322 transitions. Second operand 4 states. [2019-12-07 17:48:20,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:20,772 INFO L93 Difference]: Finished difference Result 391 states and 574 transitions. [2019-12-07 17:48:20,773 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:48:20,773 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2019-12-07 17:48:20,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:20,774 INFO L225 Difference]: With dead ends: 391 [2019-12-07 17:48:20,774 INFO L226 Difference]: Without dead ends: 224 [2019-12-07 17:48:20,774 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:20,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2019-12-07 17:48:20,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 224. [2019-12-07 17:48:20,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2019-12-07 17:48:20,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 321 transitions. [2019-12-07 17:48:20,779 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 321 transitions. Word has length 59 [2019-12-07 17:48:20,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:20,780 INFO L462 AbstractCegarLoop]: Abstraction has 224 states and 321 transitions. [2019-12-07 17:48:20,780 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:48:20,780 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 321 transitions. [2019-12-07 17:48:20,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-12-07 17:48:20,780 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:20,780 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:20,780 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:20,781 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:20,781 INFO L82 PathProgramCache]: Analyzing trace with hash 621112538, now seen corresponding path program 1 times [2019-12-07 17:48:20,781 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:20,781 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961380899] [2019-12-07 17:48:20,781 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:20,807 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 17:48:20,808 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [961380899] [2019-12-07 17:48:20,808 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:20,808 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:20,808 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1278109307] [2019-12-07 17:48:20,808 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:20,809 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:20,809 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:20,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,809 INFO L87 Difference]: Start difference. First operand 224 states and 321 transitions. Second operand 3 states. [2019-12-07 17:48:20,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:20,829 INFO L93 Difference]: Finished difference Result 519 states and 770 transitions. [2019-12-07 17:48:20,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:20,830 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 62 [2019-12-07 17:48:20,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:20,832 INFO L225 Difference]: With dead ends: 519 [2019-12-07 17:48:20,832 INFO L226 Difference]: Without dead ends: 355 [2019-12-07 17:48:20,832 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states. [2019-12-07 17:48:20,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 219. [2019-12-07 17:48:20,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 219 states. [2019-12-07 17:48:20,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 219 states to 219 states and 313 transitions. [2019-12-07 17:48:20,840 INFO L78 Accepts]: Start accepts. Automaton has 219 states and 313 transitions. Word has length 62 [2019-12-07 17:48:20,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:20,841 INFO L462 AbstractCegarLoop]: Abstraction has 219 states and 313 transitions. [2019-12-07 17:48:20,841 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:20,841 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 313 transitions. [2019-12-07 17:48:20,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:48:20,841 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:20,841 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:20,841 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:20,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:20,842 INFO L82 PathProgramCache]: Analyzing trace with hash 114301335, now seen corresponding path program 1 times [2019-12-07 17:48:20,842 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:20,842 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [550916978] [2019-12-07 17:48:20,842 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:20,881 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 17:48:20,881 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [550916978] [2019-12-07 17:48:20,882 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:20,882 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:20,882 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [961556123] [2019-12-07 17:48:20,882 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:20,882 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:20,882 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:20,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,883 INFO L87 Difference]: Start difference. First operand 219 states and 313 transitions. Second operand 3 states. [2019-12-07 17:48:20,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:20,902 INFO L93 Difference]: Finished difference Result 500 states and 741 transitions. [2019-12-07 17:48:20,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:20,902 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 17:48:20,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:20,905 INFO L225 Difference]: With dead ends: 500 [2019-12-07 17:48:20,905 INFO L226 Difference]: Without dead ends: 341 [2019-12-07 17:48:20,905 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 341 states. [2019-12-07 17:48:20,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 341 to 215. [2019-12-07 17:48:20,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 215 states. [2019-12-07 17:48:20,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 215 states to 215 states and 306 transitions. [2019-12-07 17:48:20,914 INFO L78 Accepts]: Start accepts. Automaton has 215 states and 306 transitions. Word has length 67 [2019-12-07 17:48:20,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:20,915 INFO L462 AbstractCegarLoop]: Abstraction has 215 states and 306 transitions. [2019-12-07 17:48:20,915 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:20,915 INFO L276 IsEmpty]: Start isEmpty. Operand 215 states and 306 transitions. [2019-12-07 17:48:20,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-12-07 17:48:20,915 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:20,916 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:20,916 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:20,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:20,916 INFO L82 PathProgramCache]: Analyzing trace with hash 2093726931, now seen corresponding path program 1 times [2019-12-07 17:48:20,916 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:20,916 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245996130] [2019-12-07 17:48:20,917 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:20,953 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 17:48:20,953 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245996130] [2019-12-07 17:48:20,954 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:20,954 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:20,954 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1552102888] [2019-12-07 17:48:20,954 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:20,954 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:20,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:20,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,954 INFO L87 Difference]: Start difference. First operand 215 states and 306 transitions. Second operand 3 states. [2019-12-07 17:48:20,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:20,967 INFO L93 Difference]: Finished difference Result 368 states and 538 transitions. [2019-12-07 17:48:20,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:20,967 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 73 [2019-12-07 17:48:20,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:20,968 INFO L225 Difference]: With dead ends: 368 [2019-12-07 17:48:20,969 INFO L226 Difference]: Without dead ends: 213 [2019-12-07 17:48:20,969 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:20,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2019-12-07 17:48:20,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 212. [2019-12-07 17:48:20,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2019-12-07 17:48:20,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 300 transitions. [2019-12-07 17:48:20,974 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 300 transitions. Word has length 73 [2019-12-07 17:48:20,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:20,975 INFO L462 AbstractCegarLoop]: Abstraction has 212 states and 300 transitions. [2019-12-07 17:48:20,975 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:20,975 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 300 transitions. [2019-12-07 17:48:20,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-12-07 17:48:20,975 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:20,975 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:20,976 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:20,976 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:20,976 INFO L82 PathProgramCache]: Analyzing trace with hash 450137978, now seen corresponding path program 1 times [2019-12-07 17:48:20,976 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:20,976 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1182682520] [2019-12-07 17:48:20,976 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:21,005 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 17:48:21,005 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1182682520] [2019-12-07 17:48:21,005 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:21,005 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:21,005 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [373156115] [2019-12-07 17:48:21,006 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:21,006 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:21,006 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:21,006 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:21,006 INFO L87 Difference]: Start difference. First operand 212 states and 300 transitions. Second operand 3 states. [2019-12-07 17:48:21,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:21,013 INFO L93 Difference]: Finished difference Result 409 states and 595 transitions. [2019-12-07 17:48:21,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:21,013 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 81 [2019-12-07 17:48:21,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:21,014 INFO L225 Difference]: With dead ends: 409 [2019-12-07 17:48:21,014 INFO L226 Difference]: Without dead ends: 257 [2019-12-07 17:48:21,015 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:21,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2019-12-07 17:48:21,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 209. [2019-12-07 17:48:21,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-12-07 17:48:21,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 296 transitions. [2019-12-07 17:48:21,021 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 296 transitions. Word has length 81 [2019-12-07 17:48:21,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:21,021 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 296 transitions. [2019-12-07 17:48:21,021 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:21,021 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 296 transitions. [2019-12-07 17:48:21,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-12-07 17:48:21,022 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:21,022 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:21,022 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:21,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:21,022 INFO L82 PathProgramCache]: Analyzing trace with hash 17499620, now seen corresponding path program 1 times [2019-12-07 17:48:21,023 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:21,023 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [907475586] [2019-12-07 17:48:21,023 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:21,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:21,084 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 17:48:21,084 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [907475586] [2019-12-07 17:48:21,084 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:21,084 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:48:21,084 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [95080510] [2019-12-07 17:48:21,085 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:48:21,085 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:21,085 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:48:21,085 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:48:21,085 INFO L87 Difference]: Start difference. First operand 209 states and 296 transitions. Second operand 4 states. [2019-12-07 17:48:21,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:21,150 INFO L93 Difference]: Finished difference Result 532 states and 775 transitions. [2019-12-07 17:48:21,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:48:21,150 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 82 [2019-12-07 17:48:21,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:21,152 INFO L225 Difference]: With dead ends: 532 [2019-12-07 17:48:21,153 INFO L226 Difference]: Without dead ends: 383 [2019-12-07 17:48:21,153 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:21,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 383 states. [2019-12-07 17:48:21,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 383 to 290. [2019-12-07 17:48:21,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 290 states. [2019-12-07 17:48:21,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 413 transitions. [2019-12-07 17:48:21,168 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 413 transitions. Word has length 82 [2019-12-07 17:48:21,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:21,169 INFO L462 AbstractCegarLoop]: Abstraction has 290 states and 413 transitions. [2019-12-07 17:48:21,169 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:48:21,169 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 413 transitions. [2019-12-07 17:48:21,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2019-12-07 17:48:21,170 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:21,170 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:21,170 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:21,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:21,170 INFO L82 PathProgramCache]: Analyzing trace with hash 1027173863, now seen corresponding path program 1 times [2019-12-07 17:48:21,171 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:21,171 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1707000840] [2019-12-07 17:48:21,171 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:21,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:21,218 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 17:48:21,219 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1707000840] [2019-12-07 17:48:21,219 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:21,219 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:21,219 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1128223748] [2019-12-07 17:48:21,219 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:21,219 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:21,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:21,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:21,220 INFO L87 Difference]: Start difference. First operand 290 states and 413 transitions. Second operand 3 states. [2019-12-07 17:48:21,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:21,243 INFO L93 Difference]: Finished difference Result 687 states and 1003 transitions. [2019-12-07 17:48:21,243 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:21,244 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 100 [2019-12-07 17:48:21,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:21,246 INFO L225 Difference]: With dead ends: 687 [2019-12-07 17:48:21,246 INFO L226 Difference]: Without dead ends: 495 [2019-12-07 17:48:21,246 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:21,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 495 states. [2019-12-07 17:48:21,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 495 to 359. [2019-12-07 17:48:21,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 359 states. [2019-12-07 17:48:21,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 359 states to 359 states and 510 transitions. [2019-12-07 17:48:21,258 INFO L78 Accepts]: Start accepts. Automaton has 359 states and 510 transitions. Word has length 100 [2019-12-07 17:48:21,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:21,258 INFO L462 AbstractCegarLoop]: Abstraction has 359 states and 510 transitions. [2019-12-07 17:48:21,258 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:21,258 INFO L276 IsEmpty]: Start isEmpty. Operand 359 states and 510 transitions. [2019-12-07 17:48:21,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2019-12-07 17:48:21,259 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:21,259 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:21,259 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:21,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:21,259 INFO L82 PathProgramCache]: Analyzing trace with hash -2145780492, now seen corresponding path program 1 times [2019-12-07 17:48:21,260 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:21,260 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046934933] [2019-12-07 17:48:21,260 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:21,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:21,296 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 17:48:21,296 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1046934933] [2019-12-07 17:48:21,296 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:21,297 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:21,297 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1196098290] [2019-12-07 17:48:21,297 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:21,297 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:21,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:21,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:21,297 INFO L87 Difference]: Start difference. First operand 359 states and 510 transitions. Second operand 3 states. [2019-12-07 17:48:21,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:21,323 INFO L93 Difference]: Finished difference Result 833 states and 1210 transitions. [2019-12-07 17:48:21,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:21,324 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 101 [2019-12-07 17:48:21,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:21,326 INFO L225 Difference]: With dead ends: 833 [2019-12-07 17:48:21,326 INFO L226 Difference]: Without dead ends: 599 [2019-12-07 17:48:21,327 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:21,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 599 states. [2019-12-07 17:48:21,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 599 to 451. [2019-12-07 17:48:21,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 451 states. [2019-12-07 17:48:21,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 451 states to 451 states and 640 transitions. [2019-12-07 17:48:21,341 INFO L78 Accepts]: Start accepts. Automaton has 451 states and 640 transitions. Word has length 101 [2019-12-07 17:48:21,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:21,342 INFO L462 AbstractCegarLoop]: Abstraction has 451 states and 640 transitions. [2019-12-07 17:48:21,342 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:21,342 INFO L276 IsEmpty]: Start isEmpty. Operand 451 states and 640 transitions. [2019-12-07 17:48:21,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2019-12-07 17:48:21,342 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:21,342 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:21,343 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:21,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:21,343 INFO L82 PathProgramCache]: Analyzing trace with hash -1333981650, now seen corresponding path program 1 times [2019-12-07 17:48:21,343 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:21,343 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [772264493] [2019-12-07 17:48:21,343 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:21,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:21,380 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 17:48:21,380 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [772264493] [2019-12-07 17:48:21,380 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [612921765] [2019-12-07 17:48:21,380 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:21,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:21,482 INFO L264 TraceCheckSpWp]: Trace formula consists of 511 conjuncts, 3 conjunts are in the unsatisfiable core [2019-12-07 17:48:21,489 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:48:21,522 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 17:48:21,522 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:48:21,523 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2019-12-07 17:48:21,523 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [788986205] [2019-12-07 17:48:21,523 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:48:21,523 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:21,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:48:21,524 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:48:21,524 INFO L87 Difference]: Start difference. First operand 451 states and 640 transitions. Second operand 6 states. [2019-12-07 17:48:21,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:21,757 INFO L93 Difference]: Finished difference Result 1186 states and 1638 transitions. [2019-12-07 17:48:21,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:48:21,758 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 102 [2019-12-07 17:48:21,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:21,761 INFO L225 Difference]: With dead ends: 1186 [2019-12-07 17:48:21,761 INFO L226 Difference]: Without dead ends: 746 [2019-12-07 17:48:21,761 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:48:21,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 746 states. [2019-12-07 17:48:21,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 746 to 492. [2019-12-07 17:48:21,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 492 states. [2019-12-07 17:48:21,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 492 states to 492 states and 680 transitions. [2019-12-07 17:48:21,780 INFO L78 Accepts]: Start accepts. Automaton has 492 states and 680 transitions. Word has length 102 [2019-12-07 17:48:21,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:21,781 INFO L462 AbstractCegarLoop]: Abstraction has 492 states and 680 transitions. [2019-12-07 17:48:21,781 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:48:21,781 INFO L276 IsEmpty]: Start isEmpty. Operand 492 states and 680 transitions. [2019-12-07 17:48:21,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2019-12-07 17:48:21,782 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:21,782 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:21,983 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:21,983 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:21,983 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:21,984 INFO L82 PathProgramCache]: Analyzing trace with hash 1623171890, now seen corresponding path program 1 times [2019-12-07 17:48:21,984 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:21,984 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [697377634] [2019-12-07 17:48:21,984 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:22,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:22,064 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2019-12-07 17:48:22,065 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [697377634] [2019-12-07 17:48:22,065 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1831709259] [2019-12-07 17:48:22,065 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:22,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:22,162 INFO L264 TraceCheckSpWp]: Trace formula consists of 615 conjuncts, 4 conjunts are in the unsatisfiable core [2019-12-07 17:48:22,166 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:48:22,193 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2019-12-07 17:48:22,193 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:48:22,193 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5] total 7 [2019-12-07 17:48:22,193 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1596228297] [2019-12-07 17:48:22,193 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:48:22,194 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:22,194 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:48:22,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:48:22,194 INFO L87 Difference]: Start difference. First operand 492 states and 680 transitions. Second operand 7 states. [2019-12-07 17:48:22,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:22,399 INFO L93 Difference]: Finished difference Result 1383 states and 1911 transitions. [2019-12-07 17:48:22,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:48:22,400 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 140 [2019-12-07 17:48:22,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:22,404 INFO L225 Difference]: With dead ends: 1383 [2019-12-07 17:48:22,405 INFO L226 Difference]: Without dead ends: 910 [2019-12-07 17:48:22,406 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 145 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:48:22,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 910 states. [2019-12-07 17:48:22,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 910 to 533. [2019-12-07 17:48:22,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 533 states. [2019-12-07 17:48:22,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 533 states to 533 states and 728 transitions. [2019-12-07 17:48:22,429 INFO L78 Accepts]: Start accepts. Automaton has 533 states and 728 transitions. Word has length 140 [2019-12-07 17:48:22,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:22,429 INFO L462 AbstractCegarLoop]: Abstraction has 533 states and 728 transitions. [2019-12-07 17:48:22,429 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:48:22,429 INFO L276 IsEmpty]: Start isEmpty. Operand 533 states and 728 transitions. [2019-12-07 17:48:22,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2019-12-07 17:48:22,430 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:22,430 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:22,631 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:22,631 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:22,631 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:22,631 INFO L82 PathProgramCache]: Analyzing trace with hash -1233898508, now seen corresponding path program 1 times [2019-12-07 17:48:22,632 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:22,632 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1590584408] [2019-12-07 17:48:22,632 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:22,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:22,706 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:48:22,706 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1590584408] [2019-12-07 17:48:22,706 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:22,706 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:48:22,706 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2094036352] [2019-12-07 17:48:22,706 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:48:22,706 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:22,707 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:48:22,707 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:48:22,707 INFO L87 Difference]: Start difference. First operand 533 states and 728 transitions. Second operand 4 states. [2019-12-07 17:48:22,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:22,756 INFO L93 Difference]: Finished difference Result 843 states and 1170 transitions. [2019-12-07 17:48:22,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:48:22,756 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 178 [2019-12-07 17:48:22,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:22,759 INFO L225 Difference]: With dead ends: 843 [2019-12-07 17:48:22,760 INFO L226 Difference]: Without dead ends: 841 [2019-12-07 17:48:22,760 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:22,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 841 states. [2019-12-07 17:48:22,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 841 to 535. [2019-12-07 17:48:22,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 535 states. [2019-12-07 17:48:22,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 535 states to 535 states and 730 transitions. [2019-12-07 17:48:22,777 INFO L78 Accepts]: Start accepts. Automaton has 535 states and 730 transitions. Word has length 178 [2019-12-07 17:48:22,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:22,777 INFO L462 AbstractCegarLoop]: Abstraction has 535 states and 730 transitions. [2019-12-07 17:48:22,778 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:48:22,778 INFO L276 IsEmpty]: Start isEmpty. Operand 535 states and 730 transitions. [2019-12-07 17:48:22,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2019-12-07 17:48:22,779 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:22,779 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:22,779 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:22,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:22,779 INFO L82 PathProgramCache]: Analyzing trace with hash -834811533, now seen corresponding path program 1 times [2019-12-07 17:48:22,780 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:22,780 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [833992857] [2019-12-07 17:48:22,780 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:22,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:22,887 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2019-12-07 17:48:22,888 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [833992857] [2019-12-07 17:48:22,888 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1283212457] [2019-12-07 17:48:22,888 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:23,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:23,008 INFO L264 TraceCheckSpWp]: Trace formula consists of 738 conjuncts, 8 conjunts are in the unsatisfiable core [2019-12-07 17:48:23,012 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:48:23,075 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2019-12-07 17:48:23,075 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:48:23,075 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2019-12-07 17:48:23,075 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [878999282] [2019-12-07 17:48:23,076 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:48:23,076 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:23,076 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:48:23,076 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:48:23,076 INFO L87 Difference]: Start difference. First operand 535 states and 730 transitions. Second operand 11 states. [2019-12-07 17:48:23,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:23,614 INFO L93 Difference]: Finished difference Result 2960 states and 4169 transitions. [2019-12-07 17:48:23,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 17:48:23,615 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 181 [2019-12-07 17:48:23,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:23,624 INFO L225 Difference]: With dead ends: 2960 [2019-12-07 17:48:23,625 INFO L226 Difference]: Without dead ends: 2662 [2019-12-07 17:48:23,626 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 180 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 148 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=158, Invalid=598, Unknown=0, NotChecked=0, Total=756 [2019-12-07 17:48:23,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2662 states. [2019-12-07 17:48:23,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2662 to 727. [2019-12-07 17:48:23,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 727 states. [2019-12-07 17:48:23,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 727 states to 727 states and 987 transitions. [2019-12-07 17:48:23,661 INFO L78 Accepts]: Start accepts. Automaton has 727 states and 987 transitions. Word has length 181 [2019-12-07 17:48:23,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:23,661 INFO L462 AbstractCegarLoop]: Abstraction has 727 states and 987 transitions. [2019-12-07 17:48:23,661 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:48:23,661 INFO L276 IsEmpty]: Start isEmpty. Operand 727 states and 987 transitions. [2019-12-07 17:48:23,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2019-12-07 17:48:23,662 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:23,662 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:23,863 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:23,863 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:23,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:23,863 INFO L82 PathProgramCache]: Analyzing trace with hash -2114675211, now seen corresponding path program 1 times [2019-12-07 17:48:23,864 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:23,864 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [660707406] [2019-12-07 17:48:23,864 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:23,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:23,910 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:48:23,910 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [660707406] [2019-12-07 17:48:23,910 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:23,910 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:23,911 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1665199520] [2019-12-07 17:48:23,911 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:23,911 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:23,911 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:23,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:23,911 INFO L87 Difference]: Start difference. First operand 727 states and 987 transitions. Second operand 3 states. [2019-12-07 17:48:23,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:23,985 INFO L93 Difference]: Finished difference Result 1568 states and 2158 transitions. [2019-12-07 17:48:23,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:23,986 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 181 [2019-12-07 17:48:23,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:23,992 INFO L225 Difference]: With dead ends: 1568 [2019-12-07 17:48:23,992 INFO L226 Difference]: Without dead ends: 1270 [2019-12-07 17:48:23,993 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:23,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1270 states. [2019-12-07 17:48:24,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1270 to 727. [2019-12-07 17:48:24,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 727 states. [2019-12-07 17:48:24,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 727 states to 727 states and 985 transitions. [2019-12-07 17:48:24,026 INFO L78 Accepts]: Start accepts. Automaton has 727 states and 985 transitions. Word has length 181 [2019-12-07 17:48:24,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:24,027 INFO L462 AbstractCegarLoop]: Abstraction has 727 states and 985 transitions. [2019-12-07 17:48:24,027 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:24,027 INFO L276 IsEmpty]: Start isEmpty. Operand 727 states and 985 transitions. [2019-12-07 17:48:24,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2019-12-07 17:48:24,028 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:24,028 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:24,028 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:24,029 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:24,029 INFO L82 PathProgramCache]: Analyzing trace with hash 1034293647, now seen corresponding path program 1 times [2019-12-07 17:48:24,029 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:24,029 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1111802209] [2019-12-07 17:48:24,029 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:24,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:24,086 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 111 trivial. 0 not checked. [2019-12-07 17:48:24,087 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1111802209] [2019-12-07 17:48:24,087 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:24,087 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:24,087 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [166955732] [2019-12-07 17:48:24,087 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:24,087 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:24,087 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:24,088 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:24,088 INFO L87 Difference]: Start difference. First operand 727 states and 985 transitions. Second operand 3 states. [2019-12-07 17:48:24,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:24,134 INFO L93 Difference]: Finished difference Result 1192 states and 1628 transitions. [2019-12-07 17:48:24,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:24,134 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 184 [2019-12-07 17:48:24,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:24,136 INFO L225 Difference]: With dead ends: 1192 [2019-12-07 17:48:24,136 INFO L226 Difference]: Without dead ends: 586 [2019-12-07 17:48:24,137 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:24,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 586 states. [2019-12-07 17:48:24,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 586 to 585. [2019-12-07 17:48:24,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 585 states. [2019-12-07 17:48:24,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 585 states to 585 states and 769 transitions. [2019-12-07 17:48:24,164 INFO L78 Accepts]: Start accepts. Automaton has 585 states and 769 transitions. Word has length 184 [2019-12-07 17:48:24,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:24,164 INFO L462 AbstractCegarLoop]: Abstraction has 585 states and 769 transitions. [2019-12-07 17:48:24,164 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:24,165 INFO L276 IsEmpty]: Start isEmpty. Operand 585 states and 769 transitions. [2019-12-07 17:48:24,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2019-12-07 17:48:24,166 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:24,166 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:24,167 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:24,167 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:24,167 INFO L82 PathProgramCache]: Analyzing trace with hash -802814983, now seen corresponding path program 1 times [2019-12-07 17:48:24,167 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:24,167 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1130387065] [2019-12-07 17:48:24,167 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:24,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:24,326 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:48:24,326 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1130387065] [2019-12-07 17:48:24,326 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:24,326 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:48:24,327 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1722820730] [2019-12-07 17:48:24,327 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 17:48:24,327 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:24,327 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 17:48:24,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:48:24,327 INFO L87 Difference]: Start difference. First operand 585 states and 769 transitions. Second operand 9 states. [2019-12-07 17:48:25,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:25,065 INFO L93 Difference]: Finished difference Result 1806 states and 2442 transitions. [2019-12-07 17:48:25,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 17:48:25,066 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 189 [2019-12-07 17:48:25,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:25,072 INFO L225 Difference]: With dead ends: 1806 [2019-12-07 17:48:25,072 INFO L226 Difference]: Without dead ends: 1519 [2019-12-07 17:48:25,073 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=265, Invalid=791, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 17:48:25,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1519 states. [2019-12-07 17:48:25,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1519 to 735. [2019-12-07 17:48:25,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 735 states. [2019-12-07 17:48:25,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 735 states to 735 states and 959 transitions. [2019-12-07 17:48:25,104 INFO L78 Accepts]: Start accepts. Automaton has 735 states and 959 transitions. Word has length 189 [2019-12-07 17:48:25,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:25,105 INFO L462 AbstractCegarLoop]: Abstraction has 735 states and 959 transitions. [2019-12-07 17:48:25,105 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 17:48:25,105 INFO L276 IsEmpty]: Start isEmpty. Operand 735 states and 959 transitions. [2019-12-07 17:48:25,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2019-12-07 17:48:25,106 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:25,106 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:25,106 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:25,107 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:25,107 INFO L82 PathProgramCache]: Analyzing trace with hash -143283461, now seen corresponding path program 1 times [2019-12-07 17:48:25,107 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:25,107 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1058942202] [2019-12-07 17:48:25,107 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:25,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:25,204 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:48:25,204 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1058942202] [2019-12-07 17:48:25,204 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:25,204 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:48:25,204 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1925713594] [2019-12-07 17:48:25,205 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:48:25,205 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:25,205 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:48:25,205 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:25,205 INFO L87 Difference]: Start difference. First operand 735 states and 959 transitions. Second operand 5 states. [2019-12-07 17:48:25,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:25,343 INFO L93 Difference]: Finished difference Result 1365 states and 1802 transitions. [2019-12-07 17:48:25,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:48:25,343 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 189 [2019-12-07 17:48:25,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:25,347 INFO L225 Difference]: With dead ends: 1365 [2019-12-07 17:48:25,347 INFO L226 Difference]: Without dead ends: 928 [2019-12-07 17:48:25,347 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:48:25,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 928 states. [2019-12-07 17:48:25,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 928 to 675. [2019-12-07 17:48:25,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 675 states. [2019-12-07 17:48:25,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 675 states to 675 states and 881 transitions. [2019-12-07 17:48:25,374 INFO L78 Accepts]: Start accepts. Automaton has 675 states and 881 transitions. Word has length 189 [2019-12-07 17:48:25,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:25,374 INFO L462 AbstractCegarLoop]: Abstraction has 675 states and 881 transitions. [2019-12-07 17:48:25,375 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:48:25,375 INFO L276 IsEmpty]: Start isEmpty. Operand 675 states and 881 transitions. [2019-12-07 17:48:25,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2019-12-07 17:48:25,376 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:25,376 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:25,376 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:25,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:25,376 INFO L82 PathProgramCache]: Analyzing trace with hash 802518291, now seen corresponding path program 1 times [2019-12-07 17:48:25,377 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:25,377 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1145077361] [2019-12-07 17:48:25,377 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:25,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:25,454 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:48:25,454 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1145077361] [2019-12-07 17:48:25,455 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:25,455 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:48:25,455 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [772384056] [2019-12-07 17:48:25,455 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:48:25,455 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:25,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:48:25,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:48:25,456 INFO L87 Difference]: Start difference. First operand 675 states and 881 transitions. Second operand 6 states. [2019-12-07 17:48:25,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:25,552 INFO L93 Difference]: Finished difference Result 2072 states and 2782 transitions. [2019-12-07 17:48:25,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:48:25,553 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 195 [2019-12-07 17:48:25,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:25,558 INFO L225 Difference]: With dead ends: 2072 [2019-12-07 17:48:25,558 INFO L226 Difference]: Without dead ends: 1689 [2019-12-07 17:48:25,559 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:48:25,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1689 states. [2019-12-07 17:48:25,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1689 to 752. [2019-12-07 17:48:25,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 752 states. [2019-12-07 17:48:25,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 752 states to 752 states and 979 transitions. [2019-12-07 17:48:25,593 INFO L78 Accepts]: Start accepts. Automaton has 752 states and 979 transitions. Word has length 195 [2019-12-07 17:48:25,593 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:25,593 INFO L462 AbstractCegarLoop]: Abstraction has 752 states and 979 transitions. [2019-12-07 17:48:25,594 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:48:25,594 INFO L276 IsEmpty]: Start isEmpty. Operand 752 states and 979 transitions. [2019-12-07 17:48:25,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2019-12-07 17:48:25,595 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:25,595 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:25,595 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:25,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:25,596 INFO L82 PathProgramCache]: Analyzing trace with hash 1560841171, now seen corresponding path program 1 times [2019-12-07 17:48:25,596 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:25,596 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [155225459] [2019-12-07 17:48:25,596 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:25,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:25,711 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:48:25,711 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [155225459] [2019-12-07 17:48:25,711 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:25,711 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:48:25,711 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [490581853] [2019-12-07 17:48:25,712 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 17:48:25,712 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:25,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 17:48:25,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:48:25,712 INFO L87 Difference]: Start difference. First operand 752 states and 979 transitions. Second operand 9 states. [2019-12-07 17:48:26,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:26,291 INFO L93 Difference]: Finished difference Result 2393 states and 3163 transitions. [2019-12-07 17:48:26,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 17:48:26,291 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 195 [2019-12-07 17:48:26,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:26,298 INFO L225 Difference]: With dead ends: 2393 [2019-12-07 17:48:26,298 INFO L226 Difference]: Without dead ends: 1936 [2019-12-07 17:48:26,299 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 126 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=154, Invalid=496, Unknown=0, NotChecked=0, Total=650 [2019-12-07 17:48:26,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1936 states. [2019-12-07 17:48:26,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1936 to 799. [2019-12-07 17:48:26,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 799 states. [2019-12-07 17:48:26,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 799 states to 799 states and 1034 transitions. [2019-12-07 17:48:26,341 INFO L78 Accepts]: Start accepts. Automaton has 799 states and 1034 transitions. Word has length 195 [2019-12-07 17:48:26,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:26,342 INFO L462 AbstractCegarLoop]: Abstraction has 799 states and 1034 transitions. [2019-12-07 17:48:26,342 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 17:48:26,342 INFO L276 IsEmpty]: Start isEmpty. Operand 799 states and 1034 transitions. [2019-12-07 17:48:26,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2019-12-07 17:48:26,344 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:26,344 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:26,344 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:26,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:26,345 INFO L82 PathProgramCache]: Analyzing trace with hash -161291761, now seen corresponding path program 1 times [2019-12-07 17:48:26,345 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:26,345 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [608882121] [2019-12-07 17:48:26,345 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:26,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:26,504 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:48:26,504 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [608882121] [2019-12-07 17:48:26,504 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:26,505 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:48:26,505 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [565926168] [2019-12-07 17:48:26,505 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 17:48:26,505 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:26,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 17:48:26,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:48:26,506 INFO L87 Difference]: Start difference. First operand 799 states and 1034 transitions. Second operand 9 states. [2019-12-07 17:48:27,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:27,465 INFO L93 Difference]: Finished difference Result 2718 states and 3567 transitions. [2019-12-07 17:48:27,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 17:48:27,466 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 195 [2019-12-07 17:48:27,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:27,476 INFO L225 Difference]: With dead ends: 2718 [2019-12-07 17:48:27,476 INFO L226 Difference]: Without dead ends: 2209 [2019-12-07 17:48:27,478 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 126 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=154, Invalid=496, Unknown=0, NotChecked=0, Total=650 [2019-12-07 17:48:27,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2209 states. [2019-12-07 17:48:27,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2209 to 984. [2019-12-07 17:48:27,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 984 states. [2019-12-07 17:48:27,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 984 states to 984 states and 1262 transitions. [2019-12-07 17:48:27,530 INFO L78 Accepts]: Start accepts. Automaton has 984 states and 1262 transitions. Word has length 195 [2019-12-07 17:48:27,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:27,530 INFO L462 AbstractCegarLoop]: Abstraction has 984 states and 1262 transitions. [2019-12-07 17:48:27,530 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 17:48:27,530 INFO L276 IsEmpty]: Start isEmpty. Operand 984 states and 1262 transitions. [2019-12-07 17:48:27,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2019-12-07 17:48:27,532 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:27,532 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:27,532 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:27,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:27,532 INFO L82 PathProgramCache]: Analyzing trace with hash -486096959, now seen corresponding path program 1 times [2019-12-07 17:48:27,533 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:27,533 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2144739681] [2019-12-07 17:48:27,533 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:27,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:27,589 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 141 trivial. 0 not checked. [2019-12-07 17:48:27,589 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2144739681] [2019-12-07 17:48:27,589 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:27,589 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:48:27,589 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [745590957] [2019-12-07 17:48:27,590 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:48:27,590 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:27,590 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:48:27,590 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:48:27,590 INFO L87 Difference]: Start difference. First operand 984 states and 1262 transitions. Second operand 4 states. [2019-12-07 17:48:27,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:27,738 INFO L93 Difference]: Finished difference Result 1823 states and 2365 transitions. [2019-12-07 17:48:27,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:48:27,739 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 203 [2019-12-07 17:48:27,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:27,742 INFO L225 Difference]: With dead ends: 1823 [2019-12-07 17:48:27,742 INFO L226 Difference]: Without dead ends: 1137 [2019-12-07 17:48:27,743 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:27,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1137 states. [2019-12-07 17:48:27,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1137 to 815. [2019-12-07 17:48:27,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 815 states. [2019-12-07 17:48:27,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 815 states to 815 states and 1030 transitions. [2019-12-07 17:48:27,782 INFO L78 Accepts]: Start accepts. Automaton has 815 states and 1030 transitions. Word has length 203 [2019-12-07 17:48:27,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:27,782 INFO L462 AbstractCegarLoop]: Abstraction has 815 states and 1030 transitions. [2019-12-07 17:48:27,782 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:48:27,782 INFO L276 IsEmpty]: Start isEmpty. Operand 815 states and 1030 transitions. [2019-12-07 17:48:27,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2019-12-07 17:48:27,783 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:27,783 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:27,784 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:27,784 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:27,784 INFO L82 PathProgramCache]: Analyzing trace with hash -554344046, now seen corresponding path program 1 times [2019-12-07 17:48:27,784 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:27,784 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256202997] [2019-12-07 17:48:27,784 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:27,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:27,947 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 18 proven. 23 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:48:27,947 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1256202997] [2019-12-07 17:48:27,947 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1044130922] [2019-12-07 17:48:27,947 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:28,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:28,062 INFO L264 TraceCheckSpWp]: Trace formula consists of 945 conjuncts, 14 conjunts are in the unsatisfiable core [2019-12-07 17:48:28,066 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:48:28,179 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 9 proven. 32 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:48:28,179 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:48:28,179 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 14 [2019-12-07 17:48:28,180 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [905436658] [2019-12-07 17:48:28,180 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:48:28,180 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:28,180 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:48:28,180 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=156, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:48:28,181 INFO L87 Difference]: Start difference. First operand 815 states and 1030 transitions. Second operand 14 states. [2019-12-07 17:48:38,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:38,681 INFO L93 Difference]: Finished difference Result 11462 states and 14974 transitions. [2019-12-07 17:48:38,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 263 states. [2019-12-07 17:48:38,682 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 228 [2019-12-07 17:48:38,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:38,699 INFO L225 Difference]: With dead ends: 11462 [2019-12-07 17:48:38,699 INFO L226 Difference]: Without dead ends: 10901 [2019-12-07 17:48:38,717 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 495 GetRequests, 223 SyntacticMatches, 0 SemanticMatches, 272 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31635 ImplicationChecksByTransitivity, 6.9s TimeCoverageRelationStatistics Valid=9654, Invalid=65148, Unknown=0, NotChecked=0, Total=74802 [2019-12-07 17:48:38,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10901 states. [2019-12-07 17:48:38,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10901 to 1977. [2019-12-07 17:48:38,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1977 states. [2019-12-07 17:48:38,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1977 states to 1977 states and 2482 transitions. [2019-12-07 17:48:38,908 INFO L78 Accepts]: Start accepts. Automaton has 1977 states and 2482 transitions. Word has length 228 [2019-12-07 17:48:38,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:38,908 INFO L462 AbstractCegarLoop]: Abstraction has 1977 states and 2482 transitions. [2019-12-07 17:48:38,908 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:48:38,908 INFO L276 IsEmpty]: Start isEmpty. Operand 1977 states and 2482 transitions. [2019-12-07 17:48:38,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2019-12-07 17:48:38,910 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:38,910 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:39,111 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:39,112 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:39,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:39,113 INFO L82 PathProgramCache]: Analyzing trace with hash 1254561174, now seen corresponding path program 1 times [2019-12-07 17:48:39,113 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:39,114 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2101466603] [2019-12-07 17:48:39,114 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:39,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:39,203 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 151 trivial. 0 not checked. [2019-12-07 17:48:39,203 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2101466603] [2019-12-07 17:48:39,203 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:39,204 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:39,204 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [439326709] [2019-12-07 17:48:39,204 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:39,204 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:39,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:39,204 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:39,204 INFO L87 Difference]: Start difference. First operand 1977 states and 2482 transitions. Second operand 3 states. [2019-12-07 17:48:39,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:39,354 INFO L93 Difference]: Finished difference Result 3905 states and 4894 transitions. [2019-12-07 17:48:39,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:39,355 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 228 [2019-12-07 17:48:39,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:39,360 INFO L225 Difference]: With dead ends: 3905 [2019-12-07 17:48:39,360 INFO L226 Difference]: Without dead ends: 2212 [2019-12-07 17:48:39,362 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:39,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2212 states. [2019-12-07 17:48:39,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2212 to 1977. [2019-12-07 17:48:39,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1977 states. [2019-12-07 17:48:39,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1977 states to 1977 states and 2392 transitions. [2019-12-07 17:48:39,493 INFO L78 Accepts]: Start accepts. Automaton has 1977 states and 2392 transitions. Word has length 228 [2019-12-07 17:48:39,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:39,494 INFO L462 AbstractCegarLoop]: Abstraction has 1977 states and 2392 transitions. [2019-12-07 17:48:39,494 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:39,494 INFO L276 IsEmpty]: Start isEmpty. Operand 1977 states and 2392 transitions. [2019-12-07 17:48:39,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2019-12-07 17:48:39,496 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:39,496 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:39,496 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:39,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:39,496 INFO L82 PathProgramCache]: Analyzing trace with hash 682778822, now seen corresponding path program 1 times [2019-12-07 17:48:39,497 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:39,497 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1161966665] [2019-12-07 17:48:39,497 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:39,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:39,548 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 137 trivial. 0 not checked. [2019-12-07 17:48:39,548 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1161966665] [2019-12-07 17:48:39,549 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:39,549 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:39,549 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [788989124] [2019-12-07 17:48:39,549 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:39,549 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:39,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:39,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:39,549 INFO L87 Difference]: Start difference. First operand 1977 states and 2392 transitions. Second operand 3 states. [2019-12-07 17:48:39,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:39,764 INFO L93 Difference]: Finished difference Result 5182 states and 6231 transitions. [2019-12-07 17:48:39,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:39,764 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 228 [2019-12-07 17:48:39,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:39,768 INFO L225 Difference]: With dead ends: 5182 [2019-12-07 17:48:39,768 INFO L226 Difference]: Without dead ends: 3569 [2019-12-07 17:48:39,770 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:39,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3569 states. [2019-12-07 17:48:39,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3569 to 2166. [2019-12-07 17:48:39,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2166 states. [2019-12-07 17:48:39,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2166 states to 2166 states and 2618 transitions. [2019-12-07 17:48:39,909 INFO L78 Accepts]: Start accepts. Automaton has 2166 states and 2618 transitions. Word has length 228 [2019-12-07 17:48:39,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:39,909 INFO L462 AbstractCegarLoop]: Abstraction has 2166 states and 2618 transitions. [2019-12-07 17:48:39,909 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:39,909 INFO L276 IsEmpty]: Start isEmpty. Operand 2166 states and 2618 transitions. [2019-12-07 17:48:39,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2019-12-07 17:48:39,912 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:39,912 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:39,912 INFO L410 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:39,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:39,912 INFO L82 PathProgramCache]: Analyzing trace with hash 759679620, now seen corresponding path program 1 times [2019-12-07 17:48:39,912 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:39,912 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1522085379] [2019-12-07 17:48:39,912 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:39,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:39,992 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2019-12-07 17:48:39,992 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1522085379] [2019-12-07 17:48:39,992 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:39,993 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:39,993 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1091517392] [2019-12-07 17:48:39,993 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:39,993 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:39,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:39,993 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:39,993 INFO L87 Difference]: Start difference. First operand 2166 states and 2618 transitions. Second operand 3 states. [2019-12-07 17:48:40,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:40,121 INFO L93 Difference]: Finished difference Result 3963 states and 4793 transitions. [2019-12-07 17:48:40,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:40,122 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 228 [2019-12-07 17:48:40,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:40,124 INFO L225 Difference]: With dead ends: 3963 [2019-12-07 17:48:40,124 INFO L226 Difference]: Without dead ends: 2057 [2019-12-07 17:48:40,126 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:40,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2057 states. [2019-12-07 17:48:40,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2057 to 2057. [2019-12-07 17:48:40,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2057 states. [2019-12-07 17:48:40,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2057 states to 2057 states and 2467 transitions. [2019-12-07 17:48:40,251 INFO L78 Accepts]: Start accepts. Automaton has 2057 states and 2467 transitions. Word has length 228 [2019-12-07 17:48:40,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:40,251 INFO L462 AbstractCegarLoop]: Abstraction has 2057 states and 2467 transitions. [2019-12-07 17:48:40,251 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:40,251 INFO L276 IsEmpty]: Start isEmpty. Operand 2057 states and 2467 transitions. [2019-12-07 17:48:40,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 230 [2019-12-07 17:48:40,253 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:40,253 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:40,254 INFO L410 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:40,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:40,254 INFO L82 PathProgramCache]: Analyzing trace with hash -1507713799, now seen corresponding path program 1 times [2019-12-07 17:48:40,254 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:40,254 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1588084030] [2019-12-07 17:48:40,254 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:40,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:40,505 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 35 proven. 9 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2019-12-07 17:48:40,506 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1588084030] [2019-12-07 17:48:40,506 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1118963120] [2019-12-07 17:48:40,506 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:40,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:40,615 INFO L264 TraceCheckSpWp]: Trace formula consists of 946 conjuncts, 14 conjunts are in the unsatisfiable core [2019-12-07 17:48:40,618 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:48:40,710 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 3 proven. 32 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:48:40,711 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:48:40,711 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 16 [2019-12-07 17:48:40,711 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [43531906] [2019-12-07 17:48:40,712 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 17:48:40,712 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:40,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 17:48:40,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-12-07 17:48:40,712 INFO L87 Difference]: Start difference. First operand 2057 states and 2467 transitions. Second operand 16 states. [2019-12-07 17:48:44,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:44,712 INFO L93 Difference]: Finished difference Result 8531 states and 10465 transitions. [2019-12-07 17:48:44,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 106 states. [2019-12-07 17:48:44,713 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 229 [2019-12-07 17:48:44,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:44,717 INFO L225 Difference]: With dead ends: 8531 [2019-12-07 17:48:44,717 INFO L226 Difference]: Without dead ends: 6857 [2019-12-07 17:48:44,719 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 340 GetRequests, 225 SyntacticMatches, 0 SemanticMatches, 115 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4759 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=1357, Invalid=12215, Unknown=0, NotChecked=0, Total=13572 [2019-12-07 17:48:44,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6857 states. [2019-12-07 17:48:44,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6857 to 2967. [2019-12-07 17:48:44,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2967 states. [2019-12-07 17:48:44,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2967 states to 2967 states and 3540 transitions. [2019-12-07 17:48:44,915 INFO L78 Accepts]: Start accepts. Automaton has 2967 states and 3540 transitions. Word has length 229 [2019-12-07 17:48:44,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:44,915 INFO L462 AbstractCegarLoop]: Abstraction has 2967 states and 3540 transitions. [2019-12-07 17:48:44,915 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 17:48:44,915 INFO L276 IsEmpty]: Start isEmpty. Operand 2967 states and 3540 transitions. [2019-12-07 17:48:44,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 238 [2019-12-07 17:48:44,918 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:44,918 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:45,118 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:45,119 INFO L410 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:45,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:45,120 INFO L82 PathProgramCache]: Analyzing trace with hash 1687527961, now seen corresponding path program 1 times [2019-12-07 17:48:45,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:45,121 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [672527471] [2019-12-07 17:48:45,121 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:45,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:45,174 INFO L134 CoverageAnalysis]: Checked inductivity of 167 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 158 trivial. 0 not checked. [2019-12-07 17:48:45,174 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [672527471] [2019-12-07 17:48:45,175 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:45,175 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:45,175 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [944093222] [2019-12-07 17:48:45,175 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:45,175 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:45,175 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:45,175 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:45,176 INFO L87 Difference]: Start difference. First operand 2967 states and 3540 transitions. Second operand 3 states. [2019-12-07 17:48:45,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:45,369 INFO L93 Difference]: Finished difference Result 5623 states and 6694 transitions. [2019-12-07 17:48:45,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:45,369 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 237 [2019-12-07 17:48:45,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:45,370 INFO L225 Difference]: With dead ends: 5623 [2019-12-07 17:48:45,370 INFO L226 Difference]: Without dead ends: 2669 [2019-12-07 17:48:45,372 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:45,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2669 states. [2019-12-07 17:48:45,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2669 to 2669. [2019-12-07 17:48:45,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2669 states. [2019-12-07 17:48:45,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2669 states to 2669 states and 3160 transitions. [2019-12-07 17:48:45,543 INFO L78 Accepts]: Start accepts. Automaton has 2669 states and 3160 transitions. Word has length 237 [2019-12-07 17:48:45,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:45,544 INFO L462 AbstractCegarLoop]: Abstraction has 2669 states and 3160 transitions. [2019-12-07 17:48:45,544 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:45,544 INFO L276 IsEmpty]: Start isEmpty. Operand 2669 states and 3160 transitions. [2019-12-07 17:48:45,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2019-12-07 17:48:45,546 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:45,546 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:45,546 INFO L410 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:45,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:45,547 INFO L82 PathProgramCache]: Analyzing trace with hash -1310501868, now seen corresponding path program 1 times [2019-12-07 17:48:45,547 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:45,547 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1345473856] [2019-12-07 17:48:45,547 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:45,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:45,623 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2019-12-07 17:48:45,623 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1345473856] [2019-12-07 17:48:45,623 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:45,623 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:48:45,623 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1268377868] [2019-12-07 17:48:45,623 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:48:45,623 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:45,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:48:45,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:48:45,624 INFO L87 Difference]: Start difference. First operand 2669 states and 3160 transitions. Second operand 7 states. [2019-12-07 17:48:46,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:46,310 INFO L93 Difference]: Finished difference Result 7937 states and 9597 transitions. [2019-12-07 17:48:46,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 17:48:46,311 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 240 [2019-12-07 17:48:46,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:46,314 INFO L225 Difference]: With dead ends: 7937 [2019-12-07 17:48:46,314 INFO L226 Difference]: Without dead ends: 5675 [2019-12-07 17:48:46,316 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=101, Invalid=241, Unknown=0, NotChecked=0, Total=342 [2019-12-07 17:48:46,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5675 states. [2019-12-07 17:48:46,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5675 to 2483. [2019-12-07 17:48:46,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2483 states. [2019-12-07 17:48:46,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2483 states to 2483 states and 2941 transitions. [2019-12-07 17:48:46,495 INFO L78 Accepts]: Start accepts. Automaton has 2483 states and 2941 transitions. Word has length 240 [2019-12-07 17:48:46,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:46,495 INFO L462 AbstractCegarLoop]: Abstraction has 2483 states and 2941 transitions. [2019-12-07 17:48:46,496 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:48:46,496 INFO L276 IsEmpty]: Start isEmpty. Operand 2483 states and 2941 transitions. [2019-12-07 17:48:46,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2019-12-07 17:48:46,498 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:46,498 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:46,498 INFO L410 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:46,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:46,498 INFO L82 PathProgramCache]: Analyzing trace with hash -348054892, now seen corresponding path program 1 times [2019-12-07 17:48:46,498 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:46,498 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1597892353] [2019-12-07 17:48:46,499 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:46,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:46,567 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 41 proven. 6 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:48:46,567 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1597892353] [2019-12-07 17:48:46,567 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1847853273] [2019-12-07 17:48:46,567 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:46,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:46,673 INFO L264 TraceCheckSpWp]: Trace formula consists of 983 conjuncts, 5 conjunts are in the unsatisfiable core [2019-12-07 17:48:46,676 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:48:46,786 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 164 trivial. 0 not checked. [2019-12-07 17:48:46,787 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-12-07 17:48:46,787 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 9 [2019-12-07 17:48:46,787 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1306025957] [2019-12-07 17:48:46,787 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:48:46,787 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:46,788 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:48:46,788 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:48:46,788 INFO L87 Difference]: Start difference. First operand 2483 states and 2941 transitions. Second operand 5 states. [2019-12-07 17:48:47,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:47,006 INFO L93 Difference]: Finished difference Result 4650 states and 5529 transitions. [2019-12-07 17:48:47,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:48:47,006 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 240 [2019-12-07 17:48:47,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:47,008 INFO L225 Difference]: With dead ends: 4650 [2019-12-07 17:48:47,008 INFO L226 Difference]: Without dead ends: 2495 [2019-12-07 17:48:47,009 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 238 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:48:47,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2495 states. [2019-12-07 17:48:47,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2495 to 2491. [2019-12-07 17:48:47,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2491 states. [2019-12-07 17:48:47,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2491 states to 2491 states and 2945 transitions. [2019-12-07 17:48:47,178 INFO L78 Accepts]: Start accepts. Automaton has 2491 states and 2945 transitions. Word has length 240 [2019-12-07 17:48:47,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:47,179 INFO L462 AbstractCegarLoop]: Abstraction has 2491 states and 2945 transitions. [2019-12-07 17:48:47,179 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:48:47,179 INFO L276 IsEmpty]: Start isEmpty. Operand 2491 states and 2945 transitions. [2019-12-07 17:48:47,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 242 [2019-12-07 17:48:47,181 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:47,181 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:47,382 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:47,383 INFO L410 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:47,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:47,384 INFO L82 PathProgramCache]: Analyzing trace with hash 1245814331, now seen corresponding path program 1 times [2019-12-07 17:48:47,384 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:47,384 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1845100608] [2019-12-07 17:48:47,384 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:47,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:47,578 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 24 proven. 23 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:48:47,578 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1845100608] [2019-12-07 17:48:47,578 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [159080939] [2019-12-07 17:48:47,578 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:47,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:47,686 INFO L264 TraceCheckSpWp]: Trace formula consists of 986 conjuncts, 30 conjunts are in the unsatisfiable core [2019-12-07 17:48:47,688 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:48:47,956 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 39 proven. 30 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked. [2019-12-07 17:48:47,956 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:48:47,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 17] total 23 [2019-12-07 17:48:47,957 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1404972788] [2019-12-07 17:48:47,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2019-12-07 17:48:47,957 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:47,957 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2019-12-07 17:48:47,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=447, Unknown=0, NotChecked=0, Total=506 [2019-12-07 17:48:47,957 INFO L87 Difference]: Start difference. First operand 2491 states and 2945 transitions. Second operand 23 states. [2019-12-07 17:48:52,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:52,665 INFO L93 Difference]: Finished difference Result 8233 states and 10128 transitions. [2019-12-07 17:48:52,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 75 states. [2019-12-07 17:48:52,665 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 241 [2019-12-07 17:48:52,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:52,669 INFO L225 Difference]: With dead ends: 8233 [2019-12-07 17:48:52,669 INFO L226 Difference]: Without dead ends: 6118 [2019-12-07 17:48:52,671 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 320 GetRequests, 226 SyntacticMatches, 0 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2877 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1110, Invalid=8010, Unknown=0, NotChecked=0, Total=9120 [2019-12-07 17:48:52,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6118 states. [2019-12-07 17:48:52,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6118 to 2491. [2019-12-07 17:48:52,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2491 states. [2019-12-07 17:48:52,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2491 states to 2491 states and 2942 transitions. [2019-12-07 17:48:52,881 INFO L78 Accepts]: Start accepts. Automaton has 2491 states and 2942 transitions. Word has length 241 [2019-12-07 17:48:52,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:52,882 INFO L462 AbstractCegarLoop]: Abstraction has 2491 states and 2942 transitions. [2019-12-07 17:48:52,882 INFO L463 AbstractCegarLoop]: Interpolant automaton has 23 states. [2019-12-07 17:48:52,882 INFO L276 IsEmpty]: Start isEmpty. Operand 2491 states and 2942 transitions. [2019-12-07 17:48:52,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 249 [2019-12-07 17:48:52,884 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:52,884 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:53,084 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:53,085 INFO L410 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:53,086 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:53,086 INFO L82 PathProgramCache]: Analyzing trace with hash -675126650, now seen corresponding path program 1 times [2019-12-07 17:48:53,087 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:53,087 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1968347826] [2019-12-07 17:48:53,087 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:53,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:53,318 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 43 proven. 9 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2019-12-07 17:48:53,318 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1968347826] [2019-12-07 17:48:53,318 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1514722205] [2019-12-07 17:48:53,318 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:53,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:53,429 INFO L264 TraceCheckSpWp]: Trace formula consists of 1006 conjuncts, 30 conjunts are in the unsatisfiable core [2019-12-07 17:48:53,431 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:48:53,664 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 27 proven. 34 refuted. 0 times theorem prover too weak. 97 trivial. 0 not checked. [2019-12-07 17:48:53,664 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:48:53,664 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 17] total 21 [2019-12-07 17:48:53,664 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1371427489] [2019-12-07 17:48:53,665 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 17:48:53,665 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:53,665 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 17:48:53,665 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=358, Unknown=0, NotChecked=0, Total=420 [2019-12-07 17:48:53,665 INFO L87 Difference]: Start difference. First operand 2491 states and 2942 transitions. Second operand 21 states. [2019-12-07 17:48:54,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:54,488 INFO L93 Difference]: Finished difference Result 6158 states and 7414 transitions. [2019-12-07 17:48:54,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 17:48:54,488 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 248 [2019-12-07 17:48:54,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:54,490 INFO L225 Difference]: With dead ends: 6158 [2019-12-07 17:48:54,490 INFO L226 Difference]: Without dead ends: 4043 [2019-12-07 17:48:54,492 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 276 GetRequests, 237 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 378 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=234, Invalid=1326, Unknown=0, NotChecked=0, Total=1560 [2019-12-07 17:48:54,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4043 states. [2019-12-07 17:48:54,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4043 to 2491. [2019-12-07 17:48:54,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2491 states. [2019-12-07 17:48:54,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2491 states to 2491 states and 2939 transitions. [2019-12-07 17:48:54,690 INFO L78 Accepts]: Start accepts. Automaton has 2491 states and 2939 transitions. Word has length 248 [2019-12-07 17:48:54,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:54,690 INFO L462 AbstractCegarLoop]: Abstraction has 2491 states and 2939 transitions. [2019-12-07 17:48:54,690 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 17:48:54,690 INFO L276 IsEmpty]: Start isEmpty. Operand 2491 states and 2939 transitions. [2019-12-07 17:48:54,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2019-12-07 17:48:54,692 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:54,693 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:54,893 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:54,894 INFO L410 AbstractCegarLoop]: === Iteration 44 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:54,894 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:54,895 INFO L82 PathProgramCache]: Analyzing trace with hash -322502596, now seen corresponding path program 1 times [2019-12-07 17:48:54,895 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:54,895 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [629654158] [2019-12-07 17:48:54,896 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:54,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:55,156 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 18 proven. 17 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:48:55,157 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [629654158] [2019-12-07 17:48:55,157 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [223455742] [2019-12-07 17:48:55,157 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:48:55,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:55,271 INFO L264 TraceCheckSpWp]: Trace formula consists of 1078 conjuncts, 32 conjunts are in the unsatisfiable core [2019-12-07 17:48:55,273 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:48:55,617 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 18 proven. 30 refuted. 0 times theorem prover too weak. 110 trivial. 0 not checked. [2019-12-07 17:48:55,617 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:48:55,618 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 16] total 25 [2019-12-07 17:48:55,618 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1139271409] [2019-12-07 17:48:55,618 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-12-07 17:48:55,618 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:55,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 17:48:55,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=519, Unknown=0, NotChecked=0, Total=650 [2019-12-07 17:48:55,619 INFO L87 Difference]: Start difference. First operand 2491 states and 2939 transitions. Second operand 26 states. [2019-12-07 17:49:01,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:01,119 INFO L93 Difference]: Finished difference Result 22476 states and 27854 transitions. [2019-12-07 17:49:01,120 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2019-12-07 17:49:01,120 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 264 [2019-12-07 17:49:01,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:01,133 INFO L225 Difference]: With dead ends: 22476 [2019-12-07 17:49:01,134 INFO L226 Difference]: Without dead ends: 20394 [2019-12-07 17:49:01,138 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 342 GetRequests, 249 SyntacticMatches, 0 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2703 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1437, Invalid=7493, Unknown=0, NotChecked=0, Total=8930 [2019-12-07 17:49:01,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20394 states. [2019-12-07 17:49:01,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20394 to 4207. [2019-12-07 17:49:01,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4207 states. [2019-12-07 17:49:01,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4207 states to 4207 states and 5014 transitions. [2019-12-07 17:49:01,568 INFO L78 Accepts]: Start accepts. Automaton has 4207 states and 5014 transitions. Word has length 264 [2019-12-07 17:49:01,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:01,568 INFO L462 AbstractCegarLoop]: Abstraction has 4207 states and 5014 transitions. [2019-12-07 17:49:01,568 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-12-07 17:49:01,568 INFO L276 IsEmpty]: Start isEmpty. Operand 4207 states and 5014 transitions. [2019-12-07 17:49:01,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2019-12-07 17:49:01,572 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:01,572 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:01,772 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:49:01,773 INFO L410 AbstractCegarLoop]: === Iteration 45 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:01,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:01,774 INFO L82 PathProgramCache]: Analyzing trace with hash 539331006, now seen corresponding path program 1 times [2019-12-07 17:49:01,774 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:01,775 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [370400152] [2019-12-07 17:49:01,775 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:01,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:01,873 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 151 trivial. 0 not checked. [2019-12-07 17:49:01,874 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [370400152] [2019-12-07 17:49:01,874 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:01,874 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:49:01,874 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2120286784] [2019-12-07 17:49:01,874 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:49:01,874 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:01,874 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:49:01,875 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:49:01,875 INFO L87 Difference]: Start difference. First operand 4207 states and 5014 transitions. Second operand 5 states. [2019-12-07 17:49:02,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:02,290 INFO L93 Difference]: Finished difference Result 8122 states and 9711 transitions. [2019-12-07 17:49:02,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:49:02,291 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 264 [2019-12-07 17:49:02,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:02,293 INFO L225 Difference]: With dead ends: 8122 [2019-12-07 17:49:02,293 INFO L226 Difference]: Without dead ends: 4261 [2019-12-07 17:49:02,296 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:49:02,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4261 states. [2019-12-07 17:49:02,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4261 to 4243. [2019-12-07 17:49:02,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4243 states. [2019-12-07 17:49:02,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4243 states to 4243 states and 5038 transitions. [2019-12-07 17:49:02,666 INFO L78 Accepts]: Start accepts. Automaton has 4243 states and 5038 transitions. Word has length 264 [2019-12-07 17:49:02,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:02,666 INFO L462 AbstractCegarLoop]: Abstraction has 4243 states and 5038 transitions. [2019-12-07 17:49:02,666 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:49:02,666 INFO L276 IsEmpty]: Start isEmpty. Operand 4243 states and 5038 transitions. [2019-12-07 17:49:02,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 266 [2019-12-07 17:49:02,670 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:02,670 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:02,670 INFO L410 AbstractCegarLoop]: === Iteration 46 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:02,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:02,670 INFO L82 PathProgramCache]: Analyzing trace with hash 1201358226, now seen corresponding path program 1 times [2019-12-07 17:49:02,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:02,671 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324335518] [2019-12-07 17:49:02,671 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:02,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:02,828 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 24 proven. 23 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:49:02,828 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1324335518] [2019-12-07 17:49:02,828 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1039693256] [2019-12-07 17:49:02,828 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:49:02,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:02,966 INFO L264 TraceCheckSpWp]: Trace formula consists of 1080 conjuncts, 14 conjunts are in the unsatisfiable core [2019-12-07 17:49:02,968 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:49:03,111 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 28 proven. 19 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:49:03,112 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:49:03,112 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2019-12-07 17:49:03,112 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [416503186] [2019-12-07 17:49:03,112 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:49:03,112 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:03,112 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:49:03,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:49:03,113 INFO L87 Difference]: Start difference. First operand 4243 states and 5038 transitions. Second operand 14 states. [2019-12-07 17:49:05,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:05,020 INFO L93 Difference]: Finished difference Result 14186 states and 17350 transitions. [2019-12-07 17:49:05,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 17:49:05,021 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 265 [2019-12-07 17:49:05,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:05,026 INFO L225 Difference]: With dead ends: 14186 [2019-12-07 17:49:05,026 INFO L226 Difference]: Without dead ends: 10506 [2019-12-07 17:49:05,029 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 293 GetRequests, 259 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 238 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=324, Invalid=936, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 17:49:05,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10506 states. [2019-12-07 17:49:05,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10506 to 4231. [2019-12-07 17:49:05,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4231 states. [2019-12-07 17:49:05,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4231 states to 4231 states and 5026 transitions. [2019-12-07 17:49:05,435 INFO L78 Accepts]: Start accepts. Automaton has 4231 states and 5026 transitions. Word has length 265 [2019-12-07 17:49:05,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:05,435 INFO L462 AbstractCegarLoop]: Abstraction has 4231 states and 5026 transitions. [2019-12-07 17:49:05,435 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:49:05,435 INFO L276 IsEmpty]: Start isEmpty. Operand 4231 states and 5026 transitions. [2019-12-07 17:49:05,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 266 [2019-12-07 17:49:05,439 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:05,439 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:05,640 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:49:05,641 INFO L410 AbstractCegarLoop]: === Iteration 47 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:05,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:05,642 INFO L82 PathProgramCache]: Analyzing trace with hash 1876518352, now seen corresponding path program 1 times [2019-12-07 17:49:05,643 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:05,643 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [516033853] [2019-12-07 17:49:05,644 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:05,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:05,743 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2019-12-07 17:49:05,743 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [516033853] [2019-12-07 17:49:05,744 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:05,744 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:05,744 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1813725670] [2019-12-07 17:49:05,744 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:05,744 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:05,744 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:05,744 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:05,744 INFO L87 Difference]: Start difference. First operand 4231 states and 5026 transitions. Second operand 3 states. [2019-12-07 17:49:05,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:05,937 INFO L93 Difference]: Finished difference Result 5913 states and 7034 transitions. [2019-12-07 17:49:05,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:05,937 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 265 [2019-12-07 17:49:05,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:05,939 INFO L225 Difference]: With dead ends: 5913 [2019-12-07 17:49:05,939 INFO L226 Difference]: Without dead ends: 2088 [2019-12-07 17:49:05,941 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:05,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2088 states. [2019-12-07 17:49:06,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2088 to 2088. [2019-12-07 17:49:06,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2088 states. [2019-12-07 17:49:06,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2088 states to 2088 states and 2452 transitions. [2019-12-07 17:49:06,132 INFO L78 Accepts]: Start accepts. Automaton has 2088 states and 2452 transitions. Word has length 265 [2019-12-07 17:49:06,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:06,132 INFO L462 AbstractCegarLoop]: Abstraction has 2088 states and 2452 transitions. [2019-12-07 17:49:06,132 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:06,132 INFO L276 IsEmpty]: Start isEmpty. Operand 2088 states and 2452 transitions. [2019-12-07 17:49:06,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 266 [2019-12-07 17:49:06,135 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:06,135 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:06,135 INFO L410 AbstractCegarLoop]: === Iteration 48 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:06,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:06,135 INFO L82 PathProgramCache]: Analyzing trace with hash 80022852, now seen corresponding path program 1 times [2019-12-07 17:49:06,135 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:06,135 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1947023137] [2019-12-07 17:49:06,135 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:06,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:06,216 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 139 trivial. 0 not checked. [2019-12-07 17:49:06,217 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1947023137] [2019-12-07 17:49:06,217 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:06,217 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:49:06,217 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1217912504] [2019-12-07 17:49:06,217 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 17:49:06,217 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:06,217 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 17:49:06,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:49:06,217 INFO L87 Difference]: Start difference. First operand 2088 states and 2452 transitions. Second operand 8 states. [2019-12-07 17:49:07,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:07,291 INFO L93 Difference]: Finished difference Result 6894 states and 8362 transitions. [2019-12-07 17:49:07,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 17:49:07,291 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 265 [2019-12-07 17:49:07,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:07,294 INFO L225 Difference]: With dead ends: 6894 [2019-12-07 17:49:07,294 INFO L226 Difference]: Without dead ends: 5215 [2019-12-07 17:49:07,296 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 221 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=235, Invalid=695, Unknown=0, NotChecked=0, Total=930 [2019-12-07 17:49:07,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5215 states. [2019-12-07 17:49:07,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5215 to 2046. [2019-12-07 17:49:07,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2046 states. [2019-12-07 17:49:07,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2046 states to 2046 states and 2404 transitions. [2019-12-07 17:49:07,497 INFO L78 Accepts]: Start accepts. Automaton has 2046 states and 2404 transitions. Word has length 265 [2019-12-07 17:49:07,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:07,497 INFO L462 AbstractCegarLoop]: Abstraction has 2046 states and 2404 transitions. [2019-12-07 17:49:07,497 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 17:49:07,497 INFO L276 IsEmpty]: Start isEmpty. Operand 2046 states and 2404 transitions. [2019-12-07 17:49:07,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 266 [2019-12-07 17:49:07,499 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:07,499 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:07,499 INFO L410 AbstractCegarLoop]: === Iteration 49 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:07,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:07,500 INFO L82 PathProgramCache]: Analyzing trace with hash -1720354979, now seen corresponding path program 1 times [2019-12-07 17:49:07,500 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:07,500 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1107570677] [2019-12-07 17:49:07,500 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:07,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:07,753 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 18 proven. 17 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:49:07,753 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1107570677] [2019-12-07 17:49:07,753 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1407845768] [2019-12-07 17:49:07,753 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:49:07,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:07,870 INFO L264 TraceCheckSpWp]: Trace formula consists of 1079 conjuncts, 17 conjunts are in the unsatisfiable core [2019-12-07 17:49:07,874 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:49:08,036 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 25 proven. 10 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:49:08,037 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:49:08,037 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 17 [2019-12-07 17:49:08,037 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [992392061] [2019-12-07 17:49:08,037 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 17:49:08,037 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:08,038 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 17:49:08,038 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=235, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:49:08,038 INFO L87 Difference]: Start difference. First operand 2046 states and 2404 transitions. Second operand 18 states. [2019-12-07 17:49:10,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:10,537 INFO L93 Difference]: Finished difference Result 11016 states and 13491 transitions. [2019-12-07 17:49:10,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2019-12-07 17:49:10,538 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 265 [2019-12-07 17:49:10,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:10,542 INFO L225 Difference]: With dead ends: 11016 [2019-12-07 17:49:10,542 INFO L226 Difference]: Without dead ends: 9379 [2019-12-07 17:49:10,544 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 320 GetRequests, 258 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1091 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=989, Invalid=3043, Unknown=0, NotChecked=0, Total=4032 [2019-12-07 17:49:10,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9379 states. [2019-12-07 17:49:10,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9379 to 2046. [2019-12-07 17:49:10,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2046 states. [2019-12-07 17:49:10,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2046 states to 2046 states and 2404 transitions. [2019-12-07 17:49:10,770 INFO L78 Accepts]: Start accepts. Automaton has 2046 states and 2404 transitions. Word has length 265 [2019-12-07 17:49:10,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:10,770 INFO L462 AbstractCegarLoop]: Abstraction has 2046 states and 2404 transitions. [2019-12-07 17:49:10,770 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 17:49:10,770 INFO L276 IsEmpty]: Start isEmpty. Operand 2046 states and 2404 transitions. [2019-12-07 17:49:10,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 266 [2019-12-07 17:49:10,772 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:10,773 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:10,973 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:49:10,973 INFO L410 AbstractCegarLoop]: === Iteration 50 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:10,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:10,974 INFO L82 PathProgramCache]: Analyzing trace with hash 703983254, now seen corresponding path program 1 times [2019-12-07 17:49:10,974 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:10,975 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [200549597] [2019-12-07 17:49:10,975 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:11,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:11,196 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 2 proven. 33 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:49:11,197 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [200549597] [2019-12-07 17:49:11,197 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [716036388] [2019-12-07 17:49:11,197 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:49:11,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:11,305 INFO L264 TraceCheckSpWp]: Trace formula consists of 1079 conjuncts, 14 conjunts are in the unsatisfiable core [2019-12-07 17:49:11,308 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:49:11,434 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 6 proven. 29 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:49:11,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:49:11,435 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8] total 19 [2019-12-07 17:49:11,435 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [115271728] [2019-12-07 17:49:11,435 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 17:49:11,435 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:11,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 17:49:11,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=306, Unknown=0, NotChecked=0, Total=342 [2019-12-07 17:49:11,435 INFO L87 Difference]: Start difference. First operand 2046 states and 2404 transitions. Second operand 19 states. [2019-12-07 17:49:45,347 WARN L192 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 33 [2019-12-07 17:49:51,800 WARN L192 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 37 [2019-12-07 17:49:53,054 WARN L192 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 40 [2019-12-07 17:50:26,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:26,700 INFO L93 Difference]: Finished difference Result 114816 states and 138567 transitions. [2019-12-07 17:50:26,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 1619 states. [2019-12-07 17:50:26,701 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 265 [2019-12-07 17:50:26,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:26,796 INFO L225 Difference]: With dead ends: 114816 [2019-12-07 17:50:26,796 INFO L226 Difference]: Without dead ends: 113179 [2019-12-07 17:50:26,897 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2048 GetRequests, 415 SyntacticMatches, 0 SemanticMatches, 1633 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1304448 ImplicationChecksByTransitivity, 47.5s TimeCoverageRelationStatistics Valid=115286, Invalid=2556304, Unknown=0, NotChecked=0, Total=2671590 [2019-12-07 17:50:26,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113179 states. [2019-12-07 17:50:27,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113179 to 3824. [2019-12-07 17:50:27,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3824 states. [2019-12-07 17:50:27,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3824 states to 3824 states and 4518 transitions. [2019-12-07 17:50:27,852 INFO L78 Accepts]: Start accepts. Automaton has 3824 states and 4518 transitions. Word has length 265 [2019-12-07 17:50:27,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:27,853 INFO L462 AbstractCegarLoop]: Abstraction has 3824 states and 4518 transitions. [2019-12-07 17:50:27,853 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 17:50:27,853 INFO L276 IsEmpty]: Start isEmpty. Operand 3824 states and 4518 transitions. [2019-12-07 17:50:27,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 267 [2019-12-07 17:50:27,857 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:27,857 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:28,057 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:50:28,058 INFO L410 AbstractCegarLoop]: === Iteration 51 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:28,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:28,059 INFO L82 PathProgramCache]: Analyzing trace with hash 1571044846, now seen corresponding path program 1 times [2019-12-07 17:50:28,059 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:28,060 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1386333421] [2019-12-07 17:50:28,060 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:28,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:28,165 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 140 trivial. 0 not checked. [2019-12-07 17:50:28,165 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1386333421] [2019-12-07 17:50:28,166 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:28,166 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:50:28,166 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1259015693] [2019-12-07 17:50:28,166 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:50:28,166 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:28,166 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:50:28,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:50:28,166 INFO L87 Difference]: Start difference. First operand 3824 states and 4518 transitions. Second operand 7 states. [2019-12-07 17:50:29,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:29,385 INFO L93 Difference]: Finished difference Result 9131 states and 11067 transitions. [2019-12-07 17:50:29,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:50:29,385 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 266 [2019-12-07 17:50:29,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:29,389 INFO L225 Difference]: With dead ends: 9131 [2019-12-07 17:50:29,389 INFO L226 Difference]: Without dead ends: 5831 [2019-12-07 17:50:29,391 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:50:29,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5831 states. [2019-12-07 17:50:29,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5831 to 4169. [2019-12-07 17:50:29,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4169 states. [2019-12-07 17:50:29,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4169 states to 4169 states and 4938 transitions. [2019-12-07 17:50:29,964 INFO L78 Accepts]: Start accepts. Automaton has 4169 states and 4938 transitions. Word has length 266 [2019-12-07 17:50:29,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:29,965 INFO L462 AbstractCegarLoop]: Abstraction has 4169 states and 4938 transitions. [2019-12-07 17:50:29,965 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:50:29,965 INFO L276 IsEmpty]: Start isEmpty. Operand 4169 states and 4938 transitions. [2019-12-07 17:50:29,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 267 [2019-12-07 17:50:29,969 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:29,969 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:29,969 INFO L410 AbstractCegarLoop]: === Iteration 52 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:29,969 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:29,969 INFO L82 PathProgramCache]: Analyzing trace with hash -1723113759, now seen corresponding path program 1 times [2019-12-07 17:50:29,969 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:29,969 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889282822] [2019-12-07 17:50:29,969 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:29,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:30,199 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 18 proven. 17 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:50:30,199 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1889282822] [2019-12-07 17:50:30,199 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1742117557] [2019-12-07 17:50:30,199 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:50:30,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:30,319 INFO L264 TraceCheckSpWp]: Trace formula consists of 1080 conjuncts, 16 conjunts are in the unsatisfiable core [2019-12-07 17:50:30,322 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:50:30,485 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 25 proven. 10 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:50:30,485 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:50:30,485 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 17 [2019-12-07 17:50:30,485 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [597617812] [2019-12-07 17:50:30,486 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 17:50:30,486 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:30,486 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 17:50:30,486 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=235, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:50:30,486 INFO L87 Difference]: Start difference. First operand 4169 states and 4938 transitions. Second operand 18 states. [2019-12-07 17:50:35,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:35,450 INFO L93 Difference]: Finished difference Result 21603 states and 26510 transitions. [2019-12-07 17:50:35,450 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2019-12-07 17:50:35,450 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 266 [2019-12-07 17:50:35,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:35,460 INFO L225 Difference]: With dead ends: 21603 [2019-12-07 17:50:35,460 INFO L226 Difference]: Without dead ends: 17958 [2019-12-07 17:50:35,463 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 321 GetRequests, 259 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1090 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=989, Invalid=3043, Unknown=0, NotChecked=0, Total=4032 [2019-12-07 17:50:35,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17958 states. [2019-12-07 17:50:36,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17958 to 4157. [2019-12-07 17:50:36,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4157 states. [2019-12-07 17:50:36,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4157 states to 4157 states and 4926 transitions. [2019-12-07 17:50:36,111 INFO L78 Accepts]: Start accepts. Automaton has 4157 states and 4926 transitions. Word has length 266 [2019-12-07 17:50:36,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:36,111 INFO L462 AbstractCegarLoop]: Abstraction has 4157 states and 4926 transitions. [2019-12-07 17:50:36,111 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 17:50:36,111 INFO L276 IsEmpty]: Start isEmpty. Operand 4157 states and 4926 transitions. [2019-12-07 17:50:36,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 267 [2019-12-07 17:50:36,115 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:36,115 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:36,316 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:50:36,316 INFO L410 AbstractCegarLoop]: === Iteration 53 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:36,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:36,317 INFO L82 PathProgramCache]: Analyzing trace with hash 1865256931, now seen corresponding path program 1 times [2019-12-07 17:50:36,318 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:36,318 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1739968714] [2019-12-07 17:50:36,318 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:36,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:36,410 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 151 trivial. 0 not checked. [2019-12-07 17:50:36,410 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1739968714] [2019-12-07 17:50:36,410 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:36,410 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:50:36,410 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [77476310] [2019-12-07 17:50:36,411 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:50:36,411 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:36,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:50:36,411 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:36,411 INFO L87 Difference]: Start difference. First operand 4157 states and 4926 transitions. Second operand 3 states. [2019-12-07 17:50:36,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:36,857 INFO L93 Difference]: Finished difference Result 6713 states and 7941 transitions. [2019-12-07 17:50:36,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:50:36,858 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 266 [2019-12-07 17:50:36,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:36,859 INFO L225 Difference]: With dead ends: 6713 [2019-12-07 17:50:36,860 INFO L226 Difference]: Without dead ends: 2818 [2019-12-07 17:50:36,862 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:36,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2818 states. [2019-12-07 17:50:37,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2818 to 2818. [2019-12-07 17:50:37,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2818 states. [2019-12-07 17:50:37,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2818 states to 2818 states and 3294 transitions. [2019-12-07 17:50:37,314 INFO L78 Accepts]: Start accepts. Automaton has 2818 states and 3294 transitions. Word has length 266 [2019-12-07 17:50:37,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:37,314 INFO L462 AbstractCegarLoop]: Abstraction has 2818 states and 3294 transitions. [2019-12-07 17:50:37,314 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:50:37,314 INFO L276 IsEmpty]: Start isEmpty. Operand 2818 states and 3294 transitions. [2019-12-07 17:50:37,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 268 [2019-12-07 17:50:37,317 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:37,317 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:37,317 INFO L410 AbstractCegarLoop]: === Iteration 54 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:37,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:37,318 INFO L82 PathProgramCache]: Analyzing trace with hash 1191412212, now seen corresponding path program 1 times [2019-12-07 17:50:37,318 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:37,318 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095673094] [2019-12-07 17:50:37,318 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:37,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:37,390 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 139 trivial. 0 not checked. [2019-12-07 17:50:37,390 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1095673094] [2019-12-07 17:50:37,390 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:37,391 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:50:37,391 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1905998800] [2019-12-07 17:50:37,391 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:50:37,391 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:37,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:50:37,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:50:37,391 INFO L87 Difference]: Start difference. First operand 2818 states and 3294 transitions. Second operand 7 states. [2019-12-07 17:50:38,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:38,515 INFO L93 Difference]: Finished difference Result 6323 states and 7553 transitions. [2019-12-07 17:50:38,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:50:38,516 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 267 [2019-12-07 17:50:38,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:38,518 INFO L225 Difference]: With dead ends: 6323 [2019-12-07 17:50:38,518 INFO L226 Difference]: Without dead ends: 3936 [2019-12-07 17:50:38,520 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:50:38,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3936 states. [2019-12-07 17:50:39,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3936 to 2918. [2019-12-07 17:50:39,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2918 states. [2019-12-07 17:50:39,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2918 states to 2918 states and 3410 transitions. [2019-12-07 17:50:39,015 INFO L78 Accepts]: Start accepts. Automaton has 2918 states and 3410 transitions. Word has length 267 [2019-12-07 17:50:39,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:39,015 INFO L462 AbstractCegarLoop]: Abstraction has 2918 states and 3410 transitions. [2019-12-07 17:50:39,015 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:50:39,015 INFO L276 IsEmpty]: Start isEmpty. Operand 2918 states and 3410 transitions. [2019-12-07 17:50:39,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 268 [2019-12-07 17:50:39,018 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:39,018 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:39,018 INFO L410 AbstractCegarLoop]: === Iteration 55 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:39,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:39,018 INFO L82 PathProgramCache]: Analyzing trace with hash -478062906, now seen corresponding path program 1 times [2019-12-07 17:50:39,018 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:39,019 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [880527925] [2019-12-07 17:50:39,019 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:39,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:39,104 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 140 trivial. 0 not checked. [2019-12-07 17:50:39,104 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [880527925] [2019-12-07 17:50:39,104 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:39,105 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:50:39,105 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [139317180] [2019-12-07 17:50:39,105 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:50:39,105 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:39,105 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:50:39,105 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:50:39,105 INFO L87 Difference]: Start difference. First operand 2918 states and 3410 transitions. Second operand 7 states. [2019-12-07 17:50:40,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:40,009 INFO L93 Difference]: Finished difference Result 6091 states and 7237 transitions. [2019-12-07 17:50:40,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 17:50:40,010 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 267 [2019-12-07 17:50:40,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:40,012 INFO L225 Difference]: With dead ends: 6091 [2019-12-07 17:50:40,012 INFO L226 Difference]: Without dead ends: 3604 [2019-12-07 17:50:40,013 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:50:40,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3604 states. [2019-12-07 17:50:40,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3604 to 2918. [2019-12-07 17:50:40,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2918 states. [2019-12-07 17:50:40,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2918 states to 2918 states and 3406 transitions. [2019-12-07 17:50:40,514 INFO L78 Accepts]: Start accepts. Automaton has 2918 states and 3406 transitions. Word has length 267 [2019-12-07 17:50:40,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:40,514 INFO L462 AbstractCegarLoop]: Abstraction has 2918 states and 3406 transitions. [2019-12-07 17:50:40,514 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:50:40,514 INFO L276 IsEmpty]: Start isEmpty. Operand 2918 states and 3406 transitions. [2019-12-07 17:50:40,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 272 [2019-12-07 17:50:40,516 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:40,516 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:40,517 INFO L410 AbstractCegarLoop]: === Iteration 56 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:40,517 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:40,517 INFO L82 PathProgramCache]: Analyzing trace with hash 606334927, now seen corresponding path program 1 times [2019-12-07 17:50:40,517 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:40,517 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [311532150] [2019-12-07 17:50:40,517 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:40,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:40,599 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2019-12-07 17:50:40,599 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [311532150] [2019-12-07 17:50:40,599 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:40,599 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:50:40,599 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1889055286] [2019-12-07 17:50:40,600 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 17:50:40,600 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:40,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 17:50:40,600 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:50:40,600 INFO L87 Difference]: Start difference. First operand 2918 states and 3406 transitions. Second operand 8 states. [2019-12-07 17:50:42,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:42,659 INFO L93 Difference]: Finished difference Result 8409 states and 10120 transitions. [2019-12-07 17:50:42,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 17:50:42,660 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 271 [2019-12-07 17:50:42,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:42,663 INFO L225 Difference]: With dead ends: 8409 [2019-12-07 17:50:42,663 INFO L226 Difference]: Without dead ends: 5922 [2019-12-07 17:50:42,664 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=129, Invalid=291, Unknown=0, NotChecked=0, Total=420 [2019-12-07 17:50:42,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5922 states. [2019-12-07 17:50:43,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5922 to 2894. [2019-12-07 17:50:43,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2894 states. [2019-12-07 17:50:43,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2894 states to 2894 states and 3374 transitions. [2019-12-07 17:50:43,172 INFO L78 Accepts]: Start accepts. Automaton has 2894 states and 3374 transitions. Word has length 271 [2019-12-07 17:50:43,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:43,172 INFO L462 AbstractCegarLoop]: Abstraction has 2894 states and 3374 transitions. [2019-12-07 17:50:43,172 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 17:50:43,172 INFO L276 IsEmpty]: Start isEmpty. Operand 2894 states and 3374 transitions. [2019-12-07 17:50:43,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 273 [2019-12-07 17:50:43,174 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:43,174 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:43,174 INFO L410 AbstractCegarLoop]: === Iteration 57 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:43,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:43,174 INFO L82 PathProgramCache]: Analyzing trace with hash 1502529818, now seen corresponding path program 1 times [2019-12-07 17:50:43,175 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:43,175 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [244977877] [2019-12-07 17:50:43,175 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:43,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:43,252 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 32 proven. 3 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:50:43,252 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [244977877] [2019-12-07 17:50:43,252 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1808670672] [2019-12-07 17:50:43,252 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:50:43,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:43,371 INFO L264 TraceCheckSpWp]: Trace formula consists of 1097 conjuncts, 5 conjunts are in the unsatisfiable core [2019-12-07 17:50:43,373 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:50:43,455 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2019-12-07 17:50:43,456 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-12-07 17:50:43,456 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 9 [2019-12-07 17:50:43,456 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1763987079] [2019-12-07 17:50:43,456 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:50:43,456 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:43,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:50:43,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:50:43,457 INFO L87 Difference]: Start difference. First operand 2894 states and 3374 transitions. Second operand 5 states. [2019-12-07 17:50:43,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:43,979 INFO L93 Difference]: Finished difference Result 5568 states and 6514 transitions. [2019-12-07 17:50:43,979 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:50:43,979 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 272 [2019-12-07 17:50:43,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:43,981 INFO L225 Difference]: With dead ends: 5568 [2019-12-07 17:50:43,981 INFO L226 Difference]: Without dead ends: 2939 [2019-12-07 17:50:43,982 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 277 GetRequests, 270 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:50:43,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2939 states. [2019-12-07 17:50:44,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2939 to 2924. [2019-12-07 17:50:44,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2924 states. [2019-12-07 17:50:44,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2924 states to 2924 states and 3399 transitions. [2019-12-07 17:50:44,489 INFO L78 Accepts]: Start accepts. Automaton has 2924 states and 3399 transitions. Word has length 272 [2019-12-07 17:50:44,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:44,490 INFO L462 AbstractCegarLoop]: Abstraction has 2924 states and 3399 transitions. [2019-12-07 17:50:44,490 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:50:44,490 INFO L276 IsEmpty]: Start isEmpty. Operand 2924 states and 3399 transitions. [2019-12-07 17:50:44,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 274 [2019-12-07 17:50:44,491 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:44,491 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:44,692 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:50:44,692 INFO L410 AbstractCegarLoop]: === Iteration 58 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:44,693 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:44,693 INFO L82 PathProgramCache]: Analyzing trace with hash 2118030896, now seen corresponding path program 1 times [2019-12-07 17:50:44,693 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:44,694 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285213877] [2019-12-07 17:50:44,694 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:44,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:44,777 INFO L134 CoverageAnalysis]: Checked inductivity of 186 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2019-12-07 17:50:44,777 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1285213877] [2019-12-07 17:50:44,778 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:44,778 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:50:44,778 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [540462614] [2019-12-07 17:50:44,778 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:50:44,778 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:44,778 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:50:44,778 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:44,778 INFO L87 Difference]: Start difference. First operand 2924 states and 3399 transitions. Second operand 3 states. [2019-12-07 17:50:45,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:45,555 INFO L93 Difference]: Finished difference Result 5961 states and 7002 transitions. [2019-12-07 17:50:45,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:50:45,555 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 273 [2019-12-07 17:50:45,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:45,557 INFO L225 Difference]: With dead ends: 5961 [2019-12-07 17:50:45,557 INFO L226 Difference]: Without dead ends: 3474 [2019-12-07 17:50:45,558 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:45,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3474 states. [2019-12-07 17:50:46,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3474 to 2924. [2019-12-07 17:50:46,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2924 states. [2019-12-07 17:50:46,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2924 states to 2924 states and 3383 transitions. [2019-12-07 17:50:46,057 INFO L78 Accepts]: Start accepts. Automaton has 2924 states and 3383 transitions. Word has length 273 [2019-12-07 17:50:46,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:46,057 INFO L462 AbstractCegarLoop]: Abstraction has 2924 states and 3383 transitions. [2019-12-07 17:50:46,057 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:50:46,057 INFO L276 IsEmpty]: Start isEmpty. Operand 2924 states and 3383 transitions. [2019-12-07 17:50:46,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 274 [2019-12-07 17:50:46,059 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:46,059 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:46,059 INFO L410 AbstractCegarLoop]: === Iteration 59 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:46,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:46,059 INFO L82 PathProgramCache]: Analyzing trace with hash 397281774, now seen corresponding path program 1 times [2019-12-07 17:50:46,059 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:46,059 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [896732540] [2019-12-07 17:50:46,060 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:46,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:46,137 INFO L134 CoverageAnalysis]: Checked inductivity of 186 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2019-12-07 17:50:46,138 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [896732540] [2019-12-07 17:50:46,138 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:46,138 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:50:46,138 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [772433926] [2019-12-07 17:50:46,138 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 17:50:46,138 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:46,138 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 17:50:46,138 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:50:46,138 INFO L87 Difference]: Start difference. First operand 2924 states and 3383 transitions. Second operand 8 states. [2019-12-07 17:50:48,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:48,217 INFO L93 Difference]: Finished difference Result 8783 states and 10425 transitions. [2019-12-07 17:50:48,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 17:50:48,217 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 273 [2019-12-07 17:50:48,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:48,222 INFO L225 Difference]: With dead ends: 8783 [2019-12-07 17:50:48,222 INFO L226 Difference]: Without dead ends: 6244 [2019-12-07 17:50:48,224 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=129, Invalid=291, Unknown=0, NotChecked=0, Total=420 [2019-12-07 17:50:48,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6244 states. [2019-12-07 17:50:48,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6244 to 2848. [2019-12-07 17:50:48,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2848 states. [2019-12-07 17:50:48,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2848 states to 2848 states and 3271 transitions. [2019-12-07 17:50:48,762 INFO L78 Accepts]: Start accepts. Automaton has 2848 states and 3271 transitions. Word has length 273 [2019-12-07 17:50:48,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:48,762 INFO L462 AbstractCegarLoop]: Abstraction has 2848 states and 3271 transitions. [2019-12-07 17:50:48,763 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 17:50:48,763 INFO L276 IsEmpty]: Start isEmpty. Operand 2848 states and 3271 transitions. [2019-12-07 17:50:48,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 274 [2019-12-07 17:50:48,764 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:48,764 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:48,764 INFO L410 AbstractCegarLoop]: === Iteration 60 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:48,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:48,765 INFO L82 PathProgramCache]: Analyzing trace with hash 456514400, now seen corresponding path program 1 times [2019-12-07 17:50:48,765 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:48,765 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [904042036] [2019-12-07 17:50:48,765 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:48,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:48,927 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 32 proven. 26 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:50:48,927 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [904042036] [2019-12-07 17:50:48,927 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [227003783] [2019-12-07 17:50:48,927 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:50:49,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:49,045 INFO L264 TraceCheckSpWp]: Trace formula consists of 1108 conjuncts, 14 conjunts are in the unsatisfiable core [2019-12-07 17:50:49,047 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:50:49,140 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 32 proven. 26 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:50:49,141 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:50:49,141 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2019-12-07 17:50:49,141 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [275501036] [2019-12-07 17:50:49,141 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 17:50:49,141 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:49,141 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 17:50:49,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:50:49,142 INFO L87 Difference]: Start difference. First operand 2848 states and 3271 transitions. Second operand 8 states. [2019-12-07 17:50:50,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:50,582 INFO L93 Difference]: Finished difference Result 6063 states and 7092 transitions. [2019-12-07 17:50:50,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 17:50:50,583 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 273 [2019-12-07 17:50:50,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:50,585 INFO L225 Difference]: With dead ends: 6063 [2019-12-07 17:50:50,585 INFO L226 Difference]: Without dead ends: 3652 [2019-12-07 17:50:50,586 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 312 GetRequests, 272 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 458 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=355, Invalid=1205, Unknown=0, NotChecked=0, Total=1560 [2019-12-07 17:50:50,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3652 states. [2019-12-07 17:50:51,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3652 to 2019. [2019-12-07 17:50:51,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2019 states. [2019-12-07 17:50:51,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2019 states to 2019 states and 2307 transitions. [2019-12-07 17:50:51,011 INFO L78 Accepts]: Start accepts. Automaton has 2019 states and 2307 transitions. Word has length 273 [2019-12-07 17:50:51,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:51,012 INFO L462 AbstractCegarLoop]: Abstraction has 2019 states and 2307 transitions. [2019-12-07 17:50:51,012 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 17:50:51,012 INFO L276 IsEmpty]: Start isEmpty. Operand 2019 states and 2307 transitions. [2019-12-07 17:50:51,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 274 [2019-12-07 17:50:51,013 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:51,013 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:51,214 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:50:51,215 INFO L410 AbstractCegarLoop]: === Iteration 61 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:51,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:51,216 INFO L82 PathProgramCache]: Analyzing trace with hash -1884285281, now seen corresponding path program 1 times [2019-12-07 17:50:51,216 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:51,216 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1506324602] [2019-12-07 17:50:51,216 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:51,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:51,412 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 2 proven. 33 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:50:51,412 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1506324602] [2019-12-07 17:50:51,412 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [35241950] [2019-12-07 17:50:51,412 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:50:51,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:51,518 INFO L264 TraceCheckSpWp]: Trace formula consists of 1100 conjuncts, 27 conjunts are in the unsatisfiable core [2019-12-07 17:50:51,522 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:50:51,763 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 16 proven. 19 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:50:51,764 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:50:51,764 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 23 [2019-12-07 17:50:51,764 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2130531009] [2019-12-07 17:50:51,764 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 17:50:51,764 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:51,765 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 17:50:51,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=475, Unknown=0, NotChecked=0, Total=552 [2019-12-07 17:50:51,765 INFO L87 Difference]: Start difference. First operand 2019 states and 2307 transitions. Second operand 24 states. [2019-12-07 17:51:04,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:04,007 INFO L93 Difference]: Finished difference Result 20380 states and 23934 transitions. [2019-12-07 17:51:04,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 218 states. [2019-12-07 17:51:04,008 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 273 [2019-12-07 17:51:04,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:04,018 INFO L225 Difference]: With dead ends: 20380 [2019-12-07 17:51:04,018 INFO L226 Difference]: Without dead ends: 18798 [2019-12-07 17:51:04,023 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 495 GetRequests, 262 SyntacticMatches, 0 SemanticMatches, 233 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21985 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=7665, Invalid=47325, Unknown=0, NotChecked=0, Total=54990 [2019-12-07 17:51:04,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18798 states. [2019-12-07 17:51:04,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18798 to 2019. [2019-12-07 17:51:04,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2019 states. [2019-12-07 17:51:04,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2019 states to 2019 states and 2307 transitions. [2019-12-07 17:51:04,543 INFO L78 Accepts]: Start accepts. Automaton has 2019 states and 2307 transitions. Word has length 273 [2019-12-07 17:51:04,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:04,543 INFO L462 AbstractCegarLoop]: Abstraction has 2019 states and 2307 transitions. [2019-12-07 17:51:04,543 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 17:51:04,543 INFO L276 IsEmpty]: Start isEmpty. Operand 2019 states and 2307 transitions. [2019-12-07 17:51:04,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2019-12-07 17:51:04,545 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:04,545 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:04,745 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:51:04,746 INFO L410 AbstractCegarLoop]: === Iteration 62 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:04,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:04,747 INFO L82 PathProgramCache]: Analyzing trace with hash -2064639099, now seen corresponding path program 1 times [2019-12-07 17:51:04,747 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:04,747 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [873118944] [2019-12-07 17:51:04,748 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:04,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:04,874 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2019-12-07 17:51:04,874 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [873118944] [2019-12-07 17:51:04,874 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:04,875 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:51:04,875 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [870543327] [2019-12-07 17:51:04,875 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 17:51:04,875 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:04,875 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 17:51:04,875 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:51:04,875 INFO L87 Difference]: Start difference. First operand 2019 states and 2307 transitions. Second operand 8 states. [2019-12-07 17:51:06,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:06,114 INFO L93 Difference]: Finished difference Result 4874 states and 5714 transitions. [2019-12-07 17:51:06,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:51:06,114 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 274 [2019-12-07 17:51:06,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:06,116 INFO L225 Difference]: With dead ends: 4874 [2019-12-07 17:51:06,117 INFO L226 Difference]: Without dead ends: 3292 [2019-12-07 17:51:06,117 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=64, Invalid=118, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:51:06,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3292 states. [2019-12-07 17:51:06,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3292 to 1999. [2019-12-07 17:51:06,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1999 states. [2019-12-07 17:51:06,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1999 states to 1999 states and 2275 transitions. [2019-12-07 17:51:06,585 INFO L78 Accepts]: Start accepts. Automaton has 1999 states and 2275 transitions. Word has length 274 [2019-12-07 17:51:06,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:06,585 INFO L462 AbstractCegarLoop]: Abstraction has 1999 states and 2275 transitions. [2019-12-07 17:51:06,585 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 17:51:06,585 INFO L276 IsEmpty]: Start isEmpty. Operand 1999 states and 2275 transitions. [2019-12-07 17:51:06,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2019-12-07 17:51:06,586 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:06,586 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:06,587 INFO L410 AbstractCegarLoop]: === Iteration 63 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:06,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:06,587 INFO L82 PathProgramCache]: Analyzing trace with hash 1643522183, now seen corresponding path program 1 times [2019-12-07 17:51:06,587 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:06,587 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [491003277] [2019-12-07 17:51:06,587 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:06,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:06,667 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2019-12-07 17:51:06,667 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [491003277] [2019-12-07 17:51:06,667 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:06,667 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:51:06,668 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1739013639] [2019-12-07 17:51:06,668 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 17:51:06,668 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:06,668 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 17:51:06,668 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:51:06,668 INFO L87 Difference]: Start difference. First operand 1999 states and 2275 transitions. Second operand 8 states. [2019-12-07 17:51:08,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:08,177 INFO L93 Difference]: Finished difference Result 5417 states and 6346 transitions. [2019-12-07 17:51:08,178 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 17:51:08,178 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 274 [2019-12-07 17:51:08,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:08,181 INFO L225 Difference]: With dead ends: 5417 [2019-12-07 17:51:08,181 INFO L226 Difference]: Without dead ends: 3855 [2019-12-07 17:51:08,182 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=64, Invalid=118, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:51:08,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3855 states. [2019-12-07 17:51:08,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3855 to 1983. [2019-12-07 17:51:08,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1983 states. [2019-12-07 17:51:08,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1983 states to 1983 states and 2251 transitions. [2019-12-07 17:51:08,657 INFO L78 Accepts]: Start accepts. Automaton has 1983 states and 2251 transitions. Word has length 274 [2019-12-07 17:51:08,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:08,657 INFO L462 AbstractCegarLoop]: Abstraction has 1983 states and 2251 transitions. [2019-12-07 17:51:08,657 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 17:51:08,657 INFO L276 IsEmpty]: Start isEmpty. Operand 1983 states and 2251 transitions. [2019-12-07 17:51:08,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2019-12-07 17:51:08,658 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:08,658 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:08,659 INFO L410 AbstractCegarLoop]: === Iteration 64 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:08,659 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:08,659 INFO L82 PathProgramCache]: Analyzing trace with hash 834175557, now seen corresponding path program 1 times [2019-12-07 17:51:08,659 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:08,659 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1736750465] [2019-12-07 17:51:08,659 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:08,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:08,736 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 168 trivial. 0 not checked. [2019-12-07 17:51:08,736 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1736750465] [2019-12-07 17:51:08,736 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:08,736 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:51:08,736 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1661903450] [2019-12-07 17:51:08,737 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:51:08,737 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:08,737 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:51:08,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:51:08,737 INFO L87 Difference]: Start difference. First operand 1983 states and 2251 transitions. Second operand 4 states. [2019-12-07 17:51:09,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:09,484 INFO L93 Difference]: Finished difference Result 4151 states and 4812 transitions. [2019-12-07 17:51:09,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:51:09,485 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 274 [2019-12-07 17:51:09,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:09,486 INFO L225 Difference]: With dead ends: 4151 [2019-12-07 17:51:09,486 INFO L226 Difference]: Without dead ends: 2605 [2019-12-07 17:51:09,487 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:51:09,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2605 states. [2019-12-07 17:51:09,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2605 to 1983. [2019-12-07 17:51:09,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1983 states. [2019-12-07 17:51:09,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1983 states to 1983 states and 2243 transitions. [2019-12-07 17:51:09,957 INFO L78 Accepts]: Start accepts. Automaton has 1983 states and 2243 transitions. Word has length 274 [2019-12-07 17:51:09,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:09,958 INFO L462 AbstractCegarLoop]: Abstraction has 1983 states and 2243 transitions. [2019-12-07 17:51:09,958 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:51:09,958 INFO L276 IsEmpty]: Start isEmpty. Operand 1983 states and 2243 transitions. [2019-12-07 17:51:09,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2019-12-07 17:51:09,959 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:09,959 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:09,959 INFO L410 AbstractCegarLoop]: === Iteration 65 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:09,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:09,960 INFO L82 PathProgramCache]: Analyzing trace with hash 841057278, now seen corresponding path program 1 times [2019-12-07 17:51:09,960 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:09,960 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242453770] [2019-12-07 17:51:09,960 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:09,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:10,132 INFO L134 CoverageAnalysis]: Checked inductivity of 186 backedges. 33 proven. 30 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:51:10,132 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242453770] [2019-12-07 17:51:10,133 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [311977705] [2019-12-07 17:51:10,133 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:51:10,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:10,248 INFO L264 TraceCheckSpWp]: Trace formula consists of 1107 conjuncts, 14 conjunts are in the unsatisfiable core [2019-12-07 17:51:10,250 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:51:10,346 INFO L134 CoverageAnalysis]: Checked inductivity of 186 backedges. 33 proven. 30 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:51:10,347 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:51:10,347 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2019-12-07 17:51:10,347 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [156774708] [2019-12-07 17:51:10,347 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 17:51:10,347 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:10,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 17:51:10,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:51:10,348 INFO L87 Difference]: Start difference. First operand 1983 states and 2243 transitions. Second operand 8 states. [2019-12-07 17:51:13,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:13,030 INFO L93 Difference]: Finished difference Result 7781 states and 9080 transitions. [2019-12-07 17:51:13,030 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 17:51:13,030 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 274 [2019-12-07 17:51:13,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:13,034 INFO L225 Difference]: With dead ends: 7781 [2019-12-07 17:51:13,034 INFO L226 Difference]: Without dead ends: 6235 [2019-12-07 17:51:13,035 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 322 GetRequests, 280 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 516 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=382, Invalid=1340, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 17:51:13,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6235 states. [2019-12-07 17:51:13,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6235 to 2615. [2019-12-07 17:51:13,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2615 states. [2019-12-07 17:51:13,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2615 states to 2615 states and 2972 transitions. [2019-12-07 17:51:13,747 INFO L78 Accepts]: Start accepts. Automaton has 2615 states and 2972 transitions. Word has length 274 [2019-12-07 17:51:13,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:13,747 INFO L462 AbstractCegarLoop]: Abstraction has 2615 states and 2972 transitions. [2019-12-07 17:51:13,747 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 17:51:13,747 INFO L276 IsEmpty]: Start isEmpty. Operand 2615 states and 2972 transitions. [2019-12-07 17:51:13,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2019-12-07 17:51:13,749 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:13,749 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:13,949 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:51:13,950 INFO L410 AbstractCegarLoop]: === Iteration 66 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:13,950 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:13,951 INFO L82 PathProgramCache]: Analyzing trace with hash -1282113321, now seen corresponding path program 1 times [2019-12-07 17:51:13,951 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:13,951 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1947160685] [2019-12-07 17:51:13,952 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:13,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:14,181 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 2 proven. 33 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:51:14,181 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1947160685] [2019-12-07 17:51:14,182 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1235563604] [2019-12-07 17:51:14,182 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:51:14,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:14,308 INFO L264 TraceCheckSpWp]: Trace formula consists of 1101 conjuncts, 26 conjunts are in the unsatisfiable core [2019-12-07 17:51:14,311 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:51:14,558 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 16 proven. 19 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:51:14,558 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:51:14,559 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 23 [2019-12-07 17:51:14,559 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1889731107] [2019-12-07 17:51:14,559 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 17:51:14,559 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:14,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 17:51:14,560 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=475, Unknown=0, NotChecked=0, Total=552 [2019-12-07 17:51:14,560 INFO L87 Difference]: Start difference. First operand 2615 states and 2972 transitions. Second operand 24 states. [2019-12-07 17:51:31,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:31,973 INFO L93 Difference]: Finished difference Result 29136 states and 34213 transitions. [2019-12-07 17:51:31,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 218 states. [2019-12-07 17:51:31,973 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 274 [2019-12-07 17:51:31,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:31,990 INFO L225 Difference]: With dead ends: 29136 [2019-12-07 17:51:31,990 INFO L226 Difference]: Without dead ends: 27026 [2019-12-07 17:51:31,996 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 496 GetRequests, 263 SyntacticMatches, 0 SemanticMatches, 233 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21819 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=7665, Invalid=47325, Unknown=0, NotChecked=0, Total=54990 [2019-12-07 17:51:32,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27026 states. [2019-12-07 17:51:32,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27026 to 2603. [2019-12-07 17:51:32,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2603 states. [2019-12-07 17:51:32,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2603 states to 2603 states and 2960 transitions. [2019-12-07 17:51:32,818 INFO L78 Accepts]: Start accepts. Automaton has 2603 states and 2960 transitions. Word has length 274 [2019-12-07 17:51:32,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:32,818 INFO L462 AbstractCegarLoop]: Abstraction has 2603 states and 2960 transitions. [2019-12-07 17:51:32,818 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 17:51:32,819 INFO L276 IsEmpty]: Start isEmpty. Operand 2603 states and 2960 transitions. [2019-12-07 17:51:32,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2019-12-07 17:51:32,820 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:32,820 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:33,021 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:51:33,021 INFO L410 AbstractCegarLoop]: === Iteration 67 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:33,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:33,022 INFO L82 PathProgramCache]: Analyzing trace with hash -1711771627, now seen corresponding path program 1 times [2019-12-07 17:51:33,022 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:33,023 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [8931178] [2019-12-07 17:51:33,023 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:33,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:33,088 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2019-12-07 17:51:33,088 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [8931178] [2019-12-07 17:51:33,088 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:33,088 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:51:33,088 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [228051944] [2019-12-07 17:51:33,089 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:51:33,089 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:33,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:51:33,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:51:33,089 INFO L87 Difference]: Start difference. First operand 2603 states and 2960 transitions. Second operand 3 states. [2019-12-07 17:51:33,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:33,709 INFO L93 Difference]: Finished difference Result 4258 states and 4840 transitions. [2019-12-07 17:51:33,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:51:33,710 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 274 [2019-12-07 17:51:33,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:33,711 INFO L225 Difference]: With dead ends: 4258 [2019-12-07 17:51:33,711 INFO L226 Difference]: Without dead ends: 1914 [2019-12-07 17:51:33,712 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:51:33,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1914 states. [2019-12-07 17:51:34,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1914 to 1914. [2019-12-07 17:51:34,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1914 states. [2019-12-07 17:51:34,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1914 states to 1914 states and 2147 transitions. [2019-12-07 17:51:34,327 INFO L78 Accepts]: Start accepts. Automaton has 1914 states and 2147 transitions. Word has length 274 [2019-12-07 17:51:34,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:34,327 INFO L462 AbstractCegarLoop]: Abstraction has 1914 states and 2147 transitions. [2019-12-07 17:51:34,327 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:51:34,327 INFO L276 IsEmpty]: Start isEmpty. Operand 1914 states and 2147 transitions. [2019-12-07 17:51:34,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 277 [2019-12-07 17:51:34,329 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:34,329 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:34,329 INFO L410 AbstractCegarLoop]: === Iteration 68 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:34,329 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:34,329 INFO L82 PathProgramCache]: Analyzing trace with hash 284931589, now seen corresponding path program 1 times [2019-12-07 17:51:34,329 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:34,329 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [700249076] [2019-12-07 17:51:34,329 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:34,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:34,492 INFO L134 CoverageAnalysis]: Checked inductivity of 184 backedges. 30 proven. 31 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:51:34,492 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [700249076] [2019-12-07 17:51:34,492 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [848415728] [2019-12-07 17:51:34,492 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:51:34,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:34,600 INFO L264 TraceCheckSpWp]: Trace formula consists of 1122 conjuncts, 14 conjunts are in the unsatisfiable core [2019-12-07 17:51:34,602 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:51:34,697 INFO L134 CoverageAnalysis]: Checked inductivity of 184 backedges. 30 proven. 31 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:51:34,697 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:51:34,697 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2019-12-07 17:51:34,698 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [801515735] [2019-12-07 17:51:34,698 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 17:51:34,698 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:34,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 17:51:34,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:51:34,698 INFO L87 Difference]: Start difference. First operand 1914 states and 2147 transitions. Second operand 8 states. [2019-12-07 17:51:38,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:38,596 INFO L93 Difference]: Finished difference Result 8969 states and 10318 transitions. [2019-12-07 17:51:38,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 17:51:38,597 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 276 [2019-12-07 17:51:38,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:38,601 INFO L225 Difference]: With dead ends: 8969 [2019-12-07 17:51:38,601 INFO L226 Difference]: Without dead ends: 7494 [2019-12-07 17:51:38,602 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 320 GetRequests, 282 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 404 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=338, Invalid=1068, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 17:51:38,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7494 states. [2019-12-07 17:51:39,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7494 to 2474. [2019-12-07 17:51:39,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2474 states. [2019-12-07 17:51:39,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2474 states to 2474 states and 2773 transitions. [2019-12-07 17:51:39,489 INFO L78 Accepts]: Start accepts. Automaton has 2474 states and 2773 transitions. Word has length 276 [2019-12-07 17:51:39,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:39,489 INFO L462 AbstractCegarLoop]: Abstraction has 2474 states and 2773 transitions. [2019-12-07 17:51:39,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 17:51:39,490 INFO L276 IsEmpty]: Start isEmpty. Operand 2474 states and 2773 transitions. [2019-12-07 17:51:39,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 279 [2019-12-07 17:51:39,491 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:39,491 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:39,692 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 20 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:51:39,692 INFO L410 AbstractCegarLoop]: === Iteration 69 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:39,693 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:39,693 INFO L82 PathProgramCache]: Analyzing trace with hash -147022562, now seen corresponding path program 1 times [2019-12-07 17:51:39,694 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:39,694 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1194208953] [2019-12-07 17:51:39,694 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:39,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:39,984 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 7 proven. 52 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:51:39,984 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1194208953] [2019-12-07 17:51:39,984 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [367513375] [2019-12-07 17:51:39,984 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:51:40,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:40,098 INFO L264 TraceCheckSpWp]: Trace formula consists of 1137 conjuncts, 34 conjunts are in the unsatisfiable core [2019-12-07 17:51:40,100 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:51:40,247 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 45 proven. 27 refuted. 0 times theorem prover too weak. 110 trivial. 0 not checked. [2019-12-07 17:51:40,247 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:51:40,247 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 21 [2019-12-07 17:51:40,247 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [948128559] [2019-12-07 17:51:40,247 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 17:51:40,247 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:40,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 17:51:40,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=360, Unknown=0, NotChecked=0, Total=420 [2019-12-07 17:51:40,248 INFO L87 Difference]: Start difference. First operand 2474 states and 2773 transitions. Second operand 21 states. [2019-12-07 17:51:49,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:49,354 INFO L93 Difference]: Finished difference Result 13747 states and 15619 transitions. [2019-12-07 17:51:49,354 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 104 states. [2019-12-07 17:51:49,354 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 278 [2019-12-07 17:51:49,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:49,360 INFO L225 Difference]: With dead ends: 13747 [2019-12-07 17:51:49,360 INFO L226 Difference]: Without dead ends: 11765 [2019-12-07 17:51:49,362 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 402 GetRequests, 281 SyntacticMatches, 1 SemanticMatches, 120 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5166 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2386, Invalid=12376, Unknown=0, NotChecked=0, Total=14762 [2019-12-07 17:51:49,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11765 states. [2019-12-07 17:51:50,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11765 to 3644. [2019-12-07 17:51:50,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3644 states. [2019-12-07 17:51:50,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3644 states to 3644 states and 4117 transitions. [2019-12-07 17:51:50,829 INFO L78 Accepts]: Start accepts. Automaton has 3644 states and 4117 transitions. Word has length 278 [2019-12-07 17:51:50,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:50,829 INFO L462 AbstractCegarLoop]: Abstraction has 3644 states and 4117 transitions. [2019-12-07 17:51:50,829 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 17:51:50,829 INFO L276 IsEmpty]: Start isEmpty. Operand 3644 states and 4117 transitions. [2019-12-07 17:51:50,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 280 [2019-12-07 17:51:50,831 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:50,831 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:51,031 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:51:51,032 INFO L410 AbstractCegarLoop]: === Iteration 70 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:51,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:51,033 INFO L82 PathProgramCache]: Analyzing trace with hash 642425413, now seen corresponding path program 1 times [2019-12-07 17:51:51,033 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:51,033 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [810483205] [2019-12-07 17:51:51,033 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:51,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:51,285 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 14 proven. 45 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-12-07 17:51:51,285 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [810483205] [2019-12-07 17:51:51,285 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [489369570] [2019-12-07 17:51:51,285 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:51:51,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:51,414 INFO L264 TraceCheckSpWp]: Trace formula consists of 1138 conjuncts, 36 conjunts are in the unsatisfiable core [2019-12-07 17:51:51,417 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 17:51:51,635 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 7 proven. 65 refuted. 0 times theorem prover too weak. 110 trivial. 0 not checked. [2019-12-07 17:51:51,635 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 17:51:51,635 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 14] total 22 [2019-12-07 17:51:51,635 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [852902458] [2019-12-07 17:51:51,635 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 17:51:51,636 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:51,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 17:51:51,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=411, Unknown=0, NotChecked=0, Total=462 [2019-12-07 17:51:51,636 INFO L87 Difference]: Start difference. First operand 3644 states and 4117 transitions. Second operand 22 states. [2019-12-07 17:52:17,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:52:17,159 INFO L93 Difference]: Finished difference Result 28132 states and 31993 transitions. [2019-12-07 17:52:17,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 271 states. [2019-12-07 17:52:17,159 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 279 [2019-12-07 17:52:17,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:52:17,174 INFO L225 Difference]: With dead ends: 28132 [2019-12-07 17:52:17,174 INFO L226 Difference]: Without dead ends: 25119 [2019-12-07 17:52:17,180 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 631 GetRequests, 342 SyntacticMatches, 1 SemanticMatches, 288 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32351 ImplicationChecksByTransitivity, 6.8s TimeCoverageRelationStatistics Valid=9046, Invalid=74764, Unknown=0, NotChecked=0, Total=83810 [2019-12-07 17:52:17,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25119 states. [2019-12-07 17:52:19,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25119 to 5864. [2019-12-07 17:52:19,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5864 states. [2019-12-07 17:52:19,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5864 states to 5864 states and 6626 transitions. [2019-12-07 17:52:19,723 INFO L78 Accepts]: Start accepts. Automaton has 5864 states and 6626 transitions. Word has length 279 [2019-12-07 17:52:19,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:52:19,723 INFO L462 AbstractCegarLoop]: Abstraction has 5864 states and 6626 transitions. [2019-12-07 17:52:19,723 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 17:52:19,723 INFO L276 IsEmpty]: Start isEmpty. Operand 5864 states and 6626 transitions. [2019-12-07 17:52:19,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 280 [2019-12-07 17:52:19,726 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:52:19,726 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:52:19,927 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 17:52:19,927 INFO L410 AbstractCegarLoop]: === Iteration 71 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr24ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr36ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr34ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr26ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr32ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr28ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr30ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr23ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr27ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr33ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr25ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr35ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr29ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr31ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:52:19,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:52:19,928 INFO L82 PathProgramCache]: Analyzing trace with hash -841949177, now seen corresponding path program 1 times [2019-12-07 17:52:19,929 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:52:19,929 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1273801045] [2019-12-07 17:52:19,929 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:52:19,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:52:20,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:52:20,086 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:52:20,086 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:52:20,226 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:52:20 BoogieIcfgContainer [2019-12-07 17:52:20,226 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:52:20,226 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:52:20,226 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:52:20,226 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:52:20,226 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:48:19" (3/4) ... [2019-12-07 17:52:20,228 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:52:20,381 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_4d7aafbd-e2fd-4844-95b8-953740d6e7df/bin/uautomizer/witness.graphml [2019-12-07 17:52:20,381 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:52:20,382 INFO L168 Benchmark]: Toolchain (without parser) took 242354.25 ms. Allocated memory was 1.0 GB in the beginning and 2.2 GB in the end (delta: 1.1 GB). Free memory was 935.3 MB in the beginning and 1.3 GB in the end (delta: -341.5 MB). Peak memory consumption was 797.8 MB. Max. memory is 11.5 GB. [2019-12-07 17:52:20,382 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 954.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:52:20,382 INFO L168 Benchmark]: CACSL2BoogieTranslator took 284.28 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.8 MB). Free memory was 935.3 MB in the beginning and 1.1 GB in the end (delta: -159.3 MB). Peak memory consumption was 22.0 MB. Max. memory is 11.5 GB. [2019-12-07 17:52:20,382 INFO L168 Benchmark]: Boogie Procedure Inliner took 52.24 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:52:20,382 INFO L168 Benchmark]: Boogie Preprocessor took 61.87 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. [2019-12-07 17:52:20,383 INFO L168 Benchmark]: RCFGBuilder took 808.32 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 935.7 MB in the end (delta: 141.4 MB). Peak memory consumption was 141.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:52:20,383 INFO L168 Benchmark]: TraceAbstraction took 240989.23 ms. Allocated memory was 1.1 GB in the beginning and 2.2 GB in the end (delta: 1.0 GB). Free memory was 935.7 MB in the beginning and 1.3 GB in the end (delta: -400.6 MB). Peak memory consumption was 634.8 MB. Max. memory is 11.5 GB. [2019-12-07 17:52:20,383 INFO L168 Benchmark]: Witness Printer took 154.77 ms. Allocated memory is still 2.2 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 59.5 MB). Peak memory consumption was 59.5 MB. Max. memory is 11.5 GB. [2019-12-07 17:52:20,384 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 954.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 284.28 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.8 MB). Free memory was 935.3 MB in the beginning and 1.1 GB in the end (delta: -159.3 MB). Peak memory consumption was 22.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 52.24 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 61.87 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 808.32 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 935.7 MB in the end (delta: 141.4 MB). Peak memory consumption was 141.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 240989.23 ms. Allocated memory was 1.1 GB in the beginning and 2.2 GB in the end (delta: 1.0 GB). Free memory was 935.7 MB in the beginning and 1.3 GB in the end (delta: -400.6 MB). Peak memory consumption was 634.8 MB. Max. memory is 11.5 GB. * Witness Printer took 154.77 ms. Allocated memory is still 2.2 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 59.5 MB). Peak memory consumption was 59.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 576]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L68] msg_t nomsg = (msg_t )-1; [L69] port_t g1v ; [L70] int8_t g1v_old ; [L71] int8_t g1v_new ; [L72] port_t g2v ; [L73] int8_t g2v_old ; [L74] int8_t g2v_new ; [L75] port_t g3v ; [L76] int8_t g3v_old ; [L77] int8_t g3v_new ; [L81] _Bool gate1Failed ; [L82] _Bool gate2Failed ; [L83] _Bool gate3Failed ; [L84] msg_t VALUE1 ; [L85] msg_t VALUE2 ; [L86] msg_t VALUE3 ; [L88] _Bool gate1Failed_History_0 ; [L89] _Bool gate1Failed_History_1 ; [L90] _Bool gate1Failed_History_2 ; [L91] _Bool gate2Failed_History_0 ; [L92] _Bool gate2Failed_History_1 ; [L93] _Bool gate2Failed_History_2 ; [L94] _Bool gate3Failed_History_0 ; [L95] _Bool gate3Failed_History_1 ; [L96] _Bool gate3Failed_History_2 ; [L97] int8_t votedValue_History_0 ; [L98] int8_t votedValue_History_1 ; [L99] int8_t votedValue_History_2 ; [L515] void (*nodes[4])(void) = { & gate1_each_pals_period, & gate2_each_pals_period, & gate3_each_pals_period, & voter}; VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=0, votedValue_History_1=0, votedValue_History_2=0] [L518] int c1 ; [L519] int i2 ; [L522] c1 = 0 [L523] gate1Failed = __VERIFIER_nondet_bool() [L524] gate2Failed = __VERIFIER_nondet_bool() [L525] gate3Failed = __VERIFIER_nondet_bool() [L526] VALUE1 = __VERIFIER_nondet_char() [L527] VALUE2 = __VERIFIER_nondet_char() [L528] VALUE3 = __VERIFIER_nondet_char() [L529] gate1Failed_History_0 = __VERIFIER_nondet_bool() [L530] gate1Failed_History_1 = __VERIFIER_nondet_bool() [L531] gate1Failed_History_2 = __VERIFIER_nondet_bool() [L532] gate2Failed_History_0 = __VERIFIER_nondet_bool() [L533] gate2Failed_History_1 = __VERIFIER_nondet_bool() [L534] gate2Failed_History_2 = __VERIFIER_nondet_bool() [L535] gate3Failed_History_0 = __VERIFIER_nondet_bool() [L536] gate3Failed_History_1 = __VERIFIER_nondet_bool() [L537] gate3Failed_History_2 = __VERIFIER_nondet_bool() [L538] votedValue_History_0 = __VERIFIER_nondet_char() [L539] votedValue_History_1 = __VERIFIER_nondet_char() [L540] votedValue_History_2 = __VERIFIER_nondet_char() [L248] int tmp ; [L249] int tmp___0 ; [L250] int tmp___1 ; [L251] int tmp___2 ; [L104] _Bool ini_bool ; [L105] int8_t ini_int ; [L106] int var ; [L107] int tmp ; [L108] int tmp___0 ; [L109] int tmp___1 ; [L110] int tmp___2 ; [L113] ini_bool = (_Bool)0 [L114] ini_int = (int8_t )-2 [L115] var = 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND TRUE history_id == 0 [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L172] COND TRUE historyIndex == 0 [L173] return (gate1Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L118] tmp = (int )read_history_bool(0, 0) [L119] COND FALSE !(! (tmp == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND TRUE history_id == 0 [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L172] COND TRUE historyIndex == 0 [L173] return (gate1Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L118] tmp = (int )read_history_bool(0, 0) [L119] COND FALSE !(! (tmp == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND TRUE history_id == 0 [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L172] COND TRUE historyIndex == 0 [L173] return (gate1Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L118] tmp = (int )read_history_bool(0, 0) [L119] COND FALSE !(! (tmp == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND FALSE !(var < 3) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L143] return (1); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L254] tmp = add_history_type(0) [L255] COND FALSE !(! tmp) [L104] _Bool ini_bool ; [L105] int8_t ini_int ; [L106] int var ; [L107] int tmp ; [L108] int tmp___0 ; [L109] int tmp___1 ; [L110] int tmp___2 ; [L113] ini_bool = (_Bool)0 [L114] ini_int = (int8_t )-2 [L115] var = 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND TRUE history_id == 1 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND TRUE history_id == 1 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L182] COND TRUE historyIndex == 0 [L183] return (gate2Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L124] tmp___0 = (int )read_history_bool(1, 0) [L125] COND FALSE !(! (tmp___0 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND TRUE history_id == 1 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND TRUE history_id == 1 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L182] COND TRUE historyIndex == 0 [L183] return (gate2Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L124] tmp___0 = (int )read_history_bool(1, 0) [L125] COND FALSE !(! (tmp___0 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND TRUE history_id == 1 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND TRUE history_id == 1 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L182] COND TRUE historyIndex == 0 [L183] return (gate2Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L124] tmp___0 = (int )read_history_bool(1, 0) [L125] COND FALSE !(! (tmp___0 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND FALSE !(var < 3) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L143] return (1); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L258] tmp___0 = add_history_type(1) [L259] COND FALSE !(! tmp___0) [L104] _Bool ini_bool ; [L105] int8_t ini_int ; [L106] int var ; [L107] int tmp ; [L108] int tmp___0 ; [L109] int tmp___1 ; [L110] int tmp___2 ; [L113] ini_bool = (_Bool)0 [L114] ini_int = (int8_t )-2 [L115] var = 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND TRUE history_id == 2 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L191] COND TRUE history_id == 2 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L192] COND TRUE historyIndex == 0 [L193] return (gate3Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L130] tmp___1 = (int )read_history_bool(2, 0) [L131] COND FALSE !(! (tmp___1 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND TRUE history_id == 2 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L191] COND TRUE history_id == 2 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L192] COND TRUE historyIndex == 0 [L193] return (gate3Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L130] tmp___1 = (int )read_history_bool(2, 0) [L131] COND FALSE !(! (tmp___1 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND TRUE history_id == 2 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L181] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L191] COND TRUE history_id == 2 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L192] COND TRUE historyIndex == 0 [L193] return (gate3Failed_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L130] tmp___1 = (int )read_history_bool(2, 0) [L131] COND FALSE !(! (tmp___1 == (int )ini_bool)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND FALSE !(var < 3) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L143] return (1); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L262] tmp___1 = add_history_type(2) [L263] COND FALSE !(! tmp___1) [L104] _Bool ini_bool ; [L105] int8_t ini_int ; [L106] int var ; [L107] int tmp ; [L108] int tmp___0 ; [L109] int tmp___1 ; [L110] int tmp___2 ; [L113] ini_bool = (_Bool)0 [L114] ini_int = (int8_t )-2 [L115] var = 0 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND FALSE !(history_id == 2) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L135] COND TRUE history_id == 3 [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L136] tmp___2 = (int )read_history_int8(3, 0) [L137] COND FALSE !(! (tmp___2 == (int )ini_int)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND FALSE !(history_id == 2) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L135] COND TRUE history_id == 3 [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L136] tmp___2 = (int )read_history_int8(3, 0) [L137] COND FALSE !(! (tmp___2 == (int )ini_int)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND TRUE var < 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L117] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L123] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L129] COND FALSE !(history_id == 2) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L135] COND TRUE history_id == 3 [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L136] tmp___2 = (int )read_history_int8(3, 0) [L137] COND FALSE !(! (tmp___2 == (int )ini_int)) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L141] var ++ VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L116] COND FALSE !(var < 3) VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L143] return (1); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L266] tmp___2 = add_history_type(3) [L267] COND FALSE !(! tmp___2) [L270] return (1); VAL [g1v=0, g1v_new=0, g1v_old=0, g2v=0, g2v_new=0, g2v_old=0, g3v=0, g3v_new=0, g3v_old=0, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L541] i2 = init() [L543] g1v_old = nomsg [L544] g1v_new = nomsg [L545] g2v_old = nomsg [L546] g2v_new = nomsg [L547] g3v_old = nomsg [L548] g3v_new = nomsg [L549] i2 = 0 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=2, gate1Failed_History_0=0, gate1Failed_History_1=5, gate1Failed_History_2=4, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L550] COND TRUE 1 [L383] int8_t next_state ; [L384] msg_t tmp ; [L385] int tmp___0 ; [L388] gate1Failed = __VERIFIER_nondet_bool() [L226] COND TRUE history_id == 0 [L227] gate1Failed_History_2 = gate1Failed_History_1 [L228] gate1Failed_History_1 = gate1Failed_History_0 [L229] gate1Failed_History_0 = buf VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L390] COND FALSE !(\read(gate1Failed)) [L394] tmp = __VERIFIER_nondet_char() [L395] next_state = tmp VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L396] COND FALSE !((int )next_state == 0) VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L399] COND TRUE (int )next_state == 1 [L400] tmp___0 = 1 VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L408] EXPR next_state != nomsg && g1v_new == nomsg ? next_state : g1v_new VAL [g1v=0, g1v_new=-1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=6, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L408] g1v_new = next_state != nomsg && g1v_new == nomsg ? next_state : g1v_new [L414] int8_t next_state ; [L415] msg_t tmp ; [L416] int tmp___0 ; [L419] gate2Failed = __VERIFIER_nondet_bool() [L226] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=8, gate2Failed_History_2=10, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L231] COND TRUE history_id == 1 [L232] gate2Failed_History_2 = gate2Failed_History_1 [L233] gate2Failed_History_1 = gate2Failed_History_0 [L234] gate2Failed_History_0 = buf VAL [g1v=0, g1v_new=1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L421] COND FALSE !(\read(gate2Failed)) [L425] tmp = __VERIFIER_nondet_char() [L426] next_state = tmp VAL [g1v=0, g1v_new=1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L427] COND TRUE (int )next_state == 0 [L428] tmp___0 = 1 VAL [g1v=0, g1v_new=1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L439] EXPR next_state != nomsg && g2v_new == nomsg ? next_state : g2v_new VAL [g1v=0, g1v_new=1, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=9, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L439] g2v_new = next_state != nomsg && g2v_new == nomsg ? next_state : g2v_new [L445] int8_t next_state ; [L446] msg_t tmp ; [L447] int tmp___0 ; [L450] gate3Failed = __VERIFIER_nondet_bool() [L226] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=1, g1v_old=-1, g2v=0, g2v_new=0, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L231] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=1, g1v_old=-1, g2v=0, g2v_new=0, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=7, gate3Failed_History_2=3, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L236] COND TRUE history_id == 2 [L237] gate3Failed_History_2 = gate3Failed_History_1 [L238] gate3Failed_History_1 = gate3Failed_History_0 [L239] gate3Failed_History_0 = buf VAL [g1v=0, g1v_new=1, g1v_old=-1, g2v=0, g2v_new=0, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L452] COND FALSE !(\read(gate3Failed)) [L456] tmp = __VERIFIER_nondet_char() [L457] next_state = tmp VAL [g1v=0, g1v_new=1, g1v_old=-1, g2v=0, g2v_new=0, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L458] COND TRUE (int )next_state == 0 [L459] tmp___0 = 1 VAL [g1v=0, g1v_new=1, g1v_old=-1, g2v=0, g2v_new=0, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L470] EXPR next_state != nomsg && g3v_new == nomsg ? next_state : g3v_new VAL [g1v=0, g1v_new=1, g1v_old=-1, g2v=0, g2v_new=0, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=0, VALUE2=0, VALUE3=0, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L470] g3v_new = next_state != nomsg && g3v_new == nomsg ? next_state : g3v_new [L476] int8_t voted_value ; [L479] voted_value = nomsg [L480] VALUE1 = g1v_old [L481] g1v_old = nomsg [L482] VALUE2 = g2v_old [L483] g2v_old = nomsg [L484] VALUE3 = g3v_old [L485] g3v_old = nomsg VAL [g1v=0, g1v_new=1, g1v_old=-1, g2v=0, g2v_new=0, g2v_old=-1, g3v=0, g3v_new=0, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L486] COND TRUE (int )VALUE1 == (int )VALUE2 VAL [g1v=0, g1v_new=1, g1v_old=-1, g2v=0, g2v_new=0, g2v_old=-1, g3v=0, g3v_new=0, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L487] COND TRUE (int )VALUE1 == (int )nomsg [L488] voted_value = VALUE3 VAL [g1v=0, g1v_new=1, g1v_old=-1, g2v=0, g2v_new=0, g2v_old=-1, g3v=0, g3v_new=0, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-2, votedValue_History_1=0, votedValue_History_2=0] [L211] COND TRUE history_id == 3 [L212] votedValue_History_2 = votedValue_History_1 [L213] votedValue_History_1 = votedValue_History_0 [L214] votedValue_History_0 = buf VAL [g1v=0, g1v_new=1, g1v_old=-1, g2v=0, g2v_new=0, g2v_old=-1, g3v=0, g3v_new=0, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L556] g1v_old = g1v_new [L557] g1v_new = nomsg [L558] g2v_old = g2v_new [L559] g2v_new = nomsg [L560] g3v_old = g3v_new [L561] g3v_new = nomsg [L275] int tmp ; [L276] int temp_count ; [L277] int8_t tmp___0 ; [L278] int8_t tmp___1 ; [L279] int8_t tmp___2 ; [L280] _Bool tmp___3 ; [L281] _Bool tmp___4 ; [L282] _Bool tmp___5 ; [L283] int8_t tmp___6 ; [L284] _Bool tmp___7 ; [L285] _Bool tmp___8 ; [L286] _Bool tmp___9 ; [L287] int8_t tmp___10 ; [L288] int8_t tmp___11 ; [L289] int8_t tmp___12 ; [L290] int8_t tmp___13 ; [L291] int8_t tmp___14 ; VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L294] COND TRUE ! gate1Failed [L295] tmp = 1 VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L172] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L175] COND TRUE historyIndex == 1 [L176] return (gate1Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L306] tmp___3 = read_history_bool(0, 1) [L307] COND TRUE ! tmp___3 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L181] COND TRUE history_id == 1 VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L182] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L185] COND TRUE historyIndex == 1 [L186] return (gate2Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L308] tmp___4 = read_history_bool(1, 1) [L309] COND TRUE ! tmp___4 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L181] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L191] COND TRUE history_id == 2 VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L192] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L195] COND TRUE historyIndex == 1 [L196] return (gate3Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L310] tmp___5 = read_history_bool(2, 1) [L311] COND TRUE ! tmp___5 [L312] temp_count = 0 [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L313] tmp___0 = read_history_int8(3, 0) [L314] COND TRUE (int )VALUE1 == (int )tmp___0 [L315] temp_count ++ VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L317] tmp___1 = read_history_int8(3, 0) [L318] COND TRUE (int )VALUE2 == (int )tmp___1 [L319] temp_count ++ VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L321] tmp___2 = read_history_int8(3, 0) [L322] COND TRUE (int )VALUE3 == (int )tmp___2 [L323] temp_count ++ VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L325] COND FALSE !((int )VALUE1 != (int )VALUE2) VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L339] COND FALSE !(! (temp_count > 1)) VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L152] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L155] COND TRUE historyIndex == 1 [L156] return (votedValue_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L345] tmp___10 = read_history_int8(3, 1) [L346] COND FALSE !((int )tmp___10 > -2) VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L365] tmp___11 = read_history_int8(3, 0) [L366] COND FALSE !((int )tmp___11 != (int )nomsg) VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L378] return (1); VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L562] c1 = check() [L574] COND FALSE !(! arg) VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=5, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L550] COND TRUE 1 [L383] int8_t next_state ; [L384] msg_t tmp ; [L385] int tmp___0 ; [L388] gate1Failed = __VERIFIER_nondet_bool() [L226] COND TRUE history_id == 0 [L227] gate1Failed_History_2 = gate1Failed_History_1 [L228] gate1Failed_History_1 = gate1Failed_History_0 [L229] gate1Failed_History_0 = buf VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L390] COND FALSE !(\read(gate1Failed)) [L394] tmp = __VERIFIER_nondet_char() [L395] next_state = tmp VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L396] COND TRUE (int )next_state == 0 [L397] tmp___0 = 1 VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L408] EXPR next_state != nomsg && g1v_new == nomsg ? next_state : g1v_new VAL [g1v=0, g1v_new=-1, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=0, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L408] g1v_new = next_state != nomsg && g1v_new == nomsg ? next_state : g1v_new [L414] int8_t next_state ; [L415] msg_t tmp ; [L416] int tmp___0 ; [L419] gate2Failed = __VERIFIER_nondet_bool() [L226] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=0, gate2Failed_History_1=0, gate2Failed_History_2=8, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L231] COND TRUE history_id == 1 [L232] gate2Failed_History_2 = gate2Failed_History_1 [L233] gate2Failed_History_1 = gate2Failed_History_0 [L234] gate2Failed_History_0 = buf VAL [g1v=0, g1v_new=0, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L421] COND TRUE \read(gate2Failed) VAL [g1v=0, g1v_new=0, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L422] EXPR nomsg != nomsg && g2v_new == nomsg ? nomsg : g2v_new VAL [g1v=0, g1v_new=0, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=0, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L422] g2v_new = nomsg != nomsg && g2v_new == nomsg ? nomsg : g2v_new [L445] int8_t next_state ; [L446] msg_t tmp ; [L447] int tmp___0 ; [L450] gate3Failed = __VERIFIER_nondet_bool() [L226] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=0, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L231] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=0, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=0, gate3Failed_History_1=0, gate3Failed_History_2=7, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L236] COND TRUE history_id == 2 [L237] gate3Failed_History_2 = gate3Failed_History_1 [L238] gate3Failed_History_1 = gate3Failed_History_0 [L239] gate3Failed_History_0 = buf VAL [g1v=0, g1v_new=0, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L452] COND TRUE \read(gate3Failed) VAL [g1v=0, g1v_new=0, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L453] EXPR nomsg != nomsg && g3v_new == nomsg ? nomsg : g3v_new VAL [g1v=0, g1v_new=0, g1v_old=1, g2v=0, g2v_new=-1, g2v_old=0, g3v=0, g3v_new=-1, g3v_old=0, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=-1, VALUE2=-1, VALUE3=-1, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L453] g3v_new = nomsg != nomsg && g3v_new == nomsg ? nomsg : g3v_new [L476] int8_t voted_value ; [L479] voted_value = nomsg [L480] VALUE1 = g1v_old [L481] g1v_old = nomsg [L482] VALUE2 = g2v_old [L483] g2v_old = nomsg [L484] VALUE3 = g3v_old [L485] g3v_old = nomsg VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L486] COND FALSE !((int )VALUE1 == (int )VALUE2) VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L493] COND FALSE !((int )VALUE1 == (int )VALUE3) VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L500] COND TRUE (int )VALUE1 != (int )nomsg [L501] voted_value = VALUE1 VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=-1, votedValue_History_1=-2, votedValue_History_2=0] [L211] COND TRUE history_id == 3 [L212] votedValue_History_2 = votedValue_History_1 [L213] votedValue_History_1 = votedValue_History_0 [L214] votedValue_History_0 = buf VAL [g1v=0, g1v_new=0, g1v_old=-1, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L556] g1v_old = g1v_new [L557] g1v_new = nomsg [L558] g2v_old = g2v_new [L559] g2v_new = nomsg [L560] g3v_old = g3v_new [L561] g3v_new = nomsg [L275] int tmp ; [L276] int temp_count ; [L277] int8_t tmp___0 ; [L278] int8_t tmp___1 ; [L279] int8_t tmp___2 ; [L280] _Bool tmp___3 ; [L281] _Bool tmp___4 ; [L282] _Bool tmp___5 ; [L283] int8_t tmp___6 ; [L284] _Bool tmp___7 ; [L285] _Bool tmp___8 ; [L286] _Bool tmp___9 ; [L287] int8_t tmp___10 ; [L288] int8_t tmp___11 ; [L289] int8_t tmp___12 ; [L290] int8_t tmp___13 ; [L291] int8_t tmp___14 ; VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L294] COND TRUE ! gate1Failed [L295] tmp = 1 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L171] COND TRUE history_id == 0 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L172] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L175] COND TRUE historyIndex == 1 [L176] return (gate1Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L306] tmp___3 = read_history_bool(0, 1) [L307] COND TRUE ! tmp___3 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L181] COND TRUE history_id == 1 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L182] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L185] COND TRUE historyIndex == 1 [L186] return (gate2Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L308] tmp___4 = read_history_bool(1, 1) [L309] COND TRUE ! tmp___4 [L171] COND FALSE !(history_id == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L181] COND FALSE !(history_id == 1) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L191] COND TRUE history_id == 2 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L192] COND FALSE !(historyIndex == 0) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L195] COND TRUE historyIndex == 1 [L196] return (gate3Failed_History_1); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L310] tmp___5 = read_history_bool(2, 1) [L311] COND TRUE ! tmp___5 [L312] temp_count = 0 [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L313] tmp___0 = read_history_int8(3, 0) [L314] COND TRUE (int )VALUE1 == (int )tmp___0 [L315] temp_count ++ VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L317] tmp___1 = read_history_int8(3, 0) [L318] COND FALSE !((int )VALUE2 == (int )tmp___1) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L151] COND TRUE history_id == 3 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L152] COND TRUE historyIndex == 0 [L153] return (votedValue_History_0); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L321] tmp___2 = read_history_int8(3, 0) [L322] COND FALSE !((int )VALUE3 == (int )tmp___2) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L325] COND TRUE (int )VALUE1 != (int )VALUE2 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L326] COND TRUE (int )VALUE1 != (int )VALUE3 VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L327] COND FALSE !((int )VALUE2 != (int )VALUE3) VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L339] COND TRUE ! (temp_count > 1) [L340] return (0); VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L562] c1 = check() [L574] COND TRUE ! arg VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] [L576] __VERIFIER_error() VAL [g1v=0, g1v_new=-1, g1v_old=0, g2v=0, g2v_new=-1, g2v_old=-1, g3v=0, g3v_new=-1, g3v_old=-1, gate1Failed=0, gate1Failed_History_0=0, gate1Failed_History_1=0, gate1Failed_History_2=0, gate2Failed=1, gate2Failed_History_0=1, gate2Failed_History_1=0, gate2Failed_History_2=0, gate3Failed=1, gate3Failed_History_0=1, gate3Failed_History_1=0, gate3Failed_History_2=0, nomsg=-1, VALUE1=1, VALUE2=0, VALUE3=0, votedValue_History_0=1, votedValue_History_1=-1, votedValue_History_2=-2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 513 locations, 37 error locations. Result: UNSAFE, OverallTime: 240.8s, OverallIterations: 71, TraceHistogramMax: 3, AutomataDifference: 204.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 41053 SDtfs, 72129 SDslu, 216750 SDs, 0 SdLazy, 51115 SolverSat, 1534 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 26.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 9164 GetRequests, 5424 SyntacticMatches, 11 SemanticMatches, 3729 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1432977 ImplicationChecksByTransitivity, 81.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=5864occurred in iteration=70, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 19.2s AutomataMinimizationTime, 70 MinimizatonAttempts, 283229 StatesRemovedByMinimization, 62 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.8s SsaConstructionTime, 2.4s SatisfiabilityAnalysisTime, 6.5s InterpolantComputationTime, 18173 NumberOfCodeBlocks, 18173 NumberOfCodeBlocksAsserted, 92 NumberOfCheckSat, 17803 ConstructedInterpolants, 0 QuantifiedInterpolants, 14334520 SizeOfPredicates, 135 NumberOfNonLiveVariables, 21036 ConjunctsInSsa, 371 ConjunctsInUnsatCore, 91 InterpolantComputations, 51 PerfectInterpolantSequences, 9839/10764 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...