./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded-reduced/pals_floodmax.3.3.ufo.BOUNDED-6.pals.c.v+nlh-reducer.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_70a1e8cc-1cf5-45d7-8c90-646579466917/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_70a1e8cc-1cf5-45d7-8c90-646579466917/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_70a1e8cc-1cf5-45d7-8c90-646579466917/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_70a1e8cc-1cf5-45d7-8c90-646579466917/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded-reduced/pals_floodmax.3.3.ufo.BOUNDED-6.pals.c.v+nlh-reducer.c -s /tmp/vcloud-vcloud-master/worker/run_dir_70a1e8cc-1cf5-45d7-8c90-646579466917/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_70a1e8cc-1cf5-45d7-8c90-646579466917/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9567a448a4d48f04800e09cdf8d7a9b08db67030 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:35:58,975 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:35:58,977 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:35:58,984 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:35:58,984 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:35:58,985 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:35:58,986 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:35:58,987 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:35:58,988 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:35:58,989 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:35:58,990 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:35:58,990 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:35:58,991 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:35:58,991 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:35:58,992 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:35:58,993 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:35:58,993 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:35:58,994 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:35:58,995 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:35:58,996 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:35:58,998 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:35:58,998 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:35:58,999 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:35:58,999 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:35:59,001 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:35:59,001 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:35:59,001 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:35:59,002 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:35:59,002 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:35:59,003 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:35:59,003 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:35:59,003 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:35:59,004 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:35:59,004 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:35:59,005 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:35:59,005 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:35:59,005 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:35:59,005 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:35:59,005 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:35:59,006 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:35:59,006 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:35:59,007 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_70a1e8cc-1cf5-45d7-8c90-646579466917/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:35:59,016 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:35:59,016 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:35:59,017 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:35:59,017 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:35:59,017 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:35:59,018 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:35:59,018 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:35:59,018 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:35:59,018 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:35:59,018 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:35:59,018 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:35:59,018 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:35:59,018 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:35:59,019 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:35:59,019 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:35:59,019 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:35:59,019 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:35:59,019 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:35:59,019 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:35:59,019 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:35:59,019 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:35:59,020 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:35:59,020 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:35:59,020 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:35:59,020 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:35:59,020 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:35:59,020 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:35:59,020 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:35:59,020 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:35:59,021 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_70a1e8cc-1cf5-45d7-8c90-646579466917/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9567a448a4d48f04800e09cdf8d7a9b08db67030 [2019-12-07 18:35:59,119 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:35:59,127 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:35:59,129 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:35:59,130 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:35:59,130 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:35:59,131 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_70a1e8cc-1cf5-45d7-8c90-646579466917/bin/uautomizer/../../sv-benchmarks/c/seq-mthreaded-reduced/pals_floodmax.3.3.ufo.BOUNDED-6.pals.c.v+nlh-reducer.c [2019-12-07 18:35:59,167 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_70a1e8cc-1cf5-45d7-8c90-646579466917/bin/uautomizer/data/cb87d56c0/79ab846a73d448ec83cdde29c33bc9a5/FLAG32c0d9677 [2019-12-07 18:35:59,589 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:35:59,590 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_70a1e8cc-1cf5-45d7-8c90-646579466917/sv-benchmarks/c/seq-mthreaded-reduced/pals_floodmax.3.3.ufo.BOUNDED-6.pals.c.v+nlh-reducer.c [2019-12-07 18:35:59,600 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_70a1e8cc-1cf5-45d7-8c90-646579466917/bin/uautomizer/data/cb87d56c0/79ab846a73d448ec83cdde29c33bc9a5/FLAG32c0d9677 [2019-12-07 18:35:59,611 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_70a1e8cc-1cf5-45d7-8c90-646579466917/bin/uautomizer/data/cb87d56c0/79ab846a73d448ec83cdde29c33bc9a5 [2019-12-07 18:35:59,614 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:35:59,615 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:35:59,616 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:35:59,616 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:35:59,619 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:35:59,619 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:35:59" (1/1) ... [2019-12-07 18:35:59,621 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@37586ed5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:35:59, skipping insertion in model container [2019-12-07 18:35:59,621 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:35:59" (1/1) ... [2019-12-07 18:35:59,626 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:35:59,661 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:35:59,921 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:35:59,928 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:36:00,024 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:36:00,036 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:36:00,036 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:00 WrapperNode [2019-12-07 18:36:00,036 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:36:00,037 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:36:00,037 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:36:00,037 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:36:00,042 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:00" (1/1) ... [2019-12-07 18:36:00,053 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:00" (1/1) ... [2019-12-07 18:36:00,082 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:36:00,082 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:36:00,083 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:36:00,083 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:36:00,089 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:00" (1/1) ... [2019-12-07 18:36:00,089 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:00" (1/1) ... [2019-12-07 18:36:00,092 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:00" (1/1) ... [2019-12-07 18:36:00,092 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:00" (1/1) ... [2019-12-07 18:36:00,102 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:00" (1/1) ... [2019-12-07 18:36:00,110 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:00" (1/1) ... [2019-12-07 18:36:00,113 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:00" (1/1) ... [2019-12-07 18:36:00,117 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:36:00,117 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:36:00,117 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:36:00,117 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:36:00,118 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:00" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_70a1e8cc-1cf5-45d7-8c90-646579466917/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:36:00,166 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:36:00,166 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:36:00,817 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:36:00,818 INFO L287 CfgBuilder]: Removed 4 assume(true) statements. [2019-12-07 18:36:00,819 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:36:00 BoogieIcfgContainer [2019-12-07 18:36:00,819 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:36:00,819 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:36:00,819 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:36:00,821 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:36:00,821 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:35:59" (1/3) ... [2019-12-07 18:36:00,822 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7d8e1855 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:36:00, skipping insertion in model container [2019-12-07 18:36:00,822 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:00" (2/3) ... [2019-12-07 18:36:00,822 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7d8e1855 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:36:00, skipping insertion in model container [2019-12-07 18:36:00,822 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:36:00" (3/3) ... [2019-12-07 18:36:00,823 INFO L109 eAbstractionObserver]: Analyzing ICFG pals_floodmax.3.3.ufo.BOUNDED-6.pals.c.v+nlh-reducer.c [2019-12-07 18:36:00,829 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:36:00,834 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-12-07 18:36:00,842 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-12-07 18:36:00,864 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:36:00,864 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:36:00,864 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:36:00,864 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:36:00,864 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:36:00,864 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:36:00,864 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:36:00,864 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:36:00,880 INFO L276 IsEmpty]: Start isEmpty. Operand 305 states. [2019-12-07 18:36:00,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2019-12-07 18:36:00,891 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:00,892 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:00,892 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:00,895 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:00,896 INFO L82 PathProgramCache]: Analyzing trace with hash 574427721, now seen corresponding path program 1 times [2019-12-07 18:36:00,901 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:00,902 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [989795785] [2019-12-07 18:36:00,902 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:01,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:01,203 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:01,203 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [989795785] [2019-12-07 18:36:01,204 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:01,204 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:36:01,205 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2016190906] [2019-12-07 18:36:01,209 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:01,209 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:01,217 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:01,218 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:01,219 INFO L87 Difference]: Start difference. First operand 305 states. Second operand 3 states. [2019-12-07 18:36:01,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:01,341 INFO L93 Difference]: Finished difference Result 612 states and 1078 transitions. [2019-12-07 18:36:01,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:01,342 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 144 [2019-12-07 18:36:01,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:01,354 INFO L225 Difference]: With dead ends: 612 [2019-12-07 18:36:01,354 INFO L226 Difference]: Without dead ends: 495 [2019-12-07 18:36:01,357 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:01,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 495 states. [2019-12-07 18:36:01,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 495 to 493. [2019-12-07 18:36:01,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 493 states. [2019-12-07 18:36:01,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 493 states to 493 states and 736 transitions. [2019-12-07 18:36:01,415 INFO L78 Accepts]: Start accepts. Automaton has 493 states and 736 transitions. Word has length 144 [2019-12-07 18:36:01,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:01,416 INFO L462 AbstractCegarLoop]: Abstraction has 493 states and 736 transitions. [2019-12-07 18:36:01,416 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:01,416 INFO L276 IsEmpty]: Start isEmpty. Operand 493 states and 736 transitions. [2019-12-07 18:36:01,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2019-12-07 18:36:01,419 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:01,419 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:01,420 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:01,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:01,420 INFO L82 PathProgramCache]: Analyzing trace with hash 505056235, now seen corresponding path program 1 times [2019-12-07 18:36:01,420 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:01,420 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [621933193] [2019-12-07 18:36:01,421 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:01,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:01,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:01,562 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [621933193] [2019-12-07 18:36:01,562 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:01,562 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:36:01,562 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1638653603] [2019-12-07 18:36:01,564 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:01,564 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:01,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:01,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:01,565 INFO L87 Difference]: Start difference. First operand 493 states and 736 transitions. Second operand 3 states. [2019-12-07 18:36:01,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:01,636 INFO L93 Difference]: Finished difference Result 1063 states and 1633 transitions. [2019-12-07 18:36:01,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:01,637 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 144 [2019-12-07 18:36:01,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:01,643 INFO L225 Difference]: With dead ends: 1063 [2019-12-07 18:36:01,643 INFO L226 Difference]: Without dead ends: 865 [2019-12-07 18:36:01,646 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:01,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2019-12-07 18:36:01,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 863. [2019-12-07 18:36:01,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 863 states. [2019-12-07 18:36:01,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 863 states to 863 states and 1300 transitions. [2019-12-07 18:36:01,681 INFO L78 Accepts]: Start accepts. Automaton has 863 states and 1300 transitions. Word has length 144 [2019-12-07 18:36:01,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:01,681 INFO L462 AbstractCegarLoop]: Abstraction has 863 states and 1300 transitions. [2019-12-07 18:36:01,681 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:01,681 INFO L276 IsEmpty]: Start isEmpty. Operand 863 states and 1300 transitions. [2019-12-07 18:36:01,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2019-12-07 18:36:01,684 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:01,685 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:01,685 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:01,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:01,685 INFO L82 PathProgramCache]: Analyzing trace with hash 459957428, now seen corresponding path program 1 times [2019-12-07 18:36:01,686 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:01,686 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242611614] [2019-12-07 18:36:01,686 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:01,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:01,908 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:01,908 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242611614] [2019-12-07 18:36:01,909 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:01,909 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:36:01,909 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1156276448] [2019-12-07 18:36:01,909 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:36:01,909 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:01,909 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:36:01,910 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:36:01,910 INFO L87 Difference]: Start difference. First operand 863 states and 1300 transitions. Second operand 4 states. [2019-12-07 18:36:01,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:01,998 INFO L93 Difference]: Finished difference Result 2524 states and 3793 transitions. [2019-12-07 18:36:01,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:36:01,998 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 144 [2019-12-07 18:36:01,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:02,005 INFO L225 Difference]: With dead ends: 2524 [2019-12-07 18:36:02,005 INFO L226 Difference]: Without dead ends: 1670 [2019-12-07 18:36:02,007 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:36:02,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1670 states. [2019-12-07 18:36:02,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1670 to 1668. [2019-12-07 18:36:02,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1668 states. [2019-12-07 18:36:02,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1668 states to 1668 states and 2486 transitions. [2019-12-07 18:36:02,052 INFO L78 Accepts]: Start accepts. Automaton has 1668 states and 2486 transitions. Word has length 144 [2019-12-07 18:36:02,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:02,053 INFO L462 AbstractCegarLoop]: Abstraction has 1668 states and 2486 transitions. [2019-12-07 18:36:02,053 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:36:02,053 INFO L276 IsEmpty]: Start isEmpty. Operand 1668 states and 2486 transitions. [2019-12-07 18:36:02,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2019-12-07 18:36:02,055 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:02,055 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:02,055 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:02,055 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:02,056 INFO L82 PathProgramCache]: Analyzing trace with hash -1789583768, now seen corresponding path program 1 times [2019-12-07 18:36:02,056 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:02,056 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [39849208] [2019-12-07 18:36:02,056 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:02,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:02,084 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:02,084 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [39849208] [2019-12-07 18:36:02,085 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:02,085 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:36:02,085 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [940570725] [2019-12-07 18:36:02,085 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:02,085 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:02,085 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:02,085 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:02,086 INFO L87 Difference]: Start difference. First operand 1668 states and 2486 transitions. Second operand 3 states. [2019-12-07 18:36:02,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:02,169 INFO L93 Difference]: Finished difference Result 4966 states and 7396 transitions. [2019-12-07 18:36:02,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:02,169 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 145 [2019-12-07 18:36:02,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:02,187 INFO L225 Difference]: With dead ends: 4966 [2019-12-07 18:36:02,187 INFO L226 Difference]: Without dead ends: 3326 [2019-12-07 18:36:02,190 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:02,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3326 states. [2019-12-07 18:36:02,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3326 to 1670. [2019-12-07 18:36:02,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1670 states. [2019-12-07 18:36:02,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1670 states to 1670 states and 2488 transitions. [2019-12-07 18:36:02,278 INFO L78 Accepts]: Start accepts. Automaton has 1670 states and 2488 transitions. Word has length 145 [2019-12-07 18:36:02,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:02,278 INFO L462 AbstractCegarLoop]: Abstraction has 1670 states and 2488 transitions. [2019-12-07 18:36:02,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:02,278 INFO L276 IsEmpty]: Start isEmpty. Operand 1670 states and 2488 transitions. [2019-12-07 18:36:02,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2019-12-07 18:36:02,280 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:02,281 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:02,281 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:02,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:02,281 INFO L82 PathProgramCache]: Analyzing trace with hash 338353525, now seen corresponding path program 1 times [2019-12-07 18:36:02,281 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:02,281 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1668513214] [2019-12-07 18:36:02,282 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:02,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:02,386 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:02,386 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1668513214] [2019-12-07 18:36:02,386 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:02,386 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:36:02,387 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [507955847] [2019-12-07 18:36:02,387 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:36:02,387 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:02,387 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:36:02,387 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:36:02,388 INFO L87 Difference]: Start difference. First operand 1670 states and 2488 transitions. Second operand 4 states. [2019-12-07 18:36:02,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:02,449 INFO L93 Difference]: Finished difference Result 3330 states and 4962 transitions. [2019-12-07 18:36:02,450 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:36:02,450 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 146 [2019-12-07 18:36:02,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:02,456 INFO L225 Difference]: With dead ends: 3330 [2019-12-07 18:36:02,456 INFO L226 Difference]: Without dead ends: 1668 [2019-12-07 18:36:02,458 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:36:02,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1668 states. [2019-12-07 18:36:02,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1668 to 1668. [2019-12-07 18:36:02,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1668 states. [2019-12-07 18:36:02,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1668 states to 1668 states and 2484 transitions. [2019-12-07 18:36:02,511 INFO L78 Accepts]: Start accepts. Automaton has 1668 states and 2484 transitions. Word has length 146 [2019-12-07 18:36:02,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:02,511 INFO L462 AbstractCegarLoop]: Abstraction has 1668 states and 2484 transitions. [2019-12-07 18:36:02,511 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:36:02,511 INFO L276 IsEmpty]: Start isEmpty. Operand 1668 states and 2484 transitions. [2019-12-07 18:36:02,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2019-12-07 18:36:02,513 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:02,514 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:02,514 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:02,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:02,514 INFO L82 PathProgramCache]: Analyzing trace with hash -2057553317, now seen corresponding path program 1 times [2019-12-07 18:36:02,514 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:02,514 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1141368208] [2019-12-07 18:36:02,514 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:02,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:02,562 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:02,562 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1141368208] [2019-12-07 18:36:02,562 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:02,562 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:36:02,563 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1767967771] [2019-12-07 18:36:02,563 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:02,563 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:02,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:02,563 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:02,563 INFO L87 Difference]: Start difference. First operand 1668 states and 2484 transitions. Second operand 3 states. [2019-12-07 18:36:02,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:02,674 INFO L93 Difference]: Finished difference Result 3967 states and 5920 transitions. [2019-12-07 18:36:02,674 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:02,675 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 146 [2019-12-07 18:36:02,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:02,684 INFO L225 Difference]: With dead ends: 3967 [2019-12-07 18:36:02,684 INFO L226 Difference]: Without dead ends: 2475 [2019-12-07 18:36:02,686 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:02,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2475 states. [2019-12-07 18:36:02,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2475 to 2473. [2019-12-07 18:36:02,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2473 states. [2019-12-07 18:36:02,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2473 states to 2473 states and 3632 transitions. [2019-12-07 18:36:02,768 INFO L78 Accepts]: Start accepts. Automaton has 2473 states and 3632 transitions. Word has length 146 [2019-12-07 18:36:02,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:02,769 INFO L462 AbstractCegarLoop]: Abstraction has 2473 states and 3632 transitions. [2019-12-07 18:36:02,769 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:02,769 INFO L276 IsEmpty]: Start isEmpty. Operand 2473 states and 3632 transitions. [2019-12-07 18:36:02,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2019-12-07 18:36:02,772 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:02,772 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:02,772 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:02,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:02,772 INFO L82 PathProgramCache]: Analyzing trace with hash 2082628409, now seen corresponding path program 1 times [2019-12-07 18:36:02,772 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:02,772 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1732490436] [2019-12-07 18:36:02,772 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:02,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:02,831 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:02,831 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1732490436] [2019-12-07 18:36:02,831 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:02,832 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:36:02,832 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1948768141] [2019-12-07 18:36:02,832 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:02,832 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:02,832 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:02,832 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:02,833 INFO L87 Difference]: Start difference. First operand 2473 states and 3632 transitions. Second operand 3 states. [2019-12-07 18:36:03,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:03,164 INFO L93 Difference]: Finished difference Result 6622 states and 9828 transitions. [2019-12-07 18:36:03,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:03,165 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 152 [2019-12-07 18:36:03,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:03,188 INFO L225 Difference]: With dead ends: 6622 [2019-12-07 18:36:03,189 INFO L226 Difference]: Without dead ends: 4572 [2019-12-07 18:36:03,192 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:03,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4572 states. [2019-12-07 18:36:03,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4572 to 4570. [2019-12-07 18:36:03,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4570 states. [2019-12-07 18:36:03,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4570 states to 4570 states and 6715 transitions. [2019-12-07 18:36:03,353 INFO L78 Accepts]: Start accepts. Automaton has 4570 states and 6715 transitions. Word has length 152 [2019-12-07 18:36:03,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:03,354 INFO L462 AbstractCegarLoop]: Abstraction has 4570 states and 6715 transitions. [2019-12-07 18:36:03,354 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:03,354 INFO L276 IsEmpty]: Start isEmpty. Operand 4570 states and 6715 transitions. [2019-12-07 18:36:03,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2019-12-07 18:36:03,358 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:03,358 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:03,358 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:03,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:03,359 INFO L82 PathProgramCache]: Analyzing trace with hash 243591764, now seen corresponding path program 1 times [2019-12-07 18:36:03,359 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:03,359 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2030437195] [2019-12-07 18:36:03,359 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:03,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:03,464 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:03,464 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2030437195] [2019-12-07 18:36:03,464 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:03,464 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:36:03,464 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [333173642] [2019-12-07 18:36:03,465 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:36:03,465 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:03,465 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:36:03,465 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:36:03,465 INFO L87 Difference]: Start difference. First operand 4570 states and 6715 transitions. Second operand 5 states. [2019-12-07 18:36:03,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:03,829 INFO L93 Difference]: Finished difference Result 9906 states and 15527 transitions. [2019-12-07 18:36:03,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:36:03,829 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 152 [2019-12-07 18:36:03,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:03,860 INFO L225 Difference]: With dead ends: 9906 [2019-12-07 18:36:03,860 INFO L226 Difference]: Without dead ends: 8150 [2019-12-07 18:36:03,864 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:36:03,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8150 states. [2019-12-07 18:36:04,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8150 to 6396. [2019-12-07 18:36:04,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6396 states. [2019-12-07 18:36:04,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6396 states to 6396 states and 9715 transitions. [2019-12-07 18:36:04,071 INFO L78 Accepts]: Start accepts. Automaton has 6396 states and 9715 transitions. Word has length 152 [2019-12-07 18:36:04,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:04,071 INFO L462 AbstractCegarLoop]: Abstraction has 6396 states and 9715 transitions. [2019-12-07 18:36:04,071 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:36:04,071 INFO L276 IsEmpty]: Start isEmpty. Operand 6396 states and 9715 transitions. [2019-12-07 18:36:04,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2019-12-07 18:36:04,075 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:04,076 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:04,076 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:04,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:04,076 INFO L82 PathProgramCache]: Analyzing trace with hash -1237221404, now seen corresponding path program 1 times [2019-12-07 18:36:04,076 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:04,076 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [880586442] [2019-12-07 18:36:04,076 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:04,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:04,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:04,138 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [880586442] [2019-12-07 18:36:04,138 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:04,138 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:36:04,138 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [960553227] [2019-12-07 18:36:04,138 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:04,138 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:04,138 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:04,139 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:04,139 INFO L87 Difference]: Start difference. First operand 6396 states and 9715 transitions. Second operand 3 states. [2019-12-07 18:36:04,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:04,446 INFO L93 Difference]: Finished difference Result 14984 states and 23199 transitions. [2019-12-07 18:36:04,446 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:04,446 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 152 [2019-12-07 18:36:04,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:04,466 INFO L225 Difference]: With dead ends: 14984 [2019-12-07 18:36:04,466 INFO L226 Difference]: Without dead ends: 11174 [2019-12-07 18:36:04,470 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:04,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11174 states. [2019-12-07 18:36:04,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11174 to 11172. [2019-12-07 18:36:04,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11172 states. [2019-12-07 18:36:04,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11172 states to 11172 states and 16897 transitions. [2019-12-07 18:36:04,745 INFO L78 Accepts]: Start accepts. Automaton has 11172 states and 16897 transitions. Word has length 152 [2019-12-07 18:36:04,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:04,745 INFO L462 AbstractCegarLoop]: Abstraction has 11172 states and 16897 transitions. [2019-12-07 18:36:04,745 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:04,745 INFO L276 IsEmpty]: Start isEmpty. Operand 11172 states and 16897 transitions. [2019-12-07 18:36:04,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2019-12-07 18:36:04,752 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:04,752 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:04,752 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:04,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:04,753 INFO L82 PathProgramCache]: Analyzing trace with hash 198492957, now seen corresponding path program 1 times [2019-12-07 18:36:04,753 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:04,753 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1366641522] [2019-12-07 18:36:04,753 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:04,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:04,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:04,868 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1366641522] [2019-12-07 18:36:04,868 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:04,868 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:36:04,868 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1402632047] [2019-12-07 18:36:04,868 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:36:04,868 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:04,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:36:04,869 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:36:04,869 INFO L87 Difference]: Start difference. First operand 11172 states and 16897 transitions. Second operand 4 states. [2019-12-07 18:36:05,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:05,183 INFO L93 Difference]: Finished difference Result 15176 states and 23415 transitions. [2019-12-07 18:36:05,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:36:05,183 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 152 [2019-12-07 18:36:05,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:05,198 INFO L225 Difference]: With dead ends: 15176 [2019-12-07 18:36:05,199 INFO L226 Difference]: Without dead ends: 11174 [2019-12-07 18:36:05,203 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:36:05,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11174 states. [2019-12-07 18:36:05,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11174 to 11172. [2019-12-07 18:36:05,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11172 states. [2019-12-07 18:36:05,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11172 states to 11172 states and 16813 transitions. [2019-12-07 18:36:05,552 INFO L78 Accepts]: Start accepts. Automaton has 11172 states and 16813 transitions. Word has length 152 [2019-12-07 18:36:05,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:05,552 INFO L462 AbstractCegarLoop]: Abstraction has 11172 states and 16813 transitions. [2019-12-07 18:36:05,552 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:36:05,552 INFO L276 IsEmpty]: Start isEmpty. Operand 11172 states and 16813 transitions. [2019-12-07 18:36:05,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2019-12-07 18:36:05,558 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:05,558 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:05,558 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:05,558 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:05,558 INFO L82 PathProgramCache]: Analyzing trace with hash -708900510, now seen corresponding path program 1 times [2019-12-07 18:36:05,558 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:05,559 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2039392651] [2019-12-07 18:36:05,559 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:05,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:05,682 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:05,682 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2039392651] [2019-12-07 18:36:05,682 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:05,682 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:36:05,682 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1762885957] [2019-12-07 18:36:05,683 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:36:05,683 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:05,683 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:36:05,683 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:36:05,683 INFO L87 Difference]: Start difference. First operand 11172 states and 16813 transitions. Second operand 4 states. [2019-12-07 18:36:06,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:06,139 INFO L93 Difference]: Finished difference Result 29268 states and 44027 transitions. [2019-12-07 18:36:06,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:36:06,139 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 152 [2019-12-07 18:36:06,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:06,158 INFO L225 Difference]: With dead ends: 29268 [2019-12-07 18:36:06,158 INFO L226 Difference]: Without dead ends: 18115 [2019-12-07 18:36:06,168 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:36:06,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18115 states. [2019-12-07 18:36:06,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18115 to 18113. [2019-12-07 18:36:06,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18113 states. [2019-12-07 18:36:06,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18113 states to 18113 states and 26956 transitions. [2019-12-07 18:36:06,700 INFO L78 Accepts]: Start accepts. Automaton has 18113 states and 26956 transitions. Word has length 152 [2019-12-07 18:36:06,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:06,700 INFO L462 AbstractCegarLoop]: Abstraction has 18113 states and 26956 transitions. [2019-12-07 18:36:06,700 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:36:06,700 INFO L276 IsEmpty]: Start isEmpty. Operand 18113 states and 26956 transitions. [2019-12-07 18:36:06,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2019-12-07 18:36:06,708 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:06,708 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:06,709 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:06,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:06,709 INFO L82 PathProgramCache]: Analyzing trace with hash -1734446853, now seen corresponding path program 1 times [2019-12-07 18:36:06,709 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:06,709 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1081347426] [2019-12-07 18:36:06,709 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:06,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:06,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:06,759 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1081347426] [2019-12-07 18:36:06,759 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:06,759 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:36:06,759 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2073144602] [2019-12-07 18:36:06,759 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:06,759 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:06,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:06,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:06,760 INFO L87 Difference]: Start difference. First operand 18113 states and 26956 transitions. Second operand 3 states. [2019-12-07 18:36:07,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:07,591 INFO L93 Difference]: Finished difference Result 49143 states and 72994 transitions. [2019-12-07 18:36:07,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:07,591 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 154 [2019-12-07 18:36:07,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:07,617 INFO L225 Difference]: With dead ends: 49143 [2019-12-07 18:36:07,617 INFO L226 Difference]: Without dead ends: 31515 [2019-12-07 18:36:07,633 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:07,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31515 states. [2019-12-07 18:36:08,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31515 to 31513. [2019-12-07 18:36:08,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31513 states. [2019-12-07 18:36:08,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31513 states to 31513 states and 46190 transitions. [2019-12-07 18:36:08,606 INFO L78 Accepts]: Start accepts. Automaton has 31513 states and 46190 transitions. Word has length 154 [2019-12-07 18:36:08,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:08,606 INFO L462 AbstractCegarLoop]: Abstraction has 31513 states and 46190 transitions. [2019-12-07 18:36:08,606 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:08,607 INFO L276 IsEmpty]: Start isEmpty. Operand 31513 states and 46190 transitions. [2019-12-07 18:36:08,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2019-12-07 18:36:08,624 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:08,624 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:08,624 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:08,624 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:08,624 INFO L82 PathProgramCache]: Analyzing trace with hash -2131418088, now seen corresponding path program 1 times [2019-12-07 18:36:08,624 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:08,625 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [450679501] [2019-12-07 18:36:08,625 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:08,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:08,789 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:08,789 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [450679501] [2019-12-07 18:36:08,790 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:08,790 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:36:08,790 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1850968040] [2019-12-07 18:36:08,790 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:36:08,790 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:08,790 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:36:08,790 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:36:08,791 INFO L87 Difference]: Start difference. First operand 31513 states and 46190 transitions. Second operand 4 states. [2019-12-07 18:36:09,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:09,487 INFO L93 Difference]: Finished difference Result 52633 states and 77128 transitions. [2019-12-07 18:36:09,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:36:09,488 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 154 [2019-12-07 18:36:09,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:09,513 INFO L225 Difference]: With dead ends: 52633 [2019-12-07 18:36:09,513 INFO L226 Difference]: Without dead ends: 28386 [2019-12-07 18:36:09,532 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:36:09,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28386 states. [2019-12-07 18:36:10,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28386 to 28386. [2019-12-07 18:36:10,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28386 states. [2019-12-07 18:36:10,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28386 states to 28386 states and 41593 transitions. [2019-12-07 18:36:10,394 INFO L78 Accepts]: Start accepts. Automaton has 28386 states and 41593 transitions. Word has length 154 [2019-12-07 18:36:10,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:10,395 INFO L462 AbstractCegarLoop]: Abstraction has 28386 states and 41593 transitions. [2019-12-07 18:36:10,395 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:36:10,395 INFO L276 IsEmpty]: Start isEmpty. Operand 28386 states and 41593 transitions. [2019-12-07 18:36:10,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2019-12-07 18:36:10,407 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:10,407 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:10,407 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:10,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:10,407 INFO L82 PathProgramCache]: Analyzing trace with hash 145948848, now seen corresponding path program 1 times [2019-12-07 18:36:10,407 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:10,408 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [977364362] [2019-12-07 18:36:10,408 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:10,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:10,476 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:10,476 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [977364362] [2019-12-07 18:36:10,476 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:10,477 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:36:10,477 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1179729009] [2019-12-07 18:36:10,477 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:10,477 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:10,477 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:10,477 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:10,477 INFO L87 Difference]: Start difference. First operand 28386 states and 41593 transitions. Second operand 3 states. [2019-12-07 18:36:11,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:11,581 INFO L93 Difference]: Finished difference Result 51830 states and 78451 transitions. [2019-12-07 18:36:11,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:11,581 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 160 [2019-12-07 18:36:11,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:11,610 INFO L225 Difference]: With dead ends: 51830 [2019-12-07 18:36:11,610 INFO L226 Difference]: Without dead ends: 36132 [2019-12-07 18:36:11,623 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:11,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36132 states. [2019-12-07 18:36:12,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36132 to 33666. [2019-12-07 18:36:12,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33666 states. [2019-12-07 18:36:12,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33666 states to 33666 states and 49361 transitions. [2019-12-07 18:36:12,743 INFO L78 Accepts]: Start accepts. Automaton has 33666 states and 49361 transitions. Word has length 160 [2019-12-07 18:36:12,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:12,743 INFO L462 AbstractCegarLoop]: Abstraction has 33666 states and 49361 transitions. [2019-12-07 18:36:12,743 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:12,743 INFO L276 IsEmpty]: Start isEmpty. Operand 33666 states and 49361 transitions. [2019-12-07 18:36:12,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2019-12-07 18:36:12,755 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:12,755 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:12,755 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:12,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:12,756 INFO L82 PathProgramCache]: Analyzing trace with hash -823031726, now seen corresponding path program 1 times [2019-12-07 18:36:12,756 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:12,756 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2090199237] [2019-12-07 18:36:12,756 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:12,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:12,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:12,930 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2090199237] [2019-12-07 18:36:12,930 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:12,931 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:36:12,931 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [909726718] [2019-12-07 18:36:12,931 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:36:12,931 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:12,931 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:36:12,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:36:12,932 INFO L87 Difference]: Start difference. First operand 33666 states and 49361 transitions. Second operand 9 states. [2019-12-07 18:36:14,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:14,147 INFO L93 Difference]: Finished difference Result 55414 states and 83395 transitions. [2019-12-07 18:36:14,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:36:14,148 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 160 [2019-12-07 18:36:14,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:14,181 INFO L225 Difference]: With dead ends: 55414 [2019-12-07 18:36:14,181 INFO L226 Difference]: Without dead ends: 33668 [2019-12-07 18:36:14,198 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:36:14,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33668 states. [2019-12-07 18:36:15,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33668 to 31426. [2019-12-07 18:36:15,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31426 states. [2019-12-07 18:36:15,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31426 states to 31426 states and 45593 transitions. [2019-12-07 18:36:15,385 INFO L78 Accepts]: Start accepts. Automaton has 31426 states and 45593 transitions. Word has length 160 [2019-12-07 18:36:15,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:15,385 INFO L462 AbstractCegarLoop]: Abstraction has 31426 states and 45593 transitions. [2019-12-07 18:36:15,385 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:36:15,386 INFO L276 IsEmpty]: Start isEmpty. Operand 31426 states and 45593 transitions. [2019-12-07 18:36:15,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2019-12-07 18:36:15,393 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:15,393 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:15,393 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:15,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:15,393 INFO L82 PathProgramCache]: Analyzing trace with hash 1991122402, now seen corresponding path program 1 times [2019-12-07 18:36:15,394 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:15,394 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [73178473] [2019-12-07 18:36:15,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:15,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:15,480 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:15,480 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [73178473] [2019-12-07 18:36:15,480 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:15,480 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:36:15,481 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1323578968] [2019-12-07 18:36:15,481 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:36:15,481 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:15,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:36:15,482 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:36:15,482 INFO L87 Difference]: Start difference. First operand 31426 states and 45593 transitions. Second operand 5 states. [2019-12-07 18:36:17,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:17,367 INFO L93 Difference]: Finished difference Result 63430 states and 95573 transitions. [2019-12-07 18:36:17,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:36:17,367 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 160 [2019-12-07 18:36:17,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:17,418 INFO L225 Difference]: With dead ends: 63430 [2019-12-07 18:36:17,419 INFO L226 Difference]: Without dead ends: 55188 [2019-12-07 18:36:17,432 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:36:17,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55188 states. [2019-12-07 18:36:18,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55188 to 33650. [2019-12-07 18:36:18,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33650 states. [2019-12-07 18:36:18,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33650 states to 33650 states and 49105 transitions. [2019-12-07 18:36:18,888 INFO L78 Accepts]: Start accepts. Automaton has 33650 states and 49105 transitions. Word has length 160 [2019-12-07 18:36:18,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:18,889 INFO L462 AbstractCegarLoop]: Abstraction has 33650 states and 49105 transitions. [2019-12-07 18:36:18,889 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:36:18,889 INFO L276 IsEmpty]: Start isEmpty. Operand 33650 states and 49105 transitions. [2019-12-07 18:36:18,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2019-12-07 18:36:18,895 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:18,895 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:18,895 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:18,896 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:18,896 INFO L82 PathProgramCache]: Analyzing trace with hash 1752131473, now seen corresponding path program 1 times [2019-12-07 18:36:18,896 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:18,896 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [724428662] [2019-12-07 18:36:18,896 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:18,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:18,996 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:18,996 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [724428662] [2019-12-07 18:36:18,996 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:18,996 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:36:18,996 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [287391682] [2019-12-07 18:36:18,997 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:36:18,997 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:18,997 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:36:18,997 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:36:18,997 INFO L87 Difference]: Start difference. First operand 33650 states and 49105 transitions. Second operand 4 states. [2019-12-07 18:36:21,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:21,314 INFO L93 Difference]: Finished difference Result 98524 states and 143453 transitions. [2019-12-07 18:36:21,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:36:21,315 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 160 [2019-12-07 18:36:21,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:21,374 INFO L225 Difference]: With dead ends: 98524 [2019-12-07 18:36:21,374 INFO L226 Difference]: Without dead ends: 64913 [2019-12-07 18:36:21,393 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:36:21,433 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64913 states. [2019-12-07 18:36:24,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64913 to 64911. [2019-12-07 18:36:24,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64911 states. [2019-12-07 18:36:24,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64911 states to 64911 states and 93478 transitions. [2019-12-07 18:36:24,158 INFO L78 Accepts]: Start accepts. Automaton has 64911 states and 93478 transitions. Word has length 160 [2019-12-07 18:36:24,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:24,159 INFO L462 AbstractCegarLoop]: Abstraction has 64911 states and 93478 transitions. [2019-12-07 18:36:24,159 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:36:24,159 INFO L276 IsEmpty]: Start isEmpty. Operand 64911 states and 93478 transitions. [2019-12-07 18:36:24,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2019-12-07 18:36:24,174 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:24,174 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:24,174 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:24,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:24,174 INFO L82 PathProgramCache]: Analyzing trace with hash -1927797241, now seen corresponding path program 1 times [2019-12-07 18:36:24,174 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:24,175 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1325557775] [2019-12-07 18:36:24,175 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:24,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:24,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:24,202 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1325557775] [2019-12-07 18:36:24,202 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:24,202 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:36:24,202 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1490662689] [2019-12-07 18:36:24,202 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:24,202 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:24,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:24,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:24,203 INFO L87 Difference]: Start difference. First operand 64911 states and 93478 transitions. Second operand 3 states. [2019-12-07 18:36:28,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:28,804 INFO L93 Difference]: Finished difference Result 194541 states and 280185 transitions. [2019-12-07 18:36:28,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:28,805 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 161 [2019-12-07 18:36:28,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:28,944 INFO L225 Difference]: With dead ends: 194541 [2019-12-07 18:36:28,944 INFO L226 Difference]: Without dead ends: 129735 [2019-12-07 18:36:28,987 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:29,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129735 states. [2019-12-07 18:36:33,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129735 to 64917. [2019-12-07 18:36:33,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64917 states. [2019-12-07 18:36:33,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64917 states to 64917 states and 93484 transitions. [2019-12-07 18:36:33,293 INFO L78 Accepts]: Start accepts. Automaton has 64917 states and 93484 transitions. Word has length 161 [2019-12-07 18:36:33,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:33,294 INFO L462 AbstractCegarLoop]: Abstraction has 64917 states and 93484 transitions. [2019-12-07 18:36:33,294 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:33,294 INFO L276 IsEmpty]: Start isEmpty. Operand 64917 states and 93484 transitions. [2019-12-07 18:36:33,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2019-12-07 18:36:33,310 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:33,311 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:33,311 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:33,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:33,311 INFO L82 PathProgramCache]: Analyzing trace with hash 1605463580, now seen corresponding path program 1 times [2019-12-07 18:36:33,311 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:33,311 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [796266453] [2019-12-07 18:36:33,311 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:33,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:33,359 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:33,359 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [796266453] [2019-12-07 18:36:33,359 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:33,359 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:36:33,359 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1187290958] [2019-12-07 18:36:33,360 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:33,360 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:33,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:33,360 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:33,360 INFO L87 Difference]: Start difference. First operand 64917 states and 93484 transitions. Second operand 3 states. [2019-12-07 18:36:38,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:38,199 INFO L93 Difference]: Finished difference Result 175326 states and 251627 transitions. [2019-12-07 18:36:38,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:38,200 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 162 [2019-12-07 18:36:38,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:38,309 INFO L225 Difference]: With dead ends: 175326 [2019-12-07 18:36:38,309 INFO L226 Difference]: Without dead ends: 111352 [2019-12-07 18:36:38,337 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:38,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111352 states. [2019-12-07 18:36:43,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111352 to 111350. [2019-12-07 18:36:43,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111350 states. [2019-12-07 18:36:43,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111350 states to 111350 states and 157473 transitions. [2019-12-07 18:36:43,553 INFO L78 Accepts]: Start accepts. Automaton has 111350 states and 157473 transitions. Word has length 162 [2019-12-07 18:36:43,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:43,554 INFO L462 AbstractCegarLoop]: Abstraction has 111350 states and 157473 transitions. [2019-12-07 18:36:43,554 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:43,554 INFO L276 IsEmpty]: Start isEmpty. Operand 111350 states and 157473 transitions. [2019-12-07 18:36:43,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2019-12-07 18:36:43,581 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:43,582 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:43,582 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:43,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:43,582 INFO L82 PathProgramCache]: Analyzing trace with hash 688559993, now seen corresponding path program 1 times [2019-12-07 18:36:43,582 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:43,582 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [532628825] [2019-12-07 18:36:43,582 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:43,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:43,661 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:43,661 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [532628825] [2019-12-07 18:36:43,661 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:43,661 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:36:43,661 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [660857102] [2019-12-07 18:36:43,662 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:36:43,662 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:43,662 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:36:43,662 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:36:43,662 INFO L87 Difference]: Start difference. First operand 111350 states and 157473 transitions. Second operand 4 states. [2019-12-07 18:36:47,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:47,841 INFO L93 Difference]: Finished difference Result 206732 states and 292515 transitions. [2019-12-07 18:36:47,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:36:47,842 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 162 [2019-12-07 18:36:47,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:47,942 INFO L225 Difference]: With dead ends: 206732 [2019-12-07 18:36:47,942 INFO L226 Difference]: Without dead ends: 96207 [2019-12-07 18:36:47,991 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:36:48,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96207 states. [2019-12-07 18:36:52,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96207 to 96207. [2019-12-07 18:36:52,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96207 states. [2019-12-07 18:36:52,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96207 states to 96207 states and 136025 transitions. [2019-12-07 18:36:52,517 INFO L78 Accepts]: Start accepts. Automaton has 96207 states and 136025 transitions. Word has length 162 [2019-12-07 18:36:52,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:52,517 INFO L462 AbstractCegarLoop]: Abstraction has 96207 states and 136025 transitions. [2019-12-07 18:36:52,517 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:36:52,518 INFO L276 IsEmpty]: Start isEmpty. Operand 96207 states and 136025 transitions. [2019-12-07 18:36:52,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2019-12-07 18:36:52,541 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:52,541 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:52,541 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:52,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:52,542 INFO L82 PathProgramCache]: Analyzing trace with hash -1760978964, now seen corresponding path program 1 times [2019-12-07 18:36:52,542 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:52,542 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [465623437] [2019-12-07 18:36:52,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:52,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:52,687 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:52,687 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [465623437] [2019-12-07 18:36:52,687 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:52,687 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:36:52,687 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [241745288] [2019-12-07 18:36:52,687 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:36:52,687 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:52,688 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:36:52,688 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:36:52,688 INFO L87 Difference]: Start difference. First operand 96207 states and 136025 transitions. Second operand 10 states. [2019-12-07 18:36:57,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:57,447 INFO L93 Difference]: Finished difference Result 180216 states and 254861 transitions. [2019-12-07 18:36:57,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:36:57,448 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 168 [2019-12-07 18:36:57,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:57,544 INFO L225 Difference]: With dead ends: 180216 [2019-12-07 18:36:57,544 INFO L226 Difference]: Without dead ends: 96207 [2019-12-07 18:36:57,575 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:36:57,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96207 states. [2019-12-07 18:37:02,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96207 to 96207. [2019-12-07 18:37:02,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96207 states. [2019-12-07 18:37:02,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96207 states to 96207 states and 134245 transitions. [2019-12-07 18:37:02,544 INFO L78 Accepts]: Start accepts. Automaton has 96207 states and 134245 transitions. Word has length 168 [2019-12-07 18:37:02,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:02,544 INFO L462 AbstractCegarLoop]: Abstraction has 96207 states and 134245 transitions. [2019-12-07 18:37:02,544 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:37:02,545 INFO L276 IsEmpty]: Start isEmpty. Operand 96207 states and 134245 transitions. [2019-12-07 18:37:02,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2019-12-07 18:37:02,568 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:02,568 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:02,568 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:02,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:02,568 INFO L82 PathProgramCache]: Analyzing trace with hash 317111569, now seen corresponding path program 1 times [2019-12-07 18:37:02,569 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:02,569 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1038435881] [2019-12-07 18:37:02,569 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:02,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:02,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:02,659 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1038435881] [2019-12-07 18:37:02,659 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:02,659 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:37:02,659 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [195949965] [2019-12-07 18:37:02,659 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:37:02,659 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:02,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:37:02,660 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:37:02,660 INFO L87 Difference]: Start difference. First operand 96207 states and 134245 transitions. Second operand 5 states. [2019-12-07 18:37:09,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:09,811 INFO L93 Difference]: Finished difference Result 145883 states and 208539 transitions. [2019-12-07 18:37:09,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:37:09,812 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 168 [2019-12-07 18:37:09,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:09,951 INFO L225 Difference]: With dead ends: 145883 [2019-12-07 18:37:09,951 INFO L226 Difference]: Without dead ends: 134089 [2019-12-07 18:37:09,974 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:37:10,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134089 states. [2019-12-07 18:37:15,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134089 to 102559. [2019-12-07 18:37:15,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102559 states. [2019-12-07 18:37:15,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102559 states to 102559 states and 143889 transitions. [2019-12-07 18:37:15,662 INFO L78 Accepts]: Start accepts. Automaton has 102559 states and 143889 transitions. Word has length 168 [2019-12-07 18:37:15,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:15,663 INFO L462 AbstractCegarLoop]: Abstraction has 102559 states and 143889 transitions. [2019-12-07 18:37:15,663 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:37:15,663 INFO L276 IsEmpty]: Start isEmpty. Operand 102559 states and 143889 transitions. [2019-12-07 18:37:15,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2019-12-07 18:37:15,687 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:15,688 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:15,688 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:15,688 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:15,688 INFO L82 PathProgramCache]: Analyzing trace with hash -1517392832, now seen corresponding path program 1 times [2019-12-07 18:37:15,688 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:15,688 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [723262689] [2019-12-07 18:37:15,689 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:15,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:15,904 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:15,905 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [723262689] [2019-12-07 18:37:15,905 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:15,905 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 18:37:15,905 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1136867155] [2019-12-07 18:37:15,905 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 18:37:15,905 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:15,906 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 18:37:15,906 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:37:15,906 INFO L87 Difference]: Start difference. First operand 102559 states and 143889 transitions. Second operand 15 states. [2019-12-07 18:37:31,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:31,923 INFO L93 Difference]: Finished difference Result 273908 states and 390342 transitions. [2019-12-07 18:37:31,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 18:37:31,923 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 168 [2019-12-07 18:37:31,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:32,228 INFO L225 Difference]: With dead ends: 273908 [2019-12-07 18:37:32,229 INFO L226 Difference]: Without dead ends: 254042 [2019-12-07 18:37:32,274 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 185 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=338, Invalid=922, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 18:37:32,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254042 states. [2019-12-07 18:37:40,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254042 to 108248. [2019-12-07 18:37:40,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108248 states. [2019-12-07 18:37:40,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108248 states to 108248 states and 150497 transitions. [2019-12-07 18:37:40,597 INFO L78 Accepts]: Start accepts. Automaton has 108248 states and 150497 transitions. Word has length 168 [2019-12-07 18:37:40,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:40,597 INFO L462 AbstractCegarLoop]: Abstraction has 108248 states and 150497 transitions. [2019-12-07 18:37:40,597 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 18:37:40,597 INFO L276 IsEmpty]: Start isEmpty. Operand 108248 states and 150497 transitions. [2019-12-07 18:37:40,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2019-12-07 18:37:40,624 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:40,625 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:40,625 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:40,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:40,625 INFO L82 PathProgramCache]: Analyzing trace with hash 1772221635, now seen corresponding path program 1 times [2019-12-07 18:37:40,625 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:40,625 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [723240758] [2019-12-07 18:37:40,625 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:40,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:40,988 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:40,988 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [723240758] [2019-12-07 18:37:40,988 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:40,988 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 18:37:40,988 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [362714287] [2019-12-07 18:37:40,988 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 18:37:40,988 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:40,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 18:37:40,989 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=267, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:37:40,989 INFO L87 Difference]: Start difference. First operand 108248 states and 150497 transitions. Second operand 18 states. [2019-12-07 18:37:55,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:55,157 INFO L93 Difference]: Finished difference Result 192423 states and 271388 transitions. [2019-12-07 18:37:55,157 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 18:37:55,157 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 168 [2019-12-07 18:37:55,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:55,343 INFO L225 Difference]: With dead ends: 192423 [2019-12-07 18:37:55,344 INFO L226 Difference]: Without dead ends: 173185 [2019-12-07 18:37:55,374 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 209 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=352, Invalid=1130, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 18:37:55,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173185 states. [2019-12-07 18:38:04,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173185 to 112480. [2019-12-07 18:38:04,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112480 states. [2019-12-07 18:38:04,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112480 states to 112480 states and 155518 transitions. [2019-12-07 18:38:04,248 INFO L78 Accepts]: Start accepts. Automaton has 112480 states and 155518 transitions. Word has length 168 [2019-12-07 18:38:04,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:38:04,249 INFO L462 AbstractCegarLoop]: Abstraction has 112480 states and 155518 transitions. [2019-12-07 18:38:04,249 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 18:38:04,249 INFO L276 IsEmpty]: Start isEmpty. Operand 112480 states and 155518 transitions. [2019-12-07 18:38:04,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2019-12-07 18:38:04,277 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:38:04,277 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:38:04,278 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:38:04,278 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:38:04,278 INFO L82 PathProgramCache]: Analyzing trace with hash 447901149, now seen corresponding path program 1 times [2019-12-07 18:38:04,278 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:38:04,278 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169067179] [2019-12-07 18:38:04,278 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:38:04,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:38:04,591 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:38:04,591 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1169067179] [2019-12-07 18:38:04,591 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:38:04,591 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 18:38:04,591 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1446915339] [2019-12-07 18:38:04,592 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:38:04,592 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:38:04,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:38:04,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=202, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:38:04,592 INFO L87 Difference]: Start difference. First operand 112480 states and 155518 transitions. Second operand 16 states. [2019-12-07 18:38:22,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:38:22,881 INFO L93 Difference]: Finished difference Result 268851 states and 379596 transitions. [2019-12-07 18:38:22,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 18:38:22,882 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 168 [2019-12-07 18:38:22,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:38:23,142 INFO L225 Difference]: With dead ends: 268851 [2019-12-07 18:38:23,142 INFO L226 Difference]: Without dead ends: 220463 [2019-12-07 18:38:23,195 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=314, Invalid=808, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 18:38:23,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220463 states. [2019-12-07 18:38:33,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220463 to 122488. [2019-12-07 18:38:33,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122488 states. [2019-12-07 18:38:33,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122488 states to 122488 states and 167177 transitions. [2019-12-07 18:38:33,613 INFO L78 Accepts]: Start accepts. Automaton has 122488 states and 167177 transitions. Word has length 168 [2019-12-07 18:38:33,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:38:33,613 INFO L462 AbstractCegarLoop]: Abstraction has 122488 states and 167177 transitions. [2019-12-07 18:38:33,613 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:38:33,613 INFO L276 IsEmpty]: Start isEmpty. Operand 122488 states and 167177 transitions. [2019-12-07 18:38:33,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2019-12-07 18:38:33,656 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:38:33,656 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:38:33,656 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:38:33,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:38:33,657 INFO L82 PathProgramCache]: Analyzing trace with hash -1447409504, now seen corresponding path program 1 times [2019-12-07 18:38:33,657 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:38:33,657 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [204849967] [2019-12-07 18:38:33,657 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:38:33,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:38:33,745 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:38:33,745 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [204849967] [2019-12-07 18:38:33,745 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:38:33,745 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:38:33,745 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203007866] [2019-12-07 18:38:33,746 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:38:33,746 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:38:33,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:38:33,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:38:33,746 INFO L87 Difference]: Start difference. First operand 122488 states and 167177 transitions. Second operand 4 states. [2019-12-07 18:38:43,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:38:43,383 INFO L93 Difference]: Finished difference Result 231539 states and 315435 transitions. [2019-12-07 18:38:43,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:38:43,383 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 168 [2019-12-07 18:38:43,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:38:43,488 INFO L225 Difference]: With dead ends: 231539 [2019-12-07 18:38:43,489 INFO L226 Difference]: Without dead ends: 109783 [2019-12-07 18:38:43,528 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:38:43,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109783 states. [2019-12-07 18:38:52,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109783 to 109607. [2019-12-07 18:38:52,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109607 states. [2019-12-07 18:38:52,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109607 states to 109607 states and 148880 transitions. [2019-12-07 18:38:52,405 INFO L78 Accepts]: Start accepts. Automaton has 109607 states and 148880 transitions. Word has length 168 [2019-12-07 18:38:52,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:38:52,405 INFO L462 AbstractCegarLoop]: Abstraction has 109607 states and 148880 transitions. [2019-12-07 18:38:52,405 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:38:52,405 INFO L276 IsEmpty]: Start isEmpty. Operand 109607 states and 148880 transitions. [2019-12-07 18:38:52,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2019-12-07 18:38:52,438 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:38:52,438 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:38:52,438 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:38:52,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:38:52,438 INFO L82 PathProgramCache]: Analyzing trace with hash -851682531, now seen corresponding path program 1 times [2019-12-07 18:38:52,438 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:38:52,438 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1134314724] [2019-12-07 18:38:52,438 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:38:52,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:38:52,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:38:52,527 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1134314724] [2019-12-07 18:38:52,527 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:38:52,527 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:38:52,527 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1245028820] [2019-12-07 18:38:52,527 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:38:52,527 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:38:52,527 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:38:52,527 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:38:52,527 INFO L87 Difference]: Start difference. First operand 109607 states and 148880 transitions. Second operand 4 states. [2019-12-07 18:39:01,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:01,735 INFO L93 Difference]: Finished difference Result 219764 states and 298432 transitions. [2019-12-07 18:39:01,735 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:39:01,735 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 170 [2019-12-07 18:39:01,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:01,844 INFO L225 Difference]: With dead ends: 219764 [2019-12-07 18:39:01,845 INFO L226 Difference]: Without dead ends: 110308 [2019-12-07 18:39:01,886 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:39:01,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110308 states. [2019-12-07 18:39:11,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110308 to 109938. [2019-12-07 18:39:11,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109938 states. [2019-12-07 18:39:11,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109938 states to 109938 states and 149249 transitions. [2019-12-07 18:39:11,127 INFO L78 Accepts]: Start accepts. Automaton has 109938 states and 149249 transitions. Word has length 170 [2019-12-07 18:39:11,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:11,127 INFO L462 AbstractCegarLoop]: Abstraction has 109938 states and 149249 transitions. [2019-12-07 18:39:11,127 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:39:11,127 INFO L276 IsEmpty]: Start isEmpty. Operand 109938 states and 149249 transitions. [2019-12-07 18:39:11,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2019-12-07 18:39:11,168 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:11,168 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:11,168 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:11,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:11,168 INFO L82 PathProgramCache]: Analyzing trace with hash 1035364859, now seen corresponding path program 1 times [2019-12-07 18:39:11,168 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:11,169 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025150846] [2019-12-07 18:39:11,169 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:11,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:11,200 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:11,200 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1025150846] [2019-12-07 18:39:11,201 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:11,201 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:39:11,201 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [438863275] [2019-12-07 18:39:11,201 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:39:11,201 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:11,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:39:11,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:39:11,201 INFO L87 Difference]: Start difference. First operand 109938 states and 149249 transitions. Second operand 3 states. [2019-12-07 18:39:29,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:29,235 INFO L93 Difference]: Finished difference Result 305963 states and 414791 transitions. [2019-12-07 18:39:29,236 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:39:29,236 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 171 [2019-12-07 18:39:29,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:29,471 INFO L225 Difference]: With dead ends: 305963 [2019-12-07 18:39:29,471 INFO L226 Difference]: Without dead ends: 219675 [2019-12-07 18:39:29,521 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:39:29,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219675 states. [2019-12-07 18:39:40,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219675 to 109948. [2019-12-07 18:39:40,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109948 states. [2019-12-07 18:39:40,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109948 states to 109948 states and 149259 transitions. [2019-12-07 18:39:40,143 INFO L78 Accepts]: Start accepts. Automaton has 109948 states and 149259 transitions. Word has length 171 [2019-12-07 18:39:40,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:40,143 INFO L462 AbstractCegarLoop]: Abstraction has 109948 states and 149259 transitions. [2019-12-07 18:39:40,143 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:39:40,143 INFO L276 IsEmpty]: Start isEmpty. Operand 109948 states and 149259 transitions. [2019-12-07 18:39:40,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2019-12-07 18:39:40,184 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:40,184 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:40,184 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:40,184 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:40,184 INFO L82 PathProgramCache]: Analyzing trace with hash 17504030, now seen corresponding path program 1 times [2019-12-07 18:39:40,184 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:40,184 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1739538916] [2019-12-07 18:39:40,185 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:40,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:40,262 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:40,262 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1739538916] [2019-12-07 18:39:40,262 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:40,263 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:39:40,263 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1399738743] [2019-12-07 18:39:40,263 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:39:40,263 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:40,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:39:40,263 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:39:40,263 INFO L87 Difference]: Start difference. First operand 109948 states and 149259 transitions. Second operand 4 states. [2019-12-07 18:39:49,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:49,852 INFO L93 Difference]: Finished difference Result 197274 states and 266949 transitions. [2019-12-07 18:39:49,853 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:39:49,853 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 172 [2019-12-07 18:39:49,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:49,963 INFO L225 Difference]: With dead ends: 197274 [2019-12-07 18:39:49,963 INFO L226 Difference]: Without dead ends: 109938 [2019-12-07 18:39:50,004 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:39:50,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109938 states. [2019-12-07 18:39:59,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109938 to 109938. [2019-12-07 18:39:59,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109938 states. [2019-12-07 18:39:59,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109938 states to 109938 states and 149244 transitions. [2019-12-07 18:39:59,915 INFO L78 Accepts]: Start accepts. Automaton has 109938 states and 149244 transitions. Word has length 172 [2019-12-07 18:39:59,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:59,915 INFO L462 AbstractCegarLoop]: Abstraction has 109938 states and 149244 transitions. [2019-12-07 18:39:59,915 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:39:59,915 INFO L276 IsEmpty]: Start isEmpty. Operand 109938 states and 149244 transitions. [2019-12-07 18:39:59,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2019-12-07 18:39:59,955 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:59,955 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:59,955 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:59,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:59,955 INFO L82 PathProgramCache]: Analyzing trace with hash -135824820, now seen corresponding path program 1 times [2019-12-07 18:39:59,956 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:59,956 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [885751288] [2019-12-07 18:39:59,956 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:59,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:00,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:00,048 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [885751288] [2019-12-07 18:40:00,048 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:00,048 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:40:00,048 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [153137922] [2019-12-07 18:40:00,049 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:40:00,049 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:00,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:40:00,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:40:00,049 INFO L87 Difference]: Start difference. First operand 109938 states and 149244 transitions. Second operand 5 states. [2019-12-07 18:40:09,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:09,301 INFO L93 Difference]: Finished difference Result 205083 states and 278407 transitions. [2019-12-07 18:40:09,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:40:09,302 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 172 [2019-12-07 18:40:09,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:09,391 INFO L225 Difference]: With dead ends: 205083 [2019-12-07 18:40:09,391 INFO L226 Difference]: Without dead ends: 95577 [2019-12-07 18:40:09,433 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:40:09,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95577 states. [2019-12-07 18:40:18,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95577 to 94790. [2019-12-07 18:40:18,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94790 states. [2019-12-07 18:40:18,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94790 states to 94790 states and 128668 transitions. [2019-12-07 18:40:18,201 INFO L78 Accepts]: Start accepts. Automaton has 94790 states and 128668 transitions. Word has length 172 [2019-12-07 18:40:18,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:18,202 INFO L462 AbstractCegarLoop]: Abstraction has 94790 states and 128668 transitions. [2019-12-07 18:40:18,202 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:40:18,202 INFO L276 IsEmpty]: Start isEmpty. Operand 94790 states and 128668 transitions. [2019-12-07 18:40:18,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2019-12-07 18:40:18,228 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:18,229 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:18,229 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:18,229 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:18,229 INFO L82 PathProgramCache]: Analyzing trace with hash 2141619215, now seen corresponding path program 1 times [2019-12-07 18:40:18,229 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:18,229 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [584851012] [2019-12-07 18:40:18,229 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:18,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:18,272 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:18,272 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [584851012] [2019-12-07 18:40:18,272 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:18,272 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:40:18,272 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1524886255] [2019-12-07 18:40:18,273 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:40:18,273 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:18,273 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:40:18,273 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:18,273 INFO L87 Difference]: Start difference. First operand 94790 states and 128668 transitions. Second operand 3 states. [2019-12-07 18:40:34,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:34,453 INFO L93 Difference]: Finished difference Result 250324 states and 344295 transitions. [2019-12-07 18:40:34,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:40:34,454 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 174 [2019-12-07 18:40:34,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:34,644 INFO L225 Difference]: With dead ends: 250324 [2019-12-07 18:40:34,644 INFO L226 Difference]: Without dead ends: 175531 [2019-12-07 18:40:34,687 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:34,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175531 states. [2019-12-07 18:40:51,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175531 to 175529. [2019-12-07 18:40:51,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175529 states. [2019-12-07 18:40:51,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175529 states to 175529 states and 237701 transitions. [2019-12-07 18:40:51,940 INFO L78 Accepts]: Start accepts. Automaton has 175529 states and 237701 transitions. Word has length 174 [2019-12-07 18:40:51,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:51,941 INFO L462 AbstractCegarLoop]: Abstraction has 175529 states and 237701 transitions. [2019-12-07 18:40:51,941 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:40:51,941 INFO L276 IsEmpty]: Start isEmpty. Operand 175529 states and 237701 transitions. [2019-12-07 18:40:51,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2019-12-07 18:40:51,994 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:51,994 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:51,994 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:51,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:51,994 INFO L82 PathProgramCache]: Analyzing trace with hash -1926994252, now seen corresponding path program 1 times [2019-12-07 18:40:51,995 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:51,995 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1680763998] [2019-12-07 18:40:51,995 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:52,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:52,318 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:52,318 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1680763998] [2019-12-07 18:40:52,319 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:52,319 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 18:40:52,319 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625876264] [2019-12-07 18:40:52,319 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:40:52,319 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:52,319 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:40:52,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:40:52,319 INFO L87 Difference]: Start difference. First operand 175529 states and 237701 transitions. Second operand 13 states. [2019-12-07 18:41:11,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:11,169 INFO L93 Difference]: Finished difference Result 261353 states and 361674 transitions. [2019-12-07 18:41:11,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 18:41:11,170 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 174 [2019-12-07 18:41:11,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:11,355 INFO L225 Difference]: With dead ends: 261353 [2019-12-07 18:41:11,356 INFO L226 Difference]: Without dead ends: 173113 [2019-12-07 18:41:11,419 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=135, Invalid=327, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:41:11,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173113 states. [2019-12-07 18:41:29,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173113 to 171353. [2019-12-07 18:41:29,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171353 states. [2019-12-07 18:41:29,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171353 states to 171353 states and 232706 transitions. [2019-12-07 18:41:29,509 INFO L78 Accepts]: Start accepts. Automaton has 171353 states and 232706 transitions. Word has length 174 [2019-12-07 18:41:29,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:29,510 INFO L462 AbstractCegarLoop]: Abstraction has 171353 states and 232706 transitions. [2019-12-07 18:41:29,510 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:41:29,510 INFO L276 IsEmpty]: Start isEmpty. Operand 171353 states and 232706 transitions. [2019-12-07 18:41:29,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2019-12-07 18:41:29,561 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:29,561 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:29,561 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:29,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:29,562 INFO L82 PathProgramCache]: Analyzing trace with hash 1464312527, now seen corresponding path program 1 times [2019-12-07 18:41:29,562 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:29,562 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1670585509] [2019-12-07 18:41:29,562 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:29,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:29,634 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:29,634 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1670585509] [2019-12-07 18:41:29,634 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:29,635 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:41:29,635 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [8142675] [2019-12-07 18:41:29,635 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:41:29,635 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:29,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:41:29,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:41:29,635 INFO L87 Difference]: Start difference. First operand 171353 states and 232706 transitions. Second operand 5 states. [2019-12-07 18:41:43,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:43,721 INFO L93 Difference]: Finished difference Result 255798 states and 349006 transitions. [2019-12-07 18:41:43,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:41:43,722 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 174 [2019-12-07 18:41:43,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:43,914 INFO L225 Difference]: With dead ends: 255798 [2019-12-07 18:41:43,914 INFO L226 Difference]: Without dead ends: 131783 [2019-12-07 18:41:43,954 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:41:44,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131783 states. [2019-12-07 18:41:59,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131783 to 131781. [2019-12-07 18:41:59,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131781 states. [2019-12-07 18:41:59,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131781 states to 131781 states and 178958 transitions. [2019-12-07 18:41:59,261 INFO L78 Accepts]: Start accepts. Automaton has 131781 states and 178958 transitions. Word has length 174 [2019-12-07 18:41:59,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:59,261 INFO L462 AbstractCegarLoop]: Abstraction has 131781 states and 178958 transitions. [2019-12-07 18:41:59,261 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:41:59,261 INFO L276 IsEmpty]: Start isEmpty. Operand 131781 states and 178958 transitions. [2019-12-07 18:41:59,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2019-12-07 18:41:59,302 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:59,302 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:59,303 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:59,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:59,303 INFO L82 PathProgramCache]: Analyzing trace with hash 1586665780, now seen corresponding path program 1 times [2019-12-07 18:41:59,303 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:59,303 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [107317690] [2019-12-07 18:41:59,303 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:59,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:59,442 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:59,442 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [107317690] [2019-12-07 18:41:59,442 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:59,443 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:41:59,443 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1658024613] [2019-12-07 18:41:59,443 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:41:59,443 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:59,443 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:41:59,443 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:41:59,443 INFO L87 Difference]: Start difference. First operand 131781 states and 178958 transitions. Second operand 10 states. [2019-12-07 18:42:12,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:12,278 INFO L93 Difference]: Finished difference Result 237437 states and 328010 transitions. [2019-12-07 18:42:12,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:42:12,279 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 174 [2019-12-07 18:42:12,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:12,401 INFO L225 Difference]: With dead ends: 237437 [2019-12-07 18:42:12,401 INFO L226 Difference]: Without dead ends: 114404 [2019-12-07 18:42:12,448 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:42:12,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114404 states. [2019-12-07 18:42:21,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114404 to 72158. [2019-12-07 18:42:21,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72158 states. [2019-12-07 18:42:21,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72158 states to 72158 states and 96545 transitions. [2019-12-07 18:42:21,841 INFO L78 Accepts]: Start accepts. Automaton has 72158 states and 96545 transitions. Word has length 174 [2019-12-07 18:42:21,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:21,841 INFO L462 AbstractCegarLoop]: Abstraction has 72158 states and 96545 transitions. [2019-12-07 18:42:21,841 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:42:21,841 INFO L276 IsEmpty]: Start isEmpty. Operand 72158 states and 96545 transitions. [2019-12-07 18:42:21,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2019-12-07 18:42:21,862 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:21,862 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:21,862 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:21,862 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:21,862 INFO L82 PathProgramCache]: Analyzing trace with hash 683005263, now seen corresponding path program 1 times [2019-12-07 18:42:21,863 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:21,863 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1822404302] [2019-12-07 18:42:21,863 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:21,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:22,244 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:22,244 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1822404302] [2019-12-07 18:42:22,244 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:22,244 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 18:42:22,244 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [677618360] [2019-12-07 18:42:22,245 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 18:42:22,245 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:22,245 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 18:42:22,245 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=331, Unknown=0, NotChecked=0, Total=380 [2019-12-07 18:42:22,245 INFO L87 Difference]: Start difference. First operand 72158 states and 96545 transitions. Second operand 20 states. [2019-12-07 18:42:37,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:37,623 INFO L93 Difference]: Finished difference Result 118652 states and 160632 transitions. [2019-12-07 18:42:37,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 18:42:37,624 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 174 [2019-12-07 18:42:37,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:37,725 INFO L225 Difference]: With dead ends: 118652 [2019-12-07 18:42:37,725 INFO L226 Difference]: Without dead ends: 105466 [2019-12-07 18:42:37,744 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 387 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=373, Invalid=1789, Unknown=0, NotChecked=0, Total=2162 [2019-12-07 18:42:37,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105466 states. [2019-12-07 18:42:47,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105466 to 74381. [2019-12-07 18:42:47,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74381 states. [2019-12-07 18:42:47,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74381 states to 74381 states and 99088 transitions. [2019-12-07 18:42:47,418 INFO L78 Accepts]: Start accepts. Automaton has 74381 states and 99088 transitions. Word has length 174 [2019-12-07 18:42:47,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:47,419 INFO L462 AbstractCegarLoop]: Abstraction has 74381 states and 99088 transitions. [2019-12-07 18:42:47,419 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 18:42:47,419 INFO L276 IsEmpty]: Start isEmpty. Operand 74381 states and 99088 transitions. [2019-12-07 18:42:47,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2019-12-07 18:42:47,441 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:47,441 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:47,442 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:47,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:47,442 INFO L82 PathProgramCache]: Analyzing trace with hash -422507134, now seen corresponding path program 1 times [2019-12-07 18:42:47,442 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:47,442 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1321247413] [2019-12-07 18:42:47,442 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:47,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:42:47,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:42:47,591 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:42:47,591 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:42:47,748 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:42:47 BoogieIcfgContainer [2019-12-07 18:42:47,748 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:42:47,748 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:42:47,748 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:42:47,748 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:42:47,749 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:36:00" (3/4) ... [2019-12-07 18:42:47,750 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:42:47,878 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_70a1e8cc-1cf5-45d7-8c90-646579466917/bin/uautomizer/witness.graphml [2019-12-07 18:42:47,878 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:42:47,880 INFO L168 Benchmark]: Toolchain (without parser) took 408264.72 ms. Allocated memory was 1.0 GB in the beginning and 7.0 GB in the end (delta: 6.0 GB). Free memory was 938.1 MB in the beginning and 1.8 GB in the end (delta: -819.1 MB). Peak memory consumption was 5.2 GB. Max. memory is 11.5 GB. [2019-12-07 18:42:47,880 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 957.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:42:47,881 INFO L168 Benchmark]: CACSL2BoogieTranslator took 420.54 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.2 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -177.9 MB). Peak memory consumption was 26.8 MB. Max. memory is 11.5 GB. [2019-12-07 18:42:47,881 INFO L168 Benchmark]: Boogie Procedure Inliner took 45.53 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 4.3 MB). Peak memory consumption was 4.3 MB. Max. memory is 11.5 GB. [2019-12-07 18:42:47,881 INFO L168 Benchmark]: Boogie Preprocessor took 34.46 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 4.3 MB). Peak memory consumption was 4.3 MB. Max. memory is 11.5 GB. [2019-12-07 18:42:47,882 INFO L168 Benchmark]: RCFGBuilder took 701.67 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 967.2 MB in the end (delta: 140.2 MB). Peak memory consumption was 140.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:42:47,882 INFO L168 Benchmark]: TraceAbstraction took 406928.58 ms. Allocated memory was 1.2 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 967.2 MB in the beginning and 1.8 GB in the end (delta: -814.2 MB). Peak memory consumption was 5.1 GB. Max. memory is 11.5 GB. [2019-12-07 18:42:47,882 INFO L168 Benchmark]: Witness Printer took 130.32 ms. Allocated memory is still 7.0 GB. Free memory was 1.8 GB in the beginning and 1.8 GB in the end (delta: 24.1 MB). Peak memory consumption was 24.1 MB. Max. memory is 11.5 GB. [2019-12-07 18:42:47,884 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 957.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 420.54 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.2 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -177.9 MB). Peak memory consumption was 26.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 45.53 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 4.3 MB). Peak memory consumption was 4.3 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 34.46 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 4.3 MB). Peak memory consumption was 4.3 MB. Max. memory is 11.5 GB. * RCFGBuilder took 701.67 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 967.2 MB in the end (delta: 140.2 MB). Peak memory consumption was 140.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 406928.58 ms. Allocated memory was 1.2 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 967.2 MB in the beginning and 1.8 GB in the end (delta: -814.2 MB). Peak memory consumption was 5.1 GB. Max. memory is 11.5 GB. * Witness Printer took 130.32 ms. Allocated memory is still 7.0 GB. Free memory was 1.8 GB in the beginning and 1.8 GB in the end (delta: 24.1 MB). Peak memory consumption was 24.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 822]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L1] int __return_main; [L11] msg_t nomsg = (msg_t )-1; [L12] port_t p12 = 0; [L13] char p12_old = '\x0'; [L14] char p12_new = '\x0'; [L15] _Bool ep12 = 0; [L16] port_t p13 = 0; [L17] char p13_old = '\x0'; [L18] char p13_new = '\x0'; [L19] _Bool ep13 = 0; [L20] port_t p21 = 0; [L21] char p21_old = '\x0'; [L22] char p21_new = '\x0'; [L23] _Bool ep21 = 0; [L24] port_t p23 = 0; [L25] char p23_old = '\x0'; [L26] char p23_new = '\x0'; [L27] _Bool ep23 = 0; [L28] port_t p31 = 0; [L29] char p31_old = '\x0'; [L30] char p31_new = '\x0'; [L31] _Bool ep31 = 0; [L32] port_t p32 = 0; [L33] char p32_old = '\x0'; [L34] char p32_new = '\x0'; [L35] _Bool ep32 = 0; [L36] char id1 = '\x0'; [L37] char r1 = '\x0'; [L38] char st1 = '\x0'; [L39] char nl1 = '\x0'; [L40] char m1 = '\x0'; [L41] char max1 = '\x0'; [L42] _Bool mode1 = 0; [L43] char id2 = '\x0'; [L44] char r2 = '\x0'; [L45] char st2 = '\x0'; [L46] char nl2 = '\x0'; [L47] char m2 = '\x0'; [L48] char max2 = '\x0'; [L49] _Bool mode2 = 0; [L50] char id3 = '\x0'; [L51] char r3 = '\x0'; [L52] char st3 = '\x0'; [L53] char nl3 = '\x0'; [L54] char m3 = '\x0'; [L55] char max3 = '\x0'; [L56] _Bool mode3 = 0; [L60] void (*nodes[3])() = { &node1, &node2, &node3 }; [L64] int __return_1732; [L65] int __return_1860; [L66] int __return_1978; [L67] int __return_2099; [L68] int __return_2228; [L69] int __tmp_2229_0; [L70] int __return_2337; [L71] int __return_2242; VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=0, ep13=0, ep21=0, ep23=0, ep31=0, ep32=0, id1=0, id2=0, id3=0, m1=0, m2=0, m3=0, max1=0, max2=0, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L74] int main__c1; [L75] int main__i2; [L76] main__c1 = 0 [L77] ep12 = __VERIFIER_nondet_bool() [L78] ep13 = __VERIFIER_nondet_bool() [L79] ep21 = __VERIFIER_nondet_bool() [L80] ep23 = __VERIFIER_nondet_bool() [L81] ep31 = __VERIFIER_nondet_bool() [L82] ep32 = __VERIFIER_nondet_bool() [L83] id1 = __VERIFIER_nondet_char() [L84] r1 = __VERIFIER_nondet_char() [L85] st1 = __VERIFIER_nondet_char() [L86] nl1 = __VERIFIER_nondet_char() [L87] m1 = __VERIFIER_nondet_char() [L88] max1 = __VERIFIER_nondet_char() [L89] mode1 = __VERIFIER_nondet_bool() [L90] id2 = __VERIFIER_nondet_char() [L91] r2 = __VERIFIER_nondet_char() [L92] st2 = __VERIFIER_nondet_char() [L93] nl2 = __VERIFIER_nondet_char() [L94] m2 = __VERIFIER_nondet_char() [L95] max2 = __VERIFIER_nondet_char() [L96] mode2 = __VERIFIER_nondet_bool() [L97] id3 = __VERIFIER_nondet_char() [L98] r3 = __VERIFIER_nondet_char() [L99] st3 = __VERIFIER_nondet_char() [L100] nl3 = __VERIFIER_nondet_char() [L101] m3 = __VERIFIER_nondet_char() [L102] max3 = __VERIFIER_nondet_char() [L103] mode3 = __VERIFIER_nondet_bool() [L105] _Bool init__r121; [L106] _Bool init__r131; [L107] _Bool init__r211; [L108] _Bool init__r231; [L109] _Bool init__r311; [L110] _Bool init__r321; [L111] _Bool init__r122; [L112] int init__tmp; [L113] _Bool init__r132; [L114] int init__tmp___0; [L115] _Bool init__r212; [L116] int init__tmp___1; [L117] _Bool init__r232; [L118] int init__tmp___2; [L119] _Bool init__r312; [L120] int init__tmp___3; [L121] _Bool init__r322; [L122] int init__tmp___4; [L123] int init__tmp___5; [L124] init__r121 = ep12 [L125] init__r131 = ep13 [L126] init__r211 = ep21 [L127] init__r231 = ep23 [L128] init__r311 = ep31 [L129] init__r321 = ep32 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L130] COND TRUE !(init__r121 == 0) [L132] init__tmp = 1 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L134] init__r122 = (_Bool)init__tmp VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L135] COND FALSE !(!(init__r131 == 0)) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L2239] COND TRUE !(init__r121 == 0) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L2241] COND TRUE !(ep23 == 0) [L2243] init__tmp___0 = 1 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L139] init__r132 = (_Bool)init__tmp___0 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L140] COND FALSE !(!(init__r211 == 0)) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L2216] COND TRUE !(init__r231 == 0) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L2218] COND TRUE !(ep31 == 0) [L2220] init__tmp___1 = 1 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L144] init__r212 = (_Bool)init__tmp___1 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L145] COND TRUE !(init__r231 == 0) [L147] init__tmp___2 = 1 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L149] init__r232 = (_Bool)init__tmp___2 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L150] COND TRUE !(init__r311 == 0) [L152] init__tmp___3 = 1 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L154] init__r312 = (_Bool)init__tmp___3 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L155] COND FALSE !(!(init__r321 == 0)) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L2147] COND TRUE !(init__r311 == 0) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L2149] COND TRUE !(ep12 == 0) [L2151] init__tmp___4 = 1 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L159] init__r322 = (_Bool)init__tmp___4 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L160] COND TRUE ((int)id1) != ((int)id2) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L162] COND TRUE ((int)id1) != ((int)id3) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L164] COND TRUE ((int)id2) != ((int)id3) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L166] COND TRUE ((int)id1) >= 0 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L168] COND TRUE ((int)id2) >= 0 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L170] COND TRUE ((int)id3) >= 0 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L172] COND TRUE ((int)r1) == 0 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L174] COND TRUE ((int)r2) == 0 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L176] COND TRUE ((int)r3) == 0 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L178] COND TRUE !(init__r122 == 0) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L180] COND TRUE !(init__r132 == 0) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L182] COND TRUE !(init__r212 == 0) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L184] COND TRUE !(init__r232 == 0) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L186] COND TRUE !(init__r312 == 0) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L188] COND TRUE !(init__r322 == 0) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L190] COND TRUE ((int)max1) == ((int)id1) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L192] COND TRUE ((int)max2) == ((int)id2) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L194] COND TRUE ((int)max3) == ((int)id3) VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L196] COND TRUE ((int)st1) == 0 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L198] COND TRUE ((int)st2) == 0 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L200] COND TRUE ((int)st3) == 0 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L202] COND TRUE ((int)nl1) == 0 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L204] COND TRUE ((int)nl2) == 0 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L206] COND TRUE ((int)nl3) == 0 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L208] COND TRUE ((int)mode1) == 0 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L210] COND TRUE ((int)mode2) == 0 VAL [__return_1732=0, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L212] COND TRUE ((int)mode3) == 0 [L214] init__tmp___5 = 1 [L215] __return_1732 = init__tmp___5 [L216] main__i2 = __return_1732 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L217] COND TRUE main__i2 != 0 [L219] p12_old = nomsg [L220] p12_new = nomsg [L221] p13_old = nomsg [L222] p13_new = nomsg [L223] p21_old = nomsg [L224] p21_new = nomsg [L225] p23_old = nomsg [L226] p23_new = nomsg [L227] p31_old = nomsg [L228] p31_new = nomsg [L229] p32_old = nomsg [L230] p32_new = nomsg [L231] main__i2 = 0 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L232] COND TRUE main__i2 < 6 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L235] COND FALSE !(!(mode1 == 0)) VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L241] COND TRUE ((int)r1) < 2 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L243] COND TRUE !(ep12 == 0) [L245] int node1____CPAchecker_TMP_0; VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L246] COND TRUE max1 != nomsg VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L248] COND TRUE p12_new == nomsg [L250] node1____CPAchecker_TMP_0 = max1 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L252] p12_new = node1____CPAchecker_TMP_0 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L254] COND FALSE !(!(ep13 == 0)) VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L265] mode1 = 1 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L267] COND FALSE !(!(mode2 == 0)) VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L273] COND TRUE ((int)r2) < 2 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L275] COND FALSE !(!(ep21 == 0)) VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L286] COND TRUE !(ep23 == 0) [L288] int node2____CPAchecker_TMP_1; VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L289] COND TRUE max2 != nomsg VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L291] COND TRUE p23_new == nomsg [L293] node2____CPAchecker_TMP_1 = max2 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L295] p23_new = node2____CPAchecker_TMP_1 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=4, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L297] mode2 = 1 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=4, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L299] COND FALSE !(!(mode3 == 0)) VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=4, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L305] COND TRUE ((int)r3) < 2 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=4, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L307] COND TRUE !(ep31 == 0) [L309] int node3____CPAchecker_TMP_0; VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=4, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L310] COND TRUE max3 != nomsg VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=4, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L312] COND TRUE p31_new == nomsg [L314] node3____CPAchecker_TMP_0 = max3 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=4, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L316] p31_new = node3____CPAchecker_TMP_0 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=4, p23_old=-1, p31=0, p31_new=6, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L318] COND FALSE !(!(ep32 == 0)) VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=5, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=4, p23_old=-1, p31=0, p31_new=6, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L329] mode3 = 1 [L330] p12_old = p12_new [L331] p12_new = nomsg [L332] p13_old = p13_new [L333] p13_new = nomsg [L334] p21_old = p21_new [L335] p21_new = nomsg [L336] p23_old = p23_new [L337] p23_new = nomsg [L338] p31_old = p31_new [L339] p31_new = nomsg [L340] p32_old = p32_new [L341] p32_new = nomsg [L343] int check__tmp; VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L344] COND TRUE ((((int)st1) + ((int)st2)) + ((int)st3)) <= 1 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L346] COND TRUE (((int)st1) + ((int)nl1)) <= 1 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L348] COND TRUE (((int)st2) + ((int)nl2)) <= 1 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L350] COND TRUE (((int)st3) + ((int)nl3)) <= 1 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L352] COND FALSE !(((int)r1) >= 2) VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L358] COND TRUE ((((int)st1) + ((int)st2)) + ((int)st3)) == 0 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L360] COND TRUE ((int)r1) < 2 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L362] COND FALSE !(((int)r1) >= 2) VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L368] COND TRUE ((((int)nl1) + ((int)nl2)) + ((int)nl3)) == 0 VAL [__return_1732=1, __return_1860=0, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L370] COND TRUE ((int)r1) < 2 [L372] check__tmp = 1 [L373] __return_1860 = check__tmp [L374] main__c1 = __return_1860 [L376] _Bool __tmp_1; [L377] __tmp_1 = main__c1 [L378] _Bool assert__arg; [L379] assert__arg = __tmp_1 VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L380] COND FALSE !(assert__arg == 0) [L386] int main____CPAchecker_TMP_0 = main__i2; [L387] main__i2 = main__i2 + 1 VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L388] COND TRUE main__i2 < 6 VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L391] COND TRUE !(mode1 == 0) [L393] r1 = (char)(((int)r1) + 1) VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=0, r3=0, st1=0, st2=0, st3=0] [L394] COND FALSE !(!(ep21 == 0)) VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=0, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=0, r3=0, st1=0, st2=0, st3=0] [L402] COND TRUE !(ep31 == 0) [L404] m1 = p31_old [L405] p31_old = nomsg VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=0, m3=0, max1=5, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=0, r3=0, st1=0, st2=0, st3=0] [L406] COND TRUE ((int)m1) > ((int)max1) [L408] max1 = m1 VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=0, m3=0, max1=6, max2=4, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=0, r3=0, st1=0, st2=0, st3=0] [L410] COND FALSE !(((int)r1) == 2) [L416] mode1 = 0 VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=0, m3=0, max1=6, max2=4, max3=6, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=0, r3=0, st1=0, st2=0, st3=0] [L418] COND TRUE !(mode2 == 0) [L420] r2 = (char)(((int)r2) + 1) VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=0, m3=0, max1=6, max2=4, max3=6, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=5, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=0, st1=0, st2=0, st3=0] [L421] COND TRUE !(ep12 == 0) [L423] m2 = p12_old [L424] p12_old = nomsg VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=0, max1=6, max2=4, max3=6, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=0, st1=0, st2=0, st3=0] [L425] COND TRUE ((int)m2) > ((int)max2) [L427] max2 = m2 VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=0, max1=6, max2=5, max3=6, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=0, st1=0, st2=0, st3=0] [L429] COND FALSE !(!(ep32 == 0)) VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=0, max1=6, max2=5, max3=6, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=0, st1=0, st2=0, st3=0] [L437] COND FALSE !(((int)r2) == 2) [L443] mode2 = 0 VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=0, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=0, st1=0, st2=0, st3=0] [L445] COND TRUE !(mode3 == 0) [L447] r3 = (char)(((int)r3) + 1) VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=0, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L448] COND FALSE !(!(ep13 == 0)) VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=0, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=4, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L456] COND TRUE !(ep23 == 0) [L458] m3 = p23_old [L459] p23_old = nomsg VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L460] COND FALSE !(((int)m3) > ((int)max3)) VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L464] COND FALSE !(((int)r3) == 2) [L470] mode3 = 0 [L471] p12_old = p12_new [L472] p12_new = nomsg [L473] p13_old = p13_new [L474] p13_new = nomsg [L475] p21_old = p21_new [L476] p21_new = nomsg [L477] p23_old = p23_new [L478] p23_new = nomsg [L479] p31_old = p31_new [L480] p31_new = nomsg [L481] p32_old = p32_new [L482] p32_new = nomsg [L484] int check__tmp; VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L485] COND TRUE ((((int)st1) + ((int)st2)) + ((int)st3)) <= 1 VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L487] COND TRUE (((int)st1) + ((int)nl1)) <= 1 VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L489] COND TRUE (((int)st2) + ((int)nl2)) <= 1 VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L491] COND TRUE (((int)st3) + ((int)nl3)) <= 1 VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L493] COND FALSE !(((int)r1) >= 2) VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L499] COND TRUE ((((int)st1) + ((int)st2)) + ((int)st3)) == 0 VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L501] COND TRUE ((int)r1) < 2 VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L503] COND FALSE !(((int)r1) >= 2) VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L509] COND TRUE ((((int)nl1) + ((int)nl2)) + ((int)nl3)) == 0 VAL [__return_1732=1, __return_1860=1, __return_1978=0, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L511] COND TRUE ((int)r1) < 2 [L513] check__tmp = 1 [L514] __return_1978 = check__tmp [L515] main__c1 = __return_1978 [L517] _Bool __tmp_2; [L518] __tmp_2 = main__c1 [L519] _Bool assert__arg; [L520] assert__arg = __tmp_2 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L521] COND FALSE !(assert__arg == 0) [L527] int main____CPAchecker_TMP_0 = main__i2; [L528] main__i2 = main__i2 + 1 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L529] COND TRUE main__i2 < 6 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L532] COND FALSE !(!(mode1 == 0)) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L538] COND TRUE ((int)r1) < 2 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L540] COND TRUE !(ep12 == 0) [L542] int node1____CPAchecker_TMP_0; VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L543] COND TRUE max1 != nomsg VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L545] COND TRUE p12_new == nomsg [L547] node1____CPAchecker_TMP_0 = max1 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L549] p12_new = node1____CPAchecker_TMP_0 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L551] COND FALSE !(!(ep13 == 0)) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L562] mode1 = 1 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L564] COND FALSE !(!(mode2 == 0)) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L570] COND TRUE ((int)r2) < 2 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L572] COND FALSE !(!(ep21 == 0)) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L583] COND TRUE !(ep23 == 0) [L585] int node2____CPAchecker_TMP_1; VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L586] COND TRUE max2 != nomsg VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L588] COND TRUE p23_new == nomsg [L590] node2____CPAchecker_TMP_1 = max2 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L592] p23_new = node2____CPAchecker_TMP_1 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=5, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L594] mode2 = 1 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=5, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L596] COND FALSE !(!(mode3 == 0)) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=5, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L602] COND TRUE ((int)r3) < 2 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=5, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L604] COND TRUE !(ep31 == 0) [L606] int node3____CPAchecker_TMP_0; VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=5, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L607] COND TRUE max3 != nomsg VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=5, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L609] COND TRUE p31_new == nomsg [L611] node3____CPAchecker_TMP_0 = max3 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=5, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L613] p31_new = node3____CPAchecker_TMP_0 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=5, p23_old=-1, p31=0, p31_new=6, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L615] COND FALSE !(!(ep32 == 0)) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=6, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=5, p23_old=-1, p31=0, p31_new=6, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L626] mode3 = 1 [L627] p12_old = p12_new [L628] p12_new = nomsg [L629] p13_old = p13_new [L630] p13_new = nomsg [L631] p21_old = p21_new [L632] p21_new = nomsg [L633] p23_old = p23_new [L634] p23_new = nomsg [L635] p31_old = p31_new [L636] p31_new = nomsg [L637] p32_old = p32_new [L638] p32_new = nomsg [L640] int check__tmp; VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L641] COND TRUE ((((int)st1) + ((int)st2)) + ((int)st3)) <= 1 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L643] COND TRUE (((int)st1) + ((int)nl1)) <= 1 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L645] COND TRUE (((int)st2) + ((int)nl2)) <= 1 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L647] COND TRUE (((int)st3) + ((int)nl3)) <= 1 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L649] COND FALSE !(((int)r1) >= 2) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L655] COND TRUE ((((int)st1) + ((int)st2)) + ((int)st3)) == 0 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L657] COND TRUE ((int)r1) < 2 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L659] COND FALSE !(((int)r1) >= 2) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L665] COND TRUE ((((int)nl1) + ((int)nl2)) + ((int)nl3)) == 0 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=0, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L667] COND TRUE ((int)r1) < 2 [L669] check__tmp = 1 [L670] __return_2099 = check__tmp [L671] main__c1 = __return_2099 [L673] _Bool __tmp_3; [L674] __tmp_3 = main__c1 [L675] _Bool assert__arg; [L676] assert__arg = __tmp_3 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L677] COND FALSE !(assert__arg == 0) [L683] int main____CPAchecker_TMP_0 = main__i2; [L684] main__i2 = main__i2 + 1 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L685] COND TRUE main__i2 < 6 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=0, st2=0, st3=0] [L688] COND TRUE !(mode1 == 0) [L690] r1 = (char)(((int)r1) + 1) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=1, r3=1, st1=0, st2=0, st3=0] [L691] COND FALSE !(!(ep21 == 0)) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=6, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=1, r3=1, st1=0, st2=0, st3=0] [L699] COND TRUE !(ep31 == 0) [L701] m1 = p31_old [L702] p31_old = nomsg VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=1, r3=1, st1=0, st2=0, st3=0] [L703] COND FALSE !(((int)m1) > ((int)max1)) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=1, r3=1, st1=0, st2=0, st3=0] [L707] COND TRUE ((int)r1) == 2 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=1, r3=1, st1=0, st2=0, st3=0] [L709] COND FALSE !(((int)max1) == ((int)id1)) [L1488] st1 = 1 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=1, r3=1, st1=1, st2=0, st3=0] [L713] mode1 = 0 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=1, r3=1, st1=1, st2=0, st3=0] [L715] COND TRUE !(mode2 == 0) [L717] r2 = (char)(((int)r2) + 1) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=5, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=6, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=1, st1=1, st2=0, st3=0] [L718] COND TRUE !(ep12 == 0) [L720] m2 = p12_old [L721] p12_old = nomsg VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=4, max1=6, max2=5, max3=6, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=1, st1=1, st2=0, st3=0] [L722] COND TRUE ((int)m2) > ((int)max2) [L724] max2 = m2 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=4, max1=6, max2=6, max3=6, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=1, st1=1, st2=0, st3=0] [L726] COND FALSE !(!(ep32 == 0)) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=4, max1=6, max2=6, max3=6, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=1, st1=1, st2=0, st3=0] [L734] COND TRUE ((int)r2) == 2 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=4, max1=6, max2=6, max3=6, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=1, st1=1, st2=0, st3=0] [L736] COND FALSE !(((int)max2) == ((int)id2)) [L1451] nl2 = 1 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=4, max1=6, max2=6, max3=6, mode1=0, mode2=1, mode3=1, nl1=0, nl2=1, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=1, st1=1, st2=0, st3=0] [L740] mode2 = 0 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=4, max1=6, max2=6, max3=6, mode1=0, mode2=0, mode3=1, nl1=0, nl2=1, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=1, st1=1, st2=0, st3=0] [L742] COND TRUE !(mode3 == 0) [L744] r3 = (char)(((int)r3) + 1) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=4, max1=6, max2=6, max3=6, mode1=0, mode2=0, mode3=1, nl1=0, nl2=1, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=2, st1=1, st2=0, st3=0] [L745] COND FALSE !(!(ep13 == 0)) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=4, max1=6, max2=6, max3=6, mode1=0, mode2=0, mode3=1, nl1=0, nl2=1, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=5, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=2, st1=1, st2=0, st3=0] [L753] COND TRUE !(ep23 == 0) [L755] m3 = p23_old [L756] p23_old = nomsg VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=5, max1=6, max2=6, max3=6, mode1=0, mode2=0, mode3=1, nl1=0, nl2=1, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=2, st1=1, st2=0, st3=0] [L757] COND FALSE !(((int)m3) > ((int)max3)) VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=5, max1=6, max2=6, max3=6, mode1=0, mode2=0, mode3=1, nl1=0, nl2=1, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=2, st1=1, st2=0, st3=0] [L761] COND TRUE ((int)r3) == 2 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=5, max1=6, max2=6, max3=6, mode1=0, mode2=0, mode3=1, nl1=0, nl2=1, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=2, st1=1, st2=0, st3=0] [L763] COND TRUE ((int)max3) == ((int)id3) [L765] st3 = 1 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=5, max1=6, max2=6, max3=6, mode1=0, mode2=0, mode3=1, nl1=0, nl2=1, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=2, st1=1, st2=0, st3=1] [L767] mode3 = 0 [L768] p12_old = p12_new [L769] p12_new = nomsg [L770] p13_old = p13_new [L771] p13_new = nomsg [L772] p21_old = p21_new [L773] p21_new = nomsg [L774] p23_old = p23_new [L775] p23_new = nomsg [L776] p31_old = p31_new [L777] p31_new = nomsg [L778] p32_old = p32_new [L779] p32_new = nomsg [L781] int check__tmp; VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=5, max1=6, max2=6, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=1, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=2, st1=1, st2=0, st3=1] [L782] COND FALSE !(((((int)st1) + ((int)st2)) + ((int)st3)) <= 1) [L1407] check__tmp = 0 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=5, max1=6, max2=6, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=1, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=2, st1=1, st2=0, st3=1] [L810] __return_2228 = check__tmp [L811] main__c1 = __return_2228 [L812] __tmp_2229_0 = main____CPAchecker_TMP_0 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=2, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=5, max1=6, max2=6, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=1, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=2, st1=1, st2=0, st3=1] [L814] main____CPAchecker_TMP_0 = __tmp_2229_0 [L816] _Bool __tmp_4; [L817] __tmp_4 = main__c1 [L818] _Bool assert__arg; [L819] assert__arg = __tmp_4 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=2, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=5, max1=6, max2=6, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=1, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=2, st1=1, st2=0, st3=1] [L820] COND TRUE assert__arg == 0 VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=2, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=5, max1=6, max2=6, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=1, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=2, st1=1, st2=0, st3=1] [L822] __VERIFIER_error() VAL [__return_1732=1, __return_1860=1, __return_1978=1, __return_2099=1, __return_2228=0, __return_2242=0, __return_2337=0, __return_main=0, __tmp_2229_0=2, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=5, id2=4, id3=6, m1=6, m2=6, m3=5, max1=6, max2=6, max3=6, mode1=0, mode2=0, mode3=0, nl1=0, nl2=1, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=2, r2=2, r3=2, st1=1, st2=0, st3=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 305 locations, 1 error locations. Result: UNSAFE, OverallTime: 406.7s, OverallIterations: 36, TraceHistogramMax: 1, AutomataDifference: 221.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 19990 SDtfs, 42191 SDslu, 46590 SDs, 0 SdLazy, 10628 SolverSat, 1174 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 337 GetRequests, 73 SyntacticMatches, 9 SemanticMatches, 255 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 951 ImplicationChecksByTransitivity, 3.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=175529occurred in iteration=31, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 179.6s AutomataMinimizationTime, 35 MinimizatonAttempts, 616655 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.8s SatisfiabilityAnalysisTime, 2.5s InterpolantComputationTime, 5799 NumberOfCodeBlocks, 5799 NumberOfCodeBlocksAsserted, 36 NumberOfCheckSat, 5590 ConstructedInterpolants, 0 QuantifiedInterpolants, 3654004 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 35 InterpolantComputations, 35 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...