./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.3.2.ufo.BOUNDED-6.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.3.2.ufo.BOUNDED-6.pals.c -s /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f2969d4725852fd68e7759cdb7f1d1929ca0124c ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 10:41:33,332 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 10:41:33,333 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 10:41:33,341 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 10:41:33,341 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 10:41:33,342 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 10:41:33,343 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 10:41:33,345 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 10:41:33,346 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 10:41:33,347 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 10:41:33,348 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 10:41:33,348 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 10:41:33,349 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 10:41:33,349 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 10:41:33,350 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 10:41:33,351 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 10:41:33,351 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 10:41:33,352 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 10:41:33,354 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 10:41:33,355 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 10:41:33,356 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 10:41:33,357 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 10:41:33,358 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 10:41:33,358 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 10:41:33,360 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 10:41:33,360 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 10:41:33,360 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 10:41:33,361 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 10:41:33,361 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 10:41:33,362 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 10:41:33,362 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 10:41:33,362 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 10:41:33,363 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 10:41:33,363 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 10:41:33,364 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 10:41:33,364 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 10:41:33,365 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 10:41:33,365 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 10:41:33,365 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 10:41:33,366 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 10:41:33,367 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 10:41:33,367 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 10:41:33,380 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 10:41:33,380 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 10:41:33,381 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 10:41:33,381 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 10:41:33,381 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 10:41:33,382 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 10:41:33,382 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 10:41:33,382 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 10:41:33,382 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 10:41:33,382 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 10:41:33,382 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 10:41:33,383 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 10:41:33,383 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 10:41:33,383 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 10:41:33,383 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 10:41:33,383 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 10:41:33,384 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 10:41:33,384 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 10:41:33,384 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 10:41:33,384 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 10:41:33,384 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 10:41:33,384 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:41:33,385 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 10:41:33,385 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 10:41:33,385 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 10:41:33,385 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 10:41:33,385 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 10:41:33,386 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 10:41:33,386 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 10:41:33,386 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f2969d4725852fd68e7759cdb7f1d1929ca0124c [2019-12-07 10:41:33,498 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 10:41:33,508 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 10:41:33,511 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 10:41:33,512 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 10:41:33,512 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 10:41:33,513 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.3.2.ufo.BOUNDED-6.pals.c [2019-12-07 10:41:33,556 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/data/4d610640e/77a4efc36a794fd4a5e3d87ee1c8012f/FLAG461522de7 [2019-12-07 10:41:33,934 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 10:41:33,935 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.3.2.ufo.BOUNDED-6.pals.c [2019-12-07 10:41:33,940 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/data/4d610640e/77a4efc36a794fd4a5e3d87ee1c8012f/FLAG461522de7 [2019-12-07 10:41:34,326 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/data/4d610640e/77a4efc36a794fd4a5e3d87ee1c8012f [2019-12-07 10:41:34,329 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 10:41:34,330 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 10:41:34,331 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 10:41:34,331 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 10:41:34,334 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 10:41:34,335 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:41:34" (1/1) ... [2019-12-07 10:41:34,337 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3630ac46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:41:34, skipping insertion in model container [2019-12-07 10:41:34,337 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:41:34" (1/1) ... [2019-12-07 10:41:34,342 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 10:41:34,362 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 10:41:34,517 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:41:34,522 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 10:41:34,548 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:41:34,559 INFO L208 MainTranslator]: Completed translation [2019-12-07 10:41:34,559 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:41:34 WrapperNode [2019-12-07 10:41:34,559 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 10:41:34,559 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 10:41:34,560 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 10:41:34,560 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 10:41:34,565 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:41:34" (1/1) ... [2019-12-07 10:41:34,571 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:41:34" (1/1) ... [2019-12-07 10:41:34,590 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 10:41:34,591 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 10:41:34,591 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 10:41:34,591 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 10:41:34,597 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:41:34" (1/1) ... [2019-12-07 10:41:34,597 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:41:34" (1/1) ... [2019-12-07 10:41:34,599 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:41:34" (1/1) ... [2019-12-07 10:41:34,599 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:41:34" (1/1) ... [2019-12-07 10:41:34,603 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:41:34" (1/1) ... [2019-12-07 10:41:34,608 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:41:34" (1/1) ... [2019-12-07 10:41:34,610 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:41:34" (1/1) ... [2019-12-07 10:41:34,612 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 10:41:34,612 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 10:41:34,612 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 10:41:34,612 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 10:41:34,613 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:41:34" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:41:34,652 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 10:41:34,652 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 10:41:34,911 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 10:41:34,911 INFO L287 CfgBuilder]: Removed 17 assume(true) statements. [2019-12-07 10:41:34,912 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:41:34 BoogieIcfgContainer [2019-12-07 10:41:34,912 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 10:41:34,913 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 10:41:34,913 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 10:41:34,915 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 10:41:34,915 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 10:41:34" (1/3) ... [2019-12-07 10:41:34,915 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@276acdf1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:41:34, skipping insertion in model container [2019-12-07 10:41:34,916 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:41:34" (2/3) ... [2019-12-07 10:41:34,916 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@276acdf1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:41:34, skipping insertion in model container [2019-12-07 10:41:34,916 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:41:34" (3/3) ... [2019-12-07 10:41:34,917 INFO L109 eAbstractionObserver]: Analyzing ICFG pals_lcr-var-start-time.3.2.ufo.BOUNDED-6.pals.c [2019-12-07 10:41:34,923 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 10:41:34,928 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-12-07 10:41:34,935 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-12-07 10:41:34,952 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 10:41:34,952 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 10:41:34,952 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 10:41:34,952 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 10:41:34,952 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 10:41:34,952 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 10:41:34,952 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 10:41:34,952 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 10:41:34,964 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states. [2019-12-07 10:41:34,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 10:41:34,969 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:34,969 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:34,969 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:34,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:34,974 INFO L82 PathProgramCache]: Analyzing trace with hash -1524648029, now seen corresponding path program 1 times [2019-12-07 10:41:34,979 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:34,979 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1468057226] [2019-12-07 10:41:34,980 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:35,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:35,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:35,115 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1468057226] [2019-12-07 10:41:35,115 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:35,116 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:41:35,117 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1819628898] [2019-12-07 10:41:35,119 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:41:35,120 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:35,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:41:35,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:41:35,129 INFO L87 Difference]: Start difference. First operand 74 states. Second operand 4 states. [2019-12-07 10:41:35,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:35,179 INFO L93 Difference]: Finished difference Result 129 states and 206 transitions. [2019-12-07 10:41:35,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:41:35,180 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2019-12-07 10:41:35,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:35,188 INFO L225 Difference]: With dead ends: 129 [2019-12-07 10:41:35,188 INFO L226 Difference]: Without dead ends: 70 [2019-12-07 10:41:35,191 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:41:35,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2019-12-07 10:41:35,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 70. [2019-12-07 10:41:35,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2019-12-07 10:41:35,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 98 transitions. [2019-12-07 10:41:35,220 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 98 transitions. Word has length 23 [2019-12-07 10:41:35,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:35,220 INFO L462 AbstractCegarLoop]: Abstraction has 70 states and 98 transitions. [2019-12-07 10:41:35,220 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:41:35,220 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 98 transitions. [2019-12-07 10:41:35,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 10:41:35,222 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:35,222 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:35,222 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:35,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:35,223 INFO L82 PathProgramCache]: Analyzing trace with hash 1049597017, now seen corresponding path program 1 times [2019-12-07 10:41:35,223 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:35,223 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [703658692] [2019-12-07 10:41:35,223 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:35,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:35,300 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:35,300 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [703658692] [2019-12-07 10:41:35,301 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:35,301 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:41:35,301 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [512329359] [2019-12-07 10:41:35,302 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:41:35,302 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:35,302 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:41:35,302 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:35,302 INFO L87 Difference]: Start difference. First operand 70 states and 98 transitions. Second operand 3 states. [2019-12-07 10:41:35,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:35,320 INFO L93 Difference]: Finished difference Result 156 states and 232 transitions. [2019-12-07 10:41:35,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:41:35,320 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 10:41:35,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:35,321 INFO L225 Difference]: With dead ends: 156 [2019-12-07 10:41:35,322 INFO L226 Difference]: Without dead ends: 107 [2019-12-07 10:41:35,322 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:35,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2019-12-07 10:41:35,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 105. [2019-12-07 10:41:35,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2019-12-07 10:41:35,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 153 transitions. [2019-12-07 10:41:35,331 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 153 transitions. Word has length 39 [2019-12-07 10:41:35,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:35,331 INFO L462 AbstractCegarLoop]: Abstraction has 105 states and 153 transitions. [2019-12-07 10:41:35,331 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:41:35,331 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 153 transitions. [2019-12-07 10:41:35,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 10:41:35,332 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:35,332 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:35,332 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:35,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:35,333 INFO L82 PathProgramCache]: Analyzing trace with hash -2018870194, now seen corresponding path program 1 times [2019-12-07 10:41:35,333 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:35,333 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2056541810] [2019-12-07 10:41:35,333 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:35,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:35,382 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:35,382 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2056541810] [2019-12-07 10:41:35,382 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:35,382 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:41:35,383 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [572610346] [2019-12-07 10:41:35,383 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:41:35,383 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:35,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:41:35,383 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:35,383 INFO L87 Difference]: Start difference. First operand 105 states and 153 transitions. Second operand 3 states. [2019-12-07 10:41:35,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:35,401 INFO L93 Difference]: Finished difference Result 249 states and 377 transitions. [2019-12-07 10:41:35,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:41:35,401 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 10:41:35,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:35,403 INFO L225 Difference]: With dead ends: 249 [2019-12-07 10:41:35,403 INFO L226 Difference]: Without dead ends: 165 [2019-12-07 10:41:35,404 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:35,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2019-12-07 10:41:35,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 163. [2019-12-07 10:41:35,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2019-12-07 10:41:35,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 242 transitions. [2019-12-07 10:41:35,415 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 242 transitions. Word has length 40 [2019-12-07 10:41:35,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:35,416 INFO L462 AbstractCegarLoop]: Abstraction has 163 states and 242 transitions. [2019-12-07 10:41:35,416 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:41:35,416 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 242 transitions. [2019-12-07 10:41:35,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 10:41:35,417 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:35,417 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:35,417 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:35,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:35,417 INFO L82 PathProgramCache]: Analyzing trace with hash 1411558281, now seen corresponding path program 1 times [2019-12-07 10:41:35,417 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:35,417 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [740565382] [2019-12-07 10:41:35,417 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:35,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:35,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:35,464 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [740565382] [2019-12-07 10:41:35,464 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:35,464 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:41:35,464 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [286774905] [2019-12-07 10:41:35,464 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:41:35,464 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:35,464 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:41:35,465 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:41:35,465 INFO L87 Difference]: Start difference. First operand 163 states and 242 transitions. Second operand 5 states. [2019-12-07 10:41:35,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:35,532 INFO L93 Difference]: Finished difference Result 731 states and 1126 transitions. [2019-12-07 10:41:35,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:41:35,533 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 10:41:35,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:35,538 INFO L225 Difference]: With dead ends: 731 [2019-12-07 10:41:35,538 INFO L226 Difference]: Without dead ends: 589 [2019-12-07 10:41:35,540 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:41:35,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 589 states. [2019-12-07 10:41:35,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 589 to 303. [2019-12-07 10:41:35,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 303 states. [2019-12-07 10:41:35,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 303 states to 303 states and 454 transitions. [2019-12-07 10:41:35,563 INFO L78 Accepts]: Start accepts. Automaton has 303 states and 454 transitions. Word has length 41 [2019-12-07 10:41:35,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:35,563 INFO L462 AbstractCegarLoop]: Abstraction has 303 states and 454 transitions. [2019-12-07 10:41:35,563 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:41:35,563 INFO L276 IsEmpty]: Start isEmpty. Operand 303 states and 454 transitions. [2019-12-07 10:41:35,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 10:41:35,564 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:35,564 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:35,565 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:35,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:35,565 INFO L82 PathProgramCache]: Analyzing trace with hash 425310312, now seen corresponding path program 1 times [2019-12-07 10:41:35,565 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:35,565 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1056457873] [2019-12-07 10:41:35,565 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:35,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:35,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:35,621 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1056457873] [2019-12-07 10:41:35,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:35,621 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:41:35,621 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [144626582] [2019-12-07 10:41:35,621 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:41:35,622 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:35,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:41:35,622 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:41:35,622 INFO L87 Difference]: Start difference. First operand 303 states and 454 transitions. Second operand 5 states. [2019-12-07 10:41:35,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:35,677 INFO L93 Difference]: Finished difference Result 1077 states and 1629 transitions. [2019-12-07 10:41:35,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:41:35,678 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 10:41:35,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:35,681 INFO L225 Difference]: With dead ends: 1077 [2019-12-07 10:41:35,682 INFO L226 Difference]: Without dead ends: 795 [2019-12-07 10:41:35,683 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:41:35,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 795 states. [2019-12-07 10:41:35,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 795 to 791. [2019-12-07 10:41:35,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 791 states. [2019-12-07 10:41:35,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 791 states to 791 states and 1186 transitions. [2019-12-07 10:41:35,707 INFO L78 Accepts]: Start accepts. Automaton has 791 states and 1186 transitions. Word has length 42 [2019-12-07 10:41:35,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:35,708 INFO L462 AbstractCegarLoop]: Abstraction has 791 states and 1186 transitions. [2019-12-07 10:41:35,708 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:41:35,708 INFO L276 IsEmpty]: Start isEmpty. Operand 791 states and 1186 transitions. [2019-12-07 10:41:35,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 10:41:35,709 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:35,709 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:35,709 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:35,710 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:35,710 INFO L82 PathProgramCache]: Analyzing trace with hash 1864742082, now seen corresponding path program 1 times [2019-12-07 10:41:35,710 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:35,710 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1755036421] [2019-12-07 10:41:35,710 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:35,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:35,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:35,734 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1755036421] [2019-12-07 10:41:35,734 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:35,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:41:35,735 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1740449508] [2019-12-07 10:41:35,735 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:41:35,735 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:35,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:41:35,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:35,736 INFO L87 Difference]: Start difference. First operand 791 states and 1186 transitions. Second operand 3 states. [2019-12-07 10:41:35,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:35,777 INFO L93 Difference]: Finished difference Result 2115 states and 3156 transitions. [2019-12-07 10:41:35,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:41:35,777 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 42 [2019-12-07 10:41:35,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:35,783 INFO L225 Difference]: With dead ends: 2115 [2019-12-07 10:41:35,783 INFO L226 Difference]: Without dead ends: 1345 [2019-12-07 10:41:35,784 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:35,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1345 states. [2019-12-07 10:41:35,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1345 to 1343. [2019-12-07 10:41:35,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1343 states. [2019-12-07 10:41:35,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1343 states to 1343 states and 1966 transitions. [2019-12-07 10:41:35,826 INFO L78 Accepts]: Start accepts. Automaton has 1343 states and 1966 transitions. Word has length 42 [2019-12-07 10:41:35,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:35,826 INFO L462 AbstractCegarLoop]: Abstraction has 1343 states and 1966 transitions. [2019-12-07 10:41:35,826 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:41:35,826 INFO L276 IsEmpty]: Start isEmpty. Operand 1343 states and 1966 transitions. [2019-12-07 10:41:35,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 10:41:35,827 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:35,828 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:35,828 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:35,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:35,828 INFO L82 PathProgramCache]: Analyzing trace with hash -1762112994, now seen corresponding path program 1 times [2019-12-07 10:41:35,828 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:35,828 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393071841] [2019-12-07 10:41:35,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:35,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:35,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:35,897 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393071841] [2019-12-07 10:41:35,897 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:35,897 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 10:41:35,898 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1274816006] [2019-12-07 10:41:35,898 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 10:41:35,898 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:35,899 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 10:41:35,899 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:41:35,899 INFO L87 Difference]: Start difference. First operand 1343 states and 1966 transitions. Second operand 7 states. [2019-12-07 10:41:36,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:36,079 INFO L93 Difference]: Finished difference Result 2857 states and 4103 transitions. [2019-12-07 10:41:36,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:41:36,079 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 43 [2019-12-07 10:41:36,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:36,089 INFO L225 Difference]: With dead ends: 2857 [2019-12-07 10:41:36,090 INFO L226 Difference]: Without dead ends: 2855 [2019-12-07 10:41:36,090 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=56, Invalid=100, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:41:36,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2855 states. [2019-12-07 10:41:36,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2855 to 1487. [2019-12-07 10:41:36,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1487 states. [2019-12-07 10:41:36,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1487 states to 1487 states and 2110 transitions. [2019-12-07 10:41:36,147 INFO L78 Accepts]: Start accepts. Automaton has 1487 states and 2110 transitions. Word has length 43 [2019-12-07 10:41:36,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:36,148 INFO L462 AbstractCegarLoop]: Abstraction has 1487 states and 2110 transitions. [2019-12-07 10:41:36,148 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 10:41:36,148 INFO L276 IsEmpty]: Start isEmpty. Operand 1487 states and 2110 transitions. [2019-12-07 10:41:36,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 10:41:36,148 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:36,148 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:36,149 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:36,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:36,149 INFO L82 PathProgramCache]: Analyzing trace with hash 1261650507, now seen corresponding path program 1 times [2019-12-07 10:41:36,149 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:36,149 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [407746218] [2019-12-07 10:41:36,149 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:36,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:36,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:36,172 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [407746218] [2019-12-07 10:41:36,172 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:36,172 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:41:36,172 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1535134054] [2019-12-07 10:41:36,173 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:41:36,173 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:36,173 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:41:36,173 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:36,173 INFO L87 Difference]: Start difference. First operand 1487 states and 2110 transitions. Second operand 3 states. [2019-12-07 10:41:36,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:36,232 INFO L93 Difference]: Finished difference Result 3505 states and 4978 transitions. [2019-12-07 10:41:36,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:41:36,232 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44 [2019-12-07 10:41:36,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:36,239 INFO L225 Difference]: With dead ends: 3505 [2019-12-07 10:41:36,240 INFO L226 Difference]: Without dead ends: 2039 [2019-12-07 10:41:36,241 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:36,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2039 states. [2019-12-07 10:41:36,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2039 to 2037. [2019-12-07 10:41:36,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2037 states. [2019-12-07 10:41:36,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2037 states to 2037 states and 2868 transitions. [2019-12-07 10:41:36,304 INFO L78 Accepts]: Start accepts. Automaton has 2037 states and 2868 transitions. Word has length 44 [2019-12-07 10:41:36,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:36,305 INFO L462 AbstractCegarLoop]: Abstraction has 2037 states and 2868 transitions. [2019-12-07 10:41:36,305 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:41:36,305 INFO L276 IsEmpty]: Start isEmpty. Operand 2037 states and 2868 transitions. [2019-12-07 10:41:36,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-12-07 10:41:36,306 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:36,306 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:36,306 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:36,307 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:36,307 INFO L82 PathProgramCache]: Analyzing trace with hash -1698932519, now seen corresponding path program 1 times [2019-12-07 10:41:36,307 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:36,307 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [441304485] [2019-12-07 10:41:36,307 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:36,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:36,374 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-12-07 10:41:36,375 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [441304485] [2019-12-07 10:41:36,375 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [891783605] [2019-12-07 10:41:36,375 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:41:36,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:36,433 INFO L264 TraceCheckSpWp]: Trace formula consists of 286 conjuncts, 14 conjunts are in the unsatisfiable core [2019-12-07 10:41:36,438 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:41:36,479 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-12-07 10:41:36,479 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:41:36,479 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 6] total 7 [2019-12-07 10:41:36,480 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1530826529] [2019-12-07 10:41:36,480 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 10:41:36,480 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:36,480 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 10:41:36,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:41:36,481 INFO L87 Difference]: Start difference. First operand 2037 states and 2868 transitions. Second operand 7 states. [2019-12-07 10:41:36,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:36,647 INFO L93 Difference]: Finished difference Result 5052 states and 7158 transitions. [2019-12-07 10:41:36,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:41:36,647 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 63 [2019-12-07 10:41:36,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:36,665 INFO L225 Difference]: With dead ends: 5052 [2019-12-07 10:41:36,666 INFO L226 Difference]: Without dead ends: 3586 [2019-12-07 10:41:36,668 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=29, Unknown=0, NotChecked=0, Total=56 [2019-12-07 10:41:36,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3586 states. [2019-12-07 10:41:36,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3586 to 3365. [2019-12-07 10:41:36,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3365 states. [2019-12-07 10:41:36,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3365 states to 3365 states and 4708 transitions. [2019-12-07 10:41:36,800 INFO L78 Accepts]: Start accepts. Automaton has 3365 states and 4708 transitions. Word has length 63 [2019-12-07 10:41:36,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:36,800 INFO L462 AbstractCegarLoop]: Abstraction has 3365 states and 4708 transitions. [2019-12-07 10:41:36,800 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 10:41:36,800 INFO L276 IsEmpty]: Start isEmpty. Operand 3365 states and 4708 transitions. [2019-12-07 10:41:36,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 10:41:36,802 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:36,802 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:37,002 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:41:37,003 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:37,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:37,003 INFO L82 PathProgramCache]: Analyzing trace with hash -1752116912, now seen corresponding path program 1 times [2019-12-07 10:41:37,003 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:37,003 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [414679913] [2019-12-07 10:41:37,003 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:37,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:37,059 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 7 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:37,060 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [414679913] [2019-12-07 10:41:37,060 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1962930225] [2019-12-07 10:41:37,060 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:41:37,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:37,115 INFO L264 TraceCheckSpWp]: Trace formula consists of 284 conjuncts, 6 conjunts are in the unsatisfiable core [2019-12-07 10:41:37,118 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:41:37,166 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 7 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:37,166 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:41:37,166 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2019-12-07 10:41:37,166 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [76513011] [2019-12-07 10:41:37,167 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:41:37,167 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:37,167 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:41:37,167 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:41:37,167 INFO L87 Difference]: Start difference. First operand 3365 states and 4708 transitions. Second operand 11 states. [2019-12-07 10:41:37,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:37,613 INFO L93 Difference]: Finished difference Result 11106 states and 15593 transitions. [2019-12-07 10:41:37,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 10:41:37,613 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 64 [2019-12-07 10:41:37,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:37,646 INFO L225 Difference]: With dead ends: 11106 [2019-12-07 10:41:37,646 INFO L226 Difference]: Without dead ends: 8752 [2019-12-07 10:41:37,650 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 60 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=95, Invalid=211, Unknown=0, NotChecked=0, Total=306 [2019-12-07 10:41:37,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8752 states. [2019-12-07 10:41:37,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8752 to 4615. [2019-12-07 10:41:37,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4615 states. [2019-12-07 10:41:37,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4615 states to 4615 states and 6480 transitions. [2019-12-07 10:41:37,863 INFO L78 Accepts]: Start accepts. Automaton has 4615 states and 6480 transitions. Word has length 64 [2019-12-07 10:41:37,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:37,863 INFO L462 AbstractCegarLoop]: Abstraction has 4615 states and 6480 transitions. [2019-12-07 10:41:37,863 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:41:37,863 INFO L276 IsEmpty]: Start isEmpty. Operand 4615 states and 6480 transitions. [2019-12-07 10:41:37,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 10:41:37,864 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:37,865 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:38,065 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:41:38,065 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:38,065 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:38,065 INFO L82 PathProgramCache]: Analyzing trace with hash -1324770848, now seen corresponding path program 1 times [2019-12-07 10:41:38,066 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:38,066 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [376454977] [2019-12-07 10:41:38,066 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:38,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:38,094 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:38,094 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [376454977] [2019-12-07 10:41:38,094 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:38,094 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:41:38,094 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1205936248] [2019-12-07 10:41:38,095 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:41:38,095 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:38,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:41:38,095 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:38,095 INFO L87 Difference]: Start difference. First operand 4615 states and 6480 transitions. Second operand 3 states. [2019-12-07 10:41:38,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:38,235 INFO L93 Difference]: Finished difference Result 7507 states and 10507 transitions. [2019-12-07 10:41:38,236 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:41:38,236 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 10:41:38,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:38,254 INFO L225 Difference]: With dead ends: 7507 [2019-12-07 10:41:38,254 INFO L226 Difference]: Without dead ends: 4880 [2019-12-07 10:41:38,257 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:38,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4880 states. [2019-12-07 10:41:38,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4880 to 4683. [2019-12-07 10:41:38,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4683 states. [2019-12-07 10:41:38,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4683 states to 4683 states and 6431 transitions. [2019-12-07 10:41:38,405 INFO L78 Accepts]: Start accepts. Automaton has 4683 states and 6431 transitions. Word has length 64 [2019-12-07 10:41:38,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:38,406 INFO L462 AbstractCegarLoop]: Abstraction has 4683 states and 6431 transitions. [2019-12-07 10:41:38,406 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:41:38,406 INFO L276 IsEmpty]: Start isEmpty. Operand 4683 states and 6431 transitions. [2019-12-07 10:41:38,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 10:41:38,407 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:38,407 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:38,408 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:38,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:38,408 INFO L82 PathProgramCache]: Analyzing trace with hash -693070170, now seen corresponding path program 1 times [2019-12-07 10:41:38,408 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:38,408 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2070650316] [2019-12-07 10:41:38,408 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:38,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:38,436 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:38,436 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2070650316] [2019-12-07 10:41:38,436 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:38,436 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:41:38,436 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [643111175] [2019-12-07 10:41:38,437 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:41:38,437 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:38,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:41:38,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:38,437 INFO L87 Difference]: Start difference. First operand 4683 states and 6431 transitions. Second operand 3 states. [2019-12-07 10:41:38,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:38,600 INFO L93 Difference]: Finished difference Result 9747 states and 13357 transitions. [2019-12-07 10:41:38,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:41:38,600 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 10:41:38,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:38,609 INFO L225 Difference]: With dead ends: 9747 [2019-12-07 10:41:38,609 INFO L226 Difference]: Without dead ends: 6169 [2019-12-07 10:41:38,614 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:38,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6169 states. [2019-12-07 10:41:38,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6169 to 6129. [2019-12-07 10:41:38,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6129 states. [2019-12-07 10:41:38,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6129 states to 6129 states and 8308 transitions. [2019-12-07 10:41:38,786 INFO L78 Accepts]: Start accepts. Automaton has 6129 states and 8308 transitions. Word has length 64 [2019-12-07 10:41:38,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:38,786 INFO L462 AbstractCegarLoop]: Abstraction has 6129 states and 8308 transitions. [2019-12-07 10:41:38,786 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:41:38,786 INFO L276 IsEmpty]: Start isEmpty. Operand 6129 states and 8308 transitions. [2019-12-07 10:41:38,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 10:41:38,788 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:38,788 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:38,788 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:38,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:38,789 INFO L82 PathProgramCache]: Analyzing trace with hash 809095304, now seen corresponding path program 1 times [2019-12-07 10:41:38,789 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:38,789 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [351784583] [2019-12-07 10:41:38,789 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:38,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:38,855 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:38,855 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [351784583] [2019-12-07 10:41:38,855 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [291429352] [2019-12-07 10:41:38,855 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:41:38,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:38,909 INFO L264 TraceCheckSpWp]: Trace formula consists of 282 conjuncts, 6 conjunts are in the unsatisfiable core [2019-12-07 10:41:38,912 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:41:38,964 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:38,964 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:41:38,964 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6] total 12 [2019-12-07 10:41:38,964 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1077931839] [2019-12-07 10:41:38,965 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 10:41:38,965 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:38,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 10:41:38,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:41:38,965 INFO L87 Difference]: Start difference. First operand 6129 states and 8308 transitions. Second operand 13 states. [2019-12-07 10:41:40,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:40,654 INFO L93 Difference]: Finished difference Result 32990 states and 44451 transitions. [2019-12-07 10:41:40,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 10:41:40,654 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 64 [2019-12-07 10:41:40,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:40,687 INFO L225 Difference]: With dead ends: 32990 [2019-12-07 10:41:40,687 INFO L226 Difference]: Without dead ends: 30416 [2019-12-07 10:41:40,693 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 60 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 592 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=585, Invalid=1577, Unknown=0, NotChecked=0, Total=2162 [2019-12-07 10:41:40,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30416 states. [2019-12-07 10:41:41,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30416 to 7321. [2019-12-07 10:41:41,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7321 states. [2019-12-07 10:41:41,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7321 states to 7321 states and 9951 transitions. [2019-12-07 10:41:41,111 INFO L78 Accepts]: Start accepts. Automaton has 7321 states and 9951 transitions. Word has length 64 [2019-12-07 10:41:41,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:41,111 INFO L462 AbstractCegarLoop]: Abstraction has 7321 states and 9951 transitions. [2019-12-07 10:41:41,111 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 10:41:41,111 INFO L276 IsEmpty]: Start isEmpty. Operand 7321 states and 9951 transitions. [2019-12-07 10:41:41,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:41:41,113 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:41,113 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:41,314 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:41:41,315 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:41,315 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:41,316 INFO L82 PathProgramCache]: Analyzing trace with hash 1571663051, now seen corresponding path program 1 times [2019-12-07 10:41:41,316 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:41,316 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1492635713] [2019-12-07 10:41:41,317 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:41,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:41,370 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:41,371 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1492635713] [2019-12-07 10:41:41,371 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:41,371 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:41:41,371 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2122184575] [2019-12-07 10:41:41,371 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:41:41,371 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:41,371 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:41:41,372 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:41,372 INFO L87 Difference]: Start difference. First operand 7321 states and 9951 transitions. Second operand 3 states. [2019-12-07 10:41:41,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:41,579 INFO L93 Difference]: Finished difference Result 9554 states and 12821 transitions. [2019-12-07 10:41:41,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:41:41,580 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 10:41:41,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:41,587 INFO L225 Difference]: With dead ends: 9554 [2019-12-07 10:41:41,587 INFO L226 Difference]: Without dead ends: 6443 [2019-12-07 10:41:41,590 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:41,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6443 states. [2019-12-07 10:41:41,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6443 to 6425. [2019-12-07 10:41:41,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6425 states. [2019-12-07 10:41:41,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6425 states to 6425 states and 8512 transitions. [2019-12-07 10:41:41,817 INFO L78 Accepts]: Start accepts. Automaton has 6425 states and 8512 transitions. Word has length 65 [2019-12-07 10:41:41,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:41,817 INFO L462 AbstractCegarLoop]: Abstraction has 6425 states and 8512 transitions. [2019-12-07 10:41:41,817 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:41:41,817 INFO L276 IsEmpty]: Start isEmpty. Operand 6425 states and 8512 transitions. [2019-12-07 10:41:41,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:41:41,819 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:41,819 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:41,819 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:41,819 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:41,819 INFO L82 PathProgramCache]: Analyzing trace with hash -1664257503, now seen corresponding path program 1 times [2019-12-07 10:41:41,820 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:41,820 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1392343441] [2019-12-07 10:41:41,820 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:41,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:41,864 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:41,865 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1392343441] [2019-12-07 10:41:41,865 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1872584782] [2019-12-07 10:41:41,865 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:41:41,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:41,914 INFO L264 TraceCheckSpWp]: Trace formula consists of 291 conjuncts, 6 conjunts are in the unsatisfiable core [2019-12-07 10:41:41,917 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:41:41,968 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:41,968 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:41:41,968 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2019-12-07 10:41:41,968 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [570092383] [2019-12-07 10:41:41,968 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:41:41,968 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:41,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:41:41,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:41:41,969 INFO L87 Difference]: Start difference. First operand 6425 states and 8512 transitions. Second operand 11 states. [2019-12-07 10:41:42,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:42,520 INFO L93 Difference]: Finished difference Result 13260 states and 17440 transitions. [2019-12-07 10:41:42,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 10:41:42,520 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2019-12-07 10:41:42,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:42,528 INFO L225 Difference]: With dead ends: 13260 [2019-12-07 10:41:42,528 INFO L226 Difference]: Without dead ends: 10002 [2019-12-07 10:41:42,531 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=95, Invalid=211, Unknown=0, NotChecked=0, Total=306 [2019-12-07 10:41:42,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10002 states. [2019-12-07 10:41:42,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10002 to 6733. [2019-12-07 10:41:42,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6733 states. [2019-12-07 10:41:42,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6733 states to 6733 states and 8842 transitions. [2019-12-07 10:41:42,798 INFO L78 Accepts]: Start accepts. Automaton has 6733 states and 8842 transitions. Word has length 65 [2019-12-07 10:41:42,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:42,799 INFO L462 AbstractCegarLoop]: Abstraction has 6733 states and 8842 transitions. [2019-12-07 10:41:42,799 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:41:42,799 INFO L276 IsEmpty]: Start isEmpty. Operand 6733 states and 8842 transitions. [2019-12-07 10:41:42,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:41:42,800 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:42,800 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:43,001 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:41:43,001 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:43,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:43,002 INFO L82 PathProgramCache]: Analyzing trace with hash -1283872475, now seen corresponding path program 1 times [2019-12-07 10:41:43,002 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:43,003 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369146932] [2019-12-07 10:41:43,003 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:43,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:43,036 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:43,036 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1369146932] [2019-12-07 10:41:43,036 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:43,036 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:41:43,036 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1586699891] [2019-12-07 10:41:43,037 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:41:43,037 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:43,037 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:41:43,037 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:43,037 INFO L87 Difference]: Start difference. First operand 6733 states and 8842 transitions. Second operand 3 states. [2019-12-07 10:41:43,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:43,409 INFO L93 Difference]: Finished difference Result 13969 states and 18394 transitions. [2019-12-07 10:41:43,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:41:43,410 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 10:41:43,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:43,417 INFO L225 Difference]: With dead ends: 13969 [2019-12-07 10:41:43,417 INFO L226 Difference]: Without dead ends: 8983 [2019-12-07 10:41:43,422 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:41:43,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8983 states. [2019-12-07 10:41:43,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8983 to 8821. [2019-12-07 10:41:43,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8821 states. [2019-12-07 10:41:43,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8821 states to 8821 states and 11392 transitions. [2019-12-07 10:41:43,806 INFO L78 Accepts]: Start accepts. Automaton has 8821 states and 11392 transitions. Word has length 65 [2019-12-07 10:41:43,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:43,806 INFO L462 AbstractCegarLoop]: Abstraction has 8821 states and 11392 transitions. [2019-12-07 10:41:43,806 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:41:43,806 INFO L276 IsEmpty]: Start isEmpty. Operand 8821 states and 11392 transitions. [2019-12-07 10:41:43,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:41:43,808 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:43,808 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:43,808 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:43,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:43,808 INFO L82 PathProgramCache]: Analyzing trace with hash 1516803518, now seen corresponding path program 1 times [2019-12-07 10:41:43,808 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:43,809 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2014736518] [2019-12-07 10:41:43,809 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:43,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:43,849 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2019-12-07 10:41:43,849 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2014736518] [2019-12-07 10:41:43,849 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:43,850 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:41:43,850 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [276934864] [2019-12-07 10:41:43,850 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:41:43,850 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:43,850 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:41:43,850 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:41:43,850 INFO L87 Difference]: Start difference. First operand 8821 states and 11392 transitions. Second operand 6 states. [2019-12-07 10:41:44,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:44,386 INFO L93 Difference]: Finished difference Result 20417 states and 26304 transitions. [2019-12-07 10:41:44,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:41:44,387 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 10:41:44,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:44,395 INFO L225 Difference]: With dead ends: 20417 [2019-12-07 10:41:44,395 INFO L226 Difference]: Without dead ends: 11653 [2019-12-07 10:41:44,401 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:41:44,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11653 states. [2019-12-07 10:41:44,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11653 to 11469. [2019-12-07 10:41:44,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11469 states. [2019-12-07 10:41:44,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11469 states to 11469 states and 14643 transitions. [2019-12-07 10:41:44,901 INFO L78 Accepts]: Start accepts. Automaton has 11469 states and 14643 transitions. Word has length 65 [2019-12-07 10:41:44,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:44,901 INFO L462 AbstractCegarLoop]: Abstraction has 11469 states and 14643 transitions. [2019-12-07 10:41:44,901 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:41:44,901 INFO L276 IsEmpty]: Start isEmpty. Operand 11469 states and 14643 transitions. [2019-12-07 10:41:44,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:41:44,903 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:44,904 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:44,904 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:44,904 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:44,904 INFO L82 PathProgramCache]: Analyzing trace with hash 815203644, now seen corresponding path program 1 times [2019-12-07 10:41:44,904 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:44,904 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2056435353] [2019-12-07 10:41:44,904 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:44,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:44,937 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-12-07 10:41:44,937 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2056435353] [2019-12-07 10:41:44,937 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:44,938 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:41:44,938 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1181042313] [2019-12-07 10:41:44,938 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:41:44,938 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:44,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:41:44,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:41:44,939 INFO L87 Difference]: Start difference. First operand 11469 states and 14643 transitions. Second operand 5 states. [2019-12-07 10:41:45,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:45,566 INFO L93 Difference]: Finished difference Result 17982 states and 23210 transitions. [2019-12-07 10:41:45,566 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:41:45,566 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-12-07 10:41:45,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:45,577 INFO L225 Difference]: With dead ends: 17982 [2019-12-07 10:41:45,577 INFO L226 Difference]: Without dead ends: 15048 [2019-12-07 10:41:45,582 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:41:45,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15048 states. [2019-12-07 10:41:46,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15048 to 12838. [2019-12-07 10:41:46,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12838 states. [2019-12-07 10:41:46,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12838 states to 12838 states and 16362 transitions. [2019-12-07 10:41:46,200 INFO L78 Accepts]: Start accepts. Automaton has 12838 states and 16362 transitions. Word has length 65 [2019-12-07 10:41:46,200 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:46,200 INFO L462 AbstractCegarLoop]: Abstraction has 12838 states and 16362 transitions. [2019-12-07 10:41:46,200 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:41:46,200 INFO L276 IsEmpty]: Start isEmpty. Operand 12838 states and 16362 transitions. [2019-12-07 10:41:46,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:41:46,202 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:46,202 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:46,203 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:46,203 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:46,203 INFO L82 PathProgramCache]: Analyzing trace with hash 352986821, now seen corresponding path program 1 times [2019-12-07 10:41:46,203 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:46,203 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1252841265] [2019-12-07 10:41:46,203 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:46,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:46,246 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 10:41:46,246 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1252841265] [2019-12-07 10:41:46,246 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:46,246 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:41:46,247 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1731257516] [2019-12-07 10:41:46,247 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:41:46,247 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:46,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:41:46,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:41:46,247 INFO L87 Difference]: Start difference. First operand 12838 states and 16362 transitions. Second operand 5 states. [2019-12-07 10:41:46,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:46,922 INFO L93 Difference]: Finished difference Result 19312 states and 24919 transitions. [2019-12-07 10:41:46,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:41:46,923 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 10:41:46,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:46,934 INFO L225 Difference]: With dead ends: 19312 [2019-12-07 10:41:46,934 INFO L226 Difference]: Without dead ends: 16403 [2019-12-07 10:41:46,939 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:41:46,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16403 states. [2019-12-07 10:41:47,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16403 to 15212. [2019-12-07 10:41:47,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15212 states. [2019-12-07 10:41:47,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15212 states to 15212 states and 19402 transitions. [2019-12-07 10:41:47,611 INFO L78 Accepts]: Start accepts. Automaton has 15212 states and 19402 transitions. Word has length 66 [2019-12-07 10:41:47,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:47,611 INFO L462 AbstractCegarLoop]: Abstraction has 15212 states and 19402 transitions. [2019-12-07 10:41:47,611 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:41:47,611 INFO L276 IsEmpty]: Start isEmpty. Operand 15212 states and 19402 transitions. [2019-12-07 10:41:47,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:41:47,613 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:47,613 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:47,613 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:47,613 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:47,614 INFO L82 PathProgramCache]: Analyzing trace with hash 1404868071, now seen corresponding path program 1 times [2019-12-07 10:41:47,614 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:47,614 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2036854083] [2019-12-07 10:41:47,614 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:47,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:47,651 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-12-07 10:41:47,651 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2036854083] [2019-12-07 10:41:47,651 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:41:47,651 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:41:47,652 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1151182001] [2019-12-07 10:41:47,652 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:41:47,652 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:47,652 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:41:47,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:41:47,652 INFO L87 Difference]: Start difference. First operand 15212 states and 19402 transitions. Second operand 5 states. [2019-12-07 10:41:48,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:41:48,419 INFO L93 Difference]: Finished difference Result 21150 states and 27244 transitions. [2019-12-07 10:41:48,419 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:41:48,419 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 10:41:48,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:41:48,432 INFO L225 Difference]: With dead ends: 21150 [2019-12-07 10:41:48,433 INFO L226 Difference]: Without dead ends: 18424 [2019-12-07 10:41:48,437 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:41:48,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18424 states. [2019-12-07 10:41:49,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18424 to 17222. [2019-12-07 10:41:49,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17222 states. [2019-12-07 10:41:49,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17222 states to 17222 states and 21948 transitions. [2019-12-07 10:41:49,285 INFO L78 Accepts]: Start accepts. Automaton has 17222 states and 21948 transitions. Word has length 66 [2019-12-07 10:41:49,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:41:49,285 INFO L462 AbstractCegarLoop]: Abstraction has 17222 states and 21948 transitions. [2019-12-07 10:41:49,285 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:41:49,285 INFO L276 IsEmpty]: Start isEmpty. Operand 17222 states and 21948 transitions. [2019-12-07 10:41:49,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-12-07 10:41:49,288 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:41:49,288 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:41:49,288 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:41:49,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:41:49,288 INFO L82 PathProgramCache]: Analyzing trace with hash 1470846148, now seen corresponding path program 1 times [2019-12-07 10:41:49,288 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:41:49,288 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1504847437] [2019-12-07 10:41:49,288 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:41:49,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:49,411 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:49,411 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1504847437] [2019-12-07 10:41:49,411 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [362353727] [2019-12-07 10:41:49,411 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:41:49,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:41:49,462 INFO L264 TraceCheckSpWp]: Trace formula consists of 304 conjuncts, 21 conjunts are in the unsatisfiable core [2019-12-07 10:41:49,465 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:41:49,561 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:41:50,352 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 7 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:41:50,352 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:41:50,352 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 12] total 20 [2019-12-07 10:41:50,352 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [552266846] [2019-12-07 10:41:50,353 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 10:41:50,353 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:41:50,353 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 10:41:50,353 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=338, Unknown=0, NotChecked=0, Total=380 [2019-12-07 10:41:50,353 INFO L87 Difference]: Start difference. First operand 17222 states and 21948 transitions. Second operand 20 states. [2019-12-07 10:41:50,750 WARN L192 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 61 [2019-12-07 10:41:50,925 WARN L192 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 67 [2019-12-07 10:41:51,233 WARN L192 SmtUtils]: Spent 220.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 73 [2019-12-07 10:41:51,509 WARN L192 SmtUtils]: Spent 239.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 79 [2019-12-07 10:41:51,752 WARN L192 SmtUtils]: Spent 208.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 76 [2019-12-07 10:41:52,105 WARN L192 SmtUtils]: Spent 195.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 76 [2019-12-07 10:41:52,432 WARN L192 SmtUtils]: Spent 195.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 72 [2019-12-07 10:41:52,647 WARN L192 SmtUtils]: Spent 177.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 70 [2019-12-07 10:41:52,902 WARN L192 SmtUtils]: Spent 220.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 79 [2019-12-07 10:41:53,212 WARN L192 SmtUtils]: Spent 239.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 82 [2019-12-07 10:41:53,498 WARN L192 SmtUtils]: Spent 202.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 73 [2019-12-07 10:41:53,759 WARN L192 SmtUtils]: Spent 188.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 70 [2019-12-07 10:41:54,190 WARN L192 SmtUtils]: Spent 299.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 69 [2019-12-07 10:41:54,517 WARN L192 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 66 [2019-12-07 10:41:54,919 WARN L192 SmtUtils]: Spent 320.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 82 [2019-12-07 10:41:55,354 WARN L192 SmtUtils]: Spent 358.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 79 [2019-12-07 10:41:55,694 WARN L192 SmtUtils]: Spent 208.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 69 [2019-12-07 10:41:55,981 WARN L192 SmtUtils]: Spent 202.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 78 [2019-12-07 10:41:56,238 WARN L192 SmtUtils]: Spent 214.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 75 [2019-12-07 10:41:56,642 WARN L192 SmtUtils]: Spent 356.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 72 [2019-12-07 10:41:56,934 WARN L192 SmtUtils]: Spent 222.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 75 [2019-12-07 10:41:57,171 WARN L192 SmtUtils]: Spent 198.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 72 [2019-12-07 10:41:57,439 WARN L192 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 65 [2019-12-07 10:41:57,708 WARN L192 SmtUtils]: Spent 199.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 76 [2019-12-07 10:41:58,022 WARN L192 SmtUtils]: Spent 209.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 68 [2019-12-07 10:41:58,527 WARN L192 SmtUtils]: Spent 217.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 72 [2019-12-07 10:41:58,863 WARN L192 SmtUtils]: Spent 227.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 79 [2019-12-07 10:41:59,108 WARN L192 SmtUtils]: Spent 189.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 72 [2019-12-07 10:41:59,413 WARN L192 SmtUtils]: Spent 197.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 75 [2019-12-07 10:41:59,642 WARN L192 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 68 [2019-12-07 10:41:59,934 WARN L192 SmtUtils]: Spent 205.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 73 [2019-12-07 10:42:00,577 WARN L192 SmtUtils]: Spent 242.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 79 [2019-12-07 10:42:00,888 WARN L192 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 69 [2019-12-07 10:42:01,165 WARN L192 SmtUtils]: Spent 200.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 75 [2019-12-07 10:42:01,922 WARN L192 SmtUtils]: Spent 228.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 75 [2019-12-07 10:42:02,232 WARN L192 SmtUtils]: Spent 259.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 82 [2019-12-07 10:42:02,533 WARN L192 SmtUtils]: Spent 197.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 72 [2019-12-07 10:42:02,824 WARN L192 SmtUtils]: Spent 226.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 78 [2019-12-07 10:42:03,143 WARN L192 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 69 [2019-12-07 10:42:03,500 WARN L192 SmtUtils]: Spent 294.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 76 [2019-12-07 10:42:03,792 WARN L192 SmtUtils]: Spent 214.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 75 [2019-12-07 10:42:04,128 WARN L192 SmtUtils]: Spent 246.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 79 [2019-12-07 10:42:04,433 WARN L192 SmtUtils]: Spent 249.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 85 [2019-12-07 10:42:04,707 WARN L192 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 71 [2019-12-07 10:42:04,865 WARN L192 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 60 [2019-12-07 10:42:05,171 WARN L192 SmtUtils]: Spent 247.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 82 [2019-12-07 10:42:05,462 WARN L192 SmtUtils]: Spent 231.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 76 [2019-12-07 10:42:05,749 WARN L192 SmtUtils]: Spent 230.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 75 [2019-12-07 10:42:06,137 WARN L192 SmtUtils]: Spent 247.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 78 [2019-12-07 10:42:06,303 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 55 [2019-12-07 10:42:06,610 WARN L192 SmtUtils]: Spent 237.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 78 [2019-12-07 10:42:06,851 WARN L192 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 72 [2019-12-07 10:42:07,120 WARN L192 SmtUtils]: Spent 206.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 72 [2019-12-07 10:42:07,423 WARN L192 SmtUtils]: Spent 218.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 72 [2019-12-07 10:42:07,707 WARN L192 SmtUtils]: Spent 226.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 78 [2019-12-07 10:42:08,009 WARN L192 SmtUtils]: Spent 231.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 74 [2019-12-07 10:42:08,187 WARN L192 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 63 [2019-12-07 10:42:08,602 WARN L192 SmtUtils]: Spent 298.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 85 [2019-12-07 10:42:08,882 WARN L192 SmtUtils]: Spent 215.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 82 [2019-12-07 10:42:09,149 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 56 [2019-12-07 10:42:09,316 WARN L192 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 63 [2019-12-07 10:42:09,491 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 58 [2019-12-07 10:42:09,684 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 59 [2019-12-07 10:42:09,999 WARN L192 SmtUtils]: Spent 225.00 ms on a formula simplification. DAG size of input: 96 DAG size of output: 81 [2019-12-07 10:42:10,261 WARN L192 SmtUtils]: Spent 207.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 78 [2019-12-07 10:42:10,587 WARN L192 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 75 [2019-12-07 10:42:10,874 WARN L192 SmtUtils]: Spent 219.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 81 [2019-12-07 10:42:11,268 WARN L192 SmtUtils]: Spent 198.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 75 [2019-12-07 10:42:11,628 WARN L192 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 65 [2019-12-07 10:42:11,813 WARN L192 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 62 [2019-12-07 10:42:12,102 WARN L192 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 71 [2019-12-07 10:42:12,357 WARN L192 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 65 [2019-12-07 10:42:12,517 WARN L192 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 63 [2019-12-07 10:42:12,669 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 59 [2019-12-07 10:42:13,069 WARN L192 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 68 [2019-12-07 10:42:13,231 WARN L192 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 65 [2019-12-07 10:42:13,398 WARN L192 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 62 [2019-12-07 10:42:13,740 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 68 [2019-12-07 10:42:13,893 WARN L192 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 65 [2019-12-07 10:42:14,263 WARN L192 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 71 [2019-12-07 10:42:14,434 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 68 [2019-12-07 10:42:14,630 WARN L192 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 61 [2019-12-07 10:42:15,153 WARN L192 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 58 [2019-12-07 10:42:15,404 WARN L192 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 61 [2019-12-07 10:42:15,590 WARN L192 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 56 [2019-12-07 10:42:15,786 WARN L192 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 61 [2019-12-07 10:42:16,156 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 64 [2019-12-07 10:42:16,357 WARN L192 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 57 [2019-12-07 10:42:16,624 WARN L192 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 60 [2019-12-07 10:42:17,246 WARN L192 SmtUtils]: Spent 232.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 78 [2019-12-07 10:42:17,693 WARN L192 SmtUtils]: Spent 259.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 81 [2019-12-07 10:42:17,899 WARN L192 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 64 [2019-12-07 10:42:18,200 WARN L192 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 67 [2019-12-07 10:42:18,462 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 62 [2019-12-07 10:42:18,695 WARN L192 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 67 [2019-12-07 10:42:19,013 WARN L192 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 57 [2019-12-07 10:42:19,199 WARN L192 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 65 [2019-12-07 10:42:19,593 WARN L192 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 70 [2019-12-07 10:42:20,000 WARN L192 SmtUtils]: Spent 210.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 74 [2019-12-07 10:42:20,172 WARN L192 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 63 [2019-12-07 10:42:20,320 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 60 [2019-12-07 10:42:21,057 WARN L192 SmtUtils]: Spent 209.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 77 [2019-12-07 10:42:21,270 WARN L192 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 66 [2019-12-07 10:42:21,605 WARN L192 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 47 [2019-12-07 10:42:22,010 WARN L192 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 63 [2019-12-07 10:42:22,334 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 56 [2019-12-07 10:42:22,733 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 61 [2019-12-07 10:42:23,078 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 67 [2019-12-07 10:42:23,249 WARN L192 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 64 [2019-12-07 10:42:23,430 WARN L192 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 64 [2019-12-07 10:42:23,782 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 59 [2019-12-07 10:42:23,963 WARN L192 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 64 [2019-12-07 10:42:24,399 WARN L192 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 70 [2019-12-07 10:42:24,580 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 67 [2019-12-07 10:42:24,765 WARN L192 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 67 [2019-12-07 10:42:28,424 WARN L192 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 57 [2019-12-07 10:42:28,856 WARN L192 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 60 [2019-12-07 10:42:29,805 WARN L192 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 56 [2019-12-07 10:42:30,123 WARN L192 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 59 [2019-12-07 10:42:30,987 WARN L192 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 63 [2019-12-07 10:42:31,413 WARN L192 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 63 [2019-12-07 10:42:31,828 WARN L192 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 66 [2019-12-07 10:42:32,265 WARN L192 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 66 [2019-12-07 10:42:32,451 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 63 [2019-12-07 10:42:33,009 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 66 [2019-12-07 10:42:33,406 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 55 [2019-12-07 10:42:33,680 WARN L192 SmtUtils]: Spent 210.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 67 [2019-12-07 10:42:34,366 WARN L192 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 58 [2019-12-07 10:42:34,609 WARN L192 SmtUtils]: Spent 162.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 70 [2019-12-07 10:42:34,777 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 60 [2019-12-07 10:42:37,878 WARN L192 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 72 [2019-12-07 10:42:38,074 WARN L192 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 61 [2019-12-07 10:42:38,513 WARN L192 SmtUtils]: Spent 210.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 75 [2019-12-07 10:42:38,699 WARN L192 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 64 [2019-12-07 10:42:39,052 WARN L192 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 69 [2019-12-07 10:42:39,233 WARN L192 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 54 [2019-12-07 10:42:39,411 WARN L192 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 57 [2019-12-07 10:42:39,662 WARN L192 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 63 [2019-12-07 10:42:40,041 WARN L192 SmtUtils]: Spent 191.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 72 [2019-12-07 10:42:40,407 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 60 [2019-12-07 10:42:40,645 WARN L192 SmtUtils]: Spent 163.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 66 [2019-12-07 10:42:41,293 WARN L192 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 59 [2019-12-07 10:42:41,808 WARN L192 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 58 [2019-12-07 10:42:42,031 WARN L192 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 62 [2019-12-07 10:42:42,274 WARN L192 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 70 [2019-12-07 10:42:42,694 WARN L192 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 61 [2019-12-07 10:42:42,971 WARN L192 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 73 [2019-12-07 10:42:43,379 WARN L192 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 60 [2019-12-07 10:42:43,751 WARN L192 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 63 [2019-12-07 10:42:46,061 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 57 [2019-12-07 10:42:46,664 WARN L192 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 65 [2019-12-07 10:42:47,055 WARN L192 SmtUtils]: Spent 174.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 68 [2019-12-07 10:42:47,396 WARN L192 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 56 [2019-12-07 10:42:47,738 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 59 [2019-12-07 10:42:48,410 WARN L192 SmtUtils]: Spent 176.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 69 [2019-12-07 10:42:48,779 WARN L192 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 72 [2019-12-07 10:42:49,072 WARN L192 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 60 [2019-12-07 10:42:49,361 WARN L192 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 63 [2019-12-07 10:42:50,004 WARN L192 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 61 [2019-12-07 10:42:50,290 WARN L192 SmtUtils]: Spent 219.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 73 [2019-12-07 10:42:50,458 WARN L192 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 63 [2019-12-07 10:42:50,723 WARN L192 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 64 [2019-12-07 10:42:51,068 WARN L192 SmtUtils]: Spent 245.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 76 [2019-12-07 10:42:51,273 WARN L192 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 66 [2019-12-07 10:42:52,128 WARN L192 SmtUtils]: Spent 191.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 70 [2019-12-07 10:42:52,303 WARN L192 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 58 [2019-12-07 10:42:52,619 WARN L192 SmtUtils]: Spent 176.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 73 [2019-12-07 10:42:52,785 WARN L192 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 61 [2019-12-07 10:42:53,620 WARN L192 SmtUtils]: Spent 212.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 75 [2019-12-07 10:42:53,804 WARN L192 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 64 [2019-12-07 10:42:54,137 WARN L192 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 78 [2019-12-07 10:42:54,472 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 67 [2019-12-07 10:42:54,784 WARN L192 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 63 [2019-12-07 10:42:55,300 WARN L192 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 66 [2019-12-07 10:42:55,527 WARN L192 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 60 [2019-12-07 10:42:55,804 WARN L192 SmtUtils]: Spent 180.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 69 [2019-12-07 10:42:56,294 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 64 [2019-12-07 10:42:56,455 WARN L192 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 61 [2019-12-07 10:42:56,762 WARN L192 SmtUtils]: Spent 225.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 76 [2019-12-07 10:42:57,034 WARN L192 SmtUtils]: Spent 198.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 73 [2019-12-07 10:42:57,302 WARN L192 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 62 [2019-12-07 10:42:57,812 WARN L192 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 67 [2019-12-07 10:42:58,002 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 64 [2019-12-07 10:42:58,331 WARN L192 SmtUtils]: Spent 202.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 78 [2019-12-07 10:42:58,624 WARN L192 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 76 [2019-12-07 10:42:58,863 WARN L192 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 66 [2019-12-07 10:42:59,019 WARN L192 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 63 [2019-12-07 10:42:59,654 WARN L192 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 69 [2019-12-07 10:42:59,826 WARN L192 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 66 [2019-12-07 10:43:00,461 WARN L192 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 65 [2019-12-07 10:43:02,146 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 60 [2019-12-07 10:43:02,384 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 63 [2019-12-07 10:43:03,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:43:03,970 INFO L93 Difference]: Finished difference Result 209813 states and 266157 transitions. [2019-12-07 10:43:03,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 293 states. [2019-12-07 10:43:03,970 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 70 [2019-12-07 10:43:03,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:43:04,130 INFO L225 Difference]: With dead ends: 209813 [2019-12-07 10:43:04,130 INFO L226 Difference]: Without dead ends: 194474 [2019-12-07 10:43:04,173 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 370 GetRequests, 48 SyntacticMatches, 13 SemanticMatches, 309 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46980 ImplicationChecksByTransitivity, 53.0s TimeCoverageRelationStatistics Valid=12763, Invalid=83647, Unknown=0, NotChecked=0, Total=96410 [2019-12-07 10:43:04,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194474 states. [2019-12-07 10:43:07,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194474 to 34972. [2019-12-07 10:43:07,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34972 states. [2019-12-07 10:43:07,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34972 states to 34972 states and 45212 transitions. [2019-12-07 10:43:07,910 INFO L78 Accepts]: Start accepts. Automaton has 34972 states and 45212 transitions. Word has length 70 [2019-12-07 10:43:07,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:43:07,910 INFO L462 AbstractCegarLoop]: Abstraction has 34972 states and 45212 transitions. [2019-12-07 10:43:07,910 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 10:43:07,910 INFO L276 IsEmpty]: Start isEmpty. Operand 34972 states and 45212 transitions. [2019-12-07 10:43:07,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-12-07 10:43:07,914 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:43:07,914 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:43:08,114 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:43:08,115 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:43:08,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:43:08,116 INFO L82 PathProgramCache]: Analyzing trace with hash 1898192212, now seen corresponding path program 1 times [2019-12-07 10:43:08,116 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:43:08,116 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2098187316] [2019-12-07 10:43:08,117 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:43:08,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:43:08,229 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 7 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:43:08,230 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2098187316] [2019-12-07 10:43:08,230 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2130018397] [2019-12-07 10:43:08,230 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:43:08,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:43:08,277 INFO L264 TraceCheckSpWp]: Trace formula consists of 304 conjuncts, 17 conjunts are in the unsatisfiable core [2019-12-07 10:43:08,279 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:43:08,330 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:43:08,452 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 7 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:43:08,452 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:43:08,452 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2019-12-07 10:43:08,452 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1758335178] [2019-12-07 10:43:08,453 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 10:43:08,453 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:43:08,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 10:43:08,453 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=224, Unknown=0, NotChecked=0, Total=272 [2019-12-07 10:43:08,453 INFO L87 Difference]: Start difference. First operand 34972 states and 45212 transitions. Second operand 17 states. [2019-12-07 10:43:18,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:43:18,257 INFO L93 Difference]: Finished difference Result 112109 states and 143079 transitions. [2019-12-07 10:43:18,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 10:43:18,257 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 70 [2019-12-07 10:43:18,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:43:18,320 INFO L225 Difference]: With dead ends: 112109 [2019-12-07 10:43:18,320 INFO L226 Difference]: Without dead ends: 81954 [2019-12-07 10:43:18,340 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 62 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 498 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=592, Invalid=1664, Unknown=0, NotChecked=0, Total=2256 [2019-12-07 10:43:18,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81954 states. [2019-12-07 10:43:22,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81954 to 44721. [2019-12-07 10:43:22,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44721 states. [2019-12-07 10:43:22,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44721 states to 44721 states and 57552 transitions. [2019-12-07 10:43:22,742 INFO L78 Accepts]: Start accepts. Automaton has 44721 states and 57552 transitions. Word has length 70 [2019-12-07 10:43:22,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:43:22,743 INFO L462 AbstractCegarLoop]: Abstraction has 44721 states and 57552 transitions. [2019-12-07 10:43:22,743 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 10:43:22,743 INFO L276 IsEmpty]: Start isEmpty. Operand 44721 states and 57552 transitions. [2019-12-07 10:43:22,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-12-07 10:43:22,747 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:43:22,747 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:43:22,947 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:43:22,948 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:43:22,949 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:43:22,949 INFO L82 PathProgramCache]: Analyzing trace with hash -468502382, now seen corresponding path program 1 times [2019-12-07 10:43:22,949 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:43:22,950 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1993498895] [2019-12-07 10:43:22,950 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:43:22,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:43:22,995 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-12-07 10:43:22,995 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1993498895] [2019-12-07 10:43:22,995 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:43:22,996 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:43:22,996 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1577867644] [2019-12-07 10:43:22,996 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:43:22,996 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:43:22,996 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:43:22,996 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:43:22,996 INFO L87 Difference]: Start difference. First operand 44721 states and 57552 transitions. Second operand 6 states. [2019-12-07 10:43:26,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:43:26,650 INFO L93 Difference]: Finished difference Result 76554 states and 98343 transitions. [2019-12-07 10:43:26,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:43:26,651 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2019-12-07 10:43:26,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:43:26,677 INFO L225 Difference]: With dead ends: 76554 [2019-12-07 10:43:26,677 INFO L226 Difference]: Without dead ends: 36650 [2019-12-07 10:43:26,695 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:43:26,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36650 states. [2019-12-07 10:43:29,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36650 to 32812. [2019-12-07 10:43:29,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32812 states. [2019-12-07 10:43:29,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32812 states to 32812 states and 41394 transitions. [2019-12-07 10:43:29,986 INFO L78 Accepts]: Start accepts. Automaton has 32812 states and 41394 transitions. Word has length 70 [2019-12-07 10:43:29,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:43:29,986 INFO L462 AbstractCegarLoop]: Abstraction has 32812 states and 41394 transitions. [2019-12-07 10:43:29,986 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:43:29,986 INFO L276 IsEmpty]: Start isEmpty. Operand 32812 states and 41394 transitions. [2019-12-07 10:43:29,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-12-07 10:43:29,990 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:43:29,990 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:43:29,990 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:43:29,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:43:29,990 INFO L82 PathProgramCache]: Analyzing trace with hash 617046017, now seen corresponding path program 1 times [2019-12-07 10:43:29,990 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:43:29,990 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1000294360] [2019-12-07 10:43:29,990 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:43:29,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:43:30,010 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:43:30,010 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1000294360] [2019-12-07 10:43:30,010 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:43:30,010 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:43:30,010 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [393628524] [2019-12-07 10:43:30,011 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:43:30,011 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:43:30,011 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:43:30,011 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:43:30,011 INFO L87 Difference]: Start difference. First operand 32812 states and 41394 transitions. Second operand 3 states. [2019-12-07 10:43:33,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:43:33,033 INFO L93 Difference]: Finished difference Result 39272 states and 49426 transitions. [2019-12-07 10:43:33,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:43:33,034 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 71 [2019-12-07 10:43:33,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:43:33,056 INFO L225 Difference]: With dead ends: 39272 [2019-12-07 10:43:33,056 INFO L226 Difference]: Without dead ends: 31511 [2019-12-07 10:43:33,063 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:43:33,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31511 states. [2019-12-07 10:43:36,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31511 to 31509. [2019-12-07 10:43:36,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31509 states. [2019-12-07 10:43:36,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31509 states to 31509 states and 39151 transitions. [2019-12-07 10:43:36,123 INFO L78 Accepts]: Start accepts. Automaton has 31509 states and 39151 transitions. Word has length 71 [2019-12-07 10:43:36,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:43:36,123 INFO L462 AbstractCegarLoop]: Abstraction has 31509 states and 39151 transitions. [2019-12-07 10:43:36,123 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:43:36,123 INFO L276 IsEmpty]: Start isEmpty. Operand 31509 states and 39151 transitions. [2019-12-07 10:43:36,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 10:43:36,126 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:43:36,127 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:43:36,127 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:43:36,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:43:36,127 INFO L82 PathProgramCache]: Analyzing trace with hash -1402634332, now seen corresponding path program 1 times [2019-12-07 10:43:36,127 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:43:36,127 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [33931590] [2019-12-07 10:43:36,127 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:43:36,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:43:36,518 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:43:36,518 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [33931590] [2019-12-07 10:43:36,518 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [927584047] [2019-12-07 10:43:36,518 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:43:36,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:43:36,566 INFO L264 TraceCheckSpWp]: Trace formula consists of 307 conjuncts, 48 conjunts are in the unsatisfiable core [2019-12-07 10:43:36,568 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:43:37,932 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:43:37,932 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:43:37,932 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 23] total 43 [2019-12-07 10:43:37,933 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [256873914] [2019-12-07 10:43:37,933 INFO L442 AbstractCegarLoop]: Interpolant automaton has 43 states [2019-12-07 10:43:37,933 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:43:37,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2019-12-07 10:43:37,933 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=1613, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 10:43:37,933 INFO L87 Difference]: Start difference. First operand 31509 states and 39151 transitions. Second operand 43 states. [2019-12-07 10:43:39,134 WARN L192 SmtUtils]: Spent 194.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 32 [2019-12-07 10:43:39,555 WARN L192 SmtUtils]: Spent 202.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 32 [2019-12-07 10:43:41,118 WARN L192 SmtUtils]: Spent 233.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 34 [2019-12-07 10:43:49,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:43:49,729 INFO L93 Difference]: Finished difference Result 96759 states and 119901 transitions. [2019-12-07 10:43:49,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 10:43:49,730 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 72 [2019-12-07 10:43:49,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:43:49,785 INFO L225 Difference]: With dead ends: 96759 [2019-12-07 10:43:49,786 INFO L226 Difference]: Without dead ends: 69417 [2019-12-07 10:43:49,803 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 51 SyntacticMatches, 1 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1091 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=809, Invalid=4303, Unknown=0, NotChecked=0, Total=5112 [2019-12-07 10:43:49,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69417 states. [2019-12-07 10:43:54,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69417 to 41522. [2019-12-07 10:43:54,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41522 states. [2019-12-07 10:43:54,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41522 states to 41522 states and 51214 transitions. [2019-12-07 10:43:54,184 INFO L78 Accepts]: Start accepts. Automaton has 41522 states and 51214 transitions. Word has length 72 [2019-12-07 10:43:54,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:43:54,185 INFO L462 AbstractCegarLoop]: Abstraction has 41522 states and 51214 transitions. [2019-12-07 10:43:54,185 INFO L463 AbstractCegarLoop]: Interpolant automaton has 43 states. [2019-12-07 10:43:54,185 INFO L276 IsEmpty]: Start isEmpty. Operand 41522 states and 51214 transitions. [2019-12-07 10:43:54,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 10:43:54,188 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:43:54,188 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:43:54,389 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:43:54,390 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:43:54,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:43:54,391 INFO L82 PathProgramCache]: Analyzing trace with hash -340931127, now seen corresponding path program 1 times [2019-12-07 10:43:54,391 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:43:54,391 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1697676751] [2019-12-07 10:43:54,391 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:43:54,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:43:54,427 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:43:54,427 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1697676751] [2019-12-07 10:43:54,427 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:43:54,428 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:43:54,428 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [509411402] [2019-12-07 10:43:54,428 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:43:54,428 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:43:54,428 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:43:54,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:43:54,429 INFO L87 Difference]: Start difference. First operand 41522 states and 51214 transitions. Second operand 3 states. [2019-12-07 10:43:58,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:43:58,128 INFO L93 Difference]: Finished difference Result 77860 states and 95719 transitions. [2019-12-07 10:43:58,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:43:58,129 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-12-07 10:43:58,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:43:58,156 INFO L225 Difference]: With dead ends: 77860 [2019-12-07 10:43:58,156 INFO L226 Difference]: Without dead ends: 36399 [2019-12-07 10:43:58,174 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:43:58,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36399 states. [2019-12-07 10:44:01,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36399 to 36346. [2019-12-07 10:44:01,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36346 states. [2019-12-07 10:44:01,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36346 states to 36346 states and 43615 transitions. [2019-12-07 10:44:01,967 INFO L78 Accepts]: Start accepts. Automaton has 36346 states and 43615 transitions. Word has length 72 [2019-12-07 10:44:01,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:44:01,968 INFO L462 AbstractCegarLoop]: Abstraction has 36346 states and 43615 transitions. [2019-12-07 10:44:01,968 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:44:01,968 INFO L276 IsEmpty]: Start isEmpty. Operand 36346 states and 43615 transitions. [2019-12-07 10:44:01,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 10:44:01,970 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:44:01,970 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:44:01,970 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:44:01,970 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:44:01,970 INFO L82 PathProgramCache]: Analyzing trace with hash -1154487838, now seen corresponding path program 1 times [2019-12-07 10:44:01,970 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:44:01,970 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [351316286] [2019-12-07 10:44:01,971 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:44:01,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:44:02,019 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-12-07 10:44:02,019 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [351316286] [2019-12-07 10:44:02,019 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:44:02,020 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:44:02,020 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1578808763] [2019-12-07 10:44:02,020 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:44:02,020 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:44:02,020 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:44:02,020 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:44:02,020 INFO L87 Difference]: Start difference. First operand 36346 states and 43615 transitions. Second operand 6 states. [2019-12-07 10:44:06,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:44:06,221 INFO L93 Difference]: Finished difference Result 71449 states and 85856 transitions. [2019-12-07 10:44:06,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:44:06,222 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2019-12-07 10:44:06,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:44:06,253 INFO L225 Difference]: With dead ends: 71449 [2019-12-07 10:44:06,253 INFO L226 Difference]: Without dead ends: 37444 [2019-12-07 10:44:06,269 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:44:06,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37444 states. [2019-12-07 10:44:10,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37444 to 35144. [2019-12-07 10:44:10,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35144 states. [2019-12-07 10:44:10,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35144 states to 35144 states and 41882 transitions. [2019-12-07 10:44:10,193 INFO L78 Accepts]: Start accepts. Automaton has 35144 states and 41882 transitions. Word has length 72 [2019-12-07 10:44:10,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:44:10,194 INFO L462 AbstractCegarLoop]: Abstraction has 35144 states and 41882 transitions. [2019-12-07 10:44:10,194 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:44:10,194 INFO L276 IsEmpty]: Start isEmpty. Operand 35144 states and 41882 transitions. [2019-12-07 10:44:10,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-12-07 10:44:10,195 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:44:10,196 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:44:10,196 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:44:10,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:44:10,196 INFO L82 PathProgramCache]: Analyzing trace with hash -988332999, now seen corresponding path program 1 times [2019-12-07 10:44:10,196 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:44:10,196 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [389868845] [2019-12-07 10:44:10,196 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:44:10,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:44:10,633 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:44:10,633 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [389868845] [2019-12-07 10:44:10,633 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [593934605] [2019-12-07 10:44:10,633 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:44:10,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:44:10,681 INFO L264 TraceCheckSpWp]: Trace formula consists of 306 conjuncts, 34 conjunts are in the unsatisfiable core [2019-12-07 10:44:10,683 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:44:10,904 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:44:11,363 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:44:11,363 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:44:11,363 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 16] total 37 [2019-12-07 10:44:11,363 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [820644173] [2019-12-07 10:44:11,364 INFO L442 AbstractCegarLoop]: Interpolant automaton has 37 states [2019-12-07 10:44:11,364 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:44:11,364 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2019-12-07 10:44:11,364 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=1231, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 10:44:11,364 INFO L87 Difference]: Start difference. First operand 35144 states and 41882 transitions. Second operand 37 states. [2019-12-07 10:44:29,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:44:29,788 INFO L93 Difference]: Finished difference Result 74506 states and 88264 transitions. [2019-12-07 10:44:29,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 93 states. [2019-12-07 10:44:29,789 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 73 [2019-12-07 10:44:29,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:44:29,842 INFO L225 Difference]: With dead ends: 74506 [2019-12-07 10:44:29,843 INFO L226 Difference]: Without dead ends: 66042 [2019-12-07 10:44:29,854 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 59 SyntacticMatches, 1 SemanticMatches, 124 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4327 ImplicationChecksByTransitivity, 6.1s TimeCoverageRelationStatistics Valid=2104, Invalid=13646, Unknown=0, NotChecked=0, Total=15750 [2019-12-07 10:44:29,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66042 states. [2019-12-07 10:44:34,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66042 to 38538. [2019-12-07 10:44:34,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38538 states. [2019-12-07 10:44:34,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38538 states to 38538 states and 46019 transitions. [2019-12-07 10:44:34,383 INFO L78 Accepts]: Start accepts. Automaton has 38538 states and 46019 transitions. Word has length 73 [2019-12-07 10:44:34,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:44:34,383 INFO L462 AbstractCegarLoop]: Abstraction has 38538 states and 46019 transitions. [2019-12-07 10:44:34,383 INFO L463 AbstractCegarLoop]: Interpolant automaton has 37 states. [2019-12-07 10:44:34,383 INFO L276 IsEmpty]: Start isEmpty. Operand 38538 states and 46019 transitions. [2019-12-07 10:44:34,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2019-12-07 10:44:34,390 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:44:34,390 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:44:34,591 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:44:34,592 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:44:34,592 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:44:34,593 INFO L82 PathProgramCache]: Analyzing trace with hash -1817157587, now seen corresponding path program 1 times [2019-12-07 10:44:34,593 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:44:34,593 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [78851431] [2019-12-07 10:44:34,593 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:44:34,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:44:34,837 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 56 proven. 13 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-12-07 10:44:34,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [78851431] [2019-12-07 10:44:34,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1711075357] [2019-12-07 10:44:34,838 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:44:34,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:44:34,898 INFO L264 TraceCheckSpWp]: Trace formula consists of 413 conjuncts, 19 conjunts are in the unsatisfiable core [2019-12-07 10:44:34,899 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:44:34,963 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:44:35,095 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 35 proven. 23 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2019-12-07 10:44:35,096 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:44:35,096 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 9] total 20 [2019-12-07 10:44:35,096 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [5846735] [2019-12-07 10:44:35,096 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 10:44:35,096 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:44:35,097 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 10:44:35,097 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2019-12-07 10:44:35,097 INFO L87 Difference]: Start difference. First operand 38538 states and 46019 transitions. Second operand 21 states. [2019-12-07 10:44:44,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:44:44,634 INFO L93 Difference]: Finished difference Result 86323 states and 102647 transitions. [2019-12-07 10:44:44,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 10:44:44,634 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 104 [2019-12-07 10:44:44,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:44:44,695 INFO L225 Difference]: With dead ends: 86323 [2019-12-07 10:44:44,695 INFO L226 Difference]: Without dead ends: 71452 [2019-12-07 10:44:44,708 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 96 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 335 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=396, Invalid=1164, Unknown=0, NotChecked=0, Total=1560 [2019-12-07 10:44:44,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71452 states. [2019-12-07 10:44:51,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71452 to 54453. [2019-12-07 10:44:51,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54453 states. [2019-12-07 10:44:51,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54453 states to 54453 states and 64852 transitions. [2019-12-07 10:44:51,255 INFO L78 Accepts]: Start accepts. Automaton has 54453 states and 64852 transitions. Word has length 104 [2019-12-07 10:44:51,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:44:51,255 INFO L462 AbstractCegarLoop]: Abstraction has 54453 states and 64852 transitions. [2019-12-07 10:44:51,255 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 10:44:51,255 INFO L276 IsEmpty]: Start isEmpty. Operand 54453 states and 64852 transitions. [2019-12-07 10:44:51,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-12-07 10:44:51,264 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:44:51,264 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:44:51,465 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:44:51,465 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:44:51,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:44:51,466 INFO L82 PathProgramCache]: Analyzing trace with hash -41072578, now seen corresponding path program 2 times [2019-12-07 10:44:51,466 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:44:51,466 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1549156691] [2019-12-07 10:44:51,466 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:44:51,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:44:51,510 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 66 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2019-12-07 10:44:51,511 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1549156691] [2019-12-07 10:44:51,511 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:44:51,511 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:44:51,511 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1374439285] [2019-12-07 10:44:51,511 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:44:51,511 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:44:51,511 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:44:51,511 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:44:51,512 INFO L87 Difference]: Start difference. First operand 54453 states and 64852 transitions. Second operand 3 states. [2019-12-07 10:44:54,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:44:54,667 INFO L93 Difference]: Finished difference Result 80712 states and 96381 transitions. [2019-12-07 10:44:54,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:44:54,668 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 105 [2019-12-07 10:44:54,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:44:54,688 INFO L225 Difference]: With dead ends: 80712 [2019-12-07 10:44:54,689 INFO L226 Difference]: Without dead ends: 26311 [2019-12-07 10:44:54,708 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:44:54,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26311 states. [2019-12-07 10:44:57,621 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26311 to 24101. [2019-12-07 10:44:57,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24101 states. [2019-12-07 10:44:57,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24101 states to 24101 states and 28395 transitions. [2019-12-07 10:44:57,640 INFO L78 Accepts]: Start accepts. Automaton has 24101 states and 28395 transitions. Word has length 105 [2019-12-07 10:44:57,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:44:57,640 INFO L462 AbstractCegarLoop]: Abstraction has 24101 states and 28395 transitions. [2019-12-07 10:44:57,640 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:44:57,640 INFO L276 IsEmpty]: Start isEmpty. Operand 24101 states and 28395 transitions. [2019-12-07 10:44:57,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2019-12-07 10:44:57,644 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:44:57,645 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:44:57,645 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:44:57,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:44:57,645 INFO L82 PathProgramCache]: Analyzing trace with hash 2112863779, now seen corresponding path program 1 times [2019-12-07 10:44:57,645 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:44:57,645 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1207777909] [2019-12-07 10:44:57,645 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:44:57,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:44:57,716 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 9 proven. 67 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2019-12-07 10:44:57,716 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1207777909] [2019-12-07 10:44:57,716 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1619887364] [2019-12-07 10:44:57,716 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:44:57,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:44:57,776 INFO L264 TraceCheckSpWp]: Trace formula consists of 419 conjuncts, 22 conjunts are in the unsatisfiable core [2019-12-07 10:44:57,777 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:44:57,829 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:44:58,216 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 52 proven. 33 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-12-07 10:44:58,216 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:44:58,216 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 11] total 14 [2019-12-07 10:44:58,216 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [468663581] [2019-12-07 10:44:58,217 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 10:44:58,217 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:44:58,217 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 10:44:58,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2019-12-07 10:44:58,217 INFO L87 Difference]: Start difference. First operand 24101 states and 28395 transitions. Second operand 14 states. [2019-12-07 10:44:59,264 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 61 [2019-12-07 10:44:59,978 WARN L192 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 61 [2019-12-07 10:45:00,128 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 67 [2019-12-07 10:45:00,360 WARN L192 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 65 [2019-12-07 10:45:00,587 WARN L192 SmtUtils]: Spent 194.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 71 [2019-12-07 10:45:00,863 WARN L192 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 62 [2019-12-07 10:45:01,298 WARN L192 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 62 [2019-12-07 10:45:01,693 WARN L192 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 55 [2019-12-07 10:45:01,825 WARN L192 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 61 [2019-12-07 10:45:02,525 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 55 [2019-12-07 10:45:03,959 WARN L192 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 61 [2019-12-07 10:45:04,202 WARN L192 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 65 [2019-12-07 10:45:07,288 WARN L192 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 58 [2019-12-07 10:45:07,548 WARN L192 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 62 [2019-12-07 10:45:07,809 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 53 [2019-12-07 10:45:11,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:45:11,106 INFO L93 Difference]: Finished difference Result 65778 states and 77798 transitions. [2019-12-07 10:45:11,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2019-12-07 10:45:11,107 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 106 [2019-12-07 10:45:11,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:45:11,143 INFO L225 Difference]: With dead ends: 65778 [2019-12-07 10:45:11,143 INFO L226 Difference]: Without dead ends: 47608 [2019-12-07 10:45:11,155 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 93 SyntacticMatches, 6 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2298 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=1112, Invalid=5208, Unknown=0, NotChecked=0, Total=6320 [2019-12-07 10:45:11,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47608 states. [2019-12-07 10:45:16,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47608 to 40342. [2019-12-07 10:45:16,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40342 states. [2019-12-07 10:45:16,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40342 states to 40342 states and 46976 transitions. [2019-12-07 10:45:16,195 INFO L78 Accepts]: Start accepts. Automaton has 40342 states and 46976 transitions. Word has length 106 [2019-12-07 10:45:16,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:45:16,195 INFO L462 AbstractCegarLoop]: Abstraction has 40342 states and 46976 transitions. [2019-12-07 10:45:16,196 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 10:45:16,196 INFO L276 IsEmpty]: Start isEmpty. Operand 40342 states and 46976 transitions. [2019-12-07 10:45:16,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2019-12-07 10:45:16,201 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:45:16,201 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:45:16,402 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:45:16,403 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:45:16,403 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:45:16,404 INFO L82 PathProgramCache]: Analyzing trace with hash -1674846445, now seen corresponding path program 1 times [2019-12-07 10:45:16,404 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:45:16,404 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2119001682] [2019-12-07 10:45:16,404 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:45:16,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:45:16,597 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 24 proven. 67 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:45:16,598 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2119001682] [2019-12-07 10:45:16,598 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1321706475] [2019-12-07 10:45:16,598 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:45:16,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:45:16,657 INFO L264 TraceCheckSpWp]: Trace formula consists of 445 conjuncts, 17 conjunts are in the unsatisfiable core [2019-12-07 10:45:16,658 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:45:16,707 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:45:16,728 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:45:16,750 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:45:16,799 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:45:16,943 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 55 proven. 32 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 10:45:16,943 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:45:16,943 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12] total 22 [2019-12-07 10:45:16,943 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [596278780] [2019-12-07 10:45:16,944 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 10:45:16,944 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:45:16,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 10:45:16,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=411, Unknown=0, NotChecked=0, Total=462 [2019-12-07 10:45:16,944 INFO L87 Difference]: Start difference. First operand 40342 states and 46976 transitions. Second operand 22 states. [2019-12-07 10:45:33,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:45:33,038 INFO L93 Difference]: Finished difference Result 81906 states and 95358 transitions. [2019-12-07 10:45:33,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 81 states. [2019-12-07 10:45:33,039 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 117 [2019-12-07 10:45:33,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:45:33,090 INFO L225 Difference]: With dead ends: 81906 [2019-12-07 10:45:33,090 INFO L226 Difference]: Without dead ends: 61596 [2019-12-07 10:45:33,102 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 106 SyntacticMatches, 1 SemanticMatches, 99 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2783 ImplicationChecksByTransitivity, 5.7s TimeCoverageRelationStatistics Valid=1814, Invalid=8286, Unknown=0, NotChecked=0, Total=10100 [2019-12-07 10:45:33,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61596 states. [2019-12-07 10:45:37,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61596 to 35453. [2019-12-07 10:45:37,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35453 states. [2019-12-07 10:45:37,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35453 states to 35453 states and 40862 transitions. [2019-12-07 10:45:37,970 INFO L78 Accepts]: Start accepts. Automaton has 35453 states and 40862 transitions. Word has length 117 [2019-12-07 10:45:37,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:45:37,971 INFO L462 AbstractCegarLoop]: Abstraction has 35453 states and 40862 transitions. [2019-12-07 10:45:37,971 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 10:45:37,971 INFO L276 IsEmpty]: Start isEmpty. Operand 35453 states and 40862 transitions. [2019-12-07 10:45:37,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2019-12-07 10:45:37,974 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:45:37,974 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:45:38,175 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:45:38,175 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:45:38,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:45:38,176 INFO L82 PathProgramCache]: Analyzing trace with hash -1442700781, now seen corresponding path program 1 times [2019-12-07 10:45:38,176 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:45:38,176 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1936212601] [2019-12-07 10:45:38,177 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:45:38,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:45:38,210 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 81 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2019-12-07 10:45:38,210 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1936212601] [2019-12-07 10:45:38,210 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:45:38,210 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:45:38,210 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [648621526] [2019-12-07 10:45:38,211 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:45:38,211 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:45:38,211 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:45:38,211 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:45:38,211 INFO L87 Difference]: Start difference. First operand 35453 states and 40862 transitions. Second operand 3 states. [2019-12-07 10:45:39,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:45:39,898 INFO L93 Difference]: Finished difference Result 47092 states and 54301 transitions. [2019-12-07 10:45:39,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:45:39,898 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 118 [2019-12-07 10:45:39,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:45:39,906 INFO L225 Difference]: With dead ends: 47092 [2019-12-07 10:45:39,906 INFO L226 Difference]: Without dead ends: 11707 [2019-12-07 10:45:39,917 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:45:39,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11707 states. [2019-12-07 10:45:41,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11707 to 11045. [2019-12-07 10:45:41,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11045 states. [2019-12-07 10:45:41,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11045 states to 11045 states and 12564 transitions. [2019-12-07 10:45:41,488 INFO L78 Accepts]: Start accepts. Automaton has 11045 states and 12564 transitions. Word has length 118 [2019-12-07 10:45:41,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:45:41,488 INFO L462 AbstractCegarLoop]: Abstraction has 11045 states and 12564 transitions. [2019-12-07 10:45:41,488 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:45:41,488 INFO L276 IsEmpty]: Start isEmpty. Operand 11045 states and 12564 transitions. [2019-12-07 10:45:41,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2019-12-07 10:45:41,490 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:45:41,490 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:45:41,490 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:45:41,490 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:45:41,490 INFO L82 PathProgramCache]: Analyzing trace with hash -1989910784, now seen corresponding path program 1 times [2019-12-07 10:45:41,490 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:45:41,490 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [347385219] [2019-12-07 10:45:41,490 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:45:41,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:45:41,713 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 52 proven. 36 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 10:45:41,714 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [347385219] [2019-12-07 10:45:41,714 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [329008341] [2019-12-07 10:45:41,714 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:45:41,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:45:41,769 INFO L264 TraceCheckSpWp]: Trace formula consists of 448 conjuncts, 13 conjunts are in the unsatisfiable core [2019-12-07 10:45:41,770 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:45:41,822 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:45:41,844 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:45:41,867 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:45:41,917 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:45:41,917 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:45:41,917 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:45:42,063 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 56 proven. 32 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 10:45:42,063 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:45:42,063 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12] total 24 [2019-12-07 10:45:42,063 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [259518428] [2019-12-07 10:45:42,063 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 10:45:42,063 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:45:42,064 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 10:45:42,064 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=482, Unknown=0, NotChecked=0, Total=552 [2019-12-07 10:45:42,064 INFO L87 Difference]: Start difference. First operand 11045 states and 12564 transitions. Second operand 24 states. [2019-12-07 10:45:46,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:45:46,025 INFO L93 Difference]: Finished difference Result 21890 states and 25015 transitions. [2019-12-07 10:45:46,026 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 10:45:46,026 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 118 [2019-12-07 10:45:46,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:45:46,037 INFO L225 Difference]: With dead ends: 21890 [2019-12-07 10:45:46,037 INFO L226 Difference]: Without dead ends: 18176 [2019-12-07 10:45:46,039 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 307 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=282, Invalid=1610, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 10:45:46,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18176 states. [2019-12-07 10:45:47,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18176 to 13360. [2019-12-07 10:45:47,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13360 states. [2019-12-07 10:45:47,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13360 states to 13360 states and 15164 transitions. [2019-12-07 10:45:47,948 INFO L78 Accepts]: Start accepts. Automaton has 13360 states and 15164 transitions. Word has length 118 [2019-12-07 10:45:47,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:45:47,948 INFO L462 AbstractCegarLoop]: Abstraction has 13360 states and 15164 transitions. [2019-12-07 10:45:47,948 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 10:45:47,948 INFO L276 IsEmpty]: Start isEmpty. Operand 13360 states and 15164 transitions. [2019-12-07 10:45:47,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2019-12-07 10:45:47,949 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:45:47,950 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:45:48,150 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:45:48,150 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:45:48,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:45:48,151 INFO L82 PathProgramCache]: Analyzing trace with hash 1120663307, now seen corresponding path program 2 times [2019-12-07 10:45:48,151 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:45:48,151 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1846590723] [2019-12-07 10:45:48,152 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:45:48,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:45:48,782 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 16 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:45:48,783 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1846590723] [2019-12-07 10:45:48,783 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [492742764] [2019-12-07 10:45:48,783 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:45:48,842 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 10:45:48,842 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 10:45:48,843 INFO L264 TraceCheckSpWp]: Trace formula consists of 450 conjuncts, 29 conjunts are in the unsatisfiable core [2019-12-07 10:45:48,845 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:45:49,193 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 54 proven. 2 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2019-12-07 10:45:49,193 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:45:49,193 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 12] total 29 [2019-12-07 10:45:49,193 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1522314226] [2019-12-07 10:45:49,194 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2019-12-07 10:45:49,194 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:45:49,194 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2019-12-07 10:45:49,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=721, Unknown=0, NotChecked=0, Total=812 [2019-12-07 10:45:49,194 INFO L87 Difference]: Start difference. First operand 13360 states and 15164 transitions. Second operand 29 states. [2019-12-07 10:45:52,799 WARN L192 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 64 [2019-12-07 10:45:53,036 WARN L192 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 61 [2019-12-07 10:45:53,202 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 69 [2019-12-07 10:45:53,367 WARN L192 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 66 [2019-12-07 10:45:53,970 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 61 [2019-12-07 10:45:54,905 WARN L192 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 66 [2019-12-07 10:45:55,129 WARN L192 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 70 [2019-12-07 10:45:55,335 WARN L192 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 70 [2019-12-07 10:45:55,503 WARN L192 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 63 [2019-12-07 10:45:55,653 WARN L192 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 65 [2019-12-07 10:45:55,974 WARN L192 SmtUtils]: Spent 264.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 75 [2019-12-07 10:45:56,722 WARN L192 SmtUtils]: Spent 480.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 56 [2019-12-07 10:45:56,947 WARN L192 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 75 [2019-12-07 10:45:57,189 WARN L192 SmtUtils]: Spent 199.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 62 [2019-12-07 10:45:57,440 WARN L192 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 41 [2019-12-07 10:45:57,999 WARN L192 SmtUtils]: Spent 306.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 61 [2019-12-07 10:45:58,468 WARN L192 SmtUtils]: Spent 345.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 56 [2019-12-07 10:45:58,735 WARN L192 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 46 [2019-12-07 10:45:59,161 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 61 [2019-12-07 10:46:00,202 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 72 [2019-12-07 10:46:00,426 WARN L192 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 65 [2019-12-07 10:46:00,657 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 71 [2019-12-07 10:46:01,273 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 55 [2019-12-07 10:46:01,616 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 67 [2019-12-07 10:46:01,855 WARN L192 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 62 [2019-12-07 10:46:02,153 WARN L192 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 68 [2019-12-07 10:46:02,504 WARN L192 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 68 [2019-12-07 10:46:03,358 WARN L192 SmtUtils]: Spent 241.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 47 [2019-12-07 10:46:03,712 WARN L192 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 65 [2019-12-07 10:46:04,040 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 68 [2019-12-07 10:46:04,544 WARN L192 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 62 [2019-12-07 10:46:05,525 WARN L192 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 55 [2019-12-07 10:46:05,843 WARN L192 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 38 [2019-12-07 10:46:06,049 WARN L192 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 41 [2019-12-07 10:46:06,444 WARN L192 SmtUtils]: Spent 174.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 53 [2019-12-07 10:46:06,713 WARN L192 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 36 [2019-12-07 10:46:07,768 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 67 [2019-12-07 10:46:08,182 WARN L192 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 72 [2019-12-07 10:46:08,912 WARN L192 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 69 [2019-12-07 10:46:09,215 WARN L192 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 68 [2019-12-07 10:46:09,589 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 67 [2019-12-07 10:46:09,774 WARN L192 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 64 [2019-12-07 10:46:10,054 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 72 [2019-12-07 10:46:10,354 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 69 [2019-12-07 10:46:11,215 WARN L192 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 72 [2019-12-07 10:46:11,519 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 71 [2019-12-07 10:46:11,702 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 69 [2019-12-07 10:46:11,968 WARN L192 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 68 [2019-12-07 10:46:12,198 WARN L192 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 65 [2019-12-07 10:46:12,501 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 65 [2019-12-07 10:46:13,162 WARN L192 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 65 [2019-12-07 10:46:14,995 WARN L192 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 67 [2019-12-07 10:46:15,248 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 72 [2019-12-07 10:46:15,493 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 66 [2019-12-07 10:46:16,672 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 69 [2019-12-07 10:46:16,915 WARN L192 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 68 [2019-12-07 10:46:19,083 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 64 [2019-12-07 10:46:19,288 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 69 [2019-12-07 10:46:19,829 WARN L192 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 66 [2019-12-07 10:46:20,025 WARN L192 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 65 [2019-12-07 10:46:20,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:46:20,942 INFO L93 Difference]: Finished difference Result 33924 states and 38472 transitions. [2019-12-07 10:46:20,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 208 states. [2019-12-07 10:46:20,942 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 119 [2019-12-07 10:46:20,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:46:20,960 INFO L225 Difference]: With dead ends: 33924 [2019-12-07 10:46:20,960 INFO L226 Difference]: Without dead ends: 29428 [2019-12-07 10:46:20,965 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 341 GetRequests, 110 SyntacticMatches, 1 SemanticMatches, 230 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20819 ImplicationChecksByTransitivity, 23.8s TimeCoverageRelationStatistics Valid=5784, Invalid=47808, Unknown=0, NotChecked=0, Total=53592 [2019-12-07 10:46:20,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29428 states. [2019-12-07 10:46:23,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29428 to 15032. [2019-12-07 10:46:23,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15032 states. [2019-12-07 10:46:23,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15032 states to 15032 states and 17076 transitions. [2019-12-07 10:46:23,331 INFO L78 Accepts]: Start accepts. Automaton has 15032 states and 17076 transitions. Word has length 119 [2019-12-07 10:46:23,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:46:23,331 INFO L462 AbstractCegarLoop]: Abstraction has 15032 states and 17076 transitions. [2019-12-07 10:46:23,331 INFO L463 AbstractCegarLoop]: Interpolant automaton has 29 states. [2019-12-07 10:46:23,331 INFO L276 IsEmpty]: Start isEmpty. Operand 15032 states and 17076 transitions. [2019-12-07 10:46:23,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2019-12-07 10:46:23,333 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:46:23,333 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:46:23,533 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:46:23,533 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:46:23,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:46:23,534 INFO L82 PathProgramCache]: Analyzing trace with hash -597801272, now seen corresponding path program 1 times [2019-12-07 10:46:23,534 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:46:23,535 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1072478555] [2019-12-07 10:46:23,535 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:46:23,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:46:23,828 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 37 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:46:23,829 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1072478555] [2019-12-07 10:46:23,829 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [501055002] [2019-12-07 10:46:23,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:46:23,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:46:23,890 INFO L264 TraceCheckSpWp]: Trace formula consists of 452 conjuncts, 42 conjunts are in the unsatisfiable core [2019-12-07 10:46:23,892 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:46:24,158 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:46:24,199 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:46:24,242 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:46:24,598 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:46:24,949 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 37 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:46:24,949 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:46:24,949 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 22] total 38 [2019-12-07 10:46:24,949 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1172537755] [2019-12-07 10:46:24,950 INFO L442 AbstractCegarLoop]: Interpolant automaton has 38 states [2019-12-07 10:46:24,950 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:46:24,950 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2019-12-07 10:46:24,950 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=183, Invalid=1223, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 10:46:24,950 INFO L87 Difference]: Start difference. First operand 15032 states and 17076 transitions. Second operand 38 states. [2019-12-07 10:46:35,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:46:35,018 INFO L93 Difference]: Finished difference Result 25432 states and 28885 transitions. [2019-12-07 10:46:35,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2019-12-07 10:46:35,019 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 123 [2019-12-07 10:46:35,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:46:35,032 INFO L225 Difference]: With dead ends: 25432 [2019-12-07 10:46:35,032 INFO L226 Difference]: Without dead ends: 21629 [2019-12-07 10:46:35,035 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 183 GetRequests, 103 SyntacticMatches, 1 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1817 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=733, Invalid=5747, Unknown=0, NotChecked=0, Total=6480 [2019-12-07 10:46:35,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21629 states. [2019-12-07 10:46:37,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21629 to 18548. [2019-12-07 10:46:37,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18548 states. [2019-12-07 10:46:37,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18548 states to 18548 states and 21057 transitions. [2019-12-07 10:46:37,926 INFO L78 Accepts]: Start accepts. Automaton has 18548 states and 21057 transitions. Word has length 123 [2019-12-07 10:46:37,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:46:37,927 INFO L462 AbstractCegarLoop]: Abstraction has 18548 states and 21057 transitions. [2019-12-07 10:46:37,927 INFO L463 AbstractCegarLoop]: Interpolant automaton has 38 states. [2019-12-07 10:46:37,927 INFO L276 IsEmpty]: Start isEmpty. Operand 18548 states and 21057 transitions. [2019-12-07 10:46:37,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2019-12-07 10:46:37,928 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:46:37,928 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:46:38,129 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:46:38,130 INFO L410 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:46:38,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:46:38,131 INFO L82 PathProgramCache]: Analyzing trace with hash -714291388, now seen corresponding path program 1 times [2019-12-07 10:46:38,131 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:46:38,131 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [756897536] [2019-12-07 10:46:38,132 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:46:38,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:46:38,654 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 16 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:46:38,654 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [756897536] [2019-12-07 10:46:38,654 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1376605476] [2019-12-07 10:46:38,654 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:46:38,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:46:38,723 INFO L264 TraceCheckSpWp]: Trace formula consists of 452 conjuncts, 40 conjunts are in the unsatisfiable core [2019-12-07 10:46:38,725 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:46:38,957 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:46:39,406 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:46:39,776 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 27 proven. 70 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:46:39,776 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:46:39,776 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 23] total 41 [2019-12-07 10:46:39,776 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [15906344] [2019-12-07 10:46:39,776 INFO L442 AbstractCegarLoop]: Interpolant automaton has 41 states [2019-12-07 10:46:39,776 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:46:39,777 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2019-12-07 10:46:39,777 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=1520, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 10:46:39,777 INFO L87 Difference]: Start difference. First operand 18548 states and 21057 transitions. Second operand 41 states. [2019-12-07 10:46:46,432 WARN L192 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 45 [2019-12-07 10:46:52,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:46:52,124 INFO L93 Difference]: Finished difference Result 23572 states and 26750 transitions. [2019-12-07 10:46:52,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2019-12-07 10:46:52,125 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 123 [2019-12-07 10:46:52,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:46:52,136 INFO L225 Difference]: With dead ends: 23572 [2019-12-07 10:46:52,136 INFO L226 Difference]: Without dead ends: 18844 [2019-12-07 10:46:52,140 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 103 SyntacticMatches, 1 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1572 ImplicationChecksByTransitivity, 7.6s TimeCoverageRelationStatistics Valid=593, Invalid=7063, Unknown=0, NotChecked=0, Total=7656 [2019-12-07 10:46:52,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18844 states. [2019-12-07 10:46:54,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18844 to 17780. [2019-12-07 10:46:54,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17780 states. [2019-12-07 10:46:54,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17780 states to 17780 states and 20179 transitions. [2019-12-07 10:46:54,960 INFO L78 Accepts]: Start accepts. Automaton has 17780 states and 20179 transitions. Word has length 123 [2019-12-07 10:46:54,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:46:54,960 INFO L462 AbstractCegarLoop]: Abstraction has 17780 states and 20179 transitions. [2019-12-07 10:46:54,960 INFO L463 AbstractCegarLoop]: Interpolant automaton has 41 states. [2019-12-07 10:46:54,960 INFO L276 IsEmpty]: Start isEmpty. Operand 17780 states and 20179 transitions. [2019-12-07 10:46:54,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2019-12-07 10:46:54,962 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:46:54,962 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:46:55,162 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:46:55,163 INFO L410 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:46:55,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:46:55,164 INFO L82 PathProgramCache]: Analyzing trace with hash -1776651436, now seen corresponding path program 1 times [2019-12-07 10:46:55,164 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:46:55,165 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [493476369] [2019-12-07 10:46:55,165 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:46:55,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:46:55,531 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 36 proven. 61 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:46:55,531 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [493476369] [2019-12-07 10:46:55,531 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [469405551] [2019-12-07 10:46:55,531 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:46:55,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:46:55,595 INFO L264 TraceCheckSpWp]: Trace formula consists of 452 conjuncts, 31 conjunts are in the unsatisfiable core [2019-12-07 10:46:55,597 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 10:46:55,984 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:46:56,051 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:46:56,107 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:46:56,396 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 10:46:56,753 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 16 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:46:56,753 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 10:46:56,753 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 17] total 36 [2019-12-07 10:46:56,753 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1626128206] [2019-12-07 10:46:56,753 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2019-12-07 10:46:56,753 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:46:56,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2019-12-07 10:46:56,754 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=1161, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 10:46:56,754 INFO L87 Difference]: Start difference. First operand 17780 states and 20179 transitions. Second operand 36 states. [2019-12-07 10:46:56,954 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 71 [2019-12-07 10:46:58,412 WARN L192 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 49 [2019-12-07 10:47:05,009 WARN L192 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 47 [2019-12-07 10:47:20,520 WARN L192 SmtUtils]: Spent 231.00 ms on a formula simplification that was a NOOP. DAG size: 56 [2019-12-07 10:47:28,877 WARN L192 SmtUtils]: Spent 4.05 s on a formula simplification that was a NOOP. DAG size: 53 [2019-12-07 10:47:44,457 WARN L192 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 49 [2019-12-07 10:48:29,034 WARN L192 SmtUtils]: Spent 4.05 s on a formula simplification that was a NOOP. DAG size: 53 [2019-12-07 10:48:45,963 WARN L192 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 50 [2019-12-07 10:48:50,876 WARN L192 SmtUtils]: Spent 106.00 ms on a formula simplification that was a NOOP. DAG size: 51 [2019-12-07 10:48:54,613 WARN L192 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 43 [2019-12-07 10:48:57,237 WARN L192 SmtUtils]: Spent 2.05 s on a formula simplification that was a NOOP. DAG size: 50 [2019-12-07 10:49:14,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:14,633 INFO L93 Difference]: Finished difference Result 28989 states and 32777 transitions. [2019-12-07 10:49:14,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 85 states. [2019-12-07 10:49:14,634 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 123 [2019-12-07 10:49:14,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:14,648 INFO L225 Difference]: With dead ends: 28989 [2019-12-07 10:49:14,648 INFO L226 Difference]: Without dead ends: 23775 [2019-12-07 10:49:14,652 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 223 GetRequests, 101 SyntacticMatches, 8 SemanticMatches, 114 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3801 ImplicationChecksByTransitivity, 78.2s TimeCoverageRelationStatistics Valid=1168, Invalid=12150, Unknown=22, NotChecked=0, Total=13340 [2019-12-07 10:49:14,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23775 states. [2019-12-07 10:49:17,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23775 to 19684. [2019-12-07 10:49:17,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19684 states. [2019-12-07 10:49:17,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19684 states to 19684 states and 22299 transitions. [2019-12-07 10:49:17,861 INFO L78 Accepts]: Start accepts. Automaton has 19684 states and 22299 transitions. Word has length 123 [2019-12-07 10:49:17,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:17,862 INFO L462 AbstractCegarLoop]: Abstraction has 19684 states and 22299 transitions. [2019-12-07 10:49:17,862 INFO L463 AbstractCegarLoop]: Interpolant automaton has 36 states. [2019-12-07 10:49:17,862 INFO L276 IsEmpty]: Start isEmpty. Operand 19684 states and 22299 transitions. [2019-12-07 10:49:17,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2019-12-07 10:49:17,864 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:17,864 INFO L410 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:18,065 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 10:49:18,066 INFO L410 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:18,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:18,067 INFO L82 PathProgramCache]: Analyzing trace with hash -2044509292, now seen corresponding path program 1 times [2019-12-07 10:49:18,067 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:18,067 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1708945271] [2019-12-07 10:49:18,068 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:18,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:49:18,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:49:18,148 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 10:49:18,148 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 10:49:18,241 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 10:49:18 BoogieIcfgContainer [2019-12-07 10:49:18,241 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 10:49:18,242 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 10:49:18,242 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 10:49:18,242 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 10:49:18,242 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:41:34" (3/4) ... [2019-12-07 10:49:18,244 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 10:49:18,332 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_7e9092a5-34dd-4988-a13b-73e19c195b12/bin/uautomizer/witness.graphml [2019-12-07 10:49:18,333 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 10:49:18,333 INFO L168 Benchmark]: Toolchain (without parser) took 464003.94 ms. Allocated memory was 1.0 GB in the beginning and 3.2 GB in the end (delta: 2.2 GB). Free memory was 939.8 MB in the beginning and 1.6 GB in the end (delta: -680.4 MB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2019-12-07 10:49:18,334 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:49:18,334 INFO L168 Benchmark]: CACSL2BoogieTranslator took 228.39 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.4 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -150.4 MB). Peak memory consumption was 23.2 MB. Max. memory is 11.5 GB. [2019-12-07 10:49:18,334 INFO L168 Benchmark]: Boogie Procedure Inliner took 31.03 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.4 MB). Peak memory consumption was 6.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:49:18,334 INFO L168 Benchmark]: Boogie Preprocessor took 21.43 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:49:18,334 INFO L168 Benchmark]: RCFGBuilder took 300.05 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 38.0 MB). Peak memory consumption was 38.0 MB. Max. memory is 11.5 GB. [2019-12-07 10:49:18,334 INFO L168 Benchmark]: TraceAbstraction took 463328.63 ms. Allocated memory was 1.1 GB in the beginning and 3.2 GB in the end (delta: 2.1 GB). Free memory was 1.0 GB in the beginning and 1.7 GB in the end (delta: -636.2 MB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2019-12-07 10:49:18,335 INFO L168 Benchmark]: Witness Printer took 90.88 ms. Allocated memory is still 3.2 GB. Free memory was 1.7 GB in the beginning and 1.6 GB in the end (delta: 61.8 MB). Peak memory consumption was 61.8 MB. Max. memory is 11.5 GB. [2019-12-07 10:49:18,336 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 228.39 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.4 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -150.4 MB). Peak memory consumption was 23.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 31.03 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.4 MB). Peak memory consumption was 6.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 21.43 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 300.05 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 38.0 MB). Peak memory consumption was 38.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 463328.63 ms. Allocated memory was 1.1 GB in the beginning and 3.2 GB in the end (delta: 2.1 GB). Free memory was 1.0 GB in the beginning and 1.7 GB in the end (delta: -636.2 MB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. * Witness Printer took 90.88 ms. Allocated memory is still 3.2 GB. Free memory was 1.7 GB in the beginning and 1.6 GB in the end (delta: 61.8 MB). Peak memory consumption was 61.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 352]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L70] msg_t nomsg = (msg_t )-1; [L71] char r1 ; [L72] port_t p1 ; [L73] char p1_old ; [L74] char p1_new ; [L75] char id1 ; [L76] char st1 ; [L77] msg_t send1 ; [L78] _Bool mode1 ; [L79] _Bool alive1 ; [L80] port_t p2 ; [L81] char p2_old ; [L82] char p2_new ; [L83] char id2 ; [L84] char st2 ; [L85] msg_t send2 ; [L86] _Bool mode2 ; [L87] _Bool alive2 ; [L88] port_t p3 ; [L89] char p3_old ; [L90] char p3_new ; [L91] char id3 ; [L92] char st3 ; [L93] msg_t send3 ; [L94] _Bool mode3 ; [L95] _Bool alive3 ; [L196] void (*nodes[3])(void) = { & node1, & node2, & node3}; VAL [alive1=0, alive2=0, alive3=0, id1=0, id2=0, id3=0, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=0, send3=0, st1=0, st2=0, st3=0] [L296] int c1 ; [L297] int i2 ; [L300] c1 = 0 [L301] r1 = __VERIFIER_nondet_char() [L302] id1 = __VERIFIER_nondet_char() [L303] st1 = __VERIFIER_nondet_char() [L304] send1 = __VERIFIER_nondet_char() [L305] mode1 = __VERIFIER_nondet_bool() [L306] alive1 = __VERIFIER_nondet_bool() [L307] id2 = __VERIFIER_nondet_char() [L308] st2 = __VERIFIER_nondet_char() [L309] send2 = __VERIFIER_nondet_char() [L310] mode2 = __VERIFIER_nondet_bool() [L311] alive2 = __VERIFIER_nondet_bool() [L312] id3 = __VERIFIER_nondet_char() [L313] st3 = __VERIFIER_nondet_char() [L314] send3 = __VERIFIER_nondet_char() [L315] mode3 = __VERIFIER_nondet_bool() [L316] alive3 = __VERIFIER_nondet_bool() [L199] int tmp ; VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L202] COND TRUE (int )r1 == 0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L203] COND TRUE ((int )alive1 + (int )alive2) + (int )alive3 >= 1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L204] COND TRUE (int )id1 >= 0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L205] COND TRUE (int )st1 == 0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L206] COND TRUE (int )send1 == (int )id1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L207] COND TRUE (int )mode1 == 0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L208] COND TRUE (int )id2 >= 0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L209] COND TRUE (int )st2 == 0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L210] COND TRUE (int )send2 == (int )id2 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L211] COND TRUE (int )mode2 == 0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L212] COND TRUE (int )id3 >= 0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L213] COND TRUE (int )st3 == 0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L214] COND TRUE (int )send3 == (int )id3 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L215] COND TRUE (int )mode3 == 0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L216] COND TRUE (int )id1 != (int )id2 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L217] COND TRUE (int )id1 != (int )id3 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L218] COND TRUE (int )id2 != (int )id3 [L219] tmp = 1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L271] return (tmp); VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=0, p1_old=0, p2=0, p2_new=0, p2_old=0, p3=0, p3_new=0, p3_old=0, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L317] i2 = init() [L319] p1_old = nomsg [L320] p1_new = nomsg [L321] p2_old = nomsg [L322] p2_new = nomsg [L323] p3_old = nomsg [L324] p3_new = nomsg [L325] i2 = 0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L326] COND TRUE i2 < 6 [L98] msg_t m1 ; [L101] m1 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L102] COND FALSE !(\read(mode1)) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L120] COND FALSE !(\read(alive1)) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L123] mode1 = (_Bool)1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L130] msg_t m2 ; [L133] m2 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L134] COND FALSE !(\read(mode2)) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L151] COND FALSE !(\read(alive2)) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L154] COND FALSE !((int )send2 != (int )id2) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L157] mode2 = (_Bool)1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L164] msg_t m3 ; [L167] m3 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L168] COND FALSE !(\read(mode3)) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L185] COND TRUE \read(alive3) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L186] EXPR send3 != nomsg && p3_new == nomsg ? send3 : p3_new VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L186] p3_new = send3 != nomsg && p3_new == nomsg ? send3 : p3_new [L191] mode3 = (_Bool)1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=127, p3_old=-1, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L331] p1_old = p1_new [L332] p1_new = nomsg [L333] p2_old = p2_new [L334] p2_new = nomsg [L335] p3_old = p3_new [L336] p3_new = nomsg [L276] int tmp ; VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L279] COND TRUE ((int )st1 + (int )st2) + (int )st3 <= 1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L280] COND TRUE (int )r1 < 3 [L281] tmp = 1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L291] return (tmp); VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L337] c1 = check() [L350] COND FALSE !(! arg) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L339] i2 ++ VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L326] COND TRUE i2 < 6 [L98] msg_t m1 ; [L101] m1 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=0, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L102] COND TRUE \read(mode1) [L103] r1 = (char )((int )r1 + 1) [L104] m1 = p3_old [L105] p3_old = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L106] COND TRUE (int )m1 != (int )nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=0, send2=1, send3=127, st1=0, st2=0, st3=0] [L107] COND FALSE !(\read(alive1)) [L115] send1 = m1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L118] mode1 = (_Bool)0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L130] msg_t m2 ; [L133] m2 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L134] COND TRUE \read(mode2) [L135] m2 = p1_old [L136] p1_old = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L137] COND FALSE !((int )m2 != (int )nomsg) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L149] mode2 = (_Bool)0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L164] msg_t m3 ; [L167] m3 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L168] COND TRUE \read(mode3) [L169] m3 = p2_old [L170] p2_old = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L171] COND FALSE !((int )m3 != (int )nomsg) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L183] mode3 = (_Bool)0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L331] p1_old = p1_new [L332] p1_new = nomsg [L333] p2_old = p2_new [L334] p2_new = nomsg [L335] p3_old = p3_new [L336] p3_new = nomsg [L276] int tmp ; VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L279] COND TRUE ((int )st1 + (int )st2) + (int )st3 <= 1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L280] COND TRUE (int )r1 < 3 [L281] tmp = 1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L291] return (tmp); VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L337] c1 = check() [L350] COND FALSE !(! arg) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L339] i2 ++ VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L326] COND TRUE i2 < 6 [L98] msg_t m1 ; [L101] m1 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L102] COND FALSE !(\read(mode1)) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L120] COND FALSE !(\read(alive1)) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L123] mode1 = (_Bool)1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L130] msg_t m2 ; [L133] m2 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L134] COND FALSE !(\read(mode2)) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L151] COND FALSE !(\read(alive2)) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L154] COND FALSE !((int )send2 != (int )id2) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L157] mode2 = (_Bool)1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L164] msg_t m3 ; [L167] m3 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L168] COND FALSE !(\read(mode3)) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L185] COND TRUE \read(alive3) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L186] EXPR send3 != nomsg && p3_new == nomsg ? send3 : p3_new VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L186] p3_new = send3 != nomsg && p3_new == nomsg ? send3 : p3_new [L191] mode3 = (_Bool)1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=127, p3_old=-1, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L331] p1_old = p1_new [L332] p1_new = nomsg [L333] p2_old = p2_new [L334] p2_new = nomsg [L335] p3_old = p3_new [L336] p3_new = nomsg [L276] int tmp ; VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L279] COND TRUE ((int )st1 + (int )st2) + (int )st3 <= 1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L280] COND TRUE (int )r1 < 3 [L281] tmp = 1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L291] return (tmp); VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L337] c1 = check() [L350] COND FALSE !(! arg) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L339] i2 ++ VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L326] COND TRUE i2 < 6 [L98] msg_t m1 ; [L101] m1 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=1, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L102] COND TRUE \read(mode1) [L103] r1 = (char )((int )r1 + 1) [L104] m1 = p3_old [L105] p3_old = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L106] COND TRUE (int )m1 != (int )nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L107] COND FALSE !(\read(alive1)) [L115] send1 = m1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L118] mode1 = (_Bool)0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L130] msg_t m2 ; [L133] m2 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L134] COND TRUE \read(mode2) [L135] m2 = p1_old [L136] p1_old = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L137] COND FALSE !((int )m2 != (int )nomsg) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L149] mode2 = (_Bool)0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L164] msg_t m3 ; [L167] m3 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L168] COND TRUE \read(mode3) [L169] m3 = p2_old [L170] p2_old = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L171] COND FALSE !((int )m3 != (int )nomsg) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L183] mode3 = (_Bool)0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L331] p1_old = p1_new [L332] p1_new = nomsg [L333] p2_old = p2_new [L334] p2_new = nomsg [L335] p3_old = p3_new [L336] p3_new = nomsg [L276] int tmp ; VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L279] COND TRUE ((int )st1 + (int )st2) + (int )st3 <= 1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L280] COND TRUE (int )r1 < 3 [L281] tmp = 1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L291] return (tmp); VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L337] c1 = check() [L350] COND FALSE !(! arg) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L339] i2 ++ VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L326] COND TRUE i2 < 6 [L98] msg_t m1 ; [L101] m1 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L102] COND FALSE !(\read(mode1)) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L120] COND FALSE !(\read(alive1)) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L123] mode1 = (_Bool)1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L130] msg_t m2 ; [L133] m2 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L134] COND FALSE !(\read(mode2)) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L151] COND FALSE !(\read(alive2)) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L154] COND FALSE !((int )send2 != (int )id2) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L157] mode2 = (_Bool)1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L164] msg_t m3 ; [L167] m3 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L168] COND FALSE !(\read(mode3)) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L185] COND TRUE \read(alive3) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L186] EXPR send3 != nomsg && p3_new == nomsg ? send3 : p3_new VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L186] p3_new = send3 != nomsg && p3_new == nomsg ? send3 : p3_new [L191] mode3 = (_Bool)1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=127, p3_old=-1, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L331] p1_old = p1_new [L332] p1_new = nomsg [L333] p2_old = p2_new [L334] p2_new = nomsg [L335] p3_old = p3_new [L336] p3_new = nomsg [L276] int tmp ; VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L279] COND TRUE ((int )st1 + (int )st2) + (int )st3 <= 1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L280] COND TRUE (int )r1 < 3 [L281] tmp = 1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L291] return (tmp); VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L337] c1 = check() [L350] COND FALSE !(! arg) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L339] i2 ++ VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L326] COND TRUE i2 < 6 [L98] msg_t m1 ; [L101] m1 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=127, r1=2, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L102] COND TRUE \read(mode1) [L103] r1 = (char )((int )r1 + 1) [L104] m1 = p3_old [L105] p3_old = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L106] COND TRUE (int )m1 != (int )nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L107] COND FALSE !(\read(alive1)) [L115] send1 = m1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=1, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L118] mode1 = (_Bool)0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L130] msg_t m2 ; [L133] m2 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L134] COND TRUE \read(mode2) [L135] m2 = p1_old [L136] p1_old = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L137] COND FALSE !((int )m2 != (int )nomsg) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=1, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L149] mode2 = (_Bool)0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L164] msg_t m3 ; [L167] m3 = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L168] COND TRUE \read(mode3) [L169] m3 = p2_old [L170] p2_old = nomsg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L171] COND FALSE !((int )m3 != (int )nomsg) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=1, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L183] mode3 = (_Bool)0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L331] p1_old = p1_new [L332] p1_new = nomsg [L333] p2_old = p2_new [L334] p2_new = nomsg [L335] p3_old = p3_new [L336] p3_new = nomsg [L276] int tmp ; VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L279] COND TRUE ((int )st1 + (int )st2) + (int )st3 <= 1 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L280] COND FALSE !((int )r1 < 3) VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L283] COND FALSE !(((int )st1 + (int )st2) + (int )st3 == 1) [L286] tmp = 0 VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L291] return (tmp); VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L337] c1 = check() [L350] COND TRUE ! arg VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] [L352] __VERIFIER_error() VAL [alive1=0, alive2=0, alive3=1, id1=0, id2=1, id3=127, mode1=0, mode2=0, mode3=0, nomsg=-1, p1=0, p1_new=-1, p1_old=-1, p2=0, p2_new=-1, p2_old=-1, p3=0, p3_new=-1, p3_old=-1, r1=3, send1=127, send2=1, send3=127, st1=0, st2=0, st3=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 74 locations, 1 error locations. Result: UNSAFE, OverallTime: 463.1s, OverallIterations: 39, TraceHistogramMax: 6, AutomataDifference: 375.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6505 SDtfs, 35870 SDslu, 61492 SDs, 0 SdLazy, 27910 SolverSat, 1918 SolverUnsat, 27 SolverUnknown, 0 SolverNotchecked, 83.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2835 GetRequests, 1332 SyntacticMatches, 35 SemanticMatches, 1468 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87314 ImplicationChecksByTransitivity, 191.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=54453occurred in iteration=29, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 70.1s AutomataMinimizationTime, 38 MinimizatonAttempts, 376647 StatesRemovedByMinimization, 37 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 0.9s SatisfiabilityAnalysisTime, 11.8s InterpolantComputationTime, 4438 NumberOfCodeBlocks, 4438 NumberOfCodeBlocksAsserted, 56 NumberOfCheckSat, 4236 ConstructedInterpolants, 326 QuantifiedInterpolants, 5032398 SizeOfPredicates, 83 NumberOfNonLiveVariables, 5895 ConjunctsInSsa, 365 ConjunctsInUnsatCore, 54 InterpolantComputations, 22 PerfectInterpolantSequences, 1137/2016 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...