./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/podwr001_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_93bbe1d8-0240-4a43-b740-a96277c5aa80/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_93bbe1d8-0240-4a43-b740-a96277c5aa80/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_93bbe1d8-0240-4a43-b740-a96277c5aa80/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_93bbe1d8-0240-4a43-b740-a96277c5aa80/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/podwr001_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_93bbe1d8-0240-4a43-b740-a96277c5aa80/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_93bbe1d8-0240-4a43-b740-a96277c5aa80/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e8f00a70cd0a3210e80946e3d8849dcfa54ea930 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:30:44,915 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:30:44,916 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:30:44,924 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:30:44,924 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:30:44,925 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:30:44,926 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:30:44,928 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:30:44,929 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:30:44,930 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:30:44,931 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:30:44,932 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:30:44,932 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:30:44,933 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:30:44,934 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:30:44,935 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:30:44,936 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:30:44,937 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:30:44,938 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:30:44,940 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:30:44,942 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:30:44,943 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:30:44,944 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:30:44,944 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:30:44,947 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:30:44,947 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:30:44,947 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:30:44,948 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:30:44,948 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:30:44,949 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:30:44,949 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:30:44,949 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:30:44,950 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:30:44,950 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:30:44,951 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:30:44,951 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:30:44,952 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:30:44,952 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:30:44,952 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:30:44,953 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:30:44,953 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:30:44,954 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_93bbe1d8-0240-4a43-b740-a96277c5aa80/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:30:44,965 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:30:44,965 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:30:44,966 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:30:44,966 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:30:44,966 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:30:44,966 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:30:44,966 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:30:44,966 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:30:44,967 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:30:44,967 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:30:44,967 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:30:44,967 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:30:44,967 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:30:44,967 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:30:44,967 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:30:44,968 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:30:44,968 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:30:44,968 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:30:44,968 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:30:44,968 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:30:44,968 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:30:44,968 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:30:44,968 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:30:44,969 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:30:44,969 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:30:44,969 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:30:44,969 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:30:44,969 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:30:44,969 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:30:44,969 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_93bbe1d8-0240-4a43-b740-a96277c5aa80/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e8f00a70cd0a3210e80946e3d8849dcfa54ea930 [2019-12-07 18:30:45,081 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:30:45,091 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:30:45,094 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:30:45,096 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:30:45,096 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:30:45,096 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_93bbe1d8-0240-4a43-b740-a96277c5aa80/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/podwr001_pso.oepc.i [2019-12-07 18:30:45,142 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_93bbe1d8-0240-4a43-b740-a96277c5aa80/bin/uautomizer/data/aa1185ba4/8a6142ddb2b0433bb8cae20f8e59c5e7/FLAGc540fcc40 [2019-12-07 18:30:45,581 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:30:45,582 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_93bbe1d8-0240-4a43-b740-a96277c5aa80/sv-benchmarks/c/pthread-wmm/podwr001_pso.oepc.i [2019-12-07 18:30:45,592 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_93bbe1d8-0240-4a43-b740-a96277c5aa80/bin/uautomizer/data/aa1185ba4/8a6142ddb2b0433bb8cae20f8e59c5e7/FLAGc540fcc40 [2019-12-07 18:30:45,916 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_93bbe1d8-0240-4a43-b740-a96277c5aa80/bin/uautomizer/data/aa1185ba4/8a6142ddb2b0433bb8cae20f8e59c5e7 [2019-12-07 18:30:45,918 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:30:45,919 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:30:45,920 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:30:45,920 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:30:45,922 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:30:45,923 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:30:45" (1/1) ... [2019-12-07 18:30:45,925 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6f011315 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:45, skipping insertion in model container [2019-12-07 18:30:45,925 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:30:45" (1/1) ... [2019-12-07 18:30:45,930 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:30:45,956 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:30:46,209 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:30:46,217 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:30:46,256 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:30:46,301 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:30:46,301 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:46 WrapperNode [2019-12-07 18:30:46,301 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:30:46,302 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:30:46,302 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:30:46,302 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:30:46,307 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:46" (1/1) ... [2019-12-07 18:30:46,321 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:46" (1/1) ... [2019-12-07 18:30:46,338 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:30:46,339 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:30:46,339 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:30:46,339 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:30:46,345 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:46" (1/1) ... [2019-12-07 18:30:46,345 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:46" (1/1) ... [2019-12-07 18:30:46,348 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:46" (1/1) ... [2019-12-07 18:30:46,348 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:46" (1/1) ... [2019-12-07 18:30:46,355 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:46" (1/1) ... [2019-12-07 18:30:46,358 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:46" (1/1) ... [2019-12-07 18:30:46,360 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:46" (1/1) ... [2019-12-07 18:30:46,364 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:30:46,364 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:30:46,364 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:30:46,364 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:30:46,365 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:46" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93bbe1d8-0240-4a43-b740-a96277c5aa80/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:30:46,404 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:30:46,404 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:30:46,404 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:30:46,404 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:30:46,404 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:30:46,404 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:30:46,404 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:30:46,405 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:30:46,405 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:30:46,405 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:30:46,405 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:30:46,405 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:30:46,405 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:30:46,406 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:30:46,771 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:30:46,771 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:30:46,772 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:30:46 BoogieIcfgContainer [2019-12-07 18:30:46,772 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:30:46,773 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:30:46,773 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:30:46,775 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:30:46,775 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:30:45" (1/3) ... [2019-12-07 18:30:46,776 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1bd38e00 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:30:46, skipping insertion in model container [2019-12-07 18:30:46,776 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:46" (2/3) ... [2019-12-07 18:30:46,777 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1bd38e00 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:30:46, skipping insertion in model container [2019-12-07 18:30:46,777 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:30:46" (3/3) ... [2019-12-07 18:30:46,778 INFO L109 eAbstractionObserver]: Analyzing ICFG podwr001_pso.oepc.i [2019-12-07 18:30:46,785 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:30:46,785 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:30:46,790 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:30:46,790 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:30:46,817 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,817 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,817 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,818 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,818 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,818 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,818 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,818 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,819 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,819 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,819 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,819 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,819 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,820 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,820 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,820 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,820 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,820 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,821 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,821 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,821 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,821 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,821 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,821 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,822 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,822 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,822 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,822 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,822 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,823 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,823 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,823 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,823 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,823 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,824 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,824 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,824 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,824 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,825 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,825 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,825 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,825 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,825 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,826 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,826 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,826 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,826 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,826 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,826 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,826 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,827 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,827 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,827 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,827 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,827 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,828 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,828 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,828 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,828 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,828 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,829 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,829 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,829 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,829 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,830 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,830 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,830 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,830 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,830 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,831 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,831 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,831 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,831 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,831 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,831 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,832 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,832 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,832 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,832 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,832 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,832 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,833 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,833 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,833 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,833 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,833 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,834 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,834 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,834 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,834 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,834 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,834 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,834 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,835 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,835 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,835 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,835 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,835 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,836 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,836 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,836 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,836 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,836 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,836 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,837 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,837 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,837 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,837 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,837 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,837 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,837 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,838 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,838 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,838 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,838 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,838 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,838 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,839 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,839 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,839 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,839 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,839 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,839 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,841 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,841 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,841 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,841 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,841 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,842 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,842 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,842 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,842 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,842 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,842 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,842 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,843 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,843 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,843 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,843 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,843 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,843 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,844 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,844 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,844 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,844 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,844 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,844 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,844 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,845 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,845 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,845 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,845 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,845 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,845 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,846 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,846 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,846 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,846 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,846 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,846 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,846 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,847 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,847 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,847 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,847 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,847 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,847 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,847 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,848 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,848 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,848 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,848 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,848 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,848 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,848 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:46,859 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:30:46,871 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:30:46,871 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:30:46,871 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:30:46,871 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:30:46,871 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:30:46,872 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:30:46,872 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:30:46,872 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:30:46,882 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 18:30:46,884 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 18:30:46,939 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 18:30:46,939 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:30:46,949 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:30:46,965 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 18:30:46,993 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 18:30:46,993 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:30:46,999 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:30:47,015 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 18:30:47,015 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:30:49,931 WARN L192 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 18:30:50,215 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130045 [2019-12-07 18:30:50,216 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 18:30:50,218 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 18:31:09,245 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 126452 states. [2019-12-07 18:31:09,247 INFO L276 IsEmpty]: Start isEmpty. Operand 126452 states. [2019-12-07 18:31:09,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:31:09,251 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:31:09,251 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:31:09,252 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:31:09,255 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:31:09,255 INFO L82 PathProgramCache]: Analyzing trace with hash 913925, now seen corresponding path program 1 times [2019-12-07 18:31:09,261 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:31:09,261 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [344453362] [2019-12-07 18:31:09,261 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:31:09,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:31:09,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:31:09,393 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [344453362] [2019-12-07 18:31:09,394 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:31:09,394 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:31:09,395 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1938970553] [2019-12-07 18:31:09,397 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:31:09,398 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:31:09,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:31:09,407 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:31:09,408 INFO L87 Difference]: Start difference. First operand 126452 states. Second operand 3 states. [2019-12-07 18:31:10,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:31:10,262 INFO L93 Difference]: Finished difference Result 125570 states and 538788 transitions. [2019-12-07 18:31:10,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:31:10,264 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:31:10,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:31:10,720 INFO L225 Difference]: With dead ends: 125570 [2019-12-07 18:31:10,720 INFO L226 Difference]: Without dead ends: 111010 [2019-12-07 18:31:10,721 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:31:15,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111010 states. [2019-12-07 18:31:17,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111010 to 111010. [2019-12-07 18:31:17,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111010 states. [2019-12-07 18:31:18,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111010 states to 111010 states and 475060 transitions. [2019-12-07 18:31:18,203 INFO L78 Accepts]: Start accepts. Automaton has 111010 states and 475060 transitions. Word has length 3 [2019-12-07 18:31:18,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:31:18,204 INFO L462 AbstractCegarLoop]: Abstraction has 111010 states and 475060 transitions. [2019-12-07 18:31:18,204 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:31:18,204 INFO L276 IsEmpty]: Start isEmpty. Operand 111010 states and 475060 transitions. [2019-12-07 18:31:18,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:31:18,207 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:31:18,207 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:31:18,207 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:31:18,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:31:18,207 INFO L82 PathProgramCache]: Analyzing trace with hash -1753094800, now seen corresponding path program 1 times [2019-12-07 18:31:18,207 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:31:18,208 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [973336879] [2019-12-07 18:31:18,208 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:31:18,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:31:18,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:31:18,268 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [973336879] [2019-12-07 18:31:18,268 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:31:18,268 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:31:18,268 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [523727262] [2019-12-07 18:31:18,269 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:31:18,269 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:31:18,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:31:18,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:31:18,269 INFO L87 Difference]: Start difference. First operand 111010 states and 475060 transitions. Second operand 4 states. [2019-12-07 18:31:19,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:31:19,606 INFO L93 Difference]: Finished difference Result 172646 states and 710109 transitions. [2019-12-07 18:31:19,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:31:19,607 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:31:19,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:31:20,044 INFO L225 Difference]: With dead ends: 172646 [2019-12-07 18:31:20,044 INFO L226 Difference]: Without dead ends: 172548 [2019-12-07 18:31:20,044 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:31:27,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172548 states. [2019-12-07 18:31:29,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172548 to 158936. [2019-12-07 18:31:29,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158936 states. [2019-12-07 18:31:30,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158936 states to 158936 states and 661803 transitions. [2019-12-07 18:31:30,272 INFO L78 Accepts]: Start accepts. Automaton has 158936 states and 661803 transitions. Word has length 11 [2019-12-07 18:31:30,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:31:30,272 INFO L462 AbstractCegarLoop]: Abstraction has 158936 states and 661803 transitions. [2019-12-07 18:31:30,272 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:31:30,272 INFO L276 IsEmpty]: Start isEmpty. Operand 158936 states and 661803 transitions. [2019-12-07 18:31:30,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:31:30,276 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:31:30,276 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:31:30,277 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:31:30,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:31:30,277 INFO L82 PathProgramCache]: Analyzing trace with hash 216434073, now seen corresponding path program 1 times [2019-12-07 18:31:30,277 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:31:30,277 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1566033806] [2019-12-07 18:31:30,277 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:31:30,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:31:30,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:31:30,326 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1566033806] [2019-12-07 18:31:30,326 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:31:30,326 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:31:30,326 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1061973569] [2019-12-07 18:31:30,327 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:31:30,327 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:31:30,327 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:31:30,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:31:30,327 INFO L87 Difference]: Start difference. First operand 158936 states and 661803 transitions. Second operand 4 states. [2019-12-07 18:31:31,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:31:31,480 INFO L93 Difference]: Finished difference Result 228902 states and 931210 transitions. [2019-12-07 18:31:31,480 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:31:31,480 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:31:31,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:31:32,062 INFO L225 Difference]: With dead ends: 228902 [2019-12-07 18:31:32,062 INFO L226 Difference]: Without dead ends: 228790 [2019-12-07 18:31:32,062 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:31:38,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228790 states. [2019-12-07 18:31:43,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228790 to 192327. [2019-12-07 18:31:43,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192327 states. [2019-12-07 18:31:44,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192327 states to 192327 states and 796272 transitions. [2019-12-07 18:31:44,309 INFO L78 Accepts]: Start accepts. Automaton has 192327 states and 796272 transitions. Word has length 13 [2019-12-07 18:31:44,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:31:44,310 INFO L462 AbstractCegarLoop]: Abstraction has 192327 states and 796272 transitions. [2019-12-07 18:31:44,310 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:31:44,310 INFO L276 IsEmpty]: Start isEmpty. Operand 192327 states and 796272 transitions. [2019-12-07 18:31:44,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:31:44,317 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:31:44,317 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:31:44,317 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:31:44,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:31:44,318 INFO L82 PathProgramCache]: Analyzing trace with hash -1948590504, now seen corresponding path program 1 times [2019-12-07 18:31:44,318 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:31:44,318 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1860924685] [2019-12-07 18:31:44,318 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:31:44,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:31:44,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:31:44,346 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1860924685] [2019-12-07 18:31:44,346 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:31:44,346 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:31:44,346 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1142483451] [2019-12-07 18:31:44,347 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:31:44,347 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:31:44,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:31:44,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:31:44,347 INFO L87 Difference]: Start difference. First operand 192327 states and 796272 transitions. Second operand 3 states. [2019-12-07 18:31:45,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:31:45,948 INFO L93 Difference]: Finished difference Result 280788 states and 1158875 transitions. [2019-12-07 18:31:45,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:31:45,949 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 18:31:45,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:31:46,664 INFO L225 Difference]: With dead ends: 280788 [2019-12-07 18:31:46,664 INFO L226 Difference]: Without dead ends: 280788 [2019-12-07 18:31:46,664 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:31:53,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280788 states. [2019-12-07 18:31:57,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280788 to 222888. [2019-12-07 18:31:57,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222888 states. [2019-12-07 18:31:57,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222888 states to 222888 states and 926633 transitions. [2019-12-07 18:31:57,781 INFO L78 Accepts]: Start accepts. Automaton has 222888 states and 926633 transitions. Word has length 16 [2019-12-07 18:31:57,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:31:57,781 INFO L462 AbstractCegarLoop]: Abstraction has 222888 states and 926633 transitions. [2019-12-07 18:31:57,781 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:31:57,781 INFO L276 IsEmpty]: Start isEmpty. Operand 222888 states and 926633 transitions. [2019-12-07 18:31:57,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:31:57,787 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:31:57,788 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:31:57,788 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:31:57,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:31:57,788 INFO L82 PathProgramCache]: Analyzing trace with hash -1821591471, now seen corresponding path program 1 times [2019-12-07 18:31:57,788 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:31:57,788 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2049390392] [2019-12-07 18:31:57,788 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:31:57,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:31:57,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:31:57,832 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2049390392] [2019-12-07 18:31:57,832 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:31:57,832 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:31:57,832 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [339554945] [2019-12-07 18:31:57,832 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:31:57,833 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:31:57,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:31:57,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:31:57,833 INFO L87 Difference]: Start difference. First operand 222888 states and 926633 transitions. Second operand 5 states. [2019-12-07 18:31:59,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:31:59,863 INFO L93 Difference]: Finished difference Result 298473 states and 1226263 transitions. [2019-12-07 18:31:59,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:31:59,863 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 18:31:59,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:00,627 INFO L225 Difference]: With dead ends: 298473 [2019-12-07 18:32:00,628 INFO L226 Difference]: Without dead ends: 298473 [2019-12-07 18:32:00,628 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:32:11,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298473 states. [2019-12-07 18:32:14,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298473 to 237826. [2019-12-07 18:32:14,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237826 states. [2019-12-07 18:32:15,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237826 states to 237826 states and 988542 transitions. [2019-12-07 18:32:15,529 INFO L78 Accepts]: Start accepts. Automaton has 237826 states and 988542 transitions. Word has length 16 [2019-12-07 18:32:15,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:15,529 INFO L462 AbstractCegarLoop]: Abstraction has 237826 states and 988542 transitions. [2019-12-07 18:32:15,529 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:32:15,529 INFO L276 IsEmpty]: Start isEmpty. Operand 237826 states and 988542 transitions. [2019-12-07 18:32:15,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:32:15,543 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:15,543 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:15,543 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:15,543 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:15,543 INFO L82 PathProgramCache]: Analyzing trace with hash -504931817, now seen corresponding path program 1 times [2019-12-07 18:32:15,543 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:15,544 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1293080859] [2019-12-07 18:32:15,544 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:15,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:15,596 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:15,596 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1293080859] [2019-12-07 18:32:15,596 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:15,597 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:32:15,597 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [210742838] [2019-12-07 18:32:15,597 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:32:15,597 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:15,597 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:32:15,597 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:15,598 INFO L87 Difference]: Start difference. First operand 237826 states and 988542 transitions. Second operand 3 states. [2019-12-07 18:32:16,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:16,651 INFO L93 Difference]: Finished difference Result 237826 states and 978678 transitions. [2019-12-07 18:32:16,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:32:16,652 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:32:16,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:17,740 INFO L225 Difference]: With dead ends: 237826 [2019-12-07 18:32:17,740 INFO L226 Difference]: Without dead ends: 237826 [2019-12-07 18:32:17,741 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:24,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237826 states. [2019-12-07 18:32:27,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237826 to 234480. [2019-12-07 18:32:27,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234480 states. [2019-12-07 18:32:28,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234480 states to 234480 states and 966258 transitions. [2019-12-07 18:32:28,226 INFO L78 Accepts]: Start accepts. Automaton has 234480 states and 966258 transitions. Word has length 18 [2019-12-07 18:32:28,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:28,226 INFO L462 AbstractCegarLoop]: Abstraction has 234480 states and 966258 transitions. [2019-12-07 18:32:28,226 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:32:28,226 INFO L276 IsEmpty]: Start isEmpty. Operand 234480 states and 966258 transitions. [2019-12-07 18:32:28,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:32:28,236 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:28,236 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:28,236 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:28,236 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:28,236 INFO L82 PathProgramCache]: Analyzing trace with hash 138207619, now seen corresponding path program 1 times [2019-12-07 18:32:28,237 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:28,237 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [992745214] [2019-12-07 18:32:28,237 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:28,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:28,265 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:28,266 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [992745214] [2019-12-07 18:32:28,266 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:28,266 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:32:28,266 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1403169757] [2019-12-07 18:32:28,266 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:32:28,266 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:28,266 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:32:28,266 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:28,267 INFO L87 Difference]: Start difference. First operand 234480 states and 966258 transitions. Second operand 3 states. [2019-12-07 18:32:28,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:28,393 INFO L93 Difference]: Finished difference Result 42613 states and 138837 transitions. [2019-12-07 18:32:28,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:32:28,393 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:32:28,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:28,453 INFO L225 Difference]: With dead ends: 42613 [2019-12-07 18:32:28,453 INFO L226 Difference]: Without dead ends: 42613 [2019-12-07 18:32:28,453 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:28,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42613 states. [2019-12-07 18:32:29,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42613 to 42613. [2019-12-07 18:32:29,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42613 states. [2019-12-07 18:32:29,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42613 states to 42613 states and 138837 transitions. [2019-12-07 18:32:29,163 INFO L78 Accepts]: Start accepts. Automaton has 42613 states and 138837 transitions. Word has length 18 [2019-12-07 18:32:29,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:29,163 INFO L462 AbstractCegarLoop]: Abstraction has 42613 states and 138837 transitions. [2019-12-07 18:32:29,163 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:32:29,163 INFO L276 IsEmpty]: Start isEmpty. Operand 42613 states and 138837 transitions. [2019-12-07 18:32:29,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:32:29,169 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:29,169 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:29,169 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:29,169 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:29,169 INFO L82 PathProgramCache]: Analyzing trace with hash -187432510, now seen corresponding path program 1 times [2019-12-07 18:32:29,169 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:29,170 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1681620735] [2019-12-07 18:32:29,170 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:29,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:29,226 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:29,227 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1681620735] [2019-12-07 18:32:29,227 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:29,227 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:32:29,227 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1310769165] [2019-12-07 18:32:29,228 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:32:29,228 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:29,228 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:32:29,228 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:32:29,228 INFO L87 Difference]: Start difference. First operand 42613 states and 138837 transitions. Second operand 6 states. [2019-12-07 18:32:30,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:30,634 INFO L93 Difference]: Finished difference Result 65056 states and 205947 transitions. [2019-12-07 18:32:30,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:32:30,635 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 18:32:30,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:30,727 INFO L225 Difference]: With dead ends: 65056 [2019-12-07 18:32:30,727 INFO L226 Difference]: Without dead ends: 65042 [2019-12-07 18:32:30,728 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:32:31,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65042 states. [2019-12-07 18:32:31,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65042 to 42278. [2019-12-07 18:32:31,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42278 states. [2019-12-07 18:32:31,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42278 states to 42278 states and 137592 transitions. [2019-12-07 18:32:31,601 INFO L78 Accepts]: Start accepts. Automaton has 42278 states and 137592 transitions. Word has length 22 [2019-12-07 18:32:31,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:31,602 INFO L462 AbstractCegarLoop]: Abstraction has 42278 states and 137592 transitions. [2019-12-07 18:32:31,602 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:32:31,602 INFO L276 IsEmpty]: Start isEmpty. Operand 42278 states and 137592 transitions. [2019-12-07 18:32:31,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:32:31,611 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:31,611 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:31,612 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:31,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:31,612 INFO L82 PathProgramCache]: Analyzing trace with hash -200714255, now seen corresponding path program 1 times [2019-12-07 18:32:31,612 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:31,612 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1288585438] [2019-12-07 18:32:31,612 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:31,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:31,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:31,733 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1288585438] [2019-12-07 18:32:31,733 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:31,733 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:32:31,734 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1624905284] [2019-12-07 18:32:31,734 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:32:31,734 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:31,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:32:31,734 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:32:31,734 INFO L87 Difference]: Start difference. First operand 42278 states and 137592 transitions. Second operand 7 states. [2019-12-07 18:32:32,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:32,213 INFO L93 Difference]: Finished difference Result 59726 states and 189950 transitions. [2019-12-07 18:32:32,213 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:32:32,214 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 25 [2019-12-07 18:32:32,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:32,300 INFO L225 Difference]: With dead ends: 59726 [2019-12-07 18:32:32,300 INFO L226 Difference]: Without dead ends: 59700 [2019-12-07 18:32:32,301 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:32:32,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59700 states. [2019-12-07 18:32:33,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59700 to 50129. [2019-12-07 18:32:33,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50129 states. [2019-12-07 18:32:33,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50129 states to 50129 states and 162181 transitions. [2019-12-07 18:32:33,326 INFO L78 Accepts]: Start accepts. Automaton has 50129 states and 162181 transitions. Word has length 25 [2019-12-07 18:32:33,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:33,327 INFO L462 AbstractCegarLoop]: Abstraction has 50129 states and 162181 transitions. [2019-12-07 18:32:33,327 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:32:33,327 INFO L276 IsEmpty]: Start isEmpty. Operand 50129 states and 162181 transitions. [2019-12-07 18:32:33,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:32:33,342 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:33,342 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:33,342 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:33,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:33,342 INFO L82 PathProgramCache]: Analyzing trace with hash 611460705, now seen corresponding path program 1 times [2019-12-07 18:32:33,342 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:33,342 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [539342126] [2019-12-07 18:32:33,343 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:33,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:33,382 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:33,382 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [539342126] [2019-12-07 18:32:33,383 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:33,383 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:32:33,383 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1530613100] [2019-12-07 18:32:33,383 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:32:33,383 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:33,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:32:33,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:32:33,384 INFO L87 Difference]: Start difference. First operand 50129 states and 162181 transitions. Second operand 6 states. [2019-12-07 18:32:33,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:33,861 INFO L93 Difference]: Finished difference Result 71592 states and 224983 transitions. [2019-12-07 18:32:33,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:32:33,862 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 18:32:33,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:33,964 INFO L225 Difference]: With dead ends: 71592 [2019-12-07 18:32:33,964 INFO L226 Difference]: Without dead ends: 71508 [2019-12-07 18:32:33,965 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:32:34,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71508 states. [2019-12-07 18:32:34,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71508 to 53724. [2019-12-07 18:32:34,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53724 states. [2019-12-07 18:32:35,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53724 states to 53724 states and 172706 transitions. [2019-12-07 18:32:35,040 INFO L78 Accepts]: Start accepts. Automaton has 53724 states and 172706 transitions. Word has length 27 [2019-12-07 18:32:35,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:35,041 INFO L462 AbstractCegarLoop]: Abstraction has 53724 states and 172706 transitions. [2019-12-07 18:32:35,041 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:32:35,041 INFO L276 IsEmpty]: Start isEmpty. Operand 53724 states and 172706 transitions. [2019-12-07 18:32:35,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:32:35,061 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:35,061 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:35,061 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:35,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:35,061 INFO L82 PathProgramCache]: Analyzing trace with hash -969078927, now seen corresponding path program 1 times [2019-12-07 18:32:35,061 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:35,061 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [858202230] [2019-12-07 18:32:35,061 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:35,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:35,100 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:35,100 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [858202230] [2019-12-07 18:32:35,100 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:35,100 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:32:35,100 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [103480013] [2019-12-07 18:32:35,101 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:32:35,101 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:35,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:32:35,101 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:32:35,101 INFO L87 Difference]: Start difference. First operand 53724 states and 172706 transitions. Second operand 4 states. [2019-12-07 18:32:35,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:35,164 INFO L93 Difference]: Finished difference Result 20754 states and 64022 transitions. [2019-12-07 18:32:35,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:32:35,164 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 18:32:35,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:35,188 INFO L225 Difference]: With dead ends: 20754 [2019-12-07 18:32:35,188 INFO L226 Difference]: Without dead ends: 20754 [2019-12-07 18:32:35,188 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:32:35,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20754 states. [2019-12-07 18:32:35,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20754 to 19543. [2019-12-07 18:32:35,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19543 states. [2019-12-07 18:32:35,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19543 states to 19543 states and 60338 transitions. [2019-12-07 18:32:35,593 INFO L78 Accepts]: Start accepts. Automaton has 19543 states and 60338 transitions. Word has length 29 [2019-12-07 18:32:35,593 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:35,593 INFO L462 AbstractCegarLoop]: Abstraction has 19543 states and 60338 transitions. [2019-12-07 18:32:35,593 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:32:35,593 INFO L276 IsEmpty]: Start isEmpty. Operand 19543 states and 60338 transitions. [2019-12-07 18:32:35,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:32:35,611 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:35,611 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:35,611 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:35,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:35,611 INFO L82 PathProgramCache]: Analyzing trace with hash -1170391984, now seen corresponding path program 1 times [2019-12-07 18:32:35,611 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:35,611 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361265818] [2019-12-07 18:32:35,611 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:35,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:35,661 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:35,661 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361265818] [2019-12-07 18:32:35,662 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:35,662 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:32:35,662 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1179673367] [2019-12-07 18:32:35,662 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:32:35,662 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:35,662 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:32:35,662 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:32:35,662 INFO L87 Difference]: Start difference. First operand 19543 states and 60338 transitions. Second operand 7 states. [2019-12-07 18:32:36,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:36,382 INFO L93 Difference]: Finished difference Result 27225 states and 81337 transitions. [2019-12-07 18:32:36,382 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:32:36,383 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 18:32:36,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:36,414 INFO L225 Difference]: With dead ends: 27225 [2019-12-07 18:32:36,414 INFO L226 Difference]: Without dead ends: 27225 [2019-12-07 18:32:36,414 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:32:36,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27225 states. [2019-12-07 18:32:36,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27225 to 19532. [2019-12-07 18:32:36,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19532 states. [2019-12-07 18:32:36,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19532 states to 19532 states and 60108 transitions. [2019-12-07 18:32:36,759 INFO L78 Accepts]: Start accepts. Automaton has 19532 states and 60108 transitions. Word has length 33 [2019-12-07 18:32:36,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:36,759 INFO L462 AbstractCegarLoop]: Abstraction has 19532 states and 60108 transitions. [2019-12-07 18:32:36,759 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:32:36,759 INFO L276 IsEmpty]: Start isEmpty. Operand 19532 states and 60108 transitions. [2019-12-07 18:32:36,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:32:36,775 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:36,775 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:36,775 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:36,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:36,776 INFO L82 PathProgramCache]: Analyzing trace with hash 1293540528, now seen corresponding path program 1 times [2019-12-07 18:32:36,776 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:36,776 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240738196] [2019-12-07 18:32:36,776 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:36,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:36,828 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:36,828 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240738196] [2019-12-07 18:32:36,829 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:36,829 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:32:36,829 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1998604889] [2019-12-07 18:32:36,829 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:32:36,829 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:36,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:32:36,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:36,830 INFO L87 Difference]: Start difference. First operand 19532 states and 60108 transitions. Second operand 3 states. [2019-12-07 18:32:36,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:36,882 INFO L93 Difference]: Finished difference Result 18664 states and 56622 transitions. [2019-12-07 18:32:36,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:32:36,883 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 18:32:36,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:36,903 INFO L225 Difference]: With dead ends: 18664 [2019-12-07 18:32:36,903 INFO L226 Difference]: Without dead ends: 18664 [2019-12-07 18:32:36,903 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:36,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18664 states. [2019-12-07 18:32:37,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18664 to 18390. [2019-12-07 18:32:37,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18390 states. [2019-12-07 18:32:37,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18390 states to 18390 states and 55854 transitions. [2019-12-07 18:32:37,164 INFO L78 Accepts]: Start accepts. Automaton has 18390 states and 55854 transitions. Word has length 40 [2019-12-07 18:32:37,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:37,164 INFO L462 AbstractCegarLoop]: Abstraction has 18390 states and 55854 transitions. [2019-12-07 18:32:37,165 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:32:37,165 INFO L276 IsEmpty]: Start isEmpty. Operand 18390 states and 55854 transitions. [2019-12-07 18:32:37,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 18:32:37,180 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:37,180 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:37,180 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:37,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:37,180 INFO L82 PathProgramCache]: Analyzing trace with hash -448595313, now seen corresponding path program 1 times [2019-12-07 18:32:37,180 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:37,180 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393394285] [2019-12-07 18:32:37,180 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:37,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:37,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:37,220 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393394285] [2019-12-07 18:32:37,220 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:37,221 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:32:37,221 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [185548545] [2019-12-07 18:32:37,221 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:32:37,221 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:37,221 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:32:37,221 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:32:37,221 INFO L87 Difference]: Start difference. First operand 18390 states and 55854 transitions. Second operand 5 states. [2019-12-07 18:32:37,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:37,278 INFO L93 Difference]: Finished difference Result 16867 states and 52454 transitions. [2019-12-07 18:32:37,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:32:37,279 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 18:32:37,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:37,299 INFO L225 Difference]: With dead ends: 16867 [2019-12-07 18:32:37,299 INFO L226 Difference]: Without dead ends: 16867 [2019-12-07 18:32:37,299 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:32:37,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16867 states. [2019-12-07 18:32:37,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16867 to 15238. [2019-12-07 18:32:37,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15238 states. [2019-12-07 18:32:37,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15238 states to 15238 states and 47616 transitions. [2019-12-07 18:32:37,537 INFO L78 Accepts]: Start accepts. Automaton has 15238 states and 47616 transitions. Word has length 41 [2019-12-07 18:32:37,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:37,537 INFO L462 AbstractCegarLoop]: Abstraction has 15238 states and 47616 transitions. [2019-12-07 18:32:37,537 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:32:37,537 INFO L276 IsEmpty]: Start isEmpty. Operand 15238 states and 47616 transitions. [2019-12-07 18:32:37,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:32:37,551 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:37,551 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:37,552 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:37,552 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:37,552 INFO L82 PathProgramCache]: Analyzing trace with hash 1623524162, now seen corresponding path program 1 times [2019-12-07 18:32:37,552 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:37,552 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1912873343] [2019-12-07 18:32:37,552 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:37,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:37,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:37,589 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1912873343] [2019-12-07 18:32:37,589 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:37,589 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:32:37,590 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [125672962] [2019-12-07 18:32:37,590 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:32:37,590 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:37,590 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:32:37,590 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:37,590 INFO L87 Difference]: Start difference. First operand 15238 states and 47616 transitions. Second operand 3 states. [2019-12-07 18:32:37,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:37,669 INFO L93 Difference]: Finished difference Result 18380 states and 57153 transitions. [2019-12-07 18:32:37,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:32:37,670 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:32:37,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:37,690 INFO L225 Difference]: With dead ends: 18380 [2019-12-07 18:32:37,690 INFO L226 Difference]: Without dead ends: 18380 [2019-12-07 18:32:37,691 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:37,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18380 states. [2019-12-07 18:32:37,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18380 to 15494. [2019-12-07 18:32:37,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15494 states. [2019-12-07 18:32:37,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15494 states to 15494 states and 48492 transitions. [2019-12-07 18:32:37,946 INFO L78 Accepts]: Start accepts. Automaton has 15494 states and 48492 transitions. Word has length 66 [2019-12-07 18:32:37,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:37,946 INFO L462 AbstractCegarLoop]: Abstraction has 15494 states and 48492 transitions. [2019-12-07 18:32:37,946 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:32:37,946 INFO L276 IsEmpty]: Start isEmpty. Operand 15494 states and 48492 transitions. [2019-12-07 18:32:37,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:32:37,961 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:37,961 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:37,961 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:37,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:37,961 INFO L82 PathProgramCache]: Analyzing trace with hash 600429612, now seen corresponding path program 1 times [2019-12-07 18:32:37,961 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:37,961 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2032981808] [2019-12-07 18:32:37,961 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:37,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:38,006 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:38,007 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2032981808] [2019-12-07 18:32:38,007 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:38,007 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:32:38,007 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [461419855] [2019-12-07 18:32:38,007 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:32:38,007 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:38,007 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:32:38,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:32:38,008 INFO L87 Difference]: Start difference. First operand 15494 states and 48492 transitions. Second operand 4 states. [2019-12-07 18:32:38,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:38,102 INFO L93 Difference]: Finished difference Result 18353 states and 57063 transitions. [2019-12-07 18:32:38,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:32:38,103 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 18:32:38,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:38,122 INFO L225 Difference]: With dead ends: 18353 [2019-12-07 18:32:38,122 INFO L226 Difference]: Without dead ends: 18353 [2019-12-07 18:32:38,123 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:32:38,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18353 states. [2019-12-07 18:32:38,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18353 to 15150. [2019-12-07 18:32:38,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15150 states. [2019-12-07 18:32:38,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15150 states to 15150 states and 47431 transitions. [2019-12-07 18:32:38,418 INFO L78 Accepts]: Start accepts. Automaton has 15150 states and 47431 transitions. Word has length 67 [2019-12-07 18:32:38,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:38,418 INFO L462 AbstractCegarLoop]: Abstraction has 15150 states and 47431 transitions. [2019-12-07 18:32:38,418 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:32:38,418 INFO L276 IsEmpty]: Start isEmpty. Operand 15150 states and 47431 transitions. [2019-12-07 18:32:38,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:32:38,430 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:38,430 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:38,430 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:38,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:38,430 INFO L82 PathProgramCache]: Analyzing trace with hash 384042528, now seen corresponding path program 1 times [2019-12-07 18:32:38,430 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:38,430 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [230111240] [2019-12-07 18:32:38,431 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:38,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:38,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:38,556 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [230111240] [2019-12-07 18:32:38,556 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:38,556 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:32:38,556 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1253391815] [2019-12-07 18:32:38,556 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:32:38,556 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:38,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:32:38,557 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:32:38,557 INFO L87 Difference]: Start difference. First operand 15150 states and 47431 transitions. Second operand 10 states. [2019-12-07 18:32:39,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:39,939 INFO L93 Difference]: Finished difference Result 35073 states and 109582 transitions. [2019-12-07 18:32:39,939 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 18:32:39,939 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 18:32:39,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:39,965 INFO L225 Difference]: With dead ends: 35073 [2019-12-07 18:32:39,965 INFO L226 Difference]: Without dead ends: 24437 [2019-12-07 18:32:39,966 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 121 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=140, Invalid=562, Unknown=0, NotChecked=0, Total=702 [2019-12-07 18:32:40,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24437 states. [2019-12-07 18:32:40,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24437 to 18082. [2019-12-07 18:32:40,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18082 states. [2019-12-07 18:32:40,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18082 states to 18082 states and 56427 transitions. [2019-12-07 18:32:40,283 INFO L78 Accepts]: Start accepts. Automaton has 18082 states and 56427 transitions. Word has length 67 [2019-12-07 18:32:40,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:40,283 INFO L462 AbstractCegarLoop]: Abstraction has 18082 states and 56427 transitions. [2019-12-07 18:32:40,283 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:32:40,283 INFO L276 IsEmpty]: Start isEmpty. Operand 18082 states and 56427 transitions. [2019-12-07 18:32:40,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:32:40,298 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:40,298 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:40,298 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:40,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:40,299 INFO L82 PathProgramCache]: Analyzing trace with hash 1908292690, now seen corresponding path program 2 times [2019-12-07 18:32:40,299 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:40,299 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1042176104] [2019-12-07 18:32:40,299 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:40,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:40,451 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:40,451 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1042176104] [2019-12-07 18:32:40,451 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:40,451 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:32:40,451 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [406762206] [2019-12-07 18:32:40,452 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:32:40,452 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:40,452 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:32:40,452 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:32:40,452 INFO L87 Difference]: Start difference. First operand 18082 states and 56427 transitions. Second operand 10 states. [2019-12-07 18:32:42,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:42,326 INFO L93 Difference]: Finished difference Result 30588 states and 94940 transitions. [2019-12-07 18:32:42,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:32:42,327 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 18:32:42,328 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:42,370 INFO L225 Difference]: With dead ends: 30588 [2019-12-07 18:32:42,370 INFO L226 Difference]: Without dead ends: 26457 [2019-12-07 18:32:42,370 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=269, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:32:42,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26457 states. [2019-12-07 18:32:42,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26457 to 18534. [2019-12-07 18:32:42,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18534 states. [2019-12-07 18:32:42,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18534 states to 18534 states and 57675 transitions. [2019-12-07 18:32:42,707 INFO L78 Accepts]: Start accepts. Automaton has 18534 states and 57675 transitions. Word has length 67 [2019-12-07 18:32:42,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:42,708 INFO L462 AbstractCegarLoop]: Abstraction has 18534 states and 57675 transitions. [2019-12-07 18:32:42,708 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:32:42,708 INFO L276 IsEmpty]: Start isEmpty. Operand 18534 states and 57675 transitions. [2019-12-07 18:32:42,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:32:42,724 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:42,724 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:42,724 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:42,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:42,725 INFO L82 PathProgramCache]: Analyzing trace with hash 993635084, now seen corresponding path program 3 times [2019-12-07 18:32:42,725 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:42,725 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [326649138] [2019-12-07 18:32:42,725 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:42,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:42,834 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:42,834 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [326649138] [2019-12-07 18:32:42,834 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:42,835 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:32:42,835 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [777344253] [2019-12-07 18:32:42,835 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:32:42,835 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:42,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:32:42,836 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:32:42,836 INFO L87 Difference]: Start difference. First operand 18534 states and 57675 transitions. Second operand 11 states. [2019-12-07 18:32:45,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:45,016 INFO L93 Difference]: Finished difference Result 29036 states and 89939 transitions. [2019-12-07 18:32:45,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 18:32:45,016 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:32:45,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:45,049 INFO L225 Difference]: With dead ends: 29036 [2019-12-07 18:32:45,049 INFO L226 Difference]: Without dead ends: 25553 [2019-12-07 18:32:45,049 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=341, Unknown=0, NotChecked=0, Total=420 [2019-12-07 18:32:45,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25553 states. [2019-12-07 18:32:45,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25553 to 18102. [2019-12-07 18:32:45,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18102 states. [2019-12-07 18:32:45,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18102 states to 18102 states and 56343 transitions. [2019-12-07 18:32:45,372 INFO L78 Accepts]: Start accepts. Automaton has 18102 states and 56343 transitions. Word has length 67 [2019-12-07 18:32:45,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:45,372 INFO L462 AbstractCegarLoop]: Abstraction has 18102 states and 56343 transitions. [2019-12-07 18:32:45,372 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:32:45,372 INFO L276 IsEmpty]: Start isEmpty. Operand 18102 states and 56343 transitions. [2019-12-07 18:32:45,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:32:45,388 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:45,388 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:45,388 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:45,389 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:45,389 INFO L82 PathProgramCache]: Analyzing trace with hash 397917466, now seen corresponding path program 4 times [2019-12-07 18:32:45,389 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:45,389 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2046536764] [2019-12-07 18:32:45,389 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:45,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:45,528 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:45,528 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2046536764] [2019-12-07 18:32:45,529 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:45,529 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:32:45,529 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [629637476] [2019-12-07 18:32:45,529 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:32:45,529 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:45,529 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:32:45,530 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:32:45,530 INFO L87 Difference]: Start difference. First operand 18102 states and 56343 transitions. Second operand 12 states. [2019-12-07 18:32:47,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:47,182 INFO L93 Difference]: Finished difference Result 29148 states and 90323 transitions. [2019-12-07 18:32:47,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 18:32:47,182 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 18:32:47,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:47,215 INFO L225 Difference]: With dead ends: 29148 [2019-12-07 18:32:47,215 INFO L226 Difference]: Without dead ends: 26075 [2019-12-07 18:32:47,216 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=111, Invalid=489, Unknown=0, NotChecked=0, Total=600 [2019-12-07 18:32:47,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26075 states. [2019-12-07 18:32:47,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26075 to 18324. [2019-12-07 18:32:47,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18324 states. [2019-12-07 18:32:47,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18324 states to 18324 states and 56925 transitions. [2019-12-07 18:32:47,546 INFO L78 Accepts]: Start accepts. Automaton has 18324 states and 56925 transitions. Word has length 67 [2019-12-07 18:32:47,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:47,546 INFO L462 AbstractCegarLoop]: Abstraction has 18324 states and 56925 transitions. [2019-12-07 18:32:47,546 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:32:47,546 INFO L276 IsEmpty]: Start isEmpty. Operand 18324 states and 56925 transitions. [2019-12-07 18:32:47,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:32:47,562 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:47,562 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:47,562 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:47,563 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:47,563 INFO L82 PathProgramCache]: Analyzing trace with hash 1803113718, now seen corresponding path program 5 times [2019-12-07 18:32:47,563 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:47,563 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1980934274] [2019-12-07 18:32:47,563 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:47,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:48,329 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:48,329 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1980934274] [2019-12-07 18:32:48,329 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:48,329 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 18:32:48,329 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [647759757] [2019-12-07 18:32:48,330 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 18:32:48,330 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:48,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 18:32:48,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=404, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:32:48,330 INFO L87 Difference]: Start difference. First operand 18324 states and 56925 transitions. Second operand 22 states. [2019-12-07 18:32:56,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:56,899 INFO L93 Difference]: Finished difference Result 29030 states and 88578 transitions. [2019-12-07 18:32:56,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2019-12-07 18:32:56,899 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 67 [2019-12-07 18:32:56,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:56,931 INFO L225 Difference]: With dead ends: 29030 [2019-12-07 18:32:56,931 INFO L226 Difference]: Without dead ends: 27859 [2019-12-07 18:32:56,932 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 584 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=383, Invalid=2479, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 18:32:57,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27859 states. [2019-12-07 18:32:57,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27859 to 20841. [2019-12-07 18:32:57,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20841 states. [2019-12-07 18:32:57,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20841 states to 20841 states and 64423 transitions. [2019-12-07 18:32:57,297 INFO L78 Accepts]: Start accepts. Automaton has 20841 states and 64423 transitions. Word has length 67 [2019-12-07 18:32:57,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:57,297 INFO L462 AbstractCegarLoop]: Abstraction has 20841 states and 64423 transitions. [2019-12-07 18:32:57,297 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 18:32:57,297 INFO L276 IsEmpty]: Start isEmpty. Operand 20841 states and 64423 transitions. [2019-12-07 18:32:57,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:32:57,315 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:57,315 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:57,315 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:57,315 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:57,315 INFO L82 PathProgramCache]: Analyzing trace with hash 1857250972, now seen corresponding path program 6 times [2019-12-07 18:32:57,315 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:57,315 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [714412296] [2019-12-07 18:32:57,316 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:57,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:57,459 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:57,459 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [714412296] [2019-12-07 18:32:57,459 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:57,459 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 18:32:57,459 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1042359155] [2019-12-07 18:32:57,460 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:32:57,460 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:57,460 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:32:57,460 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:32:57,460 INFO L87 Difference]: Start difference. First operand 20841 states and 64423 transitions. Second operand 13 states. [2019-12-07 18:33:00,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:33:00,878 INFO L93 Difference]: Finished difference Result 36411 states and 111129 transitions. [2019-12-07 18:33:00,879 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 18:33:00,879 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 18:33:00,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:33:00,928 INFO L225 Difference]: With dead ends: 36411 [2019-12-07 18:33:00,928 INFO L226 Difference]: Without dead ends: 30874 [2019-12-07 18:33:00,928 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 228 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=226, Invalid=1034, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 18:33:01,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30874 states. [2019-12-07 18:33:01,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30874 to 20387. [2019-12-07 18:33:01,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20387 states. [2019-12-07 18:33:01,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20387 states to 20387 states and 62918 transitions. [2019-12-07 18:33:01,313 INFO L78 Accepts]: Start accepts. Automaton has 20387 states and 62918 transitions. Word has length 67 [2019-12-07 18:33:01,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:33:01,313 INFO L462 AbstractCegarLoop]: Abstraction has 20387 states and 62918 transitions. [2019-12-07 18:33:01,313 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:33:01,313 INFO L276 IsEmpty]: Start isEmpty. Operand 20387 states and 62918 transitions. [2019-12-07 18:33:01,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:33:01,331 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:33:01,331 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:33:01,331 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:33:01,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:33:01,331 INFO L82 PathProgramCache]: Analyzing trace with hash 1823504856, now seen corresponding path program 7 times [2019-12-07 18:33:01,332 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:33:01,332 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159524754] [2019-12-07 18:33:01,332 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:33:01,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:33:01,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:33:01,447 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159524754] [2019-12-07 18:33:01,447 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:33:01,447 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:33:01,447 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [951322233] [2019-12-07 18:33:01,447 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:33:01,448 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:33:01,448 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:33:01,448 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:33:01,448 INFO L87 Difference]: Start difference. First operand 20387 states and 62918 transitions. Second operand 11 states. [2019-12-07 18:33:03,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:33:03,049 INFO L93 Difference]: Finished difference Result 32182 states and 98402 transitions. [2019-12-07 18:33:03,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 18:33:03,049 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:33:03,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:33:03,083 INFO L225 Difference]: With dead ends: 32182 [2019-12-07 18:33:03,083 INFO L226 Difference]: Without dead ends: 30219 [2019-12-07 18:33:03,084 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 131 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=147, Invalid=609, Unknown=0, NotChecked=0, Total=756 [2019-12-07 18:33:03,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30219 states. [2019-12-07 18:33:03,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30219 to 20095. [2019-12-07 18:33:03,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20095 states. [2019-12-07 18:33:03,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20095 states to 20095 states and 62131 transitions. [2019-12-07 18:33:03,455 INFO L78 Accepts]: Start accepts. Automaton has 20095 states and 62131 transitions. Word has length 67 [2019-12-07 18:33:03,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:33:03,455 INFO L462 AbstractCegarLoop]: Abstraction has 20095 states and 62131 transitions. [2019-12-07 18:33:03,455 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:33:03,455 INFO L276 IsEmpty]: Start isEmpty. Operand 20095 states and 62131 transitions. [2019-12-07 18:33:03,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:33:03,473 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:33:03,473 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:33:03,473 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:33:03,473 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:33:03,473 INFO L82 PathProgramCache]: Analyzing trace with hash -1867129146, now seen corresponding path program 8 times [2019-12-07 18:33:03,474 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:33:03,474 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [787636648] [2019-12-07 18:33:03,474 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:33:03,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:33:03,666 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:33:03,666 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [787636648] [2019-12-07 18:33:03,666 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:33:03,666 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 18:33:03,666 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1046962756] [2019-12-07 18:33:03,666 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:33:03,667 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:33:03,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:33:03,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:33:03,667 INFO L87 Difference]: Start difference. First operand 20095 states and 62131 transitions. Second operand 13 states. [2019-12-07 18:33:07,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:33:07,070 INFO L93 Difference]: Finished difference Result 30561 states and 94267 transitions. [2019-12-07 18:33:07,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 18:33:07,070 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 18:33:07,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:33:07,105 INFO L225 Difference]: With dead ends: 30561 [2019-12-07 18:33:07,105 INFO L226 Difference]: Without dead ends: 28219 [2019-12-07 18:33:07,106 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 210 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=161, Invalid=895, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 18:33:07,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28219 states. [2019-12-07 18:33:07,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28219 to 21012. [2019-12-07 18:33:07,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21012 states. [2019-12-07 18:33:07,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21012 states to 21012 states and 65086 transitions. [2019-12-07 18:33:07,482 INFO L78 Accepts]: Start accepts. Automaton has 21012 states and 65086 transitions. Word has length 67 [2019-12-07 18:33:07,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:33:07,482 INFO L462 AbstractCegarLoop]: Abstraction has 21012 states and 65086 transitions. [2019-12-07 18:33:07,482 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:33:07,482 INFO L276 IsEmpty]: Start isEmpty. Operand 21012 states and 65086 transitions. [2019-12-07 18:33:07,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:33:07,502 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:33:07,502 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:33:07,502 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:33:07,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:33:07,503 INFO L82 PathProgramCache]: Analyzing trace with hash 484330678, now seen corresponding path program 9 times [2019-12-07 18:33:07,503 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:33:07,503 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [205402281] [2019-12-07 18:33:07,503 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:33:07,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:33:07,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:33:07,560 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [205402281] [2019-12-07 18:33:07,560 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:33:07,560 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:33:07,560 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1424906846] [2019-12-07 18:33:07,560 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:33:07,561 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:33:07,561 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:33:07,561 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:33:07,561 INFO L87 Difference]: Start difference. First operand 21012 states and 65086 transitions. Second operand 6 states. [2019-12-07 18:33:07,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:33:07,829 INFO L93 Difference]: Finished difference Result 49598 states and 152203 transitions. [2019-12-07 18:33:07,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:33:07,830 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 18:33:07,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:33:07,878 INFO L225 Difference]: With dead ends: 49598 [2019-12-07 18:33:07,878 INFO L226 Difference]: Without dead ends: 39694 [2019-12-07 18:33:07,879 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:33:08,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39694 states. [2019-12-07 18:33:08,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39694 to 21687. [2019-12-07 18:33:08,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21687 states. [2019-12-07 18:33:08,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21687 states to 21687 states and 67266 transitions. [2019-12-07 18:33:08,402 INFO L78 Accepts]: Start accepts. Automaton has 21687 states and 67266 transitions. Word has length 67 [2019-12-07 18:33:08,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:33:08,402 INFO L462 AbstractCegarLoop]: Abstraction has 21687 states and 67266 transitions. [2019-12-07 18:33:08,402 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:33:08,402 INFO L276 IsEmpty]: Start isEmpty. Operand 21687 states and 67266 transitions. [2019-12-07 18:33:08,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:33:08,419 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:33:08,419 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:33:08,419 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:33:08,419 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:33:08,419 INFO L82 PathProgramCache]: Analyzing trace with hash -1154306208, now seen corresponding path program 10 times [2019-12-07 18:33:08,419 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:33:08,419 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [739033310] [2019-12-07 18:33:08,419 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:33:08,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:33:08,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:33:08,493 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:33:08,494 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:33:08,496 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1567~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1567~0.base_23|) |v_ULTIMATE.start_main_~#t1567~0.offset_17| 0)) |v_#memory_int_17|) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1567~0.base_23|) (= (store .cse0 |v_ULTIMATE.start_main_~#t1567~0.base_23| 1) |v_#valid_60|) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1567~0.base_23| 4) |v_#length_21|) (= v_~z$w_buff0_used~0_900 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= (select .cse0 |v_ULTIMATE.start_main_~#t1567~0.base_23|) 0) (= |v_ULTIMATE.start_main_~#t1567~0.offset_17| 0) (= v_~z$read_delayed~0_7 0) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (= v_~z$r_buff1_thd1~0_166 0) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1567~0.offset=|v_ULTIMATE.start_main_~#t1567~0.offset_17|, ULTIMATE.start_main_~#t1568~0.base=|v_ULTIMATE.start_main_~#t1568~0.base_19|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ULTIMATE.start_main_~#t1567~0.base=|v_ULTIMATE.start_main_~#t1567~0.base_23|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ~x~0=v_~x~0_129, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ULTIMATE.start_main_~#t1568~0.offset=|v_ULTIMATE.start_main_~#t1568~0.offset_12|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1569~0.base=|v_ULTIMATE.start_main_~#t1569~0.base_17|, ULTIMATE.start_main_~#t1569~0.offset=|v_ULTIMATE.start_main_~#t1569~0.offset_14|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1567~0.offset, ULTIMATE.start_main_~#t1568~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_~#t1567~0.base, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1568~0.offset, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t1569~0.base, ULTIMATE.start_main_~#t1569~0.offset, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:33:08,497 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1568~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t1568~0.base_11|)) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1568~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1568~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1568~0.base_11|) |v_ULTIMATE.start_main_~#t1568~0.offset_9| 1)) |v_#memory_int_13|) (= |v_ULTIMATE.start_main_~#t1568~0.offset_9| 0) (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1568~0.base_11| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1568~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1568~0.base=|v_ULTIMATE.start_main_~#t1568~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1568~0.offset=|v_ULTIMATE.start_main_~#t1568~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1568~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1568~0.offset] because there is no mapped edge [2019-12-07 18:33:08,497 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:33:08,498 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In302837439 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd2~0_In302837439 256) 0))) (or (and (not .cse0) (= ~z$w_buff1~0_In302837439 |P1Thread1of1ForFork2_#t~ite9_Out302837439|) (not .cse1)) (and (= ~z~0_In302837439 |P1Thread1of1ForFork2_#t~ite9_Out302837439|) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In302837439, ~z$w_buff1_used~0=~z$w_buff1_used~0_In302837439, ~z$w_buff1~0=~z$w_buff1~0_In302837439, ~z~0=~z~0_In302837439} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out302837439|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In302837439, ~z$w_buff1_used~0=~z$w_buff1_used~0_In302837439, ~z$w_buff1~0=~z$w_buff1~0_In302837439, ~z~0=~z~0_In302837439} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:33:08,498 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 18:33:08,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1569~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1569~0.base_13|) |v_ULTIMATE.start_main_~#t1569~0.offset_11| 2)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1569~0.base_13|) (not (= |v_ULTIMATE.start_main_~#t1569~0.base_13| 0)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1569~0.base_13| 4)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1569~0.base_13|)) (= |v_ULTIMATE.start_main_~#t1569~0.offset_11| 0) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1569~0.base_13| 1) |v_#valid_36|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1569~0.base=|v_ULTIMATE.start_main_~#t1569~0.base_13|, ULTIMATE.start_main_~#t1569~0.offset=|v_ULTIMATE.start_main_~#t1569~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1569~0.base, ULTIMATE.start_main_~#t1569~0.offset, #length] because there is no mapped edge [2019-12-07 18:33:08,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In-1689047936 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1689047936 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1689047936 |P1Thread1of1ForFork2_#t~ite11_Out-1689047936|)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1689047936|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1689047936, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1689047936} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1689047936, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1689047936|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1689047936} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:33:08,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1242388271 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In-1242388271 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1242388271 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1242388271 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-1242388271| ~z$w_buff1_used~0_In-1242388271) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork2_#t~ite12_Out-1242388271| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1242388271, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1242388271, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1242388271, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1242388271} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1242388271, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1242388271, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1242388271, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1242388271|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1242388271} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:33:08,501 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-278819899 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-278819899 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-278819899| ~z$r_buff0_thd2~0_In-278819899)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out-278819899| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-278819899, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-278819899} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-278819899, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-278819899|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-278819899} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:33:08,502 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1868515992 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out-1868515992| ~z$w_buff0_used~0_In-1868515992) (= |P2Thread1of1ForFork0_#t~ite26_In-1868515992| |P2Thread1of1ForFork0_#t~ite26_Out-1868515992|) (not .cse0)) (and (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1868515992 256) 0))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In-1868515992 256) 0)) (and (= 0 (mod ~z$w_buff1_used~0_In-1868515992 256)) .cse1) (= 0 (mod ~z$w_buff0_used~0_In-1868515992 256)))) (= ~z$w_buff0_used~0_In-1868515992 |P2Thread1of1ForFork0_#t~ite26_Out-1868515992|) (= |P2Thread1of1ForFork0_#t~ite27_Out-1868515992| |P2Thread1of1ForFork0_#t~ite26_Out-1868515992|) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1868515992|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1868515992, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1868515992, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1868515992, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1868515992, ~weak$$choice2~0=~weak$$choice2~0_In-1868515992} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1868515992|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1868515992|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1868515992, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1868515992, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1868515992, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1868515992, ~weak$$choice2~0=~weak$$choice2~0_In-1868515992} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:33:08,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:33:08,504 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In1945935696 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1945935696 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1945935696|)) (and (= ~z$w_buff0_used~0_In1945935696 |P0Thread1of1ForFork1_#t~ite5_Out1945935696|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1945935696, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1945935696} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1945935696|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1945935696, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1945935696} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:33:08,504 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 18:33:08,505 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse1 (= |P2Thread1of1ForFork0_#t~ite39_Out-1786199327| |P2Thread1of1ForFork0_#t~ite38_Out-1786199327|)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1786199327 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-1786199327 256) 0))) (or (and (not .cse0) .cse1 (not .cse2) (= |P2Thread1of1ForFork0_#t~ite38_Out-1786199327| ~z$w_buff1~0_In-1786199327)) (and .cse1 (= |P2Thread1of1ForFork0_#t~ite38_Out-1786199327| ~z~0_In-1786199327) (or .cse2 .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1786199327, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1786199327, ~z$w_buff1~0=~z$w_buff1~0_In-1786199327, ~z~0=~z~0_In-1786199327} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1786199327|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1786199327|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1786199327, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1786199327, ~z$w_buff1~0=~z$w_buff1~0_In-1786199327, ~z~0=~z~0_In-1786199327} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:33:08,505 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1024117544 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In1024117544 256) 0))) (or (and (= ~z$w_buff0_used~0_In1024117544 |P2Thread1of1ForFork0_#t~ite40_Out1024117544|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1024117544|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1024117544, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1024117544} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1024117544, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1024117544|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1024117544} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:33:08,505 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In209405165 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In209405165 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In209405165 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In209405165 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In209405165 |P2Thread1of1ForFork0_#t~ite41_Out209405165|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out209405165|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In209405165, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In209405165, ~z$w_buff1_used~0=~z$w_buff1_used~0_In209405165, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In209405165} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In209405165, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In209405165, ~z$w_buff1_used~0=~z$w_buff1_used~0_In209405165, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In209405165, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out209405165|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:33:08,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In470266144 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In470266144 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In470266144 |P2Thread1of1ForFork0_#t~ite42_Out470266144|)) (and (= 0 |P2Thread1of1ForFork0_#t~ite42_Out470266144|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In470266144, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In470266144} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In470266144, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In470266144, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out470266144|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:33:08,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-961427987 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-961427987 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-961427987 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd3~0_In-961427987 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-961427987 |P2Thread1of1ForFork0_#t~ite43_Out-961427987|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite43_Out-961427987| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-961427987, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-961427987, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-961427987, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-961427987} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-961427987|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-961427987, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-961427987, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-961427987, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-961427987} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:33:08,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:33:08,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In1588522156 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd1~0_In1588522156 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1588522156 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1588522156 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1588522156|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In1588522156 |P0Thread1of1ForFork1_#t~ite6_Out1588522156|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1588522156, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1588522156, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1588522156, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1588522156} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1588522156, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1588522156|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1588522156, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1588522156, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1588522156} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:33:08,507 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse1 (= ~z$r_buff0_thd1~0_Out1838136500 ~z$r_buff0_thd1~0_In1838136500)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In1838136500 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1838136500 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (= ~z$r_buff0_thd1~0_Out1838136500 0) (not .cse2) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1838136500, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1838136500} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1838136500, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1838136500|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1838136500} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:33:08,507 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1253821969 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1253821969 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-1253821969 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd1~0_In-1253821969 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-1253821969|)) (and (= ~z$r_buff1_thd1~0_In-1253821969 |P0Thread1of1ForFork1_#t~ite8_Out-1253821969|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1253821969, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1253821969, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1253821969, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1253821969} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1253821969|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1253821969, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1253821969, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1253821969, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1253821969} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:33:08,507 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:33:08,508 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In643971590 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In643971590 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In643971590 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In643971590 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite14_Out643971590| 0)) (and (= ~z$r_buff1_thd2~0_In643971590 |P1Thread1of1ForFork2_#t~ite14_Out643971590|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In643971590, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In643971590, ~z$w_buff1_used~0=~z$w_buff1_used~0_In643971590, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In643971590} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In643971590, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In643971590, ~z$w_buff1_used~0=~z$w_buff1_used~0_In643971590, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out643971590|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In643971590} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:33:08,508 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:33:08,508 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:33:08,508 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd0~0_In370597447 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In370597447 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out370597447| |ULTIMATE.start_main_#t~ite47_Out370597447|))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out370597447| ~z~0_In370597447) (or .cse0 .cse1) .cse2) (and (= |ULTIMATE.start_main_#t~ite47_Out370597447| ~z$w_buff1~0_In370597447) (not .cse1) (not .cse0) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In370597447, ~z$w_buff1_used~0=~z$w_buff1_used~0_In370597447, ~z$w_buff1~0=~z$w_buff1~0_In370597447, ~z~0=~z~0_In370597447} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In370597447, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out370597447|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In370597447, ~z$w_buff1~0=~z$w_buff1~0_In370597447, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out370597447|, ~z~0=~z~0_In370597447} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:33:08,509 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In923321722 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In923321722 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out923321722| ~z$w_buff0_used~0_In923321722) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out923321722| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In923321722, ~z$w_buff0_used~0=~z$w_buff0_used~0_In923321722} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In923321722, ~z$w_buff0_used~0=~z$w_buff0_used~0_In923321722, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out923321722|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:33:08,509 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In694247705 256))) (.cse2 (= (mod ~z$r_buff0_thd0~0_In694247705 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In694247705 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In694247705 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out694247705|)) (and (= ~z$w_buff1_used~0_In694247705 |ULTIMATE.start_main_#t~ite50_Out694247705|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In694247705, ~z$w_buff0_used~0=~z$w_buff0_used~0_In694247705, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In694247705, ~z$w_buff1_used~0=~z$w_buff1_used~0_In694247705} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out694247705|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In694247705, ~z$w_buff0_used~0=~z$w_buff0_used~0_In694247705, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In694247705, ~z$w_buff1_used~0=~z$w_buff1_used~0_In694247705} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:33:08,509 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In336907699 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In336907699 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out336907699| 0) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In336907699 |ULTIMATE.start_main_#t~ite51_Out336907699|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In336907699, ~z$w_buff0_used~0=~z$w_buff0_used~0_In336907699} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In336907699, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out336907699|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In336907699} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:33:08,510 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1703385419 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In-1703385419 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1703385419 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1703385419 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-1703385419| ~z$r_buff1_thd0~0_In-1703385419) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite52_Out-1703385419| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1703385419, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1703385419, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1703385419, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1703385419} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1703385419|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1703385419, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1703385419, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1703385419, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1703385419} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:33:08,510 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:33:08,562 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:33:08 BasicIcfg [2019-12-07 18:33:08,562 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:33:08,562 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:33:08,562 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:33:08,562 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:33:08,563 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:30:46" (3/4) ... [2019-12-07 18:33:08,564 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:33:08,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1567~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1567~0.base_23|) |v_ULTIMATE.start_main_~#t1567~0.offset_17| 0)) |v_#memory_int_17|) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1567~0.base_23|) (= (store .cse0 |v_ULTIMATE.start_main_~#t1567~0.base_23| 1) |v_#valid_60|) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1567~0.base_23| 4) |v_#length_21|) (= v_~z$w_buff0_used~0_900 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= (select .cse0 |v_ULTIMATE.start_main_~#t1567~0.base_23|) 0) (= |v_ULTIMATE.start_main_~#t1567~0.offset_17| 0) (= v_~z$read_delayed~0_7 0) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (= v_~z$r_buff1_thd1~0_166 0) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1567~0.offset=|v_ULTIMATE.start_main_~#t1567~0.offset_17|, ULTIMATE.start_main_~#t1568~0.base=|v_ULTIMATE.start_main_~#t1568~0.base_19|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ULTIMATE.start_main_~#t1567~0.base=|v_ULTIMATE.start_main_~#t1567~0.base_23|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ~x~0=v_~x~0_129, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ULTIMATE.start_main_~#t1568~0.offset=|v_ULTIMATE.start_main_~#t1568~0.offset_12|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1569~0.base=|v_ULTIMATE.start_main_~#t1569~0.base_17|, ULTIMATE.start_main_~#t1569~0.offset=|v_ULTIMATE.start_main_~#t1569~0.offset_14|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1567~0.offset, ULTIMATE.start_main_~#t1568~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_~#t1567~0.base, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1568~0.offset, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t1569~0.base, ULTIMATE.start_main_~#t1569~0.offset, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:33:08,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1568~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t1568~0.base_11|)) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1568~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1568~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1568~0.base_11|) |v_ULTIMATE.start_main_~#t1568~0.offset_9| 1)) |v_#memory_int_13|) (= |v_ULTIMATE.start_main_~#t1568~0.offset_9| 0) (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1568~0.base_11| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1568~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1568~0.base=|v_ULTIMATE.start_main_~#t1568~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1568~0.offset=|v_ULTIMATE.start_main_~#t1568~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1568~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1568~0.offset] because there is no mapped edge [2019-12-07 18:33:08,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:33:08,566 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In302837439 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd2~0_In302837439 256) 0))) (or (and (not .cse0) (= ~z$w_buff1~0_In302837439 |P1Thread1of1ForFork2_#t~ite9_Out302837439|) (not .cse1)) (and (= ~z~0_In302837439 |P1Thread1of1ForFork2_#t~ite9_Out302837439|) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In302837439, ~z$w_buff1_used~0=~z$w_buff1_used~0_In302837439, ~z$w_buff1~0=~z$w_buff1~0_In302837439, ~z~0=~z~0_In302837439} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out302837439|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In302837439, ~z$w_buff1_used~0=~z$w_buff1_used~0_In302837439, ~z$w_buff1~0=~z$w_buff1~0_In302837439, ~z~0=~z~0_In302837439} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:33:08,566 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 18:33:08,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1569~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1569~0.base_13|) |v_ULTIMATE.start_main_~#t1569~0.offset_11| 2)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1569~0.base_13|) (not (= |v_ULTIMATE.start_main_~#t1569~0.base_13| 0)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1569~0.base_13| 4)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1569~0.base_13|)) (= |v_ULTIMATE.start_main_~#t1569~0.offset_11| 0) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1569~0.base_13| 1) |v_#valid_36|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1569~0.base=|v_ULTIMATE.start_main_~#t1569~0.base_13|, ULTIMATE.start_main_~#t1569~0.offset=|v_ULTIMATE.start_main_~#t1569~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1569~0.base, ULTIMATE.start_main_~#t1569~0.offset, #length] because there is no mapped edge [2019-12-07 18:33:08,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In-1689047936 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1689047936 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1689047936 |P1Thread1of1ForFork2_#t~ite11_Out-1689047936|)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1689047936|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1689047936, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1689047936} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1689047936, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1689047936|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1689047936} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:33:08,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1242388271 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In-1242388271 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1242388271 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1242388271 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-1242388271| ~z$w_buff1_used~0_In-1242388271) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork2_#t~ite12_Out-1242388271| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1242388271, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1242388271, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1242388271, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1242388271} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1242388271, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1242388271, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1242388271, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1242388271|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1242388271} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:33:08,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-278819899 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-278819899 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-278819899| ~z$r_buff0_thd2~0_In-278819899)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out-278819899| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-278819899, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-278819899} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-278819899, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-278819899|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-278819899} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:33:08,570 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1868515992 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out-1868515992| ~z$w_buff0_used~0_In-1868515992) (= |P2Thread1of1ForFork0_#t~ite26_In-1868515992| |P2Thread1of1ForFork0_#t~ite26_Out-1868515992|) (not .cse0)) (and (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1868515992 256) 0))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In-1868515992 256) 0)) (and (= 0 (mod ~z$w_buff1_used~0_In-1868515992 256)) .cse1) (= 0 (mod ~z$w_buff0_used~0_In-1868515992 256)))) (= ~z$w_buff0_used~0_In-1868515992 |P2Thread1of1ForFork0_#t~ite26_Out-1868515992|) (= |P2Thread1of1ForFork0_#t~ite27_Out-1868515992| |P2Thread1of1ForFork0_#t~ite26_Out-1868515992|) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1868515992|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1868515992, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1868515992, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1868515992, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1868515992, ~weak$$choice2~0=~weak$$choice2~0_In-1868515992} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1868515992|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1868515992|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1868515992, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1868515992, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1868515992, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1868515992, ~weak$$choice2~0=~weak$$choice2~0_In-1868515992} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:33:08,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:33:08,572 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In1945935696 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1945935696 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1945935696|)) (and (= ~z$w_buff0_used~0_In1945935696 |P0Thread1of1ForFork1_#t~ite5_Out1945935696|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1945935696, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1945935696} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1945935696|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1945935696, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1945935696} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:33:08,572 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 18:33:08,573 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse1 (= |P2Thread1of1ForFork0_#t~ite39_Out-1786199327| |P2Thread1of1ForFork0_#t~ite38_Out-1786199327|)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1786199327 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-1786199327 256) 0))) (or (and (not .cse0) .cse1 (not .cse2) (= |P2Thread1of1ForFork0_#t~ite38_Out-1786199327| ~z$w_buff1~0_In-1786199327)) (and .cse1 (= |P2Thread1of1ForFork0_#t~ite38_Out-1786199327| ~z~0_In-1786199327) (or .cse2 .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1786199327, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1786199327, ~z$w_buff1~0=~z$w_buff1~0_In-1786199327, ~z~0=~z~0_In-1786199327} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1786199327|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1786199327|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1786199327, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1786199327, ~z$w_buff1~0=~z$w_buff1~0_In-1786199327, ~z~0=~z~0_In-1786199327} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:33:08,573 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1024117544 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In1024117544 256) 0))) (or (and (= ~z$w_buff0_used~0_In1024117544 |P2Thread1of1ForFork0_#t~ite40_Out1024117544|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1024117544|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1024117544, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1024117544} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1024117544, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1024117544|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1024117544} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:33:08,574 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In209405165 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In209405165 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In209405165 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In209405165 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In209405165 |P2Thread1of1ForFork0_#t~ite41_Out209405165|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out209405165|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In209405165, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In209405165, ~z$w_buff1_used~0=~z$w_buff1_used~0_In209405165, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In209405165} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In209405165, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In209405165, ~z$w_buff1_used~0=~z$w_buff1_used~0_In209405165, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In209405165, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out209405165|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:33:08,574 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In470266144 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In470266144 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In470266144 |P2Thread1of1ForFork0_#t~ite42_Out470266144|)) (and (= 0 |P2Thread1of1ForFork0_#t~ite42_Out470266144|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In470266144, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In470266144} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In470266144, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In470266144, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out470266144|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:33:08,574 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-961427987 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-961427987 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-961427987 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd3~0_In-961427987 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-961427987 |P2Thread1of1ForFork0_#t~ite43_Out-961427987|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite43_Out-961427987| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-961427987, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-961427987, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-961427987, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-961427987} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-961427987|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-961427987, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-961427987, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-961427987, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-961427987} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:33:08,574 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:33:08,575 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In1588522156 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd1~0_In1588522156 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1588522156 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1588522156 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1588522156|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In1588522156 |P0Thread1of1ForFork1_#t~ite6_Out1588522156|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1588522156, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1588522156, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1588522156, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1588522156} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1588522156, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1588522156|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1588522156, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1588522156, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1588522156} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:33:08,575 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse1 (= ~z$r_buff0_thd1~0_Out1838136500 ~z$r_buff0_thd1~0_In1838136500)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In1838136500 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1838136500 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (= ~z$r_buff0_thd1~0_Out1838136500 0) (not .cse2) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1838136500, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1838136500} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1838136500, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1838136500|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1838136500} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:33:08,575 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1253821969 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1253821969 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-1253821969 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd1~0_In-1253821969 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-1253821969|)) (and (= ~z$r_buff1_thd1~0_In-1253821969 |P0Thread1of1ForFork1_#t~ite8_Out-1253821969|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1253821969, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1253821969, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1253821969, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1253821969} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1253821969|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1253821969, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1253821969, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1253821969, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1253821969} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:33:08,575 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:33:08,576 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In643971590 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In643971590 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In643971590 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In643971590 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite14_Out643971590| 0)) (and (= ~z$r_buff1_thd2~0_In643971590 |P1Thread1of1ForFork2_#t~ite14_Out643971590|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In643971590, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In643971590, ~z$w_buff1_used~0=~z$w_buff1_used~0_In643971590, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In643971590} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In643971590, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In643971590, ~z$w_buff1_used~0=~z$w_buff1_used~0_In643971590, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out643971590|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In643971590} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:33:08,576 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:33:08,576 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:33:08,576 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd0~0_In370597447 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In370597447 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out370597447| |ULTIMATE.start_main_#t~ite47_Out370597447|))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out370597447| ~z~0_In370597447) (or .cse0 .cse1) .cse2) (and (= |ULTIMATE.start_main_#t~ite47_Out370597447| ~z$w_buff1~0_In370597447) (not .cse1) (not .cse0) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In370597447, ~z$w_buff1_used~0=~z$w_buff1_used~0_In370597447, ~z$w_buff1~0=~z$w_buff1~0_In370597447, ~z~0=~z~0_In370597447} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In370597447, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out370597447|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In370597447, ~z$w_buff1~0=~z$w_buff1~0_In370597447, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out370597447|, ~z~0=~z~0_In370597447} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:33:08,577 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In923321722 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In923321722 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out923321722| ~z$w_buff0_used~0_In923321722) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out923321722| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In923321722, ~z$w_buff0_used~0=~z$w_buff0_used~0_In923321722} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In923321722, ~z$w_buff0_used~0=~z$w_buff0_used~0_In923321722, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out923321722|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:33:08,577 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In694247705 256))) (.cse2 (= (mod ~z$r_buff0_thd0~0_In694247705 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In694247705 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In694247705 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out694247705|)) (and (= ~z$w_buff1_used~0_In694247705 |ULTIMATE.start_main_#t~ite50_Out694247705|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In694247705, ~z$w_buff0_used~0=~z$w_buff0_used~0_In694247705, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In694247705, ~z$w_buff1_used~0=~z$w_buff1_used~0_In694247705} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out694247705|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In694247705, ~z$w_buff0_used~0=~z$w_buff0_used~0_In694247705, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In694247705, ~z$w_buff1_used~0=~z$w_buff1_used~0_In694247705} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:33:08,577 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In336907699 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In336907699 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out336907699| 0) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In336907699 |ULTIMATE.start_main_#t~ite51_Out336907699|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In336907699, ~z$w_buff0_used~0=~z$w_buff0_used~0_In336907699} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In336907699, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out336907699|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In336907699} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:33:08,578 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1703385419 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In-1703385419 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1703385419 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1703385419 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-1703385419| ~z$r_buff1_thd0~0_In-1703385419) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite52_Out-1703385419| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1703385419, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1703385419, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1703385419, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1703385419} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1703385419|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1703385419, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1703385419, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1703385419, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1703385419} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:33:08,578 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:33:08,632 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_93bbe1d8-0240-4a43-b740-a96277c5aa80/bin/uautomizer/witness.graphml [2019-12-07 18:33:08,632 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:33:08,634 INFO L168 Benchmark]: Toolchain (without parser) took 142714.68 ms. Allocated memory was 1.0 GB in the beginning and 6.7 GB in the end (delta: 5.7 GB). Free memory was 939.2 MB in the beginning and 5.8 GB in the end (delta: -4.9 GB). Peak memory consumption was 788.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:33:08,634 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 1.0 GB. Free memory is still 959.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:33:08,635 INFO L168 Benchmark]: CACSL2BoogieTranslator took 381.90 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 939.2 MB in the beginning and 1.1 GB in the end (delta: -125.2 MB). Peak memory consumption was 22.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:33:08,635 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.76 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:33:08,636 INFO L168 Benchmark]: Boogie Preprocessor took 25.14 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:33:08,636 INFO L168 Benchmark]: RCFGBuilder took 407.97 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.2 MB). Peak memory consumption was 56.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:33:08,636 INFO L168 Benchmark]: TraceAbstraction took 141789.22 ms. Allocated memory was 1.1 GB in the beginning and 6.7 GB in the end (delta: 5.6 GB). Free memory was 1.0 GB in the beginning and 5.9 GB in the end (delta: -4.9 GB). Peak memory consumption was 706.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:33:08,637 INFO L168 Benchmark]: Witness Printer took 70.31 ms. Allocated memory is still 6.7 GB. Free memory was 5.9 GB in the beginning and 5.8 GB in the end (delta: 47.2 MB). Peak memory consumption was 47.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:33:08,639 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 1.0 GB. Free memory is still 959.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 381.90 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 939.2 MB in the beginning and 1.1 GB in the end (delta: -125.2 MB). Peak memory consumption was 22.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.76 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.14 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 407.97 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.2 MB). Peak memory consumption was 56.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 141789.22 ms. Allocated memory was 1.1 GB in the beginning and 6.7 GB in the end (delta: 5.6 GB). Free memory was 1.0 GB in the beginning and 5.9 GB in the end (delta: -4.9 GB). Peak memory consumption was 706.7 MB. Max. memory is 11.5 GB. * Witness Printer took 70.31 ms. Allocated memory is still 6.7 GB. Free memory was 5.9 GB in the beginning and 5.8 GB in the end (delta: 47.2 MB). Peak memory consumption was 47.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 176 ProgramPointsBefore, 95 ProgramPointsAfterwards, 213 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 55 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 29 ChoiceCompositions, 7276 VarBasedMoverChecksPositive, 432 VarBasedMoverChecksNegative, 272 SemBasedMoverChecksPositive, 254 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 130045 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L822] FCALL, FORK 0 pthread_create(&t1567, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t1568, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 1 [L763] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L826] FCALL, FORK 0 pthread_create(&t1569, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 1 [L783] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L784] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L785] 3 z$flush_delayed = weak$$choice2 [L786] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L788] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L788] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L789] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L789] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L790] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L791] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L793] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L794] 3 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L799] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L800] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L801] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L802] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L832] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L832] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L833] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L834] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L835] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 141.6s, OverallIterations: 26, TraceHistogramMax: 1, AutomataDifference: 40.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6370 SDtfs, 7481 SDslu, 25536 SDs, 0 SdLazy, 26211 SolverSat, 441 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 19.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 355 GetRequests, 35 SyntacticMatches, 16 SemanticMatches, 304 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1531 ImplicationChecksByTransitivity, 4.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=237826occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 75.2s AutomataMinimizationTime, 25 MinimizatonAttempts, 321306 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.1s InterpolantComputationTime, 1115 NumberOfCodeBlocks, 1115 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 1023 ConstructedInterpolants, 0 QuantifiedInterpolants, 340673 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...