./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/podwr001_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_3db5504c-6870-4d81-93ec-5f5fa6e5ed6d/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_3db5504c-6870-4d81-93ec-5f5fa6e5ed6d/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_3db5504c-6870-4d81-93ec-5f5fa6e5ed6d/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_3db5504c-6870-4d81-93ec-5f5fa6e5ed6d/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/podwr001_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_3db5504c-6870-4d81-93ec-5f5fa6e5ed6d/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_3db5504c-6870-4d81-93ec-5f5fa6e5ed6d/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5dd8d3675b903afe7ffe1c2987742cff82f33739 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:37:04,119 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:37:04,121 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:37:04,132 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:37:04,132 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:37:04,133 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:37:04,134 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:37:04,136 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:37:04,138 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:37:04,139 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:37:04,140 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:37:04,141 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:37:04,141 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:37:04,142 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:37:04,142 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:37:04,143 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:37:04,144 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:37:04,145 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:37:04,146 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:37:04,148 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:37:04,149 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:37:04,150 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:37:04,150 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:37:04,151 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:37:04,153 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:37:04,153 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:37:04,153 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:37:04,153 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:37:04,154 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:37:04,154 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:37:04,154 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:37:04,155 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:37:04,156 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:37:04,156 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:37:04,157 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:37:04,157 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:37:04,158 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:37:04,158 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:37:04,158 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:37:04,159 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:37:04,160 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:37:04,160 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_3db5504c-6870-4d81-93ec-5f5fa6e5ed6d/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:37:04,170 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:37:04,170 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:37:04,171 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:37:04,171 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:37:04,172 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:37:04,172 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:37:04,172 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:37:04,172 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:37:04,172 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:37:04,172 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:37:04,172 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:37:04,172 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:37:04,173 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:37:04,173 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:37:04,173 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:37:04,173 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:37:04,173 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:37:04,173 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:37:04,174 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:37:04,174 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:37:04,174 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:37:04,174 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:37:04,174 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:37:04,174 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:37:04,174 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:37:04,174 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:37:04,175 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:37:04,175 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:37:04,175 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:37:04,175 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_3db5504c-6870-4d81-93ec-5f5fa6e5ed6d/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5dd8d3675b903afe7ffe1c2987742cff82f33739 [2019-12-07 12:37:04,282 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:37:04,292 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:37:04,295 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:37:04,297 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:37:04,297 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:37:04,298 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_3db5504c-6870-4d81-93ec-5f5fa6e5ed6d/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/podwr001_rmo.opt.i [2019-12-07 12:37:04,340 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_3db5504c-6870-4d81-93ec-5f5fa6e5ed6d/bin/uautomizer/data/ff17a6806/238da3feb8d042cc9bd99cf6366dfc8a/FLAG708e2128d [2019-12-07 12:37:04,798 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:37:04,798 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_3db5504c-6870-4d81-93ec-5f5fa6e5ed6d/sv-benchmarks/c/pthread-wmm/podwr001_rmo.opt.i [2019-12-07 12:37:04,809 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_3db5504c-6870-4d81-93ec-5f5fa6e5ed6d/bin/uautomizer/data/ff17a6806/238da3feb8d042cc9bd99cf6366dfc8a/FLAG708e2128d [2019-12-07 12:37:05,321 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_3db5504c-6870-4d81-93ec-5f5fa6e5ed6d/bin/uautomizer/data/ff17a6806/238da3feb8d042cc9bd99cf6366dfc8a [2019-12-07 12:37:05,324 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:37:05,325 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:37:05,326 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:37:05,326 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:37:05,328 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:37:05,329 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:37:05" (1/1) ... [2019-12-07 12:37:05,331 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4060fd46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:37:05, skipping insertion in model container [2019-12-07 12:37:05,331 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:37:05" (1/1) ... [2019-12-07 12:37:05,337 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:37:05,368 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:37:05,634 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:37:05,641 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:37:05,683 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:37:05,731 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:37:05,731 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:37:05 WrapperNode [2019-12-07 12:37:05,731 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:37:05,732 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:37:05,732 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:37:05,732 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:37:05,737 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:37:05" (1/1) ... [2019-12-07 12:37:05,750 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:37:05" (1/1) ... [2019-12-07 12:37:05,768 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:37:05,768 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:37:05,768 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:37:05,768 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:37:05,775 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:37:05" (1/1) ... [2019-12-07 12:37:05,775 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:37:05" (1/1) ... [2019-12-07 12:37:05,778 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:37:05" (1/1) ... [2019-12-07 12:37:05,778 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:37:05" (1/1) ... [2019-12-07 12:37:05,785 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:37:05" (1/1) ... [2019-12-07 12:37:05,788 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:37:05" (1/1) ... [2019-12-07 12:37:05,790 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:37:05" (1/1) ... [2019-12-07 12:37:05,794 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:37:05,794 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:37:05,794 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:37:05,794 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:37:05,795 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:37:05" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_3db5504c-6870-4d81-93ec-5f5fa6e5ed6d/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:37:05,838 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:37:05,838 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:37:05,838 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:37:05,838 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:37:05,838 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:37:05,839 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:37:05,839 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:37:05,839 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:37:05,839 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 12:37:05,839 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 12:37:05,839 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:37:05,839 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:37:05,839 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:37:05,840 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:37:06,204 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:37:06,204 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:37:06,205 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:37:06 BoogieIcfgContainer [2019-12-07 12:37:06,205 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:37:06,206 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:37:06,206 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:37:06,208 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:37:06,208 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:37:05" (1/3) ... [2019-12-07 12:37:06,209 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@787408b3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:37:06, skipping insertion in model container [2019-12-07 12:37:06,209 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:37:05" (2/3) ... [2019-12-07 12:37:06,209 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@787408b3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:37:06, skipping insertion in model container [2019-12-07 12:37:06,210 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:37:06" (3/3) ... [2019-12-07 12:37:06,211 INFO L109 eAbstractionObserver]: Analyzing ICFG podwr001_rmo.opt.i [2019-12-07 12:37:06,218 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:37:06,218 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:37:06,224 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:37:06,224 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:37:06,252 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,252 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,252 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,252 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,252 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,252 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,253 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,253 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,253 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,253 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,254 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,254 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,254 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,254 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,254 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,255 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,255 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,255 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,255 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,255 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,255 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,256 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,256 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,256 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,256 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,256 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,257 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,257 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,257 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,257 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,257 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,257 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,258 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,258 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,258 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,258 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,259 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,259 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,259 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,259 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,259 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,259 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,260 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,260 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,260 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,260 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,260 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,261 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,261 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,261 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,261 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,261 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,261 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,262 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,262 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,262 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,262 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,262 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,263 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,263 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,263 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,263 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,263 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,263 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,264 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,265 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,265 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,265 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,265 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,265 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,265 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,265 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,266 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,266 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,266 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,266 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,266 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,267 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,267 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,267 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,267 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,267 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,267 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,268 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,268 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,268 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,268 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,268 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,268 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,270 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,270 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,270 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,270 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,270 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,270 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,271 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,271 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,271 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,271 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,271 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,271 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,274 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,274 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,274 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,274 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,274 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,274 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,280 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,280 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,280 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,280 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,280 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,280 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,280 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,281 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,281 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,281 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,281 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,281 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,281 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,282 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,282 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,282 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,282 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,282 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,282 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,283 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,283 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,283 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,283 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,283 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,283 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:37:06,297 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 12:37:06,311 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:37:06,311 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:37:06,311 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:37:06,311 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:37:06,311 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:37:06,311 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:37:06,311 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:37:06,311 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:37:06,322 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 12:37:06,323 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 12:37:06,386 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 12:37:06,387 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:37:06,397 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:37:06,412 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 12:37:06,441 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 12:37:06,441 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:37:06,446 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:37:06,462 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 12:37:06,463 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:37:09,394 WARN L192 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 12:37:09,697 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130045 [2019-12-07 12:37:09,697 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 12:37:09,699 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 12:37:30,245 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 126452 states. [2019-12-07 12:37:30,247 INFO L276 IsEmpty]: Start isEmpty. Operand 126452 states. [2019-12-07 12:37:30,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 12:37:30,251 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:37:30,251 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 12:37:30,252 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:37:30,256 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:37:30,256 INFO L82 PathProgramCache]: Analyzing trace with hash 913925, now seen corresponding path program 1 times [2019-12-07 12:37:30,262 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:37:30,263 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256000025] [2019-12-07 12:37:30,263 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:37:30,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:37:30,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:37:30,388 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1256000025] [2019-12-07 12:37:30,389 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:37:30,389 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:37:30,390 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1345027404] [2019-12-07 12:37:30,393 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:37:30,393 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:37:30,401 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:37:30,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:37:30,403 INFO L87 Difference]: Start difference. First operand 126452 states. Second operand 3 states. [2019-12-07 12:37:31,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:37:31,290 INFO L93 Difference]: Finished difference Result 125570 states and 538788 transitions. [2019-12-07 12:37:31,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:37:31,292 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 12:37:31,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:37:31,791 INFO L225 Difference]: With dead ends: 125570 [2019-12-07 12:37:31,791 INFO L226 Difference]: Without dead ends: 111010 [2019-12-07 12:37:31,792 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:37:36,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111010 states. [2019-12-07 12:37:39,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111010 to 111010. [2019-12-07 12:37:39,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111010 states. [2019-12-07 12:37:39,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111010 states to 111010 states and 475060 transitions. [2019-12-07 12:37:39,886 INFO L78 Accepts]: Start accepts. Automaton has 111010 states and 475060 transitions. Word has length 3 [2019-12-07 12:37:39,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:37:39,886 INFO L462 AbstractCegarLoop]: Abstraction has 111010 states and 475060 transitions. [2019-12-07 12:37:39,886 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:37:39,887 INFO L276 IsEmpty]: Start isEmpty. Operand 111010 states and 475060 transitions. [2019-12-07 12:37:39,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 12:37:39,890 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:37:39,890 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:37:39,890 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:37:39,891 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:37:39,891 INFO L82 PathProgramCache]: Analyzing trace with hash -1753094800, now seen corresponding path program 1 times [2019-12-07 12:37:39,891 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:37:39,891 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725471159] [2019-12-07 12:37:39,891 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:37:39,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:37:39,952 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:37:39,953 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [725471159] [2019-12-07 12:37:39,953 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:37:39,953 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:37:39,953 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [930092292] [2019-12-07 12:37:39,954 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:37:39,954 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:37:39,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:37:39,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:37:39,954 INFO L87 Difference]: Start difference. First operand 111010 states and 475060 transitions. Second operand 4 states. [2019-12-07 12:37:40,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:37:40,938 INFO L93 Difference]: Finished difference Result 172646 states and 710109 transitions. [2019-12-07 12:37:40,939 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:37:40,939 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 12:37:40,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:37:41,801 INFO L225 Difference]: With dead ends: 172646 [2019-12-07 12:37:41,801 INFO L226 Difference]: Without dead ends: 172548 [2019-12-07 12:37:41,802 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:37:49,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172548 states. [2019-12-07 12:37:51,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172548 to 158936. [2019-12-07 12:37:51,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158936 states. [2019-12-07 12:37:52,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158936 states to 158936 states and 661803 transitions. [2019-12-07 12:37:52,372 INFO L78 Accepts]: Start accepts. Automaton has 158936 states and 661803 transitions. Word has length 11 [2019-12-07 12:37:52,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:37:52,373 INFO L462 AbstractCegarLoop]: Abstraction has 158936 states and 661803 transitions. [2019-12-07 12:37:52,373 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:37:52,373 INFO L276 IsEmpty]: Start isEmpty. Operand 158936 states and 661803 transitions. [2019-12-07 12:37:52,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:37:52,378 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:37:52,378 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:37:52,378 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:37:52,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:37:52,378 INFO L82 PathProgramCache]: Analyzing trace with hash 216434073, now seen corresponding path program 1 times [2019-12-07 12:37:52,379 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:37:52,379 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [264245740] [2019-12-07 12:37:52,379 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:37:52,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:37:52,430 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:37:52,430 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [264245740] [2019-12-07 12:37:52,430 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:37:52,430 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:37:52,430 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [329532188] [2019-12-07 12:37:52,430 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:37:52,430 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:37:52,431 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:37:52,431 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:37:52,431 INFO L87 Difference]: Start difference. First operand 158936 states and 661803 transitions. Second operand 4 states. [2019-12-07 12:37:53,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:37:53,598 INFO L93 Difference]: Finished difference Result 228902 states and 931210 transitions. [2019-12-07 12:37:53,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:37:53,598 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 12:37:53,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:37:54,196 INFO L225 Difference]: With dead ends: 228902 [2019-12-07 12:37:54,197 INFO L226 Difference]: Without dead ends: 228790 [2019-12-07 12:37:54,197 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:38:00,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228790 states. [2019-12-07 12:38:06,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228790 to 192327. [2019-12-07 12:38:06,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192327 states. [2019-12-07 12:38:06,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192327 states to 192327 states and 796272 transitions. [2019-12-07 12:38:06,660 INFO L78 Accepts]: Start accepts. Automaton has 192327 states and 796272 transitions. Word has length 13 [2019-12-07 12:38:06,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:38:06,661 INFO L462 AbstractCegarLoop]: Abstraction has 192327 states and 796272 transitions. [2019-12-07 12:38:06,661 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:38:06,661 INFO L276 IsEmpty]: Start isEmpty. Operand 192327 states and 796272 transitions. [2019-12-07 12:38:06,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:38:06,670 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:38:06,670 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:38:06,670 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:38:06,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:38:06,670 INFO L82 PathProgramCache]: Analyzing trace with hash -1948590504, now seen corresponding path program 1 times [2019-12-07 12:38:06,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:38:06,671 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [706334368] [2019-12-07 12:38:06,671 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:38:06,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:38:06,702 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:38:06,702 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [706334368] [2019-12-07 12:38:06,702 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:38:06,702 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:38:06,702 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1618438681] [2019-12-07 12:38:06,702 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:38:06,702 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:38:06,703 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:38:06,703 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:38:06,703 INFO L87 Difference]: Start difference. First operand 192327 states and 796272 transitions. Second operand 3 states. [2019-12-07 12:38:07,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:38:07,931 INFO L93 Difference]: Finished difference Result 280788 states and 1158875 transitions. [2019-12-07 12:38:07,932 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:38:07,932 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 12:38:07,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:38:09,269 INFO L225 Difference]: With dead ends: 280788 [2019-12-07 12:38:09,269 INFO L226 Difference]: Without dead ends: 280788 [2019-12-07 12:38:09,269 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:38:18,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280788 states. [2019-12-07 12:38:22,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280788 to 222888. [2019-12-07 12:38:22,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222888 states. [2019-12-07 12:38:22,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222888 states to 222888 states and 926633 transitions. [2019-12-07 12:38:22,974 INFO L78 Accepts]: Start accepts. Automaton has 222888 states and 926633 transitions. Word has length 16 [2019-12-07 12:38:22,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:38:22,974 INFO L462 AbstractCegarLoop]: Abstraction has 222888 states and 926633 transitions. [2019-12-07 12:38:22,974 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:38:22,974 INFO L276 IsEmpty]: Start isEmpty. Operand 222888 states and 926633 transitions. [2019-12-07 12:38:22,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:38:22,981 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:38:22,982 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:38:22,982 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:38:22,982 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:38:22,982 INFO L82 PathProgramCache]: Analyzing trace with hash -1821591471, now seen corresponding path program 1 times [2019-12-07 12:38:22,982 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:38:22,982 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1115984567] [2019-12-07 12:38:22,982 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:38:22,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:38:23,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:38:23,029 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1115984567] [2019-12-07 12:38:23,030 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:38:23,030 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:38:23,030 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1722791336] [2019-12-07 12:38:23,030 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:38:23,030 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:38:23,030 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:38:23,030 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:38:23,030 INFO L87 Difference]: Start difference. First operand 222888 states and 926633 transitions. Second operand 5 states. [2019-12-07 12:38:25,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:38:25,122 INFO L93 Difference]: Finished difference Result 298473 states and 1226263 transitions. [2019-12-07 12:38:25,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:38:25,123 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 12:38:25,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:38:25,889 INFO L225 Difference]: With dead ends: 298473 [2019-12-07 12:38:25,890 INFO L226 Difference]: Without dead ends: 298473 [2019-12-07 12:38:25,890 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:38:33,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298473 states. [2019-12-07 12:38:37,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298473 to 237826. [2019-12-07 12:38:37,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237826 states. [2019-12-07 12:38:38,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237826 states to 237826 states and 988542 transitions. [2019-12-07 12:38:38,476 INFO L78 Accepts]: Start accepts. Automaton has 237826 states and 988542 transitions. Word has length 16 [2019-12-07 12:38:38,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:38:38,477 INFO L462 AbstractCegarLoop]: Abstraction has 237826 states and 988542 transitions. [2019-12-07 12:38:38,477 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:38:38,477 INFO L276 IsEmpty]: Start isEmpty. Operand 237826 states and 988542 transitions. [2019-12-07 12:38:38,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 12:38:38,489 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:38:38,489 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:38:38,490 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:38:38,490 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:38:38,490 INFO L82 PathProgramCache]: Analyzing trace with hash -504931817, now seen corresponding path program 1 times [2019-12-07 12:38:38,490 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:38:38,490 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [384965083] [2019-12-07 12:38:38,490 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:38:38,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:38:38,530 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:38:38,530 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [384965083] [2019-12-07 12:38:38,530 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:38:38,530 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:38:38,530 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1755757841] [2019-12-07 12:38:38,531 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:38:38,531 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:38:38,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:38:38,531 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:38:38,531 INFO L87 Difference]: Start difference. First operand 237826 states and 988542 transitions. Second operand 3 states. [2019-12-07 12:38:41,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:38:41,703 INFO L93 Difference]: Finished difference Result 237826 states and 978678 transitions. [2019-12-07 12:38:41,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:38:41,703 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 12:38:41,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:38:42,326 INFO L225 Difference]: With dead ends: 237826 [2019-12-07 12:38:42,327 INFO L226 Difference]: Without dead ends: 237826 [2019-12-07 12:38:42,327 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:38:49,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237826 states. [2019-12-07 12:38:52,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237826 to 234480. [2019-12-07 12:38:52,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234480 states. [2019-12-07 12:38:53,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234480 states to 234480 states and 966258 transitions. [2019-12-07 12:38:53,261 INFO L78 Accepts]: Start accepts. Automaton has 234480 states and 966258 transitions. Word has length 18 [2019-12-07 12:38:53,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:38:53,261 INFO L462 AbstractCegarLoop]: Abstraction has 234480 states and 966258 transitions. [2019-12-07 12:38:53,261 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:38:53,261 INFO L276 IsEmpty]: Start isEmpty. Operand 234480 states and 966258 transitions. [2019-12-07 12:38:53,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 12:38:53,272 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:38:53,272 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:38:53,273 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:38:53,273 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:38:53,273 INFO L82 PathProgramCache]: Analyzing trace with hash 138207619, now seen corresponding path program 1 times [2019-12-07 12:38:53,273 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:38:53,273 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616124732] [2019-12-07 12:38:53,273 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:38:53,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:38:53,310 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:38:53,310 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616124732] [2019-12-07 12:38:53,310 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:38:53,310 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:38:53,310 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2136084641] [2019-12-07 12:38:53,311 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:38:53,311 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:38:53,311 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:38:53,311 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:38:53,311 INFO L87 Difference]: Start difference. First operand 234480 states and 966258 transitions. Second operand 3 states. [2019-12-07 12:38:53,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:38:53,434 INFO L93 Difference]: Finished difference Result 42613 states and 138837 transitions. [2019-12-07 12:38:53,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:38:53,434 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 12:38:53,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:38:53,496 INFO L225 Difference]: With dead ends: 42613 [2019-12-07 12:38:53,496 INFO L226 Difference]: Without dead ends: 42613 [2019-12-07 12:38:53,496 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:38:53,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42613 states. [2019-12-07 12:38:54,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42613 to 42613. [2019-12-07 12:38:54,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42613 states. [2019-12-07 12:38:54,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42613 states to 42613 states and 138837 transitions. [2019-12-07 12:38:54,236 INFO L78 Accepts]: Start accepts. Automaton has 42613 states and 138837 transitions. Word has length 18 [2019-12-07 12:38:54,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:38:54,237 INFO L462 AbstractCegarLoop]: Abstraction has 42613 states and 138837 transitions. [2019-12-07 12:38:54,237 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:38:54,237 INFO L276 IsEmpty]: Start isEmpty. Operand 42613 states and 138837 transitions. [2019-12-07 12:38:54,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 12:38:54,243 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:38:54,244 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:38:54,244 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:38:54,244 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:38:54,244 INFO L82 PathProgramCache]: Analyzing trace with hash -187432510, now seen corresponding path program 1 times [2019-12-07 12:38:54,244 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:38:54,244 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1852353759] [2019-12-07 12:38:54,244 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:38:54,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:38:54,292 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:38:54,293 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1852353759] [2019-12-07 12:38:54,293 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:38:54,293 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:38:54,293 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [496898745] [2019-12-07 12:38:54,293 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:38:54,294 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:38:54,294 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:38:54,294 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:38:54,294 INFO L87 Difference]: Start difference. First operand 42613 states and 138837 transitions. Second operand 6 states. [2019-12-07 12:38:54,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:38:54,863 INFO L93 Difference]: Finished difference Result 65056 states and 205947 transitions. [2019-12-07 12:38:54,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:38:54,863 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 12:38:54,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:38:54,959 INFO L225 Difference]: With dead ends: 65056 [2019-12-07 12:38:54,960 INFO L226 Difference]: Without dead ends: 65042 [2019-12-07 12:38:54,960 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:38:55,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65042 states. [2019-12-07 12:38:56,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65042 to 42278. [2019-12-07 12:38:56,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42278 states. [2019-12-07 12:38:56,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42278 states to 42278 states and 137592 transitions. [2019-12-07 12:38:56,259 INFO L78 Accepts]: Start accepts. Automaton has 42278 states and 137592 transitions. Word has length 22 [2019-12-07 12:38:56,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:38:56,259 INFO L462 AbstractCegarLoop]: Abstraction has 42278 states and 137592 transitions. [2019-12-07 12:38:56,259 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:38:56,259 INFO L276 IsEmpty]: Start isEmpty. Operand 42278 states and 137592 transitions. [2019-12-07 12:38:56,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 12:38:56,270 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:38:56,271 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:38:56,271 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:38:56,271 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:38:56,271 INFO L82 PathProgramCache]: Analyzing trace with hash -200714255, now seen corresponding path program 1 times [2019-12-07 12:38:56,271 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:38:56,271 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2030730158] [2019-12-07 12:38:56,271 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:38:56,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:38:56,327 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:38:56,327 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2030730158] [2019-12-07 12:38:56,328 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:38:56,328 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:38:56,328 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [189377400] [2019-12-07 12:38:56,328 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:38:56,328 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:38:56,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:38:56,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:38:56,329 INFO L87 Difference]: Start difference. First operand 42278 states and 137592 transitions. Second operand 5 states. [2019-12-07 12:38:56,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:38:56,752 INFO L93 Difference]: Finished difference Result 59726 states and 189950 transitions. [2019-12-07 12:38:56,753 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:38:56,753 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 12:38:56,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:38:56,846 INFO L225 Difference]: With dead ends: 59726 [2019-12-07 12:38:56,846 INFO L226 Difference]: Without dead ends: 59700 [2019-12-07 12:38:56,846 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:38:57,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59700 states. [2019-12-07 12:38:57,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59700 to 50129. [2019-12-07 12:38:57,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50129 states. [2019-12-07 12:38:57,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50129 states to 50129 states and 162181 transitions. [2019-12-07 12:38:57,847 INFO L78 Accepts]: Start accepts. Automaton has 50129 states and 162181 transitions. Word has length 25 [2019-12-07 12:38:57,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:38:57,848 INFO L462 AbstractCegarLoop]: Abstraction has 50129 states and 162181 transitions. [2019-12-07 12:38:57,848 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:38:57,848 INFO L276 IsEmpty]: Start isEmpty. Operand 50129 states and 162181 transitions. [2019-12-07 12:38:57,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:38:57,864 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:38:57,864 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:38:57,864 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:38:57,865 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:38:57,865 INFO L82 PathProgramCache]: Analyzing trace with hash 611460705, now seen corresponding path program 1 times [2019-12-07 12:38:57,865 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:38:57,865 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1067444188] [2019-12-07 12:38:57,865 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:38:57,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:38:57,919 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:38:57,920 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1067444188] [2019-12-07 12:38:57,920 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:38:57,920 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:38:57,920 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1590929432] [2019-12-07 12:38:57,920 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:38:57,921 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:38:57,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:38:57,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:38:57,921 INFO L87 Difference]: Start difference. First operand 50129 states and 162181 transitions. Second operand 6 states. [2019-12-07 12:38:58,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:38:58,452 INFO L93 Difference]: Finished difference Result 71592 states and 224983 transitions. [2019-12-07 12:38:58,452 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 12:38:58,452 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 12:38:58,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:38:58,556 INFO L225 Difference]: With dead ends: 71592 [2019-12-07 12:38:58,556 INFO L226 Difference]: Without dead ends: 71508 [2019-12-07 12:38:58,556 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:38:58,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71508 states. [2019-12-07 12:38:59,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71508 to 53724. [2019-12-07 12:38:59,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53724 states. [2019-12-07 12:38:59,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53724 states to 53724 states and 172706 transitions. [2019-12-07 12:38:59,728 INFO L78 Accepts]: Start accepts. Automaton has 53724 states and 172706 transitions. Word has length 27 [2019-12-07 12:38:59,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:38:59,728 INFO L462 AbstractCegarLoop]: Abstraction has 53724 states and 172706 transitions. [2019-12-07 12:38:59,728 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:38:59,728 INFO L276 IsEmpty]: Start isEmpty. Operand 53724 states and 172706 transitions. [2019-12-07 12:38:59,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 12:38:59,749 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:38:59,749 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:38:59,749 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:38:59,749 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:38:59,749 INFO L82 PathProgramCache]: Analyzing trace with hash -969078927, now seen corresponding path program 1 times [2019-12-07 12:38:59,750 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:38:59,750 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97979357] [2019-12-07 12:38:59,750 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:38:59,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:38:59,798 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:38:59,799 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [97979357] [2019-12-07 12:38:59,799 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:38:59,799 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:38:59,799 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [783627466] [2019-12-07 12:38:59,799 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:38:59,799 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:38:59,800 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:38:59,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:38:59,800 INFO L87 Difference]: Start difference. First operand 53724 states and 172706 transitions. Second operand 4 states. [2019-12-07 12:38:59,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:38:59,864 INFO L93 Difference]: Finished difference Result 20754 states and 64022 transitions. [2019-12-07 12:38:59,865 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:38:59,865 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 12:38:59,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:38:59,892 INFO L225 Difference]: With dead ends: 20754 [2019-12-07 12:38:59,892 INFO L226 Difference]: Without dead ends: 20754 [2019-12-07 12:38:59,892 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:38:59,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20754 states. [2019-12-07 12:39:00,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20754 to 19543. [2019-12-07 12:39:00,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19543 states. [2019-12-07 12:39:00,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19543 states to 19543 states and 60338 transitions. [2019-12-07 12:39:00,212 INFO L78 Accepts]: Start accepts. Automaton has 19543 states and 60338 transitions. Word has length 29 [2019-12-07 12:39:00,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:39:00,212 INFO L462 AbstractCegarLoop]: Abstraction has 19543 states and 60338 transitions. [2019-12-07 12:39:00,212 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:39:00,212 INFO L276 IsEmpty]: Start isEmpty. Operand 19543 states and 60338 transitions. [2019-12-07 12:39:00,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 12:39:00,234 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:39:00,234 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:39:00,234 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:39:00,235 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:39:00,235 INFO L82 PathProgramCache]: Analyzing trace with hash -1170391984, now seen corresponding path program 1 times [2019-12-07 12:39:00,235 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:39:00,235 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [809447624] [2019-12-07 12:39:00,235 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:39:00,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:39:00,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:39:00,309 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [809447624] [2019-12-07 12:39:00,309 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:39:00,309 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:39:00,309 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1548339406] [2019-12-07 12:39:00,309 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:39:00,309 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:39:00,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:39:00,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:39:00,310 INFO L87 Difference]: Start difference. First operand 19543 states and 60338 transitions. Second operand 7 states. [2019-12-07 12:39:01,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:39:01,030 INFO L93 Difference]: Finished difference Result 27225 states and 81337 transitions. [2019-12-07 12:39:01,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 12:39:01,031 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 12:39:01,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:39:01,064 INFO L225 Difference]: With dead ends: 27225 [2019-12-07 12:39:01,064 INFO L226 Difference]: Without dead ends: 27225 [2019-12-07 12:39:01,064 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 12:39:01,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27225 states. [2019-12-07 12:39:01,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27225 to 19532. [2019-12-07 12:39:01,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19532 states. [2019-12-07 12:39:01,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19532 states to 19532 states and 60108 transitions. [2019-12-07 12:39:01,431 INFO L78 Accepts]: Start accepts. Automaton has 19532 states and 60108 transitions. Word has length 33 [2019-12-07 12:39:01,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:39:01,431 INFO L462 AbstractCegarLoop]: Abstraction has 19532 states and 60108 transitions. [2019-12-07 12:39:01,431 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:39:01,431 INFO L276 IsEmpty]: Start isEmpty. Operand 19532 states and 60108 transitions. [2019-12-07 12:39:01,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 12:39:01,449 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:39:01,449 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:39:01,449 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:39:01,449 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:39:01,449 INFO L82 PathProgramCache]: Analyzing trace with hash 1293540528, now seen corresponding path program 1 times [2019-12-07 12:39:01,449 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:39:01,450 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046704093] [2019-12-07 12:39:01,450 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:39:01,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:39:01,498 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:39:01,499 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1046704093] [2019-12-07 12:39:01,499 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:39:01,499 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:39:01,499 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1174923550] [2019-12-07 12:39:01,499 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:39:01,499 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:39:01,500 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:39:01,500 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:39:01,500 INFO L87 Difference]: Start difference. First operand 19532 states and 60108 transitions. Second operand 5 states. [2019-12-07 12:39:01,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:39:01,932 INFO L93 Difference]: Finished difference Result 27614 states and 84242 transitions. [2019-12-07 12:39:01,932 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 12:39:01,933 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 12:39:01,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:39:01,965 INFO L225 Difference]: With dead ends: 27614 [2019-12-07 12:39:01,965 INFO L226 Difference]: Without dead ends: 27614 [2019-12-07 12:39:01,965 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:39:02,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27614 states. [2019-12-07 12:39:02,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27614 to 24279. [2019-12-07 12:39:02,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24279 states. [2019-12-07 12:39:02,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24279 states to 24279 states and 74944 transitions. [2019-12-07 12:39:02,370 INFO L78 Accepts]: Start accepts. Automaton has 24279 states and 74944 transitions. Word has length 40 [2019-12-07 12:39:02,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:39:02,370 INFO L462 AbstractCegarLoop]: Abstraction has 24279 states and 74944 transitions. [2019-12-07 12:39:02,370 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:39:02,370 INFO L276 IsEmpty]: Start isEmpty. Operand 24279 states and 74944 transitions. [2019-12-07 12:39:02,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 12:39:02,392 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:39:02,392 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:39:02,392 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:39:02,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:39:02,393 INFO L82 PathProgramCache]: Analyzing trace with hash 1864320792, now seen corresponding path program 2 times [2019-12-07 12:39:02,393 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:39:02,393 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [167248214] [2019-12-07 12:39:02,393 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:39:02,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:39:02,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:39:02,434 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [167248214] [2019-12-07 12:39:02,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:39:02,435 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:39:02,435 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1943092924] [2019-12-07 12:39:02,435 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:39:02,435 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:39:02,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:39:02,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:39:02,436 INFO L87 Difference]: Start difference. First operand 24279 states and 74944 transitions. Second operand 3 states. [2019-12-07 12:39:02,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:39:02,496 INFO L93 Difference]: Finished difference Result 23098 states and 70342 transitions. [2019-12-07 12:39:02,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:39:02,497 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 12:39:02,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:39:02,524 INFO L225 Difference]: With dead ends: 23098 [2019-12-07 12:39:02,524 INFO L226 Difference]: Without dead ends: 23098 [2019-12-07 12:39:02,524 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:39:02,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23098 states. [2019-12-07 12:39:02,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23098 to 22624. [2019-12-07 12:39:02,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22624 states. [2019-12-07 12:39:02,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22624 states to 22624 states and 69000 transitions. [2019-12-07 12:39:02,857 INFO L78 Accepts]: Start accepts. Automaton has 22624 states and 69000 transitions. Word has length 40 [2019-12-07 12:39:02,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:39:02,857 INFO L462 AbstractCegarLoop]: Abstraction has 22624 states and 69000 transitions. [2019-12-07 12:39:02,857 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:39:02,857 INFO L276 IsEmpty]: Start isEmpty. Operand 22624 states and 69000 transitions. [2019-12-07 12:39:02,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 12:39:02,882 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:39:02,882 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:39:02,882 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:39:02,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:39:02,883 INFO L82 PathProgramCache]: Analyzing trace with hash -448595313, now seen corresponding path program 1 times [2019-12-07 12:39:02,883 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:39:02,883 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [532199616] [2019-12-07 12:39:02,883 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:39:02,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:39:02,925 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:39:02,925 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [532199616] [2019-12-07 12:39:02,925 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:39:02,925 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:39:02,925 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [483694920] [2019-12-07 12:39:02,926 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:39:02,926 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:39:02,926 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:39:02,926 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:39:02,926 INFO L87 Difference]: Start difference. First operand 22624 states and 69000 transitions. Second operand 5 states. [2019-12-07 12:39:02,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:39:02,990 INFO L93 Difference]: Finished difference Result 21011 states and 65382 transitions. [2019-12-07 12:39:02,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:39:02,991 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 12:39:02,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:39:03,015 INFO L225 Difference]: With dead ends: 21011 [2019-12-07 12:39:03,015 INFO L226 Difference]: Without dead ends: 21011 [2019-12-07 12:39:03,016 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:39:03,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21011 states. [2019-12-07 12:39:03,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21011 to 19292. [2019-12-07 12:39:03,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19292 states. [2019-12-07 12:39:03,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19292 states to 19292 states and 60243 transitions. [2019-12-07 12:39:03,319 INFO L78 Accepts]: Start accepts. Automaton has 19292 states and 60243 transitions. Word has length 41 [2019-12-07 12:39:03,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:39:03,319 INFO L462 AbstractCegarLoop]: Abstraction has 19292 states and 60243 transitions. [2019-12-07 12:39:03,319 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:39:03,319 INFO L276 IsEmpty]: Start isEmpty. Operand 19292 states and 60243 transitions. [2019-12-07 12:39:03,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:39:03,337 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:39:03,337 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:39:03,337 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:39:03,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:39:03,337 INFO L82 PathProgramCache]: Analyzing trace with hash 1623524162, now seen corresponding path program 1 times [2019-12-07 12:39:03,337 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:39:03,337 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [459141289] [2019-12-07 12:39:03,337 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:39:03,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:39:03,378 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:39:03,378 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [459141289] [2019-12-07 12:39:03,378 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:39:03,378 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:39:03,378 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [829106087] [2019-12-07 12:39:03,379 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:39:03,379 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:39:03,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:39:03,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:39:03,379 INFO L87 Difference]: Start difference. First operand 19292 states and 60243 transitions. Second operand 3 states. [2019-12-07 12:39:03,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:39:03,467 INFO L93 Difference]: Finished difference Result 22783 states and 70875 transitions. [2019-12-07 12:39:03,468 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:39:03,468 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 12:39:03,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:39:03,494 INFO L225 Difference]: With dead ends: 22783 [2019-12-07 12:39:03,495 INFO L226 Difference]: Without dead ends: 22783 [2019-12-07 12:39:03,495 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:39:03,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22783 states. [2019-12-07 12:39:03,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22783 to 19325. [2019-12-07 12:39:03,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19325 states. [2019-12-07 12:39:03,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19325 states to 19325 states and 60376 transitions. [2019-12-07 12:39:03,823 INFO L78 Accepts]: Start accepts. Automaton has 19325 states and 60376 transitions. Word has length 66 [2019-12-07 12:39:03,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:39:03,824 INFO L462 AbstractCegarLoop]: Abstraction has 19325 states and 60376 transitions. [2019-12-07 12:39:03,824 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:39:03,824 INFO L276 IsEmpty]: Start isEmpty. Operand 19325 states and 60376 transitions. [2019-12-07 12:39:03,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:39:03,841 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:39:03,841 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:39:03,842 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:39:03,842 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:39:03,842 INFO L82 PathProgramCache]: Analyzing trace with hash 600429612, now seen corresponding path program 1 times [2019-12-07 12:39:03,842 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:39:03,842 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [106540304] [2019-12-07 12:39:03,842 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:39:03,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:39:03,891 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:39:03,891 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [106540304] [2019-12-07 12:39:03,891 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:39:03,891 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:39:03,892 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [848719170] [2019-12-07 12:39:03,892 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:39:03,892 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:39:03,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:39:03,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:39:03,892 INFO L87 Difference]: Start difference. First operand 19325 states and 60376 transitions. Second operand 4 states. [2019-12-07 12:39:04,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:39:04,025 INFO L93 Difference]: Finished difference Result 22639 states and 70348 transitions. [2019-12-07 12:39:04,026 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:39:04,026 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 12:39:04,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:39:04,050 INFO L225 Difference]: With dead ends: 22639 [2019-12-07 12:39:04,050 INFO L226 Difference]: Without dead ends: 22639 [2019-12-07 12:39:04,050 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:39:04,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22639 states. [2019-12-07 12:39:04,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22639 to 18887. [2019-12-07 12:39:04,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18887 states. [2019-12-07 12:39:04,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18887 states to 18887 states and 59038 transitions. [2019-12-07 12:39:04,366 INFO L78 Accepts]: Start accepts. Automaton has 18887 states and 59038 transitions. Word has length 67 [2019-12-07 12:39:04,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:39:04,367 INFO L462 AbstractCegarLoop]: Abstraction has 18887 states and 59038 transitions. [2019-12-07 12:39:04,367 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:39:04,367 INFO L276 IsEmpty]: Start isEmpty. Operand 18887 states and 59038 transitions. [2019-12-07 12:39:04,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:39:04,384 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:39:04,384 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:39:04,384 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:39:04,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:39:04,385 INFO L82 PathProgramCache]: Analyzing trace with hash 384042528, now seen corresponding path program 1 times [2019-12-07 12:39:04,385 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:39:04,385 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [844554477] [2019-12-07 12:39:04,385 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:39:04,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:39:04,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:39:04,544 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [844554477] [2019-12-07 12:39:04,544 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:39:04,545 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 12:39:04,545 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [316063867] [2019-12-07 12:39:04,545 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 12:39:04,545 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:39:04,545 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 12:39:04,545 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:39:04,545 INFO L87 Difference]: Start difference. First operand 18887 states and 59038 transitions. Second operand 10 states. [2019-12-07 12:39:05,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:39:05,989 INFO L93 Difference]: Finished difference Result 43046 states and 134343 transitions. [2019-12-07 12:39:05,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 12:39:05,989 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 12:39:05,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:39:06,025 INFO L225 Difference]: With dead ends: 43046 [2019-12-07 12:39:06,025 INFO L226 Difference]: Without dead ends: 30094 [2019-12-07 12:39:06,026 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 121 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=140, Invalid=562, Unknown=0, NotChecked=0, Total=702 [2019-12-07 12:39:06,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30094 states. [2019-12-07 12:39:06,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30094 to 22239. [2019-12-07 12:39:06,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22239 states. [2019-12-07 12:39:06,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22239 states to 22239 states and 69048 transitions. [2019-12-07 12:39:06,434 INFO L78 Accepts]: Start accepts. Automaton has 22239 states and 69048 transitions. Word has length 67 [2019-12-07 12:39:06,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:39:06,434 INFO L462 AbstractCegarLoop]: Abstraction has 22239 states and 69048 transitions. [2019-12-07 12:39:06,434 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 12:39:06,434 INFO L276 IsEmpty]: Start isEmpty. Operand 22239 states and 69048 transitions. [2019-12-07 12:39:06,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:39:06,454 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:39:06,454 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:39:06,454 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:39:06,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:39:06,454 INFO L82 PathProgramCache]: Analyzing trace with hash 1908292690, now seen corresponding path program 2 times [2019-12-07 12:39:06,454 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:39:06,454 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1625190552] [2019-12-07 12:39:06,454 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:39:06,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:39:06,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:39:06,624 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1625190552] [2019-12-07 12:39:06,624 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:39:06,624 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 12:39:06,624 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [194645811] [2019-12-07 12:39:06,625 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 12:39:06,625 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:39:06,625 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 12:39:06,625 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:39:06,625 INFO L87 Difference]: Start difference. First operand 22239 states and 69048 transitions. Second operand 10 states. [2019-12-07 12:39:07,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:39:07,485 INFO L93 Difference]: Finished difference Result 57358 states and 178709 transitions. [2019-12-07 12:39:07,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 12:39:07,485 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 12:39:07,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:39:07,556 INFO L225 Difference]: With dead ends: 57358 [2019-12-07 12:39:07,556 INFO L226 Difference]: Without dead ends: 51327 [2019-12-07 12:39:07,557 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 221 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=216, Invalid=776, Unknown=0, NotChecked=0, Total=992 [2019-12-07 12:39:07,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51327 states. [2019-12-07 12:39:08,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51327 to 28792. [2019-12-07 12:39:08,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28792 states. [2019-12-07 12:39:08,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28792 states to 28792 states and 90092 transitions. [2019-12-07 12:39:08,220 INFO L78 Accepts]: Start accepts. Automaton has 28792 states and 90092 transitions. Word has length 67 [2019-12-07 12:39:08,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:39:08,221 INFO L462 AbstractCegarLoop]: Abstraction has 28792 states and 90092 transitions. [2019-12-07 12:39:08,221 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 12:39:08,221 INFO L276 IsEmpty]: Start isEmpty. Operand 28792 states and 90092 transitions. [2019-12-07 12:39:08,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:39:08,250 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:39:08,250 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:39:08,251 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:39:08,251 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:39:08,251 INFO L82 PathProgramCache]: Analyzing trace with hash 1657509328, now seen corresponding path program 3 times [2019-12-07 12:39:08,251 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:39:08,251 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [140960237] [2019-12-07 12:39:08,251 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:39:08,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:39:08,360 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:39:08,360 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [140960237] [2019-12-07 12:39:08,360 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:39:08,360 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 12:39:08,360 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2142169989] [2019-12-07 12:39:08,361 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 12:39:08,361 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:39:08,361 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 12:39:08,361 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:39:08,361 INFO L87 Difference]: Start difference. First operand 28792 states and 90092 transitions. Second operand 10 states. [2019-12-07 12:39:09,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:39:09,117 INFO L93 Difference]: Finished difference Result 55890 states and 172669 transitions. [2019-12-07 12:39:09,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 12:39:09,118 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 12:39:09,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:39:09,168 INFO L225 Difference]: With dead ends: 55890 [2019-12-07 12:39:09,168 INFO L226 Difference]: Without dead ends: 39625 [2019-12-07 12:39:09,168 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 249 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=226, Invalid=830, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 12:39:09,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39625 states. [2019-12-07 12:39:09,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39625 to 22672. [2019-12-07 12:39:09,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22672 states. [2019-12-07 12:39:09,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22672 states to 22672 states and 70050 transitions. [2019-12-07 12:39:09,649 INFO L78 Accepts]: Start accepts. Automaton has 22672 states and 70050 transitions. Word has length 67 [2019-12-07 12:39:09,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:39:09,649 INFO L462 AbstractCegarLoop]: Abstraction has 22672 states and 70050 transitions. [2019-12-07 12:39:09,649 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 12:39:09,649 INFO L276 IsEmpty]: Start isEmpty. Operand 22672 states and 70050 transitions. [2019-12-07 12:39:09,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:39:09,671 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:39:09,671 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:39:09,671 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:39:09,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:39:09,671 INFO L82 PathProgramCache]: Analyzing trace with hash 993635084, now seen corresponding path program 4 times [2019-12-07 12:39:09,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:39:09,671 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [928067307] [2019-12-07 12:39:09,671 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:39:09,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:39:09,791 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:39:09,791 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [928067307] [2019-12-07 12:39:09,792 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:39:09,792 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:39:09,792 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [856471684] [2019-12-07 12:39:09,792 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:39:09,792 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:39:09,792 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:39:09,792 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:39:09,792 INFO L87 Difference]: Start difference. First operand 22672 states and 70050 transitions. Second operand 11 states. [2019-12-07 12:39:11,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:39:11,919 INFO L93 Difference]: Finished difference Result 35379 states and 109090 transitions. [2019-12-07 12:39:11,919 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 12:39:11,919 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 12:39:11,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:39:11,958 INFO L225 Difference]: With dead ends: 35379 [2019-12-07 12:39:11,958 INFO L226 Difference]: Without dead ends: 31395 [2019-12-07 12:39:11,959 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=341, Unknown=0, NotChecked=0, Total=420 [2019-12-07 12:39:12,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31395 states. [2019-12-07 12:39:12,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31395 to 22550. [2019-12-07 12:39:12,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22550 states. [2019-12-07 12:39:12,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22550 states to 22550 states and 69647 transitions. [2019-12-07 12:39:12,461 INFO L78 Accepts]: Start accepts. Automaton has 22550 states and 69647 transitions. Word has length 67 [2019-12-07 12:39:12,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:39:12,461 INFO L462 AbstractCegarLoop]: Abstraction has 22550 states and 69647 transitions. [2019-12-07 12:39:12,461 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:39:12,461 INFO L276 IsEmpty]: Start isEmpty. Operand 22550 states and 69647 transitions. [2019-12-07 12:39:12,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:39:12,481 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:39:12,481 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:39:12,481 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:39:12,482 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:39:12,482 INFO L82 PathProgramCache]: Analyzing trace with hash 397917466, now seen corresponding path program 5 times [2019-12-07 12:39:12,482 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:39:12,482 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [925730700] [2019-12-07 12:39:12,482 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:39:12,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:39:12,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:39:12,603 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [925730700] [2019-12-07 12:39:12,604 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:39:12,604 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:39:12,604 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1925536641] [2019-12-07 12:39:12,604 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:39:12,604 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:39:12,604 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:39:12,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:39:12,605 INFO L87 Difference]: Start difference. First operand 22550 states and 69647 transitions. Second operand 11 states. [2019-12-07 12:39:13,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:39:13,280 INFO L93 Difference]: Finished difference Result 44479 states and 137554 transitions. [2019-12-07 12:39:13,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 12:39:13,280 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 12:39:13,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:39:13,331 INFO L225 Difference]: With dead ends: 44479 [2019-12-07 12:39:13,331 INFO L226 Difference]: Without dead ends: 41554 [2019-12-07 12:39:13,332 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=152, Invalid=660, Unknown=0, NotChecked=0, Total=812 [2019-12-07 12:39:13,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41554 states. [2019-12-07 12:39:13,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41554 to 26098. [2019-12-07 12:39:13,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26098 states. [2019-12-07 12:39:13,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26098 states to 26098 states and 80758 transitions. [2019-12-07 12:39:13,896 INFO L78 Accepts]: Start accepts. Automaton has 26098 states and 80758 transitions. Word has length 67 [2019-12-07 12:39:13,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:39:13,896 INFO L462 AbstractCegarLoop]: Abstraction has 26098 states and 80758 transitions. [2019-12-07 12:39:13,896 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:39:13,896 INFO L276 IsEmpty]: Start isEmpty. Operand 26098 states and 80758 transitions. [2019-12-07 12:39:13,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:39:13,923 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:39:13,924 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:39:13,924 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:39:13,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:39:13,924 INFO L82 PathProgramCache]: Analyzing trace with hash 147134104, now seen corresponding path program 6 times [2019-12-07 12:39:13,924 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:39:13,924 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164617179] [2019-12-07 12:39:13,924 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:39:13,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:39:14,040 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:39:14,040 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [164617179] [2019-12-07 12:39:14,040 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:39:14,040 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:39:14,040 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [873433043] [2019-12-07 12:39:14,041 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:39:14,041 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:39:14,041 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:39:14,041 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:39:14,041 INFO L87 Difference]: Start difference. First operand 26098 states and 80758 transitions. Second operand 11 states. [2019-12-07 12:39:14,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:39:14,861 INFO L93 Difference]: Finished difference Result 42266 states and 130221 transitions. [2019-12-07 12:39:14,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 12:39:14,862 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 12:39:14,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:39:14,911 INFO L225 Difference]: With dead ends: 42266 [2019-12-07 12:39:14,911 INFO L226 Difference]: Without dead ends: 37449 [2019-12-07 12:39:14,911 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=122, Invalid=478, Unknown=0, NotChecked=0, Total=600 [2019-12-07 12:39:15,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37449 states. [2019-12-07 12:39:15,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37449 to 21902. [2019-12-07 12:39:15,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21902 states. [2019-12-07 12:39:15,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21902 states to 21902 states and 67651 transitions. [2019-12-07 12:39:15,374 INFO L78 Accepts]: Start accepts. Automaton has 21902 states and 67651 transitions. Word has length 67 [2019-12-07 12:39:15,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:39:15,374 INFO L462 AbstractCegarLoop]: Abstraction has 21902 states and 67651 transitions. [2019-12-07 12:39:15,374 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:39:15,374 INFO L276 IsEmpty]: Start isEmpty. Operand 21902 states and 67651 transitions. [2019-12-07 12:39:15,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:39:15,395 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:39:15,395 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:39:15,395 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:39:15,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:39:15,396 INFO L82 PathProgramCache]: Analyzing trace with hash -300630794, now seen corresponding path program 7 times [2019-12-07 12:39:15,396 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:39:15,396 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1778015156] [2019-12-07 12:39:15,396 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:39:15,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:39:15,799 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:39:15,799 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1778015156] [2019-12-07 12:39:15,799 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:39:15,799 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 12:39:15,799 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [42646754] [2019-12-07 12:39:15,799 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 12:39:15,799 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:39:15,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 12:39:15,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2019-12-07 12:39:15,800 INFO L87 Difference]: Start difference. First operand 21902 states and 67651 transitions. Second operand 17 states. [2019-12-07 12:39:22,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:39:22,343 INFO L93 Difference]: Finished difference Result 40138 states and 122310 transitions. [2019-12-07 12:39:22,344 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 12:39:22,344 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 12:39:22,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:39:22,391 INFO L225 Difference]: With dead ends: 40138 [2019-12-07 12:39:22,392 INFO L226 Difference]: Without dead ends: 39279 [2019-12-07 12:39:22,393 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 786 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=492, Invalid=2588, Unknown=0, NotChecked=0, Total=3080 [2019-12-07 12:39:22,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39279 states. [2019-12-07 12:39:22,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39279 to 21542. [2019-12-07 12:39:22,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21542 states. [2019-12-07 12:39:22,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21542 states to 21542 states and 66659 transitions. [2019-12-07 12:39:22,866 INFO L78 Accepts]: Start accepts. Automaton has 21542 states and 66659 transitions. Word has length 67 [2019-12-07 12:39:22,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:39:22,866 INFO L462 AbstractCegarLoop]: Abstraction has 21542 states and 66659 transitions. [2019-12-07 12:39:22,866 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 12:39:22,866 INFO L276 IsEmpty]: Start isEmpty. Operand 21542 states and 66659 transitions. [2019-12-07 12:39:22,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:39:22,887 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:39:22,887 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:39:22,887 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:39:22,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:39:22,888 INFO L82 PathProgramCache]: Analyzing trace with hash -1154306208, now seen corresponding path program 8 times [2019-12-07 12:39:22,888 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:39:22,888 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1750980152] [2019-12-07 12:39:22,888 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:39:22,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:39:22,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:39:22,972 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:39:22,972 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 12:39:22,974 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1576~0.base_23|) (= v_~z$w_buff0_used~0_900 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1576~0.base_23| 1) |v_#valid_60|) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1576~0.base_23| 4) |v_#length_21|) (= |v_ULTIMATE.start_main_~#t1576~0.offset_17| 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= v_~z$read_delayed~0_7 0) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (= v_~z$r_buff1_thd1~0_166 0) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1576~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1576~0.base_23|) |v_ULTIMATE.start_main_~#t1576~0.offset_17| 0)) |v_#memory_int_17|) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1576~0.base_23|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1577~0.offset=|v_ULTIMATE.start_main_~#t1577~0.offset_12|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, ULTIMATE.start_main_~#t1577~0.base=|v_ULTIMATE.start_main_~#t1577~0.base_19|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ~x~0=v_~x~0_129, ULTIMATE.start_main_~#t1578~0.base=|v_ULTIMATE.start_main_~#t1578~0.base_17|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1576~0.base=|v_ULTIMATE.start_main_~#t1576~0.base_23|, ULTIMATE.start_main_~#t1576~0.offset=|v_ULTIMATE.start_main_~#t1576~0.offset_17|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t1578~0.offset=|v_ULTIMATE.start_main_~#t1578~0.offset_14|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1577~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1577~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1578~0.base, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1576~0.base, ULTIMATE.start_main_~#t1576~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t1578~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:39:22,975 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1577~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1577~0.base_11|) |v_ULTIMATE.start_main_~#t1577~0.offset_9| 1)) |v_#memory_int_13|) (= |v_ULTIMATE.start_main_~#t1577~0.offset_9| 0) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1577~0.base_11| 4) |v_#length_17|) (not (= |v_ULTIMATE.start_main_~#t1577~0.base_11| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1577~0.base_11|) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1577~0.base_11| 1) |v_#valid_38|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1577~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1577~0.offset=|v_ULTIMATE.start_main_~#t1577~0.offset_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1577~0.base=|v_ULTIMATE.start_main_~#t1577~0.base_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1577~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1577~0.base, #length] because there is no mapped edge [2019-12-07 12:39:22,975 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:39:22,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-560543254 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-560543254 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out-560543254| ~z$w_buff1~0_In-560543254)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out-560543254| ~z~0_In-560543254) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-560543254, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-560543254, ~z$w_buff1~0=~z$w_buff1~0_In-560543254, ~z~0=~z~0_In-560543254} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-560543254|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-560543254, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-560543254, ~z$w_buff1~0=~z$w_buff1~0_In-560543254, ~z~0=~z~0_In-560543254} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 12:39:22,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 12:39:22,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1578~0.base_13| 1) |v_#valid_36|) (not (= 0 |v_ULTIMATE.start_main_~#t1578~0.base_13|)) (= |v_ULTIMATE.start_main_~#t1578~0.offset_11| 0) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1578~0.base_13|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1578~0.base_13| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1578~0.base_13|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1578~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1578~0.base_13|) |v_ULTIMATE.start_main_~#t1578~0.offset_11| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1578~0.offset=|v_ULTIMATE.start_main_~#t1578~0.offset_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1578~0.base=|v_ULTIMATE.start_main_~#t1578~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1578~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1578~0.base] because there is no mapped edge [2019-12-07 12:39:22,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-1991186277 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1991186277 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out-1991186277| ~z$w_buff0_used~0_In-1991186277) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out-1991186277| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1991186277, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1991186277} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1991186277, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1991186277|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1991186277} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 12:39:22,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1678852574 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In1678852574 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In1678852574 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1678852574 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1678852574 |P1Thread1of1ForFork2_#t~ite12_Out1678852574|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1678852574|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1678852574, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1678852574, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1678852574, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1678852574} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1678852574, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1678852574, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1678852574, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1678852574|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1678852574} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 12:39:22,980 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In-1522767160 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1522767160 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1522767160| 0)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In-1522767160 |P1Thread1of1ForFork2_#t~ite13_Out-1522767160|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1522767160, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1522767160} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1522767160, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1522767160|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1522767160} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 12:39:22,981 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In542817663 256)))) (or (and (= ~z$w_buff0_used~0_In542817663 |P2Thread1of1ForFork0_#t~ite26_Out542817663|) (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In542817663 256) 0))) (or (and (= 0 (mod ~z$w_buff1_used~0_In542817663 256)) .cse0) (= 0 (mod ~z$w_buff0_used~0_In542817663 256)) (and (= (mod ~z$r_buff1_thd3~0_In542817663 256) 0) .cse0))) (= |P2Thread1of1ForFork0_#t~ite27_Out542817663| |P2Thread1of1ForFork0_#t~ite26_Out542817663|) .cse1) (and (= ~z$w_buff0_used~0_In542817663 |P2Thread1of1ForFork0_#t~ite27_Out542817663|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite26_In542817663| |P2Thread1of1ForFork0_#t~ite26_Out542817663|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In542817663|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In542817663, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In542817663, ~z$w_buff1_used~0=~z$w_buff1_used~0_In542817663, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In542817663, ~weak$$choice2~0=~weak$$choice2~0_In542817663} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out542817663|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out542817663|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In542817663, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In542817663, ~z$w_buff1_used~0=~z$w_buff1_used~0_In542817663, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In542817663, ~weak$$choice2~0=~weak$$choice2~0_In542817663} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 12:39:22,982 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 12:39:22,983 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1355249050 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In1355249050 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1355249050|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1355249050 |P0Thread1of1ForFork1_#t~ite5_Out1355249050|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1355249050, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1355249050} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1355249050|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1355249050, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1355249050} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 12:39:22,983 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 12:39:22,984 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1290212418 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1290212418 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-1290212418| |P2Thread1of1ForFork0_#t~ite38_Out-1290212418|))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1290212418| ~z~0_In-1290212418) (or .cse0 .cse1) .cse2) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1290212418| ~z$w_buff1~0_In-1290212418) (not .cse0) (not .cse1) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1290212418, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1290212418, ~z$w_buff1~0=~z$w_buff1~0_In-1290212418, ~z~0=~z~0_In-1290212418} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1290212418|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1290212418|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1290212418, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1290212418, ~z$w_buff1~0=~z$w_buff1~0_In-1290212418, ~z~0=~z~0_In-1290212418} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:39:22,984 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In36543465 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In36543465 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out36543465| ~z$w_buff0_used~0_In36543465)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out36543465| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In36543465, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In36543465} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In36543465, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out36543465|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In36543465} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 12:39:22,985 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-146302357 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-146302357 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-146302357 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-146302357 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-146302357|)) (and (= ~z$w_buff1_used~0_In-146302357 |P2Thread1of1ForFork0_#t~ite41_Out-146302357|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-146302357, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-146302357, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-146302357, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-146302357} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-146302357, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-146302357, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-146302357, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-146302357, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-146302357|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 12:39:22,985 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1048637135 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1048637135 256)))) (or (and (= ~z$r_buff0_thd3~0_In1048637135 |P2Thread1of1ForFork0_#t~ite42_Out1048637135|) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1048637135|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1048637135, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1048637135} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1048637135, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1048637135, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1048637135|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 12:39:22,985 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-311310563 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-311310563 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-311310563 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd3~0_In-311310563 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-311310563 |P2Thread1of1ForFork0_#t~ite43_Out-311310563|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-311310563|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-311310563, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-311310563, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-311310563, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-311310563} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-311310563|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-311310563, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-311310563, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-311310563, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-311310563} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 12:39:22,985 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 12:39:22,986 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd1~0_In-828196207 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-828196207 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-828196207 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-828196207 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out-828196207| 0)) (and (= ~z$w_buff1_used~0_In-828196207 |P0Thread1of1ForFork1_#t~ite6_Out-828196207|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-828196207, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-828196207, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-828196207, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-828196207} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-828196207, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-828196207|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-828196207, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-828196207, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-828196207} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 12:39:22,986 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In-2005173805 256) 0)) (.cse1 (= ~z$r_buff0_thd1~0_In-2005173805 ~z$r_buff0_thd1~0_Out-2005173805)) (.cse2 (= (mod ~z$w_buff0_used~0_In-2005173805 256) 0))) (or (and .cse0 .cse1) (and (= 0 ~z$r_buff0_thd1~0_Out-2005173805) (not .cse2) (not .cse0)) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2005173805, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2005173805} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2005173805, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-2005173805|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-2005173805} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:39:22,986 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In1305003496 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1305003496 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1305003496 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In1305003496 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite8_Out1305003496| ~z$r_buff1_thd1~0_In1305003496)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1305003496|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1305003496, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1305003496, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1305003496, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1305003496} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1305003496|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1305003496, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1305003496, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1305003496, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1305003496} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 12:39:22,986 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 12:39:22,987 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1389381000 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In1389381000 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1389381000 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In1389381000 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out1389381000|)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out1389381000| ~z$r_buff1_thd2~0_In1389381000) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1389381000, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1389381000, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1389381000, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1389381000} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1389381000, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1389381000, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1389381000, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1389381000|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1389381000} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 12:39:22,987 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 12:39:22,987 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:39:22,987 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-781701001 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-781701001 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite47_Out-781701001| |ULTIMATE.start_main_#t~ite48_Out-781701001|))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out-781701001| ~z$w_buff1~0_In-781701001) .cse0 (not .cse1) (not .cse2)) (and (or .cse2 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out-781701001| ~z~0_In-781701001) .cse0))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-781701001, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-781701001, ~z$w_buff1~0=~z$w_buff1~0_In-781701001, ~z~0=~z~0_In-781701001} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-781701001, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-781701001|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-781701001, ~z$w_buff1~0=~z$w_buff1~0_In-781701001, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-781701001|, ~z~0=~z~0_In-781701001} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:39:22,988 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1404605609 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1404605609 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out1404605609| 0)) (and (= |ULTIMATE.start_main_#t~ite49_Out1404605609| ~z$w_buff0_used~0_In1404605609) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1404605609, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1404605609} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1404605609, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1404605609, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1404605609|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:39:22,988 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1846937123 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1846937123 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-1846937123 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-1846937123 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-1846937123| ~z$w_buff1_used~0_In-1846937123) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-1846937123| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1846937123, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1846937123, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1846937123, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1846937123} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1846937123|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1846937123, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1846937123, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1846937123, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1846937123} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:39:22,989 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-790703078 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-790703078 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-790703078 |ULTIMATE.start_main_#t~ite51_Out-790703078|)) (and (= |ULTIMATE.start_main_#t~ite51_Out-790703078| 0) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-790703078, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-790703078} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-790703078, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-790703078|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-790703078} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:39:22,989 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1711167723 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1711167723 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In1711167723 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In1711167723 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out1711167723| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite52_Out1711167723| ~z$r_buff1_thd0~0_In1711167723) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1711167723, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1711167723, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1711167723, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1711167723} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1711167723|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1711167723, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1711167723, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1711167723, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1711167723} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:39:22,989 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:39:23,056 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:39:23 BasicIcfg [2019-12-07 12:39:23,057 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 12:39:23,057 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:39:23,057 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:39:23,058 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:39:23,058 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:37:06" (3/4) ... [2019-12-07 12:39:23,060 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 12:39:23,061 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1576~0.base_23|) (= v_~z$w_buff0_used~0_900 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1576~0.base_23| 1) |v_#valid_60|) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1576~0.base_23| 4) |v_#length_21|) (= |v_ULTIMATE.start_main_~#t1576~0.offset_17| 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= v_~z$read_delayed~0_7 0) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (= v_~z$r_buff1_thd1~0_166 0) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1576~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1576~0.base_23|) |v_ULTIMATE.start_main_~#t1576~0.offset_17| 0)) |v_#memory_int_17|) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1576~0.base_23|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1577~0.offset=|v_ULTIMATE.start_main_~#t1577~0.offset_12|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, ULTIMATE.start_main_~#t1577~0.base=|v_ULTIMATE.start_main_~#t1577~0.base_19|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ~x~0=v_~x~0_129, ULTIMATE.start_main_~#t1578~0.base=|v_ULTIMATE.start_main_~#t1578~0.base_17|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1576~0.base=|v_ULTIMATE.start_main_~#t1576~0.base_23|, ULTIMATE.start_main_~#t1576~0.offset=|v_ULTIMATE.start_main_~#t1576~0.offset_17|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t1578~0.offset=|v_ULTIMATE.start_main_~#t1578~0.offset_14|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1577~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1577~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1578~0.base, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1576~0.base, ULTIMATE.start_main_~#t1576~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t1578~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:39:23,061 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1577~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1577~0.base_11|) |v_ULTIMATE.start_main_~#t1577~0.offset_9| 1)) |v_#memory_int_13|) (= |v_ULTIMATE.start_main_~#t1577~0.offset_9| 0) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1577~0.base_11| 4) |v_#length_17|) (not (= |v_ULTIMATE.start_main_~#t1577~0.base_11| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1577~0.base_11|) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1577~0.base_11| 1) |v_#valid_38|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1577~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1577~0.offset=|v_ULTIMATE.start_main_~#t1577~0.offset_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1577~0.base=|v_ULTIMATE.start_main_~#t1577~0.base_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1577~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1577~0.base, #length] because there is no mapped edge [2019-12-07 12:39:23,061 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:39:23,063 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-560543254 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-560543254 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out-560543254| ~z$w_buff1~0_In-560543254)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out-560543254| ~z~0_In-560543254) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-560543254, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-560543254, ~z$w_buff1~0=~z$w_buff1~0_In-560543254, ~z~0=~z~0_In-560543254} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-560543254|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-560543254, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-560543254, ~z$w_buff1~0=~z$w_buff1~0_In-560543254, ~z~0=~z~0_In-560543254} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 12:39:23,063 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 12:39:23,063 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1578~0.base_13| 1) |v_#valid_36|) (not (= 0 |v_ULTIMATE.start_main_~#t1578~0.base_13|)) (= |v_ULTIMATE.start_main_~#t1578~0.offset_11| 0) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1578~0.base_13|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1578~0.base_13| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1578~0.base_13|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1578~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1578~0.base_13|) |v_ULTIMATE.start_main_~#t1578~0.offset_11| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1578~0.offset=|v_ULTIMATE.start_main_~#t1578~0.offset_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1578~0.base=|v_ULTIMATE.start_main_~#t1578~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1578~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1578~0.base] because there is no mapped edge [2019-12-07 12:39:23,064 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-1991186277 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1991186277 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out-1991186277| ~z$w_buff0_used~0_In-1991186277) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out-1991186277| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1991186277, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1991186277} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1991186277, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1991186277|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1991186277} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 12:39:23,064 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1678852574 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In1678852574 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In1678852574 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1678852574 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1678852574 |P1Thread1of1ForFork2_#t~ite12_Out1678852574|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1678852574|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1678852574, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1678852574, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1678852574, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1678852574} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1678852574, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1678852574, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1678852574, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1678852574|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1678852574} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 12:39:23,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In-1522767160 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1522767160 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1522767160| 0)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In-1522767160 |P1Thread1of1ForFork2_#t~ite13_Out-1522767160|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1522767160, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1522767160} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1522767160, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1522767160|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1522767160} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 12:39:23,067 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In542817663 256)))) (or (and (= ~z$w_buff0_used~0_In542817663 |P2Thread1of1ForFork0_#t~ite26_Out542817663|) (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In542817663 256) 0))) (or (and (= 0 (mod ~z$w_buff1_used~0_In542817663 256)) .cse0) (= 0 (mod ~z$w_buff0_used~0_In542817663 256)) (and (= (mod ~z$r_buff1_thd3~0_In542817663 256) 0) .cse0))) (= |P2Thread1of1ForFork0_#t~ite27_Out542817663| |P2Thread1of1ForFork0_#t~ite26_Out542817663|) .cse1) (and (= ~z$w_buff0_used~0_In542817663 |P2Thread1of1ForFork0_#t~ite27_Out542817663|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite26_In542817663| |P2Thread1of1ForFork0_#t~ite26_Out542817663|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In542817663|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In542817663, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In542817663, ~z$w_buff1_used~0=~z$w_buff1_used~0_In542817663, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In542817663, ~weak$$choice2~0=~weak$$choice2~0_In542817663} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out542817663|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out542817663|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In542817663, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In542817663, ~z$w_buff1_used~0=~z$w_buff1_used~0_In542817663, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In542817663, ~weak$$choice2~0=~weak$$choice2~0_In542817663} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 12:39:23,068 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 12:39:23,069 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1355249050 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In1355249050 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1355249050|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1355249050 |P0Thread1of1ForFork1_#t~ite5_Out1355249050|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1355249050, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1355249050} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1355249050|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1355249050, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1355249050} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 12:39:23,070 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 12:39:23,070 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1290212418 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1290212418 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-1290212418| |P2Thread1of1ForFork0_#t~ite38_Out-1290212418|))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1290212418| ~z~0_In-1290212418) (or .cse0 .cse1) .cse2) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1290212418| ~z$w_buff1~0_In-1290212418) (not .cse0) (not .cse1) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1290212418, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1290212418, ~z$w_buff1~0=~z$w_buff1~0_In-1290212418, ~z~0=~z~0_In-1290212418} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1290212418|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1290212418|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1290212418, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1290212418, ~z$w_buff1~0=~z$w_buff1~0_In-1290212418, ~z~0=~z~0_In-1290212418} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:39:23,070 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In36543465 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In36543465 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out36543465| ~z$w_buff0_used~0_In36543465)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out36543465| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In36543465, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In36543465} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In36543465, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out36543465|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In36543465} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 12:39:23,071 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-146302357 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-146302357 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-146302357 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-146302357 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-146302357|)) (and (= ~z$w_buff1_used~0_In-146302357 |P2Thread1of1ForFork0_#t~ite41_Out-146302357|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-146302357, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-146302357, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-146302357, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-146302357} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-146302357, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-146302357, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-146302357, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-146302357, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-146302357|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 12:39:23,071 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1048637135 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1048637135 256)))) (or (and (= ~z$r_buff0_thd3~0_In1048637135 |P2Thread1of1ForFork0_#t~ite42_Out1048637135|) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1048637135|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1048637135, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1048637135} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1048637135, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1048637135, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1048637135|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 12:39:23,072 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-311310563 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-311310563 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-311310563 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd3~0_In-311310563 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-311310563 |P2Thread1of1ForFork0_#t~ite43_Out-311310563|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-311310563|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-311310563, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-311310563, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-311310563, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-311310563} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-311310563|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-311310563, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-311310563, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-311310563, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-311310563} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 12:39:23,072 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 12:39:23,072 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd1~0_In-828196207 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-828196207 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-828196207 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-828196207 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out-828196207| 0)) (and (= ~z$w_buff1_used~0_In-828196207 |P0Thread1of1ForFork1_#t~ite6_Out-828196207|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-828196207, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-828196207, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-828196207, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-828196207} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-828196207, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-828196207|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-828196207, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-828196207, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-828196207} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 12:39:23,072 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In-2005173805 256) 0)) (.cse1 (= ~z$r_buff0_thd1~0_In-2005173805 ~z$r_buff0_thd1~0_Out-2005173805)) (.cse2 (= (mod ~z$w_buff0_used~0_In-2005173805 256) 0))) (or (and .cse0 .cse1) (and (= 0 ~z$r_buff0_thd1~0_Out-2005173805) (not .cse2) (not .cse0)) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2005173805, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2005173805} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2005173805, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-2005173805|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-2005173805} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:39:23,072 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In1305003496 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1305003496 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1305003496 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In1305003496 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite8_Out1305003496| ~z$r_buff1_thd1~0_In1305003496)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1305003496|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1305003496, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1305003496, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1305003496, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1305003496} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1305003496|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1305003496, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1305003496, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1305003496, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1305003496} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 12:39:23,072 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 12:39:23,073 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1389381000 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In1389381000 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1389381000 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In1389381000 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out1389381000|)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out1389381000| ~z$r_buff1_thd2~0_In1389381000) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1389381000, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1389381000, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1389381000, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1389381000} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1389381000, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1389381000, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1389381000, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1389381000|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1389381000} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 12:39:23,073 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 12:39:23,073 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:39:23,073 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-781701001 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-781701001 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite47_Out-781701001| |ULTIMATE.start_main_#t~ite48_Out-781701001|))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out-781701001| ~z$w_buff1~0_In-781701001) .cse0 (not .cse1) (not .cse2)) (and (or .cse2 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out-781701001| ~z~0_In-781701001) .cse0))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-781701001, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-781701001, ~z$w_buff1~0=~z$w_buff1~0_In-781701001, ~z~0=~z~0_In-781701001} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-781701001, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-781701001|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-781701001, ~z$w_buff1~0=~z$w_buff1~0_In-781701001, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-781701001|, ~z~0=~z~0_In-781701001} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:39:23,073 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1404605609 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1404605609 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out1404605609| 0)) (and (= |ULTIMATE.start_main_#t~ite49_Out1404605609| ~z$w_buff0_used~0_In1404605609) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1404605609, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1404605609} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1404605609, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1404605609, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1404605609|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:39:23,074 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1846937123 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1846937123 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-1846937123 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-1846937123 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-1846937123| ~z$w_buff1_used~0_In-1846937123) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-1846937123| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1846937123, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1846937123, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1846937123, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1846937123} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1846937123|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1846937123, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1846937123, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1846937123, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1846937123} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:39:23,074 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-790703078 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-790703078 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-790703078 |ULTIMATE.start_main_#t~ite51_Out-790703078|)) (and (= |ULTIMATE.start_main_#t~ite51_Out-790703078| 0) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-790703078, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-790703078} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-790703078, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-790703078|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-790703078} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:39:23,075 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1711167723 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1711167723 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In1711167723 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In1711167723 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out1711167723| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite52_Out1711167723| ~z$r_buff1_thd0~0_In1711167723) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1711167723, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1711167723, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1711167723, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1711167723} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1711167723|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1711167723, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1711167723, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1711167723, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1711167723} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:39:23,075 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:39:23,139 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_3db5504c-6870-4d81-93ec-5f5fa6e5ed6d/bin/uautomizer/witness.graphml [2019-12-07 12:39:23,140 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:39:23,141 INFO L168 Benchmark]: Toolchain (without parser) took 137816.42 ms. Allocated memory was 1.0 GB in the beginning and 7.5 GB in the end (delta: 6.5 GB). Free memory was 934.0 MB in the beginning and 3.5 GB in the end (delta: -2.5 GB). Peak memory consumption was 3.9 GB. Max. memory is 11.5 GB. [2019-12-07 12:39:23,142 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:39:23,142 INFO L168 Benchmark]: CACSL2BoogieTranslator took 405.79 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.7 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -134.2 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 12:39:23,142 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.53 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:39:23,143 INFO L168 Benchmark]: Boogie Preprocessor took 25.47 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:39:23,143 INFO L168 Benchmark]: RCFGBuilder took 411.54 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 12:39:23,143 INFO L168 Benchmark]: TraceAbstraction took 136850.58 ms. Allocated memory was 1.1 GB in the beginning and 7.5 GB in the end (delta: 6.4 GB). Free memory was 1.0 GB in the beginning and 3.5 GB in the end (delta: -2.5 GB). Peak memory consumption was 3.9 GB. Max. memory is 11.5 GB. [2019-12-07 12:39:23,144 INFO L168 Benchmark]: Witness Printer took 82.64 ms. Allocated memory is still 7.5 GB. Free memory was 3.5 GB in the beginning and 3.5 GB in the end (delta: 44.2 MB). Peak memory consumption was 44.2 MB. Max. memory is 11.5 GB. [2019-12-07 12:39:23,146 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 405.79 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.7 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -134.2 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.53 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.47 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 411.54 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 136850.58 ms. Allocated memory was 1.1 GB in the beginning and 7.5 GB in the end (delta: 6.4 GB). Free memory was 1.0 GB in the beginning and 3.5 GB in the end (delta: -2.5 GB). Peak memory consumption was 3.9 GB. Max. memory is 11.5 GB. * Witness Printer took 82.64 ms. Allocated memory is still 7.5 GB. Free memory was 3.5 GB in the beginning and 3.5 GB in the end (delta: 44.2 MB). Peak memory consumption was 44.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 176 ProgramPointsBefore, 95 ProgramPointsAfterwards, 213 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 55 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 29 ChoiceCompositions, 7276 VarBasedMoverChecksPositive, 432 VarBasedMoverChecksNegative, 272 SemBasedMoverChecksPositive, 254 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 130045 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L822] FCALL, FORK 0 pthread_create(&t1576, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t1577, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 1 [L763] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L826] FCALL, FORK 0 pthread_create(&t1578, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 1 [L783] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L784] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L785] 3 z$flush_delayed = weak$$choice2 [L786] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L788] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L788] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L789] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L789] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L790] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L791] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L793] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L794] 3 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L799] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L800] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L801] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L802] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L832] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L832] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L833] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L834] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L835] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 136.6s, OverallIterations: 25, TraceHistogramMax: 1, AutomataDifference: 31.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6498 SDtfs, 8152 SDslu, 26880 SDs, 0 SdLazy, 14841 SolverSat, 287 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 324 GetRequests, 28 SyntacticMatches, 17 SemanticMatches, 279 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1763 ImplicationChecksByTransitivity, 3.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=237826occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 78.4s AutomataMinimizationTime, 24 MinimizatonAttempts, 348657 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.5s InterpolantComputationTime, 1021 NumberOfCodeBlocks, 1021 NumberOfCodeBlocksAsserted, 25 NumberOfCheckSat, 930 ConstructedInterpolants, 0 QuantifiedInterpolants, 287344 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 24 InterpolantComputations, 24 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...