./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/psyco/psyco_abp_1-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/psyco/psyco_abp_1-1.c -s /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 747981090a474d9d2269aea1ffd03eef2ddc8848 ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:20:27,725 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:20:27,727 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:20:27,734 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:20:27,734 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:20:27,735 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:20:27,736 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:20:27,737 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:20:27,739 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:20:27,739 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:20:27,740 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:20:27,740 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:20:27,741 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:20:27,741 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:20:27,742 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:20:27,743 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:20:27,743 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:20:27,744 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:20:27,745 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:20:27,747 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:20:27,748 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:20:27,748 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:20:27,749 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:20:27,750 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:20:27,751 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:20:27,751 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:20:27,752 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:20:27,752 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:20:27,752 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:20:27,753 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:20:27,753 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:20:27,753 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:20:27,754 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:20:27,754 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:20:27,755 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:20:27,755 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:20:27,755 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:20:27,755 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:20:27,756 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:20:27,756 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:20:27,757 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:20:27,757 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:20:27,767 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:20:27,767 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:20:27,768 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:20:27,768 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:20:27,768 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:20:27,768 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:20:27,768 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:20:27,768 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:20:27,768 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:20:27,768 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:20:27,769 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:20:27,769 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:20:27,769 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:20:27,769 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:20:27,769 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:20:27,769 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:20:27,769 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:20:27,769 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:20:27,770 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:20:27,770 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:20:27,770 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:20:27,770 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:20:27,770 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:20:27,770 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:20:27,770 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:20:27,770 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:20:27,771 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:20:27,771 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:20:27,771 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:20:27,771 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 747981090a474d9d2269aea1ffd03eef2ddc8848 [2019-12-07 18:20:27,868 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:20:27,876 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:20:27,878 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:20:27,879 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:20:27,879 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:20:27,880 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/../../sv-benchmarks/c/psyco/psyco_abp_1-1.c [2019-12-07 18:20:27,916 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/data/a33771b45/ce5484694d8044d29cbc8ac9ba9cb435/FLAG7fccf78ca [2019-12-07 18:20:28,406 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:20:28,407 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/sv-benchmarks/c/psyco/psyco_abp_1-1.c [2019-12-07 18:20:28,415 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/data/a33771b45/ce5484694d8044d29cbc8ac9ba9cb435/FLAG7fccf78ca [2019-12-07 18:20:28,424 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/data/a33771b45/ce5484694d8044d29cbc8ac9ba9cb435 [2019-12-07 18:20:28,426 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:20:28,427 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:20:28,427 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:20:28,427 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:20:28,430 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:20:28,430 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:20:28" (1/1) ... [2019-12-07 18:20:28,432 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@554cd82e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:28, skipping insertion in model container [2019-12-07 18:20:28,432 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:20:28" (1/1) ... [2019-12-07 18:20:28,439 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:20:28,472 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:20:28,693 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:20:28,696 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:20:28,734 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:20:28,743 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:20:28,744 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:28 WrapperNode [2019-12-07 18:20:28,744 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:20:28,744 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:20:28,744 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:20:28,744 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:20:28,750 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:28" (1/1) ... [2019-12-07 18:20:28,758 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:28" (1/1) ... [2019-12-07 18:20:28,784 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:20:28,785 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:20:28,785 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:20:28,785 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:20:28,791 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:28" (1/1) ... [2019-12-07 18:20:28,791 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:28" (1/1) ... [2019-12-07 18:20:28,793 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:28" (1/1) ... [2019-12-07 18:20:28,794 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:28" (1/1) ... [2019-12-07 18:20:28,803 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:28" (1/1) ... [2019-12-07 18:20:28,808 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:28" (1/1) ... [2019-12-07 18:20:28,811 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:28" (1/1) ... [2019-12-07 18:20:28,815 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:20:28,815 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:20:28,816 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:20:28,816 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:20:28,816 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:28" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:20:28,856 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:20:28,856 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:20:29,284 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:20:29,284 INFO L287 CfgBuilder]: Removed 6 assume(true) statements. [2019-12-07 18:20:29,285 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:20:29 BoogieIcfgContainer [2019-12-07 18:20:29,285 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:20:29,285 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:20:29,285 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:20:29,287 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:20:29,287 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:20:28" (1/3) ... [2019-12-07 18:20:29,288 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34298efd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:20:29, skipping insertion in model container [2019-12-07 18:20:29,288 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:28" (2/3) ... [2019-12-07 18:20:29,288 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34298efd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:20:29, skipping insertion in model container [2019-12-07 18:20:29,288 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:20:29" (3/3) ... [2019-12-07 18:20:29,289 INFO L109 eAbstractionObserver]: Analyzing ICFG psyco_abp_1-1.c [2019-12-07 18:20:29,296 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:20:29,301 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-12-07 18:20:29,308 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-12-07 18:20:29,324 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:20:29,324 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:20:29,324 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:20:29,324 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:20:29,324 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:20:29,324 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:20:29,324 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:20:29,324 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:20:29,336 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states. [2019-12-07 18:20:29,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2019-12-07 18:20:29,340 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:29,340 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:29,340 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:29,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:29,344 INFO L82 PathProgramCache]: Analyzing trace with hash -1895078531, now seen corresponding path program 1 times [2019-12-07 18:20:29,349 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:29,350 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1227283562] [2019-12-07 18:20:29,350 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:29,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:29,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:29,436 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1227283562] [2019-12-07 18:20:29,437 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:20:29,437 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:20:29,438 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [444139748] [2019-12-07 18:20:29,441 INFO L442 AbstractCegarLoop]: Interpolant automaton has 2 states [2019-12-07 18:20:29,441 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:29,449 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2019-12-07 18:20:29,449 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2019-12-07 18:20:29,451 INFO L87 Difference]: Start difference. First operand 110 states. Second operand 2 states. [2019-12-07 18:20:29,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:29,471 INFO L93 Difference]: Finished difference Result 218 states and 420 transitions. [2019-12-07 18:20:29,471 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2019-12-07 18:20:29,471 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 10 [2019-12-07 18:20:29,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:29,479 INFO L225 Difference]: With dead ends: 218 [2019-12-07 18:20:29,479 INFO L226 Difference]: Without dead ends: 106 [2019-12-07 18:20:29,481 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2019-12-07 18:20:29,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2019-12-07 18:20:29,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2019-12-07 18:20:29,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2019-12-07 18:20:29,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 177 transitions. [2019-12-07 18:20:29,509 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 177 transitions. Word has length 10 [2019-12-07 18:20:29,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:29,509 INFO L462 AbstractCegarLoop]: Abstraction has 106 states and 177 transitions. [2019-12-07 18:20:29,509 INFO L463 AbstractCegarLoop]: Interpolant automaton has 2 states. [2019-12-07 18:20:29,510 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 177 transitions. [2019-12-07 18:20:29,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:20:29,510 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:29,510 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:29,510 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:29,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:29,511 INFO L82 PathProgramCache]: Analyzing trace with hash 1914595175, now seen corresponding path program 1 times [2019-12-07 18:20:29,511 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:29,511 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [649264105] [2019-12-07 18:20:29,511 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:29,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:29,538 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:29,538 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [649264105] [2019-12-07 18:20:29,538 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:20:29,538 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:20:29,539 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [333646643] [2019-12-07 18:20:29,540 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:20:29,540 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:29,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:20:29,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:20:29,540 INFO L87 Difference]: Start difference. First operand 106 states and 177 transitions. Second operand 3 states. [2019-12-07 18:20:29,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:29,572 INFO L93 Difference]: Finished difference Result 214 states and 358 transitions. [2019-12-07 18:20:29,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:20:29,572 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2019-12-07 18:20:29,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:29,573 INFO L225 Difference]: With dead ends: 214 [2019-12-07 18:20:29,573 INFO L226 Difference]: Without dead ends: 110 [2019-12-07 18:20:29,574 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:20:29,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2019-12-07 18:20:29,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2019-12-07 18:20:29,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2019-12-07 18:20:29,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 182 transitions. [2019-12-07 18:20:29,582 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 182 transitions. Word has length 11 [2019-12-07 18:20:29,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:29,582 INFO L462 AbstractCegarLoop]: Abstraction has 110 states and 182 transitions. [2019-12-07 18:20:29,582 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:20:29,583 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 182 transitions. [2019-12-07 18:20:29,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 18:20:29,583 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:29,583 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:29,583 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:29,583 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:29,584 INFO L82 PathProgramCache]: Analyzing trace with hash 100490260, now seen corresponding path program 1 times [2019-12-07 18:20:29,584 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:29,584 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [198826446] [2019-12-07 18:20:29,584 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:29,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:29,848 WARN L192 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 31 [2019-12-07 18:20:29,851 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:29,851 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [198826446] [2019-12-07 18:20:29,851 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:20:29,851 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:20:29,851 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1920868579] [2019-12-07 18:20:29,852 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:20:29,852 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:29,852 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:20:29,852 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:20:29,852 INFO L87 Difference]: Start difference. First operand 110 states and 182 transitions. Second operand 4 states. [2019-12-07 18:20:30,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:30,084 INFO L93 Difference]: Finished difference Result 326 states and 541 transitions. [2019-12-07 18:20:30,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:20:30,084 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2019-12-07 18:20:30,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:30,086 INFO L225 Difference]: With dead ends: 326 [2019-12-07 18:20:30,086 INFO L226 Difference]: Without dead ends: 197 [2019-12-07 18:20:30,087 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:20:30,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2019-12-07 18:20:30,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 184. [2019-12-07 18:20:30,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2019-12-07 18:20:30,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 301 transitions. [2019-12-07 18:20:30,098 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 301 transitions. Word has length 17 [2019-12-07 18:20:30,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:30,098 INFO L462 AbstractCegarLoop]: Abstraction has 184 states and 301 transitions. [2019-12-07 18:20:30,098 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:20:30,098 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 301 transitions. [2019-12-07 18:20:30,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:20:30,099 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:30,099 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:30,099 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:30,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:30,100 INFO L82 PathProgramCache]: Analyzing trace with hash 1571478032, now seen corresponding path program 1 times [2019-12-07 18:20:30,100 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:30,100 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1261552490] [2019-12-07 18:20:30,100 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:30,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:30,121 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:30,121 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1261552490] [2019-12-07 18:20:30,121 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:20:30,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:20:30,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1515686442] [2019-12-07 18:20:30,122 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:20:30,122 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:30,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:20:30,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:20:30,122 INFO L87 Difference]: Start difference. First operand 184 states and 301 transitions. Second operand 3 states. [2019-12-07 18:20:30,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:30,142 INFO L93 Difference]: Finished difference Result 314 states and 514 transitions. [2019-12-07 18:20:30,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:20:30,143 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:20:30,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:30,144 INFO L225 Difference]: With dead ends: 314 [2019-12-07 18:20:30,144 INFO L226 Difference]: Without dead ends: 133 [2019-12-07 18:20:30,145 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:20:30,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2019-12-07 18:20:30,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 131. [2019-12-07 18:20:30,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2019-12-07 18:20:30,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 211 transitions. [2019-12-07 18:20:30,152 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 211 transitions. Word has length 18 [2019-12-07 18:20:30,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:30,153 INFO L462 AbstractCegarLoop]: Abstraction has 131 states and 211 transitions. [2019-12-07 18:20:30,153 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:20:30,153 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 211 transitions. [2019-12-07 18:20:30,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-12-07 18:20:30,154 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:30,154 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:30,154 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:30,154 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:30,154 INFO L82 PathProgramCache]: Analyzing trace with hash -1260642915, now seen corresponding path program 1 times [2019-12-07 18:20:30,155 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:30,155 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [483222119] [2019-12-07 18:20:30,155 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:30,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:30,184 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 18:20:30,184 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [483222119] [2019-12-07 18:20:30,184 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:20:30,184 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:20:30,185 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1267363819] [2019-12-07 18:20:30,185 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:20:30,185 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:30,185 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:20:30,185 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:20:30,186 INFO L87 Difference]: Start difference. First operand 131 states and 211 transitions. Second operand 3 states. [2019-12-07 18:20:30,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:30,204 INFO L93 Difference]: Finished difference Result 243 states and 390 transitions. [2019-12-07 18:20:30,205 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:20:30,205 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2019-12-07 18:20:30,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:30,206 INFO L225 Difference]: With dead ends: 243 [2019-12-07 18:20:30,206 INFO L226 Difference]: Without dead ends: 115 [2019-12-07 18:20:30,207 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:20:30,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2019-12-07 18:20:30,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 113. [2019-12-07 18:20:30,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2019-12-07 18:20:30,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 178 transitions. [2019-12-07 18:20:30,212 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 178 transitions. Word has length 24 [2019-12-07 18:20:30,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:30,212 INFO L462 AbstractCegarLoop]: Abstraction has 113 states and 178 transitions. [2019-12-07 18:20:30,213 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:20:30,213 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 178 transitions. [2019-12-07 18:20:30,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 18:20:30,213 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:30,214 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:30,214 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:30,214 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:30,214 INFO L82 PathProgramCache]: Analyzing trace with hash 1813922334, now seen corresponding path program 1 times [2019-12-07 18:20:30,214 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:30,214 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1555249572] [2019-12-07 18:20:30,214 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:30,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:30,245 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:30,245 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1555249572] [2019-12-07 18:20:30,246 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1321511095] [2019-12-07 18:20:30,246 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:30,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:30,291 INFO L264 TraceCheckSpWp]: Trace formula consists of 184 conjuncts, 3 conjunts are in the unsatisfiable core [2019-12-07 18:20:30,296 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:30,315 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:30,316 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:30,316 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2019-12-07 18:20:30,316 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [456941174] [2019-12-07 18:20:30,316 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:20:30,316 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:30,317 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:20:30,317 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:20:30,317 INFO L87 Difference]: Start difference. First operand 113 states and 178 transitions. Second operand 5 states. [2019-12-07 18:20:30,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:30,439 INFO L93 Difference]: Finished difference Result 204 states and 323 transitions. [2019-12-07 18:20:30,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:20:30,439 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 18:20:30,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:30,441 INFO L225 Difference]: With dead ends: 204 [2019-12-07 18:20:30,441 INFO L226 Difference]: Without dead ends: 192 [2019-12-07 18:20:30,441 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:20:30,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2019-12-07 18:20:30,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 178. [2019-12-07 18:20:30,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2019-12-07 18:20:30,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 290 transitions. [2019-12-07 18:20:30,449 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 290 transitions. Word has length 26 [2019-12-07 18:20:30,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:30,449 INFO L462 AbstractCegarLoop]: Abstraction has 178 states and 290 transitions. [2019-12-07 18:20:30,449 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:20:30,450 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 290 transitions. [2019-12-07 18:20:30,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:20:30,451 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:30,451 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:30,651 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:30,652 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:30,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:30,653 INFO L82 PathProgramCache]: Analyzing trace with hash 408461028, now seen corresponding path program 1 times [2019-12-07 18:20:30,653 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:30,654 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1323468241] [2019-12-07 18:20:30,655 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:30,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:30,787 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:30,787 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1323468241] [2019-12-07 18:20:30,787 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1319429888] [2019-12-07 18:20:30,787 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:30,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:30,828 INFO L264 TraceCheckSpWp]: Trace formula consists of 183 conjuncts, 7 conjunts are in the unsatisfiable core [2019-12-07 18:20:30,829 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:30,847 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:30,847 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:30,848 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4] total 6 [2019-12-07 18:20:30,848 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1818354844] [2019-12-07 18:20:30,848 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:20:30,848 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:30,849 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:20:30,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:20:30,849 INFO L87 Difference]: Start difference. First operand 178 states and 290 transitions. Second operand 6 states. [2019-12-07 18:20:30,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:30,943 INFO L93 Difference]: Finished difference Result 387 states and 636 transitions. [2019-12-07 18:20:30,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:20:30,943 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 18:20:30,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:30,945 INFO L225 Difference]: With dead ends: 387 [2019-12-07 18:20:30,945 INFO L226 Difference]: Without dead ends: 230 [2019-12-07 18:20:30,945 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 26 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:20:30,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2019-12-07 18:20:30,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 224. [2019-12-07 18:20:30,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2019-12-07 18:20:30,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 362 transitions. [2019-12-07 18:20:30,952 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 362 transitions. Word has length 27 [2019-12-07 18:20:30,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:30,953 INFO L462 AbstractCegarLoop]: Abstraction has 224 states and 362 transitions. [2019-12-07 18:20:30,953 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:20:30,953 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 362 transitions. [2019-12-07 18:20:30,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 18:20:30,954 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:30,954 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:31,154 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:31,155 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:31,156 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:31,156 INFO L82 PathProgramCache]: Analyzing trace with hash -1176409765, now seen corresponding path program 1 times [2019-12-07 18:20:31,156 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:31,157 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [31003368] [2019-12-07 18:20:31,157 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:31,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:31,244 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-12-07 18:20:31,245 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [31003368] [2019-12-07 18:20:31,246 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:20:31,247 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:20:31,247 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [487003490] [2019-12-07 18:20:31,248 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:20:31,249 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:31,249 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:20:31,250 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:20:31,250 INFO L87 Difference]: Start difference. First operand 224 states and 362 transitions. Second operand 3 states. [2019-12-07 18:20:31,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:31,310 INFO L93 Difference]: Finished difference Result 409 states and 661 transitions. [2019-12-07 18:20:31,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:20:31,311 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-12-07 18:20:31,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:31,312 INFO L225 Difference]: With dead ends: 409 [2019-12-07 18:20:31,313 INFO L226 Difference]: Without dead ends: 211 [2019-12-07 18:20:31,313 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:20:31,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2019-12-07 18:20:31,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 209. [2019-12-07 18:20:31,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-12-07 18:20:31,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 330 transitions. [2019-12-07 18:20:31,319 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 330 transitions. Word has length 28 [2019-12-07 18:20:31,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:31,319 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 330 transitions. [2019-12-07 18:20:31,319 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:20:31,320 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 330 transitions. [2019-12-07 18:20:31,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-12-07 18:20:31,321 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:31,321 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:31,321 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:31,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:31,321 INFO L82 PathProgramCache]: Analyzing trace with hash 989407566, now seen corresponding path program 1 times [2019-12-07 18:20:31,321 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:31,321 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [944930202] [2019-12-07 18:20:31,321 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:31,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:31,345 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2019-12-07 18:20:31,345 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [944930202] [2019-12-07 18:20:31,345 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:20:31,346 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:20:31,346 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1563918796] [2019-12-07 18:20:31,346 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:20:31,346 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:31,346 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:20:31,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:20:31,346 INFO L87 Difference]: Start difference. First operand 209 states and 330 transitions. Second operand 3 states. [2019-12-07 18:20:31,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:31,367 INFO L93 Difference]: Finished difference Result 375 states and 600 transitions. [2019-12-07 18:20:31,368 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:20:31,368 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2019-12-07 18:20:31,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:31,369 INFO L225 Difference]: With dead ends: 375 [2019-12-07 18:20:31,369 INFO L226 Difference]: Without dead ends: 211 [2019-12-07 18:20:31,369 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:20:31,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2019-12-07 18:20:31,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 209. [2019-12-07 18:20:31,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-12-07 18:20:31,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 328 transitions. [2019-12-07 18:20:31,374 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 328 transitions. Word has length 36 [2019-12-07 18:20:31,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:31,374 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 328 transitions. [2019-12-07 18:20:31,374 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:20:31,374 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 328 transitions. [2019-12-07 18:20:31,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 18:20:31,375 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:31,375 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:31,375 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:31,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:31,375 INFO L82 PathProgramCache]: Analyzing trace with hash -936850633, now seen corresponding path program 1 times [2019-12-07 18:20:31,375 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:31,375 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [658558883] [2019-12-07 18:20:31,376 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:31,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:31,420 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 8 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-12-07 18:20:31,421 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [658558883] [2019-12-07 18:20:31,421 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [57288901] [2019-12-07 18:20:31,421 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:31,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:31,466 INFO L264 TraceCheckSpWp]: Trace formula consists of 246 conjuncts, 10 conjunts are in the unsatisfiable core [2019-12-07 18:20:31,468 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:31,494 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 8 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-12-07 18:20:31,494 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:31,495 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5] total 5 [2019-12-07 18:20:31,495 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [717303484] [2019-12-07 18:20:31,495 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:20:31,495 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:31,496 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:20:31,496 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:20:31,496 INFO L87 Difference]: Start difference. First operand 209 states and 328 transitions. Second operand 5 states. [2019-12-07 18:20:31,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:31,661 INFO L93 Difference]: Finished difference Result 485 states and 762 transitions. [2019-12-07 18:20:31,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:20:31,662 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-12-07 18:20:31,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:31,664 INFO L225 Difference]: With dead ends: 485 [2019-12-07 18:20:31,664 INFO L226 Difference]: Without dead ends: 270 [2019-12-07 18:20:31,664 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 36 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:20:31,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 270 states. [2019-12-07 18:20:31,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 270 to 260. [2019-12-07 18:20:31,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 260 states. [2019-12-07 18:20:31,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260 states to 260 states and 406 transitions. [2019-12-07 18:20:31,669 INFO L78 Accepts]: Start accepts. Automaton has 260 states and 406 transitions. Word has length 37 [2019-12-07 18:20:31,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:31,670 INFO L462 AbstractCegarLoop]: Abstraction has 260 states and 406 transitions. [2019-12-07 18:20:31,670 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:20:31,670 INFO L276 IsEmpty]: Start isEmpty. Operand 260 states and 406 transitions. [2019-12-07 18:20:31,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-12-07 18:20:31,670 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:31,671 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:31,871 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:31,871 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:31,871 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:31,871 INFO L82 PathProgramCache]: Analyzing trace with hash 1033847947, now seen corresponding path program 1 times [2019-12-07 18:20:31,872 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:31,872 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [791389565] [2019-12-07 18:20:31,872 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:31,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:31,908 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 18:20:31,908 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [791389565] [2019-12-07 18:20:31,909 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1339995421] [2019-12-07 18:20:31,909 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:31,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:31,957 INFO L264 TraceCheckSpWp]: Trace formula consists of 249 conjuncts, 7 conjunts are in the unsatisfiable core [2019-12-07 18:20:31,959 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:31,967 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 18:20:31,968 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:31,968 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2019-12-07 18:20:31,968 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1836861314] [2019-12-07 18:20:31,968 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:20:31,968 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:31,968 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:20:31,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:20:31,969 INFO L87 Difference]: Start difference. First operand 260 states and 406 transitions. Second operand 4 states. [2019-12-07 18:20:32,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:32,046 INFO L93 Difference]: Finished difference Result 274 states and 418 transitions. [2019-12-07 18:20:32,047 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:20:32,047 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2019-12-07 18:20:32,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:32,049 INFO L225 Difference]: With dead ends: 274 [2019-12-07 18:20:32,049 INFO L226 Difference]: Without dead ends: 262 [2019-12-07 18:20:32,049 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 37 SyntacticMatches, 3 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:20:32,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states. [2019-12-07 18:20:32,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 260. [2019-12-07 18:20:32,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 260 states. [2019-12-07 18:20:32,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260 states to 260 states and 394 transitions. [2019-12-07 18:20:32,056 INFO L78 Accepts]: Start accepts. Automaton has 260 states and 394 transitions. Word has length 38 [2019-12-07 18:20:32,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:32,056 INFO L462 AbstractCegarLoop]: Abstraction has 260 states and 394 transitions. [2019-12-07 18:20:32,056 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:20:32,056 INFO L276 IsEmpty]: Start isEmpty. Operand 260 states and 394 transitions. [2019-12-07 18:20:32,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:20:32,057 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:32,057 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:32,257 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:32,258 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:32,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:32,258 INFO L82 PathProgramCache]: Analyzing trace with hash 1756734972, now seen corresponding path program 1 times [2019-12-07 18:20:32,258 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:32,258 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [483406355] [2019-12-07 18:20:32,258 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:32,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:32,422 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:32,423 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [483406355] [2019-12-07 18:20:32,423 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [656453683] [2019-12-07 18:20:32,423 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:32,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:32,468 INFO L264 TraceCheckSpWp]: Trace formula consists of 253 conjuncts, 13 conjunts are in the unsatisfiable core [2019-12-07 18:20:32,469 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:32,487 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:32,487 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:32,488 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5] total 6 [2019-12-07 18:20:32,488 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1251534567] [2019-12-07 18:20:32,488 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:20:32,488 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:32,488 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:20:32,488 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:20:32,489 INFO L87 Difference]: Start difference. First operand 260 states and 394 transitions. Second operand 6 states. [2019-12-07 18:20:32,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:32,618 INFO L93 Difference]: Finished difference Result 271 states and 402 transitions. [2019-12-07 18:20:32,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:20:32,619 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 18:20:32,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:32,620 INFO L225 Difference]: With dead ends: 271 [2019-12-07 18:20:32,621 INFO L226 Difference]: Without dead ends: 269 [2019-12-07 18:20:32,621 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:20:32,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2019-12-07 18:20:32,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 261. [2019-12-07 18:20:32,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 261 states. [2019-12-07 18:20:32,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 261 states to 261 states and 395 transitions. [2019-12-07 18:20:32,626 INFO L78 Accepts]: Start accepts. Automaton has 261 states and 395 transitions. Word has length 40 [2019-12-07 18:20:32,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:32,627 INFO L462 AbstractCegarLoop]: Abstraction has 261 states and 395 transitions. [2019-12-07 18:20:32,627 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:20:32,627 INFO L276 IsEmpty]: Start isEmpty. Operand 261 states and 395 transitions. [2019-12-07 18:20:32,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 18:20:32,627 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:32,627 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:32,828 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:32,828 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:32,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:32,828 INFO L82 PathProgramCache]: Analyzing trace with hash -1250552987, now seen corresponding path program 1 times [2019-12-07 18:20:32,828 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:32,829 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1897438701] [2019-12-07 18:20:32,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:32,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:32,849 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2019-12-07 18:20:32,849 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1897438701] [2019-12-07 18:20:32,850 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:20:32,850 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:20:32,850 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1079700762] [2019-12-07 18:20:32,850 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:20:32,850 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:32,850 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:20:32,851 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:20:32,851 INFO L87 Difference]: Start difference. First operand 261 states and 395 transitions. Second operand 3 states. [2019-12-07 18:20:32,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:32,871 INFO L93 Difference]: Finished difference Result 461 states and 699 transitions. [2019-12-07 18:20:32,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:20:32,871 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 18:20:32,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:32,872 INFO L225 Difference]: With dead ends: 461 [2019-12-07 18:20:32,872 INFO L226 Difference]: Without dead ends: 245 [2019-12-07 18:20:32,873 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:20:32,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245 states. [2019-12-07 18:20:32,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245 to 243. [2019-12-07 18:20:32,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 243 states. [2019-12-07 18:20:32,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 243 states to 243 states and 360 transitions. [2019-12-07 18:20:32,877 INFO L78 Accepts]: Start accepts. Automaton has 243 states and 360 transitions. Word has length 41 [2019-12-07 18:20:32,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:32,877 INFO L462 AbstractCegarLoop]: Abstraction has 243 states and 360 transitions. [2019-12-07 18:20:32,877 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:20:32,877 INFO L276 IsEmpty]: Start isEmpty. Operand 243 states and 360 transitions. [2019-12-07 18:20:32,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 18:20:32,878 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:32,878 INFO L410 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:32,878 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:32,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:32,878 INFO L82 PathProgramCache]: Analyzing trace with hash -1789960589, now seen corresponding path program 1 times [2019-12-07 18:20:32,879 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:32,879 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [136923513] [2019-12-07 18:20:32,879 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:32,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:32,907 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2019-12-07 18:20:32,908 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [136923513] [2019-12-07 18:20:32,908 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:20:32,908 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:20:32,908 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1267292607] [2019-12-07 18:20:32,908 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:20:32,908 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:32,909 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:20:32,909 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:20:32,909 INFO L87 Difference]: Start difference. First operand 243 states and 360 transitions. Second operand 3 states. [2019-12-07 18:20:32,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:32,928 INFO L93 Difference]: Finished difference Result 333 states and 494 transitions. [2019-12-07 18:20:32,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:20:32,928 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 51 [2019-12-07 18:20:32,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:32,929 INFO L225 Difference]: With dead ends: 333 [2019-12-07 18:20:32,929 INFO L226 Difference]: Without dead ends: 155 [2019-12-07 18:20:32,929 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:20:32,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2019-12-07 18:20:32,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 153. [2019-12-07 18:20:32,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2019-12-07 18:20:32,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 219 transitions. [2019-12-07 18:20:32,933 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 219 transitions. Word has length 51 [2019-12-07 18:20:32,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:32,933 INFO L462 AbstractCegarLoop]: Abstraction has 153 states and 219 transitions. [2019-12-07 18:20:32,933 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:20:32,933 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 219 transitions. [2019-12-07 18:20:32,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:20:32,933 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:32,933 INFO L410 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:32,934 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:32,934 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:32,934 INFO L82 PathProgramCache]: Analyzing trace with hash -608000180, now seen corresponding path program 1 times [2019-12-07 18:20:32,934 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:32,934 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [510483117] [2019-12-07 18:20:32,934 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:32,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:32,989 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-12-07 18:20:32,989 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [510483117] [2019-12-07 18:20:32,989 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1696897300] [2019-12-07 18:20:32,989 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:33,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:33,038 INFO L264 TraceCheckSpWp]: Trace formula consists of 320 conjuncts, 12 conjunts are in the unsatisfiable core [2019-12-07 18:20:33,040 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:33,049 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-12-07 18:20:33,049 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:33,049 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2019-12-07 18:20:33,049 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2039812040] [2019-12-07 18:20:33,050 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:20:33,050 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:33,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:20:33,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:20:33,050 INFO L87 Difference]: Start difference. First operand 153 states and 219 transitions. Second operand 5 states. [2019-12-07 18:20:33,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:33,109 INFO L93 Difference]: Finished difference Result 286 states and 418 transitions. [2019-12-07 18:20:33,109 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:20:33,109 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-12-07 18:20:33,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:33,110 INFO L225 Difference]: With dead ends: 286 [2019-12-07 18:20:33,110 INFO L226 Difference]: Without dead ends: 194 [2019-12-07 18:20:33,111 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 53 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:20:33,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2019-12-07 18:20:33,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 191. [2019-12-07 18:20:33,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2019-12-07 18:20:33,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 273 transitions. [2019-12-07 18:20:33,114 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 273 transitions. Word has length 52 [2019-12-07 18:20:33,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:33,115 INFO L462 AbstractCegarLoop]: Abstraction has 191 states and 273 transitions. [2019-12-07 18:20:33,115 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:20:33,115 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 273 transitions. [2019-12-07 18:20:33,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 18:20:33,115 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:33,115 INFO L410 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:33,315 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:33,316 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:33,316 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:33,316 INFO L82 PathProgramCache]: Analyzing trace with hash 1903289774, now seen corresponding path program 1 times [2019-12-07 18:20:33,316 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:33,316 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2038771732] [2019-12-07 18:20:33,316 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:33,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:33,404 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:33,404 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2038771732] [2019-12-07 18:20:33,404 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1569948058] [2019-12-07 18:20:33,405 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:33,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:33,455 INFO L264 TraceCheckSpWp]: Trace formula consists of 332 conjuncts, 19 conjunts are in the unsatisfiable core [2019-12-07 18:20:33,457 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:33,498 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:33,498 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:33,498 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2019-12-07 18:20:33,498 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [647304428] [2019-12-07 18:20:33,498 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:20:33,498 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:33,499 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:20:33,499 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:20:33,499 INFO L87 Difference]: Start difference. First operand 191 states and 273 transitions. Second operand 9 states. [2019-12-07 18:20:33,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:33,575 INFO L93 Difference]: Finished difference Result 193 states and 274 transitions. [2019-12-07 18:20:33,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:20:33,576 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 56 [2019-12-07 18:20:33,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:33,577 INFO L225 Difference]: With dead ends: 193 [2019-12-07 18:20:33,577 INFO L226 Difference]: Without dead ends: 191 [2019-12-07 18:20:33,577 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 53 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:20:33,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2019-12-07 18:20:33,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 191. [2019-12-07 18:20:33,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2019-12-07 18:20:33,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 272 transitions. [2019-12-07 18:20:33,581 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 272 transitions. Word has length 56 [2019-12-07 18:20:33,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:33,581 INFO L462 AbstractCegarLoop]: Abstraction has 191 states and 272 transitions. [2019-12-07 18:20:33,581 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:20:33,581 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 272 transitions. [2019-12-07 18:20:33,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-12-07 18:20:33,582 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:33,582 INFO L410 BasicCegarLoop]: trace histogram [6, 6, 5, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:33,782 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:33,783 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:33,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:33,783 INFO L82 PathProgramCache]: Analyzing trace with hash 1029731011, now seen corresponding path program 1 times [2019-12-07 18:20:33,783 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:33,783 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [185418063] [2019-12-07 18:20:33,783 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:33,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:34,007 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 15 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:34,007 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [185418063] [2019-12-07 18:20:34,007 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [425981586] [2019-12-07 18:20:34,007 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:34,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:34,068 INFO L264 TraceCheckSpWp]: Trace formula consists of 387 conjuncts, 23 conjunts are in the unsatisfiable core [2019-12-07 18:20:34,070 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:34,120 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 15 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:34,120 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:34,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2019-12-07 18:20:34,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [961162558] [2019-12-07 18:20:34,121 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:20:34,121 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:34,121 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:20:34,121 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:20:34,122 INFO L87 Difference]: Start difference. First operand 191 states and 272 transitions. Second operand 9 states. [2019-12-07 18:20:34,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:34,342 INFO L93 Difference]: Finished difference Result 194 states and 275 transitions. [2019-12-07 18:20:34,342 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:20:34,342 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 63 [2019-12-07 18:20:34,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:34,343 INFO L225 Difference]: With dead ends: 194 [2019-12-07 18:20:34,343 INFO L226 Difference]: Without dead ends: 192 [2019-12-07 18:20:34,344 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 61 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:20:34,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2019-12-07 18:20:34,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 192. [2019-12-07 18:20:34,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2019-12-07 18:20:34,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 273 transitions. [2019-12-07 18:20:34,347 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 273 transitions. Word has length 63 [2019-12-07 18:20:34,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:34,348 INFO L462 AbstractCegarLoop]: Abstraction has 192 states and 273 transitions. [2019-12-07 18:20:34,348 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:20:34,348 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 273 transitions. [2019-12-07 18:20:34,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-12-07 18:20:34,348 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:34,348 INFO L410 BasicCegarLoop]: trace histogram [7, 7, 6, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:34,549 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:34,550 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:34,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:34,550 INFO L82 PathProgramCache]: Analyzing trace with hash 531523283, now seen corresponding path program 1 times [2019-12-07 18:20:34,551 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:34,551 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [277730746] [2019-12-07 18:20:34,552 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:34,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:34,806 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 18 proven. 80 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:34,806 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [277730746] [2019-12-07 18:20:34,806 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1033043945] [2019-12-07 18:20:34,806 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:34,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:34,865 INFO L264 TraceCheckSpWp]: Trace formula consists of 448 conjuncts, 27 conjunts are in the unsatisfiable core [2019-12-07 18:20:34,867 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:34,940 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 18 proven. 80 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:34,940 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:34,940 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 14 [2019-12-07 18:20:34,940 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1998432564] [2019-12-07 18:20:34,940 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 18:20:34,940 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:34,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 18:20:34,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:20:34,941 INFO L87 Difference]: Start difference. First operand 192 states and 273 transitions. Second operand 14 states. [2019-12-07 18:20:35,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:35,104 INFO L93 Difference]: Finished difference Result 301 states and 437 transitions. [2019-12-07 18:20:35,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:20:35,105 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 73 [2019-12-07 18:20:35,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:35,106 INFO L225 Difference]: With dead ends: 301 [2019-12-07 18:20:35,106 INFO L226 Difference]: Without dead ends: 211 [2019-12-07 18:20:35,106 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 68 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:20:35,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2019-12-07 18:20:35,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 211. [2019-12-07 18:20:35,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211 states. [2019-12-07 18:20:35,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 299 transitions. [2019-12-07 18:20:35,110 INFO L78 Accepts]: Start accepts. Automaton has 211 states and 299 transitions. Word has length 73 [2019-12-07 18:20:35,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:35,110 INFO L462 AbstractCegarLoop]: Abstraction has 211 states and 299 transitions. [2019-12-07 18:20:35,110 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 18:20:35,110 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 299 transitions. [2019-12-07 18:20:35,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 18:20:35,111 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:35,111 INFO L410 BasicCegarLoop]: trace histogram [8, 8, 7, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:35,311 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:35,312 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:35,312 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:35,312 INFO L82 PathProgramCache]: Analyzing trace with hash 833926246, now seen corresponding path program 1 times [2019-12-07 18:20:35,312 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:35,312 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1711629769] [2019-12-07 18:20:35,312 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:35,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:35,383 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 21 proven. 99 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2019-12-07 18:20:35,383 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1711629769] [2019-12-07 18:20:35,383 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1824086583] [2019-12-07 18:20:35,383 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:35,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:35,455 INFO L264 TraceCheckSpWp]: Trace formula consists of 511 conjuncts, 18 conjunts are in the unsatisfiable core [2019-12-07 18:20:35,457 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:35,491 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 21 proven. 99 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2019-12-07 18:20:35,491 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:35,491 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7] total 7 [2019-12-07 18:20:35,491 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [126204319] [2019-12-07 18:20:35,492 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:20:35,492 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:35,492 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:20:35,492 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:20:35,492 INFO L87 Difference]: Start difference. First operand 211 states and 299 transitions. Second operand 7 states. [2019-12-07 18:20:35,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:35,588 INFO L93 Difference]: Finished difference Result 324 states and 466 transitions. [2019-12-07 18:20:35,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:20:35,589 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 83 [2019-12-07 18:20:35,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:35,590 INFO L225 Difference]: With dead ends: 324 [2019-12-07 18:20:35,590 INFO L226 Difference]: Without dead ends: 234 [2019-12-07 18:20:35,591 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:20:35,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234 states. [2019-12-07 18:20:35,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 230. [2019-12-07 18:20:35,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states. [2019-12-07 18:20:35,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 325 transitions. [2019-12-07 18:20:35,597 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 325 transitions. Word has length 83 [2019-12-07 18:20:35,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:35,597 INFO L462 AbstractCegarLoop]: Abstraction has 230 states and 325 transitions. [2019-12-07 18:20:35,597 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:20:35,598 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 325 transitions. [2019-12-07 18:20:35,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2019-12-07 18:20:35,598 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:35,599 INFO L410 BasicCegarLoop]: trace histogram [8, 8, 7, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:35,799 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:35,799 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:35,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:35,800 INFO L82 PathProgramCache]: Analyzing trace with hash -112559507, now seen corresponding path program 1 times [2019-12-07 18:20:35,800 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:35,800 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1380009620] [2019-12-07 18:20:35,800 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:35,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:35,980 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 21 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:35,980 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1380009620] [2019-12-07 18:20:35,980 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1003848584] [2019-12-07 18:20:35,980 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:36,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:36,058 INFO L264 TraceCheckSpWp]: Trace formula consists of 518 conjuncts, 29 conjunts are in the unsatisfiable core [2019-12-07 18:20:36,059 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:36,087 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 21 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:36,087 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:36,087 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 9 [2019-12-07 18:20:36,087 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [181482241] [2019-12-07 18:20:36,087 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:20:36,088 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:36,088 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:20:36,088 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:20:36,088 INFO L87 Difference]: Start difference. First operand 230 states and 325 transitions. Second operand 9 states. [2019-12-07 18:20:36,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:36,209 INFO L93 Difference]: Finished difference Result 233 states and 328 transitions. [2019-12-07 18:20:36,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:20:36,209 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 86 [2019-12-07 18:20:36,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:36,210 INFO L225 Difference]: With dead ends: 233 [2019-12-07 18:20:36,211 INFO L226 Difference]: Without dead ends: 231 [2019-12-07 18:20:36,211 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 85 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:20:36,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2019-12-07 18:20:36,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 231. [2019-12-07 18:20:36,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231 states. [2019-12-07 18:20:36,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 326 transitions. [2019-12-07 18:20:36,215 INFO L78 Accepts]: Start accepts. Automaton has 231 states and 326 transitions. Word has length 86 [2019-12-07 18:20:36,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:36,215 INFO L462 AbstractCegarLoop]: Abstraction has 231 states and 326 transitions. [2019-12-07 18:20:36,215 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:20:36,215 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 326 transitions. [2019-12-07 18:20:36,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2019-12-07 18:20:36,215 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:36,215 INFO L410 BasicCegarLoop]: trace histogram [9, 9, 8, 6, 6, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:36,416 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:36,416 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:36,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:36,416 INFO L82 PathProgramCache]: Analyzing trace with hash -141600195, now seen corresponding path program 1 times [2019-12-07 18:20:36,416 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:36,416 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1707247148] [2019-12-07 18:20:36,417 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:36,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:36,504 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 24 proven. 148 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2019-12-07 18:20:36,504 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1707247148] [2019-12-07 18:20:36,504 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1062630969] [2019-12-07 18:20:36,504 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:36,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:36,578 INFO L264 TraceCheckSpWp]: Trace formula consists of 585 conjuncts, 20 conjunts are in the unsatisfiable core [2019-12-07 18:20:36,580 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:36,604 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 24 proven. 148 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2019-12-07 18:20:36,604 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:36,604 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2019-12-07 18:20:36,605 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [732311650] [2019-12-07 18:20:36,605 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:20:36,605 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:36,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:20:36,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:20:36,605 INFO L87 Difference]: Start difference. First operand 231 states and 326 transitions. Second operand 7 states. [2019-12-07 18:20:36,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:36,698 INFO L93 Difference]: Finished difference Result 364 states and 525 transitions. [2019-12-07 18:20:36,698 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:20:36,698 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 98 [2019-12-07 18:20:36,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:36,699 INFO L225 Difference]: With dead ends: 364 [2019-12-07 18:20:36,700 INFO L226 Difference]: Without dead ends: 272 [2019-12-07 18:20:36,700 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:20:36,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272 states. [2019-12-07 18:20:36,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272 to 269. [2019-12-07 18:20:36,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 269 states. [2019-12-07 18:20:36,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 269 states and 380 transitions. [2019-12-07 18:20:36,704 INFO L78 Accepts]: Start accepts. Automaton has 269 states and 380 transitions. Word has length 98 [2019-12-07 18:20:36,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:36,705 INFO L462 AbstractCegarLoop]: Abstraction has 269 states and 380 transitions. [2019-12-07 18:20:36,705 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:20:36,705 INFO L276 IsEmpty]: Start isEmpty. Operand 269 states and 380 transitions. [2019-12-07 18:20:36,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2019-12-07 18:20:36,705 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:36,705 INFO L410 BasicCegarLoop]: trace histogram [9, 9, 8, 6, 6, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:36,906 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:36,906 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:36,906 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:36,906 INFO L82 PathProgramCache]: Analyzing trace with hash -1596344289, now seen corresponding path program 1 times [2019-12-07 18:20:36,906 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:36,906 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1846853982] [2019-12-07 18:20:36,906 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:36,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:37,042 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 24 proven. 170 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:37,043 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1846853982] [2019-12-07 18:20:37,043 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1177736886] [2019-12-07 18:20:37,043 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:37,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:37,119 INFO L264 TraceCheckSpWp]: Trace formula consists of 597 conjuncts, 35 conjunts are in the unsatisfiable core [2019-12-07 18:20:37,120 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:37,233 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 24 proven. 170 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:37,234 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:37,234 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 17 [2019-12-07 18:20:37,234 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1970313333] [2019-12-07 18:20:37,234 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 18:20:37,235 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:37,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 18:20:37,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=234, Unknown=0, NotChecked=0, Total=272 [2019-12-07 18:20:37,235 INFO L87 Difference]: Start difference. First operand 269 states and 380 transitions. Second operand 17 states. [2019-12-07 18:20:37,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:37,429 INFO L93 Difference]: Finished difference Result 271 states and 381 transitions. [2019-12-07 18:20:37,429 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:20:37,429 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 102 [2019-12-07 18:20:37,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:37,430 INFO L225 Difference]: With dead ends: 271 [2019-12-07 18:20:37,430 INFO L226 Difference]: Without dead ends: 269 [2019-12-07 18:20:37,431 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 95 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=234, Unknown=0, NotChecked=0, Total=272 [2019-12-07 18:20:37,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2019-12-07 18:20:37,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 269. [2019-12-07 18:20:37,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 269 states. [2019-12-07 18:20:37,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 269 states and 379 transitions. [2019-12-07 18:20:37,436 INFO L78 Accepts]: Start accepts. Automaton has 269 states and 379 transitions. Word has length 102 [2019-12-07 18:20:37,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:37,436 INFO L462 AbstractCegarLoop]: Abstraction has 269 states and 379 transitions. [2019-12-07 18:20:37,436 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 18:20:37,436 INFO L276 IsEmpty]: Start isEmpty. Operand 269 states and 379 transitions. [2019-12-07 18:20:37,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2019-12-07 18:20:37,437 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:37,437 INFO L410 BasicCegarLoop]: trace histogram [10, 10, 9, 6, 6, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:37,638 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:37,638 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:37,639 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:37,639 INFO L82 PathProgramCache]: Analyzing trace with hash -850579662, now seen corresponding path program 2 times [2019-12-07 18:20:37,640 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:37,640 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [546996681] [2019-12-07 18:20:37,640 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:37,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:38,014 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 27 proven. 208 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:38,014 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [546996681] [2019-12-07 18:20:38,014 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [276252855] [2019-12-07 18:20:38,014 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:38,096 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 18:20:38,096 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:38,098 INFO L264 TraceCheckSpWp]: Trace formula consists of 652 conjuncts, 39 conjunts are in the unsatisfiable core [2019-12-07 18:20:38,099 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:38,163 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 27 proven. 208 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:38,163 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:38,164 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2019-12-07 18:20:38,164 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1773087039] [2019-12-07 18:20:38,164 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:20:38,164 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:38,164 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:20:38,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:20:38,165 INFO L87 Difference]: Start difference. First operand 269 states and 379 transitions. Second operand 13 states. [2019-12-07 18:20:38,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:38,422 INFO L93 Difference]: Finished difference Result 272 states and 382 transitions. [2019-12-07 18:20:38,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 18:20:38,423 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 109 [2019-12-07 18:20:38,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:38,424 INFO L225 Difference]: With dead ends: 272 [2019-12-07 18:20:38,424 INFO L226 Difference]: Without dead ends: 270 [2019-12-07 18:20:38,425 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 107 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:20:38,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 270 states. [2019-12-07 18:20:38,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 270 to 270. [2019-12-07 18:20:38,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 270 states. [2019-12-07 18:20:38,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 270 states to 270 states and 380 transitions. [2019-12-07 18:20:38,429 INFO L78 Accepts]: Start accepts. Automaton has 270 states and 380 transitions. Word has length 109 [2019-12-07 18:20:38,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:38,429 INFO L462 AbstractCegarLoop]: Abstraction has 270 states and 380 transitions. [2019-12-07 18:20:38,429 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:20:38,429 INFO L276 IsEmpty]: Start isEmpty. Operand 270 states and 380 transitions. [2019-12-07 18:20:38,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2019-12-07 18:20:38,430 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:38,430 INFO L410 BasicCegarLoop]: trace histogram [11, 11, 10, 7, 7, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:38,630 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:38,631 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:38,631 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:38,631 INFO L82 PathProgramCache]: Analyzing trace with hash 990487682, now seen corresponding path program 2 times [2019-12-07 18:20:38,632 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:38,632 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1894328336] [2019-12-07 18:20:38,632 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:38,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:38,857 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 30 proven. 264 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:38,858 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1894328336] [2019-12-07 18:20:38,858 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1462767598] [2019-12-07 18:20:38,858 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:38,935 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 18:20:38,935 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:38,937 INFO L264 TraceCheckSpWp]: Trace formula consists of 713 conjuncts, 43 conjunts are in the unsatisfiable core [2019-12-07 18:20:38,938 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:39,102 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 30 proven. 264 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:39,102 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:39,103 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12] total 22 [2019-12-07 18:20:39,103 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1070434170] [2019-12-07 18:20:39,103 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 18:20:39,103 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:39,103 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 18:20:39,104 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=410, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:20:39,104 INFO L87 Difference]: Start difference. First operand 270 states and 380 transitions. Second operand 22 states. [2019-12-07 18:20:39,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:39,348 INFO L93 Difference]: Finished difference Result 379 states and 544 transitions. [2019-12-07 18:20:39,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 18:20:39,348 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 119 [2019-12-07 18:20:39,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:39,350 INFO L225 Difference]: With dead ends: 379 [2019-12-07 18:20:39,350 INFO L226 Difference]: Without dead ends: 289 [2019-12-07 18:20:39,350 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 110 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=52, Invalid=410, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:20:39,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 289 states. [2019-12-07 18:20:39,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 289 to 289. [2019-12-07 18:20:39,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 289 states. [2019-12-07 18:20:39,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 406 transitions. [2019-12-07 18:20:39,355 INFO L78 Accepts]: Start accepts. Automaton has 289 states and 406 transitions. Word has length 119 [2019-12-07 18:20:39,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:39,355 INFO L462 AbstractCegarLoop]: Abstraction has 289 states and 406 transitions. [2019-12-07 18:20:39,355 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 18:20:39,355 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 406 transitions. [2019-12-07 18:20:39,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2019-12-07 18:20:39,356 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:39,356 INFO L410 BasicCegarLoop]: trace histogram [12, 12, 11, 8, 8, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:39,556 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:39,557 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:39,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:39,557 INFO L82 PathProgramCache]: Analyzing trace with hash 1581114197, now seen corresponding path program 2 times [2019-12-07 18:20:39,558 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:39,558 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1171960071] [2019-12-07 18:20:39,558 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:39,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:39,698 INFO L134 CoverageAnalysis]: Checked inductivity of 357 backedges. 33 proven. 298 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2019-12-07 18:20:39,698 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1171960071] [2019-12-07 18:20:39,698 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1857625328] [2019-12-07 18:20:39,698 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:39,793 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 18:20:39,793 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:39,795 INFO L264 TraceCheckSpWp]: Trace formula consists of 776 conjuncts, 26 conjunts are in the unsatisfiable core [2019-12-07 18:20:39,797 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:39,846 INFO L134 CoverageAnalysis]: Checked inductivity of 357 backedges. 33 proven. 298 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2019-12-07 18:20:39,846 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:39,846 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9] total 9 [2019-12-07 18:20:39,846 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1806575489] [2019-12-07 18:20:39,847 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:20:39,847 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:39,847 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:20:39,847 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:20:39,847 INFO L87 Difference]: Start difference. First operand 289 states and 406 transitions. Second operand 9 states. [2019-12-07 18:20:40,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:40,033 INFO L93 Difference]: Finished difference Result 402 states and 573 transitions. [2019-12-07 18:20:40,033 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:20:40,033 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 129 [2019-12-07 18:20:40,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:40,034 INFO L225 Difference]: With dead ends: 402 [2019-12-07 18:20:40,034 INFO L226 Difference]: Without dead ends: 312 [2019-12-07 18:20:40,035 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:20:40,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2019-12-07 18:20:40,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 308. [2019-12-07 18:20:40,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 308 states. [2019-12-07 18:20:40,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 432 transitions. [2019-12-07 18:20:40,040 INFO L78 Accepts]: Start accepts. Automaton has 308 states and 432 transitions. Word has length 129 [2019-12-07 18:20:40,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:40,040 INFO L462 AbstractCegarLoop]: Abstraction has 308 states and 432 transitions. [2019-12-07 18:20:40,040 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:20:40,040 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 432 transitions. [2019-12-07 18:20:40,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2019-12-07 18:20:40,041 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:40,041 INFO L410 BasicCegarLoop]: trace histogram [12, 12, 11, 8, 8, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:40,241 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:40,242 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:40,242 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:40,243 INFO L82 PathProgramCache]: Analyzing trace with hash -1451806434, now seen corresponding path program 2 times [2019-12-07 18:20:40,243 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:40,243 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [987411391] [2019-12-07 18:20:40,244 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:40,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:40,542 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 33 proven. 334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:40,543 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [987411391] [2019-12-07 18:20:40,543 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1537303030] [2019-12-07 18:20:40,543 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:40,644 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 18:20:40,645 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:40,646 INFO L264 TraceCheckSpWp]: Trace formula consists of 783 conjuncts, 47 conjunts are in the unsatisfiable core [2019-12-07 18:20:40,649 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:40,711 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 33 proven. 334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:40,712 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:40,712 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 13 [2019-12-07 18:20:40,712 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [379515619] [2019-12-07 18:20:40,712 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:20:40,712 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:40,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:20:40,713 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:20:40,713 INFO L87 Difference]: Start difference. First operand 308 states and 432 transitions. Second operand 13 states. [2019-12-07 18:20:40,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:40,916 INFO L93 Difference]: Finished difference Result 311 states and 435 transitions. [2019-12-07 18:20:40,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:20:40,916 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 132 [2019-12-07 18:20:40,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:40,918 INFO L225 Difference]: With dead ends: 311 [2019-12-07 18:20:40,918 INFO L226 Difference]: Without dead ends: 309 [2019-12-07 18:20:40,918 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 131 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:20:40,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2019-12-07 18:20:40,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 309. [2019-12-07 18:20:40,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 309 states. [2019-12-07 18:20:40,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 309 states to 309 states and 433 transitions. [2019-12-07 18:20:40,923 INFO L78 Accepts]: Start accepts. Automaton has 309 states and 433 transitions. Word has length 132 [2019-12-07 18:20:40,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:40,924 INFO L462 AbstractCegarLoop]: Abstraction has 309 states and 433 transitions. [2019-12-07 18:20:40,924 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:20:40,924 INFO L276 IsEmpty]: Start isEmpty. Operand 309 states and 433 transitions. [2019-12-07 18:20:40,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2019-12-07 18:20:40,925 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:40,925 INFO L410 BasicCegarLoop]: trace histogram [13, 13, 12, 9, 9, 6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:41,125 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:41,126 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:41,126 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:41,127 INFO L82 PathProgramCache]: Analyzing trace with hash -722301074, now seen corresponding path program 2 times [2019-12-07 18:20:41,127 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:41,127 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1737587154] [2019-12-07 18:20:41,128 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:41,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:41,313 INFO L134 CoverageAnalysis]: Checked inductivity of 441 backedges. 36 proven. 379 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2019-12-07 18:20:41,313 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1737587154] [2019-12-07 18:20:41,313 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1828356875] [2019-12-07 18:20:41,313 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:41,416 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 18:20:41,416 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:41,418 INFO L264 TraceCheckSpWp]: Trace formula consists of 850 conjuncts, 28 conjunts are in the unsatisfiable core [2019-12-07 18:20:41,420 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:41,464 INFO L134 CoverageAnalysis]: Checked inductivity of 441 backedges. 36 proven. 379 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2019-12-07 18:20:41,465 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:41,465 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 9 [2019-12-07 18:20:41,465 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1080786495] [2019-12-07 18:20:41,465 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:20:41,466 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:41,466 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:20:41,466 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:20:41,466 INFO L87 Difference]: Start difference. First operand 309 states and 433 transitions. Second operand 9 states. [2019-12-07 18:20:41,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:41,599 INFO L93 Difference]: Finished difference Result 442 states and 632 transitions. [2019-12-07 18:20:41,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:20:41,599 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 144 [2019-12-07 18:20:41,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:41,601 INFO L225 Difference]: With dead ends: 442 [2019-12-07 18:20:41,601 INFO L226 Difference]: Without dead ends: 350 [2019-12-07 18:20:41,601 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 149 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:20:41,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 350 states. [2019-12-07 18:20:41,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 350 to 347. [2019-12-07 18:20:41,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 347 states. [2019-12-07 18:20:41,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 347 states to 347 states and 487 transitions. [2019-12-07 18:20:41,605 INFO L78 Accepts]: Start accepts. Automaton has 347 states and 487 transitions. Word has length 144 [2019-12-07 18:20:41,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:41,606 INFO L462 AbstractCegarLoop]: Abstraction has 347 states and 487 transitions. [2019-12-07 18:20:41,606 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:20:41,606 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 487 transitions. [2019-12-07 18:20:41,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2019-12-07 18:20:41,606 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:41,606 INFO L410 BasicCegarLoop]: trace histogram [13, 13, 12, 9, 9, 6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:41,807 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:41,807 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:41,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:41,808 INFO L82 PathProgramCache]: Analyzing trace with hash 38595792, now seen corresponding path program 2 times [2019-12-07 18:20:41,809 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:41,809 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1438077137] [2019-12-07 18:20:41,809 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:41,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:42,075 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 36 proven. 417 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:42,075 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1438077137] [2019-12-07 18:20:42,075 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [838991674] [2019-12-07 18:20:42,075 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:42,162 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 18:20:42,162 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:42,165 INFO L264 TraceCheckSpWp]: Trace formula consists of 862 conjuncts, 51 conjunts are in the unsatisfiable core [2019-12-07 18:20:42,166 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:42,385 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 36 proven. 417 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:42,385 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:42,385 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 25 [2019-12-07 18:20:42,385 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [884299581] [2019-12-07 18:20:42,385 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2019-12-07 18:20:42,385 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:42,386 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2019-12-07 18:20:42,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=542, Unknown=0, NotChecked=0, Total=600 [2019-12-07 18:20:42,386 INFO L87 Difference]: Start difference. First operand 347 states and 487 transitions. Second operand 25 states. [2019-12-07 18:20:42,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:42,681 INFO L93 Difference]: Finished difference Result 349 states and 488 transitions. [2019-12-07 18:20:42,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 18:20:42,682 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 148 [2019-12-07 18:20:42,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:42,683 INFO L225 Difference]: With dead ends: 349 [2019-12-07 18:20:42,683 INFO L226 Difference]: Without dead ends: 347 [2019-12-07 18:20:42,684 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 137 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=58, Invalid=542, Unknown=0, NotChecked=0, Total=600 [2019-12-07 18:20:42,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2019-12-07 18:20:42,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 347. [2019-12-07 18:20:42,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 347 states. [2019-12-07 18:20:42,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 347 states to 347 states and 486 transitions. [2019-12-07 18:20:42,688 INFO L78 Accepts]: Start accepts. Automaton has 347 states and 486 transitions. Word has length 148 [2019-12-07 18:20:42,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:42,689 INFO L462 AbstractCegarLoop]: Abstraction has 347 states and 486 transitions. [2019-12-07 18:20:42,689 INFO L463 AbstractCegarLoop]: Interpolant automaton has 25 states. [2019-12-07 18:20:42,689 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 486 transitions. [2019-12-07 18:20:42,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2019-12-07 18:20:42,690 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:42,690 INFO L410 BasicCegarLoop]: trace histogram [14, 14, 13, 9, 9, 6, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:42,890 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 20 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:42,891 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:42,891 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:42,892 INFO L82 PathProgramCache]: Analyzing trace with hash 71795041, now seen corresponding path program 3 times [2019-12-07 18:20:42,892 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:42,892 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [800846274] [2019-12-07 18:20:42,893 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:42,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:43,294 INFO L134 CoverageAnalysis]: Checked inductivity of 513 backedges. 39 proven. 474 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:43,294 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [800846274] [2019-12-07 18:20:43,294 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2005419587] [2019-12-07 18:20:43,294 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:43,358 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2019-12-07 18:20:43,358 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:43,359 INFO L264 TraceCheckSpWp]: Trace formula consists of 387 conjuncts, 23 conjunts are in the unsatisfiable core [2019-12-07 18:20:43,361 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:43,384 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 4 terms [2019-12-07 18:20:43,384 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,385 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,385 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,387 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,387 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 3 terms [2019-12-07 18:20:43,387 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,388 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,388 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,388 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 3 terms [2019-12-07 18:20:43,389 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,389 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,389 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,390 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,390 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,391 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,391 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 3 terms [2019-12-07 18:20:43,391 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,392 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,392 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 3 terms [2019-12-07 18:20:43,392 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,393 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,393 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,394 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:43,599 INFO L134 CoverageAnalysis]: Checked inductivity of 513 backedges. 249 proven. 31 refuted. 0 times theorem prover too weak. 233 trivial. 0 not checked. [2019-12-07 18:20:43,600 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:43,600 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 8] total 22 [2019-12-07 18:20:43,600 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [272538584] [2019-12-07 18:20:43,600 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 18:20:43,600 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:43,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 18:20:43,601 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=405, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:20:43,601 INFO L87 Difference]: Start difference. First operand 347 states and 486 transitions. Second operand 22 states. [2019-12-07 18:20:44,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:44,380 INFO L93 Difference]: Finished difference Result 545 states and 767 transitions. [2019-12-07 18:20:44,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 18:20:44,380 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 155 [2019-12-07 18:20:44,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:44,382 INFO L225 Difference]: With dead ends: 545 [2019-12-07 18:20:44,382 INFO L226 Difference]: Without dead ends: 449 [2019-12-07 18:20:44,382 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 153 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=130, Invalid=1060, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 18:20:44,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 449 states. [2019-12-07 18:20:44,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 449 to 425. [2019-12-07 18:20:44,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 425 states. [2019-12-07 18:20:44,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 425 states to 425 states and 598 transitions. [2019-12-07 18:20:44,388 INFO L78 Accepts]: Start accepts. Automaton has 425 states and 598 transitions. Word has length 155 [2019-12-07 18:20:44,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:44,388 INFO L462 AbstractCegarLoop]: Abstraction has 425 states and 598 transitions. [2019-12-07 18:20:44,388 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 18:20:44,388 INFO L276 IsEmpty]: Start isEmpty. Operand 425 states and 598 transitions. [2019-12-07 18:20:44,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2019-12-07 18:20:44,389 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:44,389 INFO L410 BasicCegarLoop]: trace histogram [15, 14, 14, 10, 10, 6, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:44,590 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:44,590 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:44,591 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:44,591 INFO L82 PathProgramCache]: Analyzing trace with hash 808412595, now seen corresponding path program 1 times [2019-12-07 18:20:44,591 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:44,592 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1585295094] [2019-12-07 18:20:44,592 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:44,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:44,717 INFO L134 CoverageAnalysis]: Checked inductivity of 598 backedges. 98 proven. 470 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2019-12-07 18:20:44,717 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1585295094] [2019-12-07 18:20:44,717 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [526598369] [2019-12-07 18:20:44,717 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:44,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:44,808 INFO L264 TraceCheckSpWp]: Trace formula consists of 980 conjuncts, 15 conjunts are in the unsatisfiable core [2019-12-07 18:20:44,810 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:44,833 INFO L134 CoverageAnalysis]: Checked inductivity of 598 backedges. 98 proven. 470 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2019-12-07 18:20:44,834 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:44,834 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2019-12-07 18:20:44,834 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [699061769] [2019-12-07 18:20:44,834 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:20:44,834 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:44,834 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:20:44,834 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:20:44,835 INFO L87 Difference]: Start difference. First operand 425 states and 598 transitions. Second operand 10 states. [2019-12-07 18:20:44,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:44,923 INFO L93 Difference]: Finished difference Result 927 states and 1318 transitions. [2019-12-07 18:20:44,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:20:44,923 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 165 [2019-12-07 18:20:44,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:44,927 INFO L225 Difference]: With dead ends: 927 [2019-12-07 18:20:44,927 INFO L226 Difference]: Without dead ends: 760 [2019-12-07 18:20:44,927 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 172 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:20:44,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 760 states. [2019-12-07 18:20:44,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 760 to 719. [2019-12-07 18:20:44,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 719 states. [2019-12-07 18:20:44,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 719 states to 719 states and 1011 transitions. [2019-12-07 18:20:44,939 INFO L78 Accepts]: Start accepts. Automaton has 719 states and 1011 transitions. Word has length 165 [2019-12-07 18:20:44,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:44,940 INFO L462 AbstractCegarLoop]: Abstraction has 719 states and 1011 transitions. [2019-12-07 18:20:44,940 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:20:44,940 INFO L276 IsEmpty]: Start isEmpty. Operand 719 states and 1011 transitions. [2019-12-07 18:20:44,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2019-12-07 18:20:44,941 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:44,941 INFO L410 BasicCegarLoop]: trace histogram [16, 16, 15, 11, 11, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:45,141 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:45,142 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:45,142 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:45,143 INFO L82 PathProgramCache]: Analyzing trace with hash -1110215403, now seen corresponding path program 1 times [2019-12-07 18:20:45,143 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:45,143 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1880094657] [2019-12-07 18:20:45,144 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:45,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:45,292 INFO L134 CoverageAnalysis]: Checked inductivity of 692 backedges. 656 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2019-12-07 18:20:45,292 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1880094657] [2019-12-07 18:20:45,292 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:20:45,292 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:20:45,292 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1851323923] [2019-12-07 18:20:45,293 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:20:45,293 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:45,293 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:20:45,293 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:20:45,293 INFO L87 Difference]: Start difference. First operand 719 states and 1011 transitions. Second operand 10 states. [2019-12-07 18:20:45,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:45,358 INFO L93 Difference]: Finished difference Result 860 states and 1208 transitions. [2019-12-07 18:20:45,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:20:45,359 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 177 [2019-12-07 18:20:45,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:45,362 INFO L225 Difference]: With dead ends: 860 [2019-12-07 18:20:45,362 INFO L226 Difference]: Without dead ends: 856 [2019-12-07 18:20:45,362 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:20:45,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 856 states. [2019-12-07 18:20:45,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 856 to 852. [2019-12-07 18:20:45,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 852 states. [2019-12-07 18:20:45,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 852 states to 852 states and 1200 transitions. [2019-12-07 18:20:45,372 INFO L78 Accepts]: Start accepts. Automaton has 852 states and 1200 transitions. Word has length 177 [2019-12-07 18:20:45,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:45,372 INFO L462 AbstractCegarLoop]: Abstraction has 852 states and 1200 transitions. [2019-12-07 18:20:45,372 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:20:45,372 INFO L276 IsEmpty]: Start isEmpty. Operand 852 states and 1200 transitions. [2019-12-07 18:20:45,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2019-12-07 18:20:45,373 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:45,373 INFO L410 BasicCegarLoop]: trace histogram [16, 16, 15, 11, 11, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:45,373 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:45,373 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:45,373 INFO L82 PathProgramCache]: Analyzing trace with hash -45491697, now seen corresponding path program 3 times [2019-12-07 18:20:45,373 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:45,373 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1650039975] [2019-12-07 18:20:45,373 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:45,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:45,759 INFO L134 CoverageAnalysis]: Checked inductivity of 701 backedges. 45 proven. 656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:45,759 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1650039975] [2019-12-07 18:20:45,759 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [115367632] [2019-12-07 18:20:45,759 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:45,892 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 13 check-sat command(s) [2019-12-07 18:20:45,893 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:45,895 INFO L264 TraceCheckSpWp]: Trace formula consists of 1048 conjuncts, 26 conjunts are in the unsatisfiable core [2019-12-07 18:20:45,897 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:46,015 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 4 terms [2019-12-07 18:20:46,016 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,016 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,016 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,016 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,017 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 3 terms [2019-12-07 18:20:46,017 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,017 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,017 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,018 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 3 terms [2019-12-07 18:20:46,018 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,018 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,019 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,019 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,019 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,020 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,020 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 3 terms [2019-12-07 18:20:46,020 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,020 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,021 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 3 terms [2019-12-07 18:20:46,021 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,021 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,021 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,022 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:46,159 INFO L134 CoverageAnalysis]: Checked inductivity of 701 backedges. 665 proven. 6 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2019-12-07 18:20:46,159 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:46,160 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 12] total 27 [2019-12-07 18:20:46,160 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2048940192] [2019-12-07 18:20:46,160 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2019-12-07 18:20:46,160 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:46,160 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2019-12-07 18:20:46,161 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=164, Invalid=538, Unknown=0, NotChecked=0, Total=702 [2019-12-07 18:20:46,161 INFO L87 Difference]: Start difference. First operand 852 states and 1200 transitions. Second operand 27 states. [2019-12-07 18:20:46,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:46,549 INFO L93 Difference]: Finished difference Result 863 states and 1209 transitions. [2019-12-07 18:20:46,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 18:20:46,549 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 178 [2019-12-07 18:20:46,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:46,552 INFO L225 Difference]: With dead ends: 863 [2019-12-07 18:20:46,552 INFO L226 Difference]: Without dead ends: 861 [2019-12-07 18:20:46,553 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 169 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=223, Invalid=769, Unknown=0, NotChecked=0, Total=992 [2019-12-07 18:20:46,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 861 states. [2019-12-07 18:20:46,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 861 to 852. [2019-12-07 18:20:46,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 852 states. [2019-12-07 18:20:46,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 852 states to 852 states and 1199 transitions. [2019-12-07 18:20:46,563 INFO L78 Accepts]: Start accepts. Automaton has 852 states and 1199 transitions. Word has length 178 [2019-12-07 18:20:46,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:46,563 INFO L462 AbstractCegarLoop]: Abstraction has 852 states and 1199 transitions. [2019-12-07 18:20:46,563 INFO L463 AbstractCegarLoop]: Interpolant automaton has 27 states. [2019-12-07 18:20:46,563 INFO L276 IsEmpty]: Start isEmpty. Operand 852 states and 1199 transitions. [2019-12-07 18:20:46,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2019-12-07 18:20:46,564 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:46,564 INFO L410 BasicCegarLoop]: trace histogram [17, 16, 16, 12, 12, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:46,765 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:46,765 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:46,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:46,766 INFO L82 PathProgramCache]: Analyzing trace with hash 1121314851, now seen corresponding path program 1 times [2019-12-07 18:20:46,767 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:46,767 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [195783806] [2019-12-07 18:20:46,767 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:46,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:46,905 INFO L134 CoverageAnalysis]: Checked inductivity of 811 backedges. 125 proven. 650 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2019-12-07 18:20:46,906 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [195783806] [2019-12-07 18:20:46,906 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1888402337] [2019-12-07 18:20:46,906 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:47,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:47,005 INFO L264 TraceCheckSpWp]: Trace formula consists of 1129 conjuncts, 17 conjunts are in the unsatisfiable core [2019-12-07 18:20:47,008 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:47,045 INFO L134 CoverageAnalysis]: Checked inductivity of 811 backedges. 125 proven. 650 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2019-12-07 18:20:47,045 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:47,045 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2019-12-07 18:20:47,045 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [626617985] [2019-12-07 18:20:47,046 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:20:47,046 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:47,046 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:20:47,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:20:47,046 INFO L87 Difference]: Start difference. First operand 852 states and 1199 transitions. Second operand 11 states. [2019-12-07 18:20:47,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:47,144 INFO L93 Difference]: Finished difference Result 1435 states and 2015 transitions. [2019-12-07 18:20:47,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:20:47,145 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 193 [2019-12-07 18:20:47,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:47,148 INFO L225 Difference]: With dead ends: 1435 [2019-12-07 18:20:47,148 INFO L226 Difference]: Without dead ends: 959 [2019-12-07 18:20:47,149 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 210 GetRequests, 201 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:20:47,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 959 states. [2019-12-07 18:20:47,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 959 to 930. [2019-12-07 18:20:47,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 930 states. [2019-12-07 18:20:47,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 930 states to 930 states and 1311 transitions. [2019-12-07 18:20:47,165 INFO L78 Accepts]: Start accepts. Automaton has 930 states and 1311 transitions. Word has length 193 [2019-12-07 18:20:47,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:47,165 INFO L462 AbstractCegarLoop]: Abstraction has 930 states and 1311 transitions. [2019-12-07 18:20:47,165 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:20:47,165 INFO L276 IsEmpty]: Start isEmpty. Operand 930 states and 1311 transitions. [2019-12-07 18:20:47,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2019-12-07 18:20:47,166 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:47,166 INFO L410 BasicCegarLoop]: trace histogram [17, 17, 16, 12, 12, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:47,366 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 24 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:47,366 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:47,367 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:47,367 INFO L82 PathProgramCache]: Analyzing trace with hash -608595007, now seen corresponding path program 3 times [2019-12-07 18:20:47,367 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:47,367 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031948616] [2019-12-07 18:20:47,367 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:47,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:47,711 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 48 proven. 772 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:47,712 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031948616] [2019-12-07 18:20:47,712 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1609857738] [2019-12-07 18:20:47,712 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:47,851 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 13 check-sat command(s) [2019-12-07 18:20:47,851 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:47,854 INFO L264 TraceCheckSpWp]: Trace formula consists of 1127 conjuncts, 44 conjunts are in the unsatisfiable core [2019-12-07 18:20:47,856 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:47,981 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:48,070 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 48 proven. 742 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2019-12-07 18:20:48,071 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:48,071 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 13] total 29 [2019-12-07 18:20:48,071 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203103381] [2019-12-07 18:20:48,071 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2019-12-07 18:20:48,071 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:48,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2019-12-07 18:20:48,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=740, Unknown=0, NotChecked=0, Total=812 [2019-12-07 18:20:48,072 INFO L87 Difference]: Start difference. First operand 930 states and 1311 transitions. Second operand 29 states. [2019-12-07 18:20:48,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:48,570 INFO L93 Difference]: Finished difference Result 932 states and 1312 transitions. [2019-12-07 18:20:48,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 18:20:48,571 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 194 [2019-12-07 18:20:48,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:48,574 INFO L225 Difference]: With dead ends: 932 [2019-12-07 18:20:48,574 INFO L226 Difference]: Without dead ends: 930 [2019-12-07 18:20:48,575 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 184 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=77, Invalid=793, Unknown=0, NotChecked=0, Total=870 [2019-12-07 18:20:48,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 930 states. [2019-12-07 18:20:48,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 930 to 930. [2019-12-07 18:20:48,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 930 states. [2019-12-07 18:20:48,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 930 states to 930 states and 1310 transitions. [2019-12-07 18:20:48,590 INFO L78 Accepts]: Start accepts. Automaton has 930 states and 1310 transitions. Word has length 194 [2019-12-07 18:20:48,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:48,590 INFO L462 AbstractCegarLoop]: Abstraction has 930 states and 1310 transitions. [2019-12-07 18:20:48,590 INFO L463 AbstractCegarLoop]: Interpolant automaton has 29 states. [2019-12-07 18:20:48,590 INFO L276 IsEmpty]: Start isEmpty. Operand 930 states and 1310 transitions. [2019-12-07 18:20:48,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 212 [2019-12-07 18:20:48,592 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:48,592 INFO L410 BasicCegarLoop]: trace histogram [19, 18, 18, 13, 13, 8, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:48,792 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:48,793 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:48,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:48,794 INFO L82 PathProgramCache]: Analyzing trace with hash -2110169374, now seen corresponding path program 2 times [2019-12-07 18:20:48,794 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:48,794 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [265466899] [2019-12-07 18:20:48,795 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:48,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:48,965 INFO L134 CoverageAnalysis]: Checked inductivity of 1010 backedges. 128 proven. 842 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2019-12-07 18:20:48,965 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [265466899] [2019-12-07 18:20:48,965 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [287286429] [2019-12-07 18:20:48,965 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:49,077 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 18:20:49,077 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:49,079 INFO L264 TraceCheckSpWp]: Trace formula consists of 1245 conjuncts, 19 conjunts are in the unsatisfiable core [2019-12-07 18:20:49,091 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:49,139 INFO L134 CoverageAnalysis]: Checked inductivity of 1010 backedges. 128 proven. 842 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2019-12-07 18:20:49,139 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:49,139 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 12 [2019-12-07 18:20:49,139 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [85137925] [2019-12-07 18:20:49,140 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:20:49,140 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:49,140 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:20:49,140 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:20:49,140 INFO L87 Difference]: Start difference. First operand 930 states and 1310 transitions. Second operand 12 states. [2019-12-07 18:20:49,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:49,246 INFO L93 Difference]: Finished difference Result 1125 states and 1565 transitions. [2019-12-07 18:20:49,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 18:20:49,246 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 211 [2019-12-07 18:20:49,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:49,250 INFO L225 Difference]: With dead ends: 1125 [2019-12-07 18:20:49,250 INFO L226 Difference]: Without dead ends: 1040 [2019-12-07 18:20:49,250 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 230 GetRequests, 220 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:20:49,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1040 states. [2019-12-07 18:20:49,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1040 to 1008. [2019-12-07 18:20:49,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1008 states. [2019-12-07 18:20:49,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1008 states to 1008 states and 1417 transitions. [2019-12-07 18:20:49,264 INFO L78 Accepts]: Start accepts. Automaton has 1008 states and 1417 transitions. Word has length 211 [2019-12-07 18:20:49,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:49,264 INFO L462 AbstractCegarLoop]: Abstraction has 1008 states and 1417 transitions. [2019-12-07 18:20:49,264 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:20:49,264 INFO L276 IsEmpty]: Start isEmpty. Operand 1008 states and 1417 transitions. [2019-12-07 18:20:49,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 240 [2019-12-07 18:20:49,265 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:49,266 INFO L410 BasicCegarLoop]: trace histogram [21, 20, 20, 15, 15, 10, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:49,466 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:49,466 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:49,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:49,466 INFO L82 PathProgramCache]: Analyzing trace with hash -397716270, now seen corresponding path program 2 times [2019-12-07 18:20:49,466 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:49,466 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [387655195] [2019-12-07 18:20:49,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:49,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:49,608 INFO L134 CoverageAnalysis]: Checked inductivity of 1283 backedges. 159 proven. 1078 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2019-12-07 18:20:49,609 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [387655195] [2019-12-07 18:20:49,609 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [251907225] [2019-12-07 18:20:49,609 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:49,736 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 18:20:49,736 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:49,738 INFO L264 TraceCheckSpWp]: Trace formula consists of 1394 conjuncts, 21 conjunts are in the unsatisfiable core [2019-12-07 18:20:49,741 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:49,786 INFO L134 CoverageAnalysis]: Checked inductivity of 1283 backedges. 159 proven. 1078 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2019-12-07 18:20:49,786 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:49,787 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 13 [2019-12-07 18:20:49,787 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584455314] [2019-12-07 18:20:49,787 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:20:49,787 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:49,787 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:20:49,787 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:20:49,787 INFO L87 Difference]: Start difference. First operand 1008 states and 1417 transitions. Second operand 13 states. [2019-12-07 18:20:49,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:49,912 INFO L93 Difference]: Finished difference Result 1675 states and 2348 transitions. [2019-12-07 18:20:49,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:20:49,912 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 239 [2019-12-07 18:20:49,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:49,916 INFO L225 Difference]: With dead ends: 1675 [2019-12-07 18:20:49,916 INFO L226 Difference]: Without dead ends: 1121 [2019-12-07 18:20:49,917 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 260 GetRequests, 249 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:20:49,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1121 states. [2019-12-07 18:20:49,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1121 to 1086. [2019-12-07 18:20:49,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1086 states. [2019-12-07 18:20:49,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1086 states to 1086 states and 1529 transitions. [2019-12-07 18:20:49,931 INFO L78 Accepts]: Start accepts. Automaton has 1086 states and 1529 transitions. Word has length 239 [2019-12-07 18:20:49,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:49,931 INFO L462 AbstractCegarLoop]: Abstraction has 1086 states and 1529 transitions. [2019-12-07 18:20:49,931 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:20:49,931 INFO L276 IsEmpty]: Start isEmpty. Operand 1086 states and 1529 transitions. [2019-12-07 18:20:49,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2019-12-07 18:20:49,932 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:49,932 INFO L410 BasicCegarLoop]: trace histogram [21, 21, 20, 15, 15, 10, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:50,133 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 27 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:50,134 INFO L410 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:50,134 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:50,135 INFO L82 PathProgramCache]: Analyzing trace with hash -453919502, now seen corresponding path program 4 times [2019-12-07 18:20:50,135 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:50,135 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1305524998] [2019-12-07 18:20:50,135 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:50,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:50,638 INFO L134 CoverageAnalysis]: Checked inductivity of 1295 backedges. 60 proven. 1235 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:50,638 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1305524998] [2019-12-07 18:20:50,639 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1397523087] [2019-12-07 18:20:50,639 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:50,707 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-12-07 18:20:50,708 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:50,710 INFO L264 TraceCheckSpWp]: Trace formula consists of 351 conjuncts, 83 conjunts are in the unsatisfiable core [2019-12-07 18:20:50,712 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:51,253 INFO L134 CoverageAnalysis]: Checked inductivity of 1295 backedges. 60 proven. 1235 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:51,254 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:51,254 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 41 [2019-12-07 18:20:51,254 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [450431768] [2019-12-07 18:20:51,254 INFO L442 AbstractCegarLoop]: Interpolant automaton has 41 states [2019-12-07 18:20:51,254 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:51,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2019-12-07 18:20:51,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=98, Invalid=1542, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 18:20:51,255 INFO L87 Difference]: Start difference. First operand 1086 states and 1529 transitions. Second operand 41 states. [2019-12-07 18:20:51,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:51,949 INFO L93 Difference]: Finished difference Result 1088 states and 1530 transitions. [2019-12-07 18:20:51,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 18:20:51,949 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 240 [2019-12-07 18:20:51,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:51,953 INFO L225 Difference]: With dead ends: 1088 [2019-12-07 18:20:51,953 INFO L226 Difference]: Without dead ends: 1086 [2019-12-07 18:20:51,954 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 262 GetRequests, 221 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=98, Invalid=1542, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 18:20:51,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1086 states. [2019-12-07 18:20:51,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1086 to 1086. [2019-12-07 18:20:51,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1086 states. [2019-12-07 18:20:51,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1086 states to 1086 states and 1528 transitions. [2019-12-07 18:20:51,965 INFO L78 Accepts]: Start accepts. Automaton has 1086 states and 1528 transitions. Word has length 240 [2019-12-07 18:20:51,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:51,966 INFO L462 AbstractCegarLoop]: Abstraction has 1086 states and 1528 transitions. [2019-12-07 18:20:51,966 INFO L463 AbstractCegarLoop]: Interpolant automaton has 41 states. [2019-12-07 18:20:51,966 INFO L276 IsEmpty]: Start isEmpty. Operand 1086 states and 1528 transitions. [2019-12-07 18:20:51,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 258 [2019-12-07 18:20:51,967 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:51,967 INFO L410 BasicCegarLoop]: trace histogram [23, 22, 22, 16, 16, 10, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:52,167 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 28 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:52,168 INFO L410 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:52,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:52,168 INFO L82 PathProgramCache]: Analyzing trace with hash 220503505, now seen corresponding path program 3 times [2019-12-07 18:20:52,169 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:52,169 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [909490307] [2019-12-07 18:20:52,169 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:52,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:52,368 INFO L134 CoverageAnalysis]: Checked inductivity of 1530 backedges. 158 proven. 1322 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2019-12-07 18:20:52,368 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [909490307] [2019-12-07 18:20:52,368 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [709302429] [2019-12-07 18:20:52,368 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:52,556 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 14 check-sat command(s) [2019-12-07 18:20:52,557 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:52,559 INFO L264 TraceCheckSpWp]: Trace formula consists of 1510 conjuncts, 23 conjunts are in the unsatisfiable core [2019-12-07 18:20:52,562 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:52,614 INFO L134 CoverageAnalysis]: Checked inductivity of 1530 backedges. 158 proven. 1322 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2019-12-07 18:20:52,615 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:52,615 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 14 [2019-12-07 18:20:52,615 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1390964180] [2019-12-07 18:20:52,615 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 18:20:52,615 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:52,615 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 18:20:52,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:20:52,616 INFO L87 Difference]: Start difference. First operand 1086 states and 1528 transitions. Second operand 14 states. [2019-12-07 18:20:52,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:52,748 INFO L93 Difference]: Finished difference Result 1287 states and 1787 transitions. [2019-12-07 18:20:52,748 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 18:20:52,748 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 257 [2019-12-07 18:20:52,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:52,752 INFO L225 Difference]: With dead ends: 1287 [2019-12-07 18:20:52,752 INFO L226 Difference]: Without dead ends: 1202 [2019-12-07 18:20:52,753 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 280 GetRequests, 268 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:20:52,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1202 states. [2019-12-07 18:20:52,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1202 to 1164. [2019-12-07 18:20:52,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1164 states. [2019-12-07 18:20:52,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1164 states to 1164 states and 1635 transitions. [2019-12-07 18:20:52,768 INFO L78 Accepts]: Start accepts. Automaton has 1164 states and 1635 transitions. Word has length 257 [2019-12-07 18:20:52,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:52,768 INFO L462 AbstractCegarLoop]: Abstraction has 1164 states and 1635 transitions. [2019-12-07 18:20:52,768 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 18:20:52,768 INFO L276 IsEmpty]: Start isEmpty. Operand 1164 states and 1635 transitions. [2019-12-07 18:20:52,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 286 [2019-12-07 18:20:52,769 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:52,769 INFO L410 BasicCegarLoop]: trace histogram [25, 24, 24, 18, 18, 12, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:52,969 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 29 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:52,970 INFO L410 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:52,970 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:52,970 INFO L82 PathProgramCache]: Analyzing trace with hash 530835265, now seen corresponding path program 3 times [2019-12-07 18:20:52,970 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:52,970 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1545761896] [2019-12-07 18:20:52,970 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:52,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:53,169 INFO L134 CoverageAnalysis]: Checked inductivity of 1863 backedges. 193 proven. 1614 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2019-12-07 18:20:53,169 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1545761896] [2019-12-07 18:20:53,169 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [928999688] [2019-12-07 18:20:53,169 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:53,232 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2019-12-07 18:20:53,233 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:53,234 INFO L264 TraceCheckSpWp]: Trace formula consists of 334 conjuncts, 12 conjunts are in the unsatisfiable core [2019-12-07 18:20:53,235 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:53,252 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:53,365 INFO L134 CoverageAnalysis]: Checked inductivity of 1863 backedges. 469 proven. 4 refuted. 0 times theorem prover too weak. 1390 trivial. 0 not checked. [2019-12-07 18:20:53,365 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:53,365 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 6] total 19 [2019-12-07 18:20:53,366 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [952044825] [2019-12-07 18:20:53,366 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 18:20:53,366 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:53,366 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 18:20:53,366 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=114, Invalid=228, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:20:53,366 INFO L87 Difference]: Start difference. First operand 1164 states and 1635 transitions. Second operand 19 states. [2019-12-07 18:20:53,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:53,966 INFO L93 Difference]: Finished difference Result 1318 states and 1838 transitions. [2019-12-07 18:20:53,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 18:20:53,967 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 285 [2019-12-07 18:20:53,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:53,970 INFO L225 Difference]: With dead ends: 1318 [2019-12-07 18:20:53,970 INFO L226 Difference]: Without dead ends: 686 [2019-12-07 18:20:53,971 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 355 GetRequests, 308 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 512 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=576, Invalid=1776, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 18:20:53,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 686 states. [2019-12-07 18:20:53,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 686 to 659. [2019-12-07 18:20:53,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 659 states. [2019-12-07 18:20:53,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 659 states to 659 states and 909 transitions. [2019-12-07 18:20:53,982 INFO L78 Accepts]: Start accepts. Automaton has 659 states and 909 transitions. Word has length 285 [2019-12-07 18:20:53,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:53,983 INFO L462 AbstractCegarLoop]: Abstraction has 659 states and 909 transitions. [2019-12-07 18:20:53,983 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 18:20:53,983 INFO L276 IsEmpty]: Start isEmpty. Operand 659 states and 909 transitions. [2019-12-07 18:20:53,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 287 [2019-12-07 18:20:53,985 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:53,985 INFO L410 BasicCegarLoop]: trace histogram [25, 25, 24, 18, 18, 12, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:54,186 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 30 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:54,186 INFO L410 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:54,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:54,187 INFO L82 PathProgramCache]: Analyzing trace with hash -1733592989, now seen corresponding path program 5 times [2019-12-07 18:20:54,187 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:54,187 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [429914566] [2019-12-07 18:20:54,188 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:54,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:54,847 INFO L134 CoverageAnalysis]: Checked inductivity of 1878 backedges. 72 proven. 1806 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:54,848 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [429914566] [2019-12-07 18:20:54,848 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [48751590] [2019-12-07 18:20:54,848 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:55,107 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 17 check-sat command(s) [2019-12-07 18:20:55,107 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:55,111 INFO L264 TraceCheckSpWp]: Trace formula consists of 1657 conjuncts, 71 conjunts are in the unsatisfiable core [2019-12-07 18:20:55,113 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:55,204 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:55,355 INFO L134 CoverageAnalysis]: Checked inductivity of 1878 backedges. 72 proven. 1796 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2019-12-07 18:20:55,355 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:55,355 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25] total 30 [2019-12-07 18:20:55,356 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1227175803] [2019-12-07 18:20:55,356 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2019-12-07 18:20:55,356 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:55,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2019-12-07 18:20:55,356 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=807, Unknown=0, NotChecked=0, Total=870 [2019-12-07 18:20:55,357 INFO L87 Difference]: Start difference. First operand 659 states and 909 transitions. Second operand 30 states. [2019-12-07 18:20:56,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:20:56,092 INFO L93 Difference]: Finished difference Result 661 states and 910 transitions. [2019-12-07 18:20:56,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 18:20:56,092 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 286 [2019-12-07 18:20:56,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:20:56,094 INFO L225 Difference]: With dead ends: 661 [2019-12-07 18:20:56,095 INFO L226 Difference]: Without dead ends: 659 [2019-12-07 18:20:56,095 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 313 GetRequests, 282 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=68, Invalid=862, Unknown=0, NotChecked=0, Total=930 [2019-12-07 18:20:56,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 659 states. [2019-12-07 18:20:56,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 659 to 659. [2019-12-07 18:20:56,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 659 states. [2019-12-07 18:20:56,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 659 states to 659 states and 908 transitions. [2019-12-07 18:20:56,103 INFO L78 Accepts]: Start accepts. Automaton has 659 states and 908 transitions. Word has length 286 [2019-12-07 18:20:56,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:20:56,103 INFO L462 AbstractCegarLoop]: Abstraction has 659 states and 908 transitions. [2019-12-07 18:20:56,103 INFO L463 AbstractCegarLoop]: Interpolant automaton has 30 states. [2019-12-07 18:20:56,103 INFO L276 IsEmpty]: Start isEmpty. Operand 659 states and 908 transitions. [2019-12-07 18:20:56,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 333 [2019-12-07 18:20:56,104 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:20:56,104 INFO L410 BasicCegarLoop]: trace histogram [29, 29, 28, 21, 21, 14, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:20:56,305 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 31 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:56,305 INFO L410 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:20:56,305 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:20:56,306 INFO L82 PathProgramCache]: Analyzing trace with hash -981412332, now seen corresponding path program 6 times [2019-12-07 18:20:56,306 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:20:56,307 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [340471186] [2019-12-07 18:20:56,307 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:20:56,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:20:57,141 INFO L134 CoverageAnalysis]: Checked inductivity of 2569 backedges. 84 proven. 2485 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:20:57,141 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [340471186] [2019-12-07 18:20:57,142 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [807793718] [2019-12-07 18:20:57,142 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:20:57,414 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 21 check-sat command(s) [2019-12-07 18:20:57,414 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:20:57,419 INFO L264 TraceCheckSpWp]: Trace formula consists of 1922 conjuncts, 68 conjunts are in the unsatisfiable core [2019-12-07 18:20:57,421 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:20:57,764 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-07 18:20:57,994 INFO L134 CoverageAnalysis]: Checked inductivity of 2569 backedges. 84 proven. 2425 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2019-12-07 18:20:57,994 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:20:57,994 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 19] total 47 [2019-12-07 18:20:57,994 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1485254381] [2019-12-07 18:20:57,995 INFO L442 AbstractCegarLoop]: Interpolant automaton has 47 states [2019-12-07 18:20:57,995 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:20:57,995 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2019-12-07 18:20:57,996 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=2042, Unknown=0, NotChecked=0, Total=2162 [2019-12-07 18:20:57,996 INFO L87 Difference]: Start difference. First operand 659 states and 908 transitions. Second operand 47 states. [2019-12-07 18:21:01,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:21:01,303 INFO L93 Difference]: Finished difference Result 722 states and 993 transitions. [2019-12-07 18:21:01,304 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 18:21:01,304 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 332 [2019-12-07 18:21:01,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:21:01,310 INFO L225 Difference]: With dead ends: 722 [2019-12-07 18:21:01,310 INFO L226 Difference]: Without dead ends: 720 [2019-12-07 18:21:01,312 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 363 GetRequests, 316 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 139 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=125, Invalid=2131, Unknown=0, NotChecked=0, Total=2256 [2019-12-07 18:21:01,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 720 states. [2019-12-07 18:21:01,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 720 to 720. [2019-12-07 18:21:01,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 720 states. [2019-12-07 18:21:01,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 720 states to 720 states and 991 transitions. [2019-12-07 18:21:01,330 INFO L78 Accepts]: Start accepts. Automaton has 720 states and 991 transitions. Word has length 332 [2019-12-07 18:21:01,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:21:01,330 INFO L462 AbstractCegarLoop]: Abstraction has 720 states and 991 transitions. [2019-12-07 18:21:01,330 INFO L463 AbstractCegarLoop]: Interpolant automaton has 47 states. [2019-12-07 18:21:01,330 INFO L276 IsEmpty]: Start isEmpty. Operand 720 states and 991 transitions. [2019-12-07 18:21:01,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 350 [2019-12-07 18:21:01,332 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:21:01,332 INFO L410 BasicCegarLoop]: trace histogram [31, 30, 30, 22, 22, 14, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:21:01,533 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 32 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:21:01,533 INFO L410 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:21:01,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:21:01,534 INFO L82 PathProgramCache]: Analyzing trace with hash -689263377, now seen corresponding path program 4 times [2019-12-07 18:21:01,535 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:21:01,535 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [405646718] [2019-12-07 18:21:01,536 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:21:01,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:21:01,837 INFO L134 CoverageAnalysis]: Checked inductivity of 2894 backedges. 218 proven. 2606 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2019-12-07 18:21:01,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [405646718] [2019-12-07 18:21:01,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1994981049] [2019-12-07 18:21:01,837 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:21:02,033 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-12-07 18:21:02,033 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 18:21:02,037 INFO L264 TraceCheckSpWp]: Trace formula consists of 2040 conjuncts, 31 conjunts are in the unsatisfiable core [2019-12-07 18:21:02,040 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:21:02,143 INFO L134 CoverageAnalysis]: Checked inductivity of 2894 backedges. 218 proven. 2606 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2019-12-07 18:21:02,143 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:21:02,143 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 18 [2019-12-07 18:21:02,144 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1268908331] [2019-12-07 18:21:02,144 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 18:21:02,144 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:21:02,144 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 18:21:02,144 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:21:02,144 INFO L87 Difference]: Start difference. First operand 720 states and 991 transitions. Second operand 18 states. [2019-12-07 18:21:02,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:21:02,267 INFO L93 Difference]: Finished difference Result 867 states and 1194 transitions. [2019-12-07 18:21:02,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 18:21:02,267 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 349 [2019-12-07 18:21:02,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:21:02,270 INFO L225 Difference]: With dead ends: 867 [2019-12-07 18:21:02,270 INFO L226 Difference]: Without dead ends: 782 [2019-12-07 18:21:02,271 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 380 GetRequests, 364 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:21:02,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 782 states. [2019-12-07 18:21:02,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 782 to 737. [2019-12-07 18:21:02,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 737 states. [2019-12-07 18:21:02,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 737 states to 737 states and 1015 transitions. [2019-12-07 18:21:02,279 INFO L78 Accepts]: Start accepts. Automaton has 737 states and 1015 transitions. Word has length 349 [2019-12-07 18:21:02,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:21:02,279 INFO L462 AbstractCegarLoop]: Abstraction has 737 states and 1015 transitions. [2019-12-07 18:21:02,279 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 18:21:02,279 INFO L276 IsEmpty]: Start isEmpty. Operand 737 states and 1015 transitions. [2019-12-07 18:21:02,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 379 [2019-12-07 18:21:02,281 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:21:02,281 INFO L410 BasicCegarLoop]: trace histogram [33, 33, 32, 24, 24, 16, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:21:02,482 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 33 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:21:02,482 INFO L410 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:21:02,483 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:21:02,483 INFO L82 PathProgramCache]: Analyzing trace with hash 1592780293, now seen corresponding path program 7 times [2019-12-07 18:21:02,483 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:21:02,484 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1058616040] [2019-12-07 18:21:02,484 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:21:02,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:21:03,478 INFO L134 CoverageAnalysis]: Checked inductivity of 3368 backedges. 96 proven. 3272 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:21:03,478 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1058616040] [2019-12-07 18:21:03,478 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [454709763] [2019-12-07 18:21:03,478 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:21:03,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:21:03,674 INFO L264 TraceCheckSpWp]: Trace formula consists of 2187 conjuncts, 131 conjunts are in the unsatisfiable core [2019-12-07 18:21:03,677 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 18:21:05,048 INFO L134 CoverageAnalysis]: Checked inductivity of 3368 backedges. 96 proven. 3272 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:21:05,048 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 18:21:05,049 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34] total 65 [2019-12-07 18:21:05,049 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1978121699] [2019-12-07 18:21:05,049 INFO L442 AbstractCegarLoop]: Interpolant automaton has 65 states [2019-12-07 18:21:05,049 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:21:05,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2019-12-07 18:21:05,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=158, Invalid=4002, Unknown=0, NotChecked=0, Total=4160 [2019-12-07 18:21:05,051 INFO L87 Difference]: Start difference. First operand 737 states and 1015 transitions. Second operand 65 states. [2019-12-07 18:21:06,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:21:06,424 INFO L93 Difference]: Finished difference Result 800 states and 1100 transitions. [2019-12-07 18:21:06,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 18:21:06,425 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 378 [2019-12-07 18:21:06,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:21:06,428 INFO L225 Difference]: With dead ends: 800 [2019-12-07 18:21:06,428 INFO L226 Difference]: Without dead ends: 798 [2019-12-07 18:21:06,429 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 412 GetRequests, 347 SyntacticMatches, 2 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 465 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=158, Invalid=4002, Unknown=0, NotChecked=0, Total=4160 [2019-12-07 18:21:06,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 798 states. [2019-12-07 18:21:06,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 798 to 798. [2019-12-07 18:21:06,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 798 states. [2019-12-07 18:21:06,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 798 states to 798 states and 1098 transitions. [2019-12-07 18:21:06,439 INFO L78 Accepts]: Start accepts. Automaton has 798 states and 1098 transitions. Word has length 378 [2019-12-07 18:21:06,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:21:06,439 INFO L462 AbstractCegarLoop]: Abstraction has 798 states and 1098 transitions. [2019-12-07 18:21:06,439 INFO L463 AbstractCegarLoop]: Interpolant automaton has 65 states. [2019-12-07 18:21:06,439 INFO L276 IsEmpty]: Start isEmpty. Operand 798 states and 1098 transitions. [2019-12-07 18:21:06,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 396 [2019-12-07 18:21:06,441 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:21:06,441 INFO L410 BasicCegarLoop]: trace histogram [35, 34, 34, 25, 25, 16, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:21:06,641 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 34 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 18:21:06,642 INFO L410 AbstractCegarLoop]: === Iteration 44 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:21:06,642 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:21:06,643 INFO L82 PathProgramCache]: Analyzing trace with hash 49372446, now seen corresponding path program 5 times [2019-12-07 18:21:06,643 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:21:06,643 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [405944426] [2019-12-07 18:21:06,644 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:21:07,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:21:07,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:21:07,490 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:21:07,490 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:21:07,605 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:21:07 BoogieIcfgContainer [2019-12-07 18:21:07,605 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:21:07,605 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:21:07,605 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:21:07,605 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:21:07,605 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:20:29" (3/4) ... [2019-12-07 18:21:07,607 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:21:07,734 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_7b42b4ee-5ebc-4cb1-b38c-927d81404b9c/bin/uautomizer/witness.graphml [2019-12-07 18:21:07,734 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:21:07,735 INFO L168 Benchmark]: Toolchain (without parser) took 39308.45 ms. Allocated memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: 735.6 MB). Free memory was 939.8 MB in the beginning and 1.3 GB in the end (delta: -393.3 MB). Peak memory consumption was 342.3 MB. Max. memory is 11.5 GB. [2019-12-07 18:21:07,735 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:21:07,735 INFO L168 Benchmark]: CACSL2BoogieTranslator took 316.71 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -147.5 MB). Peak memory consumption was 23.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:21:07,736 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.42 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:21:07,736 INFO L168 Benchmark]: Boogie Preprocessor took 30.57 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:21:07,736 INFO L168 Benchmark]: RCFGBuilder took 469.38 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 18:21:07,736 INFO L168 Benchmark]: TraceAbstraction took 38319.34 ms. Allocated memory was 1.1 GB in the beginning and 1.8 GB in the end (delta: 637.5 MB). Free memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: -355.3 MB). Peak memory consumption was 282.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:21:07,736 INFO L168 Benchmark]: Witness Printer took 128.97 ms. Allocated memory is still 1.8 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 42.6 MB). Peak memory consumption was 42.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:21:07,738 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 316.71 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -147.5 MB). Peak memory consumption was 23.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.42 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 30.57 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 469.38 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 38319.34 ms. Allocated memory was 1.1 GB in the beginning and 1.8 GB in the end (delta: 637.5 MB). Free memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: -355.3 MB). Peak memory consumption was 282.2 MB. Max. memory is 11.5 GB. * Witness Printer took 128.97 ms. Allocated memory is still 1.8 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 42.6 MB). Peak memory consumption was 42.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 569]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L5] int m_Protocol = 1; [L6] int m_msg_2 = 2; [L7] int m_recv_ack_2 = 3; [L8] int m_msg_1_1 = 4; [L9] int m_msg_1_2 = 5; [L10] int m_recv_ack_1_1 = 6; [L11] int m_recv_ack_1_2 = 7; VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L16] int q = 0; [L17] int method_id; [L20] int this_expect = 0; [L21] int this_buffer_empty = 0; VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND TRUE q == 0 [L44] COND TRUE __VERIFIER_nondet_int() [L48] method_id = 1 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L50] COND FALSE !(0) [L54] q = 1 [L56] this_expect=0 [L56] this_buffer_empty=1 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND TRUE this_expect > 16 [L39] this_expect = -16 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L286] COND TRUE (((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2)))) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L569] __VERIFIER_error() VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 110 locations, 1 error locations. Result: UNSAFE, OverallTime: 38.1s, OverallIterations: 44, TraceHistogramMax: 35, AutomataDifference: 12.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 11153 SDtfs, 14642 SDslu, 142902 SDs, 0 SdLazy, 17662 SolverSat, 601 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5606 GetRequests, 5009 SyntacticMatches, 43 SemanticMatches, 554 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1658 ImplicationChecksByTransitivity, 8.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=1164occurred in iteration=38, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 43 MinimizatonAttempts, 366 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.8s SsaConstructionTime, 4.0s SatisfiabilityAnalysisTime, 10.8s InterpolantComputationTime, 10856 NumberOfCodeBlocks, 10426 NumberOfCodeBlocksAsserted, 168 NumberOfCheckSat, 10385 ConstructedInterpolants, 0 QuantifiedInterpolants, 13596320 SizeOfPredicates, 83 NumberOfNonLiveVariables, 26760 ConjunctsInSsa, 1041 ConjunctsInUnsatCore, 76 InterpolantComputations, 10 PerfectInterpolantSequences, 8280/49367 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...