./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi000_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_7fa8c0c5-50ea-4537-b863-717adcf8b1e7/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_7fa8c0c5-50ea-4537-b863-717adcf8b1e7/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_7fa8c0c5-50ea-4537-b863-717adcf8b1e7/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_7fa8c0c5-50ea-4537-b863-717adcf8b1e7/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi000_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_7fa8c0c5-50ea-4537-b863-717adcf8b1e7/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_7fa8c0c5-50ea-4537-b863-717adcf8b1e7/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 1f00de7da7b6b45d2876e8ff7272563c7aa8533e ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:32:10,870 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:32:10,872 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:32:10,881 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:32:10,882 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:32:10,883 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:32:10,884 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:32:10,885 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:32:10,887 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:32:10,888 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:32:10,889 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:32:10,890 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:32:10,890 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:32:10,891 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:32:10,892 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:32:10,893 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:32:10,894 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:32:10,895 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:32:10,896 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:32:10,898 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:32:10,900 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:32:10,901 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:32:10,901 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:32:10,902 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:32:10,904 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:32:10,904 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:32:10,904 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:32:10,905 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:32:10,905 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:32:10,905 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:32:10,906 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:32:10,906 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:32:10,907 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:32:10,908 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:32:10,908 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:32:10,909 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:32:10,909 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:32:10,909 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:32:10,909 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:32:10,910 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:32:10,911 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:32:10,912 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_7fa8c0c5-50ea-4537-b863-717adcf8b1e7/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:32:10,923 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:32:10,923 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:32:10,924 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:32:10,925 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:32:10,925 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:32:10,925 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:32:10,925 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:32:10,925 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:32:10,925 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:32:10,926 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:32:10,926 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:32:10,926 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:32:10,926 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:32:10,926 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:32:10,926 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:32:10,926 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:32:10,927 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:32:10,927 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:32:10,927 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:32:10,927 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:32:10,927 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:32:10,927 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:32:10,928 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:32:10,928 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:32:10,928 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:32:10,928 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:32:10,928 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:32:10,928 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:32:10,929 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:32:10,929 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_7fa8c0c5-50ea-4537-b863-717adcf8b1e7/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1f00de7da7b6b45d2876e8ff7272563c7aa8533e [2019-12-07 12:32:11,039 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:32:11,047 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:32:11,049 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:32:11,050 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:32:11,050 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:32:11,051 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_7fa8c0c5-50ea-4537-b863-717adcf8b1e7/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/rfi000_power.opt.i [2019-12-07 12:32:11,087 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_7fa8c0c5-50ea-4537-b863-717adcf8b1e7/bin/uautomizer/data/72b8353a6/797829c7390e414d9c893d860d1fc846/FLAG9a041218e [2019-12-07 12:32:11,493 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:32:11,493 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_7fa8c0c5-50ea-4537-b863-717adcf8b1e7/sv-benchmarks/c/pthread-wmm/rfi000_power.opt.i [2019-12-07 12:32:11,503 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_7fa8c0c5-50ea-4537-b863-717adcf8b1e7/bin/uautomizer/data/72b8353a6/797829c7390e414d9c893d860d1fc846/FLAG9a041218e [2019-12-07 12:32:11,845 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_7fa8c0c5-50ea-4537-b863-717adcf8b1e7/bin/uautomizer/data/72b8353a6/797829c7390e414d9c893d860d1fc846 [2019-12-07 12:32:11,847 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:32:11,848 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:32:11,849 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:32:11,849 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:32:11,851 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:32:11,852 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:32:11" (1/1) ... [2019-12-07 12:32:11,854 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2133a45c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:11, skipping insertion in model container [2019-12-07 12:32:11,854 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:32:11" (1/1) ... [2019-12-07 12:32:11,859 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:32:11,887 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:32:12,125 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:32:12,133 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:32:12,176 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:32:12,222 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:32:12,223 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:12 WrapperNode [2019-12-07 12:32:12,223 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:32:12,223 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:32:12,223 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:32:12,223 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:32:12,229 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:12" (1/1) ... [2019-12-07 12:32:12,243 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:12" (1/1) ... [2019-12-07 12:32:12,267 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:32:12,267 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:32:12,267 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:32:12,267 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:32:12,274 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:12" (1/1) ... [2019-12-07 12:32:12,274 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:12" (1/1) ... [2019-12-07 12:32:12,277 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:12" (1/1) ... [2019-12-07 12:32:12,277 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:12" (1/1) ... [2019-12-07 12:32:12,284 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:12" (1/1) ... [2019-12-07 12:32:12,286 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:12" (1/1) ... [2019-12-07 12:32:12,289 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:12" (1/1) ... [2019-12-07 12:32:12,292 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:32:12,292 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:32:12,292 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:32:12,292 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:32:12,293 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:12" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7fa8c0c5-50ea-4537-b863-717adcf8b1e7/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:32:12,334 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:32:12,334 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:32:12,334 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:32:12,334 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:32:12,334 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:32:12,335 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:32:12,335 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:32:12,335 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:32:12,335 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:32:12,335 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:32:12,335 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:32:12,337 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:32:12,676 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:32:12,676 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:32:12,677 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:32:12 BoogieIcfgContainer [2019-12-07 12:32:12,677 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:32:12,677 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:32:12,677 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:32:12,679 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:32:12,679 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:32:11" (1/3) ... [2019-12-07 12:32:12,680 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3641e92d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:32:12, skipping insertion in model container [2019-12-07 12:32:12,680 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:32:12" (2/3) ... [2019-12-07 12:32:12,680 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3641e92d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:32:12, skipping insertion in model container [2019-12-07 12:32:12,680 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:32:12" (3/3) ... [2019-12-07 12:32:12,681 INFO L109 eAbstractionObserver]: Analyzing ICFG rfi000_power.opt.i [2019-12-07 12:32:12,688 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:32:12,688 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:32:12,692 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:32:12,693 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:32:12,713 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,713 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,713 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,713 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,714 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,714 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,714 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,714 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,714 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,714 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,714 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,715 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,715 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,715 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,715 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,715 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,715 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,715 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,715 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,716 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,716 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,716 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,716 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,716 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,716 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,716 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,718 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,718 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,718 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,718 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,718 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,718 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,718 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,719 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,719 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,719 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,719 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,719 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,720 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,720 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,720 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,720 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,720 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,721 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,721 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,721 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,721 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,721 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,721 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,722 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,722 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,722 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,722 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,722 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,723 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,723 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,723 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,723 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,723 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,723 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:32:12,734 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 12:32:12,746 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:32:12,746 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:32:12,746 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:32:12,746 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:32:12,747 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:32:12,747 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:32:12,747 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:32:12,747 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:32:12,759 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 147 places, 181 transitions [2019-12-07 12:32:12,760 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 147 places, 181 transitions [2019-12-07 12:32:12,812 INFO L134 PetriNetUnfolder]: 41/179 cut-off events. [2019-12-07 12:32:12,812 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:32:12,820 INFO L76 FinitePrefix]: Finished finitePrefix Result has 186 conditions, 179 events. 41/179 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 465 event pairs. 6/142 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 12:32:12,830 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 147 places, 181 transitions [2019-12-07 12:32:12,853 INFO L134 PetriNetUnfolder]: 41/179 cut-off events. [2019-12-07 12:32:12,853 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:32:12,856 INFO L76 FinitePrefix]: Finished finitePrefix Result has 186 conditions, 179 events. 41/179 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 465 event pairs. 6/142 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 12:32:12,864 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-12-07 12:32:12,865 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:32:15,298 WARN L192 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 81 [2019-12-07 12:32:15,375 INFO L206 etLargeBlockEncoding]: Checked pairs total: 50487 [2019-12-07 12:32:15,375 INFO L214 etLargeBlockEncoding]: Total number of compositions: 98 [2019-12-07 12:32:15,377 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 81 places, 94 transitions [2019-12-07 12:32:15,728 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 9480 states. [2019-12-07 12:32:15,730 INFO L276 IsEmpty]: Start isEmpty. Operand 9480 states. [2019-12-07 12:32:15,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 12:32:15,734 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:15,735 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 12:32:15,735 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:15,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:15,739 INFO L82 PathProgramCache]: Analyzing trace with hash 692929394, now seen corresponding path program 1 times [2019-12-07 12:32:15,745 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:15,745 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1879095149] [2019-12-07 12:32:15,745 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:15,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:15,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:15,888 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1879095149] [2019-12-07 12:32:15,888 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:15,889 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:32:15,889 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1256218168] [2019-12-07 12:32:15,893 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:32:15,894 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:15,906 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:32:15,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:15,909 INFO L87 Difference]: Start difference. First operand 9480 states. Second operand 3 states. [2019-12-07 12:32:16,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:16,095 INFO L93 Difference]: Finished difference Result 9416 states and 31128 transitions. [2019-12-07 12:32:16,096 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:32:16,097 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 12:32:16,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:16,165 INFO L225 Difference]: With dead ends: 9416 [2019-12-07 12:32:16,165 INFO L226 Difference]: Without dead ends: 9234 [2019-12-07 12:32:16,166 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:16,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9234 states. [2019-12-07 12:32:16,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9234 to 9234. [2019-12-07 12:32:16,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9234 states. [2019-12-07 12:32:16,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9234 states to 9234 states and 30568 transitions. [2019-12-07 12:32:16,461 INFO L78 Accepts]: Start accepts. Automaton has 9234 states and 30568 transitions. Word has length 5 [2019-12-07 12:32:16,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:16,462 INFO L462 AbstractCegarLoop]: Abstraction has 9234 states and 30568 transitions. [2019-12-07 12:32:16,462 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:32:16,462 INFO L276 IsEmpty]: Start isEmpty. Operand 9234 states and 30568 transitions. [2019-12-07 12:32:16,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 12:32:16,464 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:16,464 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:16,464 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:16,464 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:16,464 INFO L82 PathProgramCache]: Analyzing trace with hash 1820083367, now seen corresponding path program 1 times [2019-12-07 12:32:16,464 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:16,464 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1514268160] [2019-12-07 12:32:16,465 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:16,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:16,534 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:16,534 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1514268160] [2019-12-07 12:32:16,534 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:16,534 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:32:16,535 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1042988244] [2019-12-07 12:32:16,536 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:32:16,536 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:16,536 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:32:16,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:32:16,537 INFO L87 Difference]: Start difference. First operand 9234 states and 30568 transitions. Second operand 4 states. [2019-12-07 12:32:16,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:16,843 INFO L93 Difference]: Finished difference Result 14362 states and 45554 transitions. [2019-12-07 12:32:16,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:32:16,844 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 12:32:16,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:16,895 INFO L225 Difference]: With dead ends: 14362 [2019-12-07 12:32:16,895 INFO L226 Difference]: Without dead ends: 14355 [2019-12-07 12:32:16,896 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:32:16,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14355 states. [2019-12-07 12:32:17,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14355 to 13038. [2019-12-07 12:32:17,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13038 states. [2019-12-07 12:32:17,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13038 states to 13038 states and 41962 transitions. [2019-12-07 12:32:17,207 INFO L78 Accepts]: Start accepts. Automaton has 13038 states and 41962 transitions. Word has length 11 [2019-12-07 12:32:17,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:17,208 INFO L462 AbstractCegarLoop]: Abstraction has 13038 states and 41962 transitions. [2019-12-07 12:32:17,208 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:32:17,208 INFO L276 IsEmpty]: Start isEmpty. Operand 13038 states and 41962 transitions. [2019-12-07 12:32:17,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 12:32:17,210 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:17,210 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:17,210 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:17,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:17,210 INFO L82 PathProgramCache]: Analyzing trace with hash 417951775, now seen corresponding path program 1 times [2019-12-07 12:32:17,210 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:17,211 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [158398741] [2019-12-07 12:32:17,211 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:17,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:17,262 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:17,262 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [158398741] [2019-12-07 12:32:17,262 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:17,262 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:32:17,262 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1896042743] [2019-12-07 12:32:17,262 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:32:17,263 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:17,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:32:17,263 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:32:17,263 INFO L87 Difference]: Start difference. First operand 13038 states and 41962 transitions. Second operand 4 states. [2019-12-07 12:32:17,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:17,410 INFO L93 Difference]: Finished difference Result 16287 states and 51820 transitions. [2019-12-07 12:32:17,411 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:32:17,411 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 12:32:17,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:17,433 INFO L225 Difference]: With dead ends: 16287 [2019-12-07 12:32:17,433 INFO L226 Difference]: Without dead ends: 16287 [2019-12-07 12:32:17,434 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:32:17,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16287 states. [2019-12-07 12:32:17,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16287 to 14489. [2019-12-07 12:32:17,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14489 states. [2019-12-07 12:32:17,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14489 states to 14489 states and 46501 transitions. [2019-12-07 12:32:17,702 INFO L78 Accepts]: Start accepts. Automaton has 14489 states and 46501 transitions. Word has length 11 [2019-12-07 12:32:17,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:17,702 INFO L462 AbstractCegarLoop]: Abstraction has 14489 states and 46501 transitions. [2019-12-07 12:32:17,702 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:32:17,702 INFO L276 IsEmpty]: Start isEmpty. Operand 14489 states and 46501 transitions. [2019-12-07 12:32:17,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 12:32:17,705 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:17,705 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:17,705 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:17,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:17,706 INFO L82 PathProgramCache]: Analyzing trace with hash -692193900, now seen corresponding path program 1 times [2019-12-07 12:32:17,706 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:17,706 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1802223325] [2019-12-07 12:32:17,706 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:17,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:17,740 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:17,741 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1802223325] [2019-12-07 12:32:17,741 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:17,741 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:32:17,741 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1588414171] [2019-12-07 12:32:17,741 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:32:17,741 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:17,741 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:32:17,742 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:17,742 INFO L87 Difference]: Start difference. First operand 14489 states and 46501 transitions. Second operand 3 states. [2019-12-07 12:32:17,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:17,749 INFO L93 Difference]: Finished difference Result 1778 states and 4038 transitions. [2019-12-07 12:32:17,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:32:17,750 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2019-12-07 12:32:17,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:17,753 INFO L225 Difference]: With dead ends: 1778 [2019-12-07 12:32:17,753 INFO L226 Difference]: Without dead ends: 1778 [2019-12-07 12:32:17,753 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:17,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1778 states. [2019-12-07 12:32:17,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1778 to 1778. [2019-12-07 12:32:17,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1778 states. [2019-12-07 12:32:17,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1778 states to 1778 states and 4038 transitions. [2019-12-07 12:32:17,773 INFO L78 Accepts]: Start accepts. Automaton has 1778 states and 4038 transitions. Word has length 17 [2019-12-07 12:32:17,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:17,774 INFO L462 AbstractCegarLoop]: Abstraction has 1778 states and 4038 transitions. [2019-12-07 12:32:17,774 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:32:17,774 INFO L276 IsEmpty]: Start isEmpty. Operand 1778 states and 4038 transitions. [2019-12-07 12:32:17,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 12:32:17,775 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:17,775 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:17,775 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:17,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:17,776 INFO L82 PathProgramCache]: Analyzing trace with hash -1954901459, now seen corresponding path program 1 times [2019-12-07 12:32:17,776 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:17,776 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [230407029] [2019-12-07 12:32:17,776 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:17,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:17,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:17,821 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [230407029] [2019-12-07 12:32:17,821 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:17,821 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:32:17,822 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2147011935] [2019-12-07 12:32:17,822 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:32:17,822 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:17,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:32:17,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:32:17,822 INFO L87 Difference]: Start difference. First operand 1778 states and 4038 transitions. Second operand 4 states. [2019-12-07 12:32:17,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:17,830 INFO L93 Difference]: Finished difference Result 371 states and 689 transitions. [2019-12-07 12:32:17,831 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:32:17,831 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2019-12-07 12:32:17,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:17,832 INFO L225 Difference]: With dead ends: 371 [2019-12-07 12:32:17,832 INFO L226 Difference]: Without dead ends: 371 [2019-12-07 12:32:17,832 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:32:17,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2019-12-07 12:32:17,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 336. [2019-12-07 12:32:17,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 336 states. [2019-12-07 12:32:17,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 336 states to 336 states and 624 transitions. [2019-12-07 12:32:17,835 INFO L78 Accepts]: Start accepts. Automaton has 336 states and 624 transitions. Word has length 23 [2019-12-07 12:32:17,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:17,835 INFO L462 AbstractCegarLoop]: Abstraction has 336 states and 624 transitions. [2019-12-07 12:32:17,836 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:32:17,836 INFO L276 IsEmpty]: Start isEmpty. Operand 336 states and 624 transitions. [2019-12-07 12:32:17,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 12:32:17,837 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:17,837 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:17,837 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:17,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:17,837 INFO L82 PathProgramCache]: Analyzing trace with hash 798988436, now seen corresponding path program 1 times [2019-12-07 12:32:17,837 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:17,837 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [25101861] [2019-12-07 12:32:17,837 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:17,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:17,910 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:17,910 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [25101861] [2019-12-07 12:32:17,910 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:17,910 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:32:17,911 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1255735246] [2019-12-07 12:32:17,911 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:32:17,911 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:17,911 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:32:17,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:17,912 INFO L87 Difference]: Start difference. First operand 336 states and 624 transitions. Second operand 3 states. [2019-12-07 12:32:17,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:17,941 INFO L93 Difference]: Finished difference Result 345 states and 638 transitions. [2019-12-07 12:32:17,941 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:32:17,942 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-12-07 12:32:17,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:17,943 INFO L225 Difference]: With dead ends: 345 [2019-12-07 12:32:17,943 INFO L226 Difference]: Without dead ends: 345 [2019-12-07 12:32:17,943 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:17,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states. [2019-12-07 12:32:17,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 341. [2019-12-07 12:32:17,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 341 states. [2019-12-07 12:32:17,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 341 states to 341 states and 634 transitions. [2019-12-07 12:32:17,946 INFO L78 Accepts]: Start accepts. Automaton has 341 states and 634 transitions. Word has length 52 [2019-12-07 12:32:17,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:17,947 INFO L462 AbstractCegarLoop]: Abstraction has 341 states and 634 transitions. [2019-12-07 12:32:17,947 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:32:17,947 INFO L276 IsEmpty]: Start isEmpty. Operand 341 states and 634 transitions. [2019-12-07 12:32:17,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 12:32:17,948 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:17,948 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:17,948 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:17,948 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:17,948 INFO L82 PathProgramCache]: Analyzing trace with hash 112676449, now seen corresponding path program 1 times [2019-12-07 12:32:17,948 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:17,949 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [162946790] [2019-12-07 12:32:17,949 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:17,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:17,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:17,991 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [162946790] [2019-12-07 12:32:17,991 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:17,991 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:32:17,991 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [661041704] [2019-12-07 12:32:17,991 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:32:17,991 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:17,991 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:32:17,991 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:17,992 INFO L87 Difference]: Start difference. First operand 341 states and 634 transitions. Second operand 3 states. [2019-12-07 12:32:18,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:18,020 INFO L93 Difference]: Finished difference Result 345 states and 628 transitions. [2019-12-07 12:32:18,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:32:18,020 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-12-07 12:32:18,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:18,021 INFO L225 Difference]: With dead ends: 345 [2019-12-07 12:32:18,021 INFO L226 Difference]: Without dead ends: 345 [2019-12-07 12:32:18,021 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:18,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states. [2019-12-07 12:32:18,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 341. [2019-12-07 12:32:18,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 341 states. [2019-12-07 12:32:18,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 341 states to 341 states and 624 transitions. [2019-12-07 12:32:18,025 INFO L78 Accepts]: Start accepts. Automaton has 341 states and 624 transitions. Word has length 52 [2019-12-07 12:32:18,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:18,025 INFO L462 AbstractCegarLoop]: Abstraction has 341 states and 624 transitions. [2019-12-07 12:32:18,025 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:32:18,025 INFO L276 IsEmpty]: Start isEmpty. Operand 341 states and 624 transitions. [2019-12-07 12:32:18,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 12:32:18,026 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:18,026 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:18,026 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:18,026 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:18,026 INFO L82 PathProgramCache]: Analyzing trace with hash 107384222, now seen corresponding path program 1 times [2019-12-07 12:32:18,027 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:18,027 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169305757] [2019-12-07 12:32:18,027 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:18,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:18,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:18,081 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1169305757] [2019-12-07 12:32:18,081 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:18,081 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:32:18,081 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1839530214] [2019-12-07 12:32:18,082 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:32:18,082 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:18,082 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:32:18,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:18,082 INFO L87 Difference]: Start difference. First operand 341 states and 624 transitions. Second operand 3 states. [2019-12-07 12:32:18,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:18,092 INFO L93 Difference]: Finished difference Result 328 states and 585 transitions. [2019-12-07 12:32:18,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:32:18,093 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-12-07 12:32:18,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:18,093 INFO L225 Difference]: With dead ends: 328 [2019-12-07 12:32:18,093 INFO L226 Difference]: Without dead ends: 328 [2019-12-07 12:32:18,093 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:18,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328 states. [2019-12-07 12:32:18,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328 to 328. [2019-12-07 12:32:18,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328 states. [2019-12-07 12:32:18,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 585 transitions. [2019-12-07 12:32:18,096 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 585 transitions. Word has length 52 [2019-12-07 12:32:18,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:18,096 INFO L462 AbstractCegarLoop]: Abstraction has 328 states and 585 transitions. [2019-12-07 12:32:18,097 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:32:18,097 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 585 transitions. [2019-12-07 12:32:18,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 12:32:18,097 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:18,097 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:18,097 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:18,098 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:18,098 INFO L82 PathProgramCache]: Analyzing trace with hash 1649755206, now seen corresponding path program 1 times [2019-12-07 12:32:18,098 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:18,098 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1045687731] [2019-12-07 12:32:18,098 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:18,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:18,178 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:18,178 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1045687731] [2019-12-07 12:32:18,178 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:18,179 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:32:18,179 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1300244466] [2019-12-07 12:32:18,179 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:32:18,179 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:18,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:32:18,179 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:32:18,179 INFO L87 Difference]: Start difference. First operand 328 states and 585 transitions. Second operand 5 states. [2019-12-07 12:32:18,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:18,304 INFO L93 Difference]: Finished difference Result 459 states and 819 transitions. [2019-12-07 12:32:18,305 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 12:32:18,305 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2019-12-07 12:32:18,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:18,305 INFO L225 Difference]: With dead ends: 459 [2019-12-07 12:32:18,305 INFO L226 Difference]: Without dead ends: 459 [2019-12-07 12:32:18,306 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:32:18,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 459 states. [2019-12-07 12:32:18,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 459 to 363. [2019-12-07 12:32:18,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 363 states. [2019-12-07 12:32:18,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 363 states to 363 states and 652 transitions. [2019-12-07 12:32:18,309 INFO L78 Accepts]: Start accepts. Automaton has 363 states and 652 transitions. Word has length 53 [2019-12-07 12:32:18,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:18,309 INFO L462 AbstractCegarLoop]: Abstraction has 363 states and 652 transitions. [2019-12-07 12:32:18,309 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:32:18,309 INFO L276 IsEmpty]: Start isEmpty. Operand 363 states and 652 transitions. [2019-12-07 12:32:18,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 12:32:18,310 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:18,310 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:18,310 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:18,310 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:18,310 INFO L82 PathProgramCache]: Analyzing trace with hash 1934699814, now seen corresponding path program 2 times [2019-12-07 12:32:18,311 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:18,311 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [304096105] [2019-12-07 12:32:18,311 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:18,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:18,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:18,470 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [304096105] [2019-12-07 12:32:18,470 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:18,470 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 12:32:18,470 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [242109514] [2019-12-07 12:32:18,471 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 12:32:18,471 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:18,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 12:32:18,471 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-07 12:32:18,471 INFO L87 Difference]: Start difference. First operand 363 states and 652 transitions. Second operand 8 states. [2019-12-07 12:32:18,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:18,652 INFO L93 Difference]: Finished difference Result 502 states and 893 transitions. [2019-12-07 12:32:18,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:32:18,652 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 53 [2019-12-07 12:32:18,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:18,653 INFO L225 Difference]: With dead ends: 502 [2019-12-07 12:32:18,653 INFO L226 Difference]: Without dead ends: 502 [2019-12-07 12:32:18,653 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:32:18,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 502 states. [2019-12-07 12:32:18,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 502 to 377. [2019-12-07 12:32:18,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 377 states. [2019-12-07 12:32:18,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 377 states and 678 transitions. [2019-12-07 12:32:18,657 INFO L78 Accepts]: Start accepts. Automaton has 377 states and 678 transitions. Word has length 53 [2019-12-07 12:32:18,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:18,657 INFO L462 AbstractCegarLoop]: Abstraction has 377 states and 678 transitions. [2019-12-07 12:32:18,657 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 12:32:18,657 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 678 transitions. [2019-12-07 12:32:18,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 12:32:18,658 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:18,658 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:18,658 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:18,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:18,658 INFO L82 PathProgramCache]: Analyzing trace with hash -1416640772, now seen corresponding path program 3 times [2019-12-07 12:32:18,658 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:18,658 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2065657838] [2019-12-07 12:32:18,658 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:18,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:18,913 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:18,913 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2065657838] [2019-12-07 12:32:18,913 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:18,913 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 12:32:18,914 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1985647493] [2019-12-07 12:32:18,914 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:32:18,914 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:18,914 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:32:18,914 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:32:18,914 INFO L87 Difference]: Start difference. First operand 377 states and 678 transitions. Second operand 11 states. [2019-12-07 12:32:19,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:19,596 INFO L93 Difference]: Finished difference Result 543 states and 937 transitions. [2019-12-07 12:32:19,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 12:32:19,596 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 53 [2019-12-07 12:32:19,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:19,597 INFO L225 Difference]: With dead ends: 543 [2019-12-07 12:32:19,597 INFO L226 Difference]: Without dead ends: 543 [2019-12-07 12:32:19,597 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=114, Invalid=348, Unknown=0, NotChecked=0, Total=462 [2019-12-07 12:32:19,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states. [2019-12-07 12:32:19,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 329. [2019-12-07 12:32:19,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2019-12-07 12:32:19,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 571 transitions. [2019-12-07 12:32:19,601 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 571 transitions. Word has length 53 [2019-12-07 12:32:19,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:19,601 INFO L462 AbstractCegarLoop]: Abstraction has 329 states and 571 transitions. [2019-12-07 12:32:19,602 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:32:19,602 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 571 transitions. [2019-12-07 12:32:19,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 12:32:19,602 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:19,602 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:19,602 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:19,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:19,603 INFO L82 PathProgramCache]: Analyzing trace with hash -1073733746, now seen corresponding path program 4 times [2019-12-07 12:32:19,603 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:19,603 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682716573] [2019-12-07 12:32:19,603 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:19,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:19,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:19,699 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [682716573] [2019-12-07 12:32:19,700 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:19,700 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:32:19,700 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [926170724] [2019-12-07 12:32:19,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:32:19,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:19,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:32:19,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:32:19,701 INFO L87 Difference]: Start difference. First operand 329 states and 571 transitions. Second operand 6 states. [2019-12-07 12:32:19,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:19,779 INFO L93 Difference]: Finished difference Result 563 states and 964 transitions. [2019-12-07 12:32:19,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 12:32:19,779 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-12-07 12:32:19,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:19,779 INFO L225 Difference]: With dead ends: 563 [2019-12-07 12:32:19,779 INFO L226 Difference]: Without dead ends: 251 [2019-12-07 12:32:19,780 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 12:32:19,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states. [2019-12-07 12:32:19,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 227. [2019-12-07 12:32:19,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227 states. [2019-12-07 12:32:19,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227 states to 227 states and 374 transitions. [2019-12-07 12:32:19,782 INFO L78 Accepts]: Start accepts. Automaton has 227 states and 374 transitions. Word has length 53 [2019-12-07 12:32:19,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:19,782 INFO L462 AbstractCegarLoop]: Abstraction has 227 states and 374 transitions. [2019-12-07 12:32:19,782 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:32:19,782 INFO L276 IsEmpty]: Start isEmpty. Operand 227 states and 374 transitions. [2019-12-07 12:32:19,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 12:32:19,783 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:19,783 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:19,783 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:19,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:19,783 INFO L82 PathProgramCache]: Analyzing trace with hash 175082296, now seen corresponding path program 5 times [2019-12-07 12:32:19,783 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:19,784 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [712872369] [2019-12-07 12:32:19,784 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:19,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:32:19,831 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:32:19,831 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [712872369] [2019-12-07 12:32:19,831 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:32:19,831 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:32:19,831 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [563944215] [2019-12-07 12:32:19,832 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:32:19,832 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:32:19,832 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:32:19,832 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:19,832 INFO L87 Difference]: Start difference. First operand 227 states and 374 transitions. Second operand 3 states. [2019-12-07 12:32:19,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:32:19,864 INFO L93 Difference]: Finished difference Result 226 states and 372 transitions. [2019-12-07 12:32:19,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:32:19,864 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 12:32:19,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:32:19,865 INFO L225 Difference]: With dead ends: 226 [2019-12-07 12:32:19,865 INFO L226 Difference]: Without dead ends: 226 [2019-12-07 12:32:19,865 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:32:19,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2019-12-07 12:32:19,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 183. [2019-12-07 12:32:19,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2019-12-07 12:32:19,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 299 transitions. [2019-12-07 12:32:19,868 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 299 transitions. Word has length 53 [2019-12-07 12:32:19,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:32:19,869 INFO L462 AbstractCegarLoop]: Abstraction has 183 states and 299 transitions. [2019-12-07 12:32:19,869 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:32:19,869 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 299 transitions. [2019-12-07 12:32:19,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 12:32:19,869 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:32:19,869 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:32:19,870 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:32:19,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:32:19,870 INFO L82 PathProgramCache]: Analyzing trace with hash -1455781027, now seen corresponding path program 1 times [2019-12-07 12:32:19,870 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:32:19,870 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [154250126] [2019-12-07 12:32:19,870 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:32:19,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:32:19,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:32:19,964 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:32:19,964 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 12:32:19,967 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] ULTIMATE.startENTRY-->L787: Formula: (let ((.cse0 (store |v_#valid_48| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= 0 v_~x~0_169) (= 0 v_~x$read_delayed_var~0.offset_6) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1587~0.base_19| 4)) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1587~0.base_19|)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1587~0.base_19| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1587~0.base_19|) |v_ULTIMATE.start_main_~#t1587~0.offset_14| 0)) |v_#memory_int_17|) (= |v_#NULL.offset_7| 0) (= v_~x$r_buff1_thd2~0_98 0) (= 0 v_~__unbuffered_cnt~0_67) (= v_~main$tmp_guard1~0_21 0) (= 0 v_~x$w_buff1_used~0_304) (= v_~x$r_buff0_thd0~0_295 0) (= 0 v_~x$r_buff0_thd2~0_162) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1587~0.base_19|) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~x$read_delayed~0_6) (= v_~y~0_104 0) (= 0 |v_ULTIMATE.start_main_~#t1587~0.offset_14|) (= v_~__unbuffered_p1_EBX~0_62 0) (= v_~x$mem_tmp~0_16 0) (= v_~x$flush_delayed~0_31 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1587~0.base_19| 1) |v_#valid_46|) (= 0 v_~weak$$choice2~0_83) (= 0 v_~weak$$choice0~0_11) (= 0 v_~__unbuffered_p1_EAX~0_62) (= 0 |v_#NULL.base_7|) (= 0 v_~x$w_buff1~0_172) (= v_~main$tmp_guard0~0_26 0) (= v_~x$r_buff1_thd1~0_135 0) (= v_~x$r_buff0_thd1~0_120 0) (= 0 v_~x$w_buff0~0_199) (= v_~x$r_buff1_thd0~0_177 0) (= 0 v_~x$w_buff0_used~0_556))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_199, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_30|, ULTIMATE.start_main_~#t1587~0.offset=|v_ULTIMATE.start_main_~#t1587~0.offset_14|, ~x$flush_delayed~0=v_~x$flush_delayed~0_31, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_135, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_32|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_25|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_30|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_62, #length=|v_#length_17|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_295, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_31|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_15|, ~x$w_buff1~0=v_~x$w_buff1~0_172, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_23|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_304, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_98, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_34|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_11, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, ~x~0=v_~x~0_169, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_120, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_19|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_32|, ~x$mem_tmp~0=v_~x$mem_tmp~0_16, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_37|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_30|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_28|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ULTIMATE.start_main_~#t1588~0.base=|v_ULTIMATE.start_main_~#t1588~0.base_17|, ~y~0=v_~y~0_104, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_62, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_37|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_15|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_32|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_26|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_177, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_23|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_28|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_556, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_28|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1588~0.offset=|v_ULTIMATE.start_main_~#t1588~0.offset_14|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_23|, ULTIMATE.start_main_~#t1587~0.base=|v_ULTIMATE.start_main_~#t1587~0.base_19|, ~weak$$choice2~0=v_~weak$$choice2~0_83, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1587~0.offset, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p1_EAX~0, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1588~0.base, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t1588~0.offset, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_~#t1587~0.base, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 12:32:19,968 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L787-1-->L789: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1588~0.base_10|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1588~0.base_10| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1588~0.base_10|) |v_ULTIMATE.start_main_~#t1588~0.offset_9| 1))) (= |v_ULTIMATE.start_main_~#t1588~0.offset_9| 0) (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t1588~0.base_10| 4)) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t1588~0.base_10|) (= |v_#valid_23| (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1588~0.base_10| 1)) (= (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1588~0.base_10|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_10|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t1588~0.offset=|v_ULTIMATE.start_main_~#t1588~0.offset_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_3|, ULTIMATE.start_main_~#t1588~0.base=|v_ULTIMATE.start_main_~#t1588~0.base_10|, #length=|v_#length_9|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t1588~0.offset, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1588~0.base, #length] because there is no mapped edge [2019-12-07 12:32:19,969 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L4-->L764: Formula: (and (= ~x$r_buff1_thd1~0_Out1996726466 ~x$r_buff0_thd1~0_In1996726466) (= ~x$r_buff0_thd2~0_Out1996726466 1) (= ~y~0_Out1996726466 ~__unbuffered_p1_EAX~0_Out1996726466) (= ~y~0_Out1996726466 ~__unbuffered_p1_EBX~0_Out1996726466) (= ~x$r_buff1_thd0~0_Out1996726466 ~x$r_buff0_thd0~0_In1996726466) (= ~y~0_Out1996726466 1) (= ~x$r_buff1_thd2~0_Out1996726466 ~x$r_buff0_thd2~0_In1996726466) (not (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_In1996726466 0))) InVars {P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In1996726466, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1996726466, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1996726466, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1996726466} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In1996726466, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1996726466, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1996726466, ~__unbuffered_p1_EBX~0=~__unbuffered_p1_EBX~0_Out1996726466, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_Out1996726466, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_Out1996726466, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_Out1996726466, ~y~0=~y~0_Out1996726466, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1996726466, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out1996726466} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~__unbuffered_p1_EAX~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~y~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 12:32:19,969 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L730-2-->L730-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In1991956511 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In1991956511 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In1991956511 |P0Thread1of1ForFork0_#t~ite3_Out1991956511|)) (and (= ~x~0_In1991956511 |P0Thread1of1ForFork0_#t~ite3_Out1991956511|) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1991956511, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1991956511, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1991956511, ~x~0=~x~0_In1991956511} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out1991956511|, ~x$w_buff1~0=~x$w_buff1~0_In1991956511, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1991956511, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1991956511, ~x~0=~x~0_In1991956511} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3] because there is no mapped edge [2019-12-07 12:32:19,969 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [587] [587] L730-4-->L731: Formula: (= v_~x~0_20 |v_P0Thread1of1ForFork0_#t~ite3_14|) InVars {P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_14|} OutVars{P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_13|, P0Thread1of1ForFork0_#t~ite4=|v_P0Thread1of1ForFork0_#t~ite4_5|, ~x~0=v_~x~0_20} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4, ~x~0] because there is no mapped edge [2019-12-07 12:32:19,969 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L731-->L731-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-1316995582 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1316995582 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-1316995582 |P0Thread1of1ForFork0_#t~ite5_Out-1316995582|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1316995582|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1316995582, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1316995582} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1316995582|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1316995582, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1316995582} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 12:32:19,970 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L732-->L732-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In-1876680122 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd1~0_In-1876680122 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-1876680122 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1876680122 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1876680122|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-1876680122 |P0Thread1of1ForFork0_#t~ite6_Out-1876680122|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1876680122, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1876680122, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1876680122, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1876680122} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1876680122|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1876680122, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1876680122, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1876680122, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1876680122} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 12:32:19,970 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L733-->L733-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In380525248 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In380525248 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite7_Out380525248|) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd1~0_In380525248 |P0Thread1of1ForFork0_#t~ite7_Out380525248|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In380525248, ~x$w_buff0_used~0=~x$w_buff0_used~0_In380525248} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In380525248, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out380525248|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In380525248} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 12:32:19,971 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-831523246 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-831523246 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-831523246 |P1Thread1of1ForFork1_#t~ite11_Out-831523246|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-831523246|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-831523246, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-831523246} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-831523246|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-831523246, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-831523246} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 12:32:19,971 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L766-->L766-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd2~0_In1903442575 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1903442575 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In1903442575 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In1903442575 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1903442575|)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~x$w_buff1_used~0_In1903442575 |P1Thread1of1ForFork1_#t~ite12_Out1903442575|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1903442575, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1903442575, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1903442575, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1903442575} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1903442575, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1903442575, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1903442575|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1903442575, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1903442575} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 12:32:19,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L767-->L768: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In1875035666 256) 0)) (.cse2 (= ~x$r_buff0_thd2~0_In1875035666 ~x$r_buff0_thd2~0_Out1875035666)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1875035666 256)))) (or (and (= 0 ~x$r_buff0_thd2~0_Out1875035666) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1875035666, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1875035666} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1875035666|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1875035666, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1875035666} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 12:32:19,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [662] [662] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In948431139 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd2~0_In948431139 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In948431139 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In948431139 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out948431139|)) (and (or .cse3 .cse2) (= ~x$r_buff1_thd2~0_In948431139 |P1Thread1of1ForFork1_#t~ite14_Out948431139|) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In948431139, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In948431139, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In948431139, ~x$w_buff0_used~0=~x$w_buff0_used~0_In948431139} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In948431139, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In948431139, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In948431139, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out948431139|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In948431139} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 12:32:19,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L768-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork1_#t~ite14_32|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_32|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_31|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:32:19,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L734-->L734-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-713901328 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-713901328 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-713901328 256))) (.cse2 (= (mod ~x$r_buff0_thd1~0_In-713901328 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out-713901328|)) (and (or .cse0 .cse1) (= ~x$r_buff1_thd1~0_In-713901328 |P0Thread1of1ForFork0_#t~ite8_Out-713901328|) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-713901328, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-713901328, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-713901328, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-713901328} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-713901328, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-713901328|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-713901328, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-713901328, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-713901328} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 12:32:19,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L734-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_94 |v_P0Thread1of1ForFork0_#t~ite8_32|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_31|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_94} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 12:32:19,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [591] [591] L789-1-->L795: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 2 v_~__unbuffered_cnt~0_15) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:32:19,973 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L795-2-->L795-4: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-1523301470 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1523301470 256)))) (or (and (not .cse0) (= ~x$w_buff1~0_In-1523301470 |ULTIMATE.start_main_#t~ite17_Out-1523301470|) (not .cse1)) (and (or .cse1 .cse0) (= ~x~0_In-1523301470 |ULTIMATE.start_main_#t~ite17_Out-1523301470|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1523301470, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1523301470, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1523301470, ~x~0=~x~0_In-1523301470} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-1523301470|, ~x$w_buff1~0=~x$w_buff1~0_In-1523301470, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1523301470, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1523301470, ~x~0=~x~0_In-1523301470} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 12:32:19,973 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [624] [624] L795-4-->L796: Formula: (= v_~x~0_42 |v_ULTIMATE.start_main_#t~ite17_11|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_11|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_10|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_6|, ~x~0=v_~x~0_42} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~x~0] because there is no mapped edge [2019-12-07 12:32:19,973 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L796-->L796-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In378576920 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In378576920 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite19_Out378576920|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In378576920 |ULTIMATE.start_main_#t~ite19_Out378576920|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In378576920, ~x$w_buff0_used~0=~x$w_buff0_used~0_In378576920} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In378576920, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out378576920|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In378576920} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 12:32:19,973 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L797-->L797-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In2058621201 256))) (.cse2 (= (mod ~x$r_buff1_thd0~0_In2058621201 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd0~0_In2058621201 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In2058621201 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite20_Out2058621201| ~x$w_buff1_used~0_In2058621201)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite20_Out2058621201| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2058621201, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2058621201, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2058621201, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2058621201} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2058621201, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2058621201, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out2058621201|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2058621201, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2058621201} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 12:32:19,974 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L798-->L798-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1431053032 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1431053032 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out-1431053032| 0) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd0~0_In-1431053032 |ULTIMATE.start_main_#t~ite21_Out-1431053032|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1431053032, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1431053032} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1431053032, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1431053032|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1431053032} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 12:32:19,974 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L799-->L799-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In2048477186 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In2048477186 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In2048477186 256))) (.cse2 (= (mod ~x$r_buff0_thd0~0_In2048477186 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite22_Out2048477186| 0)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~x$r_buff1_thd0~0_In2048477186 |ULTIMATE.start_main_#t~ite22_Out2048477186|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2048477186, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2048477186, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2048477186, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2048477186} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2048477186, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2048477186, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2048477186, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out2048477186|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2048477186} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 12:32:19,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L811-->L812: Formula: (and (not (= (mod v_~weak$$choice2~0_40 256) 0)) (= v_~x$r_buff0_thd0~0_150 v_~x$r_buff0_thd0~0_151)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_151, ~weak$$choice2~0=v_~weak$$choice2~0_40} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_150, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_14|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_11|, ~weak$$choice2~0=v_~weak$$choice2~0_40} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 12:32:19,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L814-->L817-1: Formula: (and (= v_~x$mem_tmp~0_10 v_~x~0_111) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7| (mod v_~main$tmp_guard1~0_11 256)) (not (= 0 (mod v_~x$flush_delayed~0_20 256))) (= v_~x$flush_delayed~0_19 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_19, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_111, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_16|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:32:19,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [670] [670] L817-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 12:32:20,029 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:32:20 BasicIcfg [2019-12-07 12:32:20,029 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 12:32:20,030 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:32:20,030 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:32:20,030 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:32:20,030 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:32:12" (3/4) ... [2019-12-07 12:32:20,032 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 12:32:20,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] ULTIMATE.startENTRY-->L787: Formula: (let ((.cse0 (store |v_#valid_48| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= 0 v_~x~0_169) (= 0 v_~x$read_delayed_var~0.offset_6) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1587~0.base_19| 4)) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1587~0.base_19|)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1587~0.base_19| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1587~0.base_19|) |v_ULTIMATE.start_main_~#t1587~0.offset_14| 0)) |v_#memory_int_17|) (= |v_#NULL.offset_7| 0) (= v_~x$r_buff1_thd2~0_98 0) (= 0 v_~__unbuffered_cnt~0_67) (= v_~main$tmp_guard1~0_21 0) (= 0 v_~x$w_buff1_used~0_304) (= v_~x$r_buff0_thd0~0_295 0) (= 0 v_~x$r_buff0_thd2~0_162) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1587~0.base_19|) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~x$read_delayed~0_6) (= v_~y~0_104 0) (= 0 |v_ULTIMATE.start_main_~#t1587~0.offset_14|) (= v_~__unbuffered_p1_EBX~0_62 0) (= v_~x$mem_tmp~0_16 0) (= v_~x$flush_delayed~0_31 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1587~0.base_19| 1) |v_#valid_46|) (= 0 v_~weak$$choice2~0_83) (= 0 v_~weak$$choice0~0_11) (= 0 v_~__unbuffered_p1_EAX~0_62) (= 0 |v_#NULL.base_7|) (= 0 v_~x$w_buff1~0_172) (= v_~main$tmp_guard0~0_26 0) (= v_~x$r_buff1_thd1~0_135 0) (= v_~x$r_buff0_thd1~0_120 0) (= 0 v_~x$w_buff0~0_199) (= v_~x$r_buff1_thd0~0_177 0) (= 0 v_~x$w_buff0_used~0_556))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_199, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_30|, ULTIMATE.start_main_~#t1587~0.offset=|v_ULTIMATE.start_main_~#t1587~0.offset_14|, ~x$flush_delayed~0=v_~x$flush_delayed~0_31, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_135, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_32|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_25|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_30|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_62, #length=|v_#length_17|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_295, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_31|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_15|, ~x$w_buff1~0=v_~x$w_buff1~0_172, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_23|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_304, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_98, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_34|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_11, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, ~x~0=v_~x~0_169, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_120, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_19|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_32|, ~x$mem_tmp~0=v_~x$mem_tmp~0_16, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_37|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_30|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_28|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ULTIMATE.start_main_~#t1588~0.base=|v_ULTIMATE.start_main_~#t1588~0.base_17|, ~y~0=v_~y~0_104, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_62, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_37|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_15|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_32|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_26|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_177, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_23|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_28|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_556, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_28|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1588~0.offset=|v_ULTIMATE.start_main_~#t1588~0.offset_14|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_23|, ULTIMATE.start_main_~#t1587~0.base=|v_ULTIMATE.start_main_~#t1587~0.base_19|, ~weak$$choice2~0=v_~weak$$choice2~0_83, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1587~0.offset, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p1_EAX~0, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1588~0.base, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t1588~0.offset, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_~#t1587~0.base, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 12:32:20,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L787-1-->L789: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1588~0.base_10|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1588~0.base_10| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1588~0.base_10|) |v_ULTIMATE.start_main_~#t1588~0.offset_9| 1))) (= |v_ULTIMATE.start_main_~#t1588~0.offset_9| 0) (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t1588~0.base_10| 4)) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t1588~0.base_10|) (= |v_#valid_23| (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1588~0.base_10| 1)) (= (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1588~0.base_10|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_10|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t1588~0.offset=|v_ULTIMATE.start_main_~#t1588~0.offset_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_3|, ULTIMATE.start_main_~#t1588~0.base=|v_ULTIMATE.start_main_~#t1588~0.base_10|, #length=|v_#length_9|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t1588~0.offset, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1588~0.base, #length] because there is no mapped edge [2019-12-07 12:32:20,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L4-->L764: Formula: (and (= ~x$r_buff1_thd1~0_Out1996726466 ~x$r_buff0_thd1~0_In1996726466) (= ~x$r_buff0_thd2~0_Out1996726466 1) (= ~y~0_Out1996726466 ~__unbuffered_p1_EAX~0_Out1996726466) (= ~y~0_Out1996726466 ~__unbuffered_p1_EBX~0_Out1996726466) (= ~x$r_buff1_thd0~0_Out1996726466 ~x$r_buff0_thd0~0_In1996726466) (= ~y~0_Out1996726466 1) (= ~x$r_buff1_thd2~0_Out1996726466 ~x$r_buff0_thd2~0_In1996726466) (not (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_In1996726466 0))) InVars {P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In1996726466, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1996726466, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1996726466, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1996726466} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In1996726466, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1996726466, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1996726466, ~__unbuffered_p1_EBX~0=~__unbuffered_p1_EBX~0_Out1996726466, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_Out1996726466, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_Out1996726466, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_Out1996726466, ~y~0=~y~0_Out1996726466, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1996726466, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out1996726466} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~__unbuffered_p1_EAX~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~y~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 12:32:20,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L730-2-->L730-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In1991956511 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In1991956511 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In1991956511 |P0Thread1of1ForFork0_#t~ite3_Out1991956511|)) (and (= ~x~0_In1991956511 |P0Thread1of1ForFork0_#t~ite3_Out1991956511|) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1991956511, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1991956511, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1991956511, ~x~0=~x~0_In1991956511} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out1991956511|, ~x$w_buff1~0=~x$w_buff1~0_In1991956511, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1991956511, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1991956511, ~x~0=~x~0_In1991956511} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3] because there is no mapped edge [2019-12-07 12:32:20,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [587] [587] L730-4-->L731: Formula: (= v_~x~0_20 |v_P0Thread1of1ForFork0_#t~ite3_14|) InVars {P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_14|} OutVars{P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_13|, P0Thread1of1ForFork0_#t~ite4=|v_P0Thread1of1ForFork0_#t~ite4_5|, ~x~0=v_~x~0_20} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4, ~x~0] because there is no mapped edge [2019-12-07 12:32:20,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L731-->L731-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-1316995582 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1316995582 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-1316995582 |P0Thread1of1ForFork0_#t~ite5_Out-1316995582|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1316995582|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1316995582, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1316995582} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1316995582|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1316995582, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1316995582} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 12:32:20,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L732-->L732-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In-1876680122 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd1~0_In-1876680122 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-1876680122 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1876680122 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1876680122|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-1876680122 |P0Thread1of1ForFork0_#t~ite6_Out-1876680122|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1876680122, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1876680122, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1876680122, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1876680122} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1876680122|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1876680122, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1876680122, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1876680122, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1876680122} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 12:32:20,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L733-->L733-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In380525248 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In380525248 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite7_Out380525248|) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd1~0_In380525248 |P0Thread1of1ForFork0_#t~ite7_Out380525248|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In380525248, ~x$w_buff0_used~0=~x$w_buff0_used~0_In380525248} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In380525248, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out380525248|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In380525248} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 12:32:20,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-831523246 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-831523246 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-831523246 |P1Thread1of1ForFork1_#t~ite11_Out-831523246|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-831523246|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-831523246, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-831523246} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-831523246|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-831523246, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-831523246} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 12:32:20,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L766-->L766-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd2~0_In1903442575 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1903442575 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In1903442575 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In1903442575 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1903442575|)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~x$w_buff1_used~0_In1903442575 |P1Thread1of1ForFork1_#t~ite12_Out1903442575|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1903442575, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1903442575, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1903442575, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1903442575} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1903442575, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1903442575, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1903442575|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1903442575, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1903442575} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 12:32:20,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L767-->L768: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In1875035666 256) 0)) (.cse2 (= ~x$r_buff0_thd2~0_In1875035666 ~x$r_buff0_thd2~0_Out1875035666)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1875035666 256)))) (or (and (= 0 ~x$r_buff0_thd2~0_Out1875035666) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1875035666, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1875035666} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1875035666|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1875035666, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1875035666} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 12:32:20,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [662] [662] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In948431139 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd2~0_In948431139 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In948431139 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In948431139 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out948431139|)) (and (or .cse3 .cse2) (= ~x$r_buff1_thd2~0_In948431139 |P1Thread1of1ForFork1_#t~ite14_Out948431139|) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In948431139, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In948431139, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In948431139, ~x$w_buff0_used~0=~x$w_buff0_used~0_In948431139} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In948431139, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In948431139, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In948431139, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out948431139|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In948431139} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 12:32:20,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L768-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork1_#t~ite14_32|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_32|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_31|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:32:20,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L734-->L734-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-713901328 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-713901328 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-713901328 256))) (.cse2 (= (mod ~x$r_buff0_thd1~0_In-713901328 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out-713901328|)) (and (or .cse0 .cse1) (= ~x$r_buff1_thd1~0_In-713901328 |P0Thread1of1ForFork0_#t~ite8_Out-713901328|) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-713901328, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-713901328, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-713901328, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-713901328} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-713901328, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-713901328|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-713901328, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-713901328, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-713901328} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 12:32:20,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L734-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_94 |v_P0Thread1of1ForFork0_#t~ite8_32|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_31|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_94} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 12:32:20,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [591] [591] L789-1-->L795: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 2 v_~__unbuffered_cnt~0_15) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:32:20,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L795-2-->L795-4: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-1523301470 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1523301470 256)))) (or (and (not .cse0) (= ~x$w_buff1~0_In-1523301470 |ULTIMATE.start_main_#t~ite17_Out-1523301470|) (not .cse1)) (and (or .cse1 .cse0) (= ~x~0_In-1523301470 |ULTIMATE.start_main_#t~ite17_Out-1523301470|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1523301470, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1523301470, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1523301470, ~x~0=~x~0_In-1523301470} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-1523301470|, ~x$w_buff1~0=~x$w_buff1~0_In-1523301470, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1523301470, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1523301470, ~x~0=~x~0_In-1523301470} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 12:32:20,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [624] [624] L795-4-->L796: Formula: (= v_~x~0_42 |v_ULTIMATE.start_main_#t~ite17_11|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_11|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_10|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_6|, ~x~0=v_~x~0_42} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~x~0] because there is no mapped edge [2019-12-07 12:32:20,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L796-->L796-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In378576920 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In378576920 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite19_Out378576920|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In378576920 |ULTIMATE.start_main_#t~ite19_Out378576920|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In378576920, ~x$w_buff0_used~0=~x$w_buff0_used~0_In378576920} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In378576920, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out378576920|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In378576920} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 12:32:20,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L797-->L797-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In2058621201 256))) (.cse2 (= (mod ~x$r_buff1_thd0~0_In2058621201 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd0~0_In2058621201 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In2058621201 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite20_Out2058621201| ~x$w_buff1_used~0_In2058621201)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite20_Out2058621201| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2058621201, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2058621201, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2058621201, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2058621201} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2058621201, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2058621201, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out2058621201|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2058621201, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2058621201} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 12:32:20,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L798-->L798-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1431053032 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1431053032 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out-1431053032| 0) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd0~0_In-1431053032 |ULTIMATE.start_main_#t~ite21_Out-1431053032|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1431053032, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1431053032} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1431053032, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1431053032|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1431053032} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 12:32:20,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L799-->L799-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In2048477186 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In2048477186 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In2048477186 256))) (.cse2 (= (mod ~x$r_buff0_thd0~0_In2048477186 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite22_Out2048477186| 0)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~x$r_buff1_thd0~0_In2048477186 |ULTIMATE.start_main_#t~ite22_Out2048477186|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2048477186, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2048477186, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2048477186, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2048477186} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2048477186, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2048477186, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2048477186, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out2048477186|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2048477186} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 12:32:20,041 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L811-->L812: Formula: (and (not (= (mod v_~weak$$choice2~0_40 256) 0)) (= v_~x$r_buff0_thd0~0_150 v_~x$r_buff0_thd0~0_151)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_151, ~weak$$choice2~0=v_~weak$$choice2~0_40} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_150, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_14|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_11|, ~weak$$choice2~0=v_~weak$$choice2~0_40} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 12:32:20,042 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L814-->L817-1: Formula: (and (= v_~x$mem_tmp~0_10 v_~x~0_111) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7| (mod v_~main$tmp_guard1~0_11 256)) (not (= 0 (mod v_~x$flush_delayed~0_20 256))) (= v_~x$flush_delayed~0_19 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_19, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_111, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_16|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:32:20,042 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [670] [670] L817-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 12:32:20,102 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_7fa8c0c5-50ea-4537-b863-717adcf8b1e7/bin/uautomizer/witness.graphml [2019-12-07 12:32:20,103 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:32:20,104 INFO L168 Benchmark]: Toolchain (without parser) took 8255.76 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 401.1 MB). Free memory was 937.1 MB in the beginning and 1.2 GB in the end (delta: -309.3 MB). Peak memory consumption was 91.8 MB. Max. memory is 11.5 GB. [2019-12-07 12:32:20,104 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:32:20,105 INFO L168 Benchmark]: CACSL2BoogieTranslator took 374.11 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 89.7 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -119.2 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 12:32:20,105 INFO L168 Benchmark]: Boogie Procedure Inliner took 43.73 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:32:20,105 INFO L168 Benchmark]: Boogie Preprocessor took 24.78 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:32:20,106 INFO L168 Benchmark]: RCFGBuilder took 384.69 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.8 MB). Peak memory consumption was 49.8 MB. Max. memory is 11.5 GB. [2019-12-07 12:32:20,106 INFO L168 Benchmark]: TraceAbstraction took 7352.05 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 311.4 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -260.3 MB). Peak memory consumption was 51.1 MB. Max. memory is 11.5 GB. [2019-12-07 12:32:20,106 INFO L168 Benchmark]: Witness Printer took 73.12 ms. Allocated memory is still 1.4 GB. Free memory was 1.3 GB in the beginning and 1.2 GB in the end (delta: 15.1 MB). Peak memory consumption was 15.1 MB. Max. memory is 11.5 GB. [2019-12-07 12:32:20,108 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 374.11 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 89.7 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -119.2 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 43.73 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.78 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 384.69 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.8 MB). Peak memory consumption was 49.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 7352.05 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 311.4 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -260.3 MB). Peak memory consumption was 51.1 MB. Max. memory is 11.5 GB. * Witness Printer took 73.12 ms. Allocated memory is still 1.4 GB. Free memory was 1.3 GB in the beginning and 1.2 GB in the end (delta: 15.1 MB). Peak memory consumption was 15.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.6s, 147 ProgramPointsBefore, 81 ProgramPointsAfterwards, 181 TransitionsBefore, 94 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 29 TrivialSequentialCompositions, 37 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 24 ChoiceCompositions, 3783 VarBasedMoverChecksPositive, 170 VarBasedMoverChecksNegative, 19 SemBasedMoverChecksPositive, 202 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 50487 CheckedPairsTotal, 98 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L787] FCALL, FORK 0 pthread_create(&t1587, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L789] FCALL, FORK 0 pthread_create(&t1588, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L744] 2 x$w_buff1 = x$w_buff0 [L745] 2 x$w_buff0 = 2 [L746] 2 x$w_buff1_used = x$w_buff0_used [L747] 2 x$w_buff0_used = (_Bool)1 [L724] 1 y = 2 [L727] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L730] 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L731] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L764] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L732] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L764] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L765] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L766] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L733] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L795] 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L797] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L798] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L799] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L802] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L803] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L804] 0 x$flush_delayed = weak$$choice2 [L805] 0 x$mem_tmp = x VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L806] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L806] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L807] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L807] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L808] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L808] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L809] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L809] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L810] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L810] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L812] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L812] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L813] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 141 locations, 2 error locations. Result: UNSAFE, OverallTime: 7.2s, OverallIterations: 14, TraceHistogramMax: 1, AutomataDifference: 2.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1337 SDtfs, 751 SDslu, 2403 SDs, 0 SdLazy, 1356 SolverSat, 75 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 80 GetRequests, 17 SyntacticMatches, 11 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=14489occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.9s AutomataMinimizationTime, 13 MinimizatonAttempts, 3660 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 542 NumberOfCodeBlocks, 542 NumberOfCodeBlocksAsserted, 14 NumberOfCheckSat, 475 ConstructedInterpolants, 0 QuantifiedInterpolants, 78440 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 13 InterpolantComputations, 13 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...