./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi000_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_4fadefa3-4048-42c8-b0b1-5f3ace4b38a4/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_4fadefa3-4048-42c8-b0b1-5f3ace4b38a4/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_4fadefa3-4048-42c8-b0b1-5f3ace4b38a4/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_4fadefa3-4048-42c8-b0b1-5f3ace4b38a4/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi000_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_4fadefa3-4048-42c8-b0b1-5f3ace4b38a4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_4fadefa3-4048-42c8-b0b1-5f3ace4b38a4/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash fa041608809d444b2c1f56abe61099842d8954f6 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:46:01,065 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:46:01,067 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:46:01,077 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:46:01,077 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:46:01,078 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:46:01,079 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:46:01,081 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:46:01,083 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:46:01,084 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:46:01,084 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:46:01,085 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:46:01,086 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:46:01,087 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:46:01,087 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:46:01,089 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:46:01,089 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:46:01,090 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:46:01,092 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:46:01,094 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:46:01,095 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:46:01,096 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:46:01,097 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:46:01,098 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:46:01,100 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:46:01,100 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:46:01,100 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:46:01,101 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:46:01,101 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:46:01,102 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:46:01,102 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:46:01,102 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:46:01,103 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:46:01,103 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:46:01,104 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:46:01,104 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:46:01,104 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:46:01,105 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:46:01,105 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:46:01,105 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:46:01,106 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:46:01,106 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_4fadefa3-4048-42c8-b0b1-5f3ace4b38a4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:46:01,115 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:46:01,115 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:46:01,116 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:46:01,116 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:46:01,116 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:46:01,117 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:46:01,117 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:46:01,117 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:46:01,117 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:46:01,117 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:46:01,117 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:46:01,117 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:46:01,117 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:46:01,118 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:46:01,118 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:46:01,118 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:46:01,118 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:46:01,118 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:46:01,118 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:46:01,118 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:46:01,118 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:46:01,119 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:46:01,119 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:46:01,119 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:46:01,119 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:46:01,119 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:46:01,119 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:46:01,119 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:46:01,120 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:46:01,120 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_4fadefa3-4048-42c8-b0b1-5f3ace4b38a4/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> fa041608809d444b2c1f56abe61099842d8954f6 [2019-12-07 18:46:01,251 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:46:01,262 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:46:01,264 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:46:01,266 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:46:01,266 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:46:01,266 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_4fadefa3-4048-42c8-b0b1-5f3ace4b38a4/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/rfi000_pso.opt.i [2019-12-07 18:46:01,308 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4fadefa3-4048-42c8-b0b1-5f3ace4b38a4/bin/uautomizer/data/f00e5dd66/7a2d1a84dff84931961bbfac47261ad3/FLAGe42de3996 [2019-12-07 18:46:01,797 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:46:01,797 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_4fadefa3-4048-42c8-b0b1-5f3ace4b38a4/sv-benchmarks/c/pthread-wmm/rfi000_pso.opt.i [2019-12-07 18:46:01,808 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4fadefa3-4048-42c8-b0b1-5f3ace4b38a4/bin/uautomizer/data/f00e5dd66/7a2d1a84dff84931961bbfac47261ad3/FLAGe42de3996 [2019-12-07 18:46:02,288 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_4fadefa3-4048-42c8-b0b1-5f3ace4b38a4/bin/uautomizer/data/f00e5dd66/7a2d1a84dff84931961bbfac47261ad3 [2019-12-07 18:46:02,290 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:46:02,291 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:46:02,292 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:46:02,292 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:46:02,295 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:46:02,295 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:46:02" (1/1) ... [2019-12-07 18:46:02,297 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@27a7eda1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:02, skipping insertion in model container [2019-12-07 18:46:02,298 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:46:02" (1/1) ... [2019-12-07 18:46:02,303 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:46:02,333 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:46:02,578 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:46:02,586 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:46:02,629 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:46:02,676 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:46:02,677 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:02 WrapperNode [2019-12-07 18:46:02,677 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:46:02,677 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:46:02,677 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:46:02,678 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:46:02,683 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:02" (1/1) ... [2019-12-07 18:46:02,696 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:02" (1/1) ... [2019-12-07 18:46:02,719 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:46:02,719 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:46:02,719 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:46:02,719 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:46:02,726 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:02" (1/1) ... [2019-12-07 18:46:02,726 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:02" (1/1) ... [2019-12-07 18:46:02,729 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:02" (1/1) ... [2019-12-07 18:46:02,730 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:02" (1/1) ... [2019-12-07 18:46:02,736 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:02" (1/1) ... [2019-12-07 18:46:02,738 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:02" (1/1) ... [2019-12-07 18:46:02,741 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:02" (1/1) ... [2019-12-07 18:46:02,744 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:46:02,745 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:46:02,745 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:46:02,745 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:46:02,745 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:02" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4fadefa3-4048-42c8-b0b1-5f3ace4b38a4/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:46:02,786 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:46:02,787 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:46:02,787 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:46:02,787 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:46:02,787 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:46:02,787 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:46:02,787 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:46:02,787 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:46:02,787 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:46:02,787 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:46:02,787 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:46:02,788 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:46:03,124 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:46:03,124 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:46:03,125 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:46:03 BoogieIcfgContainer [2019-12-07 18:46:03,125 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:46:03,126 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:46:03,126 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:46:03,127 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:46:03,127 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:46:02" (1/3) ... [2019-12-07 18:46:03,128 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@66a4e6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:46:03, skipping insertion in model container [2019-12-07 18:46:03,128 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:02" (2/3) ... [2019-12-07 18:46:03,128 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@66a4e6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:46:03, skipping insertion in model container [2019-12-07 18:46:03,128 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:46:03" (3/3) ... [2019-12-07 18:46:03,129 INFO L109 eAbstractionObserver]: Analyzing ICFG rfi000_pso.opt.i [2019-12-07 18:46:03,135 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:46:03,136 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:46:03,140 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:46:03,141 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:46:03,160 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,161 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,161 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,161 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,161 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,161 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,161 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,165 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,165 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,165 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,165 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,165 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,165 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,165 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,165 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,166 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,166 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,166 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,166 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,166 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,166 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,166 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,167 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,167 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,167 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,167 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,167 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,167 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,167 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,167 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,167 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,168 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,168 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,168 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,168 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,168 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,168 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,168 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,168 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,169 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,169 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:03,179 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 18:46:03,191 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:46:03,191 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:46:03,191 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:46:03,191 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:46:03,192 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:46:03,192 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:46:03,192 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:46:03,192 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:46:03,202 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 147 places, 181 transitions [2019-12-07 18:46:03,203 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 147 places, 181 transitions [2019-12-07 18:46:03,250 INFO L134 PetriNetUnfolder]: 41/179 cut-off events. [2019-12-07 18:46:03,250 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:46:03,258 INFO L76 FinitePrefix]: Finished finitePrefix Result has 186 conditions, 179 events. 41/179 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 465 event pairs. 6/142 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 18:46:03,268 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 147 places, 181 transitions [2019-12-07 18:46:03,293 INFO L134 PetriNetUnfolder]: 41/179 cut-off events. [2019-12-07 18:46:03,293 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:46:03,296 INFO L76 FinitePrefix]: Finished finitePrefix Result has 186 conditions, 179 events. 41/179 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 465 event pairs. 6/142 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 18:46:03,304 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-12-07 18:46:03,305 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:46:05,754 WARN L192 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 81 [2019-12-07 18:46:05,830 INFO L206 etLargeBlockEncoding]: Checked pairs total: 50487 [2019-12-07 18:46:05,830 INFO L214 etLargeBlockEncoding]: Total number of compositions: 98 [2019-12-07 18:46:05,832 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 81 places, 94 transitions [2019-12-07 18:46:06,228 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 9480 states. [2019-12-07 18:46:06,230 INFO L276 IsEmpty]: Start isEmpty. Operand 9480 states. [2019-12-07 18:46:06,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 18:46:06,234 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:06,235 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 18:46:06,235 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:06,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:06,239 INFO L82 PathProgramCache]: Analyzing trace with hash 692929394, now seen corresponding path program 1 times [2019-12-07 18:46:06,245 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:06,245 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085708108] [2019-12-07 18:46:06,245 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:06,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:06,389 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:06,389 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2085708108] [2019-12-07 18:46:06,390 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:06,390 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:46:06,391 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [874323085] [2019-12-07 18:46:06,394 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:46:06,394 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:06,403 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:46:06,404 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:06,405 INFO L87 Difference]: Start difference. First operand 9480 states. Second operand 3 states. [2019-12-07 18:46:06,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:06,621 INFO L93 Difference]: Finished difference Result 9416 states and 31128 transitions. [2019-12-07 18:46:06,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:46:06,623 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 18:46:06,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:06,690 INFO L225 Difference]: With dead ends: 9416 [2019-12-07 18:46:06,690 INFO L226 Difference]: Without dead ends: 9234 [2019-12-07 18:46:06,691 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:06,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9234 states. [2019-12-07 18:46:06,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9234 to 9234. [2019-12-07 18:46:06,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9234 states. [2019-12-07 18:46:06,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9234 states to 9234 states and 30568 transitions. [2019-12-07 18:46:06,986 INFO L78 Accepts]: Start accepts. Automaton has 9234 states and 30568 transitions. Word has length 5 [2019-12-07 18:46:06,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:06,987 INFO L462 AbstractCegarLoop]: Abstraction has 9234 states and 30568 transitions. [2019-12-07 18:46:06,987 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:46:06,987 INFO L276 IsEmpty]: Start isEmpty. Operand 9234 states and 30568 transitions. [2019-12-07 18:46:06,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:46:06,989 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:06,989 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:06,989 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:06,989 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:06,989 INFO L82 PathProgramCache]: Analyzing trace with hash 1820083367, now seen corresponding path program 1 times [2019-12-07 18:46:06,989 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:06,990 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1640279775] [2019-12-07 18:46:06,990 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:07,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:07,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:07,060 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1640279775] [2019-12-07 18:46:07,060 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:07,060 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:07,061 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1857312235] [2019-12-07 18:46:07,061 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:46:07,062 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:07,062 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:46:07,062 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:07,062 INFO L87 Difference]: Start difference. First operand 9234 states and 30568 transitions. Second operand 4 states. [2019-12-07 18:46:07,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:07,345 INFO L93 Difference]: Finished difference Result 14362 states and 45554 transitions. [2019-12-07 18:46:07,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:46:07,346 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:46:07,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:07,398 INFO L225 Difference]: With dead ends: 14362 [2019-12-07 18:46:07,398 INFO L226 Difference]: Without dead ends: 14355 [2019-12-07 18:46:07,399 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:07,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14355 states. [2019-12-07 18:46:07,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14355 to 13038. [2019-12-07 18:46:07,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13038 states. [2019-12-07 18:46:07,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13038 states to 13038 states and 41962 transitions. [2019-12-07 18:46:07,720 INFO L78 Accepts]: Start accepts. Automaton has 13038 states and 41962 transitions. Word has length 11 [2019-12-07 18:46:07,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:07,720 INFO L462 AbstractCegarLoop]: Abstraction has 13038 states and 41962 transitions. [2019-12-07 18:46:07,720 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:46:07,721 INFO L276 IsEmpty]: Start isEmpty. Operand 13038 states and 41962 transitions. [2019-12-07 18:46:07,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:46:07,724 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:07,724 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:07,724 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:07,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:07,724 INFO L82 PathProgramCache]: Analyzing trace with hash 417951775, now seen corresponding path program 1 times [2019-12-07 18:46:07,724 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:07,725 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1390858776] [2019-12-07 18:46:07,725 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:07,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:07,791 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:07,791 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1390858776] [2019-12-07 18:46:07,791 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:07,791 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:07,792 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2127144728] [2019-12-07 18:46:07,792 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:46:07,792 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:07,792 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:46:07,792 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:07,792 INFO L87 Difference]: Start difference. First operand 13038 states and 41962 transitions. Second operand 4 states. [2019-12-07 18:46:07,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:07,956 INFO L93 Difference]: Finished difference Result 16287 states and 51820 transitions. [2019-12-07 18:46:07,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:46:07,956 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:46:07,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:07,980 INFO L225 Difference]: With dead ends: 16287 [2019-12-07 18:46:07,980 INFO L226 Difference]: Without dead ends: 16287 [2019-12-07 18:46:07,980 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:08,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16287 states. [2019-12-07 18:46:08,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16287 to 14489. [2019-12-07 18:46:08,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14489 states. [2019-12-07 18:46:08,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14489 states to 14489 states and 46501 transitions. [2019-12-07 18:46:08,248 INFO L78 Accepts]: Start accepts. Automaton has 14489 states and 46501 transitions. Word has length 11 [2019-12-07 18:46:08,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:08,249 INFO L462 AbstractCegarLoop]: Abstraction has 14489 states and 46501 transitions. [2019-12-07 18:46:08,249 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:46:08,249 INFO L276 IsEmpty]: Start isEmpty. Operand 14489 states and 46501 transitions. [2019-12-07 18:46:08,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 18:46:08,252 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:08,252 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:08,253 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:08,253 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:08,253 INFO L82 PathProgramCache]: Analyzing trace with hash -692193900, now seen corresponding path program 1 times [2019-12-07 18:46:08,253 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:08,253 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [233006356] [2019-12-07 18:46:08,253 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:08,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:08,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:08,327 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [233006356] [2019-12-07 18:46:08,327 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:08,327 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:46:08,327 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1709664689] [2019-12-07 18:46:08,328 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:46:08,328 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:08,328 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:46:08,328 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:08,328 INFO L87 Difference]: Start difference. First operand 14489 states and 46501 transitions. Second operand 5 states. [2019-12-07 18:46:08,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:08,676 INFO L93 Difference]: Finished difference Result 19401 states and 60933 transitions. [2019-12-07 18:46:08,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:46:08,677 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2019-12-07 18:46:08,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:08,711 INFO L225 Difference]: With dead ends: 19401 [2019-12-07 18:46:08,712 INFO L226 Difference]: Without dead ends: 19394 [2019-12-07 18:46:08,712 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:46:08,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19394 states. [2019-12-07 18:46:08,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19394 to 14553. [2019-12-07 18:46:08,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14553 states. [2019-12-07 18:46:08,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14553 states to 14553 states and 46557 transitions. [2019-12-07 18:46:08,965 INFO L78 Accepts]: Start accepts. Automaton has 14553 states and 46557 transitions. Word has length 17 [2019-12-07 18:46:08,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:08,965 INFO L462 AbstractCegarLoop]: Abstraction has 14553 states and 46557 transitions. [2019-12-07 18:46:08,965 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:46:08,965 INFO L276 IsEmpty]: Start isEmpty. Operand 14553 states and 46557 transitions. [2019-12-07 18:46:08,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:46:08,974 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:08,974 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:08,974 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:08,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:08,974 INFO L82 PathProgramCache]: Analyzing trace with hash -372184069, now seen corresponding path program 1 times [2019-12-07 18:46:08,974 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:08,975 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725014540] [2019-12-07 18:46:08,975 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:08,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:09,002 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:09,003 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [725014540] [2019-12-07 18:46:09,003 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:09,003 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:46:09,003 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [687774893] [2019-12-07 18:46:09,004 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:46:09,004 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:09,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:46:09,004 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:09,004 INFO L87 Difference]: Start difference. First operand 14553 states and 46557 transitions. Second operand 3 states. [2019-12-07 18:46:09,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:09,078 INFO L93 Difference]: Finished difference Result 17314 states and 55741 transitions. [2019-12-07 18:46:09,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:46:09,079 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-12-07 18:46:09,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:09,101 INFO L225 Difference]: With dead ends: 17314 [2019-12-07 18:46:09,102 INFO L226 Difference]: Without dead ends: 17314 [2019-12-07 18:46:09,102 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:09,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17314 states. [2019-12-07 18:46:09,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17314 to 16349. [2019-12-07 18:46:09,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16349 states. [2019-12-07 18:46:09,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16349 states to 16349 states and 52865 transitions. [2019-12-07 18:46:09,381 INFO L78 Accepts]: Start accepts. Automaton has 16349 states and 52865 transitions. Word has length 25 [2019-12-07 18:46:09,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:09,382 INFO L462 AbstractCegarLoop]: Abstraction has 16349 states and 52865 transitions. [2019-12-07 18:46:09,382 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:46:09,382 INFO L276 IsEmpty]: Start isEmpty. Operand 16349 states and 52865 transitions. [2019-12-07 18:46:09,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:46:09,391 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:09,391 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:09,391 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:09,392 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:09,392 INFO L82 PathProgramCache]: Analyzing trace with hash -135048019, now seen corresponding path program 1 times [2019-12-07 18:46:09,392 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:09,392 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [665530235] [2019-12-07 18:46:09,392 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:09,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:09,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:09,453 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [665530235] [2019-12-07 18:46:09,453 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:09,454 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:46:09,454 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1392751933] [2019-12-07 18:46:09,454 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:46:09,454 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:09,455 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:46:09,455 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:09,455 INFO L87 Difference]: Start difference. First operand 16349 states and 52865 transitions. Second operand 5 states. [2019-12-07 18:46:09,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:09,695 INFO L93 Difference]: Finished difference Result 20609 states and 65206 transitions. [2019-12-07 18:46:09,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:46:09,695 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 18:46:09,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:09,722 INFO L225 Difference]: With dead ends: 20609 [2019-12-07 18:46:09,722 INFO L226 Difference]: Without dead ends: 20601 [2019-12-07 18:46:09,722 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:46:09,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20601 states. [2019-12-07 18:46:09,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20601 to 19106. [2019-12-07 18:46:09,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19106 states. [2019-12-07 18:46:10,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19106 states to 19106 states and 60988 transitions. [2019-12-07 18:46:10,005 INFO L78 Accepts]: Start accepts. Automaton has 19106 states and 60988 transitions. Word has length 25 [2019-12-07 18:46:10,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:10,005 INFO L462 AbstractCegarLoop]: Abstraction has 19106 states and 60988 transitions. [2019-12-07 18:46:10,005 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:46:10,005 INFO L276 IsEmpty]: Start isEmpty. Operand 19106 states and 60988 transitions. [2019-12-07 18:46:10,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:46:10,012 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:10,013 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:10,013 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:10,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:10,013 INFO L82 PathProgramCache]: Analyzing trace with hash -2094776440, now seen corresponding path program 1 times [2019-12-07 18:46:10,013 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:10,013 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1518667170] [2019-12-07 18:46:10,013 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:10,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:10,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:10,087 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1518667170] [2019-12-07 18:46:10,087 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:10,087 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:46:10,087 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1682684053] [2019-12-07 18:46:10,088 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:46:10,088 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:10,088 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:46:10,088 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:46:10,088 INFO L87 Difference]: Start difference. First operand 19106 states and 60988 transitions. Second operand 6 states. [2019-12-07 18:46:10,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:10,375 INFO L93 Difference]: Finished difference Result 22065 states and 69926 transitions. [2019-12-07 18:46:10,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:46:10,375 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2019-12-07 18:46:10,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:10,406 INFO L225 Difference]: With dead ends: 22065 [2019-12-07 18:46:10,406 INFO L226 Difference]: Without dead ends: 22057 [2019-12-07 18:46:10,407 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:46:10,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22057 states. [2019-12-07 18:46:10,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22057 to 19440. [2019-12-07 18:46:10,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19440 states. [2019-12-07 18:46:10,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19440 states to 19440 states and 62185 transitions. [2019-12-07 18:46:10,742 INFO L78 Accepts]: Start accepts. Automaton has 19440 states and 62185 transitions. Word has length 25 [2019-12-07 18:46:10,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:10,742 INFO L462 AbstractCegarLoop]: Abstraction has 19440 states and 62185 transitions. [2019-12-07 18:46:10,742 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:46:10,742 INFO L276 IsEmpty]: Start isEmpty. Operand 19440 states and 62185 transitions. [2019-12-07 18:46:10,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 18:46:10,754 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:10,755 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:10,755 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:10,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:10,755 INFO L82 PathProgramCache]: Analyzing trace with hash 37923170, now seen corresponding path program 1 times [2019-12-07 18:46:10,755 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:10,755 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [633606262] [2019-12-07 18:46:10,755 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:10,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:10,779 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:10,780 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [633606262] [2019-12-07 18:46:10,780 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:10,780 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:10,780 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1372458080] [2019-12-07 18:46:10,780 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:46:10,780 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:10,780 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:46:10,781 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:10,781 INFO L87 Difference]: Start difference. First operand 19440 states and 62185 transitions. Second operand 3 states. [2019-12-07 18:46:10,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:10,788 INFO L93 Difference]: Finished difference Result 2214 states and 5072 transitions. [2019-12-07 18:46:10,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:46:10,789 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 31 [2019-12-07 18:46:10,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:10,791 INFO L225 Difference]: With dead ends: 2214 [2019-12-07 18:46:10,791 INFO L226 Difference]: Without dead ends: 2214 [2019-12-07 18:46:10,791 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:10,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2214 states. [2019-12-07 18:46:10,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2214 to 2214. [2019-12-07 18:46:10,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2214 states. [2019-12-07 18:46:10,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2214 states to 2214 states and 5072 transitions. [2019-12-07 18:46:10,809 INFO L78 Accepts]: Start accepts. Automaton has 2214 states and 5072 transitions. Word has length 31 [2019-12-07 18:46:10,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:10,809 INFO L462 AbstractCegarLoop]: Abstraction has 2214 states and 5072 transitions. [2019-12-07 18:46:10,810 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:46:10,810 INFO L276 IsEmpty]: Start isEmpty. Operand 2214 states and 5072 transitions. [2019-12-07 18:46:10,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 18:46:10,811 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:10,812 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:10,812 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:10,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:10,812 INFO L82 PathProgramCache]: Analyzing trace with hash 652265019, now seen corresponding path program 1 times [2019-12-07 18:46:10,812 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:10,812 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [593075551] [2019-12-07 18:46:10,812 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:10,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:10,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:10,844 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [593075551] [2019-12-07 18:46:10,844 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:10,844 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:46:10,844 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1060675882] [2019-12-07 18:46:10,845 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:46:10,845 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:10,845 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:46:10,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:10,845 INFO L87 Difference]: Start difference. First operand 2214 states and 5072 transitions. Second operand 4 states. [2019-12-07 18:46:10,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:10,854 INFO L93 Difference]: Finished difference Result 397 states and 723 transitions. [2019-12-07 18:46:10,855 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:46:10,855 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2019-12-07 18:46:10,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:10,855 INFO L225 Difference]: With dead ends: 397 [2019-12-07 18:46:10,855 INFO L226 Difference]: Without dead ends: 397 [2019-12-07 18:46:10,856 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:10,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states. [2019-12-07 18:46:10,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 362. [2019-12-07 18:46:10,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 362 states. [2019-12-07 18:46:10,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 362 states to 362 states and 658 transitions. [2019-12-07 18:46:10,859 INFO L78 Accepts]: Start accepts. Automaton has 362 states and 658 transitions. Word has length 37 [2019-12-07 18:46:10,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:10,859 INFO L462 AbstractCegarLoop]: Abstraction has 362 states and 658 transitions. [2019-12-07 18:46:10,859 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:46:10,859 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states and 658 transitions. [2019-12-07 18:46:10,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:46:10,860 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:10,860 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:10,860 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:10,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:10,860 INFO L82 PathProgramCache]: Analyzing trace with hash 112676449, now seen corresponding path program 1 times [2019-12-07 18:46:10,860 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:10,860 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [176403880] [2019-12-07 18:46:10,860 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:10,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:10,891 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:10,891 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [176403880] [2019-12-07 18:46:10,891 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:10,892 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:46:10,892 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625009936] [2019-12-07 18:46:10,892 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:46:10,892 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:10,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:46:10,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:10,892 INFO L87 Difference]: Start difference. First operand 362 states and 658 transitions. Second operand 3 states. [2019-12-07 18:46:10,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:10,922 INFO L93 Difference]: Finished difference Result 366 states and 650 transitions. [2019-12-07 18:46:10,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:46:10,923 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-12-07 18:46:10,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:10,923 INFO L225 Difference]: With dead ends: 366 [2019-12-07 18:46:10,923 INFO L226 Difference]: Without dead ends: 366 [2019-12-07 18:46:10,924 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:10,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states. [2019-12-07 18:46:10,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 358. [2019-12-07 18:46:10,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 358 states. [2019-12-07 18:46:10,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 358 states to 358 states and 642 transitions. [2019-12-07 18:46:10,928 INFO L78 Accepts]: Start accepts. Automaton has 358 states and 642 transitions. Word has length 52 [2019-12-07 18:46:10,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:10,928 INFO L462 AbstractCegarLoop]: Abstraction has 358 states and 642 transitions. [2019-12-07 18:46:10,928 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:46:10,928 INFO L276 IsEmpty]: Start isEmpty. Operand 358 states and 642 transitions. [2019-12-07 18:46:10,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:46:10,929 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:10,929 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:10,929 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:10,930 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:10,930 INFO L82 PathProgramCache]: Analyzing trace with hash 107384222, now seen corresponding path program 1 times [2019-12-07 18:46:10,930 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:10,930 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [82089846] [2019-12-07 18:46:10,930 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:10,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:10,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:10,991 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [82089846] [2019-12-07 18:46:10,991 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:10,991 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:46:10,991 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [314327570] [2019-12-07 18:46:10,991 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:46:10,991 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:10,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:46:10,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:10,992 INFO L87 Difference]: Start difference. First operand 358 states and 642 transitions. Second operand 5 states. [2019-12-07 18:46:11,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:11,129 INFO L93 Difference]: Finished difference Result 492 states and 884 transitions. [2019-12-07 18:46:11,129 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:46:11,129 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-12-07 18:46:11,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:11,130 INFO L225 Difference]: With dead ends: 492 [2019-12-07 18:46:11,130 INFO L226 Difference]: Without dead ends: 492 [2019-12-07 18:46:11,130 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:46:11,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 492 states. [2019-12-07 18:46:11,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 492 to 433. [2019-12-07 18:46:11,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 433 states. [2019-12-07 18:46:11,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 433 states to 433 states and 778 transitions. [2019-12-07 18:46:11,133 INFO L78 Accepts]: Start accepts. Automaton has 433 states and 778 transitions. Word has length 52 [2019-12-07 18:46:11,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:11,133 INFO L462 AbstractCegarLoop]: Abstraction has 433 states and 778 transitions. [2019-12-07 18:46:11,134 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:46:11,134 INFO L276 IsEmpty]: Start isEmpty. Operand 433 states and 778 transitions. [2019-12-07 18:46:11,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:46:11,134 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:11,134 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:11,134 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:11,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:11,135 INFO L82 PathProgramCache]: Analyzing trace with hash -2113386594, now seen corresponding path program 2 times [2019-12-07 18:46:11,135 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:11,135 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225038030] [2019-12-07 18:46:11,135 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:11,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:11,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:11,220 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [225038030] [2019-12-07 18:46:11,220 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:11,221 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:46:11,221 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [580159984] [2019-12-07 18:46:11,221 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:46:11,221 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:11,221 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:46:11,221 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:46:11,221 INFO L87 Difference]: Start difference. First operand 433 states and 778 transitions. Second operand 6 states. [2019-12-07 18:46:11,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:11,409 INFO L93 Difference]: Finished difference Result 528 states and 944 transitions. [2019-12-07 18:46:11,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:46:11,410 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-07 18:46:11,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:11,410 INFO L225 Difference]: With dead ends: 528 [2019-12-07 18:46:11,410 INFO L226 Difference]: Without dead ends: 528 [2019-12-07 18:46:11,411 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:46:11,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 528 states. [2019-12-07 18:46:11,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 528 to 468. [2019-12-07 18:46:11,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 468 states. [2019-12-07 18:46:11,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 468 states to 468 states and 843 transitions. [2019-12-07 18:46:11,414 INFO L78 Accepts]: Start accepts. Automaton has 468 states and 843 transitions. Word has length 52 [2019-12-07 18:46:11,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:11,415 INFO L462 AbstractCegarLoop]: Abstraction has 468 states and 843 transitions. [2019-12-07 18:46:11,415 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:46:11,415 INFO L276 IsEmpty]: Start isEmpty. Operand 468 states and 843 transitions. [2019-12-07 18:46:11,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:46:11,415 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:11,416 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:11,416 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:11,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:11,416 INFO L82 PathProgramCache]: Analyzing trace with hash -517730850, now seen corresponding path program 3 times [2019-12-07 18:46:11,416 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:11,416 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1035447041] [2019-12-07 18:46:11,416 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:11,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:11,476 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:11,476 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1035447041] [2019-12-07 18:46:11,476 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:11,476 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:46:11,476 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [624574809] [2019-12-07 18:46:11,477 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:46:11,477 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:11,477 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:46:11,477 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:46:11,477 INFO L87 Difference]: Start difference. First operand 468 states and 843 transitions. Second operand 6 states. [2019-12-07 18:46:11,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:11,673 INFO L93 Difference]: Finished difference Result 546 states and 945 transitions. [2019-12-07 18:46:11,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:46:11,673 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-07 18:46:11,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:11,674 INFO L225 Difference]: With dead ends: 546 [2019-12-07 18:46:11,674 INFO L226 Difference]: Without dead ends: 546 [2019-12-07 18:46:11,675 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:46:11,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 546 states. [2019-12-07 18:46:11,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 546 to 450. [2019-12-07 18:46:11,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 450 states. [2019-12-07 18:46:11,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 450 states to 450 states and 789 transitions. [2019-12-07 18:46:11,680 INFO L78 Accepts]: Start accepts. Automaton has 450 states and 789 transitions. Word has length 52 [2019-12-07 18:46:11,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:11,680 INFO L462 AbstractCegarLoop]: Abstraction has 450 states and 789 transitions. [2019-12-07 18:46:11,680 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:46:11,680 INFO L276 IsEmpty]: Start isEmpty. Operand 450 states and 789 transitions. [2019-12-07 18:46:11,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:46:11,681 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:11,681 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:11,681 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:11,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:11,682 INFO L82 PathProgramCache]: Analyzing trace with hash 936446688, now seen corresponding path program 4 times [2019-12-07 18:46:11,682 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:11,682 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [240585523] [2019-12-07 18:46:11,682 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:11,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:11,779 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:11,780 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [240585523] [2019-12-07 18:46:11,780 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:11,780 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:46:11,780 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [781489122] [2019-12-07 18:46:11,780 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:46:11,780 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:11,780 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:46:11,780 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:46:11,781 INFO L87 Difference]: Start difference. First operand 450 states and 789 transitions. Second operand 7 states. [2019-12-07 18:46:12,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:12,026 INFO L93 Difference]: Finished difference Result 644 states and 1120 transitions. [2019-12-07 18:46:12,026 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 18:46:12,026 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-12-07 18:46:12,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:12,027 INFO L225 Difference]: With dead ends: 644 [2019-12-07 18:46:12,027 INFO L226 Difference]: Without dead ends: 644 [2019-12-07 18:46:12,027 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:46:12,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 644 states. [2019-12-07 18:46:12,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 644 to 450. [2019-12-07 18:46:12,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 450 states. [2019-12-07 18:46:12,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 450 states to 450 states and 789 transitions. [2019-12-07 18:46:12,031 INFO L78 Accepts]: Start accepts. Automaton has 450 states and 789 transitions. Word has length 52 [2019-12-07 18:46:12,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:12,031 INFO L462 AbstractCegarLoop]: Abstraction has 450 states and 789 transitions. [2019-12-07 18:46:12,031 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:46:12,031 INFO L276 IsEmpty]: Start isEmpty. Operand 450 states and 789 transitions. [2019-12-07 18:46:12,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:46:12,031 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:12,032 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:12,032 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:12,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:12,032 INFO L82 PathProgramCache]: Analyzing trace with hash -1416640772, now seen corresponding path program 1 times [2019-12-07 18:46:12,032 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:12,032 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1433185627] [2019-12-07 18:46:12,032 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:12,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:12,169 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:12,169 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1433185627] [2019-12-07 18:46:12,169 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:12,169 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:46:12,170 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1177472056] [2019-12-07 18:46:12,170 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:46:12,170 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:12,170 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:46:12,170 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:46:12,170 INFO L87 Difference]: Start difference. First operand 450 states and 789 transitions. Second operand 9 states. [2019-12-07 18:46:12,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:12,683 INFO L93 Difference]: Finished difference Result 832 states and 1461 transitions. [2019-12-07 18:46:12,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 18:46:12,683 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 53 [2019-12-07 18:46:12,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:12,684 INFO L225 Difference]: With dead ends: 832 [2019-12-07 18:46:12,684 INFO L226 Difference]: Without dead ends: 832 [2019-12-07 18:46:12,684 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=222, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:46:12,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 832 states. [2019-12-07 18:46:12,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 832 to 450. [2019-12-07 18:46:12,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 450 states. [2019-12-07 18:46:12,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 450 states to 450 states and 796 transitions. [2019-12-07 18:46:12,688 INFO L78 Accepts]: Start accepts. Automaton has 450 states and 796 transitions. Word has length 53 [2019-12-07 18:46:12,688 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:12,688 INFO L462 AbstractCegarLoop]: Abstraction has 450 states and 796 transitions. [2019-12-07 18:46:12,688 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:46:12,688 INFO L276 IsEmpty]: Start isEmpty. Operand 450 states and 796 transitions. [2019-12-07 18:46:12,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:46:12,689 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:12,689 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:12,689 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:12,689 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:12,689 INFO L82 PathProgramCache]: Analyzing trace with hash -1073733746, now seen corresponding path program 2 times [2019-12-07 18:46:12,689 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:12,689 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1445407061] [2019-12-07 18:46:12,689 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:12,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:12,756 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:12,756 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1445407061] [2019-12-07 18:46:12,757 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:12,757 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:46:12,757 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1702454870] [2019-12-07 18:46:12,757 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:46:12,757 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:12,757 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:46:12,758 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:12,758 INFO L87 Difference]: Start difference. First operand 450 states and 796 transitions. Second operand 5 states. [2019-12-07 18:46:12,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:12,788 INFO L93 Difference]: Finished difference Result 705 states and 1240 transitions. [2019-12-07 18:46:12,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:46:12,788 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2019-12-07 18:46:12,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:12,789 INFO L225 Difference]: With dead ends: 705 [2019-12-07 18:46:12,789 INFO L226 Difference]: Without dead ends: 272 [2019-12-07 18:46:12,789 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:46:12,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272 states. [2019-12-07 18:46:12,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272 to 272. [2019-12-07 18:46:12,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 272 states. [2019-12-07 18:46:12,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 272 states to 272 states and 470 transitions. [2019-12-07 18:46:12,791 INFO L78 Accepts]: Start accepts. Automaton has 272 states and 470 transitions. Word has length 53 [2019-12-07 18:46:12,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:12,791 INFO L462 AbstractCegarLoop]: Abstraction has 272 states and 470 transitions. [2019-12-07 18:46:12,791 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:46:12,791 INFO L276 IsEmpty]: Start isEmpty. Operand 272 states and 470 transitions. [2019-12-07 18:46:12,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:46:12,792 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:12,792 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:12,792 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:12,792 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:12,792 INFO L82 PathProgramCache]: Analyzing trace with hash -1118119919, now seen corresponding path program 1 times [2019-12-07 18:46:12,792 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:12,792 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [193135139] [2019-12-07 18:46:12,792 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:12,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:12,831 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:12,831 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [193135139] [2019-12-07 18:46:12,831 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:12,831 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:12,831 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1103901583] [2019-12-07 18:46:12,832 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:46:12,832 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:12,832 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:46:12,832 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:12,832 INFO L87 Difference]: Start difference. First operand 272 states and 470 transitions. Second operand 3 states. [2019-12-07 18:46:12,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:12,839 INFO L93 Difference]: Finished difference Result 247 states and 418 transitions. [2019-12-07 18:46:12,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:46:12,840 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 18:46:12,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:12,840 INFO L225 Difference]: With dead ends: 247 [2019-12-07 18:46:12,840 INFO L226 Difference]: Without dead ends: 247 [2019-12-07 18:46:12,841 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:12,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states. [2019-12-07 18:46:12,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 247. [2019-12-07 18:46:12,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2019-12-07 18:46:12,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 418 transitions. [2019-12-07 18:46:12,843 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 418 transitions. Word has length 53 [2019-12-07 18:46:12,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:12,844 INFO L462 AbstractCegarLoop]: Abstraction has 247 states and 418 transitions. [2019-12-07 18:46:12,844 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:46:12,844 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 418 transitions. [2019-12-07 18:46:12,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:46:12,844 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:12,845 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:12,845 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:12,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:12,845 INFO L82 PathProgramCache]: Analyzing trace with hash 175082296, now seen corresponding path program 3 times [2019-12-07 18:46:12,845 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:12,845 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1800398963] [2019-12-07 18:46:12,846 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:12,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:12,880 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:12,881 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1800398963] [2019-12-07 18:46:12,881 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:12,881 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:12,881 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1553653424] [2019-12-07 18:46:12,881 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:46:12,881 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:12,882 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:46:12,882 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:12,882 INFO L87 Difference]: Start difference. First operand 247 states and 418 transitions. Second operand 3 states. [2019-12-07 18:46:12,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:12,911 INFO L93 Difference]: Finished difference Result 246 states and 416 transitions. [2019-12-07 18:46:12,911 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:46:12,911 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 18:46:12,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:12,912 INFO L225 Difference]: With dead ends: 246 [2019-12-07 18:46:12,912 INFO L226 Difference]: Without dead ends: 246 [2019-12-07 18:46:12,912 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:12,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2019-12-07 18:46:12,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 197. [2019-12-07 18:46:12,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2019-12-07 18:46:12,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 332 transitions. [2019-12-07 18:46:12,914 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 332 transitions. Word has length 53 [2019-12-07 18:46:12,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:12,914 INFO L462 AbstractCegarLoop]: Abstraction has 197 states and 332 transitions. [2019-12-07 18:46:12,914 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:46:12,914 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 332 transitions. [2019-12-07 18:46:12,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 18:46:12,915 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:12,915 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:12,915 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:12,915 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:12,915 INFO L82 PathProgramCache]: Analyzing trace with hash -1455781027, now seen corresponding path program 1 times [2019-12-07 18:46:12,915 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:12,916 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [883555664] [2019-12-07 18:46:12,916 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:12,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:46:12,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:46:12,972 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:46:12,972 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:46:12,974 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] ULTIMATE.startENTRY-->L787: Formula: (let ((.cse0 (store |v_#valid_48| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= 0 v_~x~0_169) (= 0 v_~x$read_delayed_var~0.offset_6) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1591~0.base_19|) (= |v_#NULL.offset_7| 0) (= v_~x$r_buff1_thd2~0_98 0) (= |v_ULTIMATE.start_main_~#t1591~0.offset_14| 0) (= 0 v_~__unbuffered_cnt~0_67) (= v_~main$tmp_guard1~0_21 0) (= |v_#valid_46| (store .cse0 |v_ULTIMATE.start_main_~#t1591~0.base_19| 1)) (= 0 v_~x$w_buff1_used~0_304) (= v_~x$r_buff0_thd0~0_295 0) (= 0 v_~x$r_buff0_thd2~0_162) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~x$read_delayed~0_6) (= v_~y~0_104 0) (= v_~__unbuffered_p1_EBX~0_62 0) (= v_~x$mem_tmp~0_16 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1591~0.base_19| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1591~0.base_19|) |v_ULTIMATE.start_main_~#t1591~0.offset_14| 0)) |v_#memory_int_17|) (= v_~x$flush_delayed~0_31 0) (= 0 v_~weak$$choice2~0_83) (= 0 v_~weak$$choice0~0_11) (= 0 v_~__unbuffered_p1_EAX~0_62) (= 0 |v_#NULL.base_7|) (= 0 v_~x$w_buff1~0_172) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1591~0.base_19| 4) |v_#length_17|) (= v_~main$tmp_guard0~0_26 0) (= v_~x$r_buff1_thd1~0_135 0) (= v_~x$r_buff0_thd1~0_120 0) (= 0 v_~x$w_buff0~0_199) (= v_~x$r_buff1_thd0~0_177 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1591~0.base_19|)) (= 0 v_~x$w_buff0_used~0_556))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_199, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_30|, ~x$flush_delayed~0=v_~x$flush_delayed~0_31, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_135, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_32|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_25|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_30|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_62, ULTIMATE.start_main_~#t1592~0.base=|v_ULTIMATE.start_main_~#t1592~0.base_17|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1592~0.offset=|v_ULTIMATE.start_main_~#t1592~0.offset_14|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_295, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_31|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_15|, ~x$w_buff1~0=v_~x$w_buff1~0_172, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_23|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_304, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_98, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_34|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_11, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, ~x~0=v_~x~0_169, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_120, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_19|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_32|, ~x$mem_tmp~0=v_~x$mem_tmp~0_16, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_37|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_30|, ULTIMATE.start_main_~#t1591~0.base=|v_ULTIMATE.start_main_~#t1591~0.base_19|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_28|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ~y~0=v_~y~0_104, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_62, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_37|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_15|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_23|, ULTIMATE.start_main_~#t1591~0.offset=|v_ULTIMATE.start_main_~#t1591~0.offset_14|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_32|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_26|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_177, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_23|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_28|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_556, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_28|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_23|, ~weak$$choice2~0=v_~weak$$choice2~0_83, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t1592~0.base, #length, ULTIMATE.start_main_~#t1592~0.offset, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t1591~0.base, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_~#t1591~0.offset, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 18:46:12,975 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L787-1-->L789: Formula: (and (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1592~0.base_10|)) (not (= |v_ULTIMATE.start_main_~#t1592~0.base_10| 0)) (= |v_#valid_23| (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1592~0.base_10| 1)) (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t1592~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t1592~0.offset_9|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1592~0.base_10| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1592~0.base_10|) |v_ULTIMATE.start_main_~#t1592~0.offset_9| 1))) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t1592~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_10|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t1592~0.base=|v_ULTIMATE.start_main_~#t1592~0.base_10|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_3|, ULTIMATE.start_main_~#t1592~0.offset=|v_ULTIMATE.start_main_~#t1592~0.offset_9|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1592~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1592~0.offset, #length] because there is no mapped edge [2019-12-07 18:46:12,975 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L4-->L764: Formula: (and (= 1 ~x$r_buff0_thd2~0_Out-2145487382) (= ~__unbuffered_p1_EBX~0_Out-2145487382 ~y~0_Out-2145487382) (= ~x$r_buff1_thd0~0_Out-2145487382 ~x$r_buff0_thd0~0_In-2145487382) (= ~__unbuffered_p1_EAX~0_Out-2145487382 ~y~0_Out-2145487382) (not (= 0 P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-2145487382)) (= ~x$r_buff0_thd2~0_In-2145487382 ~x$r_buff1_thd2~0_Out-2145487382) (= 1 ~y~0_Out-2145487382) (= ~x$r_buff1_thd1~0_Out-2145487382 ~x$r_buff0_thd1~0_In-2145487382)) InVars {P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-2145487382, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2145487382, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2145487382, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2145487382} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-2145487382, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2145487382, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2145487382, ~__unbuffered_p1_EBX~0=~__unbuffered_p1_EBX~0_Out-2145487382, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_Out-2145487382, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_Out-2145487382, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_Out-2145487382, ~y~0=~y~0_Out-2145487382, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-2145487382, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out-2145487382} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~__unbuffered_p1_EAX~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~y~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 18:46:12,976 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L730-2-->L730-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In1179349087 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd1~0_In1179349087 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite3_Out1179349087| ~x~0_In1179349087)) (and (not .cse1) (= |P0Thread1of1ForFork0_#t~ite3_Out1179349087| ~x$w_buff1~0_In1179349087) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1179349087, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1179349087, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1179349087, ~x~0=~x~0_In1179349087} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out1179349087|, ~x$w_buff1~0=~x$w_buff1~0_In1179349087, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1179349087, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1179349087, ~x~0=~x~0_In1179349087} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3] because there is no mapped edge [2019-12-07 18:46:12,976 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [587] [587] L730-4-->L731: Formula: (= v_~x~0_20 |v_P0Thread1of1ForFork0_#t~ite3_14|) InVars {P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_14|} OutVars{P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_13|, P0Thread1of1ForFork0_#t~ite4=|v_P0Thread1of1ForFork0_#t~ite4_5|, ~x~0=v_~x~0_20} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4, ~x~0] because there is no mapped edge [2019-12-07 18:46:12,976 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L731-->L731-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In756775050 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In756775050 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out756775050| 0)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out756775050| ~x$w_buff0_used~0_In756775050) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In756775050, ~x$w_buff0_used~0=~x$w_buff0_used~0_In756775050} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out756775050|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In756775050, ~x$w_buff0_used~0=~x$w_buff0_used~0_In756775050} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:46:12,976 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L732-->L732-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1008163517 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1008163517 256))) (.cse3 (= (mod ~x$r_buff1_thd1~0_In1008163517 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1008163517 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out1008163517| 0)) (and (= ~x$w_buff1_used~0_In1008163517 |P0Thread1of1ForFork0_#t~ite6_Out1008163517|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1008163517, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1008163517, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1008163517, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1008163517} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1008163517|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1008163517, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1008163517, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1008163517, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1008163517} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:46:12,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L733-->L733-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In1496389510 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd1~0_In1496389510 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite7_Out1496389510| 0) (not .cse1)) (and (= ~x$r_buff0_thd1~0_In1496389510 |P0Thread1of1ForFork0_#t~ite7_Out1496389510|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1496389510, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1496389510} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1496389510, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1496389510|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1496389510} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 18:46:12,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L765-->L765-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In1405101165 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1405101165 256)))) (or (and (= ~x$w_buff0_used~0_In1405101165 |P1Thread1of1ForFork1_#t~ite11_Out1405101165|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out1405101165|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1405101165, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1405101165} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1405101165|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1405101165, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1405101165} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 18:46:12,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L766-->L766-2: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In759781224 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In759781224 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In759781224 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In759781224 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out759781224| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$w_buff1_used~0_In759781224 |P1Thread1of1ForFork1_#t~ite12_Out759781224|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In759781224, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In759781224, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In759781224, ~x$w_buff0_used~0=~x$w_buff0_used~0_In759781224} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In759781224, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In759781224, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out759781224|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In759781224, ~x$w_buff0_used~0=~x$w_buff0_used~0_In759781224} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 18:46:12,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L767-->L768: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-859186071 256))) (.cse1 (= ~x$r_buff0_thd2~0_In-859186071 ~x$r_buff0_thd2~0_Out-859186071)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-859186071 256)))) (or (and .cse0 .cse1) (and (= 0 ~x$r_buff0_thd2~0_Out-859186071) (not .cse2) (not .cse0)) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-859186071, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-859186071} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-859186071|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-859186071, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-859186071} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 18:46:12,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [662] [662] L768-->L768-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1502647735 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-1502647735 256))) (.cse3 (= (mod ~x$r_buff0_thd2~0_In-1502647735 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1502647735 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd2~0_In-1502647735 |P1Thread1of1ForFork1_#t~ite14_Out-1502647735|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-1502647735|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1502647735, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1502647735, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1502647735, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1502647735} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1502647735, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1502647735, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1502647735, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1502647735|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1502647735} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 18:46:12,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L768-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork1_#t~ite14_32|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_32|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_31|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:46:12,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L734-->L734-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In660635871 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd1~0_In660635871 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In660635871 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In660635871 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out660635871| 0)) (and (= ~x$r_buff1_thd1~0_In660635871 |P0Thread1of1ForFork0_#t~ite8_Out660635871|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In660635871, ~x$w_buff1_used~0=~x$w_buff1_used~0_In660635871, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In660635871, ~x$w_buff0_used~0=~x$w_buff0_used~0_In660635871} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In660635871, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out660635871|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In660635871, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In660635871, ~x$w_buff0_used~0=~x$w_buff0_used~0_In660635871} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:46:12,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L734-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_94 |v_P0Thread1of1ForFork0_#t~ite8_32|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_31|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_94} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 18:46:12,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [591] [591] L789-1-->L795: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 2 v_~__unbuffered_cnt~0_15) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:46:12,979 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L795-2-->L795-4: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd0~0_In1826838057 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1826838057 256)))) (or (and (= |ULTIMATE.start_main_#t~ite17_Out1826838057| ~x$w_buff1~0_In1826838057) (not .cse0) (not .cse1)) (and (= ~x~0_In1826838057 |ULTIMATE.start_main_#t~ite17_Out1826838057|) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1826838057, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1826838057, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1826838057, ~x~0=~x~0_In1826838057} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out1826838057|, ~x$w_buff1~0=~x$w_buff1~0_In1826838057, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1826838057, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1826838057, ~x~0=~x~0_In1826838057} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 18:46:12,979 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [624] [624] L795-4-->L796: Formula: (= v_~x~0_42 |v_ULTIMATE.start_main_#t~ite17_11|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_11|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_10|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_6|, ~x~0=v_~x~0_42} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~x~0] because there is no mapped edge [2019-12-07 18:46:12,979 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L796-->L796-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1818964172 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-1818964172 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite19_Out-1818964172| 0)) (and (= |ULTIMATE.start_main_#t~ite19_Out-1818964172| ~x$w_buff0_used~0_In-1818964172) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1818964172, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1818964172} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1818964172, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1818964172|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1818964172} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 18:46:12,979 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L797-->L797-2: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd0~0_In677267826 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In677267826 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In677267826 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In677267826 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite20_Out677267826| ~x$w_buff1_used~0_In677267826)) (and (= 0 |ULTIMATE.start_main_#t~ite20_Out677267826|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In677267826, ~x$w_buff1_used~0=~x$w_buff1_used~0_In677267826, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In677267826, ~x$w_buff0_used~0=~x$w_buff0_used~0_In677267826} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In677267826, ~x$w_buff1_used~0=~x$w_buff1_used~0_In677267826, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out677267826|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In677267826, ~x$w_buff0_used~0=~x$w_buff0_used~0_In677267826} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 18:46:12,979 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-54903301 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-54903301 256)))) (or (and (= ~x$r_buff0_thd0~0_In-54903301 |ULTIMATE.start_main_#t~ite21_Out-54903301|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out-54903301|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-54903301, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-54903301} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-54903301, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-54903301|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-54903301} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 18:46:12,980 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1610601182 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In1610601182 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In1610601182 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1610601182 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite22_Out1610601182|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~x$r_buff1_thd0~0_In1610601182 |ULTIMATE.start_main_#t~ite22_Out1610601182|) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1610601182, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1610601182, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1610601182, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1610601182} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1610601182, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1610601182, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1610601182, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1610601182|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1610601182} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 18:46:12,982 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L811-->L812: Formula: (and (not (= (mod v_~weak$$choice2~0_40 256) 0)) (= v_~x$r_buff0_thd0~0_150 v_~x$r_buff0_thd0~0_151)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_151, ~weak$$choice2~0=v_~weak$$choice2~0_40} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_150, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_14|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_11|, ~weak$$choice2~0=v_~weak$$choice2~0_40} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 18:46:12,982 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L814-->L817-1: Formula: (and (= v_~x$mem_tmp~0_10 v_~x~0_111) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7| (mod v_~main$tmp_guard1~0_11 256)) (not (= 0 (mod v_~x$flush_delayed~0_20 256))) (= v_~x$flush_delayed~0_19 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_19, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_111, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_16|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:46:12,982 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [670] [670] L817-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:46:13,028 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:46:13 BasicIcfg [2019-12-07 18:46:13,029 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:46:13,029 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:46:13,029 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:46:13,029 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:46:13,029 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:46:03" (3/4) ... [2019-12-07 18:46:13,031 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:46:13,031 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] ULTIMATE.startENTRY-->L787: Formula: (let ((.cse0 (store |v_#valid_48| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= 0 v_~x~0_169) (= 0 v_~x$read_delayed_var~0.offset_6) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1591~0.base_19|) (= |v_#NULL.offset_7| 0) (= v_~x$r_buff1_thd2~0_98 0) (= |v_ULTIMATE.start_main_~#t1591~0.offset_14| 0) (= 0 v_~__unbuffered_cnt~0_67) (= v_~main$tmp_guard1~0_21 0) (= |v_#valid_46| (store .cse0 |v_ULTIMATE.start_main_~#t1591~0.base_19| 1)) (= 0 v_~x$w_buff1_used~0_304) (= v_~x$r_buff0_thd0~0_295 0) (= 0 v_~x$r_buff0_thd2~0_162) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~x$read_delayed~0_6) (= v_~y~0_104 0) (= v_~__unbuffered_p1_EBX~0_62 0) (= v_~x$mem_tmp~0_16 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1591~0.base_19| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1591~0.base_19|) |v_ULTIMATE.start_main_~#t1591~0.offset_14| 0)) |v_#memory_int_17|) (= v_~x$flush_delayed~0_31 0) (= 0 v_~weak$$choice2~0_83) (= 0 v_~weak$$choice0~0_11) (= 0 v_~__unbuffered_p1_EAX~0_62) (= 0 |v_#NULL.base_7|) (= 0 v_~x$w_buff1~0_172) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1591~0.base_19| 4) |v_#length_17|) (= v_~main$tmp_guard0~0_26 0) (= v_~x$r_buff1_thd1~0_135 0) (= v_~x$r_buff0_thd1~0_120 0) (= 0 v_~x$w_buff0~0_199) (= v_~x$r_buff1_thd0~0_177 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1591~0.base_19|)) (= 0 v_~x$w_buff0_used~0_556))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_199, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_30|, ~x$flush_delayed~0=v_~x$flush_delayed~0_31, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_135, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_32|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_25|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_30|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_62, ULTIMATE.start_main_~#t1592~0.base=|v_ULTIMATE.start_main_~#t1592~0.base_17|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1592~0.offset=|v_ULTIMATE.start_main_~#t1592~0.offset_14|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_295, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_31|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_15|, ~x$w_buff1~0=v_~x$w_buff1~0_172, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_23|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_304, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_98, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_34|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_11, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, ~x~0=v_~x~0_169, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_120, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_19|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_32|, ~x$mem_tmp~0=v_~x$mem_tmp~0_16, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_37|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_30|, ULTIMATE.start_main_~#t1591~0.base=|v_ULTIMATE.start_main_~#t1591~0.base_19|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_28|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ~y~0=v_~y~0_104, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_62, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_37|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_15|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_23|, ULTIMATE.start_main_~#t1591~0.offset=|v_ULTIMATE.start_main_~#t1591~0.offset_14|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_32|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_26|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_177, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_23|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_28|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_556, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_28|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_23|, ~weak$$choice2~0=v_~weak$$choice2~0_83, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t1592~0.base, #length, ULTIMATE.start_main_~#t1592~0.offset, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t1591~0.base, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_~#t1591~0.offset, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 18:46:13,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L787-1-->L789: Formula: (and (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1592~0.base_10|)) (not (= |v_ULTIMATE.start_main_~#t1592~0.base_10| 0)) (= |v_#valid_23| (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1592~0.base_10| 1)) (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t1592~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t1592~0.offset_9|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1592~0.base_10| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1592~0.base_10|) |v_ULTIMATE.start_main_~#t1592~0.offset_9| 1))) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t1592~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_10|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t1592~0.base=|v_ULTIMATE.start_main_~#t1592~0.base_10|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_3|, ULTIMATE.start_main_~#t1592~0.offset=|v_ULTIMATE.start_main_~#t1592~0.offset_9|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1592~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1592~0.offset, #length] because there is no mapped edge [2019-12-07 18:46:13,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L4-->L764: Formula: (and (= 1 ~x$r_buff0_thd2~0_Out-2145487382) (= ~__unbuffered_p1_EBX~0_Out-2145487382 ~y~0_Out-2145487382) (= ~x$r_buff1_thd0~0_Out-2145487382 ~x$r_buff0_thd0~0_In-2145487382) (= ~__unbuffered_p1_EAX~0_Out-2145487382 ~y~0_Out-2145487382) (not (= 0 P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-2145487382)) (= ~x$r_buff0_thd2~0_In-2145487382 ~x$r_buff1_thd2~0_Out-2145487382) (= 1 ~y~0_Out-2145487382) (= ~x$r_buff1_thd1~0_Out-2145487382 ~x$r_buff0_thd1~0_In-2145487382)) InVars {P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-2145487382, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2145487382, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2145487382, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2145487382} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-2145487382, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2145487382, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2145487382, ~__unbuffered_p1_EBX~0=~__unbuffered_p1_EBX~0_Out-2145487382, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_Out-2145487382, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_Out-2145487382, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_Out-2145487382, ~y~0=~y~0_Out-2145487382, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-2145487382, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out-2145487382} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~__unbuffered_p1_EAX~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~y~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 18:46:13,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L730-2-->L730-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In1179349087 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd1~0_In1179349087 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite3_Out1179349087| ~x~0_In1179349087)) (and (not .cse1) (= |P0Thread1of1ForFork0_#t~ite3_Out1179349087| ~x$w_buff1~0_In1179349087) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1179349087, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1179349087, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1179349087, ~x~0=~x~0_In1179349087} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out1179349087|, ~x$w_buff1~0=~x$w_buff1~0_In1179349087, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1179349087, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1179349087, ~x~0=~x~0_In1179349087} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3] because there is no mapped edge [2019-12-07 18:46:13,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [587] [587] L730-4-->L731: Formula: (= v_~x~0_20 |v_P0Thread1of1ForFork0_#t~ite3_14|) InVars {P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_14|} OutVars{P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_13|, P0Thread1of1ForFork0_#t~ite4=|v_P0Thread1of1ForFork0_#t~ite4_5|, ~x~0=v_~x~0_20} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4, ~x~0] because there is no mapped edge [2019-12-07 18:46:13,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L731-->L731-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In756775050 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In756775050 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out756775050| 0)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out756775050| ~x$w_buff0_used~0_In756775050) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In756775050, ~x$w_buff0_used~0=~x$w_buff0_used~0_In756775050} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out756775050|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In756775050, ~x$w_buff0_used~0=~x$w_buff0_used~0_In756775050} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:46:13,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L732-->L732-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1008163517 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1008163517 256))) (.cse3 (= (mod ~x$r_buff1_thd1~0_In1008163517 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1008163517 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out1008163517| 0)) (and (= ~x$w_buff1_used~0_In1008163517 |P0Thread1of1ForFork0_#t~ite6_Out1008163517|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1008163517, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1008163517, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1008163517, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1008163517} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1008163517|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1008163517, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1008163517, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1008163517, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1008163517} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:46:13,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L733-->L733-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In1496389510 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd1~0_In1496389510 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite7_Out1496389510| 0) (not .cse1)) (and (= ~x$r_buff0_thd1~0_In1496389510 |P0Thread1of1ForFork0_#t~ite7_Out1496389510|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1496389510, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1496389510} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1496389510, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1496389510|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1496389510} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 18:46:13,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L765-->L765-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In1405101165 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1405101165 256)))) (or (and (= ~x$w_buff0_used~0_In1405101165 |P1Thread1of1ForFork1_#t~ite11_Out1405101165|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out1405101165|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1405101165, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1405101165} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1405101165|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1405101165, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1405101165} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 18:46:13,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L766-->L766-2: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In759781224 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In759781224 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In759781224 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In759781224 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out759781224| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$w_buff1_used~0_In759781224 |P1Thread1of1ForFork1_#t~ite12_Out759781224|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In759781224, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In759781224, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In759781224, ~x$w_buff0_used~0=~x$w_buff0_used~0_In759781224} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In759781224, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In759781224, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out759781224|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In759781224, ~x$w_buff0_used~0=~x$w_buff0_used~0_In759781224} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 18:46:13,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L767-->L768: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-859186071 256))) (.cse1 (= ~x$r_buff0_thd2~0_In-859186071 ~x$r_buff0_thd2~0_Out-859186071)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-859186071 256)))) (or (and .cse0 .cse1) (and (= 0 ~x$r_buff0_thd2~0_Out-859186071) (not .cse2) (not .cse0)) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-859186071, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-859186071} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-859186071|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-859186071, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-859186071} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 18:46:13,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [662] [662] L768-->L768-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1502647735 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-1502647735 256))) (.cse3 (= (mod ~x$r_buff0_thd2~0_In-1502647735 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1502647735 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd2~0_In-1502647735 |P1Thread1of1ForFork1_#t~ite14_Out-1502647735|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-1502647735|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1502647735, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1502647735, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1502647735, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1502647735} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1502647735, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1502647735, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1502647735, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1502647735|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1502647735} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 18:46:13,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L768-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork1_#t~ite14_32|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_32|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_31|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:46:13,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L734-->L734-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In660635871 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd1~0_In660635871 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In660635871 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In660635871 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out660635871| 0)) (and (= ~x$r_buff1_thd1~0_In660635871 |P0Thread1of1ForFork0_#t~ite8_Out660635871|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In660635871, ~x$w_buff1_used~0=~x$w_buff1_used~0_In660635871, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In660635871, ~x$w_buff0_used~0=~x$w_buff0_used~0_In660635871} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In660635871, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out660635871|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In660635871, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In660635871, ~x$w_buff0_used~0=~x$w_buff0_used~0_In660635871} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:46:13,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L734-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_94 |v_P0Thread1of1ForFork0_#t~ite8_32|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_31|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_94} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 18:46:13,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [591] [591] L789-1-->L795: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 2 v_~__unbuffered_cnt~0_15) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:46:13,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L795-2-->L795-4: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd0~0_In1826838057 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1826838057 256)))) (or (and (= |ULTIMATE.start_main_#t~ite17_Out1826838057| ~x$w_buff1~0_In1826838057) (not .cse0) (not .cse1)) (and (= ~x~0_In1826838057 |ULTIMATE.start_main_#t~ite17_Out1826838057|) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1826838057, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1826838057, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1826838057, ~x~0=~x~0_In1826838057} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out1826838057|, ~x$w_buff1~0=~x$w_buff1~0_In1826838057, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1826838057, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1826838057, ~x~0=~x~0_In1826838057} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 18:46:13,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [624] [624] L795-4-->L796: Formula: (= v_~x~0_42 |v_ULTIMATE.start_main_#t~ite17_11|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_11|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_10|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_6|, ~x~0=v_~x~0_42} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~x~0] because there is no mapped edge [2019-12-07 18:46:13,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L796-->L796-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1818964172 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-1818964172 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite19_Out-1818964172| 0)) (and (= |ULTIMATE.start_main_#t~ite19_Out-1818964172| ~x$w_buff0_used~0_In-1818964172) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1818964172, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1818964172} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1818964172, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1818964172|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1818964172} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 18:46:13,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L797-->L797-2: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd0~0_In677267826 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In677267826 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In677267826 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In677267826 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite20_Out677267826| ~x$w_buff1_used~0_In677267826)) (and (= 0 |ULTIMATE.start_main_#t~ite20_Out677267826|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In677267826, ~x$w_buff1_used~0=~x$w_buff1_used~0_In677267826, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In677267826, ~x$w_buff0_used~0=~x$w_buff0_used~0_In677267826} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In677267826, ~x$w_buff1_used~0=~x$w_buff1_used~0_In677267826, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out677267826|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In677267826, ~x$w_buff0_used~0=~x$w_buff0_used~0_In677267826} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 18:46:13,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-54903301 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-54903301 256)))) (or (and (= ~x$r_buff0_thd0~0_In-54903301 |ULTIMATE.start_main_#t~ite21_Out-54903301|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out-54903301|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-54903301, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-54903301} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-54903301, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-54903301|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-54903301} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 18:46:13,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1610601182 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In1610601182 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In1610601182 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1610601182 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite22_Out1610601182|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~x$r_buff1_thd0~0_In1610601182 |ULTIMATE.start_main_#t~ite22_Out1610601182|) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1610601182, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1610601182, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1610601182, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1610601182} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1610601182, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1610601182, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1610601182, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1610601182|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1610601182} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 18:46:13,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L811-->L812: Formula: (and (not (= (mod v_~weak$$choice2~0_40 256) 0)) (= v_~x$r_buff0_thd0~0_150 v_~x$r_buff0_thd0~0_151)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_151, ~weak$$choice2~0=v_~weak$$choice2~0_40} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_150, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_14|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_11|, ~weak$$choice2~0=v_~weak$$choice2~0_40} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 18:46:13,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L814-->L817-1: Formula: (and (= v_~x$mem_tmp~0_10 v_~x~0_111) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7| (mod v_~main$tmp_guard1~0_11 256)) (not (= 0 (mod v_~x$flush_delayed~0_20 256))) (= v_~x$flush_delayed~0_19 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_19, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_111, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_16|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:46:13,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [670] [670] L817-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:46:13,092 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_4fadefa3-4048-42c8-b0b1-5f3ace4b38a4/bin/uautomizer/witness.graphml [2019-12-07 18:46:13,092 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:46:13,093 INFO L168 Benchmark]: Toolchain (without parser) took 10801.87 ms. Allocated memory was 1.0 GB in the beginning and 1.7 GB in the end (delta: 656.9 MB). Free memory was 939.3 MB in the beginning and 1.4 GB in the end (delta: -429.0 MB). Peak memory consumption was 227.9 MB. Max. memory is 11.5 GB. [2019-12-07 18:46:13,093 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:46:13,094 INFO L168 Benchmark]: CACSL2BoogieTranslator took 385.26 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 86.0 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -112.9 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:46:13,094 INFO L168 Benchmark]: Boogie Procedure Inliner took 41.26 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:46:13,094 INFO L168 Benchmark]: Boogie Preprocessor took 25.69 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:46:13,094 INFO L168 Benchmark]: RCFGBuilder took 380.23 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 997.6 MB in the end (delta: 49.2 MB). Peak memory consumption was 49.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:46:13,095 INFO L168 Benchmark]: TraceAbstraction took 9903.18 ms. Allocated memory was 1.1 GB in the beginning and 1.7 GB in the end (delta: 570.9 MB). Free memory was 997.6 MB in the beginning and 1.4 GB in the end (delta: -391.4 MB). Peak memory consumption was 179.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:46:13,095 INFO L168 Benchmark]: Witness Printer took 62.92 ms. Allocated memory is still 1.7 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 20.7 MB). Peak memory consumption was 20.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:46:13,097 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 385.26 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 86.0 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -112.9 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 41.26 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.69 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 380.23 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 997.6 MB in the end (delta: 49.2 MB). Peak memory consumption was 49.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 9903.18 ms. Allocated memory was 1.1 GB in the beginning and 1.7 GB in the end (delta: 570.9 MB). Free memory was 997.6 MB in the beginning and 1.4 GB in the end (delta: -391.4 MB). Peak memory consumption was 179.6 MB. Max. memory is 11.5 GB. * Witness Printer took 62.92 ms. Allocated memory is still 1.7 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 20.7 MB). Peak memory consumption was 20.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.6s, 147 ProgramPointsBefore, 81 ProgramPointsAfterwards, 181 TransitionsBefore, 94 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 29 TrivialSequentialCompositions, 37 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 24 ChoiceCompositions, 3783 VarBasedMoverChecksPositive, 170 VarBasedMoverChecksNegative, 19 SemBasedMoverChecksPositive, 202 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 50487 CheckedPairsTotal, 98 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L787] FCALL, FORK 0 pthread_create(&t1591, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L789] FCALL, FORK 0 pthread_create(&t1592, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L744] 2 x$w_buff1 = x$w_buff0 [L745] 2 x$w_buff0 = 2 [L746] 2 x$w_buff1_used = x$w_buff0_used [L747] 2 x$w_buff0_used = (_Bool)1 [L724] 1 y = 2 [L727] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L730] 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L731] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L764] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L732] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L764] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L765] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L766] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L733] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L795] 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L797] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L798] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L799] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L802] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L803] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L804] 0 x$flush_delayed = weak$$choice2 [L805] 0 x$mem_tmp = x VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L806] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L806] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L807] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L807] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L808] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L808] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L809] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L809] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L810] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L810] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L812] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L812] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L813] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 141 locations, 2 error locations. Result: UNSAFE, OverallTime: 9.7s, OverallIterations: 19, TraceHistogramMax: 1, AutomataDifference: 3.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2238 SDtfs, 1368 SDslu, 4029 SDs, 0 SdLazy, 2713 SolverSat, 131 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 136 GetRequests, 33 SyntacticMatches, 22 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=19440occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.0s AutomataMinimizationTime, 18 MinimizatonAttempts, 13916 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 713 NumberOfCodeBlocks, 713 NumberOfCodeBlocksAsserted, 19 NumberOfCheckSat, 641 ConstructedInterpolants, 0 QuantifiedInterpolants, 80833 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 18 InterpolantComputations, 18 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...