./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi000_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_1169b1f1-32c2-4e21-a7c3-8d3f7556dc36/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_1169b1f1-32c2-4e21-a7c3-8d3f7556dc36/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_1169b1f1-32c2-4e21-a7c3-8d3f7556dc36/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_1169b1f1-32c2-4e21-a7c3-8d3f7556dc36/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi000_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_1169b1f1-32c2-4e21-a7c3-8d3f7556dc36/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_1169b1f1-32c2-4e21-a7c3-8d3f7556dc36/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a0dff34e947647ee1664b97ad9afbb19310f98b1 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:47:53,318 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:47:53,319 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:47:53,329 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:47:53,329 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:47:53,330 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:47:53,331 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:47:53,332 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:47:53,333 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:47:53,334 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:47:53,334 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:47:53,335 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:47:53,335 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:47:53,336 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:47:53,337 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:47:53,337 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:47:53,338 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:47:53,339 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:47:53,340 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:47:53,341 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:47:53,343 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:47:53,344 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:47:53,345 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:47:53,345 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:47:53,347 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:47:53,347 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:47:53,347 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:47:53,348 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:47:53,348 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:47:53,348 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:47:53,348 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:47:53,349 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:47:53,349 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:47:53,350 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:47:53,350 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:47:53,350 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:47:53,351 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:47:53,351 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:47:53,351 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:47:53,352 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:47:53,352 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:47:53,352 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_1169b1f1-32c2-4e21-a7c3-8d3f7556dc36/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 15:47:53,362 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:47:53,362 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:47:53,363 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 15:47:53,363 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 15:47:53,363 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 15:47:53,363 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:47:53,363 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:47:53,363 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:47:53,364 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:47:53,364 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:47:53,364 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:47:53,364 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:47:53,364 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:47:53,364 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:47:53,364 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:47:53,364 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:47:53,365 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:47:53,365 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:47:53,365 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 15:47:53,365 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:47:53,365 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:47:53,365 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:47:53,365 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:47:53,366 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:47:53,366 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:47:53,366 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 15:47:53,366 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:47:53,366 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:47:53,366 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:47:53,366 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_1169b1f1-32c2-4e21-a7c3-8d3f7556dc36/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a0dff34e947647ee1664b97ad9afbb19310f98b1 [2019-12-07 15:47:53,465 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:47:53,472 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:47:53,475 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:47:53,476 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:47:53,476 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:47:53,476 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_1169b1f1-32c2-4e21-a7c3-8d3f7556dc36/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/rfi000_rmo.opt.i [2019-12-07 15:47:53,512 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1169b1f1-32c2-4e21-a7c3-8d3f7556dc36/bin/uautomizer/data/4c2da721d/6dba7593799b49c58d4c42f2bc8dc7bd/FLAG249102e59 [2019-12-07 15:47:53,987 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:47:53,987 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_1169b1f1-32c2-4e21-a7c3-8d3f7556dc36/sv-benchmarks/c/pthread-wmm/rfi000_rmo.opt.i [2019-12-07 15:47:53,997 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1169b1f1-32c2-4e21-a7c3-8d3f7556dc36/bin/uautomizer/data/4c2da721d/6dba7593799b49c58d4c42f2bc8dc7bd/FLAG249102e59 [2019-12-07 15:47:54,006 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_1169b1f1-32c2-4e21-a7c3-8d3f7556dc36/bin/uautomizer/data/4c2da721d/6dba7593799b49c58d4c42f2bc8dc7bd [2019-12-07 15:47:54,008 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:47:54,009 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:47:54,010 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:47:54,010 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:47:54,012 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:47:54,013 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:47:54" (1/1) ... [2019-12-07 15:47:54,015 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:47:54, skipping insertion in model container [2019-12-07 15:47:54,015 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:47:54" (1/1) ... [2019-12-07 15:47:54,019 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:47:54,047 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:47:54,310 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:47:54,320 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:47:54,360 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:47:54,406 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:47:54,406 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:47:54 WrapperNode [2019-12-07 15:47:54,406 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:47:54,407 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:47:54,407 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:47:54,407 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:47:54,413 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:47:54" (1/1) ... [2019-12-07 15:47:54,426 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:47:54" (1/1) ... [2019-12-07 15:47:54,449 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:47:54,449 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:47:54,449 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:47:54,450 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:47:54,456 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:47:54" (1/1) ... [2019-12-07 15:47:54,456 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:47:54" (1/1) ... [2019-12-07 15:47:54,459 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:47:54" (1/1) ... [2019-12-07 15:47:54,460 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:47:54" (1/1) ... [2019-12-07 15:47:54,466 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:47:54" (1/1) ... [2019-12-07 15:47:54,468 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:47:54" (1/1) ... [2019-12-07 15:47:54,471 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:47:54" (1/1) ... [2019-12-07 15:47:54,474 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:47:54,474 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:47:54,474 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:47:54,474 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:47:54,475 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:47:54" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_1169b1f1-32c2-4e21-a7c3-8d3f7556dc36/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:47:54,514 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:47:54,514 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:47:54,515 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:47:54,515 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:47:54,515 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:47:54,515 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:47:54,515 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:47:54,515 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:47:54,515 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:47:54,515 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:47:54,515 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:47:54,516 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:47:54,846 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:47:54,847 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 15:47:54,848 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:47:54 BoogieIcfgContainer [2019-12-07 15:47:54,848 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:47:54,849 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:47:54,849 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:47:54,851 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:47:54,851 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:47:54" (1/3) ... [2019-12-07 15:47:54,852 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@190441fb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:47:54, skipping insertion in model container [2019-12-07 15:47:54,852 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:47:54" (2/3) ... [2019-12-07 15:47:54,852 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@190441fb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:47:54, skipping insertion in model container [2019-12-07 15:47:54,853 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:47:54" (3/3) ... [2019-12-07 15:47:54,854 INFO L109 eAbstractionObserver]: Analyzing ICFG rfi000_rmo.opt.i [2019-12-07 15:47:54,861 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:47:54,861 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:47:54,866 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 15:47:54,867 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:47:54,889 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,889 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,889 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,889 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,889 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,889 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,889 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,890 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,890 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,890 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,890 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,890 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,890 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,890 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,890 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,891 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,891 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,891 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,891 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,891 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,891 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,891 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,891 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,891 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,892 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,892 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,892 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,892 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,892 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,892 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,893 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,893 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,893 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,893 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,893 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,893 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,893 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,893 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,894 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,894 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,894 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,894 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,894 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,894 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,894 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,895 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,895 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,895 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,895 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,895 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,895 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,895 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,895 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,895 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,896 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,896 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,896 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,896 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,896 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,896 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,896 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,896 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,897 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,897 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:47:54,907 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 15:47:54,920 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:47:54,920 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:47:54,920 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:47:54,920 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:47:54,920 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:47:54,920 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:47:54,920 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:47:54,920 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:47:54,932 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 147 places, 181 transitions [2019-12-07 15:47:54,933 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 147 places, 181 transitions [2019-12-07 15:47:54,978 INFO L134 PetriNetUnfolder]: 41/179 cut-off events. [2019-12-07 15:47:54,978 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:47:54,986 INFO L76 FinitePrefix]: Finished finitePrefix Result has 186 conditions, 179 events. 41/179 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 465 event pairs. 6/142 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 15:47:54,997 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 147 places, 181 transitions [2019-12-07 15:47:55,020 INFO L134 PetriNetUnfolder]: 41/179 cut-off events. [2019-12-07 15:47:55,020 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:47:55,023 INFO L76 FinitePrefix]: Finished finitePrefix Result has 186 conditions, 179 events. 41/179 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 465 event pairs. 6/142 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 15:47:55,032 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-12-07 15:47:55,032 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:47:57,439 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 81 [2019-12-07 15:47:57,516 INFO L206 etLargeBlockEncoding]: Checked pairs total: 50487 [2019-12-07 15:47:57,516 INFO L214 etLargeBlockEncoding]: Total number of compositions: 98 [2019-12-07 15:47:57,519 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 81 places, 94 transitions [2019-12-07 15:47:57,872 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 9480 states. [2019-12-07 15:47:57,873 INFO L276 IsEmpty]: Start isEmpty. Operand 9480 states. [2019-12-07 15:47:57,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 15:47:57,877 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:57,878 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 15:47:57,878 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:57,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:57,882 INFO L82 PathProgramCache]: Analyzing trace with hash 692929394, now seen corresponding path program 1 times [2019-12-07 15:47:57,888 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:47:57,888 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1652778209] [2019-12-07 15:47:57,889 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:57,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:58,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:58,034 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1652778209] [2019-12-07 15:47:58,035 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:58,035 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:47:58,036 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2030842163] [2019-12-07 15:47:58,040 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:47:58,040 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:47:58,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:47:58,053 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:47:58,055 INFO L87 Difference]: Start difference. First operand 9480 states. Second operand 3 states. [2019-12-07 15:47:58,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:58,254 INFO L93 Difference]: Finished difference Result 9416 states and 31128 transitions. [2019-12-07 15:47:58,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:47:58,255 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 15:47:58,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:58,320 INFO L225 Difference]: With dead ends: 9416 [2019-12-07 15:47:58,320 INFO L226 Difference]: Without dead ends: 9234 [2019-12-07 15:47:58,321 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:47:58,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9234 states. [2019-12-07 15:47:58,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9234 to 9234. [2019-12-07 15:47:58,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9234 states. [2019-12-07 15:47:58,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9234 states to 9234 states and 30568 transitions. [2019-12-07 15:47:58,627 INFO L78 Accepts]: Start accepts. Automaton has 9234 states and 30568 transitions. Word has length 5 [2019-12-07 15:47:58,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:58,627 INFO L462 AbstractCegarLoop]: Abstraction has 9234 states and 30568 transitions. [2019-12-07 15:47:58,627 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:47:58,627 INFO L276 IsEmpty]: Start isEmpty. Operand 9234 states and 30568 transitions. [2019-12-07 15:47:58,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 15:47:58,629 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:58,629 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:58,629 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:58,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:58,630 INFO L82 PathProgramCache]: Analyzing trace with hash 1820083367, now seen corresponding path program 1 times [2019-12-07 15:47:58,630 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:47:58,630 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [775869544] [2019-12-07 15:47:58,630 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:58,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:58,696 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:58,696 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [775869544] [2019-12-07 15:47:58,696 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:58,696 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:47:58,697 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1315778243] [2019-12-07 15:47:58,697 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:47:58,698 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:47:58,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:47:58,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:47:58,698 INFO L87 Difference]: Start difference. First operand 9234 states and 30568 transitions. Second operand 4 states. [2019-12-07 15:47:58,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:58,979 INFO L93 Difference]: Finished difference Result 14362 states and 45554 transitions. [2019-12-07 15:47:58,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:47:58,980 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 15:47:58,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:59,032 INFO L225 Difference]: With dead ends: 14362 [2019-12-07 15:47:59,032 INFO L226 Difference]: Without dead ends: 14355 [2019-12-07 15:47:59,033 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:47:59,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14355 states. [2019-12-07 15:47:59,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14355 to 13038. [2019-12-07 15:47:59,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13038 states. [2019-12-07 15:47:59,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13038 states to 13038 states and 41962 transitions. [2019-12-07 15:47:59,364 INFO L78 Accepts]: Start accepts. Automaton has 13038 states and 41962 transitions. Word has length 11 [2019-12-07 15:47:59,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:59,364 INFO L462 AbstractCegarLoop]: Abstraction has 13038 states and 41962 transitions. [2019-12-07 15:47:59,364 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:47:59,364 INFO L276 IsEmpty]: Start isEmpty. Operand 13038 states and 41962 transitions. [2019-12-07 15:47:59,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 15:47:59,366 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:59,367 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:59,367 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:59,367 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:59,367 INFO L82 PathProgramCache]: Analyzing trace with hash 417951775, now seen corresponding path program 1 times [2019-12-07 15:47:59,367 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:47:59,367 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1261110543] [2019-12-07 15:47:59,367 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:59,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:59,401 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:59,402 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1261110543] [2019-12-07 15:47:59,402 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:59,402 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:47:59,402 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [801283540] [2019-12-07 15:47:59,402 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:47:59,402 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:47:59,403 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:47:59,403 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:47:59,403 INFO L87 Difference]: Start difference. First operand 13038 states and 41962 transitions. Second operand 3 states. [2019-12-07 15:47:59,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:59,414 INFO L93 Difference]: Finished difference Result 1778 states and 4038 transitions. [2019-12-07 15:47:59,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:47:59,414 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2019-12-07 15:47:59,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:59,418 INFO L225 Difference]: With dead ends: 1778 [2019-12-07 15:47:59,419 INFO L226 Difference]: Without dead ends: 1778 [2019-12-07 15:47:59,419 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:47:59,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1778 states. [2019-12-07 15:47:59,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1778 to 1778. [2019-12-07 15:47:59,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1778 states. [2019-12-07 15:47:59,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1778 states to 1778 states and 4038 transitions. [2019-12-07 15:47:59,454 INFO L78 Accepts]: Start accepts. Automaton has 1778 states and 4038 transitions. Word has length 11 [2019-12-07 15:47:59,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:59,455 INFO L462 AbstractCegarLoop]: Abstraction has 1778 states and 4038 transitions. [2019-12-07 15:47:59,455 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:47:59,455 INFO L276 IsEmpty]: Start isEmpty. Operand 1778 states and 4038 transitions. [2019-12-07 15:47:59,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 15:47:59,456 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:59,456 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:59,457 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:59,457 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:59,457 INFO L82 PathProgramCache]: Analyzing trace with hash -1954901459, now seen corresponding path program 1 times [2019-12-07 15:47:59,457 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:47:59,457 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [806018758] [2019-12-07 15:47:59,457 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:59,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:59,507 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:59,507 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [806018758] [2019-12-07 15:47:59,507 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:59,507 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:47:59,507 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1092243666] [2019-12-07 15:47:59,508 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:47:59,508 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:47:59,508 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:47:59,508 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:47:59,508 INFO L87 Difference]: Start difference. First operand 1778 states and 4038 transitions. Second operand 4 states. [2019-12-07 15:47:59,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:59,519 INFO L93 Difference]: Finished difference Result 371 states and 689 transitions. [2019-12-07 15:47:59,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:47:59,520 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2019-12-07 15:47:59,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:59,521 INFO L225 Difference]: With dead ends: 371 [2019-12-07 15:47:59,521 INFO L226 Difference]: Without dead ends: 371 [2019-12-07 15:47:59,521 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:47:59,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2019-12-07 15:47:59,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 336. [2019-12-07 15:47:59,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 336 states. [2019-12-07 15:47:59,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 336 states to 336 states and 624 transitions. [2019-12-07 15:47:59,525 INFO L78 Accepts]: Start accepts. Automaton has 336 states and 624 transitions. Word has length 23 [2019-12-07 15:47:59,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:59,526 INFO L462 AbstractCegarLoop]: Abstraction has 336 states and 624 transitions. [2019-12-07 15:47:59,526 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:47:59,526 INFO L276 IsEmpty]: Start isEmpty. Operand 336 states and 624 transitions. [2019-12-07 15:47:59,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 15:47:59,527 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:59,527 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:59,527 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:59,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:59,528 INFO L82 PathProgramCache]: Analyzing trace with hash 798988436, now seen corresponding path program 1 times [2019-12-07 15:47:59,528 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:47:59,528 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784629157] [2019-12-07 15:47:59,528 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:59,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:59,578 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:59,578 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1784629157] [2019-12-07 15:47:59,578 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:59,578 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:47:59,579 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1881039414] [2019-12-07 15:47:59,579 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:47:59,579 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:47:59,579 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:47:59,579 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:47:59,580 INFO L87 Difference]: Start difference. First operand 336 states and 624 transitions. Second operand 3 states. [2019-12-07 15:47:59,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:59,617 INFO L93 Difference]: Finished difference Result 345 states and 638 transitions. [2019-12-07 15:47:59,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:47:59,617 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-12-07 15:47:59,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:59,618 INFO L225 Difference]: With dead ends: 345 [2019-12-07 15:47:59,619 INFO L226 Difference]: Without dead ends: 345 [2019-12-07 15:47:59,619 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:47:59,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states. [2019-12-07 15:47:59,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 341. [2019-12-07 15:47:59,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 341 states. [2019-12-07 15:47:59,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 341 states to 341 states and 634 transitions. [2019-12-07 15:47:59,625 INFO L78 Accepts]: Start accepts. Automaton has 341 states and 634 transitions. Word has length 52 [2019-12-07 15:47:59,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:59,625 INFO L462 AbstractCegarLoop]: Abstraction has 341 states and 634 transitions. [2019-12-07 15:47:59,626 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:47:59,626 INFO L276 IsEmpty]: Start isEmpty. Operand 341 states and 634 transitions. [2019-12-07 15:47:59,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 15:47:59,627 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:59,627 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:59,628 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:59,628 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:59,628 INFO L82 PathProgramCache]: Analyzing trace with hash 112676449, now seen corresponding path program 1 times [2019-12-07 15:47:59,628 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:47:59,628 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1173086761] [2019-12-07 15:47:59,628 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:59,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:59,689 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:59,689 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1173086761] [2019-12-07 15:47:59,690 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:59,690 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:47:59,690 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1854740985] [2019-12-07 15:47:59,690 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:47:59,690 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:47:59,691 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:47:59,691 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:47:59,691 INFO L87 Difference]: Start difference. First operand 341 states and 634 transitions. Second operand 3 states. [2019-12-07 15:47:59,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:59,722 INFO L93 Difference]: Finished difference Result 345 states and 628 transitions. [2019-12-07 15:47:59,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:47:59,723 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-12-07 15:47:59,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:59,723 INFO L225 Difference]: With dead ends: 345 [2019-12-07 15:47:59,723 INFO L226 Difference]: Without dead ends: 345 [2019-12-07 15:47:59,724 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:47:59,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states. [2019-12-07 15:47:59,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 341. [2019-12-07 15:47:59,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 341 states. [2019-12-07 15:47:59,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 341 states to 341 states and 624 transitions. [2019-12-07 15:47:59,728 INFO L78 Accepts]: Start accepts. Automaton has 341 states and 624 transitions. Word has length 52 [2019-12-07 15:47:59,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:59,728 INFO L462 AbstractCegarLoop]: Abstraction has 341 states and 624 transitions. [2019-12-07 15:47:59,728 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:47:59,728 INFO L276 IsEmpty]: Start isEmpty. Operand 341 states and 624 transitions. [2019-12-07 15:47:59,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 15:47:59,729 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:59,729 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:59,729 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:59,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:59,730 INFO L82 PathProgramCache]: Analyzing trace with hash 107384222, now seen corresponding path program 1 times [2019-12-07 15:47:59,730 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:47:59,730 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1111665102] [2019-12-07 15:47:59,730 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:59,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:59,784 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:59,785 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1111665102] [2019-12-07 15:47:59,785 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:59,785 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:47:59,785 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [414230842] [2019-12-07 15:47:59,785 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:47:59,785 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:47:59,785 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:47:59,786 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:47:59,786 INFO L87 Difference]: Start difference. First operand 341 states and 624 transitions. Second operand 3 states. [2019-12-07 15:47:59,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:59,796 INFO L93 Difference]: Finished difference Result 328 states and 585 transitions. [2019-12-07 15:47:59,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:47:59,797 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-12-07 15:47:59,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:59,797 INFO L225 Difference]: With dead ends: 328 [2019-12-07 15:47:59,798 INFO L226 Difference]: Without dead ends: 328 [2019-12-07 15:47:59,798 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:47:59,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328 states. [2019-12-07 15:47:59,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328 to 328. [2019-12-07 15:47:59,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328 states. [2019-12-07 15:47:59,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 585 transitions. [2019-12-07 15:47:59,802 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 585 transitions. Word has length 52 [2019-12-07 15:47:59,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:59,802 INFO L462 AbstractCegarLoop]: Abstraction has 328 states and 585 transitions. [2019-12-07 15:47:59,802 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:47:59,802 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 585 transitions. [2019-12-07 15:47:59,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 15:47:59,803 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:59,803 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:59,803 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:59,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:59,803 INFO L82 PathProgramCache]: Analyzing trace with hash 1649755206, now seen corresponding path program 1 times [2019-12-07 15:47:59,803 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:47:59,804 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1121040400] [2019-12-07 15:47:59,804 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:59,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:59,861 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:59,862 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1121040400] [2019-12-07 15:47:59,862 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:59,862 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:47:59,862 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [420059809] [2019-12-07 15:47:59,863 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:47:59,863 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:47:59,863 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:47:59,863 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:47:59,863 INFO L87 Difference]: Start difference. First operand 328 states and 585 transitions. Second operand 5 states. [2019-12-07 15:47:59,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:59,990 INFO L93 Difference]: Finished difference Result 459 states and 819 transitions. [2019-12-07 15:47:59,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:47:59,990 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2019-12-07 15:47:59,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:59,991 INFO L225 Difference]: With dead ends: 459 [2019-12-07 15:47:59,991 INFO L226 Difference]: Without dead ends: 459 [2019-12-07 15:47:59,991 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:47:59,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 459 states. [2019-12-07 15:47:59,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 459 to 363. [2019-12-07 15:47:59,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 363 states. [2019-12-07 15:47:59,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 363 states to 363 states and 652 transitions. [2019-12-07 15:47:59,996 INFO L78 Accepts]: Start accepts. Automaton has 363 states and 652 transitions. Word has length 53 [2019-12-07 15:47:59,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:59,996 INFO L462 AbstractCegarLoop]: Abstraction has 363 states and 652 transitions. [2019-12-07 15:47:59,996 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:47:59,996 INFO L276 IsEmpty]: Start isEmpty. Operand 363 states and 652 transitions. [2019-12-07 15:47:59,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 15:47:59,997 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:59,997 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:59,997 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:59,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:59,998 INFO L82 PathProgramCache]: Analyzing trace with hash 1934699814, now seen corresponding path program 2 times [2019-12-07 15:47:59,998 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:47:59,998 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [720927693] [2019-12-07 15:47:59,998 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:48:00,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:48:00,209 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:48:00,209 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [720927693] [2019-12-07 15:48:00,210 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:48:00,210 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 15:48:00,210 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1016643622] [2019-12-07 15:48:00,210 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 15:48:00,210 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:48:00,211 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 15:48:00,211 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:48:00,211 INFO L87 Difference]: Start difference. First operand 363 states and 652 transitions. Second operand 10 states. [2019-12-07 15:48:00,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:48:00,495 INFO L93 Difference]: Finished difference Result 502 states and 893 transitions. [2019-12-07 15:48:00,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:48:00,495 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 53 [2019-12-07 15:48:00,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:48:00,496 INFO L225 Difference]: With dead ends: 502 [2019-12-07 15:48:00,496 INFO L226 Difference]: Without dead ends: 502 [2019-12-07 15:48:00,497 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2019-12-07 15:48:00,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 502 states. [2019-12-07 15:48:00,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 502 to 377. [2019-12-07 15:48:00,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 377 states. [2019-12-07 15:48:00,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 377 states and 678 transitions. [2019-12-07 15:48:00,504 INFO L78 Accepts]: Start accepts. Automaton has 377 states and 678 transitions. Word has length 53 [2019-12-07 15:48:00,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:48:00,504 INFO L462 AbstractCegarLoop]: Abstraction has 377 states and 678 transitions. [2019-12-07 15:48:00,505 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 15:48:00,505 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 678 transitions. [2019-12-07 15:48:00,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 15:48:00,506 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:48:00,506 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:48:00,506 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:48:00,506 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:48:00,507 INFO L82 PathProgramCache]: Analyzing trace with hash -1416640772, now seen corresponding path program 3 times [2019-12-07 15:48:00,507 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:48:00,507 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2105587045] [2019-12-07 15:48:00,507 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:48:00,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:48:00,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:48:00,695 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2105587045] [2019-12-07 15:48:00,695 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:48:00,695 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 15:48:00,695 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1784753915] [2019-12-07 15:48:00,695 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 15:48:00,695 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:48:00,695 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 15:48:00,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:48:00,696 INFO L87 Difference]: Start difference. First operand 377 states and 678 transitions. Second operand 9 states. [2019-12-07 15:48:01,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:48:01,403 INFO L93 Difference]: Finished difference Result 649 states and 1145 transitions. [2019-12-07 15:48:01,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 15:48:01,404 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 53 [2019-12-07 15:48:01,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:48:01,405 INFO L225 Difference]: With dead ends: 649 [2019-12-07 15:48:01,405 INFO L226 Difference]: Without dead ends: 649 [2019-12-07 15:48:01,406 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=77, Invalid=195, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:48:01,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 649 states. [2019-12-07 15:48:01,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 649 to 363. [2019-12-07 15:48:01,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 363 states. [2019-12-07 15:48:01,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 363 states to 363 states and 648 transitions. [2019-12-07 15:48:01,415 INFO L78 Accepts]: Start accepts. Automaton has 363 states and 648 transitions. Word has length 53 [2019-12-07 15:48:01,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:48:01,415 INFO L462 AbstractCegarLoop]: Abstraction has 363 states and 648 transitions. [2019-12-07 15:48:01,415 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 15:48:01,415 INFO L276 IsEmpty]: Start isEmpty. Operand 363 states and 648 transitions. [2019-12-07 15:48:01,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 15:48:01,417 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:48:01,417 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:48:01,417 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:48:01,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:48:01,417 INFO L82 PathProgramCache]: Analyzing trace with hash -1073733746, now seen corresponding path program 4 times [2019-12-07 15:48:01,417 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:48:01,418 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1221844771] [2019-12-07 15:48:01,418 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:48:01,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:48:01,480 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:48:01,480 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1221844771] [2019-12-07 15:48:01,480 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:48:01,480 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:48:01,480 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346770461] [2019-12-07 15:48:01,481 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:48:01,481 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:48:01,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:48:01,481 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:48:01,481 INFO L87 Difference]: Start difference. First operand 363 states and 648 transitions. Second operand 5 states. [2019-12-07 15:48:01,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:48:01,511 INFO L93 Difference]: Finished difference Result 587 states and 1029 transitions. [2019-12-07 15:48:01,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:48:01,512 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2019-12-07 15:48:01,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:48:01,512 INFO L225 Difference]: With dead ends: 587 [2019-12-07 15:48:01,512 INFO L226 Difference]: Without dead ends: 241 [2019-12-07 15:48:01,512 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:48:01,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 241 states. [2019-12-07 15:48:01,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 241 to 241. [2019-12-07 15:48:01,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 241 states. [2019-12-07 15:48:01,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 241 states to 241 states and 407 transitions. [2019-12-07 15:48:01,515 INFO L78 Accepts]: Start accepts. Automaton has 241 states and 407 transitions. Word has length 53 [2019-12-07 15:48:01,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:48:01,515 INFO L462 AbstractCegarLoop]: Abstraction has 241 states and 407 transitions. [2019-12-07 15:48:01,515 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:48:01,515 INFO L276 IsEmpty]: Start isEmpty. Operand 241 states and 407 transitions. [2019-12-07 15:48:01,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 15:48:01,516 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:48:01,516 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:48:01,516 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:48:01,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:48:01,516 INFO L82 PathProgramCache]: Analyzing trace with hash 175082296, now seen corresponding path program 5 times [2019-12-07 15:48:01,516 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:48:01,517 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1161783154] [2019-12-07 15:48:01,517 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:48:01,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:48:01,570 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:48:01,570 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1161783154] [2019-12-07 15:48:01,570 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:48:01,570 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:48:01,570 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1055920508] [2019-12-07 15:48:01,571 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:48:01,571 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:48:01,571 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:48:01,571 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:48:01,571 INFO L87 Difference]: Start difference. First operand 241 states and 407 transitions. Second operand 3 states. [2019-12-07 15:48:01,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:48:01,601 INFO L93 Difference]: Finished difference Result 240 states and 405 transitions. [2019-12-07 15:48:01,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:48:01,601 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 15:48:01,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:48:01,601 INFO L225 Difference]: With dead ends: 240 [2019-12-07 15:48:01,601 INFO L226 Difference]: Without dead ends: 240 [2019-12-07 15:48:01,602 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:48:01,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states. [2019-12-07 15:48:01,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 197. [2019-12-07 15:48:01,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2019-12-07 15:48:01,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 332 transitions. [2019-12-07 15:48:01,604 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 332 transitions. Word has length 53 [2019-12-07 15:48:01,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:48:01,605 INFO L462 AbstractCegarLoop]: Abstraction has 197 states and 332 transitions. [2019-12-07 15:48:01,605 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:48:01,605 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 332 transitions. [2019-12-07 15:48:01,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 15:48:01,605 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:48:01,605 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:48:01,605 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:48:01,606 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:48:01,606 INFO L82 PathProgramCache]: Analyzing trace with hash -1455781027, now seen corresponding path program 1 times [2019-12-07 15:48:01,606 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:48:01,606 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [111239086] [2019-12-07 15:48:01,606 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:48:01,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:48:01,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:48:01,680 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 15:48:01,681 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:48:01,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] ULTIMATE.startENTRY-->L787: Formula: (let ((.cse0 (store |v_#valid_48| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= 0 v_~x~0_169) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1595~0.base_19| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1595~0.base_19|) |v_ULTIMATE.start_main_~#t1595~0.offset_14| 0)) |v_#memory_int_17|) (= 0 v_~x$read_delayed_var~0.offset_6) (= |v_#NULL.offset_7| 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1595~0.base_19|) 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1595~0.base_19| 4)) (= v_~x$r_buff1_thd2~0_98 0) (= 0 v_~__unbuffered_cnt~0_67) (= v_~main$tmp_guard1~0_21 0) (= 0 v_~x$w_buff1_used~0_304) (= v_~x$r_buff0_thd0~0_295 0) (= 0 v_~x$r_buff0_thd2~0_162) (< 0 |v_#StackHeapBarrier_15|) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1595~0.base_19|) (= 0 v_~x$read_delayed~0_6) (= v_~y~0_104 0) (= v_~__unbuffered_p1_EBX~0_62 0) (= v_~x$mem_tmp~0_16 0) (= v_~x$flush_delayed~0_31 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1595~0.base_19| 1) |v_#valid_46|) (= 0 v_~weak$$choice2~0_83) (= 0 v_~weak$$choice0~0_11) (= 0 v_~__unbuffered_p1_EAX~0_62) (= 0 |v_#NULL.base_7|) (= 0 v_~x$w_buff1~0_172) (= 0 |v_ULTIMATE.start_main_~#t1595~0.offset_14|) (= v_~main$tmp_guard0~0_26 0) (= v_~x$r_buff1_thd1~0_135 0) (= v_~x$r_buff0_thd1~0_120 0) (= 0 v_~x$w_buff0~0_199) (= v_~x$r_buff1_thd0~0_177 0) (= 0 v_~x$w_buff0_used~0_556))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_199, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_30|, ~x$flush_delayed~0=v_~x$flush_delayed~0_31, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_135, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_32|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_25|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_30|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_62, #length=|v_#length_17|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_295, ULTIMATE.start_main_~#t1595~0.offset=|v_ULTIMATE.start_main_~#t1595~0.offset_14|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_31|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_15|, ~x$w_buff1~0=v_~x$w_buff1~0_172, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_23|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_304, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_98, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_34|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_~#t1595~0.base=|v_ULTIMATE.start_main_~#t1595~0.base_19|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_11, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ULTIMATE.start_main_~#t1596~0.base=|v_ULTIMATE.start_main_~#t1596~0.base_17|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, ~x~0=v_~x~0_169, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_120, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_19|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_32|, ~x$mem_tmp~0=v_~x$mem_tmp~0_16, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_37|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_30|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_28|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ~y~0=v_~y~0_104, ULTIMATE.start_main_~#t1596~0.offset=|v_ULTIMATE.start_main_~#t1596~0.offset_14|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_62, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_37|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_15|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_32|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_26|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_177, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_23|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_28|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_556, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_28|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_23|, ~weak$$choice2~0=v_~weak$$choice2~0_83, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p1_EAX~0, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_~#t1595~0.offset, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_~#t1595~0.base, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t1596~0.base, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ULTIMATE.start_main_~#t1596~0.offset, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 15:48:01,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L787-1-->L789: Formula: (and (= |v_ULTIMATE.start_main_~#t1596~0.offset_9| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1596~0.base_10|)) (= |v_#valid_23| (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1596~0.base_10| 1)) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t1596~0.base_10| 4) |v_#length_9|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t1596~0.base_10|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1596~0.base_10| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1596~0.base_10|) |v_ULTIMATE.start_main_~#t1596~0.offset_9| 1))) (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1596~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_10|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t1596~0.base=|v_ULTIMATE.start_main_~#t1596~0.base_10|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_3|, #length=|v_#length_9|, ULTIMATE.start_main_~#t1596~0.offset=|v_ULTIMATE.start_main_~#t1596~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1596~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1596~0.offset] because there is no mapped edge [2019-12-07 15:48:01,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L4-->L764: Formula: (and (= ~x$r_buff0_thd2~0_In-43152011 ~x$r_buff1_thd2~0_Out-43152011) (= ~y~0_Out-43152011 ~__unbuffered_p1_EBX~0_Out-43152011) (not (= 0 P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-43152011)) (= ~y~0_Out-43152011 1) (= ~x$r_buff0_thd0~0_In-43152011 ~x$r_buff1_thd0~0_Out-43152011) (= ~x$r_buff1_thd1~0_Out-43152011 ~x$r_buff0_thd1~0_In-43152011) (= ~x$r_buff0_thd2~0_Out-43152011 1) (= ~y~0_Out-43152011 ~__unbuffered_p1_EAX~0_Out-43152011)) InVars {P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-43152011, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-43152011, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-43152011, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-43152011} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-43152011, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-43152011, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-43152011, ~__unbuffered_p1_EBX~0=~__unbuffered_p1_EBX~0_Out-43152011, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_Out-43152011, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_Out-43152011, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_Out-43152011, ~y~0=~y~0_Out-43152011, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-43152011, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out-43152011} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~__unbuffered_p1_EAX~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~y~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 15:48:01,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L730-2-->L730-4: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-1640864848 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-1640864848 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite3_Out-1640864848| ~x~0_In-1640864848) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1640864848 |P0Thread1of1ForFork0_#t~ite3_Out-1640864848|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1640864848, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1640864848, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1640864848, ~x~0=~x~0_In-1640864848} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-1640864848|, ~x$w_buff1~0=~x$w_buff1~0_In-1640864848, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1640864848, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1640864848, ~x~0=~x~0_In-1640864848} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3] because there is no mapped edge [2019-12-07 15:48:01,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [587] [587] L730-4-->L731: Formula: (= v_~x~0_20 |v_P0Thread1of1ForFork0_#t~ite3_14|) InVars {P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_14|} OutVars{P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_13|, P0Thread1of1ForFork0_#t~ite4=|v_P0Thread1of1ForFork0_#t~ite4_5|, ~x~0=v_~x~0_20} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4, ~x~0] because there is no mapped edge [2019-12-07 15:48:01,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L731-->L731-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1867816472 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In1867816472 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out1867816472| 0)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out1867816472| ~x$w_buff0_used~0_In1867816472) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1867816472, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1867816472} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1867816472|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1867816472, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1867816472} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 15:48:01,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L732-->L732-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In145166658 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In145166658 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In145166658 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd1~0_In145166658 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In145166658 |P0Thread1of1ForFork0_#t~ite6_Out145166658|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out145166658|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In145166658, ~x$w_buff1_used~0=~x$w_buff1_used~0_In145166658, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In145166658, ~x$w_buff0_used~0=~x$w_buff0_used~0_In145166658} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out145166658|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In145166658, ~x$w_buff1_used~0=~x$w_buff1_used~0_In145166658, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In145166658, ~x$w_buff0_used~0=~x$w_buff0_used~0_In145166658} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 15:48:01,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L733-->L733-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-2145729989 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd1~0_In-2145729989 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out-2145729989| ~x$r_buff0_thd1~0_In-2145729989) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite7_Out-2145729989| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2145729989, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2145729989} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2145729989, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-2145729989|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2145729989} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 15:48:01,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In537741177 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In537741177 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out537741177| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out537741177| ~x$w_buff0_used~0_In537741177)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In537741177, ~x$w_buff0_used~0=~x$w_buff0_used~0_In537741177} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out537741177|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In537741177, ~x$w_buff0_used~0=~x$w_buff0_used~0_In537741177} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 15:48:01,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L766-->L766-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In553636895 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In553636895 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In553636895 256))) (.cse0 (= (mod ~x$r_buff1_thd2~0_In553636895 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out553636895| 0)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out553636895| ~x$w_buff1_used~0_In553636895) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In553636895, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In553636895, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In553636895, ~x$w_buff0_used~0=~x$w_buff0_used~0_In553636895} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In553636895, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In553636895, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out553636895|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In553636895, ~x$w_buff0_used~0=~x$w_buff0_used~0_In553636895} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 15:48:01,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L767-->L768: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In6345731 256))) (.cse2 (= ~x$r_buff0_thd2~0_Out6345731 ~x$r_buff0_thd2~0_In6345731)) (.cse0 (= (mod ~x$w_buff0_used~0_In6345731 256) 0))) (or (and (= ~x$r_buff0_thd2~0_Out6345731 0) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In6345731, ~x$w_buff0_used~0=~x$w_buff0_used~0_In6345731} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out6345731|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out6345731, ~x$w_buff0_used~0=~x$w_buff0_used~0_In6345731} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 15:48:01,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [662] [662] L768-->L768-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In231979772 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In231979772 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In231979772 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd2~0_In231979772 256) 0))) (or (and (= ~x$r_buff1_thd2~0_In231979772 |P1Thread1of1ForFork1_#t~ite14_Out231979772|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out231979772|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In231979772, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In231979772, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In231979772, ~x$w_buff0_used~0=~x$w_buff0_used~0_In231979772} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In231979772, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In231979772, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In231979772, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out231979772|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In231979772} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 15:48:01,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L768-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork1_#t~ite14_32|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_32|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_31|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 15:48:01,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L734-->L734-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In674603239 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In674603239 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In674603239 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In674603239 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out674603239|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$r_buff1_thd1~0_In674603239 |P0Thread1of1ForFork0_#t~ite8_Out674603239|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In674603239, ~x$w_buff1_used~0=~x$w_buff1_used~0_In674603239, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In674603239, ~x$w_buff0_used~0=~x$w_buff0_used~0_In674603239} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In674603239, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out674603239|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In674603239, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In674603239, ~x$w_buff0_used~0=~x$w_buff0_used~0_In674603239} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 15:48:01,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L734-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_94 |v_P0Thread1of1ForFork0_#t~ite8_32|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_31|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_94} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 15:48:01,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [591] [591] L789-1-->L795: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 2 v_~__unbuffered_cnt~0_15) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:48:01,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L795-2-->L795-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In536991585 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In536991585 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite17_Out536991585| ~x~0_In536991585)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite17_Out536991585| ~x$w_buff1~0_In536991585)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In536991585, ~x$w_buff1_used~0=~x$w_buff1_used~0_In536991585, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In536991585, ~x~0=~x~0_In536991585} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out536991585|, ~x$w_buff1~0=~x$w_buff1~0_In536991585, ~x$w_buff1_used~0=~x$w_buff1_used~0_In536991585, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In536991585, ~x~0=~x~0_In536991585} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 15:48:01,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [624] [624] L795-4-->L796: Formula: (= v_~x~0_42 |v_ULTIMATE.start_main_#t~ite17_11|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_11|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_10|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_6|, ~x~0=v_~x~0_42} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~x~0] because there is no mapped edge [2019-12-07 15:48:01,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L796-->L796-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-522597312 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-522597312 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-522597312 |ULTIMATE.start_main_#t~ite19_Out-522597312|)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite19_Out-522597312|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-522597312, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-522597312} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-522597312, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-522597312|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-522597312} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 15:48:01,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L797-->L797-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd0~0_In1978475148 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In1978475148 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In1978475148 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1978475148 256)))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out1978475148| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite20_Out1978475148| ~x$w_buff1_used~0_In1978475148)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1978475148, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1978475148, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1978475148, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1978475148} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1978475148, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1978475148, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1978475148|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1978475148, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1978475148} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 15:48:01,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1396463856 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-1396463856 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite21_Out-1396463856| 0)) (and (= |ULTIMATE.start_main_#t~ite21_Out-1396463856| ~x$r_buff0_thd0~0_In-1396463856) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1396463856, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1396463856} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1396463856, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1396463856|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1396463856} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 15:48:01,689 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In580374340 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In580374340 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In580374340 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd0~0_In580374340 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out580374340|)) (and (= |ULTIMATE.start_main_#t~ite22_Out580374340| ~x$r_buff1_thd0~0_In580374340) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In580374340, ~x$w_buff1_used~0=~x$w_buff1_used~0_In580374340, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In580374340, ~x$w_buff0_used~0=~x$w_buff0_used~0_In580374340} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In580374340, ~x$w_buff1_used~0=~x$w_buff1_used~0_In580374340, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In580374340, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out580374340|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In580374340} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 15:48:01,690 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L811-->L812: Formula: (and (not (= (mod v_~weak$$choice2~0_40 256) 0)) (= v_~x$r_buff0_thd0~0_150 v_~x$r_buff0_thd0~0_151)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_151, ~weak$$choice2~0=v_~weak$$choice2~0_40} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_150, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_14|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_11|, ~weak$$choice2~0=v_~weak$$choice2~0_40} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 15:48:01,691 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L814-->L817-1: Formula: (and (= v_~x$mem_tmp~0_10 v_~x~0_111) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7| (mod v_~main$tmp_guard1~0_11 256)) (not (= 0 (mod v_~x$flush_delayed~0_20 256))) (= v_~x$flush_delayed~0_19 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_19, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_111, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_16|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:48:01,691 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [670] [670] L817-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 15:48:01,737 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:48:01 BasicIcfg [2019-12-07 15:48:01,737 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:48:01,737 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:48:01,737 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:48:01,737 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:48:01,738 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:47:54" (3/4) ... [2019-12-07 15:48:01,740 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:48:01,740 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] ULTIMATE.startENTRY-->L787: Formula: (let ((.cse0 (store |v_#valid_48| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= 0 v_~x~0_169) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1595~0.base_19| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1595~0.base_19|) |v_ULTIMATE.start_main_~#t1595~0.offset_14| 0)) |v_#memory_int_17|) (= 0 v_~x$read_delayed_var~0.offset_6) (= |v_#NULL.offset_7| 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1595~0.base_19|) 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1595~0.base_19| 4)) (= v_~x$r_buff1_thd2~0_98 0) (= 0 v_~__unbuffered_cnt~0_67) (= v_~main$tmp_guard1~0_21 0) (= 0 v_~x$w_buff1_used~0_304) (= v_~x$r_buff0_thd0~0_295 0) (= 0 v_~x$r_buff0_thd2~0_162) (< 0 |v_#StackHeapBarrier_15|) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1595~0.base_19|) (= 0 v_~x$read_delayed~0_6) (= v_~y~0_104 0) (= v_~__unbuffered_p1_EBX~0_62 0) (= v_~x$mem_tmp~0_16 0) (= v_~x$flush_delayed~0_31 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1595~0.base_19| 1) |v_#valid_46|) (= 0 v_~weak$$choice2~0_83) (= 0 v_~weak$$choice0~0_11) (= 0 v_~__unbuffered_p1_EAX~0_62) (= 0 |v_#NULL.base_7|) (= 0 v_~x$w_buff1~0_172) (= 0 |v_ULTIMATE.start_main_~#t1595~0.offset_14|) (= v_~main$tmp_guard0~0_26 0) (= v_~x$r_buff1_thd1~0_135 0) (= v_~x$r_buff0_thd1~0_120 0) (= 0 v_~x$w_buff0~0_199) (= v_~x$r_buff1_thd0~0_177 0) (= 0 v_~x$w_buff0_used~0_556))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_199, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_30|, ~x$flush_delayed~0=v_~x$flush_delayed~0_31, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_135, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_32|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_25|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_30|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_62, #length=|v_#length_17|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_295, ULTIMATE.start_main_~#t1595~0.offset=|v_ULTIMATE.start_main_~#t1595~0.offset_14|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_31|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_15|, ~x$w_buff1~0=v_~x$w_buff1~0_172, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_23|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_304, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_98, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_34|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_~#t1595~0.base=|v_ULTIMATE.start_main_~#t1595~0.base_19|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_11, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ULTIMATE.start_main_~#t1596~0.base=|v_ULTIMATE.start_main_~#t1596~0.base_17|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, ~x~0=v_~x~0_169, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_120, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_19|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_32|, ~x$mem_tmp~0=v_~x$mem_tmp~0_16, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_37|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_30|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_28|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ~y~0=v_~y~0_104, ULTIMATE.start_main_~#t1596~0.offset=|v_ULTIMATE.start_main_~#t1596~0.offset_14|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_62, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_37|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_15|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_32|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_26|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_177, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_23|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_28|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_556, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_28|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_23|, ~weak$$choice2~0=v_~weak$$choice2~0_83, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p1_EAX~0, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_~#t1595~0.offset, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_~#t1595~0.base, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t1596~0.base, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ULTIMATE.start_main_~#t1596~0.offset, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 15:48:01,740 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L787-1-->L789: Formula: (and (= |v_ULTIMATE.start_main_~#t1596~0.offset_9| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1596~0.base_10|)) (= |v_#valid_23| (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1596~0.base_10| 1)) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t1596~0.base_10| 4) |v_#length_9|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t1596~0.base_10|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1596~0.base_10| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1596~0.base_10|) |v_ULTIMATE.start_main_~#t1596~0.offset_9| 1))) (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1596~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_10|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t1596~0.base=|v_ULTIMATE.start_main_~#t1596~0.base_10|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_3|, #length=|v_#length_9|, ULTIMATE.start_main_~#t1596~0.offset=|v_ULTIMATE.start_main_~#t1596~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1596~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1596~0.offset] because there is no mapped edge [2019-12-07 15:48:01,741 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L4-->L764: Formula: (and (= ~x$r_buff0_thd2~0_In-43152011 ~x$r_buff1_thd2~0_Out-43152011) (= ~y~0_Out-43152011 ~__unbuffered_p1_EBX~0_Out-43152011) (not (= 0 P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-43152011)) (= ~y~0_Out-43152011 1) (= ~x$r_buff0_thd0~0_In-43152011 ~x$r_buff1_thd0~0_Out-43152011) (= ~x$r_buff1_thd1~0_Out-43152011 ~x$r_buff0_thd1~0_In-43152011) (= ~x$r_buff0_thd2~0_Out-43152011 1) (= ~y~0_Out-43152011 ~__unbuffered_p1_EAX~0_Out-43152011)) InVars {P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-43152011, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-43152011, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-43152011, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-43152011} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-43152011, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-43152011, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-43152011, ~__unbuffered_p1_EBX~0=~__unbuffered_p1_EBX~0_Out-43152011, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_Out-43152011, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_Out-43152011, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_Out-43152011, ~y~0=~y~0_Out-43152011, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-43152011, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out-43152011} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~__unbuffered_p1_EAX~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~y~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 15:48:01,741 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L730-2-->L730-4: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-1640864848 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-1640864848 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite3_Out-1640864848| ~x~0_In-1640864848) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1640864848 |P0Thread1of1ForFork0_#t~ite3_Out-1640864848|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1640864848, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1640864848, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1640864848, ~x~0=~x~0_In-1640864848} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-1640864848|, ~x$w_buff1~0=~x$w_buff1~0_In-1640864848, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1640864848, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1640864848, ~x~0=~x~0_In-1640864848} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3] because there is no mapped edge [2019-12-07 15:48:01,741 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [587] [587] L730-4-->L731: Formula: (= v_~x~0_20 |v_P0Thread1of1ForFork0_#t~ite3_14|) InVars {P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_14|} OutVars{P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_13|, P0Thread1of1ForFork0_#t~ite4=|v_P0Thread1of1ForFork0_#t~ite4_5|, ~x~0=v_~x~0_20} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4, ~x~0] because there is no mapped edge [2019-12-07 15:48:01,741 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L731-->L731-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1867816472 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In1867816472 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out1867816472| 0)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out1867816472| ~x$w_buff0_used~0_In1867816472) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1867816472, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1867816472} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1867816472|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1867816472, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1867816472} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 15:48:01,741 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L732-->L732-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In145166658 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In145166658 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In145166658 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd1~0_In145166658 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In145166658 |P0Thread1of1ForFork0_#t~ite6_Out145166658|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out145166658|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In145166658, ~x$w_buff1_used~0=~x$w_buff1_used~0_In145166658, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In145166658, ~x$w_buff0_used~0=~x$w_buff0_used~0_In145166658} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out145166658|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In145166658, ~x$w_buff1_used~0=~x$w_buff1_used~0_In145166658, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In145166658, ~x$w_buff0_used~0=~x$w_buff0_used~0_In145166658} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 15:48:01,742 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L733-->L733-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-2145729989 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd1~0_In-2145729989 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out-2145729989| ~x$r_buff0_thd1~0_In-2145729989) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite7_Out-2145729989| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2145729989, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2145729989} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2145729989, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-2145729989|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2145729989} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 15:48:01,742 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In537741177 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In537741177 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out537741177| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out537741177| ~x$w_buff0_used~0_In537741177)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In537741177, ~x$w_buff0_used~0=~x$w_buff0_used~0_In537741177} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out537741177|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In537741177, ~x$w_buff0_used~0=~x$w_buff0_used~0_In537741177} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 15:48:01,742 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L766-->L766-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In553636895 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In553636895 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In553636895 256))) (.cse0 (= (mod ~x$r_buff1_thd2~0_In553636895 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out553636895| 0)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out553636895| ~x$w_buff1_used~0_In553636895) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In553636895, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In553636895, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In553636895, ~x$w_buff0_used~0=~x$w_buff0_used~0_In553636895} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In553636895, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In553636895, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out553636895|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In553636895, ~x$w_buff0_used~0=~x$w_buff0_used~0_In553636895} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 15:48:01,743 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L767-->L768: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In6345731 256))) (.cse2 (= ~x$r_buff0_thd2~0_Out6345731 ~x$r_buff0_thd2~0_In6345731)) (.cse0 (= (mod ~x$w_buff0_used~0_In6345731 256) 0))) (or (and (= ~x$r_buff0_thd2~0_Out6345731 0) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In6345731, ~x$w_buff0_used~0=~x$w_buff0_used~0_In6345731} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out6345731|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out6345731, ~x$w_buff0_used~0=~x$w_buff0_used~0_In6345731} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 15:48:01,743 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [662] [662] L768-->L768-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In231979772 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In231979772 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In231979772 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd2~0_In231979772 256) 0))) (or (and (= ~x$r_buff1_thd2~0_In231979772 |P1Thread1of1ForFork1_#t~ite14_Out231979772|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out231979772|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In231979772, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In231979772, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In231979772, ~x$w_buff0_used~0=~x$w_buff0_used~0_In231979772} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In231979772, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In231979772, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In231979772, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out231979772|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In231979772} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 15:48:01,743 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L768-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork1_#t~ite14_32|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_32|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_31|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 15:48:01,743 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L734-->L734-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In674603239 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In674603239 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In674603239 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In674603239 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out674603239|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$r_buff1_thd1~0_In674603239 |P0Thread1of1ForFork0_#t~ite8_Out674603239|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In674603239, ~x$w_buff1_used~0=~x$w_buff1_used~0_In674603239, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In674603239, ~x$w_buff0_used~0=~x$w_buff0_used~0_In674603239} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In674603239, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out674603239|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In674603239, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In674603239, ~x$w_buff0_used~0=~x$w_buff0_used~0_In674603239} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 15:48:01,743 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L734-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_94 |v_P0Thread1of1ForFork0_#t~ite8_32|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_31|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_94} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 15:48:01,743 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [591] [591] L789-1-->L795: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 2 v_~__unbuffered_cnt~0_15) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:48:01,743 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L795-2-->L795-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In536991585 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In536991585 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite17_Out536991585| ~x~0_In536991585)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite17_Out536991585| ~x$w_buff1~0_In536991585)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In536991585, ~x$w_buff1_used~0=~x$w_buff1_used~0_In536991585, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In536991585, ~x~0=~x~0_In536991585} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out536991585|, ~x$w_buff1~0=~x$w_buff1~0_In536991585, ~x$w_buff1_used~0=~x$w_buff1_used~0_In536991585, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In536991585, ~x~0=~x~0_In536991585} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 15:48:01,744 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [624] [624] L795-4-->L796: Formula: (= v_~x~0_42 |v_ULTIMATE.start_main_#t~ite17_11|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_11|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_10|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_6|, ~x~0=v_~x~0_42} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~x~0] because there is no mapped edge [2019-12-07 15:48:01,744 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L796-->L796-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-522597312 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-522597312 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-522597312 |ULTIMATE.start_main_#t~ite19_Out-522597312|)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite19_Out-522597312|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-522597312, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-522597312} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-522597312, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-522597312|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-522597312} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 15:48:01,744 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L797-->L797-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd0~0_In1978475148 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In1978475148 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In1978475148 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1978475148 256)))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out1978475148| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite20_Out1978475148| ~x$w_buff1_used~0_In1978475148)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1978475148, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1978475148, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1978475148, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1978475148} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1978475148, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1978475148, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1978475148|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1978475148, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1978475148} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 15:48:01,744 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1396463856 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-1396463856 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite21_Out-1396463856| 0)) (and (= |ULTIMATE.start_main_#t~ite21_Out-1396463856| ~x$r_buff0_thd0~0_In-1396463856) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1396463856, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1396463856} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1396463856, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1396463856|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1396463856} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 15:48:01,744 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In580374340 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In580374340 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In580374340 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd0~0_In580374340 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out580374340|)) (and (= |ULTIMATE.start_main_#t~ite22_Out580374340| ~x$r_buff1_thd0~0_In580374340) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In580374340, ~x$w_buff1_used~0=~x$w_buff1_used~0_In580374340, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In580374340, ~x$w_buff0_used~0=~x$w_buff0_used~0_In580374340} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In580374340, ~x$w_buff1_used~0=~x$w_buff1_used~0_In580374340, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In580374340, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out580374340|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In580374340} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 15:48:01,746 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L811-->L812: Formula: (and (not (= (mod v_~weak$$choice2~0_40 256) 0)) (= v_~x$r_buff0_thd0~0_150 v_~x$r_buff0_thd0~0_151)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_151, ~weak$$choice2~0=v_~weak$$choice2~0_40} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_150, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_14|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_11|, ~weak$$choice2~0=v_~weak$$choice2~0_40} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 15:48:01,747 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L814-->L817-1: Formula: (and (= v_~x$mem_tmp~0_10 v_~x~0_111) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7| (mod v_~main$tmp_guard1~0_11 256)) (not (= 0 (mod v_~x$flush_delayed~0_20 256))) (= v_~x$flush_delayed~0_19 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_19, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_111, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_16|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:48:01,747 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [670] [670] L817-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 15:48:01,799 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_1169b1f1-32c2-4e21-a7c3-8d3f7556dc36/bin/uautomizer/witness.graphml [2019-12-07 15:48:01,799 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:48:01,801 INFO L168 Benchmark]: Toolchain (without parser) took 7791.41 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 232.3 MB). Free memory was 938.2 MB in the beginning and 960.1 MB in the end (delta: -21.9 MB). Peak memory consumption was 210.3 MB. Max. memory is 11.5 GB. [2019-12-07 15:48:01,801 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:48:01,801 INFO L168 Benchmark]: CACSL2BoogieTranslator took 396.54 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -138.0 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 15:48:01,802 INFO L168 Benchmark]: Boogie Procedure Inliner took 42.42 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 15:48:01,802 INFO L168 Benchmark]: Boogie Preprocessor took 24.72 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:48:01,802 INFO L168 Benchmark]: RCFGBuilder took 373.54 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.9 MB). Peak memory consumption was 50.9 MB. Max. memory is 11.5 GB. [2019-12-07 15:48:01,802 INFO L168 Benchmark]: TraceAbstraction took 6888.24 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 126.4 MB). Free memory was 1.0 GB in the beginning and 977.2 MB in the end (delta: 42.7 MB). Peak memory consumption was 169.0 MB. Max. memory is 11.5 GB. [2019-12-07 15:48:01,803 INFO L168 Benchmark]: Witness Printer took 62.38 ms. Allocated memory is still 1.3 GB. Free memory was 977.2 MB in the beginning and 960.1 MB in the end (delta: 17.2 MB). Peak memory consumption was 17.2 MB. Max. memory is 11.5 GB. [2019-12-07 15:48:01,804 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 396.54 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -138.0 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 42.42 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.72 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 373.54 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.9 MB). Peak memory consumption was 50.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 6888.24 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 126.4 MB). Free memory was 1.0 GB in the beginning and 977.2 MB in the end (delta: 42.7 MB). Peak memory consumption was 169.0 MB. Max. memory is 11.5 GB. * Witness Printer took 62.38 ms. Allocated memory is still 1.3 GB. Free memory was 977.2 MB in the beginning and 960.1 MB in the end (delta: 17.2 MB). Peak memory consumption was 17.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.5s, 147 ProgramPointsBefore, 81 ProgramPointsAfterwards, 181 TransitionsBefore, 94 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 29 TrivialSequentialCompositions, 37 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 24 ChoiceCompositions, 3783 VarBasedMoverChecksPositive, 170 VarBasedMoverChecksNegative, 19 SemBasedMoverChecksPositive, 202 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 50487 CheckedPairsTotal, 98 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L787] FCALL, FORK 0 pthread_create(&t1595, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L789] FCALL, FORK 0 pthread_create(&t1596, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L744] 2 x$w_buff1 = x$w_buff0 [L745] 2 x$w_buff0 = 2 [L746] 2 x$w_buff1_used = x$w_buff0_used [L747] 2 x$w_buff0_used = (_Bool)1 [L724] 1 y = 2 [L727] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L730] 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L731] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L764] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L732] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L764] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L765] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L766] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L733] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L795] 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L797] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L798] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L799] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L802] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L803] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L804] 0 x$flush_delayed = weak$$choice2 [L805] 0 x$mem_tmp = x VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L806] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L806] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L807] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L807] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L808] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L808] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L809] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L809] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L810] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L810] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L812] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L812] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L813] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 141 locations, 2 error locations. Result: UNSAFE, OverallTime: 6.7s, OverallIterations: 13, TraceHistogramMax: 1, AutomataDifference: 1.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1200 SDtfs, 659 SDslu, 1908 SDs, 0 SdLazy, 1176 SolverSat, 72 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 74 GetRequests, 19 SyntacticMatches, 10 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=13038occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.7s AutomataMinimizationTime, 12 MinimizatonAttempts, 1910 StatesRemovedByMinimization, 8 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.6s InterpolantComputationTime, 525 NumberOfCodeBlocks, 525 NumberOfCodeBlocksAsserted, 13 NumberOfCheckSat, 459 ConstructedInterpolants, 0 QuantifiedInterpolants, 62888 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 12 InterpolantComputations, 12 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...