./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi001_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_b864a72c-5783-4daf-b28c-fb6c7b5495cd/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_b864a72c-5783-4daf-b28c-fb6c7b5495cd/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_b864a72c-5783-4daf-b28c-fb6c7b5495cd/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_b864a72c-5783-4daf-b28c-fb6c7b5495cd/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi001_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_b864a72c-5783-4daf-b28c-fb6c7b5495cd/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_b864a72c-5783-4daf-b28c-fb6c7b5495cd/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 51e00420332ce124fa129feb09802a38331e4efb .......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 16:14:00,184 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 16:14:00,185 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 16:14:00,193 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 16:14:00,193 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 16:14:00,194 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 16:14:00,195 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 16:14:00,196 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 16:14:00,198 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 16:14:00,198 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 16:14:00,199 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 16:14:00,200 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 16:14:00,200 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 16:14:00,201 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 16:14:00,201 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 16:14:00,202 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 16:14:00,203 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 16:14:00,204 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 16:14:00,205 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 16:14:00,206 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 16:14:00,207 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 16:14:00,208 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 16:14:00,209 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 16:14:00,209 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 16:14:00,211 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 16:14:00,211 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 16:14:00,211 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 16:14:00,212 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 16:14:00,212 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 16:14:00,213 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 16:14:00,213 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 16:14:00,213 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 16:14:00,214 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 16:14:00,214 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 16:14:00,215 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 16:14:00,216 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 16:14:00,216 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 16:14:00,216 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 16:14:00,216 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 16:14:00,217 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 16:14:00,218 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 16:14:00,218 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_b864a72c-5783-4daf-b28c-fb6c7b5495cd/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 16:14:00,231 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 16:14:00,231 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 16:14:00,232 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 16:14:00,232 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 16:14:00,232 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 16:14:00,233 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 16:14:00,233 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 16:14:00,233 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 16:14:00,233 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 16:14:00,233 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 16:14:00,233 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 16:14:00,234 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 16:14:00,234 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 16:14:00,234 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 16:14:00,234 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 16:14:00,234 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 16:14:00,235 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 16:14:00,235 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 16:14:00,235 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 16:14:00,235 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 16:14:00,235 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 16:14:00,235 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:14:00,236 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 16:14:00,236 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 16:14:00,236 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 16:14:00,236 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 16:14:00,236 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 16:14:00,237 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 16:14:00,237 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 16:14:00,237 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_b864a72c-5783-4daf-b28c-fb6c7b5495cd/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 51e00420332ce124fa129feb09802a38331e4efb [2019-12-07 16:14:00,344 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 16:14:00,354 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 16:14:00,357 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 16:14:00,358 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 16:14:00,359 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 16:14:00,359 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_b864a72c-5783-4daf-b28c-fb6c7b5495cd/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/rfi001_tso.oepc.i [2019-12-07 16:14:00,403 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b864a72c-5783-4daf-b28c-fb6c7b5495cd/bin/uautomizer/data/fc8e6f1a1/78c06db11b884ee4b9925f94ad5a2481/FLAGb182a2dc5 [2019-12-07 16:14:00,759 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 16:14:00,760 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_b864a72c-5783-4daf-b28c-fb6c7b5495cd/sv-benchmarks/c/pthread-wmm/rfi001_tso.oepc.i [2019-12-07 16:14:00,769 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b864a72c-5783-4daf-b28c-fb6c7b5495cd/bin/uautomizer/data/fc8e6f1a1/78c06db11b884ee4b9925f94ad5a2481/FLAGb182a2dc5 [2019-12-07 16:14:00,778 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_b864a72c-5783-4daf-b28c-fb6c7b5495cd/bin/uautomizer/data/fc8e6f1a1/78c06db11b884ee4b9925f94ad5a2481 [2019-12-07 16:14:00,780 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 16:14:00,781 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 16:14:00,782 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 16:14:00,782 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 16:14:00,784 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 16:14:00,785 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:14:00" (1/1) ... [2019-12-07 16:14:00,786 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a2ff042 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:14:00, skipping insertion in model container [2019-12-07 16:14:00,787 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:14:00" (1/1) ... [2019-12-07 16:14:00,792 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 16:14:00,819 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 16:14:01,060 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:14:01,067 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 16:14:01,108 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:14:01,152 INFO L208 MainTranslator]: Completed translation [2019-12-07 16:14:01,152 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:14:01 WrapperNode [2019-12-07 16:14:01,152 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 16:14:01,153 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 16:14:01,153 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 16:14:01,153 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 16:14:01,158 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:14:01" (1/1) ... [2019-12-07 16:14:01,170 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:14:01" (1/1) ... [2019-12-07 16:14:01,191 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 16:14:01,191 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 16:14:01,191 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 16:14:01,191 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 16:14:01,198 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:14:01" (1/1) ... [2019-12-07 16:14:01,198 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:14:01" (1/1) ... [2019-12-07 16:14:01,201 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:14:01" (1/1) ... [2019-12-07 16:14:01,201 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:14:01" (1/1) ... [2019-12-07 16:14:01,207 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:14:01" (1/1) ... [2019-12-07 16:14:01,209 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:14:01" (1/1) ... [2019-12-07 16:14:01,211 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:14:01" (1/1) ... [2019-12-07 16:14:01,214 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 16:14:01,215 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 16:14:01,215 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 16:14:01,215 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 16:14:01,215 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:14:01" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_b864a72c-5783-4daf-b28c-fb6c7b5495cd/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:14:01,255 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 16:14:01,255 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 16:14:01,255 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 16:14:01,255 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 16:14:01,255 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 16:14:01,255 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 16:14:01,255 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 16:14:01,255 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 16:14:01,256 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 16:14:01,256 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 16:14:01,256 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 16:14:01,257 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 16:14:01,603 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 16:14:01,603 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 16:14:01,604 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:14:01 BoogieIcfgContainer [2019-12-07 16:14:01,604 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 16:14:01,605 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 16:14:01,605 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 16:14:01,606 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 16:14:01,607 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 04:14:00" (1/3) ... [2019-12-07 16:14:01,607 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@26518df3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:14:01, skipping insertion in model container [2019-12-07 16:14:01,607 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:14:01" (2/3) ... [2019-12-07 16:14:01,607 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@26518df3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:14:01, skipping insertion in model container [2019-12-07 16:14:01,608 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:14:01" (3/3) ... [2019-12-07 16:14:01,609 INFO L109 eAbstractionObserver]: Analyzing ICFG rfi001_tso.oepc.i [2019-12-07 16:14:01,615 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 16:14:01,615 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 16:14:01,619 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 16:14:01,620 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 16:14:01,640 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,640 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,640 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,640 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,641 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,641 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,641 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,641 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,641 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,641 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,641 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,642 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,642 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,642 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,642 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,642 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,642 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,642 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,643 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,643 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,643 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,643 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,643 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,643 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,643 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,643 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,644 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,644 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,644 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,644 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,645 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,645 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,645 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,645 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,645 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:14:01,659 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 16:14:01,671 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 16:14:01,671 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 16:14:01,671 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 16:14:01,672 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 16:14:01,672 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 16:14:01,672 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 16:14:01,672 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 16:14:01,672 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 16:14:01,682 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 148 places, 182 transitions [2019-12-07 16:14:01,683 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 148 places, 182 transitions [2019-12-07 16:14:01,729 INFO L134 PetriNetUnfolder]: 41/180 cut-off events. [2019-12-07 16:14:01,729 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:14:01,737 INFO L76 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 180 events. 41/180 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 463 event pairs. 6/143 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 16:14:01,748 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 148 places, 182 transitions [2019-12-07 16:14:01,770 INFO L134 PetriNetUnfolder]: 41/180 cut-off events. [2019-12-07 16:14:01,770 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:14:01,773 INFO L76 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 180 events. 41/180 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 463 event pairs. 6/143 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 16:14:01,781 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-12-07 16:14:01,782 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 16:14:04,251 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-12-07 16:14:04,340 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46553 [2019-12-07 16:14:04,340 INFO L214 etLargeBlockEncoding]: Total number of compositions: 101 [2019-12-07 16:14:04,342 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 78 places, 90 transitions [2019-12-07 16:14:04,699 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8413 states. [2019-12-07 16:14:04,700 INFO L276 IsEmpty]: Start isEmpty. Operand 8413 states. [2019-12-07 16:14:04,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 16:14:04,704 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:04,705 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 16:14:04,705 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:04,708 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:04,709 INFO L82 PathProgramCache]: Analyzing trace with hash 698534967, now seen corresponding path program 1 times [2019-12-07 16:14:04,714 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:04,715 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [787585152] [2019-12-07 16:14:04,715 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:04,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:04,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:04,852 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [787585152] [2019-12-07 16:14:04,853 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:04,853 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 16:14:04,854 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [212233931] [2019-12-07 16:14:04,857 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:14:04,857 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:04,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:14:04,867 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:04,868 INFO L87 Difference]: Start difference. First operand 8413 states. Second operand 3 states. [2019-12-07 16:14:05,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:05,056 INFO L93 Difference]: Finished difference Result 8365 states and 27377 transitions. [2019-12-07 16:14:05,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:14:05,058 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 16:14:05,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:05,124 INFO L225 Difference]: With dead ends: 8365 [2019-12-07 16:14:05,124 INFO L226 Difference]: Without dead ends: 8196 [2019-12-07 16:14:05,125 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:05,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8196 states. [2019-12-07 16:14:05,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8196 to 8196. [2019-12-07 16:14:05,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8196 states. [2019-12-07 16:14:05,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8196 states to 8196 states and 26857 transitions. [2019-12-07 16:14:05,414 INFO L78 Accepts]: Start accepts. Automaton has 8196 states and 26857 transitions. Word has length 5 [2019-12-07 16:14:05,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:05,415 INFO L462 AbstractCegarLoop]: Abstraction has 8196 states and 26857 transitions. [2019-12-07 16:14:05,415 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:14:05,415 INFO L276 IsEmpty]: Start isEmpty. Operand 8196 states and 26857 transitions. [2019-12-07 16:14:05,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 16:14:05,417 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:05,417 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:05,417 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:05,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:05,418 INFO L82 PathProgramCache]: Analyzing trace with hash 1108629868, now seen corresponding path program 1 times [2019-12-07 16:14:05,418 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:05,418 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [775539796] [2019-12-07 16:14:05,418 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:05,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:05,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:05,492 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [775539796] [2019-12-07 16:14:05,492 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:05,493 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:14:05,493 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1189446666] [2019-12-07 16:14:05,494 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:14:05,494 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:05,494 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:14:05,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:14:05,494 INFO L87 Difference]: Start difference. First operand 8196 states and 26857 transitions. Second operand 4 states. [2019-12-07 16:14:05,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:05,732 INFO L93 Difference]: Finished difference Result 13084 states and 41046 transitions. [2019-12-07 16:14:05,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:14:05,733 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 16:14:05,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:05,791 INFO L225 Difference]: With dead ends: 13084 [2019-12-07 16:14:05,792 INFO L226 Difference]: Without dead ends: 13077 [2019-12-07 16:14:05,792 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:14:05,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13077 states. [2019-12-07 16:14:06,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13077 to 11568. [2019-12-07 16:14:06,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11568 states. [2019-12-07 16:14:06,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11568 states to 11568 states and 36838 transitions. [2019-12-07 16:14:06,053 INFO L78 Accepts]: Start accepts. Automaton has 11568 states and 36838 transitions. Word has length 11 [2019-12-07 16:14:06,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:06,054 INFO L462 AbstractCegarLoop]: Abstraction has 11568 states and 36838 transitions. [2019-12-07 16:14:06,054 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:14:06,054 INFO L276 IsEmpty]: Start isEmpty. Operand 11568 states and 36838 transitions. [2019-12-07 16:14:06,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 16:14:06,056 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:06,056 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:06,056 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:06,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:06,056 INFO L82 PathProgramCache]: Analyzing trace with hash 531606898, now seen corresponding path program 1 times [2019-12-07 16:14:06,056 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:06,056 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1899069938] [2019-12-07 16:14:06,056 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:06,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:06,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:06,098 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1899069938] [2019-12-07 16:14:06,099 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:06,099 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:14:06,099 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1898939186] [2019-12-07 16:14:06,099 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:14:06,099 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:06,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:14:06,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:14:06,100 INFO L87 Difference]: Start difference. First operand 11568 states and 36838 transitions. Second operand 4 states. [2019-12-07 16:14:06,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:06,270 INFO L93 Difference]: Finished difference Result 14627 states and 46118 transitions. [2019-12-07 16:14:06,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:14:06,271 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 16:14:06,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:06,340 INFO L225 Difference]: With dead ends: 14627 [2019-12-07 16:14:06,340 INFO L226 Difference]: Without dead ends: 14627 [2019-12-07 16:14:06,340 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:14:06,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14627 states. [2019-12-07 16:14:06,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14627 to 12851. [2019-12-07 16:14:06,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12851 states. [2019-12-07 16:14:06,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12851 states to 12851 states and 40863 transitions. [2019-12-07 16:14:06,584 INFO L78 Accepts]: Start accepts. Automaton has 12851 states and 40863 transitions. Word has length 11 [2019-12-07 16:14:06,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:06,585 INFO L462 AbstractCegarLoop]: Abstraction has 12851 states and 40863 transitions. [2019-12-07 16:14:06,585 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:14:06,585 INFO L276 IsEmpty]: Start isEmpty. Operand 12851 states and 40863 transitions. [2019-12-07 16:14:06,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 16:14:06,587 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:06,588 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:06,588 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:06,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:06,588 INFO L82 PathProgramCache]: Analyzing trace with hash 1151367975, now seen corresponding path program 1 times [2019-12-07 16:14:06,588 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:06,588 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1976573778] [2019-12-07 16:14:06,588 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:06,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:06,664 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:06,664 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1976573778] [2019-12-07 16:14:06,664 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:06,664 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:14:06,664 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [799848637] [2019-12-07 16:14:06,665 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:14:06,665 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:06,665 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:14:06,665 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:14:06,665 INFO L87 Difference]: Start difference. First operand 12851 states and 40863 transitions. Second operand 6 states. [2019-12-07 16:14:07,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:07,031 INFO L93 Difference]: Finished difference Result 19831 states and 61491 transitions. [2019-12-07 16:14:07,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 16:14:07,032 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2019-12-07 16:14:07,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:07,064 INFO L225 Difference]: With dead ends: 19831 [2019-12-07 16:14:07,064 INFO L226 Difference]: Without dead ends: 19824 [2019-12-07 16:14:07,065 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2019-12-07 16:14:07,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19824 states. [2019-12-07 16:14:07,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19824 to 12776. [2019-12-07 16:14:07,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12776 states. [2019-12-07 16:14:07,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12776 states to 12776 states and 40560 transitions. [2019-12-07 16:14:07,299 INFO L78 Accepts]: Start accepts. Automaton has 12776 states and 40560 transitions. Word has length 17 [2019-12-07 16:14:07,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:07,299 INFO L462 AbstractCegarLoop]: Abstraction has 12776 states and 40560 transitions. [2019-12-07 16:14:07,299 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:14:07,299 INFO L276 IsEmpty]: Start isEmpty. Operand 12776 states and 40560 transitions. [2019-12-07 16:14:07,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 16:14:07,303 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:07,303 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:07,303 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:07,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:07,303 INFO L82 PathProgramCache]: Analyzing trace with hash 1216069865, now seen corresponding path program 1 times [2019-12-07 16:14:07,304 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:07,304 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1158012056] [2019-12-07 16:14:07,304 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:07,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:07,348 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:07,348 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1158012056] [2019-12-07 16:14:07,348 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:07,348 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:14:07,348 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1326057186] [2019-12-07 16:14:07,349 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:14:07,349 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:07,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:14:07,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:14:07,349 INFO L87 Difference]: Start difference. First operand 12776 states and 40560 transitions. Second operand 5 states. [2019-12-07 16:14:07,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:07,611 INFO L93 Difference]: Finished difference Result 15851 states and 49380 transitions. [2019-12-07 16:14:07,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:14:07,612 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 16:14:07,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:07,629 INFO L225 Difference]: With dead ends: 15851 [2019-12-07 16:14:07,629 INFO L226 Difference]: Without dead ends: 15851 [2019-12-07 16:14:07,629 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:14:07,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15851 states. [2019-12-07 16:14:07,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15851 to 12893. [2019-12-07 16:14:07,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12893 states. [2019-12-07 16:14:07,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12893 states to 12893 states and 40842 transitions. [2019-12-07 16:14:07,840 INFO L78 Accepts]: Start accepts. Automaton has 12893 states and 40842 transitions. Word has length 21 [2019-12-07 16:14:07,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:07,840 INFO L462 AbstractCegarLoop]: Abstraction has 12893 states and 40842 transitions. [2019-12-07 16:14:07,840 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:14:07,840 INFO L276 IsEmpty]: Start isEmpty. Operand 12893 states and 40842 transitions. [2019-12-07 16:14:07,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 16:14:07,848 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:07,848 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:07,848 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:07,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:07,848 INFO L82 PathProgramCache]: Analyzing trace with hash -2101636237, now seen corresponding path program 1 times [2019-12-07 16:14:07,849 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:07,849 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1613904659] [2019-12-07 16:14:07,849 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:07,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:07,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:07,874 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1613904659] [2019-12-07 16:14:07,874 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:07,874 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:14:07,874 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1013556995] [2019-12-07 16:14:07,874 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:14:07,875 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:07,875 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:14:07,875 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:07,875 INFO L87 Difference]: Start difference. First operand 12893 states and 40842 transitions. Second operand 3 states. [2019-12-07 16:14:07,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:07,949 INFO L93 Difference]: Finished difference Result 15714 states and 49927 transitions. [2019-12-07 16:14:07,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:14:07,949 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-12-07 16:14:07,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:07,968 INFO L225 Difference]: With dead ends: 15714 [2019-12-07 16:14:07,968 INFO L226 Difference]: Without dead ends: 15714 [2019-12-07 16:14:07,968 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:08,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15714 states. [2019-12-07 16:14:08,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15714 to 14811. [2019-12-07 16:14:08,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14811 states. [2019-12-07 16:14:08,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14811 states to 14811 states and 47236 transitions. [2019-12-07 16:14:08,199 INFO L78 Accepts]: Start accepts. Automaton has 14811 states and 47236 transitions. Word has length 25 [2019-12-07 16:14:08,200 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:08,200 INFO L462 AbstractCegarLoop]: Abstraction has 14811 states and 47236 transitions. [2019-12-07 16:14:08,200 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:14:08,200 INFO L276 IsEmpty]: Start isEmpty. Operand 14811 states and 47236 transitions. [2019-12-07 16:14:08,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 16:14:08,207 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:08,207 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:08,207 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:08,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:08,207 INFO L82 PathProgramCache]: Analyzing trace with hash -1939096541, now seen corresponding path program 1 times [2019-12-07 16:14:08,207 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:08,207 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1515163192] [2019-12-07 16:14:08,207 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:08,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:08,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:08,259 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1515163192] [2019-12-07 16:14:08,260 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:08,260 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:14:08,260 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1816492301] [2019-12-07 16:14:08,260 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:14:08,260 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:08,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:14:08,261 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:14:08,261 INFO L87 Difference]: Start difference. First operand 14811 states and 47236 transitions. Second operand 4 states. [2019-12-07 16:14:08,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:08,287 INFO L93 Difference]: Finished difference Result 2380 states and 5507 transitions. [2019-12-07 16:14:08,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:14:08,287 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 16:14:08,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:08,289 INFO L225 Difference]: With dead ends: 2380 [2019-12-07 16:14:08,289 INFO L226 Difference]: Without dead ends: 2094 [2019-12-07 16:14:08,290 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:14:08,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2094 states. [2019-12-07 16:14:08,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2094 to 2094. [2019-12-07 16:14:08,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2094 states. [2019-12-07 16:14:08,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2094 states to 2094 states and 4716 transitions. [2019-12-07 16:14:08,315 INFO L78 Accepts]: Start accepts. Automaton has 2094 states and 4716 transitions. Word has length 25 [2019-12-07 16:14:08,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:08,315 INFO L462 AbstractCegarLoop]: Abstraction has 2094 states and 4716 transitions. [2019-12-07 16:14:08,315 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:14:08,315 INFO L276 IsEmpty]: Start isEmpty. Operand 2094 states and 4716 transitions. [2019-12-07 16:14:08,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 16:14:08,317 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:08,317 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:08,317 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:08,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:08,317 INFO L82 PathProgramCache]: Analyzing trace with hash -673430796, now seen corresponding path program 1 times [2019-12-07 16:14:08,317 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:08,318 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1845290953] [2019-12-07 16:14:08,318 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:08,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:08,369 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:08,369 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1845290953] [2019-12-07 16:14:08,370 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:08,370 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:14:08,370 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [529063538] [2019-12-07 16:14:08,370 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:14:08,370 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:08,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:14:08,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:14:08,371 INFO L87 Difference]: Start difference. First operand 2094 states and 4716 transitions. Second operand 5 states. [2019-12-07 16:14:08,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:08,399 INFO L93 Difference]: Finished difference Result 429 states and 783 transitions. [2019-12-07 16:14:08,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:14:08,399 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-12-07 16:14:08,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:08,399 INFO L225 Difference]: With dead ends: 429 [2019-12-07 16:14:08,399 INFO L226 Difference]: Without dead ends: 383 [2019-12-07 16:14:08,400 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:14:08,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 383 states. [2019-12-07 16:14:08,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 383 to 348. [2019-12-07 16:14:08,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 348 states. [2019-12-07 16:14:08,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 628 transitions. [2019-12-07 16:14:08,403 INFO L78 Accepts]: Start accepts. Automaton has 348 states and 628 transitions. Word has length 37 [2019-12-07 16:14:08,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:08,403 INFO L462 AbstractCegarLoop]: Abstraction has 348 states and 628 transitions. [2019-12-07 16:14:08,403 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:14:08,403 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 628 transitions. [2019-12-07 16:14:08,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 16:14:08,404 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:08,404 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:08,404 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:08,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:08,404 INFO L82 PathProgramCache]: Analyzing trace with hash 939573543, now seen corresponding path program 1 times [2019-12-07 16:14:08,405 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:08,405 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [581230258] [2019-12-07 16:14:08,405 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:08,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:08,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:08,439 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [581230258] [2019-12-07 16:14:08,439 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:08,439 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:14:08,440 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1390127782] [2019-12-07 16:14:08,440 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:14:08,440 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:08,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:14:08,440 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:08,440 INFO L87 Difference]: Start difference. First operand 348 states and 628 transitions. Second operand 3 states. [2019-12-07 16:14:08,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:08,462 INFO L93 Difference]: Finished difference Result 352 states and 622 transitions. [2019-12-07 16:14:08,463 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:14:08,463 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-12-07 16:14:08,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:08,463 INFO L225 Difference]: With dead ends: 352 [2019-12-07 16:14:08,463 INFO L226 Difference]: Without dead ends: 352 [2019-12-07 16:14:08,463 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:08,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 352 states. [2019-12-07 16:14:08,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 352 to 344. [2019-12-07 16:14:08,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 344 states. [2019-12-07 16:14:08,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 344 states to 344 states and 614 transitions. [2019-12-07 16:14:08,466 INFO L78 Accepts]: Start accepts. Automaton has 344 states and 614 transitions. Word has length 52 [2019-12-07 16:14:08,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:08,466 INFO L462 AbstractCegarLoop]: Abstraction has 344 states and 614 transitions. [2019-12-07 16:14:08,466 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:14:08,467 INFO L276 IsEmpty]: Start isEmpty. Operand 344 states and 614 transitions. [2019-12-07 16:14:08,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 16:14:08,467 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:08,467 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:08,468 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:08,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:08,468 INFO L82 PathProgramCache]: Analyzing trace with hash 933754688, now seen corresponding path program 1 times [2019-12-07 16:14:08,468 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:08,468 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1475361031] [2019-12-07 16:14:08,468 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:08,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:08,525 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:08,525 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1475361031] [2019-12-07 16:14:08,525 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:08,525 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:14:08,526 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [405197185] [2019-12-07 16:14:08,526 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:14:08,526 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:08,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:14:08,526 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:14:08,526 INFO L87 Difference]: Start difference. First operand 344 states and 614 transitions. Second operand 6 states. [2019-12-07 16:14:08,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:08,698 INFO L93 Difference]: Finished difference Result 492 states and 884 transitions. [2019-12-07 16:14:08,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 16:14:08,699 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-07 16:14:08,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:08,700 INFO L225 Difference]: With dead ends: 492 [2019-12-07 16:14:08,700 INFO L226 Difference]: Without dead ends: 492 [2019-12-07 16:14:08,700 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:14:08,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 492 states. [2019-12-07 16:14:08,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 492 to 461. [2019-12-07 16:14:08,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 461 states. [2019-12-07 16:14:08,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 461 states to 461 states and 830 transitions. [2019-12-07 16:14:08,706 INFO L78 Accepts]: Start accepts. Automaton has 461 states and 830 transitions. Word has length 52 [2019-12-07 16:14:08,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:08,706 INFO L462 AbstractCegarLoop]: Abstraction has 461 states and 830 transitions. [2019-12-07 16:14:08,706 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:14:08,706 INFO L276 IsEmpty]: Start isEmpty. Operand 461 states and 830 transitions. [2019-12-07 16:14:08,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 16:14:08,707 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:08,707 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:08,707 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:08,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:08,707 INFO L82 PathProgramCache]: Analyzing trace with hash 1521577966, now seen corresponding path program 2 times [2019-12-07 16:14:08,707 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:08,708 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1191136149] [2019-12-07 16:14:08,708 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:08,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:08,793 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:08,793 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1191136149] [2019-12-07 16:14:08,793 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:08,793 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:14:08,794 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [477546699] [2019-12-07 16:14:08,794 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:14:08,794 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:08,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:14:08,794 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:14:08,794 INFO L87 Difference]: Start difference. First operand 461 states and 830 transitions. Second operand 6 states. [2019-12-07 16:14:09,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:09,008 INFO L93 Difference]: Finished difference Result 539 states and 931 transitions. [2019-12-07 16:14:09,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:14:09,008 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-07 16:14:09,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:09,009 INFO L225 Difference]: With dead ends: 539 [2019-12-07 16:14:09,009 INFO L226 Difference]: Without dead ends: 539 [2019-12-07 16:14:09,009 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:14:09,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2019-12-07 16:14:09,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 443. [2019-12-07 16:14:09,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 443 states. [2019-12-07 16:14:09,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 443 states to 443 states and 776 transitions. [2019-12-07 16:14:09,012 INFO L78 Accepts]: Start accepts. Automaton has 443 states and 776 transitions. Word has length 52 [2019-12-07 16:14:09,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:09,013 INFO L462 AbstractCegarLoop]: Abstraction has 443 states and 776 transitions. [2019-12-07 16:14:09,013 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:14:09,013 INFO L276 IsEmpty]: Start isEmpty. Operand 443 states and 776 transitions. [2019-12-07 16:14:09,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 16:14:09,013 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:09,013 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:09,014 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:09,014 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:09,014 INFO L82 PathProgramCache]: Analyzing trace with hash -1779624896, now seen corresponding path program 3 times [2019-12-07 16:14:09,014 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:09,014 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1018586052] [2019-12-07 16:14:09,014 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:09,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:09,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:09,093 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1018586052] [2019-12-07 16:14:09,094 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:09,094 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 16:14:09,094 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2088758980] [2019-12-07 16:14:09,094 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:14:09,094 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:09,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:14:09,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:14:09,094 INFO L87 Difference]: Start difference. First operand 443 states and 776 transitions. Second operand 7 states. [2019-12-07 16:14:09,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:09,350 INFO L93 Difference]: Finished difference Result 637 states and 1106 transitions. [2019-12-07 16:14:09,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 16:14:09,350 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-12-07 16:14:09,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:09,351 INFO L225 Difference]: With dead ends: 637 [2019-12-07 16:14:09,351 INFO L226 Difference]: Without dead ends: 637 [2019-12-07 16:14:09,351 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:14:09,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 637 states. [2019-12-07 16:14:09,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 637 to 443. [2019-12-07 16:14:09,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 443 states. [2019-12-07 16:14:09,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 443 states to 443 states and 776 transitions. [2019-12-07 16:14:09,355 INFO L78 Accepts]: Start accepts. Automaton has 443 states and 776 transitions. Word has length 52 [2019-12-07 16:14:09,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:09,355 INFO L462 AbstractCegarLoop]: Abstraction has 443 states and 776 transitions. [2019-12-07 16:14:09,355 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:14:09,355 INFO L276 IsEmpty]: Start isEmpty. Operand 443 states and 776 transitions. [2019-12-07 16:14:09,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 16:14:09,356 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:09,356 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:09,356 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:09,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:09,356 INFO L82 PathProgramCache]: Analyzing trace with hash 1595558797, now seen corresponding path program 1 times [2019-12-07 16:14:09,356 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:09,356 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1649238305] [2019-12-07 16:14:09,356 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:09,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:09,503 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:09,503 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1649238305] [2019-12-07 16:14:09,504 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:09,504 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 16:14:09,504 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2142038413] [2019-12-07 16:14:09,504 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 16:14:09,504 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:09,504 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 16:14:09,504 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-12-07 16:14:09,504 INFO L87 Difference]: Start difference. First operand 443 states and 776 transitions. Second operand 10 states. [2019-12-07 16:14:09,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:09,822 INFO L93 Difference]: Finished difference Result 647 states and 1118 transitions. [2019-12-07 16:14:09,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 16:14:09,822 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 53 [2019-12-07 16:14:09,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:09,823 INFO L225 Difference]: With dead ends: 647 [2019-12-07 16:14:09,823 INFO L226 Difference]: Without dead ends: 647 [2019-12-07 16:14:09,823 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 5 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=229, Unknown=0, NotChecked=0, Total=306 [2019-12-07 16:14:09,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 647 states. [2019-12-07 16:14:09,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 647 to 431. [2019-12-07 16:14:09,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 431 states. [2019-12-07 16:14:09,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 431 states to 431 states and 747 transitions. [2019-12-07 16:14:09,827 INFO L78 Accepts]: Start accepts. Automaton has 431 states and 747 transitions. Word has length 53 [2019-12-07 16:14:09,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:09,827 INFO L462 AbstractCegarLoop]: Abstraction has 431 states and 747 transitions. [2019-12-07 16:14:09,827 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 16:14:09,827 INFO L276 IsEmpty]: Start isEmpty. Operand 431 states and 747 transitions. [2019-12-07 16:14:09,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 16:14:09,828 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:09,828 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:09,828 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:09,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:09,829 INFO L82 PathProgramCache]: Analyzing trace with hash 165214383, now seen corresponding path program 2 times [2019-12-07 16:14:09,829 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:09,829 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1916913965] [2019-12-07 16:14:09,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:09,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:09,865 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:09,865 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1916913965] [2019-12-07 16:14:09,866 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:09,866 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:14:09,866 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [102430360] [2019-12-07 16:14:09,866 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:14:09,866 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:09,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:14:09,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:09,866 INFO L87 Difference]: Start difference. First operand 431 states and 747 transitions. Second operand 3 states. [2019-12-07 16:14:09,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:09,889 INFO L93 Difference]: Finished difference Result 430 states and 745 transitions. [2019-12-07 16:14:09,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:14:09,889 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 16:14:09,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:09,890 INFO L225 Difference]: With dead ends: 430 [2019-12-07 16:14:09,890 INFO L226 Difference]: Without dead ends: 430 [2019-12-07 16:14:09,890 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:09,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states. [2019-12-07 16:14:09,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 344. [2019-12-07 16:14:09,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 344 states. [2019-12-07 16:14:09,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 344 states to 344 states and 592 transitions. [2019-12-07 16:14:09,893 INFO L78 Accepts]: Start accepts. Automaton has 344 states and 592 transitions. Word has length 53 [2019-12-07 16:14:09,893 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:09,893 INFO L462 AbstractCegarLoop]: Abstraction has 344 states and 592 transitions. [2019-12-07 16:14:09,893 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:14:09,893 INFO L276 IsEmpty]: Start isEmpty. Operand 344 states and 592 transitions. [2019-12-07 16:14:09,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 16:14:09,894 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:09,894 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:09,894 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:09,894 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:09,894 INFO L82 PathProgramCache]: Analyzing trace with hash -798816837, now seen corresponding path program 1 times [2019-12-07 16:14:09,894 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:09,894 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1340369409] [2019-12-07 16:14:09,894 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:09,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:10,085 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:10,085 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1340369409] [2019-12-07 16:14:10,085 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:10,085 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 16:14:10,085 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1415508918] [2019-12-07 16:14:10,085 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 16:14:10,085 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:10,085 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 16:14:10,086 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:14:10,086 INFO L87 Difference]: Start difference. First operand 344 states and 592 transitions. Second operand 13 states. [2019-12-07 16:14:10,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:10,446 INFO L93 Difference]: Finished difference Result 655 states and 1129 transitions. [2019-12-07 16:14:10,446 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 16:14:10,446 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-12-07 16:14:10,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:10,446 INFO L225 Difference]: With dead ends: 655 [2019-12-07 16:14:10,446 INFO L226 Difference]: Without dead ends: 286 [2019-12-07 16:14:10,447 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=123, Invalid=339, Unknown=0, NotChecked=0, Total=462 [2019-12-07 16:14:10,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 286 states. [2019-12-07 16:14:10,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 286 to 257. [2019-12-07 16:14:10,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 257 states. [2019-12-07 16:14:10,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 257 states to 257 states and 426 transitions. [2019-12-07 16:14:10,449 INFO L78 Accepts]: Start accepts. Automaton has 257 states and 426 transitions. Word has length 54 [2019-12-07 16:14:10,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:10,449 INFO L462 AbstractCegarLoop]: Abstraction has 257 states and 426 transitions. [2019-12-07 16:14:10,449 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 16:14:10,449 INFO L276 IsEmpty]: Start isEmpty. Operand 257 states and 426 transitions. [2019-12-07 16:14:10,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 16:14:10,449 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:10,450 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:10,450 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:10,450 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:10,450 INFO L82 PathProgramCache]: Analyzing trace with hash -1642640547, now seen corresponding path program 2 times [2019-12-07 16:14:10,450 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:10,450 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784484619] [2019-12-07 16:14:10,450 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:10,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:10,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:10,529 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1784484619] [2019-12-07 16:14:10,529 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:10,529 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:14:10,529 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1744140162] [2019-12-07 16:14:10,530 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:14:10,530 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:14:10,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:14:10,530 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:14:10,530 INFO L87 Difference]: Start difference. First operand 257 states and 426 transitions. Second operand 7 states. [2019-12-07 16:14:10,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:10,597 INFO L93 Difference]: Finished difference Result 356 states and 571 transitions. [2019-12-07 16:14:10,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 16:14:10,598 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 54 [2019-12-07 16:14:10,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:10,598 INFO L225 Difference]: With dead ends: 356 [2019-12-07 16:14:10,598 INFO L226 Difference]: Without dead ends: 206 [2019-12-07 16:14:10,598 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:14:10,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2019-12-07 16:14:10,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 182. [2019-12-07 16:14:10,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2019-12-07 16:14:10,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 297 transitions. [2019-12-07 16:14:10,600 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 297 transitions. Word has length 54 [2019-12-07 16:14:10,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:10,600 INFO L462 AbstractCegarLoop]: Abstraction has 182 states and 297 transitions. [2019-12-07 16:14:10,600 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:14:10,600 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 297 transitions. [2019-12-07 16:14:10,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 16:14:10,601 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:10,601 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:10,601 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:10,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:10,601 INFO L82 PathProgramCache]: Analyzing trace with hash -1731930561, now seen corresponding path program 3 times [2019-12-07 16:14:10,601 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:14:10,601 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1830274815] [2019-12-07 16:14:10,601 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:10,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:14:10,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:14:10,664 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 16:14:10,664 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 16:14:10,666 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] ULTIMATE.startENTRY-->L789: Formula: (let ((.cse0 (store |v_#valid_42| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~z~0_122 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1613~0.base_19|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1613~0.base_19| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1613~0.base_19|) |v_ULTIMATE.start_main_~#t1613~0.offset_14| 0)) |v_#memory_int_15|) (= v_~y$mem_tmp~0_21 0) (= v_~y$r_buff1_thd1~0_178 0) (= 0 v_~__unbuffered_p1_EBX~0_131) (= v_~weak$$choice2~0_120 0) (= v_~__unbuffered_p1_EAX~0_131 0) (= v_~y$r_buff0_thd0~0_347 0) (= 0 v_~y$r_buff1_thd2~0_171) (= v_~x~0_94 0) (= 0 v_~weak$$choice0~0_15) (= v_~y$read_delayed~0_6 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1613~0.base_19| 4)) (= 0 v_~y$r_buff0_thd2~0_225) (= v_~main$tmp_guard0~0_28 0) (= 0 v_~__unbuffered_cnt~0_63) (= v_~y$r_buff0_thd1~0_109 0) (= v_~y$w_buff0_used~0_663 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1613~0.base_19|) 0) (= v_~y$w_buff1~0_180 0) (= |v_#valid_40| (store .cse0 |v_ULTIMATE.start_main_~#t1613~0.base_19| 1)) (= 0 v_~y$flush_delayed~0_36) (= |v_#NULL.offset_5| 0) (= |v_ULTIMATE.start_main_~#t1613~0.offset_14| 0) (= v_~y~0_158 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff1_thd0~0_274 0) (= 0 v_~y$w_buff0~0_245) (= v_~main$tmp_guard1~0_25 0) (= v_~y$w_buff1_used~0_350 0) (= 0 |v_#NULL.base_5|) (< 0 |v_#StackHeapBarrier_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ULTIMATE.start_main_~#t1614~0.base=|v_ULTIMATE.start_main_~#t1614~0.base_16|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_33|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_47|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_30|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_131, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_109, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_15|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_30|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_27|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_23|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_23|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_28|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_46|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ~y$w_buff1~0=v_~y$w_buff1~0_180, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_225, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_274, ~x~0=v_~x~0_94, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_663, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_~#t1614~0.offset=|v_ULTIMATE.start_main_~#t1614~0.offset_13|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_25|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_44|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_45|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_35|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_178, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_42|, ~y$w_buff0~0=v_~y$w_buff0~0_245, ULTIMATE.start_main_~#t1613~0.base=|v_ULTIMATE.start_main_~#t1613~0.base_19|, ~y~0=v_~y~0_158, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_131, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_31|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_30|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_28, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_34|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_171, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_16|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_347, ULTIMATE.start_main_~#t1613~0.offset=|v_ULTIMATE.start_main_~#t1613~0.offset_14|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_16|, ~z~0=v_~z~0_122, ~weak$$choice2~0=v_~weak$$choice2~0_120, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_350} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_~#t1614~0.base, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1614~0.offset, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ULTIMATE.start_main_~#t1613~0.base, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, ULTIMATE.start_main_~#t1613~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:14:10,667 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L789-1-->L791: Formula: (and (= (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1614~0.base_11| 1) |v_#valid_23|) (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1614~0.base_11|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1614~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1614~0.base_11|) |v_ULTIMATE.start_main_~#t1614~0.offset_10| 1)) |v_#memory_int_11|) (not (= |v_ULTIMATE.start_main_~#t1614~0.base_11| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1614~0.base_11|) (= |v_ULTIMATE.start_main_~#t1614~0.offset_10| 0) (= |v_#length_11| (store |v_#length_12| |v_ULTIMATE.start_main_~#t1614~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_12|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1614~0.offset=|v_ULTIMATE.start_main_~#t1614~0.offset_10|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_11|, ULTIMATE.start_main_~#t1614~0.base=|v_ULTIMATE.start_main_~#t1614~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1614~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1614~0.base] because there is no mapped edge [2019-12-07 16:14:10,667 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [589] [589] P1ENTRY-->L4-3: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_5 |v_P1Thread1of1ForFork1_#in~arg.base_7|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_7| v_P1Thread1of1ForFork1_~arg.offset_5) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5| (ite (not (and (not (= 0 (mod v_~y$w_buff1_used~0_47 256))) (not (= 0 (mod v_~y$w_buff0_used~0_86 256))))) 1 0)) (= 1 v_~y$w_buff0_used~0_86) (not (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 0)) (= 2 v_~y$w_buff0~0_19) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|) (= v_~y$w_buff0~0_20 v_~y$w_buff1~0_21) (= v_~y$w_buff1_used~0_47 v_~y$w_buff0_used~0_87)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_87, ~y$w_buff0~0=v_~y$w_buff0~0_20, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_86, ~y$w_buff1~0=v_~y$w_buff1~0_21, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_5, ~y$w_buff0~0=v_~y$w_buff0~0_19, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, P1Thread1of1ForFork1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~y$w_buff0~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:14:10,668 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L732-2-->L732-5: Formula: (let ((.cse0 (= |P0Thread1of1ForFork0_#t~ite4_Out-1920474300| |P0Thread1of1ForFork0_#t~ite3_Out-1920474300|)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1920474300 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In-1920474300 256)))) (or (and .cse0 (not .cse1) (= |P0Thread1of1ForFork0_#t~ite3_Out-1920474300| ~y$w_buff1~0_In-1920474300) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= |P0Thread1of1ForFork0_#t~ite3_Out-1920474300| ~y~0_In-1920474300)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1920474300, ~y$w_buff1~0=~y$w_buff1~0_In-1920474300, ~y~0=~y~0_In-1920474300, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1920474300} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1920474300, P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-1920474300|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-1920474300|, ~y$w_buff1~0=~y$w_buff1~0_In-1920474300, ~y~0=~y~0_In-1920474300, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1920474300} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 16:14:10,668 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L733-->L733-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1681407875 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-1681407875 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out-1681407875| 0)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out-1681407875| ~y$w_buff0_used~0_In-1681407875)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1681407875, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1681407875} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1681407875|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1681407875, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1681407875} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 16:14:10,669 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L734-->L734-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In-709717099 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-709717099 256))) (.cse3 (= (mod ~y$r_buff0_thd1~0_In-709717099 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-709717099 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-709717099 |P0Thread1of1ForFork0_#t~ite6_Out-709717099|) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-709717099|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-709717099, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-709717099, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-709717099, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-709717099} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-709717099|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-709717099, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-709717099, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-709717099, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-709717099} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 16:14:10,669 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L735-->L735-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-2004587879 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-2004587879 256)))) (or (and (= ~y$r_buff0_thd1~0_In-2004587879 |P0Thread1of1ForFork0_#t~ite7_Out-2004587879|) (or .cse0 .cse1)) (and (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-2004587879|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2004587879, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-2004587879} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2004587879, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-2004587879|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-2004587879} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 16:14:10,669 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L736-->L736-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-656467246 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-656467246 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-656467246 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd1~0_In-656467246 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-656467246| ~y$r_buff1_thd1~0_In-656467246)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out-656467246| 0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-656467246, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-656467246, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-656467246, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-656467246} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-656467246, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-656467246, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-656467246|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-656467246, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-656467246} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 16:14:10,669 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L736-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_30|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_125, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_29|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:14:10,669 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-467638876 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-467638876 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite11_Out-467638876| 0) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In-467638876 |P1Thread1of1ForFork1_#t~ite11_Out-467638876|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-467638876, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-467638876} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-467638876, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-467638876, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-467638876|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 16:14:10,670 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L768-->L768-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1666489730 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In-1666489730 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-1666489730 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1666489730 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-1666489730|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1666489730 |P1Thread1of1ForFork1_#t~ite12_Out-1666489730|) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1666489730, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1666489730, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1666489730, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1666489730} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1666489730, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1666489730, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1666489730, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1666489730|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1666489730} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 16:14:10,670 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L769-->L770: Formula: (let ((.cse1 (= ~y$r_buff0_thd2~0_Out771284310 ~y$r_buff0_thd2~0_In771284310)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In771284310 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In771284310 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse0) (= ~y$r_buff0_thd2~0_Out771284310 0) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In771284310, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In771284310} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In771284310, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_Out771284310, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out771284310|} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 16:14:10,670 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [667] [667] L770-->L770-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1415834365 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In-1415834365 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-1415834365 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1415834365 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out-1415834365| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$r_buff1_thd2~0_In-1415834365 |P1Thread1of1ForFork1_#t~ite14_Out-1415834365|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1415834365, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1415834365, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1415834365, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1415834365} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1415834365, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1415834365, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1415834365, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1415834365|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1415834365} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 16:14:10,670 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= v_~y$r_buff1_thd2~0_144 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_144, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 16:14:10,670 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L795-->L797-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_5 256))) (or (= 0 (mod v_~y$r_buff0_thd0~0_132 256)) (= 0 (mod v_~y$w_buff0_used~0_236 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_236, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_236, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 16:14:10,670 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L797-2-->L797-4: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In1177809829 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1177809829 256)))) (or (and (not .cse0) (not .cse1) (= ~y$w_buff1~0_In1177809829 |ULTIMATE.start_main_#t~ite17_Out1177809829|)) (and (or .cse0 .cse1) (= ~y~0_In1177809829 |ULTIMATE.start_main_#t~ite17_Out1177809829|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1177809829, ~y~0=~y~0_In1177809829, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1177809829, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1177809829} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out1177809829|, ~y$w_buff1~0=~y$w_buff1~0_In1177809829, ~y~0=~y~0_In1177809829, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1177809829, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1177809829} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 16:14:10,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [619] [619] L797-4-->L798: Formula: (= v_~y~0_44 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_7|, ~y~0=v_~y~0_44} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~y~0] because there is no mapped edge [2019-12-07 16:14:10,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [666] [666] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-1065303700 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1065303700 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite19_Out-1065303700|)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-1065303700 |ULTIMATE.start_main_#t~ite19_Out-1065303700|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1065303700, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1065303700} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1065303700, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1065303700|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1065303700} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 16:14:10,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L799-->L799-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-23964264 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-23964264 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-23964264 256))) (.cse2 (= (mod ~y$r_buff0_thd0~0_In-23964264 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite20_Out-23964264|)) (and (= |ULTIMATE.start_main_#t~ite20_Out-23964264| ~y$w_buff1_used~0_In-23964264) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-23964264, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-23964264, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-23964264, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-23964264} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-23964264, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-23964264, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-23964264|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-23964264, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-23964264} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 16:14:10,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In423115074 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In423115074 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out423115074|)) (and (= |ULTIMATE.start_main_#t~ite21_Out423115074| ~y$r_buff0_thd0~0_In423115074) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In423115074, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In423115074} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In423115074, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In423115074, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out423115074|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 16:14:10,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L801-->L801-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In2121957066 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In2121957066 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In2121957066 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In2121957066 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out2121957066|)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite22_Out2121957066| ~y$r_buff1_thd0~0_In2121957066) (or .cse2 .cse3)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2121957066, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2121957066, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2121957066, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2121957066} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2121957066, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2121957066, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2121957066, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out2121957066|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2121957066} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 16:14:10,673 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L812-->L812-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-2016231628 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-2016231628 256)))) (or (and (= 0 (mod ~y$r_buff1_thd0~0_In-2016231628 256)) .cse0) (and (= 0 (mod ~y$w_buff1_used~0_In-2016231628 256)) .cse0) (= (mod ~y$w_buff0_used~0_In-2016231628 256) 0))) .cse1 (= |ULTIMATE.start_main_#t~ite38_Out-2016231628| |ULTIMATE.start_main_#t~ite37_Out-2016231628|) (= ~y$w_buff1_used~0_In-2016231628 |ULTIMATE.start_main_#t~ite37_Out-2016231628|)) (and (not .cse1) (= ~y$w_buff1_used~0_In-2016231628 |ULTIMATE.start_main_#t~ite38_Out-2016231628|) (= |ULTIMATE.start_main_#t~ite37_In-2016231628| |ULTIMATE.start_main_#t~ite37_Out-2016231628|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2016231628, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2016231628, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_In-2016231628|, ~weak$$choice2~0=~weak$$choice2~0_In-2016231628, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2016231628, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2016231628} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2016231628, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2016231628, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-2016231628|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-2016231628|, ~weak$$choice2~0=~weak$$choice2~0_In-2016231628, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2016231628, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2016231628} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-07 16:14:10,673 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [607] [607] L813-->L814: Formula: (and (= v_~y$r_buff0_thd0~0_98 v_~y$r_buff0_thd0~0_97) (not (= 0 (mod v_~weak$$choice2~0_26 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_98, ~weak$$choice2~0=v_~weak$$choice2~0_26} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_6|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_10|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_97, ~weak$$choice2~0=v_~weak$$choice2~0_26} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-12-07 16:14:10,674 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L816-->L819-1: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7| (mod v_~main$tmp_guard1~0_16 256)) (not (= (mod v_~y$flush_delayed~0_27 256) 0)) (= v_~y~0_114 v_~y$mem_tmp~0_17) (= 0 v_~y$flush_delayed~0_26)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~y~0=v_~y~0_114, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_18|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:14:10,674 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [674] [674] L819-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 16:14:10,720 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 04:14:10 BasicIcfg [2019-12-07 16:14:10,720 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 16:14:10,720 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 16:14:10,720 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 16:14:10,720 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 16:14:10,720 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:14:01" (3/4) ... [2019-12-07 16:14:10,722 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 16:14:10,722 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] ULTIMATE.startENTRY-->L789: Formula: (let ((.cse0 (store |v_#valid_42| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~z~0_122 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1613~0.base_19|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1613~0.base_19| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1613~0.base_19|) |v_ULTIMATE.start_main_~#t1613~0.offset_14| 0)) |v_#memory_int_15|) (= v_~y$mem_tmp~0_21 0) (= v_~y$r_buff1_thd1~0_178 0) (= 0 v_~__unbuffered_p1_EBX~0_131) (= v_~weak$$choice2~0_120 0) (= v_~__unbuffered_p1_EAX~0_131 0) (= v_~y$r_buff0_thd0~0_347 0) (= 0 v_~y$r_buff1_thd2~0_171) (= v_~x~0_94 0) (= 0 v_~weak$$choice0~0_15) (= v_~y$read_delayed~0_6 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1613~0.base_19| 4)) (= 0 v_~y$r_buff0_thd2~0_225) (= v_~main$tmp_guard0~0_28 0) (= 0 v_~__unbuffered_cnt~0_63) (= v_~y$r_buff0_thd1~0_109 0) (= v_~y$w_buff0_used~0_663 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1613~0.base_19|) 0) (= v_~y$w_buff1~0_180 0) (= |v_#valid_40| (store .cse0 |v_ULTIMATE.start_main_~#t1613~0.base_19| 1)) (= 0 v_~y$flush_delayed~0_36) (= |v_#NULL.offset_5| 0) (= |v_ULTIMATE.start_main_~#t1613~0.offset_14| 0) (= v_~y~0_158 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff1_thd0~0_274 0) (= 0 v_~y$w_buff0~0_245) (= v_~main$tmp_guard1~0_25 0) (= v_~y$w_buff1_used~0_350 0) (= 0 |v_#NULL.base_5|) (< 0 |v_#StackHeapBarrier_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ULTIMATE.start_main_~#t1614~0.base=|v_ULTIMATE.start_main_~#t1614~0.base_16|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_33|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_47|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_30|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_131, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_109, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_15|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_30|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_27|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_23|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_23|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_28|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_46|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ~y$w_buff1~0=v_~y$w_buff1~0_180, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_225, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_274, ~x~0=v_~x~0_94, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_663, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_~#t1614~0.offset=|v_ULTIMATE.start_main_~#t1614~0.offset_13|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_25|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_44|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_45|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_35|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_178, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_42|, ~y$w_buff0~0=v_~y$w_buff0~0_245, ULTIMATE.start_main_~#t1613~0.base=|v_ULTIMATE.start_main_~#t1613~0.base_19|, ~y~0=v_~y~0_158, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_131, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_31|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_30|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_28, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_34|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_171, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_16|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_347, ULTIMATE.start_main_~#t1613~0.offset=|v_ULTIMATE.start_main_~#t1613~0.offset_14|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_16|, ~z~0=v_~z~0_122, ~weak$$choice2~0=v_~weak$$choice2~0_120, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_350} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_~#t1614~0.base, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1614~0.offset, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ULTIMATE.start_main_~#t1613~0.base, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, ULTIMATE.start_main_~#t1613~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:14:10,722 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L789-1-->L791: Formula: (and (= (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1614~0.base_11| 1) |v_#valid_23|) (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1614~0.base_11|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1614~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1614~0.base_11|) |v_ULTIMATE.start_main_~#t1614~0.offset_10| 1)) |v_#memory_int_11|) (not (= |v_ULTIMATE.start_main_~#t1614~0.base_11| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1614~0.base_11|) (= |v_ULTIMATE.start_main_~#t1614~0.offset_10| 0) (= |v_#length_11| (store |v_#length_12| |v_ULTIMATE.start_main_~#t1614~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_12|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1614~0.offset=|v_ULTIMATE.start_main_~#t1614~0.offset_10|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_11|, ULTIMATE.start_main_~#t1614~0.base=|v_ULTIMATE.start_main_~#t1614~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1614~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1614~0.base] because there is no mapped edge [2019-12-07 16:14:10,723 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [589] [589] P1ENTRY-->L4-3: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_5 |v_P1Thread1of1ForFork1_#in~arg.base_7|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_7| v_P1Thread1of1ForFork1_~arg.offset_5) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5| (ite (not (and (not (= 0 (mod v_~y$w_buff1_used~0_47 256))) (not (= 0 (mod v_~y$w_buff0_used~0_86 256))))) 1 0)) (= 1 v_~y$w_buff0_used~0_86) (not (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 0)) (= 2 v_~y$w_buff0~0_19) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|) (= v_~y$w_buff0~0_20 v_~y$w_buff1~0_21) (= v_~y$w_buff1_used~0_47 v_~y$w_buff0_used~0_87)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_87, ~y$w_buff0~0=v_~y$w_buff0~0_20, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_86, ~y$w_buff1~0=v_~y$w_buff1~0_21, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_5, ~y$w_buff0~0=v_~y$w_buff0~0_19, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, P1Thread1of1ForFork1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~y$w_buff0~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:14:10,723 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L732-2-->L732-5: Formula: (let ((.cse0 (= |P0Thread1of1ForFork0_#t~ite4_Out-1920474300| |P0Thread1of1ForFork0_#t~ite3_Out-1920474300|)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1920474300 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In-1920474300 256)))) (or (and .cse0 (not .cse1) (= |P0Thread1of1ForFork0_#t~ite3_Out-1920474300| ~y$w_buff1~0_In-1920474300) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= |P0Thread1of1ForFork0_#t~ite3_Out-1920474300| ~y~0_In-1920474300)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1920474300, ~y$w_buff1~0=~y$w_buff1~0_In-1920474300, ~y~0=~y~0_In-1920474300, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1920474300} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1920474300, P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-1920474300|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-1920474300|, ~y$w_buff1~0=~y$w_buff1~0_In-1920474300, ~y~0=~y~0_In-1920474300, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1920474300} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 16:14:10,723 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L733-->L733-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1681407875 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-1681407875 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out-1681407875| 0)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out-1681407875| ~y$w_buff0_used~0_In-1681407875)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1681407875, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1681407875} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1681407875|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1681407875, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1681407875} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 16:14:10,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L734-->L734-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In-709717099 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-709717099 256))) (.cse3 (= (mod ~y$r_buff0_thd1~0_In-709717099 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-709717099 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-709717099 |P0Thread1of1ForFork0_#t~ite6_Out-709717099|) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-709717099|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-709717099, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-709717099, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-709717099, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-709717099} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-709717099|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-709717099, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-709717099, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-709717099, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-709717099} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 16:14:10,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L735-->L735-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-2004587879 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-2004587879 256)))) (or (and (= ~y$r_buff0_thd1~0_In-2004587879 |P0Thread1of1ForFork0_#t~ite7_Out-2004587879|) (or .cse0 .cse1)) (and (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-2004587879|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2004587879, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-2004587879} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2004587879, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-2004587879|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-2004587879} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 16:14:10,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L736-->L736-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-656467246 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-656467246 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-656467246 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd1~0_In-656467246 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-656467246| ~y$r_buff1_thd1~0_In-656467246)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out-656467246| 0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-656467246, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-656467246, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-656467246, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-656467246} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-656467246, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-656467246, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-656467246|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-656467246, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-656467246} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 16:14:10,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L736-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_30|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_125, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_29|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:14:10,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-467638876 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-467638876 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite11_Out-467638876| 0) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In-467638876 |P1Thread1of1ForFork1_#t~ite11_Out-467638876|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-467638876, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-467638876} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-467638876, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-467638876, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-467638876|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 16:14:10,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L768-->L768-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1666489730 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In-1666489730 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-1666489730 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1666489730 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-1666489730|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1666489730 |P1Thread1of1ForFork1_#t~ite12_Out-1666489730|) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1666489730, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1666489730, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1666489730, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1666489730} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1666489730, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1666489730, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1666489730, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1666489730|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1666489730} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 16:14:10,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L769-->L770: Formula: (let ((.cse1 (= ~y$r_buff0_thd2~0_Out771284310 ~y$r_buff0_thd2~0_In771284310)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In771284310 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In771284310 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse0) (= ~y$r_buff0_thd2~0_Out771284310 0) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In771284310, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In771284310} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In771284310, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_Out771284310, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out771284310|} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 16:14:10,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [667] [667] L770-->L770-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1415834365 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In-1415834365 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-1415834365 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1415834365 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out-1415834365| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$r_buff1_thd2~0_In-1415834365 |P1Thread1of1ForFork1_#t~ite14_Out-1415834365|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1415834365, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1415834365, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1415834365, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1415834365} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1415834365, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1415834365, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1415834365, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1415834365|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1415834365} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 16:14:10,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= v_~y$r_buff1_thd2~0_144 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_144, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 16:14:10,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L795-->L797-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_5 256))) (or (= 0 (mod v_~y$r_buff0_thd0~0_132 256)) (= 0 (mod v_~y$w_buff0_used~0_236 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_236, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_236, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 16:14:10,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L797-2-->L797-4: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In1177809829 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1177809829 256)))) (or (and (not .cse0) (not .cse1) (= ~y$w_buff1~0_In1177809829 |ULTIMATE.start_main_#t~ite17_Out1177809829|)) (and (or .cse0 .cse1) (= ~y~0_In1177809829 |ULTIMATE.start_main_#t~ite17_Out1177809829|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1177809829, ~y~0=~y~0_In1177809829, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1177809829, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1177809829} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out1177809829|, ~y$w_buff1~0=~y$w_buff1~0_In1177809829, ~y~0=~y~0_In1177809829, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1177809829, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1177809829} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 16:14:10,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [619] [619] L797-4-->L798: Formula: (= v_~y~0_44 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_7|, ~y~0=v_~y~0_44} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~y~0] because there is no mapped edge [2019-12-07 16:14:10,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [666] [666] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-1065303700 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1065303700 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite19_Out-1065303700|)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-1065303700 |ULTIMATE.start_main_#t~ite19_Out-1065303700|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1065303700, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1065303700} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1065303700, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1065303700|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1065303700} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 16:14:10,726 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L799-->L799-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-23964264 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-23964264 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-23964264 256))) (.cse2 (= (mod ~y$r_buff0_thd0~0_In-23964264 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite20_Out-23964264|)) (and (= |ULTIMATE.start_main_#t~ite20_Out-23964264| ~y$w_buff1_used~0_In-23964264) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-23964264, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-23964264, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-23964264, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-23964264} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-23964264, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-23964264, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-23964264|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-23964264, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-23964264} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 16:14:10,726 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In423115074 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In423115074 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out423115074|)) (and (= |ULTIMATE.start_main_#t~ite21_Out423115074| ~y$r_buff0_thd0~0_In423115074) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In423115074, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In423115074} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In423115074, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In423115074, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out423115074|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 16:14:10,726 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L801-->L801-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In2121957066 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In2121957066 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In2121957066 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In2121957066 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out2121957066|)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite22_Out2121957066| ~y$r_buff1_thd0~0_In2121957066) (or .cse2 .cse3)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2121957066, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2121957066, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2121957066, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2121957066} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2121957066, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2121957066, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2121957066, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out2121957066|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2121957066} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 16:14:10,728 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L812-->L812-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-2016231628 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-2016231628 256)))) (or (and (= 0 (mod ~y$r_buff1_thd0~0_In-2016231628 256)) .cse0) (and (= 0 (mod ~y$w_buff1_used~0_In-2016231628 256)) .cse0) (= (mod ~y$w_buff0_used~0_In-2016231628 256) 0))) .cse1 (= |ULTIMATE.start_main_#t~ite38_Out-2016231628| |ULTIMATE.start_main_#t~ite37_Out-2016231628|) (= ~y$w_buff1_used~0_In-2016231628 |ULTIMATE.start_main_#t~ite37_Out-2016231628|)) (and (not .cse1) (= ~y$w_buff1_used~0_In-2016231628 |ULTIMATE.start_main_#t~ite38_Out-2016231628|) (= |ULTIMATE.start_main_#t~ite37_In-2016231628| |ULTIMATE.start_main_#t~ite37_Out-2016231628|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2016231628, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2016231628, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_In-2016231628|, ~weak$$choice2~0=~weak$$choice2~0_In-2016231628, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2016231628, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2016231628} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2016231628, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2016231628, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-2016231628|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-2016231628|, ~weak$$choice2~0=~weak$$choice2~0_In-2016231628, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2016231628, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2016231628} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-07 16:14:10,728 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [607] [607] L813-->L814: Formula: (and (= v_~y$r_buff0_thd0~0_98 v_~y$r_buff0_thd0~0_97) (not (= 0 (mod v_~weak$$choice2~0_26 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_98, ~weak$$choice2~0=v_~weak$$choice2~0_26} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_6|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_10|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_97, ~weak$$choice2~0=v_~weak$$choice2~0_26} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-12-07 16:14:10,728 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L816-->L819-1: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7| (mod v_~main$tmp_guard1~0_16 256)) (not (= (mod v_~y$flush_delayed~0_27 256) 0)) (= v_~y~0_114 v_~y$mem_tmp~0_17) (= 0 v_~y$flush_delayed~0_26)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~y~0=v_~y~0_114, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_18|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:14:10,728 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [674] [674] L819-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 16:14:10,779 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_b864a72c-5783-4daf-b28c-fb6c7b5495cd/bin/uautomizer/witness.graphml [2019-12-07 16:14:10,779 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 16:14:10,780 INFO L168 Benchmark]: Toolchain (without parser) took 9999.09 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 472.4 MB). Free memory was 938.2 MB in the beginning and 912.2 MB in the end (delta: 26.0 MB). Peak memory consumption was 498.4 MB. Max. memory is 11.5 GB. [2019-12-07 16:14:10,780 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:14:10,781 INFO L168 Benchmark]: CACSL2BoogieTranslator took 370.81 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 136.8 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -162.4 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 16:14:10,781 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.15 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 11.5 GB. [2019-12-07 16:14:10,781 INFO L168 Benchmark]: Boogie Preprocessor took 23.29 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:14:10,781 INFO L168 Benchmark]: RCFGBuilder took 389.55 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 52.0 MB). Peak memory consumption was 52.0 MB. Max. memory is 11.5 GB. [2019-12-07 16:14:10,782 INFO L168 Benchmark]: TraceAbstraction took 9115.09 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 335.5 MB). Free memory was 1.0 GB in the beginning and 941.0 MB in the end (delta: 100.4 MB). Peak memory consumption was 436.0 MB. Max. memory is 11.5 GB. [2019-12-07 16:14:10,782 INFO L168 Benchmark]: Witness Printer took 59.12 ms. Allocated memory is still 1.5 GB. Free memory was 941.0 MB in the beginning and 912.2 MB in the end (delta: 28.8 MB). Peak memory consumption was 28.8 MB. Max. memory is 11.5 GB. [2019-12-07 16:14:10,783 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 370.81 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 136.8 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -162.4 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.15 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.29 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 389.55 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 52.0 MB). Peak memory consumption was 52.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 9115.09 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 335.5 MB). Free memory was 1.0 GB in the beginning and 941.0 MB in the end (delta: 100.4 MB). Peak memory consumption was 436.0 MB. Max. memory is 11.5 GB. * Witness Printer took 59.12 ms. Allocated memory is still 1.5 GB. Free memory was 941.0 MB in the beginning and 912.2 MB in the end (delta: 28.8 MB). Peak memory consumption was 28.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.6s, 148 ProgramPointsBefore, 78 ProgramPointsAfterwards, 182 TransitionsBefore, 90 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 30 TrivialSequentialCompositions, 39 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 25 ChoiceCompositions, 3838 VarBasedMoverChecksPositive, 191 VarBasedMoverChecksNegative, 62 SemBasedMoverChecksPositive, 187 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 46553 CheckedPairsTotal, 101 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L789] FCALL, FORK 0 pthread_create(&t1613, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L791] FCALL, FORK 0 pthread_create(&t1614, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L751] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L752] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L753] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L754] 2 y$r_buff0_thd2 = (_Bool)1 [L757] 2 z = 1 [L760] 2 __unbuffered_p1_EAX = z [L763] 2 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L726] 1 x = 1 [L729] 1 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L732] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L732] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L766] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L733] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L734] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L735] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L766] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L767] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L768] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L793] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L798] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L799] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L800] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L801] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L804] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L805] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L806] 0 y$flush_delayed = weak$$choice2 [L807] 0 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L809] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L809] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L810] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L810] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L811] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L811] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L812] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L814] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L814] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L815] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 142 locations, 2 error locations. Result: UNSAFE, OverallTime: 8.9s, OverallIterations: 17, TraceHistogramMax: 1, AutomataDifference: 3.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1831 SDtfs, 1739 SDslu, 4155 SDs, 0 SdLazy, 2967 SolverSat, 162 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 142 GetRequests, 26 SyntacticMatches, 15 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 154 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=14811occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.5s AutomataMinimizationTime, 16 MinimizatonAttempts, 14913 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 628 NumberOfCodeBlocks, 628 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 558 ConstructedInterpolants, 0 QuantifiedInterpolants, 90840 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 16 InterpolantComputations, 16 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...