./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi003_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_42c8cc7b-6326-4def-9a88-380a209fc192/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_42c8cc7b-6326-4def-9a88-380a209fc192/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_42c8cc7b-6326-4def-9a88-380a209fc192/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_42c8cc7b-6326-4def-9a88-380a209fc192/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi003_tso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_42c8cc7b-6326-4def-9a88-380a209fc192/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_42c8cc7b-6326-4def-9a88-380a209fc192/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9376b435c3a080947be73b080a08fbb0ea62b520 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 16:32:48,814 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 16:32:48,815 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 16:32:48,822 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 16:32:48,823 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 16:32:48,823 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 16:32:48,824 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 16:32:48,826 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 16:32:48,827 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 16:32:48,827 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 16:32:48,828 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 16:32:48,829 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 16:32:48,829 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 16:32:48,830 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 16:32:48,830 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 16:32:48,831 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 16:32:48,832 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 16:32:48,832 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 16:32:48,834 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 16:32:48,835 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 16:32:48,836 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 16:32:48,837 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 16:32:48,837 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 16:32:48,838 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 16:32:48,840 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 16:32:48,840 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 16:32:48,840 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 16:32:48,840 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 16:32:48,841 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 16:32:48,841 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 16:32:48,841 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 16:32:48,842 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 16:32:48,842 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 16:32:48,843 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 16:32:48,843 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 16:32:48,843 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 16:32:48,844 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 16:32:48,844 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 16:32:48,844 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 16:32:48,844 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 16:32:48,845 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 16:32:48,845 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_42c8cc7b-6326-4def-9a88-380a209fc192/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 16:32:48,854 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 16:32:48,854 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 16:32:48,855 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 16:32:48,855 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 16:32:48,855 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 16:32:48,855 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 16:32:48,856 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 16:32:48,856 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 16:32:48,856 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 16:32:48,856 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 16:32:48,856 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 16:32:48,856 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 16:32:48,856 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 16:32:48,856 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 16:32:48,856 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 16:32:48,857 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 16:32:48,857 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 16:32:48,857 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 16:32:48,857 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 16:32:48,857 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 16:32:48,857 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 16:32:48,857 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:32:48,857 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 16:32:48,858 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 16:32:48,858 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 16:32:48,858 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 16:32:48,858 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 16:32:48,858 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 16:32:48,858 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 16:32:48,858 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_42c8cc7b-6326-4def-9a88-380a209fc192/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9376b435c3a080947be73b080a08fbb0ea62b520 [2019-12-07 16:32:48,961 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 16:32:48,970 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 16:32:48,973 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 16:32:48,974 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 16:32:48,975 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 16:32:48,975 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_42c8cc7b-6326-4def-9a88-380a209fc192/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/rfi003_tso.opt.i [2019-12-07 16:32:49,019 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_42c8cc7b-6326-4def-9a88-380a209fc192/bin/uautomizer/data/d5bb5a01a/88f3920c8a7647ffa99b84039d298995/FLAGf34e1727f [2019-12-07 16:32:49,494 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 16:32:49,494 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_42c8cc7b-6326-4def-9a88-380a209fc192/sv-benchmarks/c/pthread-wmm/rfi003_tso.opt.i [2019-12-07 16:32:49,505 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_42c8cc7b-6326-4def-9a88-380a209fc192/bin/uautomizer/data/d5bb5a01a/88f3920c8a7647ffa99b84039d298995/FLAGf34e1727f [2019-12-07 16:32:49,514 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_42c8cc7b-6326-4def-9a88-380a209fc192/bin/uautomizer/data/d5bb5a01a/88f3920c8a7647ffa99b84039d298995 [2019-12-07 16:32:49,516 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 16:32:49,517 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 16:32:49,517 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 16:32:49,518 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 16:32:49,520 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 16:32:49,520 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:32:49" (1/1) ... [2019-12-07 16:32:49,522 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@232ca86d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:32:49, skipping insertion in model container [2019-12-07 16:32:49,522 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:32:49" (1/1) ... [2019-12-07 16:32:49,527 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 16:32:49,555 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 16:32:49,810 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:32:49,818 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 16:32:49,871 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:32:49,918 INFO L208 MainTranslator]: Completed translation [2019-12-07 16:32:49,918 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:32:49 WrapperNode [2019-12-07 16:32:49,918 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 16:32:49,919 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 16:32:49,919 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 16:32:49,919 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 16:32:49,925 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:32:49" (1/1) ... [2019-12-07 16:32:49,941 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:32:49" (1/1) ... [2019-12-07 16:32:49,968 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 16:32:49,968 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 16:32:49,969 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 16:32:49,969 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 16:32:49,976 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:32:49" (1/1) ... [2019-12-07 16:32:49,976 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:32:49" (1/1) ... [2019-12-07 16:32:49,980 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:32:49" (1/1) ... [2019-12-07 16:32:49,980 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:32:49" (1/1) ... [2019-12-07 16:32:49,989 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:32:49" (1/1) ... [2019-12-07 16:32:49,994 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:32:49" (1/1) ... [2019-12-07 16:32:49,997 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:32:49" (1/1) ... [2019-12-07 16:32:50,001 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 16:32:50,001 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 16:32:50,001 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 16:32:50,001 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 16:32:50,002 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:32:49" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_42c8cc7b-6326-4def-9a88-380a209fc192/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:32:50,050 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 16:32:50,051 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 16:32:50,051 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 16:32:50,051 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 16:32:50,051 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 16:32:50,051 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 16:32:50,051 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 16:32:50,051 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 16:32:50,051 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 16:32:50,052 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 16:32:50,052 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 16:32:50,053 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 16:32:50,563 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 16:32:50,563 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 16:32:50,564 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:32:50 BoogieIcfgContainer [2019-12-07 16:32:50,564 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 16:32:50,565 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 16:32:50,565 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 16:32:50,568 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 16:32:50,568 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 04:32:49" (1/3) ... [2019-12-07 16:32:50,569 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1cea1950 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:32:50, skipping insertion in model container [2019-12-07 16:32:50,569 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:32:49" (2/3) ... [2019-12-07 16:32:50,569 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1cea1950 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:32:50, skipping insertion in model container [2019-12-07 16:32:50,570 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:32:50" (3/3) ... [2019-12-07 16:32:50,571 INFO L109 eAbstractionObserver]: Analyzing ICFG rfi003_tso.opt.i [2019-12-07 16:32:50,580 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 16:32:50,580 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 16:32:50,586 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 16:32:50,587 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 16:32:50,622 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,622 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,622 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,622 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,623 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,623 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,623 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,623 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,623 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,623 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,623 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,623 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,624 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,624 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,624 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,624 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,624 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,624 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,624 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,624 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,624 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,625 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,625 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,625 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,625 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,625 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,625 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,626 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,626 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,626 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,626 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,626 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,626 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,627 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,627 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,627 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,627 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,627 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,627 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,627 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,628 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,628 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,628 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,628 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,628 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,629 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,629 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,629 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,629 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,629 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,629 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,629 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,630 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,630 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,631 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,631 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,631 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,632 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,632 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,632 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,632 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,632 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,632 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,632 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,632 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,632 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,632 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,633 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,633 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,633 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,633 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,633 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,633 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,633 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,634 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,634 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,634 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,634 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,634 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,634 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,634 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,634 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,634 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,635 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,635 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,635 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,635 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,635 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,635 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,636 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,636 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,636 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,636 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,636 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,636 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,637 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,637 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,637 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,637 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,637 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,637 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,638 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,638 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,638 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,638 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,638 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,638 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,639 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,639 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,639 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,639 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,639 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,639 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,639 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,640 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,640 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,640 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,640 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,640 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,640 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,640 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,642 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,642 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,642 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,642 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,642 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,642 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,642 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,642 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,642 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,644 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,644 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,644 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,644 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,644 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,644 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,644 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,644 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,644 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,644 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,650 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,650 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,650 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,650 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,650 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,650 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,650 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,650 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,650 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,650 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,652 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,652 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,652 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,652 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,652 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,652 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,653 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,653 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,653 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,653 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,653 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,653 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,653 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,654 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,654 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,654 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,654 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,654 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,654 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,654 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,655 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,655 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,655 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,655 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,655 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,655 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,656 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,656 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,656 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,656 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,656 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,656 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,657 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,657 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,657 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,657 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,657 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,658 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,658 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,658 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,658 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:32:50,669 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 16:32:50,686 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 16:32:50,686 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 16:32:50,686 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 16:32:50,686 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 16:32:50,686 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 16:32:50,687 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 16:32:50,687 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 16:32:50,687 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 16:32:50,703 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 244 places, 326 transitions [2019-12-07 16:32:50,705 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 244 places, 326 transitions [2019-12-07 16:32:50,807 INFO L134 PetriNetUnfolder]: 89/324 cut-off events. [2019-12-07 16:32:50,807 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:32:50,826 INFO L76 FinitePrefix]: Finished finitePrefix Result has 331 conditions, 324 events. 89/324 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 1350 event pairs. 6/239 useless extension candidates. Maximal degree in co-relation 294. Up to 2 conditions per place. [2019-12-07 16:32:50,872 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 244 places, 326 transitions [2019-12-07 16:32:50,933 INFO L134 PetriNetUnfolder]: 89/324 cut-off events. [2019-12-07 16:32:50,933 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:32:50,948 INFO L76 FinitePrefix]: Finished finitePrefix Result has 331 conditions, 324 events. 89/324 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 1350 event pairs. 6/239 useless extension candidates. Maximal degree in co-relation 294. Up to 2 conditions per place. [2019-12-07 16:32:50,984 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 49222 [2019-12-07 16:32:50,985 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 16:32:54,835 WARN L192 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-12-07 16:32:54,986 INFO L206 etLargeBlockEncoding]: Checked pairs total: 282427 [2019-12-07 16:32:54,986 INFO L214 etLargeBlockEncoding]: Total number of compositions: 142 [2019-12-07 16:32:54,988 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 155 places, 192 transitions [2019-12-07 16:33:02,137 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 86906 states. [2019-12-07 16:33:02,138 INFO L276 IsEmpty]: Start isEmpty. Operand 86906 states. [2019-12-07 16:33:02,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 16:33:02,142 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:02,143 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 16:33:02,143 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:02,147 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:02,147 INFO L82 PathProgramCache]: Analyzing trace with hash 1352240646, now seen corresponding path program 1 times [2019-12-07 16:33:02,152 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:02,153 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1588728698] [2019-12-07 16:33:02,153 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:02,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:02,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:02,287 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1588728698] [2019-12-07 16:33:02,287 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:02,288 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 16:33:02,288 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [73122097] [2019-12-07 16:33:02,291 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:33:02,291 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:02,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:33:02,301 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:02,302 INFO L87 Difference]: Start difference. First operand 86906 states. Second operand 3 states. [2019-12-07 16:33:02,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:02,893 INFO L93 Difference]: Finished difference Result 86858 states and 312643 transitions. [2019-12-07 16:33:02,893 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:33:02,894 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 16:33:02,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:03,307 INFO L225 Difference]: With dead ends: 86858 [2019-12-07 16:33:03,307 INFO L226 Difference]: Without dead ends: 85058 [2019-12-07 16:33:03,308 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:05,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85058 states. [2019-12-07 16:33:06,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85058 to 85058. [2019-12-07 16:33:06,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85058 states. [2019-12-07 16:33:07,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85058 states to 85058 states and 306544 transitions. [2019-12-07 16:33:07,044 INFO L78 Accepts]: Start accepts. Automaton has 85058 states and 306544 transitions. Word has length 5 [2019-12-07 16:33:07,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:07,045 INFO L462 AbstractCegarLoop]: Abstraction has 85058 states and 306544 transitions. [2019-12-07 16:33:07,045 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:33:07,045 INFO L276 IsEmpty]: Start isEmpty. Operand 85058 states and 306544 transitions. [2019-12-07 16:33:07,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 16:33:07,046 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:07,046 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:07,047 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:07,047 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:07,047 INFO L82 PathProgramCache]: Analyzing trace with hash -2045261550, now seen corresponding path program 1 times [2019-12-07 16:33:07,047 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:07,047 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [243733063] [2019-12-07 16:33:07,047 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:07,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:07,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:07,105 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [243733063] [2019-12-07 16:33:07,105 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:07,105 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:33:07,105 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1027055961] [2019-12-07 16:33:07,106 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:33:07,106 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:07,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:33:07,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:33:07,107 INFO L87 Difference]: Start difference. First operand 85058 states and 306544 transitions. Second operand 4 states. [2019-12-07 16:33:08,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:08,044 INFO L93 Difference]: Finished difference Result 127330 states and 444666 transitions. [2019-12-07 16:33:08,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:33:08,044 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 16:33:08,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:08,296 INFO L225 Difference]: With dead ends: 127330 [2019-12-07 16:33:08,296 INFO L226 Difference]: Without dead ends: 127330 [2019-12-07 16:33:08,297 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:33:12,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127330 states. [2019-12-07 16:33:13,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127330 to 126190. [2019-12-07 16:33:13,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126190 states. [2019-12-07 16:33:13,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126190 states to 126190 states and 441366 transitions. [2019-12-07 16:33:13,923 INFO L78 Accepts]: Start accepts. Automaton has 126190 states and 441366 transitions. Word has length 11 [2019-12-07 16:33:13,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:13,923 INFO L462 AbstractCegarLoop]: Abstraction has 126190 states and 441366 transitions. [2019-12-07 16:33:13,923 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:33:13,923 INFO L276 IsEmpty]: Start isEmpty. Operand 126190 states and 441366 transitions. [2019-12-07 16:33:13,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 16:33:13,925 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:13,925 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:13,926 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:13,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:13,926 INFO L82 PathProgramCache]: Analyzing trace with hash 216920818, now seen corresponding path program 1 times [2019-12-07 16:33:13,926 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:13,926 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [532656654] [2019-12-07 16:33:13,926 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:13,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:13,970 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:13,970 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [532656654] [2019-12-07 16:33:13,970 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:13,970 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:33:13,970 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [172508808] [2019-12-07 16:33:13,970 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:33:13,971 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:13,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:33:13,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:33:13,971 INFO L87 Difference]: Start difference. First operand 126190 states and 441366 transitions. Second operand 4 states. [2019-12-07 16:33:14,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:14,960 INFO L93 Difference]: Finished difference Result 160605 states and 554475 transitions. [2019-12-07 16:33:14,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:33:14,961 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 16:33:14,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:15,286 INFO L225 Difference]: With dead ends: 160605 [2019-12-07 16:33:15,286 INFO L226 Difference]: Without dead ends: 160605 [2019-12-07 16:33:15,286 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:33:18,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160605 states. [2019-12-07 16:33:19,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160605 to 146194. [2019-12-07 16:33:19,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146194 states. [2019-12-07 16:33:20,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146194 states to 146194 states and 506713 transitions. [2019-12-07 16:33:20,240 INFO L78 Accepts]: Start accepts. Automaton has 146194 states and 506713 transitions. Word has length 11 [2019-12-07 16:33:20,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:20,240 INFO L462 AbstractCegarLoop]: Abstraction has 146194 states and 506713 transitions. [2019-12-07 16:33:20,240 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:33:20,240 INFO L276 IsEmpty]: Start isEmpty. Operand 146194 states and 506713 transitions. [2019-12-07 16:33:20,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 16:33:20,245 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:20,245 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:20,246 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:20,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:20,246 INFO L82 PathProgramCache]: Analyzing trace with hash -27958944, now seen corresponding path program 1 times [2019-12-07 16:33:20,246 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:20,246 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1268558711] [2019-12-07 16:33:20,246 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:20,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:20,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:20,304 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1268558711] [2019-12-07 16:33:20,305 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:20,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:33:20,305 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1606132226] [2019-12-07 16:33:20,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:33:20,305 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:20,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:33:20,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:33:20,306 INFO L87 Difference]: Start difference. First operand 146194 states and 506713 transitions. Second operand 5 states. [2019-12-07 16:33:21,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:21,678 INFO L93 Difference]: Finished difference Result 194428 states and 664127 transitions. [2019-12-07 16:33:21,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:33:21,679 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2019-12-07 16:33:21,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:22,019 INFO L225 Difference]: With dead ends: 194428 [2019-12-07 16:33:22,019 INFO L226 Difference]: Without dead ends: 194428 [2019-12-07 16:33:22,019 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:33:26,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194428 states. [2019-12-07 16:33:28,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194428 to 145942. [2019-12-07 16:33:28,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145942 states. [2019-12-07 16:33:28,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145942 states to 145942 states and 505733 transitions. [2019-12-07 16:33:28,852 INFO L78 Accepts]: Start accepts. Automaton has 145942 states and 505733 transitions. Word has length 17 [2019-12-07 16:33:28,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:28,852 INFO L462 AbstractCegarLoop]: Abstraction has 145942 states and 505733 transitions. [2019-12-07 16:33:28,852 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:33:28,852 INFO L276 IsEmpty]: Start isEmpty. Operand 145942 states and 505733 transitions. [2019-12-07 16:33:28,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 16:33:28,861 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:28,861 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:28,861 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:28,861 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:28,861 INFO L82 PathProgramCache]: Analyzing trace with hash -468341505, now seen corresponding path program 1 times [2019-12-07 16:33:28,861 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:28,862 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816104884] [2019-12-07 16:33:28,862 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:28,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:28,963 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:28,964 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [816104884] [2019-12-07 16:33:28,964 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:28,964 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:33:28,964 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [887807975] [2019-12-07 16:33:28,964 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:33:28,964 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:28,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:33:28,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:33:28,965 INFO L87 Difference]: Start difference. First operand 145942 states and 505733 transitions. Second operand 7 states. [2019-12-07 16:33:30,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:30,697 INFO L93 Difference]: Finished difference Result 212693 states and 721981 transitions. [2019-12-07 16:33:30,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 16:33:30,697 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2019-12-07 16:33:30,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:31,102 INFO L225 Difference]: With dead ends: 212693 [2019-12-07 16:33:31,102 INFO L226 Difference]: Without dead ends: 212675 [2019-12-07 16:33:31,103 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:33:34,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212675 states. [2019-12-07 16:33:36,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212675 to 198947. [2019-12-07 16:33:36,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198947 states. [2019-12-07 16:33:37,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198947 states to 198947 states and 679454 transitions. [2019-12-07 16:33:37,259 INFO L78 Accepts]: Start accepts. Automaton has 198947 states and 679454 transitions. Word has length 22 [2019-12-07 16:33:37,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:37,260 INFO L462 AbstractCegarLoop]: Abstraction has 198947 states and 679454 transitions. [2019-12-07 16:33:37,260 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:33:37,260 INFO L276 IsEmpty]: Start isEmpty. Operand 198947 states and 679454 transitions. [2019-12-07 16:33:37,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 16:33:37,277 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:37,277 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:37,277 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:37,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:37,278 INFO L82 PathProgramCache]: Analyzing trace with hash 724579748, now seen corresponding path program 1 times [2019-12-07 16:33:37,278 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:37,278 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1750970224] [2019-12-07 16:33:37,278 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:37,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:37,316 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:37,316 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1750970224] [2019-12-07 16:33:37,316 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:37,316 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:33:37,316 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2091941910] [2019-12-07 16:33:37,317 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:33:37,317 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:37,317 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:33:37,317 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:37,317 INFO L87 Difference]: Start difference. First operand 198947 states and 679454 transitions. Second operand 3 states. [2019-12-07 16:33:37,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:37,347 INFO L93 Difference]: Finished difference Result 9112 states and 21748 transitions. [2019-12-07 16:33:37,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:33:37,347 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-12-07 16:33:37,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:37,356 INFO L225 Difference]: With dead ends: 9112 [2019-12-07 16:33:37,356 INFO L226 Difference]: Without dead ends: 9112 [2019-12-07 16:33:37,356 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:37,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9112 states. [2019-12-07 16:33:37,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9112 to 9102. [2019-12-07 16:33:37,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9102 states. [2019-12-07 16:33:37,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9102 states to 9102 states and 21728 transitions. [2019-12-07 16:33:37,446 INFO L78 Accepts]: Start accepts. Automaton has 9102 states and 21728 transitions. Word has length 25 [2019-12-07 16:33:37,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:37,446 INFO L462 AbstractCegarLoop]: Abstraction has 9102 states and 21728 transitions. [2019-12-07 16:33:37,446 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:33:37,446 INFO L276 IsEmpty]: Start isEmpty. Operand 9102 states and 21728 transitions. [2019-12-07 16:33:37,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 16:33:37,448 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:37,448 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:37,448 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:37,448 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:37,448 INFO L82 PathProgramCache]: Analyzing trace with hash -1753070628, now seen corresponding path program 1 times [2019-12-07 16:33:37,449 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:37,449 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [299616473] [2019-12-07 16:33:37,449 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:37,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:37,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:37,555 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [299616473] [2019-12-07 16:33:37,555 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:37,555 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:33:37,556 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2019649388] [2019-12-07 16:33:37,556 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 16:33:37,556 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:37,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 16:33:37,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 16:33:37,557 INFO L87 Difference]: Start difference. First operand 9102 states and 21728 transitions. Second operand 8 states. [2019-12-07 16:33:38,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:38,370 INFO L93 Difference]: Finished difference Result 10813 states and 25588 transitions. [2019-12-07 16:33:38,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 16:33:38,371 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2019-12-07 16:33:38,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:38,379 INFO L225 Difference]: With dead ends: 10813 [2019-12-07 16:33:38,379 INFO L226 Difference]: Without dead ends: 10813 [2019-12-07 16:33:38,379 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:33:38,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10813 states. [2019-12-07 16:33:38,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10813 to 10278. [2019-12-07 16:33:38,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10278 states. [2019-12-07 16:33:38,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10278 states to 10278 states and 24484 transitions. [2019-12-07 16:33:38,478 INFO L78 Accepts]: Start accepts. Automaton has 10278 states and 24484 transitions. Word has length 34 [2019-12-07 16:33:38,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:38,478 INFO L462 AbstractCegarLoop]: Abstraction has 10278 states and 24484 transitions. [2019-12-07 16:33:38,478 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 16:33:38,479 INFO L276 IsEmpty]: Start isEmpty. Operand 10278 states and 24484 transitions. [2019-12-07 16:33:38,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-12-07 16:33:38,483 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:38,483 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:38,484 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:38,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:38,484 INFO L82 PathProgramCache]: Analyzing trace with hash 1451730190, now seen corresponding path program 1 times [2019-12-07 16:33:38,484 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:38,484 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [902249588] [2019-12-07 16:33:38,484 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:38,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:38,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:38,527 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [902249588] [2019-12-07 16:33:38,527 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:38,527 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:33:38,527 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [363179092] [2019-12-07 16:33:38,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:33:38,528 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:38,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:33:38,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:33:38,528 INFO L87 Difference]: Start difference. First operand 10278 states and 24484 transitions. Second operand 4 states. [2019-12-07 16:33:38,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:38,542 INFO L93 Difference]: Finished difference Result 3430 states and 7653 transitions. [2019-12-07 16:33:38,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:33:38,542 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 48 [2019-12-07 16:33:38,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:38,546 INFO L225 Difference]: With dead ends: 3430 [2019-12-07 16:33:38,546 INFO L226 Difference]: Without dead ends: 3430 [2019-12-07 16:33:38,546 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:33:38,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3430 states. [2019-12-07 16:33:38,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3430 to 3354. [2019-12-07 16:33:38,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3354 states. [2019-12-07 16:33:38,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3354 states to 3354 states and 7512 transitions. [2019-12-07 16:33:38,588 INFO L78 Accepts]: Start accepts. Automaton has 3354 states and 7512 transitions. Word has length 48 [2019-12-07 16:33:38,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:38,588 INFO L462 AbstractCegarLoop]: Abstraction has 3354 states and 7512 transitions. [2019-12-07 16:33:38,588 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:33:38,588 INFO L276 IsEmpty]: Start isEmpty. Operand 3354 states and 7512 transitions. [2019-12-07 16:33:38,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-12-07 16:33:38,593 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:38,593 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:38,593 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:38,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:38,593 INFO L82 PathProgramCache]: Analyzing trace with hash -1776556996, now seen corresponding path program 1 times [2019-12-07 16:33:38,594 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:38,594 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1644471520] [2019-12-07 16:33:38,594 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:38,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:38,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:38,657 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1644471520] [2019-12-07 16:33:38,657 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:38,657 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:33:38,657 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [236268107] [2019-12-07 16:33:38,657 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:33:38,658 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:38,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:33:38,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:38,658 INFO L87 Difference]: Start difference. First operand 3354 states and 7512 transitions. Second operand 3 states. [2019-12-07 16:33:38,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:38,685 INFO L93 Difference]: Finished difference Result 3354 states and 7437 transitions. [2019-12-07 16:33:38,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:33:38,685 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 93 [2019-12-07 16:33:38,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:38,688 INFO L225 Difference]: With dead ends: 3354 [2019-12-07 16:33:38,689 INFO L226 Difference]: Without dead ends: 3354 [2019-12-07 16:33:38,689 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:38,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3354 states. [2019-12-07 16:33:38,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3354 to 3354. [2019-12-07 16:33:38,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3354 states. [2019-12-07 16:33:38,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3354 states to 3354 states and 7437 transitions. [2019-12-07 16:33:38,730 INFO L78 Accepts]: Start accepts. Automaton has 3354 states and 7437 transitions. Word has length 93 [2019-12-07 16:33:38,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:38,730 INFO L462 AbstractCegarLoop]: Abstraction has 3354 states and 7437 transitions. [2019-12-07 16:33:38,731 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:33:38,731 INFO L276 IsEmpty]: Start isEmpty. Operand 3354 states and 7437 transitions. [2019-12-07 16:33:38,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-07 16:33:38,735 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:38,735 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:38,736 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:38,736 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:38,736 INFO L82 PathProgramCache]: Analyzing trace with hash 1261390719, now seen corresponding path program 1 times [2019-12-07 16:33:38,736 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:38,736 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [209027727] [2019-12-07 16:33:38,736 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:38,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:38,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:38,815 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [209027727] [2019-12-07 16:33:38,815 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:38,816 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 16:33:38,816 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1704736074] [2019-12-07 16:33:38,816 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:33:38,816 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:38,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:33:38,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:33:38,816 INFO L87 Difference]: Start difference. First operand 3354 states and 7437 transitions. Second operand 7 states. [2019-12-07 16:33:39,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:39,511 INFO L93 Difference]: Finished difference Result 4179 states and 9176 transitions. [2019-12-07 16:33:39,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 16:33:39,512 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-12-07 16:33:39,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:39,514 INFO L225 Difference]: With dead ends: 4179 [2019-12-07 16:33:39,514 INFO L226 Difference]: Without dead ends: 4179 [2019-12-07 16:33:39,515 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-12-07 16:33:39,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4179 states. [2019-12-07 16:33:39,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4179 to 3937. [2019-12-07 16:33:39,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3937 states. [2019-12-07 16:33:39,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3937 states to 3937 states and 8683 transitions. [2019-12-07 16:33:39,547 INFO L78 Accepts]: Start accepts. Automaton has 3937 states and 8683 transitions. Word has length 94 [2019-12-07 16:33:39,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:39,548 INFO L462 AbstractCegarLoop]: Abstraction has 3937 states and 8683 transitions. [2019-12-07 16:33:39,548 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:33:39,548 INFO L276 IsEmpty]: Start isEmpty. Operand 3937 states and 8683 transitions. [2019-12-07 16:33:39,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-07 16:33:39,552 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:39,552 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:39,552 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:39,553 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:39,553 INFO L82 PathProgramCache]: Analyzing trace with hash 870783717, now seen corresponding path program 2 times [2019-12-07 16:33:39,553 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:39,553 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1806073606] [2019-12-07 16:33:39,553 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:39,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:39,634 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:39,634 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1806073606] [2019-12-07 16:33:39,634 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:39,634 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:33:39,634 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [428465794] [2019-12-07 16:33:39,634 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:33:39,635 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:39,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:33:39,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:33:39,635 INFO L87 Difference]: Start difference. First operand 3937 states and 8683 transitions. Second operand 6 states. [2019-12-07 16:33:40,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:40,173 INFO L93 Difference]: Finished difference Result 4383 states and 9590 transitions. [2019-12-07 16:33:40,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:33:40,173 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-12-07 16:33:40,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:40,177 INFO L225 Difference]: With dead ends: 4383 [2019-12-07 16:33:40,177 INFO L226 Difference]: Without dead ends: 4383 [2019-12-07 16:33:40,178 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-12-07 16:33:40,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4383 states. [2019-12-07 16:33:40,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4383 to 4063. [2019-12-07 16:33:40,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4063 states. [2019-12-07 16:33:40,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4063 states to 4063 states and 8938 transitions. [2019-12-07 16:33:40,215 INFO L78 Accepts]: Start accepts. Automaton has 4063 states and 8938 transitions. Word has length 94 [2019-12-07 16:33:40,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:40,215 INFO L462 AbstractCegarLoop]: Abstraction has 4063 states and 8938 transitions. [2019-12-07 16:33:40,215 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:33:40,215 INFO L276 IsEmpty]: Start isEmpty. Operand 4063 states and 8938 transitions. [2019-12-07 16:33:40,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-07 16:33:40,220 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:40,220 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:40,220 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:40,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:40,220 INFO L82 PathProgramCache]: Analyzing trace with hash -75332823, now seen corresponding path program 3 times [2019-12-07 16:33:40,220 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:40,220 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [458215725] [2019-12-07 16:33:40,220 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:40,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:40,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:40,292 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [458215725] [2019-12-07 16:33:40,292 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:40,292 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:33:40,292 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [318323805] [2019-12-07 16:33:40,292 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:33:40,292 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:40,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:33:40,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:33:40,292 INFO L87 Difference]: Start difference. First operand 4063 states and 8938 transitions. Second operand 5 states. [2019-12-07 16:33:40,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:40,506 INFO L93 Difference]: Finished difference Result 4349 states and 9473 transitions. [2019-12-07 16:33:40,506 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 16:33:40,506 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-12-07 16:33:40,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:40,509 INFO L225 Difference]: With dead ends: 4349 [2019-12-07 16:33:40,509 INFO L226 Difference]: Without dead ends: 4349 [2019-12-07 16:33:40,509 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:33:40,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4349 states. [2019-12-07 16:33:40,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4349 to 4181. [2019-12-07 16:33:40,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4181 states. [2019-12-07 16:33:40,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4181 states to 4181 states and 9170 transitions. [2019-12-07 16:33:40,546 INFO L78 Accepts]: Start accepts. Automaton has 4181 states and 9170 transitions. Word has length 94 [2019-12-07 16:33:40,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:40,546 INFO L462 AbstractCegarLoop]: Abstraction has 4181 states and 9170 transitions. [2019-12-07 16:33:40,546 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:33:40,546 INFO L276 IsEmpty]: Start isEmpty. Operand 4181 states and 9170 transitions. [2019-12-07 16:33:40,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-07 16:33:40,551 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:40,551 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:40,551 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:40,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:40,551 INFO L82 PathProgramCache]: Analyzing trace with hash -391108213, now seen corresponding path program 4 times [2019-12-07 16:33:40,552 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:40,552 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [959272840] [2019-12-07 16:33:40,552 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:40,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:40,673 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:40,673 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [959272840] [2019-12-07 16:33:40,673 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:40,674 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 16:33:40,674 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [357908606] [2019-12-07 16:33:40,674 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 16:33:40,674 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:40,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 16:33:40,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2019-12-07 16:33:40,674 INFO L87 Difference]: Start difference. First operand 4181 states and 9170 transitions. Second operand 10 states. [2019-12-07 16:33:41,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:41,326 INFO L93 Difference]: Finished difference Result 5958 states and 13002 transitions. [2019-12-07 16:33:41,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 16:33:41,326 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 94 [2019-12-07 16:33:41,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:41,330 INFO L225 Difference]: With dead ends: 5958 [2019-12-07 16:33:41,330 INFO L226 Difference]: Without dead ends: 5958 [2019-12-07 16:33:41,330 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=160, Unknown=0, NotChecked=0, Total=210 [2019-12-07 16:33:41,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5958 states. [2019-12-07 16:33:41,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5958 to 4402. [2019-12-07 16:33:41,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4402 states. [2019-12-07 16:33:41,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4402 states to 4402 states and 9717 transitions. [2019-12-07 16:33:41,371 INFO L78 Accepts]: Start accepts. Automaton has 4402 states and 9717 transitions. Word has length 94 [2019-12-07 16:33:41,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:41,371 INFO L462 AbstractCegarLoop]: Abstraction has 4402 states and 9717 transitions. [2019-12-07 16:33:41,371 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 16:33:41,372 INFO L276 IsEmpty]: Start isEmpty. Operand 4402 states and 9717 transitions. [2019-12-07 16:33:41,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-07 16:33:41,376 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:41,376 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:41,376 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:41,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:41,376 INFO L82 PathProgramCache]: Analyzing trace with hash -1966199233, now seen corresponding path program 5 times [2019-12-07 16:33:41,376 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:41,376 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [860807513] [2019-12-07 16:33:41,377 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:41,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:41,450 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:41,450 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [860807513] [2019-12-07 16:33:41,450 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:41,450 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 16:33:41,450 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [494430298] [2019-12-07 16:33:41,451 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:33:41,451 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:41,451 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:33:41,451 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:33:41,451 INFO L87 Difference]: Start difference. First operand 4402 states and 9717 transitions. Second operand 7 states. [2019-12-07 16:33:41,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:41,950 INFO L93 Difference]: Finished difference Result 6324 states and 13798 transitions. [2019-12-07 16:33:41,951 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:33:41,951 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-12-07 16:33:41,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:41,955 INFO L225 Difference]: With dead ends: 6324 [2019-12-07 16:33:41,955 INFO L226 Difference]: Without dead ends: 6324 [2019-12-07 16:33:41,955 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:33:41,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6324 states. [2019-12-07 16:33:41,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6324 to 4537. [2019-12-07 16:33:41,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4537 states. [2019-12-07 16:33:41,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4537 states to 4537 states and 10044 transitions. [2019-12-07 16:33:41,999 INFO L78 Accepts]: Start accepts. Automaton has 4537 states and 10044 transitions. Word has length 94 [2019-12-07 16:33:41,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:41,999 INFO L462 AbstractCegarLoop]: Abstraction has 4537 states and 10044 transitions. [2019-12-07 16:33:41,999 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:33:41,999 INFO L276 IsEmpty]: Start isEmpty. Operand 4537 states and 10044 transitions. [2019-12-07 16:33:42,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-07 16:33:42,004 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:42,004 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:42,004 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:42,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:42,004 INFO L82 PathProgramCache]: Analyzing trace with hash -518893889, now seen corresponding path program 6 times [2019-12-07 16:33:42,004 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:42,005 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [79478757] [2019-12-07 16:33:42,005 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:42,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:42,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:42,073 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [79478757] [2019-12-07 16:33:42,073 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:42,073 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 16:33:42,074 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767311423] [2019-12-07 16:33:42,074 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:33:42,074 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:42,074 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:33:42,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:33:42,074 INFO L87 Difference]: Start difference. First operand 4537 states and 10044 transitions. Second operand 7 states. [2019-12-07 16:33:42,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:42,697 INFO L93 Difference]: Finished difference Result 6419 states and 14109 transitions. [2019-12-07 16:33:42,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 16:33:42,697 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-12-07 16:33:42,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:42,702 INFO L225 Difference]: With dead ends: 6419 [2019-12-07 16:33:42,702 INFO L226 Difference]: Without dead ends: 6419 [2019-12-07 16:33:42,702 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:33:42,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6419 states. [2019-12-07 16:33:42,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6419 to 4508. [2019-12-07 16:33:42,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4508 states. [2019-12-07 16:33:42,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4508 states to 4508 states and 9986 transitions. [2019-12-07 16:33:42,750 INFO L78 Accepts]: Start accepts. Automaton has 4508 states and 9986 transitions. Word has length 94 [2019-12-07 16:33:42,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:42,750 INFO L462 AbstractCegarLoop]: Abstraction has 4508 states and 9986 transitions. [2019-12-07 16:33:42,750 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:33:42,751 INFO L276 IsEmpty]: Start isEmpty. Operand 4508 states and 9986 transitions. [2019-12-07 16:33:42,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-07 16:33:42,757 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:42,758 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:42,758 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:42,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:42,758 INFO L82 PathProgramCache]: Analyzing trace with hash -1405936377, now seen corresponding path program 7 times [2019-12-07 16:33:42,758 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:42,758 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [843805005] [2019-12-07 16:33:42,759 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:42,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:42,842 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:42,842 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [843805005] [2019-12-07 16:33:42,842 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:42,842 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 16:33:42,842 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1465752493] [2019-12-07 16:33:42,842 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:33:42,843 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:42,843 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:33:42,843 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:33:42,843 INFO L87 Difference]: Start difference. First operand 4508 states and 9986 transitions. Second operand 7 states. [2019-12-07 16:33:43,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:43,143 INFO L93 Difference]: Finished difference Result 4725 states and 10373 transitions. [2019-12-07 16:33:43,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:33:43,143 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-12-07 16:33:43,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:43,146 INFO L225 Difference]: With dead ends: 4725 [2019-12-07 16:33:43,146 INFO L226 Difference]: Without dead ends: 4725 [2019-12-07 16:33:43,146 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-12-07 16:33:43,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4725 states. [2019-12-07 16:33:43,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4725 to 4514. [2019-12-07 16:33:43,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4514 states. [2019-12-07 16:33:43,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4514 states to 4514 states and 9997 transitions. [2019-12-07 16:33:43,184 INFO L78 Accepts]: Start accepts. Automaton has 4514 states and 9997 transitions. Word has length 94 [2019-12-07 16:33:43,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:43,184 INFO L462 AbstractCegarLoop]: Abstraction has 4514 states and 9997 transitions. [2019-12-07 16:33:43,184 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:33:43,184 INFO L276 IsEmpty]: Start isEmpty. Operand 4514 states and 9997 transitions. [2019-12-07 16:33:43,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-07 16:33:43,188 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:43,188 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:43,189 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:43,189 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:43,189 INFO L82 PathProgramCache]: Analyzing trace with hash 2049131019, now seen corresponding path program 8 times [2019-12-07 16:33:43,189 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:43,189 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1207482168] [2019-12-07 16:33:43,189 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:43,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:43,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:43,329 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1207482168] [2019-12-07 16:33:43,329 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:43,329 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 16:33:43,329 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1078325806] [2019-12-07 16:33:43,329 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 16:33:43,329 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:43,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 16:33:43,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:33:43,330 INFO L87 Difference]: Start difference. First operand 4514 states and 9997 transitions. Second operand 11 states. [2019-12-07 16:33:44,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:44,413 INFO L93 Difference]: Finished difference Result 7215 states and 16029 transitions. [2019-12-07 16:33:44,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 16:33:44,414 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 94 [2019-12-07 16:33:44,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:44,422 INFO L225 Difference]: With dead ends: 7215 [2019-12-07 16:33:44,422 INFO L226 Difference]: Without dead ends: 7215 [2019-12-07 16:33:44,423 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=239, Unknown=0, NotChecked=0, Total=306 [2019-12-07 16:33:44,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7215 states. [2019-12-07 16:33:44,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7215 to 4521. [2019-12-07 16:33:44,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4521 states. [2019-12-07 16:33:44,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4521 states to 4521 states and 10012 transitions. [2019-12-07 16:33:44,478 INFO L78 Accepts]: Start accepts. Automaton has 4521 states and 10012 transitions. Word has length 94 [2019-12-07 16:33:44,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:44,479 INFO L462 AbstractCegarLoop]: Abstraction has 4521 states and 10012 transitions. [2019-12-07 16:33:44,479 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 16:33:44,479 INFO L276 IsEmpty]: Start isEmpty. Operand 4521 states and 10012 transitions. [2019-12-07 16:33:44,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-07 16:33:44,484 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:44,484 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:44,484 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:44,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:44,484 INFO L82 PathProgramCache]: Analyzing trace with hash -774886645, now seen corresponding path program 9 times [2019-12-07 16:33:44,484 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:44,484 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1918529943] [2019-12-07 16:33:44,484 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:44,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:44,644 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:44,644 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1918529943] [2019-12-07 16:33:44,644 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:44,644 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 16:33:44,644 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2062663794] [2019-12-07 16:33:44,644 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 16:33:44,645 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:44,645 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 16:33:44,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:33:44,645 INFO L87 Difference]: Start difference. First operand 4521 states and 10012 transitions. Second operand 11 states. [2019-12-07 16:33:45,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:45,906 INFO L93 Difference]: Finished difference Result 8142 states and 18191 transitions. [2019-12-07 16:33:45,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 16:33:45,906 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 94 [2019-12-07 16:33:45,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:45,911 INFO L225 Difference]: With dead ends: 8142 [2019-12-07 16:33:45,912 INFO L226 Difference]: Without dead ends: 8142 [2019-12-07 16:33:45,912 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=92, Invalid=288, Unknown=0, NotChecked=0, Total=380 [2019-12-07 16:33:45,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8142 states. [2019-12-07 16:33:45,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8142 to 4491. [2019-12-07 16:33:45,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4491 states. [2019-12-07 16:33:45,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4491 states to 4491 states and 9940 transitions. [2019-12-07 16:33:45,961 INFO L78 Accepts]: Start accepts. Automaton has 4491 states and 9940 transitions. Word has length 94 [2019-12-07 16:33:45,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:45,961 INFO L462 AbstractCegarLoop]: Abstraction has 4491 states and 9940 transitions. [2019-12-07 16:33:45,961 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 16:33:45,961 INFO L276 IsEmpty]: Start isEmpty. Operand 4491 states and 9940 transitions. [2019-12-07 16:33:45,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-07 16:33:45,964 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:45,964 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:45,964 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:45,964 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:45,964 INFO L82 PathProgramCache]: Analyzing trace with hash 1665352587, now seen corresponding path program 10 times [2019-12-07 16:33:45,965 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:45,965 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [569788614] [2019-12-07 16:33:45,965 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:45,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:46,136 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:46,136 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [569788614] [2019-12-07 16:33:46,136 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:46,136 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 16:33:46,136 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [587046960] [2019-12-07 16:33:46,136 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 16:33:46,136 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:46,137 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 16:33:46,137 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:33:46,137 INFO L87 Difference]: Start difference. First operand 4491 states and 9940 transitions. Second operand 11 states. [2019-12-07 16:33:47,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:47,832 INFO L93 Difference]: Finished difference Result 8523 states and 19217 transitions. [2019-12-07 16:33:47,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 16:33:47,832 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 94 [2019-12-07 16:33:47,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:47,838 INFO L225 Difference]: With dead ends: 8523 [2019-12-07 16:33:47,838 INFO L226 Difference]: Without dead ends: 8523 [2019-12-07 16:33:47,839 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 6 SyntacticMatches, 3 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=136, Invalid=514, Unknown=0, NotChecked=0, Total=650 [2019-12-07 16:33:47,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8523 states. [2019-12-07 16:33:47,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8523 to 4377. [2019-12-07 16:33:47,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4377 states. [2019-12-07 16:33:47,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4377 states to 4377 states and 9654 transitions. [2019-12-07 16:33:47,890 INFO L78 Accepts]: Start accepts. Automaton has 4377 states and 9654 transitions. Word has length 94 [2019-12-07 16:33:47,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:47,890 INFO L462 AbstractCegarLoop]: Abstraction has 4377 states and 9654 transitions. [2019-12-07 16:33:47,890 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 16:33:47,890 INFO L276 IsEmpty]: Start isEmpty. Operand 4377 states and 9654 transitions. [2019-12-07 16:33:47,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-07 16:33:47,893 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:47,893 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:47,893 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:47,893 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:47,893 INFO L82 PathProgramCache]: Analyzing trace with hash -279723945, now seen corresponding path program 11 times [2019-12-07 16:33:47,893 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:47,893 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [758378027] [2019-12-07 16:33:47,893 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:47,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:47,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:47,960 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [758378027] [2019-12-07 16:33:47,961 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:47,961 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:33:47,961 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1118479046] [2019-12-07 16:33:47,961 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:33:47,961 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:47,962 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:33:47,962 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:33:47,962 INFO L87 Difference]: Start difference. First operand 4377 states and 9654 transitions. Second operand 6 states. [2019-12-07 16:33:48,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:48,389 INFO L93 Difference]: Finished difference Result 8753 states and 19088 transitions. [2019-12-07 16:33:48,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 16:33:48,389 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-12-07 16:33:48,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:48,394 INFO L225 Difference]: With dead ends: 8753 [2019-12-07 16:33:48,394 INFO L226 Difference]: Without dead ends: 8753 [2019-12-07 16:33:48,394 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:33:48,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8753 states. [2019-12-07 16:33:48,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8753 to 7246. [2019-12-07 16:33:48,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7246 states. [2019-12-07 16:33:48,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7246 states to 7246 states and 16147 transitions. [2019-12-07 16:33:48,461 INFO L78 Accepts]: Start accepts. Automaton has 7246 states and 16147 transitions. Word has length 94 [2019-12-07 16:33:48,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:48,462 INFO L462 AbstractCegarLoop]: Abstraction has 7246 states and 16147 transitions. [2019-12-07 16:33:48,462 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:33:48,462 INFO L276 IsEmpty]: Start isEmpty. Operand 7246 states and 16147 transitions. [2019-12-07 16:33:48,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-07 16:33:48,466 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:48,466 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:48,466 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:48,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:48,466 INFO L82 PathProgramCache]: Analyzing trace with hash -220649893, now seen corresponding path program 12 times [2019-12-07 16:33:48,467 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:48,467 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2063948148] [2019-12-07 16:33:48,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:48,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:48,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:48,531 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2063948148] [2019-12-07 16:33:48,531 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:48,531 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 16:33:48,532 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2002421880] [2019-12-07 16:33:48,532 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:33:48,532 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:48,532 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:33:48,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:33:48,533 INFO L87 Difference]: Start difference. First operand 7246 states and 16147 transitions. Second operand 7 states. [2019-12-07 16:33:49,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:49,026 INFO L93 Difference]: Finished difference Result 8755 states and 19091 transitions. [2019-12-07 16:33:49,026 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:33:49,026 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-12-07 16:33:49,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:49,032 INFO L225 Difference]: With dead ends: 8755 [2019-12-07 16:33:49,032 INFO L226 Difference]: Without dead ends: 8755 [2019-12-07 16:33:49,032 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:33:49,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8755 states. [2019-12-07 16:33:49,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8755 to 7240. [2019-12-07 16:33:49,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7240 states. [2019-12-07 16:33:49,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7240 states to 7240 states and 16135 transitions. [2019-12-07 16:33:49,106 INFO L78 Accepts]: Start accepts. Automaton has 7240 states and 16135 transitions. Word has length 94 [2019-12-07 16:33:49,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:49,106 INFO L462 AbstractCegarLoop]: Abstraction has 7240 states and 16135 transitions. [2019-12-07 16:33:49,106 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:33:49,106 INFO L276 IsEmpty]: Start isEmpty. Operand 7240 states and 16135 transitions. [2019-12-07 16:33:49,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-07 16:33:49,111 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:49,111 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:49,111 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:49,111 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:49,111 INFO L82 PathProgramCache]: Analyzing trace with hash 1723684063, now seen corresponding path program 13 times [2019-12-07 16:33:49,111 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:49,111 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159406512] [2019-12-07 16:33:49,111 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:49,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:49,173 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:49,174 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159406512] [2019-12-07 16:33:49,174 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:49,174 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 16:33:49,174 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [208024096] [2019-12-07 16:33:49,174 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:33:49,174 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:49,174 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:33:49,174 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:33:49,174 INFO L87 Difference]: Start difference. First operand 7240 states and 16135 transitions. Second operand 7 states. [2019-12-07 16:33:49,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:49,683 INFO L93 Difference]: Finished difference Result 17336 states and 38721 transitions. [2019-12-07 16:33:49,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:33:49,684 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-12-07 16:33:49,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:49,695 INFO L225 Difference]: With dead ends: 17336 [2019-12-07 16:33:49,695 INFO L226 Difference]: Without dead ends: 17336 [2019-12-07 16:33:49,695 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:33:49,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17336 states. [2019-12-07 16:33:49,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17336 to 7247. [2019-12-07 16:33:49,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7247 states. [2019-12-07 16:33:49,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7247 states to 7247 states and 16150 transitions. [2019-12-07 16:33:49,799 INFO L78 Accepts]: Start accepts. Automaton has 7247 states and 16150 transitions. Word has length 94 [2019-12-07 16:33:49,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:49,799 INFO L462 AbstractCegarLoop]: Abstraction has 7247 states and 16150 transitions. [2019-12-07 16:33:49,799 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:33:49,799 INFO L276 IsEmpty]: Start isEmpty. Operand 7247 states and 16150 transitions. [2019-12-07 16:33:49,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-07 16:33:49,803 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:49,804 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:49,804 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:49,804 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:49,804 INFO L82 PathProgramCache]: Analyzing trace with hash 616229605, now seen corresponding path program 1 times [2019-12-07 16:33:49,804 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:49,804 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1343349897] [2019-12-07 16:33:49,804 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:49,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:49,873 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:49,873 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1343349897] [2019-12-07 16:33:49,873 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:49,874 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 16:33:49,874 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1135569853] [2019-12-07 16:33:49,874 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 16:33:49,874 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:49,874 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 16:33:49,875 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-12-07 16:33:49,875 INFO L87 Difference]: Start difference. First operand 7247 states and 16150 transitions. Second operand 8 states. [2019-12-07 16:33:50,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:50,610 INFO L93 Difference]: Finished difference Result 7889 states and 17442 transitions. [2019-12-07 16:33:50,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:33:50,611 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 95 [2019-12-07 16:33:50,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:50,615 INFO L225 Difference]: With dead ends: 7889 [2019-12-07 16:33:50,616 INFO L226 Difference]: Without dead ends: 7889 [2019-12-07 16:33:50,616 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:33:50,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7889 states. [2019-12-07 16:33:50,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7889 to 7247. [2019-12-07 16:33:50,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7247 states. [2019-12-07 16:33:50,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7247 states to 7247 states and 16150 transitions. [2019-12-07 16:33:50,681 INFO L78 Accepts]: Start accepts. Automaton has 7247 states and 16150 transitions. Word has length 95 [2019-12-07 16:33:50,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:50,681 INFO L462 AbstractCegarLoop]: Abstraction has 7247 states and 16150 transitions. [2019-12-07 16:33:50,682 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 16:33:50,682 INFO L276 IsEmpty]: Start isEmpty. Operand 7247 states and 16150 transitions. [2019-12-07 16:33:50,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-07 16:33:50,686 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:50,686 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:50,686 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:50,686 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:50,686 INFO L82 PathProgramCache]: Analyzing trace with hash -808451493, now seen corresponding path program 1 times [2019-12-07 16:33:50,686 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:50,687 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1703223061] [2019-12-07 16:33:50,687 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:50,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:50,754 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:50,755 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1703223061] [2019-12-07 16:33:50,755 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:50,755 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:33:50,755 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1255244299] [2019-12-07 16:33:50,755 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:33:50,755 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:50,755 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:33:50,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:33:50,755 INFO L87 Difference]: Start difference. First operand 7247 states and 16150 transitions. Second operand 6 states. [2019-12-07 16:33:50,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:50,842 INFO L93 Difference]: Finished difference Result 11431 states and 25337 transitions. [2019-12-07 16:33:50,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:33:50,842 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-12-07 16:33:50,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:50,845 INFO L225 Difference]: With dead ends: 11431 [2019-12-07 16:33:50,845 INFO L226 Difference]: Without dead ends: 4176 [2019-12-07 16:33:50,845 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:33:50,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4176 states. [2019-12-07 16:33:50,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4176 to 4008. [2019-12-07 16:33:50,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4008 states. [2019-12-07 16:33:50,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4008 states to 4008 states and 8843 transitions. [2019-12-07 16:33:50,877 INFO L78 Accepts]: Start accepts. Automaton has 4008 states and 8843 transitions. Word has length 95 [2019-12-07 16:33:50,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:50,877 INFO L462 AbstractCegarLoop]: Abstraction has 4008 states and 8843 transitions. [2019-12-07 16:33:50,878 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:33:50,878 INFO L276 IsEmpty]: Start isEmpty. Operand 4008 states and 8843 transitions. [2019-12-07 16:33:50,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-07 16:33:50,880 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:50,880 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:50,880 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:50,880 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:50,880 INFO L82 PathProgramCache]: Analyzing trace with hash 51000766, now seen corresponding path program 1 times [2019-12-07 16:33:50,880 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:50,881 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1756063652] [2019-12-07 16:33:50,881 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:50,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:50,970 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:50,971 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1756063652] [2019-12-07 16:33:50,971 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:50,971 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 16:33:50,971 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1339263107] [2019-12-07 16:33:50,971 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 16:33:50,971 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:50,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 16:33:50,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 16:33:50,971 INFO L87 Difference]: Start difference. First operand 4008 states and 8843 transitions. Second operand 8 states. [2019-12-07 16:33:51,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:51,516 INFO L93 Difference]: Finished difference Result 4524 states and 9861 transitions. [2019-12-07 16:33:51,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 16:33:51,517 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 95 [2019-12-07 16:33:51,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:51,522 INFO L225 Difference]: With dead ends: 4524 [2019-12-07 16:33:51,522 INFO L226 Difference]: Without dead ends: 4524 [2019-12-07 16:33:51,523 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:33:51,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4524 states. [2019-12-07 16:33:51,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4524 to 3910. [2019-12-07 16:33:51,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3910 states. [2019-12-07 16:33:51,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3910 states to 3910 states and 8640 transitions. [2019-12-07 16:33:51,569 INFO L78 Accepts]: Start accepts. Automaton has 3910 states and 8640 transitions. Word has length 95 [2019-12-07 16:33:51,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:51,569 INFO L462 AbstractCegarLoop]: Abstraction has 3910 states and 8640 transitions. [2019-12-07 16:33:51,569 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 16:33:51,569 INFO L276 IsEmpty]: Start isEmpty. Operand 3910 states and 8640 transitions. [2019-12-07 16:33:51,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-07 16:33:51,571 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:51,571 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:51,571 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:51,571 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:51,572 INFO L82 PathProgramCache]: Analyzing trace with hash -62531706, now seen corresponding path program 2 times [2019-12-07 16:33:51,572 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:51,572 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1753272205] [2019-12-07 16:33:51,572 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:51,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:51,709 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:51,709 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1753272205] [2019-12-07 16:33:51,709 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:51,709 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 16:33:51,709 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [92889819] [2019-12-07 16:33:51,710 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 16:33:51,710 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:51,710 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 16:33:51,710 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:33:51,710 INFO L87 Difference]: Start difference. First operand 3910 states and 8640 transitions. Second operand 9 states. [2019-12-07 16:33:52,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:52,435 INFO L93 Difference]: Finished difference Result 6360 states and 13742 transitions. [2019-12-07 16:33:52,435 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 16:33:52,435 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 95 [2019-12-07 16:33:52,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:52,439 INFO L225 Difference]: With dead ends: 6360 [2019-12-07 16:33:52,439 INFO L226 Difference]: Without dead ends: 6360 [2019-12-07 16:33:52,439 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=178, Unknown=0, NotChecked=0, Total=240 [2019-12-07 16:33:52,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6360 states. [2019-12-07 16:33:52,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6360 to 4237. [2019-12-07 16:33:52,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4237 states. [2019-12-07 16:33:52,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4237 states to 4237 states and 9372 transitions. [2019-12-07 16:33:52,480 INFO L78 Accepts]: Start accepts. Automaton has 4237 states and 9372 transitions. Word has length 95 [2019-12-07 16:33:52,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:52,480 INFO L462 AbstractCegarLoop]: Abstraction has 4237 states and 9372 transitions. [2019-12-07 16:33:52,480 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 16:33:52,480 INFO L276 IsEmpty]: Start isEmpty. Operand 4237 states and 9372 transitions. [2019-12-07 16:33:52,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-07 16:33:52,483 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:52,484 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:52,484 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:52,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:52,484 INFO L82 PathProgramCache]: Analyzing trace with hash -1693003594, now seen corresponding path program 1 times [2019-12-07 16:33:52,484 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:52,484 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [171953370] [2019-12-07 16:33:52,484 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:52,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:52,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:52,802 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [171953370] [2019-12-07 16:33:52,802 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:52,802 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 16:33:52,802 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [443780502] [2019-12-07 16:33:52,802 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 16:33:52,803 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:52,803 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 16:33:52,803 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2019-12-07 16:33:52,803 INFO L87 Difference]: Start difference. First operand 4237 states and 9372 transitions. Second operand 15 states. [2019-12-07 16:33:53,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:53,784 INFO L93 Difference]: Finished difference Result 7402 states and 16253 transitions. [2019-12-07 16:33:53,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 16:33:53,784 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 96 [2019-12-07 16:33:53,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:53,788 INFO L225 Difference]: With dead ends: 7402 [2019-12-07 16:33:53,788 INFO L226 Difference]: Without dead ends: 5298 [2019-12-07 16:33:53,788 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=151, Invalid=551, Unknown=0, NotChecked=0, Total=702 [2019-12-07 16:33:53,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5298 states. [2019-12-07 16:33:53,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5298 to 4189. [2019-12-07 16:33:53,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4189 states. [2019-12-07 16:33:53,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4189 states to 4189 states and 9221 transitions. [2019-12-07 16:33:53,825 INFO L78 Accepts]: Start accepts. Automaton has 4189 states and 9221 transitions. Word has length 96 [2019-12-07 16:33:53,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:53,825 INFO L462 AbstractCegarLoop]: Abstraction has 4189 states and 9221 transitions. [2019-12-07 16:33:53,825 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 16:33:53,825 INFO L276 IsEmpty]: Start isEmpty. Operand 4189 states and 9221 transitions. [2019-12-07 16:33:53,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-07 16:33:53,828 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:53,828 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:53,828 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:53,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:53,828 INFO L82 PathProgramCache]: Analyzing trace with hash 988842447, now seen corresponding path program 1 times [2019-12-07 16:33:53,828 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:53,828 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1634409088] [2019-12-07 16:33:53,828 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:53,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:53,920 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:53,920 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1634409088] [2019-12-07 16:33:53,920 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:53,920 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 16:33:53,920 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [509922743] [2019-12-07 16:33:53,921 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 16:33:53,921 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:53,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 16:33:53,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 16:33:53,921 INFO L87 Difference]: Start difference. First operand 4189 states and 9221 transitions. Second operand 10 states. [2019-12-07 16:33:54,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:54,135 INFO L93 Difference]: Finished difference Result 6118 states and 13384 transitions. [2019-12-07 16:33:54,135 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 16:33:54,135 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 96 [2019-12-07 16:33:54,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:54,139 INFO L225 Difference]: With dead ends: 6118 [2019-12-07 16:33:54,139 INFO L226 Difference]: Without dead ends: 6089 [2019-12-07 16:33:54,139 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=219, Unknown=0, NotChecked=0, Total=272 [2019-12-07 16:33:54,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6089 states. [2019-12-07 16:33:54,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6089 to 5459. [2019-12-07 16:33:54,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5459 states. [2019-12-07 16:33:54,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5459 states to 5459 states and 12154 transitions. [2019-12-07 16:33:54,185 INFO L78 Accepts]: Start accepts. Automaton has 5459 states and 12154 transitions. Word has length 96 [2019-12-07 16:33:54,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:54,185 INFO L462 AbstractCegarLoop]: Abstraction has 5459 states and 12154 transitions. [2019-12-07 16:33:54,185 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 16:33:54,185 INFO L276 IsEmpty]: Start isEmpty. Operand 5459 states and 12154 transitions. [2019-12-07 16:33:54,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-07 16:33:54,188 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:54,188 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:54,188 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:54,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:54,189 INFO L82 PathProgramCache]: Analyzing trace with hash 46562021, now seen corresponding path program 1 times [2019-12-07 16:33:54,189 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:54,189 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1954396168] [2019-12-07 16:33:54,189 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:54,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:54,460 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:54,460 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1954396168] [2019-12-07 16:33:54,460 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:54,460 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 16:33:54,460 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1098490621] [2019-12-07 16:33:54,461 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 16:33:54,461 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:54,461 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 16:33:54,461 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=330, Unknown=0, NotChecked=0, Total=380 [2019-12-07 16:33:54,461 INFO L87 Difference]: Start difference. First operand 5459 states and 12154 transitions. Second operand 20 states. [2019-12-07 16:33:55,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:55,338 INFO L93 Difference]: Finished difference Result 13668 states and 30274 transitions. [2019-12-07 16:33:55,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 16:33:55,338 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 96 [2019-12-07 16:33:55,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:55,348 INFO L225 Difference]: With dead ends: 13668 [2019-12-07 16:33:55,348 INFO L226 Difference]: Without dead ends: 13570 [2019-12-07 16:33:55,348 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 161 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=134, Invalid=988, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 16:33:55,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13570 states. [2019-12-07 16:33:55,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13570 to 9182. [2019-12-07 16:33:55,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9182 states. [2019-12-07 16:33:55,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9182 states to 9182 states and 20754 transitions. [2019-12-07 16:33:55,445 INFO L78 Accepts]: Start accepts. Automaton has 9182 states and 20754 transitions. Word has length 96 [2019-12-07 16:33:55,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:55,445 INFO L462 AbstractCegarLoop]: Abstraction has 9182 states and 20754 transitions. [2019-12-07 16:33:55,445 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 16:33:55,445 INFO L276 IsEmpty]: Start isEmpty. Operand 9182 states and 20754 transitions. [2019-12-07 16:33:55,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-07 16:33:55,451 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:55,451 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:55,451 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:55,451 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:55,451 INFO L82 PathProgramCache]: Analyzing trace with hash -1099723688, now seen corresponding path program 1 times [2019-12-07 16:33:55,451 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:55,451 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1498531029] [2019-12-07 16:33:55,452 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:55,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:55,472 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:55,472 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1498531029] [2019-12-07 16:33:55,473 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:55,473 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:33:55,473 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1119851740] [2019-12-07 16:33:55,473 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:33:55,473 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:55,473 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:33:55,473 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:55,473 INFO L87 Difference]: Start difference. First operand 9182 states and 20754 transitions. Second operand 3 states. [2019-12-07 16:33:55,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:55,533 INFO L93 Difference]: Finished difference Result 8930 states and 18996 transitions. [2019-12-07 16:33:55,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:33:55,533 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 96 [2019-12-07 16:33:55,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:55,539 INFO L225 Difference]: With dead ends: 8930 [2019-12-07 16:33:55,539 INFO L226 Difference]: Without dead ends: 8930 [2019-12-07 16:33:55,539 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:55,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8930 states. [2019-12-07 16:33:55,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8930 to 7364. [2019-12-07 16:33:55,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7364 states. [2019-12-07 16:33:55,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7364 states to 7364 states and 15965 transitions. [2019-12-07 16:33:55,607 INFO L78 Accepts]: Start accepts. Automaton has 7364 states and 15965 transitions. Word has length 96 [2019-12-07 16:33:55,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:55,607 INFO L462 AbstractCegarLoop]: Abstraction has 7364 states and 15965 transitions. [2019-12-07 16:33:55,607 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:33:55,607 INFO L276 IsEmpty]: Start isEmpty. Operand 7364 states and 15965 transitions. [2019-12-07 16:33:55,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-07 16:33:55,612 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:55,612 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:55,612 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:55,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:55,612 INFO L82 PathProgramCache]: Analyzing trace with hash -1503879444, now seen corresponding path program 1 times [2019-12-07 16:33:55,612 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:55,613 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1255849569] [2019-12-07 16:33:55,613 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:55,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:55,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:55,658 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1255849569] [2019-12-07 16:33:55,658 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:55,658 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:33:55,658 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1086041148] [2019-12-07 16:33:55,658 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:33:55,658 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:55,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:33:55,659 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:33:55,659 INFO L87 Difference]: Start difference. First operand 7364 states and 15965 transitions. Second operand 5 states. [2019-12-07 16:33:55,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:55,859 INFO L93 Difference]: Finished difference Result 7465 states and 16049 transitions. [2019-12-07 16:33:55,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 16:33:55,859 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2019-12-07 16:33:55,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:55,864 INFO L225 Difference]: With dead ends: 7465 [2019-12-07 16:33:55,864 INFO L226 Difference]: Without dead ends: 7465 [2019-12-07 16:33:55,864 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:33:55,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7465 states. [2019-12-07 16:33:55,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7465 to 6814. [2019-12-07 16:33:55,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6814 states. [2019-12-07 16:33:55,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6814 states to 6814 states and 14702 transitions. [2019-12-07 16:33:55,921 INFO L78 Accepts]: Start accepts. Automaton has 6814 states and 14702 transitions. Word has length 96 [2019-12-07 16:33:55,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:55,921 INFO L462 AbstractCegarLoop]: Abstraction has 6814 states and 14702 transitions. [2019-12-07 16:33:55,921 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:33:55,921 INFO L276 IsEmpty]: Start isEmpty. Operand 6814 states and 14702 transitions. [2019-12-07 16:33:55,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-07 16:33:55,925 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:55,925 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:55,926 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:55,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:55,926 INFO L82 PathProgramCache]: Analyzing trace with hash -1326948752, now seen corresponding path program 2 times [2019-12-07 16:33:55,926 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:55,926 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361736506] [2019-12-07 16:33:55,926 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:55,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:56,009 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:56,009 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361736506] [2019-12-07 16:33:56,009 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:56,009 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 16:33:56,010 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [624390192] [2019-12-07 16:33:56,010 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 16:33:56,010 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:56,010 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 16:33:56,010 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:33:56,010 INFO L87 Difference]: Start difference. First operand 6814 states and 14702 transitions. Second operand 9 states. [2019-12-07 16:33:57,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:57,257 INFO L93 Difference]: Finished difference Result 8948 states and 18948 transitions. [2019-12-07 16:33:57,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 16:33:57,258 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 96 [2019-12-07 16:33:57,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:57,266 INFO L225 Difference]: With dead ends: 8948 [2019-12-07 16:33:57,266 INFO L226 Difference]: Without dead ends: 8948 [2019-12-07 16:33:57,267 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=137, Unknown=0, NotChecked=0, Total=182 [2019-12-07 16:33:57,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8948 states. [2019-12-07 16:33:57,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8948 to 7434. [2019-12-07 16:33:57,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7434 states. [2019-12-07 16:33:57,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7434 states to 7434 states and 15926 transitions. [2019-12-07 16:33:57,341 INFO L78 Accepts]: Start accepts. Automaton has 7434 states and 15926 transitions. Word has length 96 [2019-12-07 16:33:57,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:57,341 INFO L462 AbstractCegarLoop]: Abstraction has 7434 states and 15926 transitions. [2019-12-07 16:33:57,341 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 16:33:57,341 INFO L276 IsEmpty]: Start isEmpty. Operand 7434 states and 15926 transitions. [2019-12-07 16:33:57,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-07 16:33:57,346 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:57,346 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:57,346 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:57,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:57,346 INFO L82 PathProgramCache]: Analyzing trace with hash 1438414068, now seen corresponding path program 3 times [2019-12-07 16:33:57,346 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:57,346 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1056882727] [2019-12-07 16:33:57,346 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:57,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:57,432 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:57,432 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1056882727] [2019-12-07 16:33:57,432 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:57,433 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 16:33:57,433 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [282277727] [2019-12-07 16:33:57,433 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 16:33:57,433 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:57,433 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 16:33:57,433 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2019-12-07 16:33:57,433 INFO L87 Difference]: Start difference. First operand 7434 states and 15926 transitions. Second operand 10 states. [2019-12-07 16:33:58,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:58,014 INFO L93 Difference]: Finished difference Result 9844 states and 20791 transitions. [2019-12-07 16:33:58,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 16:33:58,014 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 96 [2019-12-07 16:33:58,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:58,019 INFO L225 Difference]: With dead ends: 9844 [2019-12-07 16:33:58,019 INFO L226 Difference]: Without dead ends: 9844 [2019-12-07 16:33:58,020 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=63, Invalid=209, Unknown=0, NotChecked=0, Total=272 [2019-12-07 16:33:58,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9844 states. [2019-12-07 16:33:58,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9844 to 7398. [2019-12-07 16:33:58,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7398 states. [2019-12-07 16:33:58,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7398 states to 7398 states and 15854 transitions. [2019-12-07 16:33:58,085 INFO L78 Accepts]: Start accepts. Automaton has 7398 states and 15854 transitions. Word has length 96 [2019-12-07 16:33:58,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:58,085 INFO L462 AbstractCegarLoop]: Abstraction has 7398 states and 15854 transitions. [2019-12-07 16:33:58,085 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 16:33:58,086 INFO L276 IsEmpty]: Start isEmpty. Operand 7398 states and 15854 transitions. [2019-12-07 16:33:58,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2019-12-07 16:33:58,090 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:58,090 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:58,090 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:58,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:58,090 INFO L82 PathProgramCache]: Analyzing trace with hash 1056931491, now seen corresponding path program 1 times [2019-12-07 16:33:58,091 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:58,091 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1875025146] [2019-12-07 16:33:58,091 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:58,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:58,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:58,229 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1875025146] [2019-12-07 16:33:58,229 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:58,229 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 16:33:58,229 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [211868454] [2019-12-07 16:33:58,229 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 16:33:58,229 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:58,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 16:33:58,230 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:33:58,230 INFO L87 Difference]: Start difference. First operand 7398 states and 15854 transitions. Second operand 13 states. [2019-12-07 16:33:58,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:58,597 INFO L93 Difference]: Finished difference Result 8156 states and 17197 transitions. [2019-12-07 16:33:58,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 16:33:58,597 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 97 [2019-12-07 16:33:58,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:58,602 INFO L225 Difference]: With dead ends: 8156 [2019-12-07 16:33:58,602 INFO L226 Difference]: Without dead ends: 8049 [2019-12-07 16:33:58,603 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=378, Unknown=0, NotChecked=0, Total=462 [2019-12-07 16:33:58,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8049 states. [2019-12-07 16:33:58,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8049 to 6176. [2019-12-07 16:33:58,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6176 states. [2019-12-07 16:33:58,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6176 states to 6176 states and 13431 transitions. [2019-12-07 16:33:58,667 INFO L78 Accepts]: Start accepts. Automaton has 6176 states and 13431 transitions. Word has length 97 [2019-12-07 16:33:58,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:58,667 INFO L462 AbstractCegarLoop]: Abstraction has 6176 states and 13431 transitions. [2019-12-07 16:33:58,667 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 16:33:58,667 INFO L276 IsEmpty]: Start isEmpty. Operand 6176 states and 13431 transitions. [2019-12-07 16:33:58,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2019-12-07 16:33:58,671 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:58,671 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:58,671 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:58,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:58,671 INFO L82 PathProgramCache]: Analyzing trace with hash -1635016551, now seen corresponding path program 1 times [2019-12-07 16:33:58,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:58,671 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1028768288] [2019-12-07 16:33:58,671 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:58,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:58,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:58,807 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1028768288] [2019-12-07 16:33:58,807 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:58,807 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 16:33:58,807 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [884867132] [2019-12-07 16:33:58,807 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 16:33:58,808 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:58,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 16:33:58,808 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:33:58,808 INFO L87 Difference]: Start difference. First operand 6176 states and 13431 transitions. Second operand 12 states. [2019-12-07 16:34:00,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:00,464 INFO L93 Difference]: Finished difference Result 8075 states and 17142 transitions. [2019-12-07 16:34:00,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 16:34:00,464 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 97 [2019-12-07 16:34:00,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:00,470 INFO L225 Difference]: With dead ends: 8075 [2019-12-07 16:34:00,470 INFO L226 Difference]: Without dead ends: 7842 [2019-12-07 16:34:00,470 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 6 SyntacticMatches, 5 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2019-12-07 16:34:00,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7842 states. [2019-12-07 16:34:00,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7842 to 6828. [2019-12-07 16:34:00,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6828 states. [2019-12-07 16:34:00,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6828 states to 6828 states and 14746 transitions. [2019-12-07 16:34:00,534 INFO L78 Accepts]: Start accepts. Automaton has 6828 states and 14746 transitions. Word has length 97 [2019-12-07 16:34:00,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:00,534 INFO L462 AbstractCegarLoop]: Abstraction has 6828 states and 14746 transitions. [2019-12-07 16:34:00,534 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 16:34:00,535 INFO L276 IsEmpty]: Start isEmpty. Operand 6828 states and 14746 transitions. [2019-12-07 16:34:00,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2019-12-07 16:34:00,539 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:00,539 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:00,539 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:00,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:00,540 INFO L82 PathProgramCache]: Analyzing trace with hash -31754595, now seen corresponding path program 2 times [2019-12-07 16:34:00,540 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:00,540 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [150149901] [2019-12-07 16:34:00,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:00,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:00,658 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:00,659 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [150149901] [2019-12-07 16:34:00,659 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:00,659 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:34:00,659 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1619024819] [2019-12-07 16:34:00,659 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:34:00,659 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:00,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:34:00,660 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:34:00,660 INFO L87 Difference]: Start difference. First operand 6828 states and 14746 transitions. Second operand 7 states. [2019-12-07 16:34:00,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:00,726 INFO L93 Difference]: Finished difference Result 6820 states and 14732 transitions. [2019-12-07 16:34:00,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:34:00,727 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 97 [2019-12-07 16:34:00,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:00,731 INFO L225 Difference]: With dead ends: 6820 [2019-12-07 16:34:00,731 INFO L226 Difference]: Without dead ends: 6497 [2019-12-07 16:34:00,732 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 5 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:34:00,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6497 states. [2019-12-07 16:34:00,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6497 to 4934. [2019-12-07 16:34:00,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4934 states. [2019-12-07 16:34:00,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4934 states to 4934 states and 10895 transitions. [2019-12-07 16:34:00,782 INFO L78 Accepts]: Start accepts. Automaton has 4934 states and 10895 transitions. Word has length 97 [2019-12-07 16:34:00,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:00,783 INFO L462 AbstractCegarLoop]: Abstraction has 4934 states and 10895 transitions. [2019-12-07 16:34:00,783 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:34:00,783 INFO L276 IsEmpty]: Start isEmpty. Operand 4934 states and 10895 transitions. [2019-12-07 16:34:00,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2019-12-07 16:34:00,786 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:00,786 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:00,786 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:00,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:00,786 INFO L82 PathProgramCache]: Analyzing trace with hash 361616868, now seen corresponding path program 1 times [2019-12-07 16:34:00,786 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:00,786 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1375087356] [2019-12-07 16:34:00,786 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:00,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:00,868 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:00,868 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1375087356] [2019-12-07 16:34:00,869 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:00,869 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:34:00,869 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [699255586] [2019-12-07 16:34:00,869 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:34:00,869 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:00,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:34:00,869 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:34:00,869 INFO L87 Difference]: Start difference. First operand 4934 states and 10895 transitions. Second operand 5 states. [2019-12-07 16:34:00,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:00,904 INFO L93 Difference]: Finished difference Result 4076 states and 8733 transitions. [2019-12-07 16:34:00,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:34:00,905 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 97 [2019-12-07 16:34:00,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:00,907 INFO L225 Difference]: With dead ends: 4076 [2019-12-07 16:34:00,908 INFO L226 Difference]: Without dead ends: 4076 [2019-12-07 16:34:00,908 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:34:00,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4076 states. [2019-12-07 16:34:00,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4076 to 4033. [2019-12-07 16:34:00,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4033 states. [2019-12-07 16:34:00,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4033 states to 4033 states and 8640 transitions. [2019-12-07 16:34:00,942 INFO L78 Accepts]: Start accepts. Automaton has 4033 states and 8640 transitions. Word has length 97 [2019-12-07 16:34:00,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:00,942 INFO L462 AbstractCegarLoop]: Abstraction has 4033 states and 8640 transitions. [2019-12-07 16:34:00,942 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:34:00,942 INFO L276 IsEmpty]: Start isEmpty. Operand 4033 states and 8640 transitions. [2019-12-07 16:34:00,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2019-12-07 16:34:00,945 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:00,945 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:00,945 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:00,945 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:00,945 INFO L82 PathProgramCache]: Analyzing trace with hash 741591247, now seen corresponding path program 1 times [2019-12-07 16:34:00,945 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:00,946 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2137953678] [2019-12-07 16:34:00,946 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:00,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:01,125 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:01,125 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2137953678] [2019-12-07 16:34:01,126 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:01,126 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 16:34:01,126 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1544199361] [2019-12-07 16:34:01,126 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 16:34:01,126 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:01,126 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 16:34:01,126 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:34:01,126 INFO L87 Difference]: Start difference. First operand 4033 states and 8640 transitions. Second operand 11 states. [2019-12-07 16:34:02,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:02,420 INFO L93 Difference]: Finished difference Result 6077 states and 12842 transitions. [2019-12-07 16:34:02,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 16:34:02,421 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 98 [2019-12-07 16:34:02,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:02,428 INFO L225 Difference]: With dead ends: 6077 [2019-12-07 16:34:02,428 INFO L226 Difference]: Without dead ends: 6002 [2019-12-07 16:34:02,429 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 5 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=100, Invalid=242, Unknown=0, NotChecked=0, Total=342 [2019-12-07 16:34:02,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6002 states. [2019-12-07 16:34:02,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6002 to 4409. [2019-12-07 16:34:02,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4409 states. [2019-12-07 16:34:02,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4409 states to 4409 states and 9461 transitions. [2019-12-07 16:34:02,482 INFO L78 Accepts]: Start accepts. Automaton has 4409 states and 9461 transitions. Word has length 98 [2019-12-07 16:34:02,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:02,483 INFO L462 AbstractCegarLoop]: Abstraction has 4409 states and 9461 transitions. [2019-12-07 16:34:02,483 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 16:34:02,483 INFO L276 IsEmpty]: Start isEmpty. Operand 4409 states and 9461 transitions. [2019-12-07 16:34:02,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2019-12-07 16:34:02,485 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:02,485 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:02,485 INFO L410 AbstractCegarLoop]: === Iteration 39 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:02,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:02,485 INFO L82 PathProgramCache]: Analyzing trace with hash 402744400, now seen corresponding path program 1 times [2019-12-07 16:34:02,485 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:02,486 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1032699788] [2019-12-07 16:34:02,486 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:02,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:34:02,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:34:02,590 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 16:34:02,590 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 16:34:02,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1393] [1393] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_48| 0 0))) (and (= 0 v_~y$r_buff0_thd2~0_754) (= 0 v_~y$w_buff0~0_354) (= v_~y$r_buff1_thd0~0_369 0) (= 0 v_~__unbuffered_cnt~0_79) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y~0_364 0) (= |v_#NULL.offset_7| 0) (= 0 v_~x~0_107) (= v_~y$w_buff1_used~0_638 0) (= v_~y$r_buff0_thd0~0_393 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff0_used~0_1402 0) (= v_~main$tmp_guard0~0_23 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1647~0.base_19| 4)) (= v_~y$r_buff1_thd1~0_311 0) (= v_~main$tmp_guard1~0_29 0) (= v_~weak$$choice2~0_312 0) (= 0 v_~y$read_delayed_var~0.base_7) (= (select .cse0 |v_ULTIMATE.start_main_~#t1647~0.base_19|) 0) (= 0 |v_#NULL.base_7|) (= (store .cse0 |v_ULTIMATE.start_main_~#t1647~0.base_19| 1) |v_#valid_46|) (= v_~y$w_buff1~0_285 0) (= v_~y$mem_tmp~0_229 0) (= v_~__unbuffered_p1_EBX~0_24 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1647~0.base_19|) (= 0 v_~__unbuffered_p1_EAX~0_36) (= v_~y$flush_delayed~0_258 0) (= 0 v_~weak$$choice0~0_214) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1647~0.base_19| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1647~0.base_19|) |v_ULTIMATE.start_main_~#t1647~0.offset_15| 0))) (= 0 |v_ULTIMATE.start_main_~#t1647~0.offset_15|) (< 0 |v_#StackHeapBarrier_13|) (= 0 v_~y$r_buff1_thd2~0_431) (= v_~y$r_buff0_thd1~0_259 0) (= 0 v_~__unbuffered_p0_EAX~0_38))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_10|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_#t~nondet76=|v_ULTIMATE.start_main_#t~nondet76_83|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite89=|v_ULTIMATE.start_main_#t~ite89_50|, ULTIMATE.start_main_#t~ite87=|v_ULTIMATE.start_main_#t~ite87_57|, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_25|, ULTIMATE.start_main_#t~ite96=|v_ULTIMATE.start_main_#t~ite96_33|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_55|, ULTIMATE.start_main_#t~ite94=|v_ULTIMATE.start_main_#t~ite94_59|, ~y$mem_tmp~0=v_~y$mem_tmp~0_229, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_38, ULTIMATE.start_main_#t~ite92=|v_ULTIMATE.start_main_#t~ite92_31|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_36, ULTIMATE.start_main_#t~ite90=|v_ULTIMATE.start_main_#t~ite90_25|, ULTIMATE.start_main_~#t1648~0.offset=|v_ULTIMATE.start_main_~#t1648~0.offset_13|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_259, ~y$flush_delayed~0=v_~y$flush_delayed~0_258, #length=|v_#length_15|, ULTIMATE.start_main_~#t1648~0.base=|v_ULTIMATE.start_main_~#t1648~0.base_17|, ULTIMATE.start_main_#t~nondet68=|v_ULTIMATE.start_main_#t~nondet68_21|, ULTIMATE.start_main_#t~ite79=|v_ULTIMATE.start_main_#t~ite79_44|, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_25|, ULTIMATE.start_main_#t~ite84=|v_ULTIMATE.start_main_#t~ite84_56|, ~weak$$choice0~0=v_~weak$$choice0~0_214, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_37|, ~y$w_buff1~0=v_~y$w_buff1~0_285, ULTIMATE.start_main_#t~ite80=|v_ULTIMATE.start_main_#t~ite80_54|, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_754, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_369, ~x~0=v_~x~0_107, ULTIMATE.start_main_#t~nondet75=|v_ULTIMATE.start_main_#t~nondet75_83|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t1647~0.offset=|v_ULTIMATE.start_main_~#t1647~0.offset_15|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_1402, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_33|, ULTIMATE.start_main_#t~ite88=|v_ULTIMATE.start_main_#t~ite88_49|, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_45|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_95|, ULTIMATE.start_main_#t~ite95=|v_ULTIMATE.start_main_#t~ite95_60|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_311, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_31|, ULTIMATE.start_main_#t~ite93=|v_ULTIMATE.start_main_#t~ite93_29|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_27|, ULTIMATE.start_main_#t~ite91=|v_ULTIMATE.start_main_#t~ite91_30|, ~y$w_buff0~0=v_~y$w_buff0~0_354, ~y~0=v_~y~0_364, ULTIMATE.start_main_~#t1647~0.base=|v_ULTIMATE.start_main_~#t1647~0.base_19|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_24, ULTIMATE.start_main_#t~nondet67=|v_ULTIMATE.start_main_#t~nondet67_8|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_23|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite97=|v_ULTIMATE.start_main_#t~ite97_49|, ULTIMATE.start_main_#t~ite85=|v_ULTIMATE.start_main_#t~ite85_52|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_431, ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_38|, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_62|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_393, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_9|, ~weak$$choice2~0=v_~weak$$choice2~0_312, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_638} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet76, #NULL.offset, ULTIMATE.start_main_#t~ite89, ULTIMATE.start_main_#t~ite87, ULTIMATE.start_main_#t~ite73, ULTIMATE.start_main_#t~ite96, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite94, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_#t~ite92, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_#t~ite90, ULTIMATE.start_main_~#t1648~0.offset, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_~#t1648~0.base, ULTIMATE.start_main_#t~nondet68, ULTIMATE.start_main_#t~ite79, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_#t~ite84, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite82, ~y$w_buff1~0, ULTIMATE.start_main_#t~ite80, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_#t~nondet75, ~y$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1647~0.offset, ~y$w_buff0_used~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite69, ULTIMATE.start_main_#t~ite88, ULTIMATE.start_main_#t~ite86, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite95, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite72, ULTIMATE.start_main_#t~ite93, ULTIMATE.start_main_#t~ite70, ULTIMATE.start_main_#t~ite91, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_~#t1647~0.base, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet67, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite78, #NULL.base, ULTIMATE.start_main_#t~ite97, ULTIMATE.start_main_#t~ite85, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite83, ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:34:02,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1352] [1352] L822-1-->L824: Formula: (and (= |v_#valid_23| (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1648~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t1648~0.offset_10|) (= (store |v_#length_12| |v_ULTIMATE.start_main_~#t1648~0.base_11| 4) |v_#length_11|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t1648~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t1648~0.base_11|)) (= |v_#memory_int_5| (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1648~0.base_11| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1648~0.base_11|) |v_ULTIMATE.start_main_~#t1648~0.offset_10| 1))) (= (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1648~0.base_11|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_6|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_#t~nondet67=|v_ULTIMATE.start_main_#t~nondet67_6|, ULTIMATE.start_main_~#t1648~0.offset=|v_ULTIMATE.start_main_~#t1648~0.offset_10|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_5|, #length=|v_#length_11|, ULTIMATE.start_main_~#t1648~0.base=|v_ULTIMATE.start_main_~#t1648~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet67, ULTIMATE.start_main_~#t1648~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1648~0.base] because there is no mapped edge [2019-12-07 16:34:02,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1320] [1320] L729-2-->L729-5: Formula: (let ((.cse2 (= |P0Thread1of1ForFork0_#t~ite4_Out715047511| |P0Thread1of1ForFork0_#t~ite3_Out715047511|)) (.cse0 (= 0 (mod ~y$r_buff1_thd1~0_In715047511 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In715047511 256) 0))) (or (and (or .cse0 .cse1) .cse2 (= ~y~0_In715047511 |P0Thread1of1ForFork0_#t~ite3_Out715047511|)) (and (= ~y$w_buff1~0_In715047511 |P0Thread1of1ForFork0_#t~ite3_Out715047511|) .cse2 (not .cse0) (not .cse1)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In715047511, ~y$w_buff1~0=~y$w_buff1~0_In715047511, ~y~0=~y~0_In715047511, ~y$w_buff1_used~0=~y$w_buff1_used~0_In715047511} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In715047511, P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out715047511|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out715047511|, ~y$w_buff1~0=~y$w_buff1~0_In715047511, ~y~0=~y~0_In715047511, ~y$w_buff1_used~0=~y$w_buff1_used~0_In715047511} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 16:34:02,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1302] [1302] L730-->L730-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-55442973 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd1~0_In-55442973 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out-55442973| 0)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out-55442973| ~y$w_buff0_used~0_In-55442973) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-55442973, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-55442973} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-55442973|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-55442973, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-55442973} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 16:34:02,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1298] [1298] L731-->L731-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd1~0_In-499570738 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-499570738 256))) (.cse0 (= (mod ~y$r_buff1_thd1~0_In-499570738 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In-499570738 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-499570738|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-499570738 |P0Thread1of1ForFork0_#t~ite6_Out-499570738|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-499570738, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-499570738, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-499570738, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-499570738} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-499570738|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-499570738, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-499570738, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-499570738, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-499570738} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 16:34:02,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1330] [1330] L732-->L732-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd1~0_In517448000 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In517448000 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite7_Out517448000| ~y$r_buff0_thd1~0_In517448000)) (and (not .cse1) (= |P0Thread1of1ForFork0_#t~ite7_Out517448000| 0) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In517448000, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In517448000} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In517448000, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out517448000|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In517448000} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 16:34:02,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1295] [1295] L733-->L733-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In-423542550 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd1~0_In-423542550 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In-423542550 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd1~0_In-423542550 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out-423542550| 0)) (and (or .cse3 .cse2) (= |P0Thread1of1ForFork0_#t~ite8_Out-423542550| ~y$r_buff1_thd1~0_In-423542550) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-423542550, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-423542550, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-423542550, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-423542550} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-423542550, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-423542550, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-423542550|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-423542550, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-423542550} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 16:34:02,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1314] [1314] L739-2-->L739-5: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1806369993 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd1~0_In-1806369993 256))) (.cse2 (= |P0Thread1of1ForFork0_#t~ite10_Out-1806369993| |P0Thread1of1ForFork0_#t~ite9_Out-1806369993|))) (or (and (not .cse0) (not .cse1) .cse2 (= ~y$w_buff1~0_In-1806369993 |P0Thread1of1ForFork0_#t~ite9_Out-1806369993|)) (and (or .cse1 .cse0) .cse2 (= |P0Thread1of1ForFork0_#t~ite9_Out-1806369993| ~y~0_In-1806369993)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1806369993, ~y$w_buff1~0=~y$w_buff1~0_In-1806369993, ~y~0=~y~0_In-1806369993, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1806369993} OutVars{P0Thread1of1ForFork0_#t~ite10=|P0Thread1of1ForFork0_#t~ite10_Out-1806369993|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1806369993, P0Thread1of1ForFork0_#t~ite9=|P0Thread1of1ForFork0_#t~ite9_Out-1806369993|, ~y$w_buff1~0=~y$w_buff1~0_In-1806369993, ~y~0=~y~0_In-1806369993, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1806369993} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite10, P0Thread1of1ForFork0_#t~ite9] because there is no mapped edge [2019-12-07 16:34:02,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1261] [1261] P1ENTRY-->L4-3: Formula: (and (= (ite (not (and (not (= (mod v_~y$w_buff1_used~0_217 256) 0)) (not (= (mod v_~y$w_buff0_used~0_458 256) 0)))) 1 0) |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_29|) (= v_P1Thread1of1ForFork1_~arg.base_29 |v_P1Thread1of1ForFork1_#in~arg.base_31|) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_31 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_29|) (= v_~y$w_buff0_used~0_458 1) (= v_~y$w_buff0_used~0_459 v_~y$w_buff1_used~0_217) (= v_~x~0_34 1) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_31)) (= v_~y$w_buff1~0_88 v_~y$w_buff0~0_113) (= |v_P1Thread1of1ForFork1_#in~arg.offset_31| v_P1Thread1of1ForFork1_~arg.offset_29) (= 1 v_~y$w_buff0~0_112)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_459, ~y$w_buff0~0=v_~y$w_buff0~0_113, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_31|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_31|} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_31, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_29, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_458, ~y$w_buff1~0=v_~y$w_buff1~0_88, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_29|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_29, ~y$w_buff0~0=v_~y$w_buff0~0_112, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_31|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_31|, ~x~0=v_~x~0_34, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_217} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, P1Thread1of1ForFork1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~y$w_buff0~0, ~x~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:34:02,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1328] [1328] L771-2-->L771-4: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In1115425377 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1115425377 256)))) (or (and (not .cse0) (not .cse1) (= ~y$w_buff0~0_In1115425377 |P1Thread1of1ForFork1_#t~ite17_Out1115425377|)) (and (= ~y$w_buff1~0_In1115425377 |P1Thread1of1ForFork1_#t~ite17_Out1115425377|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1115425377, ~y$w_buff1~0=~y$w_buff1~0_In1115425377, ~y$w_buff0~0=~y$w_buff0~0_In1115425377, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1115425377} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1115425377, ~y$w_buff1~0=~y$w_buff1~0_In1115425377, ~y$w_buff0~0=~y$w_buff0~0_In1115425377, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1115425377, P1Thread1of1ForFork1_#t~ite17=|P1Thread1of1ForFork1_#t~ite17_Out1115425377|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite17] because there is no mapped edge [2019-12-07 16:34:02,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1231] [1231] L771-4-->L772: Formula: (= v_~y~0_57 |v_P1Thread1of1ForFork1_#t~ite17_8|) InVars {P1Thread1of1ForFork1_#t~ite17=|v_P1Thread1of1ForFork1_#t~ite17_8|} OutVars{P1Thread1of1ForFork1_#t~ite18=|v_P1Thread1of1ForFork1_#t~ite18_11|, ~y~0=v_~y~0_57, P1Thread1of1ForFork1_#t~ite17=|v_P1Thread1of1ForFork1_#t~ite17_7|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite18, ~y~0, P1Thread1of1ForFork1_#t~ite17] because there is no mapped edge [2019-12-07 16:34:02,599 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1292] [1292] L776-->L777: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_153 256))) (= v_~y$r_buff0_thd2~0_342 v_~y$r_buff0_thd2~0_341)) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_342, ~weak$$choice2~0=v_~weak$$choice2~0_153} OutVars{P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_15|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_341, P1Thread1of1ForFork1_#t~ite32=|v_P1Thread1of1ForFork1_#t~ite32_12|, P1Thread1of1ForFork1_#t~ite33=|v_P1Thread1of1ForFork1_#t~ite33_8|, ~weak$$choice2~0=v_~weak$$choice2~0_153} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite31, ~y$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite32, P1Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-12-07 16:34:02,600 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1312] [1312] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~y$flush_delayed~0_In1002460518 256)))) (or (and (= ~y$mem_tmp~0_In1002460518 |P1Thread1of1ForFork1_#t~ite37_Out1002460518|) (not .cse0)) (and (= ~y~0_In1002460518 |P1Thread1of1ForFork1_#t~ite37_Out1002460518|) .cse0))) InVars {~y$mem_tmp~0=~y$mem_tmp~0_In1002460518, ~y$flush_delayed~0=~y$flush_delayed~0_In1002460518, ~y~0=~y~0_In1002460518} OutVars{~y$mem_tmp~0=~y$mem_tmp~0_In1002460518, ~y$flush_delayed~0=~y$flush_delayed~0_In1002460518, ~y~0=~y~0_In1002460518, P1Thread1of1ForFork1_#t~ite37=|P1Thread1of1ForFork1_#t~ite37_Out1002460518|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 16:34:02,600 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1306] [1306] L787-2-->L787-5: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1168238133 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1168238133 256))) (.cse2 (= |P1Thread1of1ForFork1_#t~ite40_Out1168238133| |P1Thread1of1ForFork1_#t~ite41_Out1168238133|))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite40_Out1168238133| ~y$w_buff0~0_In1168238133) .cse2) (and (= |P1Thread1of1ForFork1_#t~ite40_Out1168238133| ~y$w_buff1~0_In1168238133) (or .cse1 .cse0) .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1168238133, ~y$w_buff1~0=~y$w_buff1~0_In1168238133, ~y$w_buff0~0=~y$w_buff0~0_In1168238133, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1168238133} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1168238133, ~y$w_buff1~0=~y$w_buff1~0_In1168238133, P1Thread1of1ForFork1_#t~ite41=|P1Thread1of1ForFork1_#t~ite41_Out1168238133|, P1Thread1of1ForFork1_#t~ite40=|P1Thread1of1ForFork1_#t~ite40_Out1168238133|, ~y$w_buff0~0=~y$w_buff0~0_In1168238133, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1168238133} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite41, P1Thread1of1ForFork1_#t~ite40] because there is no mapped edge [2019-12-07 16:34:02,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1227] [1227] L792-->L793: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_61 256))) (= v_~y$r_buff0_thd2~0_127 v_~y$r_buff0_thd2~0_126)) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_127, ~weak$$choice2~0=v_~weak$$choice2~0_61} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_126, P1Thread1of1ForFork1_#t~ite56=|v_P1Thread1of1ForFork1_#t~ite56_9|, P1Thread1of1ForFork1_#t~ite55=|v_P1Thread1of1ForFork1_#t~ite55_9|, P1Thread1of1ForFork1_#t~ite54=|v_P1Thread1of1ForFork1_#t~ite54_12|, ~weak$$choice2~0=v_~weak$$choice2~0_61} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite56, P1Thread1of1ForFork1_#t~ite55, P1Thread1of1ForFork1_#t~ite54] because there is no mapped edge [2019-12-07 16:34:02,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1321] [1321] L795-->L795-2: Formula: (let ((.cse0 (= 0 (mod ~y$flush_delayed~0_In1202657094 256)))) (or (and .cse0 (= |P1Thread1of1ForFork1_#t~ite60_Out1202657094| ~y~0_In1202657094)) (and (= |P1Thread1of1ForFork1_#t~ite60_Out1202657094| ~y$mem_tmp~0_In1202657094) (not .cse0)))) InVars {~y$mem_tmp~0=~y$mem_tmp~0_In1202657094, ~y$flush_delayed~0=~y$flush_delayed~0_In1202657094, ~y~0=~y~0_In1202657094} OutVars{~y$mem_tmp~0=~y$mem_tmp~0_In1202657094, P1Thread1of1ForFork1_#t~ite60=|P1Thread1of1ForFork1_#t~ite60_Out1202657094|, ~y$flush_delayed~0=~y$flush_delayed~0_In1202657094, ~y~0=~y~0_In1202657094} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite60] because there is no mapped edge [2019-12-07 16:34:02,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1313] [1313] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1995130554 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1995130554 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite63_Out-1995130554| ~y$w_buff0_used~0_In-1995130554) (or .cse0 .cse1)) (and (not .cse1) (= |P1Thread1of1ForFork1_#t~ite63_Out-1995130554| 0) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1995130554, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1995130554} OutVars{P1Thread1of1ForFork1_#t~ite63=|P1Thread1of1ForFork1_#t~ite63_Out-1995130554|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1995130554, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1995130554} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite63] because there is no mapped edge [2019-12-07 16:34:02,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1297] [1297] L740-->L740-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In1599221996 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1599221996 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite11_Out1599221996| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In1599221996 |P0Thread1of1ForFork0_#t~ite11_Out1599221996|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1599221996, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1599221996} OutVars{P0Thread1of1ForFork0_#t~ite11=|P0Thread1of1ForFork0_#t~ite11_Out1599221996|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1599221996, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1599221996} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 16:34:02,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1337] [1337] L801-->L801-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-54821874 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-54821874 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd2~0_In-54821874 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-54821874 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite64_Out-54821874| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork1_#t~ite64_Out-54821874| ~y$w_buff1_used~0_In-54821874) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-54821874, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-54821874, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-54821874, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-54821874} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-54821874, P1Thread1of1ForFork1_#t~ite64=|P1Thread1of1ForFork1_#t~ite64_Out-54821874|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-54821874, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-54821874, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-54821874} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite64] because there is no mapped edge [2019-12-07 16:34:02,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1316] [1316] L802-->L803: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1172327682 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd2~0_In1172327682 256) 0)) (.cse2 (= ~y$r_buff0_thd2~0_In1172327682 ~y$r_buff0_thd2~0_Out1172327682))) (or (and (= 0 ~y$r_buff0_thd2~0_Out1172327682) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1172327682, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1172327682} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1172327682, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_Out1172327682, P1Thread1of1ForFork1_#t~ite65=|P1Thread1of1ForFork1_#t~ite65_Out1172327682|} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite65] because there is no mapped edge [2019-12-07 16:34:02,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1325] [1325] L803-->L803-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-1637597683 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1637597683 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In-1637597683 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1637597683 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite66_Out-1637597683| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite66_Out-1637597683| ~y$r_buff1_thd2~0_In-1637597683) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1637597683, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1637597683, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1637597683, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1637597683} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1637597683, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1637597683, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1637597683, P1Thread1of1ForFork1_#t~ite66=|P1Thread1of1ForFork1_#t~ite66_Out-1637597683|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1637597683} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite66] because there is no mapped edge [2019-12-07 16:34:02,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1357] [1357] L803-2-->P1EXIT: Formula: (and (= v_~y$r_buff1_thd2~0_224 |v_P1Thread1of1ForFork1_#t~ite66_32|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49, P1Thread1of1ForFork1_#t~ite66=|v_P1Thread1of1ForFork1_#t~ite66_32|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_224, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P1Thread1of1ForFork1_#t~ite66=|v_P1Thread1of1ForFork1_#t~ite66_31|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite66, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 16:34:02,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1310] [1310] L741-->L741-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-74775223 256))) (.cse0 (= (mod ~y$r_buff0_thd1~0_In-74775223 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd1~0_In-74775223 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-74775223 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-74775223 |P0Thread1of1ForFork0_#t~ite12_Out-74775223|) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite12_Out-74775223|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-74775223, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-74775223, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-74775223, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-74775223} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-74775223, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-74775223, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-74775223, P0Thread1of1ForFork0_#t~ite12=|P0Thread1of1ForFork0_#t~ite12_Out-74775223|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-74775223} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 16:34:02,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1304] [1304] L742-->L742-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1019262328 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-1019262328 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite13_Out-1019262328|)) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite13_Out-1019262328| ~y$r_buff0_thd1~0_In-1019262328)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1019262328, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1019262328} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1019262328, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1019262328, P0Thread1of1ForFork0_#t~ite13=|P0Thread1of1ForFork0_#t~ite13_Out-1019262328|} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 16:34:02,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1338] [1338] L743-->L743-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd1~0_In-45643062 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-45643062 256))) (.cse2 (= (mod ~y$r_buff0_thd1~0_In-45643062 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In-45643062 256) 0))) (or (and (= ~y$r_buff1_thd1~0_In-45643062 |P0Thread1of1ForFork0_#t~ite14_Out-45643062|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite14_Out-45643062| 0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-45643062, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-45643062, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-45643062, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-45643062} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-45643062, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-45643062, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-45643062, P0Thread1of1ForFork0_#t~ite14=|P0Thread1of1ForFork0_#t~ite14_Out-45643062|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-45643062} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 16:34:02,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1340] [1340] L743-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1)) (= v_~y$r_buff1_thd1~0_117 |v_P0Thread1of1ForFork0_#t~ite14_26|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, P0Thread1of1ForFork0_#t~ite14=|v_P0Thread1of1ForFork0_#t~ite14_26|} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_117, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, P0Thread1of1ForFork0_#t~ite14=|v_P0Thread1of1ForFork0_#t~ite14_25|} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 16:34:02,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1274] [1274] L824-1-->L830: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= (ite (= (ite (= 2 v_~__unbuffered_cnt~0_26) 1 0) 0) 0 1) v_~main$tmp_guard0~0_9)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_26} OutVars{ULTIMATE.start_main_#t~nondet68=|v_ULTIMATE.start_main_#t~nondet68_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet68, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:34:02,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1336] [1336] L830-2-->L830-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In729233799 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In729233799 256) 0))) (or (and (or .cse0 .cse1) (= ~y~0_In729233799 |ULTIMATE.start_main_#t~ite69_Out729233799|)) (and (not .cse0) (not .cse1) (= ~y$w_buff1~0_In729233799 |ULTIMATE.start_main_#t~ite69_Out729233799|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In729233799, ~y~0=~y~0_In729233799, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In729233799, ~y$w_buff1_used~0=~y$w_buff1_used~0_In729233799} OutVars{~y$w_buff1~0=~y$w_buff1~0_In729233799, ULTIMATE.start_main_#t~ite69=|ULTIMATE.start_main_#t~ite69_Out729233799|, ~y~0=~y~0_In729233799, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In729233799, ~y$w_buff1_used~0=~y$w_buff1_used~0_In729233799} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite69] because there is no mapped edge [2019-12-07 16:34:02,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1254] [1254] L830-4-->L831: Formula: (= v_~y~0_92 |v_ULTIMATE.start_main_#t~ite69_10|) InVars {ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_10|} OutVars{ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_13|, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_9|, ~y~0=v_~y~0_92} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite70, ULTIMATE.start_main_#t~ite69, ~y~0] because there is no mapped edge [2019-12-07 16:34:02,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1311] [1311] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In215462020 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In215462020 256)))) (or (and (= |ULTIMATE.start_main_#t~ite71_Out215462020| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite71_Out215462020| ~y$w_buff0_used~0_In215462020) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In215462020, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In215462020} OutVars{ULTIMATE.start_main_#t~ite71=|ULTIMATE.start_main_#t~ite71_Out215462020|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In215462020, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In215462020} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite71] because there is no mapped edge [2019-12-07 16:34:02,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1335] [1335] L832-->L832-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-678058220 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-678058220 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In-678058220 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-678058220 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite72_Out-678058220| ~y$w_buff1_used~0_In-678058220) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite72_Out-678058220|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-678058220, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-678058220, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-678058220, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-678058220} OutVars{ULTIMATE.start_main_#t~ite72=|ULTIMATE.start_main_#t~ite72_Out-678058220|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-678058220, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-678058220, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-678058220, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-678058220} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite72] because there is no mapped edge [2019-12-07 16:34:02,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1300] [1300] L833-->L833-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-374816462 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-374816462 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite73_Out-374816462| 0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite73_Out-374816462| ~y$r_buff0_thd0~0_In-374816462)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-374816462, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-374816462} OutVars{ULTIMATE.start_main_#t~ite73=|ULTIMATE.start_main_#t~ite73_Out-374816462|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-374816462, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-374816462} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite73] because there is no mapped edge [2019-12-07 16:34:02,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1332] [1332] L834-->L834-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In792209101 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In792209101 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In792209101 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In792209101 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite74_Out792209101| 0)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite74_Out792209101| ~y$r_buff1_thd0~0_In792209101)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In792209101, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In792209101, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In792209101, ~y$w_buff1_used~0=~y$w_buff1_used~0_In792209101} OutVars{ULTIMATE.start_main_#t~ite74=|ULTIMATE.start_main_#t~ite74_Out792209101|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In792209101, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In792209101, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In792209101, ~y$w_buff1_used~0=~y$w_buff1_used~0_In792209101} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite74] because there is no mapped edge [2019-12-07 16:34:02,613 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1296] [1296] L849-->L849-2: Formula: (let ((.cse0 (= 0 (mod ~y$flush_delayed~0_In-1223754640 256)))) (or (and (= ~y~0_In-1223754640 |ULTIMATE.start_main_#t~ite97_Out-1223754640|) .cse0) (and (not .cse0) (= ~y$mem_tmp~0_In-1223754640 |ULTIMATE.start_main_#t~ite97_Out-1223754640|)))) InVars {~y$mem_tmp~0=~y$mem_tmp~0_In-1223754640, ~y$flush_delayed~0=~y$flush_delayed~0_In-1223754640, ~y~0=~y~0_In-1223754640} OutVars{~y$mem_tmp~0=~y$mem_tmp~0_In-1223754640, ~y$flush_delayed~0=~y$flush_delayed~0_In-1223754640, ~y~0=~y~0_In-1223754640, ULTIMATE.start_main_#t~ite97=|ULTIMATE.start_main_#t~ite97_Out-1223754640|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite97] because there is no mapped edge [2019-12-07 16:34:02,613 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1388] [1388] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_26 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_~y~0_361 |v_ULTIMATE.start_main_#t~ite97_46|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= v_~y$flush_delayed~0_254 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ULTIMATE.start_main_#t~ite97=|v_ULTIMATE.start_main_#t~ite97_46|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_254, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ~y~0=v_~y~0_361, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|, ULTIMATE.start_main_#t~ite97=|v_ULTIMATE.start_main_#t~ite97_45|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression, ULTIMATE.start_main_#t~ite97] because there is no mapped edge [2019-12-07 16:34:02,676 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 04:34:02 BasicIcfg [2019-12-07 16:34:02,676 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 16:34:02,676 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 16:34:02,676 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 16:34:02,676 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 16:34:02,676 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:32:50" (3/4) ... [2019-12-07 16:34:02,678 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 16:34:02,678 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1393] [1393] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_48| 0 0))) (and (= 0 v_~y$r_buff0_thd2~0_754) (= 0 v_~y$w_buff0~0_354) (= v_~y$r_buff1_thd0~0_369 0) (= 0 v_~__unbuffered_cnt~0_79) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y~0_364 0) (= |v_#NULL.offset_7| 0) (= 0 v_~x~0_107) (= v_~y$w_buff1_used~0_638 0) (= v_~y$r_buff0_thd0~0_393 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff0_used~0_1402 0) (= v_~main$tmp_guard0~0_23 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1647~0.base_19| 4)) (= v_~y$r_buff1_thd1~0_311 0) (= v_~main$tmp_guard1~0_29 0) (= v_~weak$$choice2~0_312 0) (= 0 v_~y$read_delayed_var~0.base_7) (= (select .cse0 |v_ULTIMATE.start_main_~#t1647~0.base_19|) 0) (= 0 |v_#NULL.base_7|) (= (store .cse0 |v_ULTIMATE.start_main_~#t1647~0.base_19| 1) |v_#valid_46|) (= v_~y$w_buff1~0_285 0) (= v_~y$mem_tmp~0_229 0) (= v_~__unbuffered_p1_EBX~0_24 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1647~0.base_19|) (= 0 v_~__unbuffered_p1_EAX~0_36) (= v_~y$flush_delayed~0_258 0) (= 0 v_~weak$$choice0~0_214) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1647~0.base_19| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1647~0.base_19|) |v_ULTIMATE.start_main_~#t1647~0.offset_15| 0))) (= 0 |v_ULTIMATE.start_main_~#t1647~0.offset_15|) (< 0 |v_#StackHeapBarrier_13|) (= 0 v_~y$r_buff1_thd2~0_431) (= v_~y$r_buff0_thd1~0_259 0) (= 0 v_~__unbuffered_p0_EAX~0_38))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_10|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_#t~nondet76=|v_ULTIMATE.start_main_#t~nondet76_83|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite89=|v_ULTIMATE.start_main_#t~ite89_50|, ULTIMATE.start_main_#t~ite87=|v_ULTIMATE.start_main_#t~ite87_57|, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_25|, ULTIMATE.start_main_#t~ite96=|v_ULTIMATE.start_main_#t~ite96_33|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_55|, ULTIMATE.start_main_#t~ite94=|v_ULTIMATE.start_main_#t~ite94_59|, ~y$mem_tmp~0=v_~y$mem_tmp~0_229, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_38, ULTIMATE.start_main_#t~ite92=|v_ULTIMATE.start_main_#t~ite92_31|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_36, ULTIMATE.start_main_#t~ite90=|v_ULTIMATE.start_main_#t~ite90_25|, ULTIMATE.start_main_~#t1648~0.offset=|v_ULTIMATE.start_main_~#t1648~0.offset_13|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_259, ~y$flush_delayed~0=v_~y$flush_delayed~0_258, #length=|v_#length_15|, ULTIMATE.start_main_~#t1648~0.base=|v_ULTIMATE.start_main_~#t1648~0.base_17|, ULTIMATE.start_main_#t~nondet68=|v_ULTIMATE.start_main_#t~nondet68_21|, ULTIMATE.start_main_#t~ite79=|v_ULTIMATE.start_main_#t~ite79_44|, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_25|, ULTIMATE.start_main_#t~ite84=|v_ULTIMATE.start_main_#t~ite84_56|, ~weak$$choice0~0=v_~weak$$choice0~0_214, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_37|, ~y$w_buff1~0=v_~y$w_buff1~0_285, ULTIMATE.start_main_#t~ite80=|v_ULTIMATE.start_main_#t~ite80_54|, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_754, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_369, ~x~0=v_~x~0_107, ULTIMATE.start_main_#t~nondet75=|v_ULTIMATE.start_main_#t~nondet75_83|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t1647~0.offset=|v_ULTIMATE.start_main_~#t1647~0.offset_15|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_1402, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_33|, ULTIMATE.start_main_#t~ite88=|v_ULTIMATE.start_main_#t~ite88_49|, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_45|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_95|, ULTIMATE.start_main_#t~ite95=|v_ULTIMATE.start_main_#t~ite95_60|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_311, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_31|, ULTIMATE.start_main_#t~ite93=|v_ULTIMATE.start_main_#t~ite93_29|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_27|, ULTIMATE.start_main_#t~ite91=|v_ULTIMATE.start_main_#t~ite91_30|, ~y$w_buff0~0=v_~y$w_buff0~0_354, ~y~0=v_~y~0_364, ULTIMATE.start_main_~#t1647~0.base=|v_ULTIMATE.start_main_~#t1647~0.base_19|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_24, ULTIMATE.start_main_#t~nondet67=|v_ULTIMATE.start_main_#t~nondet67_8|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_23|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite97=|v_ULTIMATE.start_main_#t~ite97_49|, ULTIMATE.start_main_#t~ite85=|v_ULTIMATE.start_main_#t~ite85_52|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_431, ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_38|, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_62|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_393, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_9|, ~weak$$choice2~0=v_~weak$$choice2~0_312, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_638} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet76, #NULL.offset, ULTIMATE.start_main_#t~ite89, ULTIMATE.start_main_#t~ite87, ULTIMATE.start_main_#t~ite73, ULTIMATE.start_main_#t~ite96, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite94, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_#t~ite92, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_#t~ite90, ULTIMATE.start_main_~#t1648~0.offset, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_~#t1648~0.base, ULTIMATE.start_main_#t~nondet68, ULTIMATE.start_main_#t~ite79, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_#t~ite84, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite82, ~y$w_buff1~0, ULTIMATE.start_main_#t~ite80, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_#t~nondet75, ~y$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1647~0.offset, ~y$w_buff0_used~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite69, ULTIMATE.start_main_#t~ite88, ULTIMATE.start_main_#t~ite86, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite95, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite72, ULTIMATE.start_main_#t~ite93, ULTIMATE.start_main_#t~ite70, ULTIMATE.start_main_#t~ite91, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_~#t1647~0.base, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet67, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite78, #NULL.base, ULTIMATE.start_main_#t~ite97, ULTIMATE.start_main_#t~ite85, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite83, ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:34:02,679 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1352] [1352] L822-1-->L824: Formula: (and (= |v_#valid_23| (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1648~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t1648~0.offset_10|) (= (store |v_#length_12| |v_ULTIMATE.start_main_~#t1648~0.base_11| 4) |v_#length_11|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t1648~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t1648~0.base_11|)) (= |v_#memory_int_5| (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1648~0.base_11| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1648~0.base_11|) |v_ULTIMATE.start_main_~#t1648~0.offset_10| 1))) (= (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1648~0.base_11|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_6|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_#t~nondet67=|v_ULTIMATE.start_main_#t~nondet67_6|, ULTIMATE.start_main_~#t1648~0.offset=|v_ULTIMATE.start_main_~#t1648~0.offset_10|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_5|, #length=|v_#length_11|, ULTIMATE.start_main_~#t1648~0.base=|v_ULTIMATE.start_main_~#t1648~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet67, ULTIMATE.start_main_~#t1648~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1648~0.base] because there is no mapped edge [2019-12-07 16:34:02,679 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1320] [1320] L729-2-->L729-5: Formula: (let ((.cse2 (= |P0Thread1of1ForFork0_#t~ite4_Out715047511| |P0Thread1of1ForFork0_#t~ite3_Out715047511|)) (.cse0 (= 0 (mod ~y$r_buff1_thd1~0_In715047511 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In715047511 256) 0))) (or (and (or .cse0 .cse1) .cse2 (= ~y~0_In715047511 |P0Thread1of1ForFork0_#t~ite3_Out715047511|)) (and (= ~y$w_buff1~0_In715047511 |P0Thread1of1ForFork0_#t~ite3_Out715047511|) .cse2 (not .cse0) (not .cse1)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In715047511, ~y$w_buff1~0=~y$w_buff1~0_In715047511, ~y~0=~y~0_In715047511, ~y$w_buff1_used~0=~y$w_buff1_used~0_In715047511} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In715047511, P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out715047511|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out715047511|, ~y$w_buff1~0=~y$w_buff1~0_In715047511, ~y~0=~y~0_In715047511, ~y$w_buff1_used~0=~y$w_buff1_used~0_In715047511} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 16:34:02,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1302] [1302] L730-->L730-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-55442973 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd1~0_In-55442973 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out-55442973| 0)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out-55442973| ~y$w_buff0_used~0_In-55442973) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-55442973, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-55442973} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-55442973|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-55442973, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-55442973} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 16:34:02,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1298] [1298] L731-->L731-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd1~0_In-499570738 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-499570738 256))) (.cse0 (= (mod ~y$r_buff1_thd1~0_In-499570738 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In-499570738 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-499570738|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-499570738 |P0Thread1of1ForFork0_#t~ite6_Out-499570738|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-499570738, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-499570738, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-499570738, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-499570738} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-499570738|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-499570738, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-499570738, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-499570738, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-499570738} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 16:34:02,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1330] [1330] L732-->L732-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd1~0_In517448000 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In517448000 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite7_Out517448000| ~y$r_buff0_thd1~0_In517448000)) (and (not .cse1) (= |P0Thread1of1ForFork0_#t~ite7_Out517448000| 0) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In517448000, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In517448000} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In517448000, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out517448000|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In517448000} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 16:34:02,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1295] [1295] L733-->L733-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In-423542550 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd1~0_In-423542550 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In-423542550 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd1~0_In-423542550 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out-423542550| 0)) (and (or .cse3 .cse2) (= |P0Thread1of1ForFork0_#t~ite8_Out-423542550| ~y$r_buff1_thd1~0_In-423542550) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-423542550, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-423542550, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-423542550, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-423542550} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-423542550, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-423542550, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-423542550|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-423542550, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-423542550} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 16:34:02,681 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1314] [1314] L739-2-->L739-5: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1806369993 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd1~0_In-1806369993 256))) (.cse2 (= |P0Thread1of1ForFork0_#t~ite10_Out-1806369993| |P0Thread1of1ForFork0_#t~ite9_Out-1806369993|))) (or (and (not .cse0) (not .cse1) .cse2 (= ~y$w_buff1~0_In-1806369993 |P0Thread1of1ForFork0_#t~ite9_Out-1806369993|)) (and (or .cse1 .cse0) .cse2 (= |P0Thread1of1ForFork0_#t~ite9_Out-1806369993| ~y~0_In-1806369993)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1806369993, ~y$w_buff1~0=~y$w_buff1~0_In-1806369993, ~y~0=~y~0_In-1806369993, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1806369993} OutVars{P0Thread1of1ForFork0_#t~ite10=|P0Thread1of1ForFork0_#t~ite10_Out-1806369993|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1806369993, P0Thread1of1ForFork0_#t~ite9=|P0Thread1of1ForFork0_#t~ite9_Out-1806369993|, ~y$w_buff1~0=~y$w_buff1~0_In-1806369993, ~y~0=~y~0_In-1806369993, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1806369993} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite10, P0Thread1of1ForFork0_#t~ite9] because there is no mapped edge [2019-12-07 16:34:02,681 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1261] [1261] P1ENTRY-->L4-3: Formula: (and (= (ite (not (and (not (= (mod v_~y$w_buff1_used~0_217 256) 0)) (not (= (mod v_~y$w_buff0_used~0_458 256) 0)))) 1 0) |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_29|) (= v_P1Thread1of1ForFork1_~arg.base_29 |v_P1Thread1of1ForFork1_#in~arg.base_31|) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_31 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_29|) (= v_~y$w_buff0_used~0_458 1) (= v_~y$w_buff0_used~0_459 v_~y$w_buff1_used~0_217) (= v_~x~0_34 1) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_31)) (= v_~y$w_buff1~0_88 v_~y$w_buff0~0_113) (= |v_P1Thread1of1ForFork1_#in~arg.offset_31| v_P1Thread1of1ForFork1_~arg.offset_29) (= 1 v_~y$w_buff0~0_112)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_459, ~y$w_buff0~0=v_~y$w_buff0~0_113, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_31|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_31|} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_31, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_29, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_458, ~y$w_buff1~0=v_~y$w_buff1~0_88, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_29|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_29, ~y$w_buff0~0=v_~y$w_buff0~0_112, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_31|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_31|, ~x~0=v_~x~0_34, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_217} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, P1Thread1of1ForFork1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~y$w_buff0~0, ~x~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:34:02,682 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1328] [1328] L771-2-->L771-4: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In1115425377 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1115425377 256)))) (or (and (not .cse0) (not .cse1) (= ~y$w_buff0~0_In1115425377 |P1Thread1of1ForFork1_#t~ite17_Out1115425377|)) (and (= ~y$w_buff1~0_In1115425377 |P1Thread1of1ForFork1_#t~ite17_Out1115425377|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1115425377, ~y$w_buff1~0=~y$w_buff1~0_In1115425377, ~y$w_buff0~0=~y$w_buff0~0_In1115425377, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1115425377} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1115425377, ~y$w_buff1~0=~y$w_buff1~0_In1115425377, ~y$w_buff0~0=~y$w_buff0~0_In1115425377, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1115425377, P1Thread1of1ForFork1_#t~ite17=|P1Thread1of1ForFork1_#t~ite17_Out1115425377|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite17] because there is no mapped edge [2019-12-07 16:34:02,682 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1231] [1231] L771-4-->L772: Formula: (= v_~y~0_57 |v_P1Thread1of1ForFork1_#t~ite17_8|) InVars {P1Thread1of1ForFork1_#t~ite17=|v_P1Thread1of1ForFork1_#t~ite17_8|} OutVars{P1Thread1of1ForFork1_#t~ite18=|v_P1Thread1of1ForFork1_#t~ite18_11|, ~y~0=v_~y~0_57, P1Thread1of1ForFork1_#t~ite17=|v_P1Thread1of1ForFork1_#t~ite17_7|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite18, ~y~0, P1Thread1of1ForFork1_#t~ite17] because there is no mapped edge [2019-12-07 16:34:02,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1292] [1292] L776-->L777: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_153 256))) (= v_~y$r_buff0_thd2~0_342 v_~y$r_buff0_thd2~0_341)) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_342, ~weak$$choice2~0=v_~weak$$choice2~0_153} OutVars{P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_15|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_341, P1Thread1of1ForFork1_#t~ite32=|v_P1Thread1of1ForFork1_#t~ite32_12|, P1Thread1of1ForFork1_#t~ite33=|v_P1Thread1of1ForFork1_#t~ite33_8|, ~weak$$choice2~0=v_~weak$$choice2~0_153} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite31, ~y$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite32, P1Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-12-07 16:34:02,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1312] [1312] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~y$flush_delayed~0_In1002460518 256)))) (or (and (= ~y$mem_tmp~0_In1002460518 |P1Thread1of1ForFork1_#t~ite37_Out1002460518|) (not .cse0)) (and (= ~y~0_In1002460518 |P1Thread1of1ForFork1_#t~ite37_Out1002460518|) .cse0))) InVars {~y$mem_tmp~0=~y$mem_tmp~0_In1002460518, ~y$flush_delayed~0=~y$flush_delayed~0_In1002460518, ~y~0=~y~0_In1002460518} OutVars{~y$mem_tmp~0=~y$mem_tmp~0_In1002460518, ~y$flush_delayed~0=~y$flush_delayed~0_In1002460518, ~y~0=~y~0_In1002460518, P1Thread1of1ForFork1_#t~ite37=|P1Thread1of1ForFork1_#t~ite37_Out1002460518|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 16:34:02,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1306] [1306] L787-2-->L787-5: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1168238133 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1168238133 256))) (.cse2 (= |P1Thread1of1ForFork1_#t~ite40_Out1168238133| |P1Thread1of1ForFork1_#t~ite41_Out1168238133|))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite40_Out1168238133| ~y$w_buff0~0_In1168238133) .cse2) (and (= |P1Thread1of1ForFork1_#t~ite40_Out1168238133| ~y$w_buff1~0_In1168238133) (or .cse1 .cse0) .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1168238133, ~y$w_buff1~0=~y$w_buff1~0_In1168238133, ~y$w_buff0~0=~y$w_buff0~0_In1168238133, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1168238133} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1168238133, ~y$w_buff1~0=~y$w_buff1~0_In1168238133, P1Thread1of1ForFork1_#t~ite41=|P1Thread1of1ForFork1_#t~ite41_Out1168238133|, P1Thread1of1ForFork1_#t~ite40=|P1Thread1of1ForFork1_#t~ite40_Out1168238133|, ~y$w_buff0~0=~y$w_buff0~0_In1168238133, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1168238133} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite41, P1Thread1of1ForFork1_#t~ite40] because there is no mapped edge [2019-12-07 16:34:02,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1227] [1227] L792-->L793: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_61 256))) (= v_~y$r_buff0_thd2~0_127 v_~y$r_buff0_thd2~0_126)) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_127, ~weak$$choice2~0=v_~weak$$choice2~0_61} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_126, P1Thread1of1ForFork1_#t~ite56=|v_P1Thread1of1ForFork1_#t~ite56_9|, P1Thread1of1ForFork1_#t~ite55=|v_P1Thread1of1ForFork1_#t~ite55_9|, P1Thread1of1ForFork1_#t~ite54=|v_P1Thread1of1ForFork1_#t~ite54_12|, ~weak$$choice2~0=v_~weak$$choice2~0_61} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite56, P1Thread1of1ForFork1_#t~ite55, P1Thread1of1ForFork1_#t~ite54] because there is no mapped edge [2019-12-07 16:34:02,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1321] [1321] L795-->L795-2: Formula: (let ((.cse0 (= 0 (mod ~y$flush_delayed~0_In1202657094 256)))) (or (and .cse0 (= |P1Thread1of1ForFork1_#t~ite60_Out1202657094| ~y~0_In1202657094)) (and (= |P1Thread1of1ForFork1_#t~ite60_Out1202657094| ~y$mem_tmp~0_In1202657094) (not .cse0)))) InVars {~y$mem_tmp~0=~y$mem_tmp~0_In1202657094, ~y$flush_delayed~0=~y$flush_delayed~0_In1202657094, ~y~0=~y~0_In1202657094} OutVars{~y$mem_tmp~0=~y$mem_tmp~0_In1202657094, P1Thread1of1ForFork1_#t~ite60=|P1Thread1of1ForFork1_#t~ite60_Out1202657094|, ~y$flush_delayed~0=~y$flush_delayed~0_In1202657094, ~y~0=~y~0_In1202657094} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite60] because there is no mapped edge [2019-12-07 16:34:02,689 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1313] [1313] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1995130554 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1995130554 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite63_Out-1995130554| ~y$w_buff0_used~0_In-1995130554) (or .cse0 .cse1)) (and (not .cse1) (= |P1Thread1of1ForFork1_#t~ite63_Out-1995130554| 0) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1995130554, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1995130554} OutVars{P1Thread1of1ForFork1_#t~ite63=|P1Thread1of1ForFork1_#t~ite63_Out-1995130554|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1995130554, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1995130554} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite63] because there is no mapped edge [2019-12-07 16:34:02,690 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1297] [1297] L740-->L740-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In1599221996 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1599221996 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite11_Out1599221996| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In1599221996 |P0Thread1of1ForFork0_#t~ite11_Out1599221996|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1599221996, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1599221996} OutVars{P0Thread1of1ForFork0_#t~ite11=|P0Thread1of1ForFork0_#t~ite11_Out1599221996|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1599221996, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1599221996} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 16:34:02,690 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1337] [1337] L801-->L801-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-54821874 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-54821874 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd2~0_In-54821874 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-54821874 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite64_Out-54821874| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork1_#t~ite64_Out-54821874| ~y$w_buff1_used~0_In-54821874) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-54821874, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-54821874, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-54821874, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-54821874} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-54821874, P1Thread1of1ForFork1_#t~ite64=|P1Thread1of1ForFork1_#t~ite64_Out-54821874|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-54821874, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-54821874, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-54821874} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite64] because there is no mapped edge [2019-12-07 16:34:02,690 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1316] [1316] L802-->L803: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1172327682 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd2~0_In1172327682 256) 0)) (.cse2 (= ~y$r_buff0_thd2~0_In1172327682 ~y$r_buff0_thd2~0_Out1172327682))) (or (and (= 0 ~y$r_buff0_thd2~0_Out1172327682) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1172327682, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1172327682} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1172327682, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_Out1172327682, P1Thread1of1ForFork1_#t~ite65=|P1Thread1of1ForFork1_#t~ite65_Out1172327682|} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite65] because there is no mapped edge [2019-12-07 16:34:02,690 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1325] [1325] L803-->L803-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-1637597683 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1637597683 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In-1637597683 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1637597683 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite66_Out-1637597683| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite66_Out-1637597683| ~y$r_buff1_thd2~0_In-1637597683) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1637597683, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1637597683, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1637597683, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1637597683} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1637597683, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1637597683, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1637597683, P1Thread1of1ForFork1_#t~ite66=|P1Thread1of1ForFork1_#t~ite66_Out-1637597683|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1637597683} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite66] because there is no mapped edge [2019-12-07 16:34:02,690 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1357] [1357] L803-2-->P1EXIT: Formula: (and (= v_~y$r_buff1_thd2~0_224 |v_P1Thread1of1ForFork1_#t~ite66_32|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49, P1Thread1of1ForFork1_#t~ite66=|v_P1Thread1of1ForFork1_#t~ite66_32|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_224, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P1Thread1of1ForFork1_#t~ite66=|v_P1Thread1of1ForFork1_#t~ite66_31|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite66, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 16:34:02,691 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1310] [1310] L741-->L741-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-74775223 256))) (.cse0 (= (mod ~y$r_buff0_thd1~0_In-74775223 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd1~0_In-74775223 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-74775223 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-74775223 |P0Thread1of1ForFork0_#t~ite12_Out-74775223|) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite12_Out-74775223|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-74775223, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-74775223, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-74775223, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-74775223} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-74775223, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-74775223, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-74775223, P0Thread1of1ForFork0_#t~ite12=|P0Thread1of1ForFork0_#t~ite12_Out-74775223|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-74775223} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 16:34:02,691 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1304] [1304] L742-->L742-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1019262328 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-1019262328 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite13_Out-1019262328|)) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite13_Out-1019262328| ~y$r_buff0_thd1~0_In-1019262328)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1019262328, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1019262328} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1019262328, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1019262328, P0Thread1of1ForFork0_#t~ite13=|P0Thread1of1ForFork0_#t~ite13_Out-1019262328|} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 16:34:02,691 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1338] [1338] L743-->L743-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd1~0_In-45643062 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-45643062 256))) (.cse2 (= (mod ~y$r_buff0_thd1~0_In-45643062 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In-45643062 256) 0))) (or (and (= ~y$r_buff1_thd1~0_In-45643062 |P0Thread1of1ForFork0_#t~ite14_Out-45643062|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite14_Out-45643062| 0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-45643062, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-45643062, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-45643062, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-45643062} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-45643062, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-45643062, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-45643062, P0Thread1of1ForFork0_#t~ite14=|P0Thread1of1ForFork0_#t~ite14_Out-45643062|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-45643062} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 16:34:02,691 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1340] [1340] L743-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1)) (= v_~y$r_buff1_thd1~0_117 |v_P0Thread1of1ForFork0_#t~ite14_26|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, P0Thread1of1ForFork0_#t~ite14=|v_P0Thread1of1ForFork0_#t~ite14_26|} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_117, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, P0Thread1of1ForFork0_#t~ite14=|v_P0Thread1of1ForFork0_#t~ite14_25|} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 16:34:02,691 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1274] [1274] L824-1-->L830: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= (ite (= (ite (= 2 v_~__unbuffered_cnt~0_26) 1 0) 0) 0 1) v_~main$tmp_guard0~0_9)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_26} OutVars{ULTIMATE.start_main_#t~nondet68=|v_ULTIMATE.start_main_#t~nondet68_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet68, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:34:02,692 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1336] [1336] L830-2-->L830-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In729233799 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In729233799 256) 0))) (or (and (or .cse0 .cse1) (= ~y~0_In729233799 |ULTIMATE.start_main_#t~ite69_Out729233799|)) (and (not .cse0) (not .cse1) (= ~y$w_buff1~0_In729233799 |ULTIMATE.start_main_#t~ite69_Out729233799|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In729233799, ~y~0=~y~0_In729233799, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In729233799, ~y$w_buff1_used~0=~y$w_buff1_used~0_In729233799} OutVars{~y$w_buff1~0=~y$w_buff1~0_In729233799, ULTIMATE.start_main_#t~ite69=|ULTIMATE.start_main_#t~ite69_Out729233799|, ~y~0=~y~0_In729233799, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In729233799, ~y$w_buff1_used~0=~y$w_buff1_used~0_In729233799} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite69] because there is no mapped edge [2019-12-07 16:34:02,692 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1254] [1254] L830-4-->L831: Formula: (= v_~y~0_92 |v_ULTIMATE.start_main_#t~ite69_10|) InVars {ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_10|} OutVars{ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_13|, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_9|, ~y~0=v_~y~0_92} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite70, ULTIMATE.start_main_#t~ite69, ~y~0] because there is no mapped edge [2019-12-07 16:34:02,692 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1311] [1311] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In215462020 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In215462020 256)))) (or (and (= |ULTIMATE.start_main_#t~ite71_Out215462020| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite71_Out215462020| ~y$w_buff0_used~0_In215462020) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In215462020, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In215462020} OutVars{ULTIMATE.start_main_#t~ite71=|ULTIMATE.start_main_#t~ite71_Out215462020|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In215462020, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In215462020} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite71] because there is no mapped edge [2019-12-07 16:34:02,692 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1335] [1335] L832-->L832-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-678058220 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-678058220 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In-678058220 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-678058220 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite72_Out-678058220| ~y$w_buff1_used~0_In-678058220) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite72_Out-678058220|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-678058220, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-678058220, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-678058220, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-678058220} OutVars{ULTIMATE.start_main_#t~ite72=|ULTIMATE.start_main_#t~ite72_Out-678058220|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-678058220, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-678058220, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-678058220, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-678058220} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite72] because there is no mapped edge [2019-12-07 16:34:02,692 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1300] [1300] L833-->L833-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-374816462 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-374816462 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite73_Out-374816462| 0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite73_Out-374816462| ~y$r_buff0_thd0~0_In-374816462)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-374816462, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-374816462} OutVars{ULTIMATE.start_main_#t~ite73=|ULTIMATE.start_main_#t~ite73_Out-374816462|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-374816462, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-374816462} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite73] because there is no mapped edge [2019-12-07 16:34:02,693 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1332] [1332] L834-->L834-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In792209101 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In792209101 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In792209101 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In792209101 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite74_Out792209101| 0)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite74_Out792209101| ~y$r_buff1_thd0~0_In792209101)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In792209101, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In792209101, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In792209101, ~y$w_buff1_used~0=~y$w_buff1_used~0_In792209101} OutVars{ULTIMATE.start_main_#t~ite74=|ULTIMATE.start_main_#t~ite74_Out792209101|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In792209101, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In792209101, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In792209101, ~y$w_buff1_used~0=~y$w_buff1_used~0_In792209101} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite74] because there is no mapped edge [2019-12-07 16:34:02,696 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1296] [1296] L849-->L849-2: Formula: (let ((.cse0 (= 0 (mod ~y$flush_delayed~0_In-1223754640 256)))) (or (and (= ~y~0_In-1223754640 |ULTIMATE.start_main_#t~ite97_Out-1223754640|) .cse0) (and (not .cse0) (= ~y$mem_tmp~0_In-1223754640 |ULTIMATE.start_main_#t~ite97_Out-1223754640|)))) InVars {~y$mem_tmp~0=~y$mem_tmp~0_In-1223754640, ~y$flush_delayed~0=~y$flush_delayed~0_In-1223754640, ~y~0=~y~0_In-1223754640} OutVars{~y$mem_tmp~0=~y$mem_tmp~0_In-1223754640, ~y$flush_delayed~0=~y$flush_delayed~0_In-1223754640, ~y~0=~y~0_In-1223754640, ULTIMATE.start_main_#t~ite97=|ULTIMATE.start_main_#t~ite97_Out-1223754640|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite97] because there is no mapped edge [2019-12-07 16:34:02,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1388] [1388] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_26 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_~y~0_361 |v_ULTIMATE.start_main_#t~ite97_46|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= v_~y$flush_delayed~0_254 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ULTIMATE.start_main_#t~ite97=|v_ULTIMATE.start_main_#t~ite97_46|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_254, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ~y~0=v_~y~0_361, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|, ULTIMATE.start_main_#t~ite97=|v_ULTIMATE.start_main_#t~ite97_45|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression, ULTIMATE.start_main_#t~ite97] because there is no mapped edge [2019-12-07 16:34:02,761 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_42c8cc7b-6326-4def-9a88-380a209fc192/bin/uautomizer/witness.graphml [2019-12-07 16:34:02,761 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 16:34:02,762 INFO L168 Benchmark]: Toolchain (without parser) took 73245.85 ms. Allocated memory was 1.0 GB in the beginning and 6.3 GB in the end (delta: 5.3 GB). Free memory was 940.6 MB in the beginning and 3.1 GB in the end (delta: -2.1 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2019-12-07 16:34:02,763 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 959.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:34:02,763 INFO L168 Benchmark]: CACSL2BoogieTranslator took 401.36 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 112.2 MB). Free memory was 940.6 MB in the beginning and 1.1 GB in the end (delta: -136.5 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. [2019-12-07 16:34:02,763 INFO L168 Benchmark]: Boogie Procedure Inliner took 49.26 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 11.5 GB. [2019-12-07 16:34:02,763 INFO L168 Benchmark]: Boogie Preprocessor took 32.51 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 16:34:02,764 INFO L168 Benchmark]: RCFGBuilder took 563.34 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 991.4 MB in the end (delta: 79.1 MB). Peak memory consumption was 79.1 MB. Max. memory is 11.5 GB. [2019-12-07 16:34:02,764 INFO L168 Benchmark]: TraceAbstraction took 72110.53 ms. Allocated memory was 1.1 GB in the beginning and 6.3 GB in the end (delta: 5.2 GB). Free memory was 991.4 MB in the beginning and 3.1 GB in the end (delta: -2.2 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. [2019-12-07 16:34:02,764 INFO L168 Benchmark]: Witness Printer took 85.35 ms. Allocated memory is still 6.3 GB. Free memory was 3.1 GB in the beginning and 3.1 GB in the end (delta: 78.1 MB). Peak memory consumption was 78.1 MB. Max. memory is 11.5 GB. [2019-12-07 16:34:02,766 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 959.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 401.36 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 112.2 MB). Free memory was 940.6 MB in the beginning and 1.1 GB in the end (delta: -136.5 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 49.26 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 32.51 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 563.34 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 991.4 MB in the end (delta: 79.1 MB). Peak memory consumption was 79.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 72110.53 ms. Allocated memory was 1.1 GB in the beginning and 6.3 GB in the end (delta: 5.2 GB). Free memory was 991.4 MB in the beginning and 3.1 GB in the end (delta: -2.2 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. * Witness Printer took 85.35 ms. Allocated memory is still 6.3 GB. Free memory was 3.1 GB in the beginning and 3.1 GB in the end (delta: 78.1 MB). Peak memory consumption was 78.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.2s, 244 ProgramPointsBefore, 155 ProgramPointsAfterwards, 326 TransitionsBefore, 192 TransitionsAfterwards, 49222 CoEnabledTransitionPairs, 7 FixpointIterations, 30 TrivialSequentialCompositions, 34 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 78 ConcurrentYvCompositions, 48 ChoiceCompositions, 16023 VarBasedMoverChecksPositive, 415 VarBasedMoverChecksNegative, 104 SemBasedMoverChecksPositive, 452 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.4s, 0 MoverChecksTotal, 282427 CheckedPairsTotal, 142 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L822] FCALL, FORK 0 pthread_create(&t1647, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L726] 1 y = 2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L729] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t1648, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L729] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L730] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L731] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L732] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L733] 1 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L736] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L739] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L761] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L762] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L763] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L764] 2 y$r_buff0_thd2 = (_Bool)1 [L767] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L768] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L769] 2 y$flush_delayed = weak$$choice2 [L770] 2 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L771] 2 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L772] EXPR 2 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L772] 2 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L773] EXPR 2 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L773] 2 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L774] EXPR 2 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L774] 2 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L775] EXPR 2 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L775] 2 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L777] EXPR 2 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L777] 2 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L778] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L779] 2 y = y$flush_delayed ? y$mem_tmp : y [L780] 2 y$flush_delayed = (_Bool)0 [L783] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L784] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L785] 2 y$flush_delayed = weak$$choice2 [L786] 2 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L787] EXPR 2 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L787] 2 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L788] EXPR 2 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L788] 2 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L789] EXPR 2 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L789] 2 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L790] EXPR 2 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L790] 2 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L791] EXPR 2 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L791] 2 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L793] EXPR 2 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L793] 2 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L794] 2 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L795] 2 y = y$flush_delayed ? y$mem_tmp : y [L796] 2 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L799] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L799] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L800] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L739] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L801] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L740] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L741] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L742] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L830] 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L831] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L832] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L833] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L834] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L837] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L838] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L839] 0 y$flush_delayed = weak$$choice2 [L840] 0 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L841] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L841] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L842] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L842] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L843] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L843] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L844] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L844] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L845] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L845] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L846] EXPR 0 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L846] 0 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L847] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L847] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L848] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p0_EAX == 0 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 238 locations, 2 error locations. Result: UNSAFE, OverallTime: 71.9s, OverallIterations: 39, TraceHistogramMax: 1, AutomataDifference: 27.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 13438 SDtfs, 14157 SDslu, 49356 SDs, 0 SdLazy, 28522 SolverSat, 799 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 16.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 568 GetRequests, 121 SyntacticMatches, 64 SemanticMatches, 383 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 812 ImplicationChecksByTransitivity, 3.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=198947occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 29.1s AutomataMinimizationTime, 38 MinimizatonAttempts, 130120 StatesRemovedByMinimization, 36 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.9s InterpolantComputationTime, 3124 NumberOfCodeBlocks, 3124 NumberOfCodeBlocksAsserted, 39 NumberOfCheckSat, 2988 ConstructedInterpolants, 0 QuantifiedInterpolants, 1007594 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 38 InterpolantComputations, 38 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...