./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe004_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_0509fc92-91e1-44bf-968a-e6ea77aea7c6/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_0509fc92-91e1-44bf-968a-e6ea77aea7c6/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_0509fc92-91e1-44bf-968a-e6ea77aea7c6/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_0509fc92-91e1-44bf-968a-e6ea77aea7c6/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe004_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_0509fc92-91e1-44bf-968a-e6ea77aea7c6/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_0509fc92-91e1-44bf-968a-e6ea77aea7c6/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4f81af2a85e5a058453810c202f653d64e06ddd3 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:10:49,191 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:10:49,193 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:10:49,200 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:10:49,200 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:10:49,201 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:10:49,202 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:10:49,203 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:10:49,205 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:10:49,205 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:10:49,206 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:10:49,206 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:10:49,207 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:10:49,207 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:10:49,208 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:10:49,209 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:10:49,209 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:10:49,210 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:10:49,211 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:10:49,213 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:10:49,214 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:10:49,214 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:10:49,215 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:10:49,216 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:10:49,217 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:10:49,217 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:10:49,217 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:10:49,218 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:10:49,218 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:10:49,219 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:10:49,219 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:10:49,219 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:10:49,220 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:10:49,220 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:10:49,221 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:10:49,221 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:10:49,221 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:10:49,221 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:10:49,221 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:10:49,222 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:10:49,222 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:10:49,223 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_0509fc92-91e1-44bf-968a-e6ea77aea7c6/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:10:49,232 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:10:49,232 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:10:49,233 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:10:49,233 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:10:49,233 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:10:49,234 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:10:49,234 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:10:49,234 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:10:49,234 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:10:49,234 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:10:49,234 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:10:49,234 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:10:49,234 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:10:49,235 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:10:49,235 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:10:49,235 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:10:49,235 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:10:49,235 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:10:49,235 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:10:49,235 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:10:49,235 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:10:49,236 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:10:49,236 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:10:49,236 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:10:49,236 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:10:49,236 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:10:49,236 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:10:49,236 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:10:49,236 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:10:49,237 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_0509fc92-91e1-44bf-968a-e6ea77aea7c6/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4f81af2a85e5a058453810c202f653d64e06ddd3 [2019-12-07 12:10:49,334 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:10:49,343 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:10:49,345 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:10:49,346 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:10:49,346 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:10:49,347 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_0509fc92-91e1-44bf-968a-e6ea77aea7c6/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe004_power.opt.i [2019-12-07 12:10:49,386 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0509fc92-91e1-44bf-968a-e6ea77aea7c6/bin/uautomizer/data/9bed8b06d/44a459525dd94992886eadfee8df59ed/FLAG85004e5ff [2019-12-07 12:10:49,843 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:10:49,843 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_0509fc92-91e1-44bf-968a-e6ea77aea7c6/sv-benchmarks/c/pthread-wmm/safe004_power.opt.i [2019-12-07 12:10:49,853 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0509fc92-91e1-44bf-968a-e6ea77aea7c6/bin/uautomizer/data/9bed8b06d/44a459525dd94992886eadfee8df59ed/FLAG85004e5ff [2019-12-07 12:10:50,176 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_0509fc92-91e1-44bf-968a-e6ea77aea7c6/bin/uautomizer/data/9bed8b06d/44a459525dd94992886eadfee8df59ed [2019-12-07 12:10:50,183 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:10:50,186 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:10:50,188 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:10:50,188 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:10:50,193 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:10:50,194 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:10:50" (1/1) ... [2019-12-07 12:10:50,197 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7030ab51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:10:50, skipping insertion in model container [2019-12-07 12:10:50,198 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:10:50" (1/1) ... [2019-12-07 12:10:50,204 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:10:50,234 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:10:50,477 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:10:50,484 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:10:50,527 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:10:50,572 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:10:50,572 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:10:50 WrapperNode [2019-12-07 12:10:50,573 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:10:50,573 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:10:50,573 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:10:50,573 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:10:50,579 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:10:50" (1/1) ... [2019-12-07 12:10:50,593 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:10:50" (1/1) ... [2019-12-07 12:10:50,614 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:10:50,614 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:10:50,614 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:10:50,614 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:10:50,620 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:10:50" (1/1) ... [2019-12-07 12:10:50,621 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:10:50" (1/1) ... [2019-12-07 12:10:50,624 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:10:50" (1/1) ... [2019-12-07 12:10:50,624 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:10:50" (1/1) ... [2019-12-07 12:10:50,631 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:10:50" (1/1) ... [2019-12-07 12:10:50,634 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:10:50" (1/1) ... [2019-12-07 12:10:50,637 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:10:50" (1/1) ... [2019-12-07 12:10:50,640 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:10:50,640 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:10:50,640 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:10:50,640 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:10:50,641 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:10:50" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0509fc92-91e1-44bf-968a-e6ea77aea7c6/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:10:50,681 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:10:50,681 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:10:50,681 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:10:50,681 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:10:50,682 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:10:50,682 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:10:50,682 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:10:50,682 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:10:50,682 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 12:10:50,682 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 12:10:50,682 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:10:50,682 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:10:50,682 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:10:50,683 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:10:51,077 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:10:51,078 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:10:51,079 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:10:51 BoogieIcfgContainer [2019-12-07 12:10:51,079 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:10:51,080 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:10:51,080 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:10:51,082 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:10:51,082 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:10:50" (1/3) ... [2019-12-07 12:10:51,083 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@351a53eb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:10:51, skipping insertion in model container [2019-12-07 12:10:51,083 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:10:50" (2/3) ... [2019-12-07 12:10:51,084 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@351a53eb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:10:51, skipping insertion in model container [2019-12-07 12:10:51,084 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:10:51" (3/3) ... [2019-12-07 12:10:51,085 INFO L109 eAbstractionObserver]: Analyzing ICFG safe004_power.opt.i [2019-12-07 12:10:51,094 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:10:51,094 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:10:51,100 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:10:51,101 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:10:51,125 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,125 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,125 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,125 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,125 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,125 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,126 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,126 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,126 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,126 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,126 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,126 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,126 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,126 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,126 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,127 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,127 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,127 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,127 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,127 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,127 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,127 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,128 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,128 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,128 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,128 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,128 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,128 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,128 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,128 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,129 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,129 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,129 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,130 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,130 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,130 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,130 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,130 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,131 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,131 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,131 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,131 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,132 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,132 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,132 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,132 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,132 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,132 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,132 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,133 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,133 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,133 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,133 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,133 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,133 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,133 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,133 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,133 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,133 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,134 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,134 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,134 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,134 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,134 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,134 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,135 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,135 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,135 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,135 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,135 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,135 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,136 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,136 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,136 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,136 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,136 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,136 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,137 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,137 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,137 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,137 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,137 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,137 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,137 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,138 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,138 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,138 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,138 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,138 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,138 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,138 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,138 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,138 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,139 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:10:51,150 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 12:10:51,163 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:10:51,163 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:10:51,163 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:10:51,163 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:10:51,163 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:10:51,163 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:10:51,164 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:10:51,164 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:10:51,176 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 174 places, 211 transitions [2019-12-07 12:10:51,177 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 12:10:51,242 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 12:10:51,242 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:10:51,252 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 572 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:10:51,266 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 12:10:51,303 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 12:10:51,303 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:10:51,309 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 572 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:10:51,325 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17074 [2019-12-07 12:10:51,326 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:10:54,181 WARN L192 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 12:10:54,264 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78277 [2019-12-07 12:10:54,264 INFO L214 etLargeBlockEncoding]: Total number of compositions: 111 [2019-12-07 12:10:54,267 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 106 transitions [2019-12-07 12:11:07,209 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 107408 states. [2019-12-07 12:11:07,211 INFO L276 IsEmpty]: Start isEmpty. Operand 107408 states. [2019-12-07 12:11:07,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 12:11:07,215 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:11:07,215 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 12:11:07,216 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:11:07,219 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:11:07,219 INFO L82 PathProgramCache]: Analyzing trace with hash 809703812, now seen corresponding path program 1 times [2019-12-07 12:11:07,225 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:11:07,225 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1538174707] [2019-12-07 12:11:07,225 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:11:07,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:11:07,366 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:11:07,366 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1538174707] [2019-12-07 12:11:07,367 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:11:07,367 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:11:07,367 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1053353752] [2019-12-07 12:11:07,370 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:11:07,371 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:11:07,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:11:07,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:11:07,381 INFO L87 Difference]: Start difference. First operand 107408 states. Second operand 3 states. [2019-12-07 12:11:08,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:11:08,049 INFO L93 Difference]: Finished difference Result 107108 states and 460900 transitions. [2019-12-07 12:11:08,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:11:08,050 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 12:11:08,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:11:08,637 INFO L225 Difference]: With dead ends: 107108 [2019-12-07 12:11:08,637 INFO L226 Difference]: Without dead ends: 104924 [2019-12-07 12:11:08,638 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:11:11,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104924 states. [2019-12-07 12:11:13,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104924 to 104924. [2019-12-07 12:11:13,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104924 states. [2019-12-07 12:11:15,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104924 states to 104924 states and 451982 transitions. [2019-12-07 12:11:15,609 INFO L78 Accepts]: Start accepts. Automaton has 104924 states and 451982 transitions. Word has length 5 [2019-12-07 12:11:15,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:11:15,610 INFO L462 AbstractCegarLoop]: Abstraction has 104924 states and 451982 transitions. [2019-12-07 12:11:15,610 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:11:15,610 INFO L276 IsEmpty]: Start isEmpty. Operand 104924 states and 451982 transitions. [2019-12-07 12:11:15,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 12:11:15,612 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:11:15,612 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:11:15,612 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:11:15,613 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:11:15,613 INFO L82 PathProgramCache]: Analyzing trace with hash 2105056515, now seen corresponding path program 1 times [2019-12-07 12:11:15,613 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:11:15,613 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1377497384] [2019-12-07 12:11:15,613 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:11:15,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:11:15,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:11:15,683 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1377497384] [2019-12-07 12:11:15,683 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:11:15,683 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:11:15,683 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1628083998] [2019-12-07 12:11:15,684 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:11:15,684 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:11:15,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:11:15,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:11:15,685 INFO L87 Difference]: Start difference. First operand 104924 states and 451982 transitions. Second operand 4 states. [2019-12-07 12:11:16,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:11:16,560 INFO L93 Difference]: Finished difference Result 168606 states and 697152 transitions. [2019-12-07 12:11:16,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:11:16,561 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 12:11:16,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:11:17,053 INFO L225 Difference]: With dead ends: 168606 [2019-12-07 12:11:17,053 INFO L226 Difference]: Without dead ends: 168557 [2019-12-07 12:11:17,053 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:11:21,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168557 states. [2019-12-07 12:11:23,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168557 to 152629. [2019-12-07 12:11:23,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152629 states. [2019-12-07 12:11:23,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152629 states to 152629 states and 638547 transitions. [2019-12-07 12:11:23,637 INFO L78 Accepts]: Start accepts. Automaton has 152629 states and 638547 transitions. Word has length 11 [2019-12-07 12:11:23,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:11:23,637 INFO L462 AbstractCegarLoop]: Abstraction has 152629 states and 638547 transitions. [2019-12-07 12:11:23,637 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:11:23,637 INFO L276 IsEmpty]: Start isEmpty. Operand 152629 states and 638547 transitions. [2019-12-07 12:11:23,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:11:23,643 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:11:23,643 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:11:23,643 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:11:23,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:11:23,643 INFO L82 PathProgramCache]: Analyzing trace with hash 2027270657, now seen corresponding path program 1 times [2019-12-07 12:11:23,643 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:11:23,643 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [598720548] [2019-12-07 12:11:23,644 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:11:23,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:11:23,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:11:23,699 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [598720548] [2019-12-07 12:11:23,699 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:11:23,700 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:11:23,700 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2132270553] [2019-12-07 12:11:23,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:11:23,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:11:23,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:11:23,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:11:23,701 INFO L87 Difference]: Start difference. First operand 152629 states and 638547 transitions. Second operand 4 states. [2019-12-07 12:11:26,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:11:26,332 INFO L93 Difference]: Finished difference Result 217678 states and 889823 transitions. [2019-12-07 12:11:26,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:11:26,332 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 12:11:26,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:11:26,902 INFO L225 Difference]: With dead ends: 217678 [2019-12-07 12:11:26,902 INFO L226 Difference]: Without dead ends: 217615 [2019-12-07 12:11:26,902 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:11:31,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217615 states. [2019-12-07 12:11:33,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217615 to 183279. [2019-12-07 12:11:33,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183279 states. [2019-12-07 12:11:34,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183279 states to 183279 states and 761454 transitions. [2019-12-07 12:11:34,327 INFO L78 Accepts]: Start accepts. Automaton has 183279 states and 761454 transitions. Word has length 13 [2019-12-07 12:11:34,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:11:34,328 INFO L462 AbstractCegarLoop]: Abstraction has 183279 states and 761454 transitions. [2019-12-07 12:11:34,328 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:11:34,328 INFO L276 IsEmpty]: Start isEmpty. Operand 183279 states and 761454 transitions. [2019-12-07 12:11:34,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:11:34,330 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:11:34,330 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:11:34,330 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:11:34,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:11:34,330 INFO L82 PathProgramCache]: Analyzing trace with hash 1789207667, now seen corresponding path program 1 times [2019-12-07 12:11:34,331 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:11:34,331 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [548252721] [2019-12-07 12:11:34,331 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:11:34,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:11:34,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:11:34,378 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [548252721] [2019-12-07 12:11:34,378 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:11:34,378 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:11:34,378 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2086419485] [2019-12-07 12:11:34,378 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:11:34,378 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:11:34,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:11:34,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:11:34,379 INFO L87 Difference]: Start difference. First operand 183279 states and 761454 transitions. Second operand 4 states. [2019-12-07 12:11:35,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:11:35,497 INFO L93 Difference]: Finished difference Result 228772 states and 941089 transitions. [2019-12-07 12:11:35,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:11:35,498 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 12:11:35,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:11:36,111 INFO L225 Difference]: With dead ends: 228772 [2019-12-07 12:11:36,111 INFO L226 Difference]: Without dead ends: 228772 [2019-12-07 12:11:36,111 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:11:40,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228772 states. [2019-12-07 12:11:45,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228772 to 193424. [2019-12-07 12:11:45,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193424 states. [2019-12-07 12:11:46,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193424 states to 193424 states and 803706 transitions. [2019-12-07 12:11:46,541 INFO L78 Accepts]: Start accepts. Automaton has 193424 states and 803706 transitions. Word has length 13 [2019-12-07 12:11:46,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:11:46,541 INFO L462 AbstractCegarLoop]: Abstraction has 193424 states and 803706 transitions. [2019-12-07 12:11:46,541 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:11:46,541 INFO L276 IsEmpty]: Start isEmpty. Operand 193424 states and 803706 transitions. [2019-12-07 12:11:46,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 12:11:46,554 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:11:46,554 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:11:46,554 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:11:46,554 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:11:46,554 INFO L82 PathProgramCache]: Analyzing trace with hash 1405830784, now seen corresponding path program 1 times [2019-12-07 12:11:46,554 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:11:46,554 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [369952881] [2019-12-07 12:11:46,554 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:11:46,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:11:46,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:11:46,621 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [369952881] [2019-12-07 12:11:46,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:11:46,621 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:11:46,621 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [505037036] [2019-12-07 12:11:46,621 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:11:46,621 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:11:46,621 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:11:46,622 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:11:46,622 INFO L87 Difference]: Start difference. First operand 193424 states and 803706 transitions. Second operand 5 states. [2019-12-07 12:11:48,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:11:48,587 INFO L93 Difference]: Finished difference Result 284752 states and 1156454 transitions. [2019-12-07 12:11:48,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:11:48,588 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 12:11:48,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:11:49,287 INFO L225 Difference]: With dead ends: 284752 [2019-12-07 12:11:49,288 INFO L226 Difference]: Without dead ends: 284612 [2019-12-07 12:11:49,288 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:11:54,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284612 states. [2019-12-07 12:12:00,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284612 to 212401. [2019-12-07 12:12:00,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212401 states. [2019-12-07 12:12:00,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212401 states to 212401 states and 878348 transitions. [2019-12-07 12:12:00,994 INFO L78 Accepts]: Start accepts. Automaton has 212401 states and 878348 transitions. Word has length 19 [2019-12-07 12:12:00,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:00,995 INFO L462 AbstractCegarLoop]: Abstraction has 212401 states and 878348 transitions. [2019-12-07 12:12:00,995 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:12:00,995 INFO L276 IsEmpty]: Start isEmpty. Operand 212401 states and 878348 transitions. [2019-12-07 12:12:01,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 12:12:01,006 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:01,006 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:01,006 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:01,006 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:01,006 INFO L82 PathProgramCache]: Analyzing trace with hash 1167767794, now seen corresponding path program 1 times [2019-12-07 12:12:01,006 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:01,007 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1239624208] [2019-12-07 12:12:01,007 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:01,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:01,062 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:01,062 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1239624208] [2019-12-07 12:12:01,062 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:01,062 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:12:01,062 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1930604363] [2019-12-07 12:12:01,063 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:12:01,063 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:01,063 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:12:01,063 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:12:01,063 INFO L87 Difference]: Start difference. First operand 212401 states and 878348 transitions. Second operand 5 states. [2019-12-07 12:12:03,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:03,038 INFO L93 Difference]: Finished difference Result 308783 states and 1251594 transitions. [2019-12-07 12:12:03,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:12:03,039 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 12:12:03,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:03,798 INFO L225 Difference]: With dead ends: 308783 [2019-12-07 12:12:03,798 INFO L226 Difference]: Without dead ends: 308720 [2019-12-07 12:12:03,798 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:12:09,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 308720 states. [2019-12-07 12:12:15,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 308720 to 216265. [2019-12-07 12:12:15,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 216265 states. [2019-12-07 12:12:16,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216265 states to 216265 states and 893275 transitions. [2019-12-07 12:12:16,163 INFO L78 Accepts]: Start accepts. Automaton has 216265 states and 893275 transitions. Word has length 19 [2019-12-07 12:12:16,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:16,163 INFO L462 AbstractCegarLoop]: Abstraction has 216265 states and 893275 transitions. [2019-12-07 12:12:16,163 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:12:16,163 INFO L276 IsEmpty]: Start isEmpty. Operand 216265 states and 893275 transitions. [2019-12-07 12:12:16,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 12:12:16,175 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:16,176 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:16,176 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:16,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:16,176 INFO L82 PathProgramCache]: Analyzing trace with hash 1572236508, now seen corresponding path program 1 times [2019-12-07 12:12:16,176 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:16,176 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1042145269] [2019-12-07 12:12:16,176 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:16,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:16,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:16,206 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1042145269] [2019-12-07 12:12:16,206 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:16,206 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:12:16,207 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [496076398] [2019-12-07 12:12:16,207 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:12:16,207 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:16,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:12:16,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:12:16,207 INFO L87 Difference]: Start difference. First operand 216265 states and 893275 transitions. Second operand 3 states. [2019-12-07 12:12:16,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:16,314 INFO L93 Difference]: Finished difference Result 41234 states and 133454 transitions. [2019-12-07 12:12:16,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:12:16,315 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 12:12:16,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:16,371 INFO L225 Difference]: With dead ends: 41234 [2019-12-07 12:12:16,371 INFO L226 Difference]: Without dead ends: 41234 [2019-12-07 12:12:16,371 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:12:16,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41234 states. [2019-12-07 12:12:17,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41234 to 41234. [2019-12-07 12:12:17,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41234 states. [2019-12-07 12:12:17,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41234 states to 41234 states and 133454 transitions. [2019-12-07 12:12:17,316 INFO L78 Accepts]: Start accepts. Automaton has 41234 states and 133454 transitions. Word has length 19 [2019-12-07 12:12:17,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:17,316 INFO L462 AbstractCegarLoop]: Abstraction has 41234 states and 133454 transitions. [2019-12-07 12:12:17,316 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:12:17,316 INFO L276 IsEmpty]: Start isEmpty. Operand 41234 states and 133454 transitions. [2019-12-07 12:12:17,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 12:12:17,323 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:17,323 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:17,323 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:17,323 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:17,323 INFO L82 PathProgramCache]: Analyzing trace with hash 398024066, now seen corresponding path program 1 times [2019-12-07 12:12:17,323 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:17,323 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1502400269] [2019-12-07 12:12:17,323 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:17,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:17,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:17,410 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1502400269] [2019-12-07 12:12:17,410 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:17,411 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:12:17,411 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [730740882] [2019-12-07 12:12:17,411 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:12:17,411 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:17,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:12:17,412 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:12:17,412 INFO L87 Difference]: Start difference. First operand 41234 states and 133454 transitions. Second operand 6 states. [2019-12-07 12:12:17,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:17,922 INFO L93 Difference]: Finished difference Result 56378 states and 179370 transitions. [2019-12-07 12:12:17,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:12:17,922 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2019-12-07 12:12:17,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:18,004 INFO L225 Difference]: With dead ends: 56378 [2019-12-07 12:12:18,004 INFO L226 Difference]: Without dead ends: 56378 [2019-12-07 12:12:18,005 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:12:18,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56378 states. [2019-12-07 12:12:18,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56378 to 43275. [2019-12-07 12:12:18,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43275 states. [2019-12-07 12:12:18,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43275 states to 43275 states and 139859 transitions. [2019-12-07 12:12:18,749 INFO L78 Accepts]: Start accepts. Automaton has 43275 states and 139859 transitions. Word has length 25 [2019-12-07 12:12:18,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:18,749 INFO L462 AbstractCegarLoop]: Abstraction has 43275 states and 139859 transitions. [2019-12-07 12:12:18,749 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:12:18,749 INFO L276 IsEmpty]: Start isEmpty. Operand 43275 states and 139859 transitions. [2019-12-07 12:12:18,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 12:12:18,761 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:18,761 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:18,761 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:18,761 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:18,761 INFO L82 PathProgramCache]: Analyzing trace with hash 1074030587, now seen corresponding path program 1 times [2019-12-07 12:12:18,761 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:18,762 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [524664199] [2019-12-07 12:12:18,762 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:18,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:18,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:18,841 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [524664199] [2019-12-07 12:12:18,842 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:18,842 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:12:18,842 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [764817500] [2019-12-07 12:12:18,842 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:12:18,842 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:18,843 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:12:18,843 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:12:18,843 INFO L87 Difference]: Start difference. First operand 43275 states and 139859 transitions. Second operand 6 states. [2019-12-07 12:12:19,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:19,842 INFO L93 Difference]: Finished difference Result 54041 states and 172398 transitions. [2019-12-07 12:12:19,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 12:12:19,842 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31 [2019-12-07 12:12:19,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:19,914 INFO L225 Difference]: With dead ends: 54041 [2019-12-07 12:12:19,914 INFO L226 Difference]: Without dead ends: 54028 [2019-12-07 12:12:19,915 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2019-12-07 12:12:20,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54028 states. [2019-12-07 12:12:20,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54028 to 39992. [2019-12-07 12:12:20,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39992 states. [2019-12-07 12:12:20,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39992 states to 39992 states and 129830 transitions. [2019-12-07 12:12:20,598 INFO L78 Accepts]: Start accepts. Automaton has 39992 states and 129830 transitions. Word has length 31 [2019-12-07 12:12:20,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:20,598 INFO L462 AbstractCegarLoop]: Abstraction has 39992 states and 129830 transitions. [2019-12-07 12:12:20,598 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:12:20,598 INFO L276 IsEmpty]: Start isEmpty. Operand 39992 states and 129830 transitions. [2019-12-07 12:12:20,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 12:12:20,620 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:20,620 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:20,620 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:20,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:20,621 INFO L82 PathProgramCache]: Analyzing trace with hash 1564491709, now seen corresponding path program 1 times [2019-12-07 12:12:20,621 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:20,621 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [94238643] [2019-12-07 12:12:20,621 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:20,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:20,646 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:20,646 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [94238643] [2019-12-07 12:12:20,647 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:20,647 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:12:20,647 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1037716642] [2019-12-07 12:12:20,647 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:12:20,647 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:20,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:12:20,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:12:20,648 INFO L87 Difference]: Start difference. First operand 39992 states and 129830 transitions. Second operand 3 states. [2019-12-07 12:12:20,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:20,793 INFO L93 Difference]: Finished difference Result 46835 states and 152675 transitions. [2019-12-07 12:12:20,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:12:20,794 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 12:12:20,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:20,857 INFO L225 Difference]: With dead ends: 46835 [2019-12-07 12:12:20,858 INFO L226 Difference]: Without dead ends: 46835 [2019-12-07 12:12:20,858 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:12:21,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46835 states. [2019-12-07 12:12:21,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46835 to 44393. [2019-12-07 12:12:21,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44393 states. [2019-12-07 12:12:21,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44393 states to 44393 states and 145223 transitions. [2019-12-07 12:12:21,543 INFO L78 Accepts]: Start accepts. Automaton has 44393 states and 145223 transitions. Word has length 39 [2019-12-07 12:12:21,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:21,543 INFO L462 AbstractCegarLoop]: Abstraction has 44393 states and 145223 transitions. [2019-12-07 12:12:21,543 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:12:21,543 INFO L276 IsEmpty]: Start isEmpty. Operand 44393 states and 145223 transitions. [2019-12-07 12:12:21,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 12:12:21,565 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:21,565 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:21,565 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:21,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:21,565 INFO L82 PathProgramCache]: Analyzing trace with hash 1697210614, now seen corresponding path program 1 times [2019-12-07 12:12:21,565 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:21,565 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2139388534] [2019-12-07 12:12:21,566 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:21,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:21,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:21,594 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2139388534] [2019-12-07 12:12:21,594 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:21,594 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:12:21,594 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [630897053] [2019-12-07 12:12:21,595 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:12:21,595 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:21,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:12:21,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:12:21,595 INFO L87 Difference]: Start difference. First operand 44393 states and 145223 transitions. Second operand 4 states. [2019-12-07 12:12:21,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:21,626 INFO L93 Difference]: Finished difference Result 7906 states and 21265 transitions. [2019-12-07 12:12:21,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:12:21,627 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2019-12-07 12:12:21,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:21,633 INFO L225 Difference]: With dead ends: 7906 [2019-12-07 12:12:21,633 INFO L226 Difference]: Without dead ends: 7906 [2019-12-07 12:12:21,633 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:12:21,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7906 states. [2019-12-07 12:12:21,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7906 to 7794. [2019-12-07 12:12:21,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7794 states. [2019-12-07 12:12:21,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7794 states to 7794 states and 20945 transitions. [2019-12-07 12:12:21,718 INFO L78 Accepts]: Start accepts. Automaton has 7794 states and 20945 transitions. Word has length 39 [2019-12-07 12:12:21,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:21,718 INFO L462 AbstractCegarLoop]: Abstraction has 7794 states and 20945 transitions. [2019-12-07 12:12:21,718 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:12:21,718 INFO L276 IsEmpty]: Start isEmpty. Operand 7794 states and 20945 transitions. [2019-12-07 12:12:21,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 12:12:21,724 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:21,724 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:21,724 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:21,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:21,724 INFO L82 PathProgramCache]: Analyzing trace with hash -994376569, now seen corresponding path program 1 times [2019-12-07 12:12:21,724 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:21,724 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816977941] [2019-12-07 12:12:21,724 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:21,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:21,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:21,823 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [816977941] [2019-12-07 12:12:21,823 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:21,823 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:12:21,823 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [456530852] [2019-12-07 12:12:21,824 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:12:21,824 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:21,824 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:12:21,824 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:12:21,824 INFO L87 Difference]: Start difference. First operand 7794 states and 20945 transitions. Second operand 5 states. [2019-12-07 12:12:21,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:21,846 INFO L93 Difference]: Finished difference Result 5050 states and 14454 transitions. [2019-12-07 12:12:21,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:12:21,846 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-12-07 12:12:21,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:21,850 INFO L225 Difference]: With dead ends: 5050 [2019-12-07 12:12:21,850 INFO L226 Difference]: Without dead ends: 5050 [2019-12-07 12:12:21,851 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:12:21,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5050 states. [2019-12-07 12:12:21,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5050 to 4686. [2019-12-07 12:12:21,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4686 states. [2019-12-07 12:12:21,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4686 states to 4686 states and 13470 transitions. [2019-12-07 12:12:21,904 INFO L78 Accepts]: Start accepts. Automaton has 4686 states and 13470 transitions. Word has length 51 [2019-12-07 12:12:21,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:21,904 INFO L462 AbstractCegarLoop]: Abstraction has 4686 states and 13470 transitions. [2019-12-07 12:12:21,904 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:12:21,904 INFO L276 IsEmpty]: Start isEmpty. Operand 4686 states and 13470 transitions. [2019-12-07 12:12:21,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 12:12:21,907 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:21,907 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:21,907 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:21,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:21,907 INFO L82 PathProgramCache]: Analyzing trace with hash 1902070617, now seen corresponding path program 1 times [2019-12-07 12:12:21,908 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:21,908 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1032846368] [2019-12-07 12:12:21,908 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:21,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:21,951 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:21,951 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1032846368] [2019-12-07 12:12:21,951 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:21,952 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:12:21,952 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [202118169] [2019-12-07 12:12:21,952 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:12:21,952 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:21,952 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:12:21,952 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:12:21,952 INFO L87 Difference]: Start difference. First operand 4686 states and 13470 transitions. Second operand 3 states. [2019-12-07 12:12:21,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:21,986 INFO L93 Difference]: Finished difference Result 4690 states and 13463 transitions. [2019-12-07 12:12:21,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:12:21,987 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 12:12:21,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:21,991 INFO L225 Difference]: With dead ends: 4690 [2019-12-07 12:12:21,991 INFO L226 Difference]: Without dead ends: 4690 [2019-12-07 12:12:21,991 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:12:22,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4690 states. [2019-12-07 12:12:22,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4690 to 4682. [2019-12-07 12:12:22,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4682 states. [2019-12-07 12:12:22,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4682 states to 4682 states and 13455 transitions. [2019-12-07 12:12:22,043 INFO L78 Accepts]: Start accepts. Automaton has 4682 states and 13455 transitions. Word has length 65 [2019-12-07 12:12:22,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:22,044 INFO L462 AbstractCegarLoop]: Abstraction has 4682 states and 13455 transitions. [2019-12-07 12:12:22,044 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:12:22,044 INFO L276 IsEmpty]: Start isEmpty. Operand 4682 states and 13455 transitions. [2019-12-07 12:12:22,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 12:12:22,047 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:22,048 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:22,048 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:22,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:22,048 INFO L82 PathProgramCache]: Analyzing trace with hash 1892358751, now seen corresponding path program 1 times [2019-12-07 12:12:22,048 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:22,048 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1039379064] [2019-12-07 12:12:22,048 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:22,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:22,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:22,099 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1039379064] [2019-12-07 12:12:22,099 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:22,099 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:12:22,100 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1008550279] [2019-12-07 12:12:22,100 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:12:22,100 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:22,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:12:22,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:12:22,100 INFO L87 Difference]: Start difference. First operand 4682 states and 13455 transitions. Second operand 3 states. [2019-12-07 12:12:22,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:22,115 INFO L93 Difference]: Finished difference Result 4682 states and 13251 transitions. [2019-12-07 12:12:22,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:12:22,116 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 12:12:22,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:22,119 INFO L225 Difference]: With dead ends: 4682 [2019-12-07 12:12:22,119 INFO L226 Difference]: Without dead ends: 4682 [2019-12-07 12:12:22,120 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:12:22,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4682 states. [2019-12-07 12:12:22,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4682 to 4682. [2019-12-07 12:12:22,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4682 states. [2019-12-07 12:12:22,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4682 states to 4682 states and 13251 transitions. [2019-12-07 12:12:22,173 INFO L78 Accepts]: Start accepts. Automaton has 4682 states and 13251 transitions. Word has length 65 [2019-12-07 12:12:22,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:22,173 INFO L462 AbstractCegarLoop]: Abstraction has 4682 states and 13251 transitions. [2019-12-07 12:12:22,173 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:12:22,173 INFO L276 IsEmpty]: Start isEmpty. Operand 4682 states and 13251 transitions. [2019-12-07 12:12:22,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:12:22,176 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:22,176 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:22,176 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:22,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:22,176 INFO L82 PathProgramCache]: Analyzing trace with hash 1887448171, now seen corresponding path program 1 times [2019-12-07 12:12:22,177 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:22,177 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1004434398] [2019-12-07 12:12:22,177 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:22,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:22,225 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:22,225 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1004434398] [2019-12-07 12:12:22,225 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:22,225 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:12:22,226 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [175246849] [2019-12-07 12:12:22,226 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:12:22,226 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:22,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:12:22,226 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:12:22,226 INFO L87 Difference]: Start difference. First operand 4682 states and 13251 transitions. Second operand 5 states. [2019-12-07 12:12:22,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:22,413 INFO L93 Difference]: Finished difference Result 7016 states and 19631 transitions. [2019-12-07 12:12:22,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:12:22,414 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 12:12:22,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:22,421 INFO L225 Difference]: With dead ends: 7016 [2019-12-07 12:12:22,422 INFO L226 Difference]: Without dead ends: 7016 [2019-12-07 12:12:22,422 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:12:22,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7016 states. [2019-12-07 12:12:22,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7016 to 5523. [2019-12-07 12:12:22,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5523 states. [2019-12-07 12:12:22,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5523 states to 5523 states and 15585 transitions. [2019-12-07 12:12:22,503 INFO L78 Accepts]: Start accepts. Automaton has 5523 states and 15585 transitions. Word has length 66 [2019-12-07 12:12:22,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:22,504 INFO L462 AbstractCegarLoop]: Abstraction has 5523 states and 15585 transitions. [2019-12-07 12:12:22,504 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:12:22,504 INFO L276 IsEmpty]: Start isEmpty. Operand 5523 states and 15585 transitions. [2019-12-07 12:12:22,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:12:22,508 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:22,508 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:22,508 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:22,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:22,508 INFO L82 PathProgramCache]: Analyzing trace with hash 284491425, now seen corresponding path program 2 times [2019-12-07 12:12:22,508 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:22,508 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1003331932] [2019-12-07 12:12:22,508 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:22,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:22,567 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:22,567 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1003331932] [2019-12-07 12:12:22,567 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:22,568 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:12:22,568 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [169186125] [2019-12-07 12:12:22,568 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:12:22,568 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:22,568 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:12:22,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:12:22,568 INFO L87 Difference]: Start difference. First operand 5523 states and 15585 transitions. Second operand 6 states. [2019-12-07 12:12:22,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:22,821 INFO L93 Difference]: Finished difference Result 7367 states and 20542 transitions. [2019-12-07 12:12:22,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:12:22,822 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 12:12:22,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:22,827 INFO L225 Difference]: With dead ends: 7367 [2019-12-07 12:12:22,828 INFO L226 Difference]: Without dead ends: 7367 [2019-12-07 12:12:22,828 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:12:22,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7367 states. [2019-12-07 12:12:22,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7367 to 6104. [2019-12-07 12:12:22,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6104 states. [2019-12-07 12:12:22,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6104 states to 6104 states and 17210 transitions. [2019-12-07 12:12:22,904 INFO L78 Accepts]: Start accepts. Automaton has 6104 states and 17210 transitions. Word has length 66 [2019-12-07 12:12:22,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:22,904 INFO L462 AbstractCegarLoop]: Abstraction has 6104 states and 17210 transitions. [2019-12-07 12:12:22,904 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:12:22,904 INFO L276 IsEmpty]: Start isEmpty. Operand 6104 states and 17210 transitions. [2019-12-07 12:12:22,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:12:22,908 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:22,908 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:22,909 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:22,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:22,909 INFO L82 PathProgramCache]: Analyzing trace with hash -2082058241, now seen corresponding path program 3 times [2019-12-07 12:12:22,909 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:22,909 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1771503715] [2019-12-07 12:12:22,909 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:22,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:22,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:22,962 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1771503715] [2019-12-07 12:12:22,962 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:22,962 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:12:22,962 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1931159670] [2019-12-07 12:12:22,963 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:12:22,963 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:22,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:12:22,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:12:22,963 INFO L87 Difference]: Start difference. First operand 6104 states and 17210 transitions. Second operand 6 states. [2019-12-07 12:12:23,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:23,205 INFO L93 Difference]: Finished difference Result 8274 states and 22997 transitions. [2019-12-07 12:12:23,205 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 12:12:23,205 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 12:12:23,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:23,211 INFO L225 Difference]: With dead ends: 8274 [2019-12-07 12:12:23,212 INFO L226 Difference]: Without dead ends: 8274 [2019-12-07 12:12:23,212 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2019-12-07 12:12:23,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8274 states. [2019-12-07 12:12:23,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8274 to 6762. [2019-12-07 12:12:23,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6762 states. [2019-12-07 12:12:23,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6762 states to 6762 states and 18933 transitions. [2019-12-07 12:12:23,302 INFO L78 Accepts]: Start accepts. Automaton has 6762 states and 18933 transitions. Word has length 66 [2019-12-07 12:12:23,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:23,302 INFO L462 AbstractCegarLoop]: Abstraction has 6762 states and 18933 transitions. [2019-12-07 12:12:23,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:12:23,302 INFO L276 IsEmpty]: Start isEmpty. Operand 6762 states and 18933 transitions. [2019-12-07 12:12:23,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:12:23,307 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:23,307 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:23,307 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:23,307 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:23,308 INFO L82 PathProgramCache]: Analyzing trace with hash 504707035, now seen corresponding path program 4 times [2019-12-07 12:12:23,308 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:23,308 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1433354965] [2019-12-07 12:12:23,308 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:23,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:23,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:23,340 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1433354965] [2019-12-07 12:12:23,340 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:23,340 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:12:23,340 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1260388307] [2019-12-07 12:12:23,341 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:12:23,341 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:23,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:12:23,341 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:12:23,341 INFO L87 Difference]: Start difference. First operand 6762 states and 18933 transitions. Second operand 3 states. [2019-12-07 12:12:23,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:23,386 INFO L93 Difference]: Finished difference Result 6762 states and 18932 transitions. [2019-12-07 12:12:23,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:12:23,386 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 12:12:23,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:23,394 INFO L225 Difference]: With dead ends: 6762 [2019-12-07 12:12:23,394 INFO L226 Difference]: Without dead ends: 6762 [2019-12-07 12:12:23,395 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:12:23,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6762 states. [2019-12-07 12:12:23,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6762 to 5396. [2019-12-07 12:12:23,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5396 states. [2019-12-07 12:12:23,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5396 states to 5396 states and 15179 transitions. [2019-12-07 12:12:23,462 INFO L78 Accepts]: Start accepts. Automaton has 5396 states and 15179 transitions. Word has length 66 [2019-12-07 12:12:23,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:23,463 INFO L462 AbstractCegarLoop]: Abstraction has 5396 states and 15179 transitions. [2019-12-07 12:12:23,463 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:12:23,463 INFO L276 IsEmpty]: Start isEmpty. Operand 5396 states and 15179 transitions. [2019-12-07 12:12:23,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:12:23,467 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:23,467 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:23,467 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:23,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:23,467 INFO L82 PathProgramCache]: Analyzing trace with hash 486159966, now seen corresponding path program 1 times [2019-12-07 12:12:23,467 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:23,467 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1278152546] [2019-12-07 12:12:23,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:23,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:23,551 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:23,551 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1278152546] [2019-12-07 12:12:23,552 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:23,552 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:12:23,552 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1880407547] [2019-12-07 12:12:23,552 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:12:23,552 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:23,552 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:12:23,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:12:23,552 INFO L87 Difference]: Start difference. First operand 5396 states and 15179 transitions. Second operand 7 states. [2019-12-07 12:12:23,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:23,689 INFO L93 Difference]: Finished difference Result 17056 states and 48331 transitions. [2019-12-07 12:12:23,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 12:12:23,689 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 12:12:23,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:23,698 INFO L225 Difference]: With dead ends: 17056 [2019-12-07 12:12:23,698 INFO L226 Difference]: Without dead ends: 10454 [2019-12-07 12:12:23,699 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=101, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:12:23,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10454 states. [2019-12-07 12:12:23,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10454 to 5396. [2019-12-07 12:12:23,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5396 states. [2019-12-07 12:12:23,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5396 states to 5396 states and 15110 transitions. [2019-12-07 12:12:23,784 INFO L78 Accepts]: Start accepts. Automaton has 5396 states and 15110 transitions. Word has length 67 [2019-12-07 12:12:23,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:23,784 INFO L462 AbstractCegarLoop]: Abstraction has 5396 states and 15110 transitions. [2019-12-07 12:12:23,784 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:12:23,784 INFO L276 IsEmpty]: Start isEmpty. Operand 5396 states and 15110 transitions. [2019-12-07 12:12:23,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:12:23,787 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:23,787 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:23,787 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:23,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:23,788 INFO L82 PathProgramCache]: Analyzing trace with hash -1374987048, now seen corresponding path program 2 times [2019-12-07 12:12:23,788 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:23,788 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811173312] [2019-12-07 12:12:23,788 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:23,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:23,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:23,841 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811173312] [2019-12-07 12:12:23,841 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:23,841 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:12:23,841 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2002256140] [2019-12-07 12:12:23,841 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:12:23,842 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:23,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:12:23,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:12:23,842 INFO L87 Difference]: Start difference. First operand 5396 states and 15110 transitions. Second operand 5 states. [2019-12-07 12:12:23,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:23,885 INFO L93 Difference]: Finished difference Result 8163 states and 22849 transitions. [2019-12-07 12:12:23,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:12:23,885 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2019-12-07 12:12:23,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:23,888 INFO L225 Difference]: With dead ends: 8163 [2019-12-07 12:12:23,888 INFO L226 Difference]: Without dead ends: 3097 [2019-12-07 12:12:23,888 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:12:23,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3097 states. [2019-12-07 12:12:23,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3097 to 3097. [2019-12-07 12:12:23,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3097 states. [2019-12-07 12:12:23,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3097 states to 3097 states and 8593 transitions. [2019-12-07 12:12:23,925 INFO L78 Accepts]: Start accepts. Automaton has 3097 states and 8593 transitions. Word has length 67 [2019-12-07 12:12:23,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:23,925 INFO L462 AbstractCegarLoop]: Abstraction has 3097 states and 8593 transitions. [2019-12-07 12:12:23,925 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:12:23,925 INFO L276 IsEmpty]: Start isEmpty. Operand 3097 states and 8593 transitions. [2019-12-07 12:12:23,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:12:23,927 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:23,927 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:23,927 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:23,927 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:23,927 INFO L82 PathProgramCache]: Analyzing trace with hash -846830136, now seen corresponding path program 3 times [2019-12-07 12:12:23,928 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:23,928 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [490195211] [2019-12-07 12:12:23,928 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:23,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:23,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:23,975 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [490195211] [2019-12-07 12:12:23,975 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:23,975 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:12:23,975 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [990903226] [2019-12-07 12:12:23,975 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:12:23,975 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:23,976 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:12:23,976 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:12:23,976 INFO L87 Difference]: Start difference. First operand 3097 states and 8593 transitions. Second operand 6 states. [2019-12-07 12:12:24,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:24,210 INFO L93 Difference]: Finished difference Result 4581 states and 12619 transitions. [2019-12-07 12:12:24,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:12:24,210 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 12:12:24,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:24,213 INFO L225 Difference]: With dead ends: 4581 [2019-12-07 12:12:24,214 INFO L226 Difference]: Without dead ends: 4581 [2019-12-07 12:12:24,214 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:12:24,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4581 states. [2019-12-07 12:12:24,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4581 to 3104. [2019-12-07 12:12:24,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3104 states. [2019-12-07 12:12:24,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3104 states to 3104 states and 8613 transitions. [2019-12-07 12:12:24,259 INFO L78 Accepts]: Start accepts. Automaton has 3104 states and 8613 transitions. Word has length 67 [2019-12-07 12:12:24,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:24,259 INFO L462 AbstractCegarLoop]: Abstraction has 3104 states and 8613 transitions. [2019-12-07 12:12:24,259 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:12:24,259 INFO L276 IsEmpty]: Start isEmpty. Operand 3104 states and 8613 transitions. [2019-12-07 12:12:24,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:12:24,262 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:24,262 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:24,262 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:24,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:24,262 INFO L82 PathProgramCache]: Analyzing trace with hash 807616968, now seen corresponding path program 4 times [2019-12-07 12:12:24,262 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:24,262 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [397367655] [2019-12-07 12:12:24,262 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:24,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:24,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:24,287 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [397367655] [2019-12-07 12:12:24,287 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:24,287 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:12:24,287 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1392407021] [2019-12-07 12:12:24,288 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:12:24,288 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:24,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:12:24,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:12:24,288 INFO L87 Difference]: Start difference. First operand 3104 states and 8613 transitions. Second operand 3 states. [2019-12-07 12:12:24,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:24,299 INFO L93 Difference]: Finished difference Result 2882 states and 7840 transitions. [2019-12-07 12:12:24,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:12:24,299 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 12:12:24,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:24,301 INFO L225 Difference]: With dead ends: 2882 [2019-12-07 12:12:24,301 INFO L226 Difference]: Without dead ends: 2882 [2019-12-07 12:12:24,302 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:12:24,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2882 states. [2019-12-07 12:12:24,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2882 to 2819. [2019-12-07 12:12:24,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2819 states. [2019-12-07 12:12:24,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2819 states to 2819 states and 7667 transitions. [2019-12-07 12:12:24,338 INFO L78 Accepts]: Start accepts. Automaton has 2819 states and 7667 transitions. Word has length 67 [2019-12-07 12:12:24,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:24,338 INFO L462 AbstractCegarLoop]: Abstraction has 2819 states and 7667 transitions. [2019-12-07 12:12:24,338 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:12:24,338 INFO L276 IsEmpty]: Start isEmpty. Operand 2819 states and 7667 transitions. [2019-12-07 12:12:24,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 12:12:24,340 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:24,340 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:24,340 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:24,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:24,340 INFO L82 PathProgramCache]: Analyzing trace with hash -213601006, now seen corresponding path program 1 times [2019-12-07 12:12:24,340 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:24,340 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [805628904] [2019-12-07 12:12:24,340 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:24,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:12:24,438 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:12:24,439 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [805628904] [2019-12-07 12:12:24,439 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:12:24,439 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:12:24,439 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [799980538] [2019-12-07 12:12:24,439 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:12:24,439 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:12:24,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:12:24,440 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:12:24,440 INFO L87 Difference]: Start difference. First operand 2819 states and 7667 transitions. Second operand 7 states. [2019-12-07 12:12:24,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:12:24,502 INFO L93 Difference]: Finished difference Result 4936 states and 13582 transitions. [2019-12-07 12:12:24,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:12:24,502 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 68 [2019-12-07 12:12:24,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:12:24,504 INFO L225 Difference]: With dead ends: 4936 [2019-12-07 12:12:24,504 INFO L226 Difference]: Without dead ends: 2158 [2019-12-07 12:12:24,504 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:12:24,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2158 states. [2019-12-07 12:12:24,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2158 to 1771. [2019-12-07 12:12:24,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1771 states. [2019-12-07 12:12:24,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1771 states to 1771 states and 4877 transitions. [2019-12-07 12:12:24,530 INFO L78 Accepts]: Start accepts. Automaton has 1771 states and 4877 transitions. Word has length 68 [2019-12-07 12:12:24,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:12:24,530 INFO L462 AbstractCegarLoop]: Abstraction has 1771 states and 4877 transitions. [2019-12-07 12:12:24,530 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:12:24,530 INFO L276 IsEmpty]: Start isEmpty. Operand 1771 states and 4877 transitions. [2019-12-07 12:12:24,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 12:12:24,531 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:12:24,531 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:12:24,531 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:12:24,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:12:24,531 INFO L82 PathProgramCache]: Analyzing trace with hash -1259160564, now seen corresponding path program 2 times [2019-12-07 12:12:24,532 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:12:24,532 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1759233610] [2019-12-07 12:12:24,532 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:12:24,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:12:24,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:12:24,626 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:12:24,626 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 12:12:24,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] ULTIMATE.startENTRY-->L805: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= 0 v_~x~0_194) (= 0 v_~x$r_buff0_thd2~0_213) (= 0 v_~weak$$choice0~0_14) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$w_buff0~0_268) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1876~0.base_20|)) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t1876~0.base_20| 4) |v_#length_25|) (= 0 v_~x$r_buff1_thd2~0_212) (= v_~x$r_buff1_thd0~0_297 0) (= |v_ULTIMATE.start_main_~#t1876~0.offset_17| 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$read_delayed_var~0.base_7) (= v_~x$r_buff1_thd1~0_187 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1876~0.base_20|) (= v_~__unbuffered_p2_EBX~0_22 0) (= v_~x$r_buff0_thd0~0_372 0) (= 0 v_~x$read_delayed~0_6) (= v_~__unbuffered_cnt~0_155 0) (= 0 v_~x$w_buff1~0_230) (= 0 |v_#NULL.base_4|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1876~0.base_20| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1876~0.base_20|) |v_ULTIMATE.start_main_~#t1876~0.offset_17| 0)) |v_#memory_int_21|) (= 0 v_~x$r_buff1_thd3~0_195) (= 0 v_~x$r_buff0_thd3~0_123) (= |v_#NULL.offset_4| 0) (= 0 v_~x$w_buff1_used~0_504) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~x$r_buff0_thd1~0_120 0) (= 0 v_~__unbuffered_p2_EAX~0_22) (= |v_#valid_53| (store .cse0 |v_ULTIMATE.start_main_~#t1876~0.base_20| 1)) (= v_~x$flush_delayed~0_34 0) (= v_~main$tmp_guard0~0_24 0) (= v_~weak$$choice2~0_110 0) (= v_~y~0_136 0) (= 0 v_~x$w_buff0_used~0_807) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ~x$w_buff0~0=v_~x$w_buff0~0_268, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ~x$flush_delayed~0=v_~x$flush_delayed~0_34, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_39|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_45|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_187, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_123, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_50|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_32|, ULTIMATE.start_main_~#t1878~0.offset=|v_ULTIMATE.start_main_~#t1878~0.offset_16|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_372, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_37|, ~x$w_buff1~0=v_~x$w_buff1~0_230, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_42|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_504, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_212, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_~#t1876~0.offset=|v_ULTIMATE.start_main_~#t1876~0.offset_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~x~0=v_~x~0_194, ULTIMATE.start_main_~#t1877~0.offset=|v_ULTIMATE.start_main_~#t1877~0.offset_17|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_120, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_29|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_195, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_125|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_25|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y~0=v_~y~0_136, ULTIMATE.start_main_~#t1876~0.base=|v_ULTIMATE.start_main_~#t1876~0.base_20|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_25|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_48|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_297, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_213, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, ULTIMATE.start_main_~#t1878~0.base=|v_ULTIMATE.start_main_~#t1878~0.base_20|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_38|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_807, ULTIMATE.start_main_~#t1877~0.base=|v_ULTIMATE.start_main_~#t1877~0.base_21|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_32|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t1878~0.offset, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_~#t1876~0.offset, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1877~0.offset, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_~#t1876~0.base, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1878~0.base, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_~#t1877~0.base, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 12:12:24,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L805-1-->L807: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1877~0.base_11|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1877~0.base_11| 1)) (not (= |v_ULTIMATE.start_main_~#t1877~0.base_11| 0)) (= |v_ULTIMATE.start_main_~#t1877~0.offset_10| 0) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1877~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1877~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1877~0.base_11|) |v_ULTIMATE.start_main_~#t1877~0.offset_10| 1)) |v_#memory_int_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1877~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1877~0.base=|v_ULTIMATE.start_main_~#t1877~0.base_11|, ULTIMATE.start_main_~#t1877~0.offset=|v_ULTIMATE.start_main_~#t1877~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1877~0.base, ULTIMATE.start_main_~#t1877~0.offset, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 12:12:24,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L807-1-->L809: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1878~0.base_9|)) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1878~0.base_9| 1)) (= 0 |v_ULTIMATE.start_main_~#t1878~0.offset_8|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1878~0.base_9|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1878~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1878~0.base_9|) |v_ULTIMATE.start_main_~#t1878~0.offset_8| 2))) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t1878~0.base_9| 4) |v_#length_13|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1878~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1878~0.offset=|v_ULTIMATE.start_main_~#t1878~0.offset_8|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1878~0.base=|v_ULTIMATE.start_main_~#t1878~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1878~0.offset, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1878~0.base] because there is no mapped edge [2019-12-07 12:12:24,630 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] P1ENTRY-->L4-3: Formula: (and (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11)) (= v_P1Thread1of1ForFork1_~arg.offset_9 |v_P1Thread1of1ForFork1_#in~arg.offset_11|) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11) (= 1 v_~x$w_buff0_used~0_98) (= 2 v_~x$w_buff0~0_31) (= v_P1Thread1of1ForFork1_~arg.base_9 |v_P1Thread1of1ForFork1_#in~arg.base_11|) (= v_~x$w_buff1_used~0_55 v_~x$w_buff0_used~0_99) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| (ite (not (and (not (= (mod v_~x$w_buff0_used~0_98 256) 0)) (not (= 0 (mod v_~x$w_buff1_used~0_55 256))))) 1 0)) (= v_~x$w_buff0~0_32 v_~x$w_buff1~0_21)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_32, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_99} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11, ~x$w_buff0~0=v_~x$w_buff0~0_31, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_9, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_9, ~x$w_buff1~0=v_~x$w_buff1~0_21, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_55, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 12:12:24,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L782-2-->L782-4: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-191140352 256))) (.cse1 (= (mod ~x$r_buff1_thd3~0_In-191140352 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite15_Out-191140352| ~x$w_buff1~0_In-191140352) (not .cse0) (not .cse1)) (and (= ~x~0_In-191140352 |P2Thread1of1ForFork2_#t~ite15_Out-191140352|) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-191140352, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-191140352, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-191140352, ~x~0=~x~0_In-191140352} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-191140352|, ~x$w_buff1~0=~x$w_buff1~0_In-191140352, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-191140352, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-191140352, ~x~0=~x~0_In-191140352} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 12:12:24,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L782-4-->L783: Formula: (= v_~x~0_20 |v_P2Thread1of1ForFork2_#t~ite15_10|) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_10|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_9|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|, ~x~0=v_~x~0_20} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 12:12:24,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L783-->L783-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1850849656 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In1850849656 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite17_Out1850849656| 0)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In1850849656 |P2Thread1of1ForFork2_#t~ite17_Out1850849656|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1850849656, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1850849656} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1850849656, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1850849656|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1850849656} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 12:12:24,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L784-->L784-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-1973245489 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In-1973245489 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd3~0_In-1973245489 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In-1973245489 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite18_Out-1973245489| 0)) (and (= ~x$w_buff1_used~0_In-1973245489 |P2Thread1of1ForFork2_#t~ite18_Out-1973245489|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1973245489, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1973245489, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1973245489, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1973245489} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1973245489, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1973245489, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1973245489, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-1973245489|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1973245489} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 12:12:24,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L733-2-->L733-5: Formula: (let ((.cse1 (= |P0Thread1of1ForFork0_#t~ite4_Out180053695| |P0Thread1of1ForFork0_#t~ite3_Out180053695|)) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In180053695 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In180053695 256)))) (or (and (= ~x$w_buff1~0_In180053695 |P0Thread1of1ForFork0_#t~ite3_Out180053695|) (not .cse0) .cse1 (not .cse2)) (and .cse1 (= ~x~0_In180053695 |P0Thread1of1ForFork0_#t~ite3_Out180053695|) (or .cse2 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In180053695, ~x$w_buff1_used~0=~x$w_buff1_used~0_In180053695, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In180053695, ~x~0=~x~0_In180053695} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out180053695|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out180053695|, ~x$w_buff1~0=~x$w_buff1~0_In180053695, ~x$w_buff1_used~0=~x$w_buff1_used~0_In180053695, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In180053695, ~x~0=~x~0_In180053695} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 12:12:24,632 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L734-->L734-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In2064754242 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In2064754242 256) 0))) (or (and (= ~x$w_buff0_used~0_In2064754242 |P0Thread1of1ForFork0_#t~ite5_Out2064754242|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out2064754242|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2064754242, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2064754242} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out2064754242|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2064754242, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2064754242} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 12:12:24,632 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L735-->L735-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In1302264833 256))) (.cse3 (= (mod ~x$r_buff0_thd1~0_In1302264833 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In1302264833 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1302264833 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In1302264833 |P0Thread1of1ForFork0_#t~ite6_Out1302264833|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1302264833|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1302264833, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1302264833, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1302264833, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1302264833} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1302264833|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1302264833, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1302264833, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1302264833, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1302264833} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 12:12:24,632 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L785-->L785-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-284324625 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In-284324625 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd3~0_In-284324625 |P2Thread1of1ForFork2_#t~ite19_Out-284324625|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-284324625|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-284324625, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-284324625} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-284324625, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-284324625|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-284324625} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 12:12:24,633 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L786-->L786-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-2032868509 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-2032868509 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-2032868509 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd3~0_In-2032868509 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite20_Out-2032868509| ~x$r_buff1_thd3~0_In-2032868509)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P2Thread1of1ForFork2_#t~ite20_Out-2032868509| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-2032868509, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-2032868509, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-2032868509, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2032868509} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-2032868509|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2032868509, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-2032868509, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-2032868509, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2032868509} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 12:12:24,633 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L786-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P2Thread1of1ForFork2_#t~ite20_52| v_~x$r_buff1_thd3~0_147)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_52|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_51|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_147, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 12:12:24,633 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L736-->L736-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-1133104931 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1133104931 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite7_Out-1133104931| 0)) (and (or .cse0 .cse1) (= ~x$r_buff0_thd1~0_In-1133104931 |P0Thread1of1ForFork0_#t~ite7_Out-1133104931|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1133104931, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1133104931} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1133104931, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1133104931|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1133104931} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 12:12:24,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L737-->L737-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In-286546178 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-286546178 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-286546178 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-286546178 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-286546178| ~x$r_buff1_thd1~0_In-286546178)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-286546178| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-286546178, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-286546178, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-286546178, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-286546178} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-286546178, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-286546178|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-286546178, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-286546178, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-286546178} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 12:12:24,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L737-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_61 |v_P0Thread1of1ForFork0_#t~ite8_24|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_23|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_61} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 12:12:24,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L763-->L763-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-2007067274 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-2007067274 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-2007067274| ~x$w_buff0_used~0_In-2007067274)) (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out-2007067274| 0) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2007067274, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2007067274} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-2007067274|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2007067274, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2007067274} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 12:12:24,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L764-->L764-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-213895224 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd2~0_In-213895224 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-213895224 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-213895224 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out-213895224| 0)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite12_Out-213895224| ~x$w_buff1_used~0_In-213895224)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-213895224, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-213895224, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-213895224, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-213895224} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-213895224, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-213895224, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-213895224|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-213895224, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-213895224} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 12:12:24,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L765-->L766: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_In1587938580 ~x$r_buff0_thd2~0_Out1587938580)) (.cse0 (= (mod ~x$w_buff0_used~0_In1587938580 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In1587938580 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse0) (= 0 ~x$r_buff0_thd2~0_Out1587938580) (not .cse2)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1587938580, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1587938580} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1587938580|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1587938580, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1587938580} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 12:12:24,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L766-->L766-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd2~0_In-1815056866 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In-1815056866 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-1815056866 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1815056866 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$r_buff1_thd2~0_In-1815056866 |P1Thread1of1ForFork1_#t~ite14_Out-1815056866|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-1815056866|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1815056866, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1815056866, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1815056866, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1815056866} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1815056866, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1815056866, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1815056866, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1815056866|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1815056866} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 12:12:24,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L766-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_162 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= (+ v_~__unbuffered_cnt~0_93 1) v_~__unbuffered_cnt~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_162, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_92, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:12:24,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L809-1-->L815: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:12:24,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L815-2-->L815-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite24_Out1595319598| |ULTIMATE.start_main_#t~ite25_Out1595319598|)) (.cse1 (= (mod ~x$r_buff1_thd0~0_In1595319598 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1595319598 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite24_Out1595319598| ~x$w_buff1~0_In1595319598) (not .cse1) .cse2) (and (= ~x~0_In1595319598 |ULTIMATE.start_main_#t~ite24_Out1595319598|) .cse2 (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1595319598, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1595319598, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1595319598, ~x~0=~x~0_In1595319598} OutVars{~x$w_buff1~0=~x$w_buff1~0_In1595319598, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out1595319598|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out1595319598|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1595319598, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1595319598, ~x~0=~x~0_In1595319598} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 12:12:24,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L816-->L816-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In1104245408 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1104245408 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite26_Out1104245408|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1104245408 |ULTIMATE.start_main_#t~ite26_Out1104245408|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1104245408, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1104245408} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1104245408, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1104245408|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1104245408} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 12:12:24,636 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L817-->L817-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1031636129 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-1031636129 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1031636129 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In-1031636129 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite27_Out-1031636129| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite27_Out-1031636129| ~x$w_buff1_used~0_In-1031636129)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1031636129, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1031636129, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1031636129, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1031636129} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1031636129, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1031636129, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1031636129|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1031636129, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1031636129} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 12:12:24,636 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L818-->L818-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In1475788147 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1475788147 256)))) (or (and (= |ULTIMATE.start_main_#t~ite28_Out1475788147| 0) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd0~0_In1475788147 |ULTIMATE.start_main_#t~ite28_Out1475788147|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1475788147, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1475788147} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1475788147, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out1475788147|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1475788147} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 12:12:24,636 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L819-->L819-2: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In775415399 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd0~0_In775415399 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In775415399 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd0~0_In775415399 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite29_Out775415399|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$r_buff1_thd0~0_In775415399 |ULTIMATE.start_main_#t~ite29_Out775415399|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In775415399, ~x$w_buff1_used~0=~x$w_buff1_used~0_In775415399, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In775415399, ~x$w_buff0_used~0=~x$w_buff0_used~0_In775415399} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In775415399, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out775415399|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In775415399, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In775415399, ~x$w_buff0_used~0=~x$w_buff0_used~0_In775415399} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 12:12:24,639 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L831-->L832: Formula: (and (= v_~x$r_buff0_thd0~0_112 v_~x$r_buff0_thd0~0_111) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_112, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_111, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:12:24,639 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L834-->L837-1: Formula: (and (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= (mod v_~x$flush_delayed~0_23 256) 0)) (= v_~x$mem_tmp~0_13 v_~x~0_153) (= v_~x$flush_delayed~0_22 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_23, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ~x$flush_delayed~0=v_~x$flush_delayed~0_22, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13, ~x~0=v_~x~0_153, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:12:24,639 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L837-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 12:12:24,692 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:12:24 BasicIcfg [2019-12-07 12:12:24,692 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 12:12:24,692 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:12:24,692 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:12:24,692 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:12:24,693 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:10:51" (3/4) ... [2019-12-07 12:12:24,694 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 12:12:24,695 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] ULTIMATE.startENTRY-->L805: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= 0 v_~x~0_194) (= 0 v_~x$r_buff0_thd2~0_213) (= 0 v_~weak$$choice0~0_14) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$w_buff0~0_268) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1876~0.base_20|)) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t1876~0.base_20| 4) |v_#length_25|) (= 0 v_~x$r_buff1_thd2~0_212) (= v_~x$r_buff1_thd0~0_297 0) (= |v_ULTIMATE.start_main_~#t1876~0.offset_17| 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$read_delayed_var~0.base_7) (= v_~x$r_buff1_thd1~0_187 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1876~0.base_20|) (= v_~__unbuffered_p2_EBX~0_22 0) (= v_~x$r_buff0_thd0~0_372 0) (= 0 v_~x$read_delayed~0_6) (= v_~__unbuffered_cnt~0_155 0) (= 0 v_~x$w_buff1~0_230) (= 0 |v_#NULL.base_4|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1876~0.base_20| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1876~0.base_20|) |v_ULTIMATE.start_main_~#t1876~0.offset_17| 0)) |v_#memory_int_21|) (= 0 v_~x$r_buff1_thd3~0_195) (= 0 v_~x$r_buff0_thd3~0_123) (= |v_#NULL.offset_4| 0) (= 0 v_~x$w_buff1_used~0_504) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~x$r_buff0_thd1~0_120 0) (= 0 v_~__unbuffered_p2_EAX~0_22) (= |v_#valid_53| (store .cse0 |v_ULTIMATE.start_main_~#t1876~0.base_20| 1)) (= v_~x$flush_delayed~0_34 0) (= v_~main$tmp_guard0~0_24 0) (= v_~weak$$choice2~0_110 0) (= v_~y~0_136 0) (= 0 v_~x$w_buff0_used~0_807) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ~x$w_buff0~0=v_~x$w_buff0~0_268, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ~x$flush_delayed~0=v_~x$flush_delayed~0_34, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_39|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_45|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_187, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_123, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_50|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_32|, ULTIMATE.start_main_~#t1878~0.offset=|v_ULTIMATE.start_main_~#t1878~0.offset_16|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_372, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_37|, ~x$w_buff1~0=v_~x$w_buff1~0_230, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_42|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_504, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_212, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_~#t1876~0.offset=|v_ULTIMATE.start_main_~#t1876~0.offset_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~x~0=v_~x~0_194, ULTIMATE.start_main_~#t1877~0.offset=|v_ULTIMATE.start_main_~#t1877~0.offset_17|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_120, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_29|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_195, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_125|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_25|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y~0=v_~y~0_136, ULTIMATE.start_main_~#t1876~0.base=|v_ULTIMATE.start_main_~#t1876~0.base_20|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_25|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_48|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_297, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_213, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, ULTIMATE.start_main_~#t1878~0.base=|v_ULTIMATE.start_main_~#t1878~0.base_20|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_38|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_807, ULTIMATE.start_main_~#t1877~0.base=|v_ULTIMATE.start_main_~#t1877~0.base_21|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_32|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t1878~0.offset, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_~#t1876~0.offset, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1877~0.offset, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_~#t1876~0.base, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1878~0.base, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_~#t1877~0.base, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 12:12:24,695 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L805-1-->L807: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1877~0.base_11|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1877~0.base_11| 1)) (not (= |v_ULTIMATE.start_main_~#t1877~0.base_11| 0)) (= |v_ULTIMATE.start_main_~#t1877~0.offset_10| 0) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1877~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1877~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1877~0.base_11|) |v_ULTIMATE.start_main_~#t1877~0.offset_10| 1)) |v_#memory_int_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1877~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1877~0.base=|v_ULTIMATE.start_main_~#t1877~0.base_11|, ULTIMATE.start_main_~#t1877~0.offset=|v_ULTIMATE.start_main_~#t1877~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1877~0.base, ULTIMATE.start_main_~#t1877~0.offset, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 12:12:24,695 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L807-1-->L809: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1878~0.base_9|)) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1878~0.base_9| 1)) (= 0 |v_ULTIMATE.start_main_~#t1878~0.offset_8|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1878~0.base_9|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1878~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1878~0.base_9|) |v_ULTIMATE.start_main_~#t1878~0.offset_8| 2))) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t1878~0.base_9| 4) |v_#length_13|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1878~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1878~0.offset=|v_ULTIMATE.start_main_~#t1878~0.offset_8|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1878~0.base=|v_ULTIMATE.start_main_~#t1878~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1878~0.offset, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1878~0.base] because there is no mapped edge [2019-12-07 12:12:24,696 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] P1ENTRY-->L4-3: Formula: (and (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11)) (= v_P1Thread1of1ForFork1_~arg.offset_9 |v_P1Thread1of1ForFork1_#in~arg.offset_11|) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11) (= 1 v_~x$w_buff0_used~0_98) (= 2 v_~x$w_buff0~0_31) (= v_P1Thread1of1ForFork1_~arg.base_9 |v_P1Thread1of1ForFork1_#in~arg.base_11|) (= v_~x$w_buff1_used~0_55 v_~x$w_buff0_used~0_99) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| (ite (not (and (not (= (mod v_~x$w_buff0_used~0_98 256) 0)) (not (= 0 (mod v_~x$w_buff1_used~0_55 256))))) 1 0)) (= v_~x$w_buff0~0_32 v_~x$w_buff1~0_21)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_32, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_99} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11, ~x$w_buff0~0=v_~x$w_buff0~0_31, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_9, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_9, ~x$w_buff1~0=v_~x$w_buff1~0_21, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_55, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 12:12:24,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L782-2-->L782-4: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-191140352 256))) (.cse1 (= (mod ~x$r_buff1_thd3~0_In-191140352 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite15_Out-191140352| ~x$w_buff1~0_In-191140352) (not .cse0) (not .cse1)) (and (= ~x~0_In-191140352 |P2Thread1of1ForFork2_#t~ite15_Out-191140352|) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-191140352, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-191140352, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-191140352, ~x~0=~x~0_In-191140352} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-191140352|, ~x$w_buff1~0=~x$w_buff1~0_In-191140352, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-191140352, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-191140352, ~x~0=~x~0_In-191140352} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 12:12:24,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L782-4-->L783: Formula: (= v_~x~0_20 |v_P2Thread1of1ForFork2_#t~ite15_10|) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_10|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_9|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|, ~x~0=v_~x~0_20} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 12:12:24,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L783-->L783-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1850849656 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In1850849656 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite17_Out1850849656| 0)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In1850849656 |P2Thread1of1ForFork2_#t~ite17_Out1850849656|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1850849656, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1850849656} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1850849656, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1850849656|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1850849656} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 12:12:24,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L784-->L784-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-1973245489 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In-1973245489 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd3~0_In-1973245489 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In-1973245489 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite18_Out-1973245489| 0)) (and (= ~x$w_buff1_used~0_In-1973245489 |P2Thread1of1ForFork2_#t~ite18_Out-1973245489|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1973245489, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1973245489, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1973245489, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1973245489} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1973245489, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1973245489, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1973245489, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-1973245489|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1973245489} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 12:12:24,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L733-2-->L733-5: Formula: (let ((.cse1 (= |P0Thread1of1ForFork0_#t~ite4_Out180053695| |P0Thread1of1ForFork0_#t~ite3_Out180053695|)) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In180053695 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In180053695 256)))) (or (and (= ~x$w_buff1~0_In180053695 |P0Thread1of1ForFork0_#t~ite3_Out180053695|) (not .cse0) .cse1 (not .cse2)) (and .cse1 (= ~x~0_In180053695 |P0Thread1of1ForFork0_#t~ite3_Out180053695|) (or .cse2 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In180053695, ~x$w_buff1_used~0=~x$w_buff1_used~0_In180053695, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In180053695, ~x~0=~x~0_In180053695} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out180053695|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out180053695|, ~x$w_buff1~0=~x$w_buff1~0_In180053695, ~x$w_buff1_used~0=~x$w_buff1_used~0_In180053695, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In180053695, ~x~0=~x~0_In180053695} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 12:12:24,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L734-->L734-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In2064754242 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In2064754242 256) 0))) (or (and (= ~x$w_buff0_used~0_In2064754242 |P0Thread1of1ForFork0_#t~ite5_Out2064754242|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out2064754242|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2064754242, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2064754242} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out2064754242|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2064754242, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2064754242} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 12:12:24,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L735-->L735-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In1302264833 256))) (.cse3 (= (mod ~x$r_buff0_thd1~0_In1302264833 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In1302264833 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1302264833 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In1302264833 |P0Thread1of1ForFork0_#t~ite6_Out1302264833|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1302264833|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1302264833, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1302264833, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1302264833, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1302264833} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1302264833|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1302264833, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1302264833, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1302264833, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1302264833} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 12:12:24,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L785-->L785-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-284324625 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In-284324625 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd3~0_In-284324625 |P2Thread1of1ForFork2_#t~ite19_Out-284324625|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-284324625|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-284324625, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-284324625} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-284324625, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-284324625|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-284324625} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 12:12:24,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L786-->L786-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-2032868509 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-2032868509 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-2032868509 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd3~0_In-2032868509 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite20_Out-2032868509| ~x$r_buff1_thd3~0_In-2032868509)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P2Thread1of1ForFork2_#t~ite20_Out-2032868509| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-2032868509, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-2032868509, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-2032868509, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2032868509} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-2032868509|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2032868509, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-2032868509, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-2032868509, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2032868509} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 12:12:24,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L786-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P2Thread1of1ForFork2_#t~ite20_52| v_~x$r_buff1_thd3~0_147)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_52|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_51|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_147, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 12:12:24,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L736-->L736-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-1133104931 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1133104931 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite7_Out-1133104931| 0)) (and (or .cse0 .cse1) (= ~x$r_buff0_thd1~0_In-1133104931 |P0Thread1of1ForFork0_#t~ite7_Out-1133104931|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1133104931, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1133104931} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1133104931, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1133104931|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1133104931} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 12:12:24,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L737-->L737-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In-286546178 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-286546178 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-286546178 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-286546178 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-286546178| ~x$r_buff1_thd1~0_In-286546178)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-286546178| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-286546178, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-286546178, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-286546178, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-286546178} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-286546178, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-286546178|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-286546178, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-286546178, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-286546178} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 12:12:24,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L737-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_61 |v_P0Thread1of1ForFork0_#t~ite8_24|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_23|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_61} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 12:12:24,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L763-->L763-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-2007067274 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-2007067274 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-2007067274| ~x$w_buff0_used~0_In-2007067274)) (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out-2007067274| 0) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2007067274, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2007067274} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-2007067274|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2007067274, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2007067274} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 12:12:24,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L764-->L764-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-213895224 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd2~0_In-213895224 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-213895224 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-213895224 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out-213895224| 0)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite12_Out-213895224| ~x$w_buff1_used~0_In-213895224)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-213895224, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-213895224, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-213895224, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-213895224} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-213895224, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-213895224, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-213895224|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-213895224, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-213895224} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 12:12:24,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L765-->L766: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_In1587938580 ~x$r_buff0_thd2~0_Out1587938580)) (.cse0 (= (mod ~x$w_buff0_used~0_In1587938580 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In1587938580 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse0) (= 0 ~x$r_buff0_thd2~0_Out1587938580) (not .cse2)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1587938580, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1587938580} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1587938580|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1587938580, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1587938580} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 12:12:24,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L766-->L766-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd2~0_In-1815056866 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In-1815056866 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-1815056866 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1815056866 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$r_buff1_thd2~0_In-1815056866 |P1Thread1of1ForFork1_#t~ite14_Out-1815056866|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-1815056866|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1815056866, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1815056866, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1815056866, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1815056866} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1815056866, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1815056866, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1815056866, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1815056866|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1815056866} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 12:12:24,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L766-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_162 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= (+ v_~__unbuffered_cnt~0_93 1) v_~__unbuffered_cnt~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_162, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_92, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:12:24,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L809-1-->L815: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:12:24,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L815-2-->L815-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite24_Out1595319598| |ULTIMATE.start_main_#t~ite25_Out1595319598|)) (.cse1 (= (mod ~x$r_buff1_thd0~0_In1595319598 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1595319598 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite24_Out1595319598| ~x$w_buff1~0_In1595319598) (not .cse1) .cse2) (and (= ~x~0_In1595319598 |ULTIMATE.start_main_#t~ite24_Out1595319598|) .cse2 (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1595319598, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1595319598, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1595319598, ~x~0=~x~0_In1595319598} OutVars{~x$w_buff1~0=~x$w_buff1~0_In1595319598, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out1595319598|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out1595319598|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1595319598, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1595319598, ~x~0=~x~0_In1595319598} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 12:12:24,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L816-->L816-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In1104245408 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1104245408 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite26_Out1104245408|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1104245408 |ULTIMATE.start_main_#t~ite26_Out1104245408|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1104245408, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1104245408} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1104245408, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1104245408|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1104245408} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 12:12:24,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L817-->L817-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1031636129 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-1031636129 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1031636129 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In-1031636129 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite27_Out-1031636129| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite27_Out-1031636129| ~x$w_buff1_used~0_In-1031636129)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1031636129, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1031636129, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1031636129, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1031636129} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1031636129, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1031636129, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1031636129|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1031636129, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1031636129} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 12:12:24,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L818-->L818-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In1475788147 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1475788147 256)))) (or (and (= |ULTIMATE.start_main_#t~ite28_Out1475788147| 0) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd0~0_In1475788147 |ULTIMATE.start_main_#t~ite28_Out1475788147|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1475788147, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1475788147} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1475788147, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out1475788147|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1475788147} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 12:12:24,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L819-->L819-2: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In775415399 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd0~0_In775415399 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In775415399 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd0~0_In775415399 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite29_Out775415399|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$r_buff1_thd0~0_In775415399 |ULTIMATE.start_main_#t~ite29_Out775415399|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In775415399, ~x$w_buff1_used~0=~x$w_buff1_used~0_In775415399, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In775415399, ~x$w_buff0_used~0=~x$w_buff0_used~0_In775415399} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In775415399, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out775415399|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In775415399, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In775415399, ~x$w_buff0_used~0=~x$w_buff0_used~0_In775415399} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 12:12:24,706 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L831-->L832: Formula: (and (= v_~x$r_buff0_thd0~0_112 v_~x$r_buff0_thd0~0_111) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_112, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_111, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:12:24,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L834-->L837-1: Formula: (and (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= (mod v_~x$flush_delayed~0_23 256) 0)) (= v_~x$mem_tmp~0_13 v_~x~0_153) (= v_~x$flush_delayed~0_22 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_23, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ~x$flush_delayed~0=v_~x$flush_delayed~0_22, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13, ~x~0=v_~x~0_153, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:12:24,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L837-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 12:12:24,771 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_0509fc92-91e1-44bf-968a-e6ea77aea7c6/bin/uautomizer/witness.graphml [2019-12-07 12:12:24,771 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:12:24,772 INFO L168 Benchmark]: Toolchain (without parser) took 94588.16 ms. Allocated memory was 1.0 GB in the beginning and 8.1 GB in the end (delta: 7.0 GB). Free memory was 934.4 MB in the beginning and 3.6 GB in the end (delta: -2.7 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2019-12-07 12:12:24,773 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:12:24,773 INFO L168 Benchmark]: CACSL2BoogieTranslator took 384.92 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 99.6 MB). Free memory was 934.4 MB in the beginning and 1.1 GB in the end (delta: -137.2 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. [2019-12-07 12:12:24,773 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.66 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:12:24,773 INFO L168 Benchmark]: Boogie Preprocessor took 26.03 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:12:24,774 INFO L168 Benchmark]: RCFGBuilder took 438.77 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 12:12:24,774 INFO L168 Benchmark]: TraceAbstraction took 93612.27 ms. Allocated memory was 1.1 GB in the beginning and 8.1 GB in the end (delta: 6.9 GB). Free memory was 1.0 GB in the beginning and 3.6 GB in the end (delta: -2.6 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2019-12-07 12:12:24,774 INFO L168 Benchmark]: Witness Printer took 78.70 ms. Allocated memory is still 8.1 GB. Free memory was 3.6 GB in the beginning and 3.6 GB in the end (delta: 4.7 MB). Peak memory consumption was 4.7 MB. Max. memory is 11.5 GB. [2019-12-07 12:12:24,776 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 384.92 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 99.6 MB). Free memory was 934.4 MB in the beginning and 1.1 GB in the end (delta: -137.2 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.66 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.03 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 438.77 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 93612.27 ms. Allocated memory was 1.1 GB in the beginning and 8.1 GB in the end (delta: 6.9 GB). Free memory was 1.0 GB in the beginning and 3.6 GB in the end (delta: -2.6 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. * Witness Printer took 78.70 ms. Allocated memory is still 8.1 GB. Free memory was 3.6 GB in the beginning and 3.6 GB in the end (delta: 4.7 MB). Peak memory consumption was 4.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.0s, 174 ProgramPointsBefore, 94 ProgramPointsAfterwards, 211 TransitionsBefore, 106 TransitionsAfterwards, 17074 CoEnabledTransitionPairs, 7 FixpointIterations, 31 TrivialSequentialCompositions, 43 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 29 ChoiceCompositions, 6159 VarBasedMoverChecksPositive, 253 VarBasedMoverChecksNegative, 78 SemBasedMoverChecksPositive, 250 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 78277 CheckedPairsTotal, 111 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L805] FCALL, FORK 0 pthread_create(&t1876, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L807] FCALL, FORK 0 pthread_create(&t1877, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L809] FCALL, FORK 0 pthread_create(&t1878, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L752] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L753] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L754] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L755] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L756] 2 x$r_buff0_thd2 = (_Bool)1 [L759] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L776] 3 __unbuffered_p2_EAX = y [L779] 3 __unbuffered_p2_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L727] 1 y = 2 [L730] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L782] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L733] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L783] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L733] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L734] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L784] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L785] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L762] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L735] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L736] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L762] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L763] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L764] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L815] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L815] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L816] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L817] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L818] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L819] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L822] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L823] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L824] 0 x$flush_delayed = weak$$choice2 [L825] 0 x$mem_tmp = x VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L826] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L826] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L827] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L827] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L828] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L828] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L829] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L829] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L830] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L830] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L832] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L832] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L833] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 165 locations, 2 error locations. Result: UNSAFE, OverallTime: 93.4s, OverallIterations: 24, TraceHistogramMax: 1, AutomataDifference: 16.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3889 SDtfs, 3022 SDslu, 7266 SDs, 0 SdLazy, 3991 SolverSat, 162 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 161 GetRequests, 38 SyntacticMatches, 19 SemanticMatches, 104 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=216265occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 59.3s AutomataMinimizationTime, 23 MinimizatonAttempts, 292962 StatesRemovedByMinimization, 19 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 1082 NumberOfCodeBlocks, 1082 NumberOfCodeBlocksAsserted, 24 NumberOfCheckSat, 991 ConstructedInterpolants, 0 QuantifiedInterpolants, 151490 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 23 InterpolantComputations, 23 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...