./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe004_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_2f4000ff-d18c-4c43-b686-420c5b326125/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_2f4000ff-d18c-4c43-b686-420c5b326125/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_2f4000ff-d18c-4c43-b686-420c5b326125/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_2f4000ff-d18c-4c43-b686-420c5b326125/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe004_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_2f4000ff-d18c-4c43-b686-420c5b326125/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_2f4000ff-d18c-4c43-b686-420c5b326125/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 499a25092425ffe47d32c21cd37543ce4fb21226 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:51:34,062 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:51:34,064 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:51:34,071 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:51:34,071 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:51:34,072 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:51:34,073 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:51:34,074 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:51:34,076 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:51:34,076 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:51:34,077 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:51:34,078 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:51:34,078 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:51:34,079 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:51:34,079 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:51:34,080 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:51:34,081 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:51:34,081 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:51:34,083 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:51:34,085 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:51:34,086 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:51:34,087 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:51:34,087 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:51:34,088 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:51:34,090 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:51:34,090 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:51:34,090 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:51:34,091 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:51:34,091 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:51:34,091 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:51:34,092 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:51:34,092 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:51:34,092 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:51:34,093 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:51:34,093 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:51:34,094 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:51:34,094 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:51:34,094 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:51:34,094 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:51:34,095 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:51:34,095 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:51:34,096 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_2f4000ff-d18c-4c43-b686-420c5b326125/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:51:34,106 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:51:34,106 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:51:34,106 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:51:34,107 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:51:34,107 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:51:34,107 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:51:34,107 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:51:34,107 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:51:34,107 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:51:34,107 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:51:34,108 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:51:34,108 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:51:34,108 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:51:34,108 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:51:34,108 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:51:34,108 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:51:34,108 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:51:34,108 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:51:34,109 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:51:34,109 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:51:34,109 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:51:34,109 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:51:34,109 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:51:34,109 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:51:34,109 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:51:34,109 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:51:34,109 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:51:34,110 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:51:34,110 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:51:34,110 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_2f4000ff-d18c-4c43-b686-420c5b326125/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 499a25092425ffe47d32c21cd37543ce4fb21226 [2019-12-07 18:51:34,211 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:51:34,218 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:51:34,221 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:51:34,221 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:51:34,222 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:51:34,222 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_2f4000ff-d18c-4c43-b686-420c5b326125/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe004_pso.opt.i [2019-12-07 18:51:34,259 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_2f4000ff-d18c-4c43-b686-420c5b326125/bin/uautomizer/data/6fdb1c53c/1f4ec07c745f46f79339681a58c5bf08/FLAG536e64af5 [2019-12-07 18:51:34,668 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:51:34,668 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_2f4000ff-d18c-4c43-b686-420c5b326125/sv-benchmarks/c/pthread-wmm/safe004_pso.opt.i [2019-12-07 18:51:34,678 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_2f4000ff-d18c-4c43-b686-420c5b326125/bin/uautomizer/data/6fdb1c53c/1f4ec07c745f46f79339681a58c5bf08/FLAG536e64af5 [2019-12-07 18:51:34,687 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_2f4000ff-d18c-4c43-b686-420c5b326125/bin/uautomizer/data/6fdb1c53c/1f4ec07c745f46f79339681a58c5bf08 [2019-12-07 18:51:34,689 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:51:34,690 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:51:34,690 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:51:34,690 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:51:34,693 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:51:34,693 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:51:34" (1/1) ... [2019-12-07 18:51:34,695 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:34, skipping insertion in model container [2019-12-07 18:51:34,695 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:51:34" (1/1) ... [2019-12-07 18:51:34,700 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:51:34,729 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:51:34,969 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:51:34,977 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:51:35,018 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:51:35,065 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:51:35,065 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:35 WrapperNode [2019-12-07 18:51:35,065 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:51:35,066 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:51:35,066 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:51:35,066 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:51:35,071 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:35" (1/1) ... [2019-12-07 18:51:35,085 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:35" (1/1) ... [2019-12-07 18:51:35,107 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:51:35,107 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:51:35,107 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:51:35,107 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:51:35,114 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:35" (1/1) ... [2019-12-07 18:51:35,114 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:35" (1/1) ... [2019-12-07 18:51:35,118 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:35" (1/1) ... [2019-12-07 18:51:35,118 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:35" (1/1) ... [2019-12-07 18:51:35,125 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:35" (1/1) ... [2019-12-07 18:51:35,128 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:35" (1/1) ... [2019-12-07 18:51:35,130 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:35" (1/1) ... [2019-12-07 18:51:35,133 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:51:35,134 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:51:35,134 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:51:35,134 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:51:35,134 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:35" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_2f4000ff-d18c-4c43-b686-420c5b326125/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:51:35,173 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:51:35,173 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:51:35,173 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:51:35,173 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:51:35,174 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:51:35,174 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:51:35,174 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:51:35,174 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:51:35,174 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:51:35,174 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:51:35,174 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:51:35,174 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:51:35,174 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:51:35,175 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:51:35,545 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:51:35,545 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:51:35,546 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:51:35 BoogieIcfgContainer [2019-12-07 18:51:35,546 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:51:35,547 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:51:35,547 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:51:35,548 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:51:35,549 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:51:34" (1/3) ... [2019-12-07 18:51:35,549 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@68cb33b4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:51:35, skipping insertion in model container [2019-12-07 18:51:35,549 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:35" (2/3) ... [2019-12-07 18:51:35,549 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@68cb33b4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:51:35, skipping insertion in model container [2019-12-07 18:51:35,550 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:51:35" (3/3) ... [2019-12-07 18:51:35,551 INFO L109 eAbstractionObserver]: Analyzing ICFG safe004_pso.opt.i [2019-12-07 18:51:35,557 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:51:35,557 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:51:35,562 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:51:35,562 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:51:35,585 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,585 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,585 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,585 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,585 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,586 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,586 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,586 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,586 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,586 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,586 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,586 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,586 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,586 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,587 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,587 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,587 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,587 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,587 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,587 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,587 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,587 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,587 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,588 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,588 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,588 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,588 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,588 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,588 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,588 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,589 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,589 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,589 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,589 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,589 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,589 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,589 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,590 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,590 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,590 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,590 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,590 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,590 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,590 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,590 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,592 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,592 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,592 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,592 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,592 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,592 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,592 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,592 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,592 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,593 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,593 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,593 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,593 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:35,607 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:51:35,619 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:51:35,619 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:51:35,619 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:51:35,619 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:51:35,620 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:51:35,620 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:51:35,620 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:51:35,620 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:51:35,631 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 174 places, 211 transitions [2019-12-07 18:51:35,632 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 18:51:35,686 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 18:51:35,686 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:51:35,696 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 572 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:51:35,711 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 18:51:35,740 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 18:51:35,740 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:51:35,745 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 572 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:51:35,758 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17074 [2019-12-07 18:51:35,759 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:51:38,584 WARN L192 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 18:51:38,669 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78277 [2019-12-07 18:51:38,669 INFO L214 etLargeBlockEncoding]: Total number of compositions: 111 [2019-12-07 18:51:38,671 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 106 transitions [2019-12-07 18:51:51,572 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 107408 states. [2019-12-07 18:51:51,573 INFO L276 IsEmpty]: Start isEmpty. Operand 107408 states. [2019-12-07 18:51:51,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 18:51:51,577 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:51:51,578 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 18:51:51,578 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:51:51,581 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:51:51,582 INFO L82 PathProgramCache]: Analyzing trace with hash 809703812, now seen corresponding path program 1 times [2019-12-07 18:51:51,587 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:51:51,587 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1701758280] [2019-12-07 18:51:51,587 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:51:51,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:51:51,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:51:51,733 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1701758280] [2019-12-07 18:51:51,734 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:51:51,734 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:51:51,735 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [372921182] [2019-12-07 18:51:51,739 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:51:51,739 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:51:51,748 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:51:51,748 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:51:51,750 INFO L87 Difference]: Start difference. First operand 107408 states. Second operand 3 states. [2019-12-07 18:51:52,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:51:52,598 INFO L93 Difference]: Finished difference Result 107108 states and 460900 transitions. [2019-12-07 18:51:52,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:51:52,600 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 18:51:52,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:51:53,192 INFO L225 Difference]: With dead ends: 107108 [2019-12-07 18:51:53,192 INFO L226 Difference]: Without dead ends: 104924 [2019-12-07 18:51:53,193 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:51:56,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104924 states. [2019-12-07 18:51:57,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104924 to 104924. [2019-12-07 18:51:57,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104924 states. [2019-12-07 18:51:58,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104924 states to 104924 states and 451982 transitions. [2019-12-07 18:51:58,174 INFO L78 Accepts]: Start accepts. Automaton has 104924 states and 451982 transitions. Word has length 5 [2019-12-07 18:51:58,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:51:58,175 INFO L462 AbstractCegarLoop]: Abstraction has 104924 states and 451982 transitions. [2019-12-07 18:51:58,175 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:51:58,175 INFO L276 IsEmpty]: Start isEmpty. Operand 104924 states and 451982 transitions. [2019-12-07 18:51:58,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:51:58,177 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:51:58,177 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:51:58,177 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:51:58,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:51:58,178 INFO L82 PathProgramCache]: Analyzing trace with hash 2105056515, now seen corresponding path program 1 times [2019-12-07 18:51:58,178 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:51:58,178 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [330524787] [2019-12-07 18:51:58,178 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:51:58,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:51:58,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:51:58,246 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [330524787] [2019-12-07 18:51:58,246 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:51:58,246 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:51:58,246 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [885655245] [2019-12-07 18:51:58,247 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:51:58,247 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:51:58,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:51:58,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:51:58,248 INFO L87 Difference]: Start difference. First operand 104924 states and 451982 transitions. Second operand 4 states. [2019-12-07 18:52:00,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:00,698 INFO L93 Difference]: Finished difference Result 168606 states and 697152 transitions. [2019-12-07 18:52:00,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:52:00,699 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:52:00,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:01,178 INFO L225 Difference]: With dead ends: 168606 [2019-12-07 18:52:01,178 INFO L226 Difference]: Without dead ends: 168557 [2019-12-07 18:52:01,179 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:05,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168557 states. [2019-12-07 18:52:07,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168557 to 152629. [2019-12-07 18:52:07,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152629 states. [2019-12-07 18:52:07,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152629 states to 152629 states and 638547 transitions. [2019-12-07 18:52:07,470 INFO L78 Accepts]: Start accepts. Automaton has 152629 states and 638547 transitions. Word has length 11 [2019-12-07 18:52:07,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:07,471 INFO L462 AbstractCegarLoop]: Abstraction has 152629 states and 638547 transitions. [2019-12-07 18:52:07,471 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:52:07,471 INFO L276 IsEmpty]: Start isEmpty. Operand 152629 states and 638547 transitions. [2019-12-07 18:52:07,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:52:07,476 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:07,476 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:07,476 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:07,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:07,476 INFO L82 PathProgramCache]: Analyzing trace with hash 2027270657, now seen corresponding path program 1 times [2019-12-07 18:52:07,476 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:07,476 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1564969500] [2019-12-07 18:52:07,477 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:07,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:07,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:07,532 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1564969500] [2019-12-07 18:52:07,532 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:07,533 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:52:07,533 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1539894566] [2019-12-07 18:52:07,533 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:52:07,533 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:07,533 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:52:07,533 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:52:07,534 INFO L87 Difference]: Start difference. First operand 152629 states and 638547 transitions. Second operand 4 states. [2019-12-07 18:52:08,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:08,927 INFO L93 Difference]: Finished difference Result 217678 states and 889823 transitions. [2019-12-07 18:52:08,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:52:08,928 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:52:08,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:09,496 INFO L225 Difference]: With dead ends: 217678 [2019-12-07 18:52:09,496 INFO L226 Difference]: Without dead ends: 217615 [2019-12-07 18:52:09,497 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:15,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217615 states. [2019-12-07 18:52:18,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217615 to 183279. [2019-12-07 18:52:18,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183279 states. [2019-12-07 18:52:18,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183279 states to 183279 states and 761454 transitions. [2019-12-07 18:52:18,988 INFO L78 Accepts]: Start accepts. Automaton has 183279 states and 761454 transitions. Word has length 13 [2019-12-07 18:52:18,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:18,989 INFO L462 AbstractCegarLoop]: Abstraction has 183279 states and 761454 transitions. [2019-12-07 18:52:18,989 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:52:18,989 INFO L276 IsEmpty]: Start isEmpty. Operand 183279 states and 761454 transitions. [2019-12-07 18:52:18,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:52:18,991 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:18,991 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:18,991 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:18,991 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:18,991 INFO L82 PathProgramCache]: Analyzing trace with hash 1789207667, now seen corresponding path program 1 times [2019-12-07 18:52:18,991 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:18,991 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [579512165] [2019-12-07 18:52:18,992 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:19,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:19,025 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:19,026 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [579512165] [2019-12-07 18:52:19,026 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:19,026 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:52:19,026 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [45525563] [2019-12-07 18:52:19,026 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:52:19,026 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:19,026 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:52:19,027 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:19,027 INFO L87 Difference]: Start difference. First operand 183279 states and 761454 transitions. Second operand 3 states. [2019-12-07 18:52:19,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:19,123 INFO L93 Difference]: Finished difference Result 36985 states and 120640 transitions. [2019-12-07 18:52:19,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:52:19,124 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 18:52:19,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:19,179 INFO L225 Difference]: With dead ends: 36985 [2019-12-07 18:52:19,179 INFO L226 Difference]: Without dead ends: 36985 [2019-12-07 18:52:19,180 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:19,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36985 states. [2019-12-07 18:52:19,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36985 to 36985. [2019-12-07 18:52:19,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36985 states. [2019-12-07 18:52:19,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36985 states to 36985 states and 120640 transitions. [2019-12-07 18:52:19,746 INFO L78 Accepts]: Start accepts. Automaton has 36985 states and 120640 transitions. Word has length 13 [2019-12-07 18:52:19,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:19,746 INFO L462 AbstractCegarLoop]: Abstraction has 36985 states and 120640 transitions. [2019-12-07 18:52:19,747 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:52:19,747 INFO L276 IsEmpty]: Start isEmpty. Operand 36985 states and 120640 transitions. [2019-12-07 18:52:19,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:52:19,749 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:19,749 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:19,749 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:19,749 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:19,750 INFO L82 PathProgramCache]: Analyzing trace with hash 1405830784, now seen corresponding path program 1 times [2019-12-07 18:52:19,750 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:19,750 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [85328250] [2019-12-07 18:52:19,750 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:19,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:19,822 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:19,822 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [85328250] [2019-12-07 18:52:19,823 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:19,823 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:52:19,823 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [529763566] [2019-12-07 18:52:19,823 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:52:19,823 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:19,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:52:19,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:19,823 INFO L87 Difference]: Start difference. First operand 36985 states and 120640 transitions. Second operand 5 states. [2019-12-07 18:52:20,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:20,336 INFO L93 Difference]: Finished difference Result 50257 states and 160609 transitions. [2019-12-07 18:52:20,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:52:20,336 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 18:52:20,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:20,410 INFO L225 Difference]: With dead ends: 50257 [2019-12-07 18:52:20,410 INFO L226 Difference]: Without dead ends: 50244 [2019-12-07 18:52:20,410 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:52:20,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50244 states. [2019-12-07 18:52:21,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50244 to 37328. [2019-12-07 18:52:21,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37328 states. [2019-12-07 18:52:21,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37328 states to 37328 states and 121606 transitions. [2019-12-07 18:52:21,072 INFO L78 Accepts]: Start accepts. Automaton has 37328 states and 121606 transitions. Word has length 19 [2019-12-07 18:52:21,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:21,072 INFO L462 AbstractCegarLoop]: Abstraction has 37328 states and 121606 transitions. [2019-12-07 18:52:21,072 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:52:21,072 INFO L276 IsEmpty]: Start isEmpty. Operand 37328 states and 121606 transitions. [2019-12-07 18:52:21,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:52:21,079 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:21,079 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:21,079 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:21,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:21,080 INFO L82 PathProgramCache]: Analyzing trace with hash -1721998258, now seen corresponding path program 1 times [2019-12-07 18:52:21,080 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:21,080 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [553094815] [2019-12-07 18:52:21,080 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:21,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:21,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:21,121 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [553094815] [2019-12-07 18:52:21,121 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:21,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:52:21,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1204912084] [2019-12-07 18:52:21,121 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:52:21,122 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:21,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:52:21,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:52:21,122 INFO L87 Difference]: Start difference. First operand 37328 states and 121606 transitions. Second operand 4 states. [2019-12-07 18:52:21,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:21,147 INFO L93 Difference]: Finished difference Result 7104 states and 19431 transitions. [2019-12-07 18:52:21,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:52:21,147 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 18:52:21,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:21,153 INFO L225 Difference]: With dead ends: 7104 [2019-12-07 18:52:21,153 INFO L226 Difference]: Without dead ends: 7104 [2019-12-07 18:52:21,153 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:52:21,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7104 states. [2019-12-07 18:52:21,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7104 to 6992. [2019-12-07 18:52:21,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6992 states. [2019-12-07 18:52:21,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6992 states to 6992 states and 19111 transitions. [2019-12-07 18:52:21,593 INFO L78 Accepts]: Start accepts. Automaton has 6992 states and 19111 transitions. Word has length 25 [2019-12-07 18:52:21,593 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:21,593 INFO L462 AbstractCegarLoop]: Abstraction has 6992 states and 19111 transitions. [2019-12-07 18:52:21,593 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:52:21,593 INFO L276 IsEmpty]: Start isEmpty. Operand 6992 states and 19111 transitions. [2019-12-07 18:52:21,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 18:52:21,600 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:21,600 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:21,600 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:21,600 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:21,600 INFO L82 PathProgramCache]: Analyzing trace with hash 2138974623, now seen corresponding path program 1 times [2019-12-07 18:52:21,600 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:21,601 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [173142488] [2019-12-07 18:52:21,601 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:21,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:21,644 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:21,645 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [173142488] [2019-12-07 18:52:21,645 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:21,645 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:52:21,645 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [366940640] [2019-12-07 18:52:21,645 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:52:21,646 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:21,646 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:52:21,646 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:21,646 INFO L87 Difference]: Start difference. First operand 6992 states and 19111 transitions. Second operand 5 states. [2019-12-07 18:52:21,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:21,676 INFO L93 Difference]: Finished difference Result 5024 states and 14421 transitions. [2019-12-07 18:52:21,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:52:21,676 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-12-07 18:52:21,676 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:21,681 INFO L225 Difference]: With dead ends: 5024 [2019-12-07 18:52:21,681 INFO L226 Difference]: Without dead ends: 5024 [2019-12-07 18:52:21,681 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:21,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5024 states. [2019-12-07 18:52:21,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5024 to 4660. [2019-12-07 18:52:21,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4660 states. [2019-12-07 18:52:21,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4660 states to 4660 states and 13437 transitions. [2019-12-07 18:52:21,741 INFO L78 Accepts]: Start accepts. Automaton has 4660 states and 13437 transitions. Word has length 37 [2019-12-07 18:52:21,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:21,741 INFO L462 AbstractCegarLoop]: Abstraction has 4660 states and 13437 transitions. [2019-12-07 18:52:21,741 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:52:21,741 INFO L276 IsEmpty]: Start isEmpty. Operand 4660 states and 13437 transitions. [2019-12-07 18:52:21,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:52:21,747 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:21,747 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:21,747 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:21,747 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:21,748 INFO L82 PathProgramCache]: Analyzing trace with hash 1030638940, now seen corresponding path program 1 times [2019-12-07 18:52:21,748 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:21,748 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [212415409] [2019-12-07 18:52:21,748 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:21,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:21,787 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:21,787 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [212415409] [2019-12-07 18:52:21,788 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:21,788 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:52:21,788 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [451548966] [2019-12-07 18:52:21,788 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:52:21,788 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:21,788 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:52:21,788 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:21,788 INFO L87 Difference]: Start difference. First operand 4660 states and 13437 transitions. Second operand 3 states. [2019-12-07 18:52:21,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:21,826 INFO L93 Difference]: Finished difference Result 4669 states and 13450 transitions. [2019-12-07 18:52:21,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:52:21,826 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:52:21,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:21,831 INFO L225 Difference]: With dead ends: 4669 [2019-12-07 18:52:21,831 INFO L226 Difference]: Without dead ends: 4669 [2019-12-07 18:52:21,831 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:21,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4669 states. [2019-12-07 18:52:21,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4669 to 4665. [2019-12-07 18:52:21,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4665 states. [2019-12-07 18:52:21,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4665 states to 4665 states and 13446 transitions. [2019-12-07 18:52:21,883 INFO L78 Accepts]: Start accepts. Automaton has 4665 states and 13446 transitions. Word has length 65 [2019-12-07 18:52:21,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:21,884 INFO L462 AbstractCegarLoop]: Abstraction has 4665 states and 13446 transitions. [2019-12-07 18:52:21,884 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:52:21,884 INFO L276 IsEmpty]: Start isEmpty. Operand 4665 states and 13446 transitions. [2019-12-07 18:52:21,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:52:21,889 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:21,889 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:21,889 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:21,889 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:21,889 INFO L82 PathProgramCache]: Analyzing trace with hash 1902070617, now seen corresponding path program 1 times [2019-12-07 18:52:21,889 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:21,889 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1107404426] [2019-12-07 18:52:21,889 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:21,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:21,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:21,933 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1107404426] [2019-12-07 18:52:21,933 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:21,933 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:52:21,934 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1566829780] [2019-12-07 18:52:21,934 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:52:21,934 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:21,934 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:52:21,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:21,934 INFO L87 Difference]: Start difference. First operand 4665 states and 13446 transitions. Second operand 3 states. [2019-12-07 18:52:21,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:21,966 INFO L93 Difference]: Finished difference Result 4669 states and 13441 transitions. [2019-12-07 18:52:21,966 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:52:21,966 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:52:21,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:21,970 INFO L225 Difference]: With dead ends: 4669 [2019-12-07 18:52:21,971 INFO L226 Difference]: Without dead ends: 4669 [2019-12-07 18:52:21,971 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:21,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4669 states. [2019-12-07 18:52:22,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4669 to 4665. [2019-12-07 18:52:22,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4665 states. [2019-12-07 18:52:22,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4665 states to 4665 states and 13437 transitions. [2019-12-07 18:52:22,028 INFO L78 Accepts]: Start accepts. Automaton has 4665 states and 13437 transitions. Word has length 65 [2019-12-07 18:52:22,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:22,029 INFO L462 AbstractCegarLoop]: Abstraction has 4665 states and 13437 transitions. [2019-12-07 18:52:22,029 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:52:22,029 INFO L276 IsEmpty]: Start isEmpty. Operand 4665 states and 13437 transitions. [2019-12-07 18:52:22,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:52:22,034 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:22,034 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:22,034 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:22,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:22,035 INFO L82 PathProgramCache]: Analyzing trace with hash 1892358751, now seen corresponding path program 1 times [2019-12-07 18:52:22,035 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:22,035 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1725890938] [2019-12-07 18:52:22,035 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:22,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:22,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:22,092 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1725890938] [2019-12-07 18:52:22,092 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:22,092 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:52:22,092 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [889480410] [2019-12-07 18:52:22,093 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:52:22,093 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:22,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:52:22,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:22,093 INFO L87 Difference]: Start difference. First operand 4665 states and 13437 transitions. Second operand 3 states. [2019-12-07 18:52:22,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:22,115 INFO L93 Difference]: Finished difference Result 4665 states and 13233 transitions. [2019-12-07 18:52:22,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:52:22,115 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:52:22,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:22,119 INFO L225 Difference]: With dead ends: 4665 [2019-12-07 18:52:22,119 INFO L226 Difference]: Without dead ends: 4665 [2019-12-07 18:52:22,120 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:22,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4665 states. [2019-12-07 18:52:22,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4665 to 4665. [2019-12-07 18:52:22,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4665 states. [2019-12-07 18:52:22,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4665 states to 4665 states and 13233 transitions. [2019-12-07 18:52:22,175 INFO L78 Accepts]: Start accepts. Automaton has 4665 states and 13233 transitions. Word has length 65 [2019-12-07 18:52:22,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:22,176 INFO L462 AbstractCegarLoop]: Abstraction has 4665 states and 13233 transitions. [2019-12-07 18:52:22,176 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:52:22,176 INFO L276 IsEmpty]: Start isEmpty. Operand 4665 states and 13233 transitions. [2019-12-07 18:52:22,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:52:22,181 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:22,181 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:22,181 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:22,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:22,181 INFO L82 PathProgramCache]: Analyzing trace with hash 1887448171, now seen corresponding path program 1 times [2019-12-07 18:52:22,181 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:22,181 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1808302001] [2019-12-07 18:52:22,181 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:22,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:22,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:22,237 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1808302001] [2019-12-07 18:52:22,237 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:22,237 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:52:22,238 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1393329236] [2019-12-07 18:52:22,238 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:52:22,238 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:22,238 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:52:22,238 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:22,238 INFO L87 Difference]: Start difference. First operand 4665 states and 13233 transitions. Second operand 5 states. [2019-12-07 18:52:22,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:22,454 INFO L93 Difference]: Finished difference Result 6995 states and 19609 transitions. [2019-12-07 18:52:22,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:52:22,454 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 18:52:22,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:22,460 INFO L225 Difference]: With dead ends: 6995 [2019-12-07 18:52:22,460 INFO L226 Difference]: Without dead ends: 6995 [2019-12-07 18:52:22,460 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:52:22,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6995 states. [2019-12-07 18:52:22,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6995 to 4949. [2019-12-07 18:52:22,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4949 states. [2019-12-07 18:52:22,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4949 states to 4949 states and 14078 transitions. [2019-12-07 18:52:22,533 INFO L78 Accepts]: Start accepts. Automaton has 4949 states and 14078 transitions. Word has length 66 [2019-12-07 18:52:22,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:22,533 INFO L462 AbstractCegarLoop]: Abstraction has 4949 states and 14078 transitions. [2019-12-07 18:52:22,533 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:52:22,533 INFO L276 IsEmpty]: Start isEmpty. Operand 4949 states and 14078 transitions. [2019-12-07 18:52:22,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:52:22,539 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:22,539 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:22,539 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:22,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:22,539 INFO L82 PathProgramCache]: Analyzing trace with hash 284491425, now seen corresponding path program 2 times [2019-12-07 18:52:22,539 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:22,540 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1869455333] [2019-12-07 18:52:22,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:22,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:22,644 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:22,644 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1869455333] [2019-12-07 18:52:22,645 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:22,645 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:52:22,645 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [139055598] [2019-12-07 18:52:22,645 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:52:22,645 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:22,645 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:52:22,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:52:22,645 INFO L87 Difference]: Start difference. First operand 4949 states and 14078 transitions. Second operand 7 states. [2019-12-07 18:52:22,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:22,783 INFO L93 Difference]: Finished difference Result 17008 states and 48675 transitions. [2019-12-07 18:52:22,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:52:22,783 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 18:52:22,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:22,792 INFO L225 Difference]: With dead ends: 17008 [2019-12-07 18:52:22,792 INFO L226 Difference]: Without dead ends: 10213 [2019-12-07 18:52:22,792 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=101, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:52:22,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10213 states. [2019-12-07 18:52:22,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10213 to 4949. [2019-12-07 18:52:22,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4949 states. [2019-12-07 18:52:22,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4949 states to 4949 states and 14013 transitions. [2019-12-07 18:52:22,879 INFO L78 Accepts]: Start accepts. Automaton has 4949 states and 14013 transitions. Word has length 66 [2019-12-07 18:52:22,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:22,879 INFO L462 AbstractCegarLoop]: Abstraction has 4949 states and 14013 transitions. [2019-12-07 18:52:22,879 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:52:22,879 INFO L276 IsEmpty]: Start isEmpty. Operand 4949 states and 14013 transitions. [2019-12-07 18:52:22,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:52:22,884 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:22,885 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:22,885 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:22,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:22,885 INFO L82 PathProgramCache]: Analyzing trace with hash -1438113561, now seen corresponding path program 3 times [2019-12-07 18:52:22,885 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:22,885 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [788348823] [2019-12-07 18:52:22,885 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:22,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:22,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:22,958 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [788348823] [2019-12-07 18:52:22,958 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:22,959 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:52:22,959 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1578615131] [2019-12-07 18:52:22,959 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:52:22,959 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:22,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:52:22,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:52:22,959 INFO L87 Difference]: Start difference. First operand 4949 states and 14013 transitions. Second operand 6 states. [2019-12-07 18:52:23,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:23,201 INFO L93 Difference]: Finished difference Result 6941 states and 19390 transitions. [2019-12-07 18:52:23,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:52:23,201 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 18:52:23,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:23,207 INFO L225 Difference]: With dead ends: 6941 [2019-12-07 18:52:23,207 INFO L226 Difference]: Without dead ends: 6941 [2019-12-07 18:52:23,207 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:52:23,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6941 states. [2019-12-07 18:52:23,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6941 to 5572. [2019-12-07 18:52:23,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5572 states. [2019-12-07 18:52:23,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5572 states to 5572 states and 15758 transitions. [2019-12-07 18:52:23,278 INFO L78 Accepts]: Start accepts. Automaton has 5572 states and 15758 transitions. Word has length 66 [2019-12-07 18:52:23,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:23,278 INFO L462 AbstractCegarLoop]: Abstraction has 5572 states and 15758 transitions. [2019-12-07 18:52:23,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:52:23,278 INFO L276 IsEmpty]: Start isEmpty. Operand 5572 states and 15758 transitions. [2019-12-07 18:52:23,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:52:23,284 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:23,284 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:23,284 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:23,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:23,285 INFO L82 PathProgramCache]: Analyzing trace with hash 490304069, now seen corresponding path program 4 times [2019-12-07 18:52:23,285 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:23,285 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1935146689] [2019-12-07 18:52:23,285 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:23,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:23,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:23,354 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1935146689] [2019-12-07 18:52:23,355 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:23,355 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:52:23,355 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [189556740] [2019-12-07 18:52:23,355 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:52:23,355 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:23,355 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:52:23,355 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:52:23,355 INFO L87 Difference]: Start difference. First operand 5572 states and 15758 transitions. Second operand 6 states. [2019-12-07 18:52:23,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:23,637 INFO L93 Difference]: Finished difference Result 7758 states and 21582 transitions. [2019-12-07 18:52:23,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:52:23,637 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 18:52:23,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:23,643 INFO L225 Difference]: With dead ends: 7758 [2019-12-07 18:52:23,643 INFO L226 Difference]: Without dead ends: 7758 [2019-12-07 18:52:23,644 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:52:23,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7758 states. [2019-12-07 18:52:23,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7758 to 6183. [2019-12-07 18:52:23,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6183 states. [2019-12-07 18:52:23,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6183 states to 6183 states and 17345 transitions. [2019-12-07 18:52:23,731 INFO L78 Accepts]: Start accepts. Automaton has 6183 states and 17345 transitions. Word has length 66 [2019-12-07 18:52:23,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:23,731 INFO L462 AbstractCegarLoop]: Abstraction has 6183 states and 17345 transitions. [2019-12-07 18:52:23,731 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:52:23,731 INFO L276 IsEmpty]: Start isEmpty. Operand 6183 states and 17345 transitions. [2019-12-07 18:52:23,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:52:23,738 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:23,738 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:23,738 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:23,738 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:23,738 INFO L82 PathProgramCache]: Analyzing trace with hash -1405133371, now seen corresponding path program 5 times [2019-12-07 18:52:23,739 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:23,739 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2080892761] [2019-12-07 18:52:23,739 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:23,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:23,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:23,783 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2080892761] [2019-12-07 18:52:23,783 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:23,783 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:52:23,783 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [648146058] [2019-12-07 18:52:23,784 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:52:23,784 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:23,784 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:52:23,784 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:23,784 INFO L87 Difference]: Start difference. First operand 6183 states and 17345 transitions. Second operand 3 states. [2019-12-07 18:52:23,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:23,826 INFO L93 Difference]: Finished difference Result 6183 states and 17344 transitions. [2019-12-07 18:52:23,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:52:23,826 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:52:23,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:23,834 INFO L225 Difference]: With dead ends: 6183 [2019-12-07 18:52:23,834 INFO L226 Difference]: Without dead ends: 6183 [2019-12-07 18:52:23,834 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:23,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6183 states. [2019-12-07 18:52:23,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6183 to 3992. [2019-12-07 18:52:23,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3992 states. [2019-12-07 18:52:23,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3992 states to 3992 states and 11315 transitions. [2019-12-07 18:52:23,901 INFO L78 Accepts]: Start accepts. Automaton has 3992 states and 11315 transitions. Word has length 66 [2019-12-07 18:52:23,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:23,901 INFO L462 AbstractCegarLoop]: Abstraction has 3992 states and 11315 transitions. [2019-12-07 18:52:23,901 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:52:23,901 INFO L276 IsEmpty]: Start isEmpty. Operand 3992 states and 11315 transitions. [2019-12-07 18:52:23,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:52:23,906 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:23,906 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:23,906 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:23,906 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:23,906 INFO L82 PathProgramCache]: Analyzing trace with hash -1374987048, now seen corresponding path program 1 times [2019-12-07 18:52:23,906 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:23,906 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1176067045] [2019-12-07 18:52:23,906 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:23,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:23,959 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:23,959 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1176067045] [2019-12-07 18:52:23,959 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:23,959 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:52:23,960 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1877862500] [2019-12-07 18:52:23,960 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:52:23,960 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:23,960 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:52:23,960 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:23,960 INFO L87 Difference]: Start difference. First operand 3992 states and 11315 transitions. Second operand 5 states. [2019-12-07 18:52:24,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:24,001 INFO L93 Difference]: Finished difference Result 5974 states and 16967 transitions. [2019-12-07 18:52:24,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:52:24,001 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2019-12-07 18:52:24,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:24,003 INFO L225 Difference]: With dead ends: 5974 [2019-12-07 18:52:24,003 INFO L226 Difference]: Without dead ends: 2233 [2019-12-07 18:52:24,004 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:52:24,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2233 states. [2019-12-07 18:52:24,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2233 to 2233. [2019-12-07 18:52:24,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2233 states. [2019-12-07 18:52:24,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2233 states to 2233 states and 6287 transitions. [2019-12-07 18:52:24,034 INFO L78 Accepts]: Start accepts. Automaton has 2233 states and 6287 transitions. Word has length 67 [2019-12-07 18:52:24,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:24,034 INFO L462 AbstractCegarLoop]: Abstraction has 2233 states and 6287 transitions. [2019-12-07 18:52:24,034 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:52:24,034 INFO L276 IsEmpty]: Start isEmpty. Operand 2233 states and 6287 transitions. [2019-12-07 18:52:24,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:52:24,036 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:24,036 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:24,036 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:24,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:24,037 INFO L82 PathProgramCache]: Analyzing trace with hash -846830136, now seen corresponding path program 2 times [2019-12-07 18:52:24,037 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:24,037 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2002212195] [2019-12-07 18:52:24,037 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:24,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:24,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:24,092 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2002212195] [2019-12-07 18:52:24,092 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:24,092 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:52:24,092 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [531953575] [2019-12-07 18:52:24,092 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:52:24,092 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:24,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:52:24,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:52:24,093 INFO L87 Difference]: Start difference. First operand 2233 states and 6287 transitions. Second operand 6 states. [2019-12-07 18:52:24,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:24,358 INFO L93 Difference]: Finished difference Result 3694 states and 10257 transitions. [2019-12-07 18:52:24,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:52:24,359 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 18:52:24,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:24,362 INFO L225 Difference]: With dead ends: 3694 [2019-12-07 18:52:24,362 INFO L226 Difference]: Without dead ends: 3694 [2019-12-07 18:52:24,362 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:52:24,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3694 states. [2019-12-07 18:52:24,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3694 to 2185. [2019-12-07 18:52:24,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2185 states. [2019-12-07 18:52:24,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2185 states to 2185 states and 6157 transitions. [2019-12-07 18:52:24,399 INFO L78 Accepts]: Start accepts. Automaton has 2185 states and 6157 transitions. Word has length 67 [2019-12-07 18:52:24,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:24,399 INFO L462 AbstractCegarLoop]: Abstraction has 2185 states and 6157 transitions. [2019-12-07 18:52:24,399 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:52:24,399 INFO L276 IsEmpty]: Start isEmpty. Operand 2185 states and 6157 transitions. [2019-12-07 18:52:24,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:52:24,401 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:24,401 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:24,402 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:24,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:24,402 INFO L82 PathProgramCache]: Analyzing trace with hash 807616968, now seen corresponding path program 3 times [2019-12-07 18:52:24,402 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:24,402 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1672923868] [2019-12-07 18:52:24,402 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:24,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:24,428 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:24,429 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1672923868] [2019-12-07 18:52:24,429 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:24,429 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:52:24,429 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [328335382] [2019-12-07 18:52:24,429 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:52:24,429 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:24,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:52:24,430 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:24,430 INFO L87 Difference]: Start difference. First operand 2185 states and 6157 transitions. Second operand 3 states. [2019-12-07 18:52:24,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:24,443 INFO L93 Difference]: Finished difference Result 2026 states and 5564 transitions. [2019-12-07 18:52:24,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:52:24,443 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 18:52:24,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:24,446 INFO L225 Difference]: With dead ends: 2026 [2019-12-07 18:52:24,446 INFO L226 Difference]: Without dead ends: 2026 [2019-12-07 18:52:24,446 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:24,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2026 states. [2019-12-07 18:52:24,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2026 to 1963. [2019-12-07 18:52:24,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1963 states. [2019-12-07 18:52:24,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1963 states to 1963 states and 5391 transitions. [2019-12-07 18:52:24,474 INFO L78 Accepts]: Start accepts. Automaton has 1963 states and 5391 transitions. Word has length 67 [2019-12-07 18:52:24,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:24,474 INFO L462 AbstractCegarLoop]: Abstraction has 1963 states and 5391 transitions. [2019-12-07 18:52:24,474 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:52:24,474 INFO L276 IsEmpty]: Start isEmpty. Operand 1963 states and 5391 transitions. [2019-12-07 18:52:24,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:52:24,476 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:24,476 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:24,477 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:24,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:24,477 INFO L82 PathProgramCache]: Analyzing trace with hash -213601006, now seen corresponding path program 1 times [2019-12-07 18:52:24,477 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:24,477 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1545460764] [2019-12-07 18:52:24,477 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:24,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:24,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:24,539 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1545460764] [2019-12-07 18:52:24,539 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:24,540 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:52:24,540 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2074619744] [2019-12-07 18:52:24,540 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:52:24,540 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:24,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:52:24,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:52:24,540 INFO L87 Difference]: Start difference. First operand 1963 states and 5391 transitions. Second operand 6 states. [2019-12-07 18:52:24,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:24,586 INFO L93 Difference]: Finished difference Result 3693 states and 10196 transitions. [2019-12-07 18:52:24,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:52:24,587 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2019-12-07 18:52:24,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:24,588 INFO L225 Difference]: With dead ends: 3693 [2019-12-07 18:52:24,588 INFO L226 Difference]: Without dead ends: 1771 [2019-12-07 18:52:24,589 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:52:24,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1771 states. [2019-12-07 18:52:24,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1771 to 1771. [2019-12-07 18:52:24,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1771 states. [2019-12-07 18:52:24,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1771 states to 1771 states and 4877 transitions. [2019-12-07 18:52:24,612 INFO L78 Accepts]: Start accepts. Automaton has 1771 states and 4877 transitions. Word has length 68 [2019-12-07 18:52:24,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:24,612 INFO L462 AbstractCegarLoop]: Abstraction has 1771 states and 4877 transitions. [2019-12-07 18:52:24,612 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:52:24,612 INFO L276 IsEmpty]: Start isEmpty. Operand 1771 states and 4877 transitions. [2019-12-07 18:52:24,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:52:24,614 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:24,614 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:24,614 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:24,614 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:24,614 INFO L82 PathProgramCache]: Analyzing trace with hash -1259160564, now seen corresponding path program 2 times [2019-12-07 18:52:24,614 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:24,614 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [303927904] [2019-12-07 18:52:24,614 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:24,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:52:24,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:52:24,701 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:52:24,701 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:52:24,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] ULTIMATE.startENTRY-->L805: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t1882~0.base_20| 4) |v_#length_25|) (= 0 v_~x~0_194) (= 0 v_~x$r_buff0_thd2~0_213) (= 0 v_~weak$$choice0~0_14) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$w_buff0~0_268) (= (store .cse0 |v_ULTIMATE.start_main_~#t1882~0.base_20| 1) |v_#valid_53|) (= |v_ULTIMATE.start_main_~#t1882~0.offset_17| 0) (= 0 v_~x$r_buff1_thd2~0_212) (= v_~x$r_buff1_thd0~0_297 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1882~0.base_20|) 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$read_delayed_var~0.base_7) (= v_~x$r_buff1_thd1~0_187 0) (= v_~__unbuffered_p2_EBX~0_22 0) (= v_~x$r_buff0_thd0~0_372 0) (= 0 v_~x$read_delayed~0_6) (= v_~__unbuffered_cnt~0_155 0) (= 0 v_~x$w_buff1~0_230) (= 0 |v_#NULL.base_4|) (= 0 v_~x$r_buff1_thd3~0_195) (= 0 v_~x$r_buff0_thd3~0_123) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1882~0.base_20| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1882~0.base_20|) |v_ULTIMATE.start_main_~#t1882~0.offset_17| 0)) |v_#memory_int_21|) (= |v_#NULL.offset_4| 0) (= 0 v_~x$w_buff1_used~0_504) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~x$r_buff0_thd1~0_120 0) (= 0 v_~__unbuffered_p2_EAX~0_22) (= v_~x$flush_delayed~0_34 0) (= v_~main$tmp_guard0~0_24 0) (= v_~weak$$choice2~0_110 0) (= v_~y~0_136 0) (= 0 v_~x$w_buff0_used~0_807) (= v_~main$tmp_guard1~0_22 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1882~0.base_20|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ~x$w_buff0~0=v_~x$w_buff0~0_268, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ~x$flush_delayed~0=v_~x$flush_delayed~0_34, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_39|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_45|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_187, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_123, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_50|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_32|, ULTIMATE.start_main_~#t1883~0.offset=|v_ULTIMATE.start_main_~#t1883~0.offset_17|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_372, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_37|, ~x$w_buff1~0=v_~x$w_buff1~0_230, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_42|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_504, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_212, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~x~0=v_~x~0_194, ULTIMATE.start_main_~#t1882~0.base=|v_ULTIMATE.start_main_~#t1882~0.base_20|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_120, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_29|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_195, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_125|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_25|, ULTIMATE.start_main_~#t1884~0.offset=|v_ULTIMATE.start_main_~#t1884~0.offset_16|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y~0=v_~y~0_136, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_25|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_48|, ULTIMATE.start_main_~#t1883~0.base=|v_ULTIMATE.start_main_~#t1883~0.base_21|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ULTIMATE.start_main_~#t1882~0.offset=|v_ULTIMATE.start_main_~#t1882~0.offset_17|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_297, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_213, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_38|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_807, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_32|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t1884~0.base=|v_ULTIMATE.start_main_~#t1884~0.base_20|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t1883~0.offset, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1882~0.base, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t1884~0.offset, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t1883~0.base, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1882~0.offset, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1884~0.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 18:52:24,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L805-1-->L807: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1883~0.base_11|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1883~0.base_11|) (= |v_ULTIMATE.start_main_~#t1883~0.offset_10| 0) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1883~0.base_11|) 0) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1883~0.base_11| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1883~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1883~0.base_11|) |v_ULTIMATE.start_main_~#t1883~0.offset_10| 1)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1883~0.base_11| 4) |v_#length_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1883~0.offset=|v_ULTIMATE.start_main_~#t1883~0.offset_10|, ULTIMATE.start_main_~#t1883~0.base=|v_ULTIMATE.start_main_~#t1883~0.base_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, ULTIMATE.start_main_~#t1883~0.offset, ULTIMATE.start_main_~#t1883~0.base, #length] because there is no mapped edge [2019-12-07 18:52:24,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L807-1-->L809: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1884~0.base_9|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1884~0.base_9|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1884~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1884~0.base_9|) |v_ULTIMATE.start_main_~#t1884~0.offset_8| 2))) (= 0 |v_ULTIMATE.start_main_~#t1884~0.offset_8|) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1884~0.base_9| 1) |v_#valid_27|) (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1884~0.base_9|) 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1884~0.base_9| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1884~0.base=|v_ULTIMATE.start_main_~#t1884~0.base_9|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1884~0.offset=|v_ULTIMATE.start_main_~#t1884~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1884~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1884~0.offset] because there is no mapped edge [2019-12-07 18:52:24,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] P1ENTRY-->L4-3: Formula: (and (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11)) (= v_P1Thread1of1ForFork1_~arg.offset_9 |v_P1Thread1of1ForFork1_#in~arg.offset_11|) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11) (= 1 v_~x$w_buff0_used~0_98) (= 2 v_~x$w_buff0~0_31) (= v_P1Thread1of1ForFork1_~arg.base_9 |v_P1Thread1of1ForFork1_#in~arg.base_11|) (= v_~x$w_buff1_used~0_55 v_~x$w_buff0_used~0_99) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| (ite (not (and (not (= (mod v_~x$w_buff0_used~0_98 256) 0)) (not (= 0 (mod v_~x$w_buff1_used~0_55 256))))) 1 0)) (= v_~x$w_buff0~0_32 v_~x$w_buff1~0_21)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_32, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_99} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11, ~x$w_buff0~0=v_~x$w_buff0~0_31, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_9, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_9, ~x$w_buff1~0=v_~x$w_buff1~0_21, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_55, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 18:52:24,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L782-2-->L782-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-241338113 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd3~0_In-241338113 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-241338113| ~x$w_buff1~0_In-241338113)) (and (= |P2Thread1of1ForFork2_#t~ite15_Out-241338113| ~x~0_In-241338113) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-241338113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-241338113, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-241338113, ~x~0=~x~0_In-241338113} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-241338113|, ~x$w_buff1~0=~x$w_buff1~0_In-241338113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-241338113, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-241338113, ~x~0=~x~0_In-241338113} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 18:52:24,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L782-4-->L783: Formula: (= v_~x~0_20 |v_P2Thread1of1ForFork2_#t~ite15_10|) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_10|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_9|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|, ~x~0=v_~x~0_20} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 18:52:24,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L783-->L783-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-534143727 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd3~0_In-534143727 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite17_Out-534143727|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In-534143727 |P2Thread1of1ForFork2_#t~ite17_Out-534143727|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-534143727, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-534143727} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-534143727, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-534143727|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-534143727} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 18:52:24,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L784-->L784-2: Formula: (let ((.cse3 (= (mod ~x$r_buff1_thd3~0_In1847898933 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In1847898933 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1847898933 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In1847898933 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite18_Out1847898933|)) (and (= ~x$w_buff1_used~0_In1847898933 |P2Thread1of1ForFork2_#t~ite18_Out1847898933|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1847898933, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1847898933, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1847898933, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1847898933} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1847898933, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1847898933, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1847898933, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out1847898933|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1847898933} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 18:52:24,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L733-2-->L733-5: Formula: (let ((.cse2 (= |P0Thread1of1ForFork0_#t~ite4_Out427373014| |P0Thread1of1ForFork0_#t~ite3_Out427373014|)) (.cse1 (= (mod ~x$w_buff1_used~0_In427373014 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd1~0_In427373014 256) 0))) (or (and (or .cse0 .cse1) .cse2 (= |P0Thread1of1ForFork0_#t~ite3_Out427373014| ~x~0_In427373014)) (and .cse2 (= ~x$w_buff1~0_In427373014 |P0Thread1of1ForFork0_#t~ite3_Out427373014|) (not .cse1) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In427373014, ~x$w_buff1_used~0=~x$w_buff1_used~0_In427373014, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In427373014, ~x~0=~x~0_In427373014} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out427373014|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out427373014|, ~x$w_buff1~0=~x$w_buff1~0_In427373014, ~x$w_buff1_used~0=~x$w_buff1_used~0_In427373014, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In427373014, ~x~0=~x~0_In427373014} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 18:52:24,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L734-->L734-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In2137251104 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In2137251104 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In2137251104 |P0Thread1of1ForFork0_#t~ite5_Out2137251104|)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out2137251104|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2137251104, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2137251104} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out2137251104|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2137251104, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2137251104} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:52:24,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L735-->L735-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-1173307813 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-1173307813 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-1173307813 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In-1173307813 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1173307813| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1173307813| ~x$w_buff1_used~0_In-1173307813) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1173307813, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1173307813, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1173307813, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1173307813} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1173307813|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1173307813, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1173307813, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1173307813, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1173307813} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:52:24,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L785-->L785-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1247743138 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1247743138 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd3~0_In-1247743138 |P2Thread1of1ForFork2_#t~ite19_Out-1247743138|)) (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-1247743138|) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1247743138, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1247743138} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1247743138, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1247743138|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1247743138} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 18:52:24,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In135754150 256))) (.cse1 (= (mod ~x$r_buff1_thd3~0_In135754150 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In135754150 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In135754150 256)))) (or (and (= ~x$r_buff1_thd3~0_In135754150 |P2Thread1of1ForFork2_#t~ite20_Out135754150|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out135754150|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In135754150, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In135754150, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In135754150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In135754150} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out135754150|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In135754150, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In135754150, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In135754150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In135754150} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 18:52:24,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L786-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P2Thread1of1ForFork2_#t~ite20_52| v_~x$r_buff1_thd3~0_147)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_52|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_51|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_147, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 18:52:24,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L736-->L736-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1749269369 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-1749269369 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-1749269369|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~x$r_buff0_thd1~0_In-1749269369 |P0Thread1of1ForFork0_#t~ite7_Out-1749269369|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1749269369, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1749269369} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1749269369, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1749269369|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1749269369} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 18:52:24,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L737-->L737-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In2125511565 256))) (.cse2 (= (mod ~x$r_buff0_thd1~0_In2125511565 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In2125511565 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In2125511565 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out2125511565|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~x$r_buff1_thd1~0_In2125511565 |P0Thread1of1ForFork0_#t~ite8_Out2125511565|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2125511565, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2125511565, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2125511565, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2125511565} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2125511565, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out2125511565|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2125511565, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2125511565, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2125511565} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:52:24,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L737-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_61 |v_P0Thread1of1ForFork0_#t~ite8_24|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_23|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_61} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 18:52:24,710 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L763-->L763-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In588482150 256))) (.cse0 (= (mod ~x$r_buff0_thd2~0_In588482150 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In588482150 |P1Thread1of1ForFork1_#t~ite11_Out588482150|)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out588482150| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In588482150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In588482150} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out588482150|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In588482150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In588482150} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 18:52:24,710 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L764-->L764-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In-646713955 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In-646713955 256))) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-646713955 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-646713955 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-646713955|)) (and (= ~x$w_buff1_used~0_In-646713955 |P1Thread1of1ForFork1_#t~ite12_Out-646713955|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-646713955, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-646713955, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-646713955, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-646713955} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-646713955, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-646713955, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-646713955|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-646713955, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-646713955} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 18:52:24,710 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L765-->L766: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_Out853370930 ~x$r_buff0_thd2~0_In853370930)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In853370930 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In853370930 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse2) (not .cse0) (= ~x$r_buff0_thd2~0_Out853370930 0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In853370930, ~x$w_buff0_used~0=~x$w_buff0_used~0_In853370930} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out853370930|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out853370930, ~x$w_buff0_used~0=~x$w_buff0_used~0_In853370930} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 18:52:24,710 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-63178737 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-63178737 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-63178737 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-63178737 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out-63178737| ~x$r_buff1_thd2~0_In-63178737)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-63178737|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-63178737, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-63178737, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-63178737, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-63178737} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-63178737, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-63178737, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-63178737, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-63178737|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-63178737} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 18:52:24,710 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L766-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_162 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= (+ v_~__unbuffered_cnt~0_93 1) v_~__unbuffered_cnt~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_162, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_92, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:52:24,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L809-1-->L815: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:52:24,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L815-2-->L815-5: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In1019323862 256))) (.cse0 (= (mod ~x$r_buff1_thd0~0_In1019323862 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite24_Out1019323862| |ULTIMATE.start_main_#t~ite25_Out1019323862|))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite24_Out1019323862| ~x~0_In1019323862) .cse2) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite24_Out1019323862| ~x$w_buff1~0_In1019323862) (not .cse0) .cse2))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1019323862, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1019323862, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1019323862, ~x~0=~x~0_In1019323862} OutVars{~x$w_buff1~0=~x$w_buff1~0_In1019323862, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out1019323862|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out1019323862|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1019323862, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1019323862, ~x~0=~x~0_In1019323862} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 18:52:24,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L816-->L816-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-82892564 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-82892564 256)))) (or (and (= |ULTIMATE.start_main_#t~ite26_Out-82892564| ~x$w_buff0_used~0_In-82892564) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite26_Out-82892564| 0) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-82892564, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-82892564} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-82892564, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-82892564|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-82892564} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 18:52:24,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L817-->L817-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In846908113 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In846908113 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In846908113 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In846908113 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite27_Out846908113| ~x$w_buff1_used~0_In846908113)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite27_Out846908113|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In846908113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In846908113, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In846908113, ~x$w_buff0_used~0=~x$w_buff0_used~0_In846908113} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In846908113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In846908113, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out846908113|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In846908113, ~x$w_buff0_used~0=~x$w_buff0_used~0_In846908113} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 18:52:24,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L818-->L818-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In1839753588 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1839753588 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In1839753588 |ULTIMATE.start_main_#t~ite28_Out1839753588|)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite28_Out1839753588|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1839753588, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1839753588} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1839753588, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out1839753588|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1839753588} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 18:52:24,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L819-->L819-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In2123247048 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In2123247048 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd0~0_In2123247048 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In2123247048 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_Out2123247048| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite29_Out2123247048| ~x$r_buff1_thd0~0_In2123247048) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2123247048, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2123247048, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2123247048, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2123247048} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2123247048, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out2123247048|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2123247048, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2123247048, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2123247048} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 18:52:24,714 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L831-->L832: Formula: (and (= v_~x$r_buff0_thd0~0_112 v_~x$r_buff0_thd0~0_111) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_112, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_111, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:52:24,715 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L834-->L837-1: Formula: (and (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= (mod v_~x$flush_delayed~0_23 256) 0)) (= v_~x$mem_tmp~0_13 v_~x~0_153) (= v_~x$flush_delayed~0_22 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_23, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ~x$flush_delayed~0=v_~x$flush_delayed~0_22, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13, ~x~0=v_~x~0_153, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:52:24,715 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L837-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:52:24,781 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:52:24 BasicIcfg [2019-12-07 18:52:24,781 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:52:24,781 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:52:24,781 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:52:24,781 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:52:24,782 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:51:35" (3/4) ... [2019-12-07 18:52:24,783 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:52:24,784 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] ULTIMATE.startENTRY-->L805: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t1882~0.base_20| 4) |v_#length_25|) (= 0 v_~x~0_194) (= 0 v_~x$r_buff0_thd2~0_213) (= 0 v_~weak$$choice0~0_14) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$w_buff0~0_268) (= (store .cse0 |v_ULTIMATE.start_main_~#t1882~0.base_20| 1) |v_#valid_53|) (= |v_ULTIMATE.start_main_~#t1882~0.offset_17| 0) (= 0 v_~x$r_buff1_thd2~0_212) (= v_~x$r_buff1_thd0~0_297 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1882~0.base_20|) 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$read_delayed_var~0.base_7) (= v_~x$r_buff1_thd1~0_187 0) (= v_~__unbuffered_p2_EBX~0_22 0) (= v_~x$r_buff0_thd0~0_372 0) (= 0 v_~x$read_delayed~0_6) (= v_~__unbuffered_cnt~0_155 0) (= 0 v_~x$w_buff1~0_230) (= 0 |v_#NULL.base_4|) (= 0 v_~x$r_buff1_thd3~0_195) (= 0 v_~x$r_buff0_thd3~0_123) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1882~0.base_20| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1882~0.base_20|) |v_ULTIMATE.start_main_~#t1882~0.offset_17| 0)) |v_#memory_int_21|) (= |v_#NULL.offset_4| 0) (= 0 v_~x$w_buff1_used~0_504) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~x$r_buff0_thd1~0_120 0) (= 0 v_~__unbuffered_p2_EAX~0_22) (= v_~x$flush_delayed~0_34 0) (= v_~main$tmp_guard0~0_24 0) (= v_~weak$$choice2~0_110 0) (= v_~y~0_136 0) (= 0 v_~x$w_buff0_used~0_807) (= v_~main$tmp_guard1~0_22 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1882~0.base_20|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ~x$w_buff0~0=v_~x$w_buff0~0_268, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ~x$flush_delayed~0=v_~x$flush_delayed~0_34, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_39|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_45|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_187, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_123, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_50|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_32|, ULTIMATE.start_main_~#t1883~0.offset=|v_ULTIMATE.start_main_~#t1883~0.offset_17|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_372, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_37|, ~x$w_buff1~0=v_~x$w_buff1~0_230, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_42|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_504, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_212, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~x~0=v_~x~0_194, ULTIMATE.start_main_~#t1882~0.base=|v_ULTIMATE.start_main_~#t1882~0.base_20|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_120, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_29|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_195, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_125|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_25|, ULTIMATE.start_main_~#t1884~0.offset=|v_ULTIMATE.start_main_~#t1884~0.offset_16|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y~0=v_~y~0_136, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_25|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_48|, ULTIMATE.start_main_~#t1883~0.base=|v_ULTIMATE.start_main_~#t1883~0.base_21|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ULTIMATE.start_main_~#t1882~0.offset=|v_ULTIMATE.start_main_~#t1882~0.offset_17|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_297, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_213, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_38|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_807, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_32|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t1884~0.base=|v_ULTIMATE.start_main_~#t1884~0.base_20|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t1883~0.offset, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1882~0.base, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t1884~0.offset, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t1883~0.base, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1882~0.offset, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1884~0.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 18:52:24,784 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L805-1-->L807: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1883~0.base_11|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1883~0.base_11|) (= |v_ULTIMATE.start_main_~#t1883~0.offset_10| 0) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1883~0.base_11|) 0) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1883~0.base_11| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1883~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1883~0.base_11|) |v_ULTIMATE.start_main_~#t1883~0.offset_10| 1)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1883~0.base_11| 4) |v_#length_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1883~0.offset=|v_ULTIMATE.start_main_~#t1883~0.offset_10|, ULTIMATE.start_main_~#t1883~0.base=|v_ULTIMATE.start_main_~#t1883~0.base_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, ULTIMATE.start_main_~#t1883~0.offset, ULTIMATE.start_main_~#t1883~0.base, #length] because there is no mapped edge [2019-12-07 18:52:24,784 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L807-1-->L809: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1884~0.base_9|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1884~0.base_9|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1884~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1884~0.base_9|) |v_ULTIMATE.start_main_~#t1884~0.offset_8| 2))) (= 0 |v_ULTIMATE.start_main_~#t1884~0.offset_8|) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1884~0.base_9| 1) |v_#valid_27|) (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1884~0.base_9|) 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1884~0.base_9| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1884~0.base=|v_ULTIMATE.start_main_~#t1884~0.base_9|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1884~0.offset=|v_ULTIMATE.start_main_~#t1884~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1884~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1884~0.offset] because there is no mapped edge [2019-12-07 18:52:24,784 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] P1ENTRY-->L4-3: Formula: (and (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11)) (= v_P1Thread1of1ForFork1_~arg.offset_9 |v_P1Thread1of1ForFork1_#in~arg.offset_11|) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11) (= 1 v_~x$w_buff0_used~0_98) (= 2 v_~x$w_buff0~0_31) (= v_P1Thread1of1ForFork1_~arg.base_9 |v_P1Thread1of1ForFork1_#in~arg.base_11|) (= v_~x$w_buff1_used~0_55 v_~x$w_buff0_used~0_99) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| (ite (not (and (not (= (mod v_~x$w_buff0_used~0_98 256) 0)) (not (= 0 (mod v_~x$w_buff1_used~0_55 256))))) 1 0)) (= v_~x$w_buff0~0_32 v_~x$w_buff1~0_21)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_32, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_99} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11, ~x$w_buff0~0=v_~x$w_buff0~0_31, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_9, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_9, ~x$w_buff1~0=v_~x$w_buff1~0_21, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_55, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 18:52:24,785 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L782-2-->L782-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-241338113 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd3~0_In-241338113 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-241338113| ~x$w_buff1~0_In-241338113)) (and (= |P2Thread1of1ForFork2_#t~ite15_Out-241338113| ~x~0_In-241338113) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-241338113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-241338113, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-241338113, ~x~0=~x~0_In-241338113} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-241338113|, ~x$w_buff1~0=~x$w_buff1~0_In-241338113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-241338113, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-241338113, ~x~0=~x~0_In-241338113} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 18:52:24,785 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L782-4-->L783: Formula: (= v_~x~0_20 |v_P2Thread1of1ForFork2_#t~ite15_10|) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_10|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_9|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|, ~x~0=v_~x~0_20} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 18:52:24,785 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L783-->L783-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-534143727 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd3~0_In-534143727 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite17_Out-534143727|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In-534143727 |P2Thread1of1ForFork2_#t~ite17_Out-534143727|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-534143727, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-534143727} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-534143727, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-534143727|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-534143727} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 18:52:24,786 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L784-->L784-2: Formula: (let ((.cse3 (= (mod ~x$r_buff1_thd3~0_In1847898933 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In1847898933 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1847898933 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In1847898933 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite18_Out1847898933|)) (and (= ~x$w_buff1_used~0_In1847898933 |P2Thread1of1ForFork2_#t~ite18_Out1847898933|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1847898933, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1847898933, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1847898933, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1847898933} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1847898933, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1847898933, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1847898933, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out1847898933|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1847898933} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 18:52:24,786 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L733-2-->L733-5: Formula: (let ((.cse2 (= |P0Thread1of1ForFork0_#t~ite4_Out427373014| |P0Thread1of1ForFork0_#t~ite3_Out427373014|)) (.cse1 (= (mod ~x$w_buff1_used~0_In427373014 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd1~0_In427373014 256) 0))) (or (and (or .cse0 .cse1) .cse2 (= |P0Thread1of1ForFork0_#t~ite3_Out427373014| ~x~0_In427373014)) (and .cse2 (= ~x$w_buff1~0_In427373014 |P0Thread1of1ForFork0_#t~ite3_Out427373014|) (not .cse1) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In427373014, ~x$w_buff1_used~0=~x$w_buff1_used~0_In427373014, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In427373014, ~x~0=~x~0_In427373014} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out427373014|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out427373014|, ~x$w_buff1~0=~x$w_buff1~0_In427373014, ~x$w_buff1_used~0=~x$w_buff1_used~0_In427373014, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In427373014, ~x~0=~x~0_In427373014} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 18:52:24,786 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L734-->L734-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In2137251104 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In2137251104 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In2137251104 |P0Thread1of1ForFork0_#t~ite5_Out2137251104|)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out2137251104|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2137251104, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2137251104} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out2137251104|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2137251104, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2137251104} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:52:24,786 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L735-->L735-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-1173307813 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-1173307813 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-1173307813 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In-1173307813 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1173307813| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1173307813| ~x$w_buff1_used~0_In-1173307813) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1173307813, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1173307813, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1173307813, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1173307813} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1173307813|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1173307813, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1173307813, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1173307813, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1173307813} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:52:24,787 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L785-->L785-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1247743138 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1247743138 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd3~0_In-1247743138 |P2Thread1of1ForFork2_#t~ite19_Out-1247743138|)) (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-1247743138|) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1247743138, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1247743138} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1247743138, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1247743138|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1247743138} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 18:52:24,787 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In135754150 256))) (.cse1 (= (mod ~x$r_buff1_thd3~0_In135754150 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In135754150 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In135754150 256)))) (or (and (= ~x$r_buff1_thd3~0_In135754150 |P2Thread1of1ForFork2_#t~ite20_Out135754150|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out135754150|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In135754150, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In135754150, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In135754150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In135754150} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out135754150|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In135754150, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In135754150, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In135754150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In135754150} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 18:52:24,787 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L786-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P2Thread1of1ForFork2_#t~ite20_52| v_~x$r_buff1_thd3~0_147)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_52|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_51|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_147, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 18:52:24,787 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L736-->L736-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1749269369 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-1749269369 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-1749269369|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~x$r_buff0_thd1~0_In-1749269369 |P0Thread1of1ForFork0_#t~ite7_Out-1749269369|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1749269369, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1749269369} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1749269369, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1749269369|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1749269369} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 18:52:24,788 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L737-->L737-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In2125511565 256))) (.cse2 (= (mod ~x$r_buff0_thd1~0_In2125511565 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In2125511565 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In2125511565 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out2125511565|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~x$r_buff1_thd1~0_In2125511565 |P0Thread1of1ForFork0_#t~ite8_Out2125511565|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2125511565, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2125511565, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2125511565, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2125511565} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2125511565, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out2125511565|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2125511565, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2125511565, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2125511565} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:52:24,788 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L737-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_61 |v_P0Thread1of1ForFork0_#t~ite8_24|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_23|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_61} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 18:52:24,788 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L763-->L763-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In588482150 256))) (.cse0 (= (mod ~x$r_buff0_thd2~0_In588482150 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In588482150 |P1Thread1of1ForFork1_#t~ite11_Out588482150|)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out588482150| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In588482150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In588482150} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out588482150|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In588482150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In588482150} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 18:52:24,788 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L764-->L764-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In-646713955 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In-646713955 256))) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-646713955 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-646713955 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-646713955|)) (and (= ~x$w_buff1_used~0_In-646713955 |P1Thread1of1ForFork1_#t~ite12_Out-646713955|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-646713955, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-646713955, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-646713955, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-646713955} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-646713955, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-646713955, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-646713955|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-646713955, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-646713955} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 18:52:24,789 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L765-->L766: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_Out853370930 ~x$r_buff0_thd2~0_In853370930)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In853370930 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In853370930 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse2) (not .cse0) (= ~x$r_buff0_thd2~0_Out853370930 0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In853370930, ~x$w_buff0_used~0=~x$w_buff0_used~0_In853370930} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out853370930|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out853370930, ~x$w_buff0_used~0=~x$w_buff0_used~0_In853370930} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 18:52:24,789 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-63178737 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-63178737 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-63178737 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-63178737 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out-63178737| ~x$r_buff1_thd2~0_In-63178737)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-63178737|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-63178737, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-63178737, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-63178737, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-63178737} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-63178737, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-63178737, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-63178737, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-63178737|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-63178737} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 18:52:24,789 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L766-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_162 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= (+ v_~__unbuffered_cnt~0_93 1) v_~__unbuffered_cnt~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_162, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_92, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:52:24,789 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L809-1-->L815: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:52:24,789 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L815-2-->L815-5: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In1019323862 256))) (.cse0 (= (mod ~x$r_buff1_thd0~0_In1019323862 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite24_Out1019323862| |ULTIMATE.start_main_#t~ite25_Out1019323862|))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite24_Out1019323862| ~x~0_In1019323862) .cse2) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite24_Out1019323862| ~x$w_buff1~0_In1019323862) (not .cse0) .cse2))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1019323862, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1019323862, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1019323862, ~x~0=~x~0_In1019323862} OutVars{~x$w_buff1~0=~x$w_buff1~0_In1019323862, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out1019323862|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out1019323862|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1019323862, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1019323862, ~x~0=~x~0_In1019323862} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 18:52:24,789 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L816-->L816-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-82892564 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-82892564 256)))) (or (and (= |ULTIMATE.start_main_#t~ite26_Out-82892564| ~x$w_buff0_used~0_In-82892564) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite26_Out-82892564| 0) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-82892564, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-82892564} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-82892564, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-82892564|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-82892564} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 18:52:24,790 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L817-->L817-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In846908113 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In846908113 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In846908113 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In846908113 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite27_Out846908113| ~x$w_buff1_used~0_In846908113)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite27_Out846908113|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In846908113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In846908113, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In846908113, ~x$w_buff0_used~0=~x$w_buff0_used~0_In846908113} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In846908113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In846908113, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out846908113|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In846908113, ~x$w_buff0_used~0=~x$w_buff0_used~0_In846908113} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 18:52:24,790 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L818-->L818-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In1839753588 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1839753588 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In1839753588 |ULTIMATE.start_main_#t~ite28_Out1839753588|)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite28_Out1839753588|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1839753588, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1839753588} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1839753588, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out1839753588|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1839753588} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 18:52:24,790 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L819-->L819-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In2123247048 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In2123247048 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd0~0_In2123247048 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In2123247048 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_Out2123247048| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite29_Out2123247048| ~x$r_buff1_thd0~0_In2123247048) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2123247048, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2123247048, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2123247048, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2123247048} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2123247048, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out2123247048|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2123247048, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2123247048, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2123247048} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 18:52:24,793 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L831-->L832: Formula: (and (= v_~x$r_buff0_thd0~0_112 v_~x$r_buff0_thd0~0_111) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_112, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_111, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:52:24,793 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L834-->L837-1: Formula: (and (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= (mod v_~x$flush_delayed~0_23 256) 0)) (= v_~x$mem_tmp~0_13 v_~x~0_153) (= v_~x$flush_delayed~0_22 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_23, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ~x$flush_delayed~0=v_~x$flush_delayed~0_22, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13, ~x~0=v_~x~0_153, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:52:24,793 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L837-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:52:24,850 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_2f4000ff-d18c-4c43-b686-420c5b326125/bin/uautomizer/witness.graphml [2019-12-07 18:52:24,851 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:52:24,852 INFO L168 Benchmark]: Toolchain (without parser) took 50162.23 ms. Allocated memory was 1.0 GB in the beginning and 6.4 GB in the end (delta: 5.4 GB). Free memory was 940.8 MB in the beginning and 2.5 GB in the end (delta: -1.5 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. [2019-12-07 18:52:24,852 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:52:24,852 INFO L168 Benchmark]: CACSL2BoogieTranslator took 374.99 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.3 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -130.1 MB). Peak memory consumption was 20.0 MB. Max. memory is 11.5 GB. [2019-12-07 18:52:24,853 INFO L168 Benchmark]: Boogie Procedure Inliner took 41.38 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:52:24,853 INFO L168 Benchmark]: Boogie Preprocessor took 26.19 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:52:24,853 INFO L168 Benchmark]: RCFGBuilder took 412.48 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. [2019-12-07 18:52:24,854 INFO L168 Benchmark]: TraceAbstraction took 49234.26 ms. Allocated memory was 1.1 GB in the beginning and 6.4 GB in the end (delta: 5.2 GB). Free memory was 1.0 GB in the beginning and 2.5 GB in the end (delta: -1.5 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. [2019-12-07 18:52:24,854 INFO L168 Benchmark]: Witness Printer took 69.77 ms. Allocated memory is still 6.4 GB. Free memory was 2.5 GB in the beginning and 2.5 GB in the end (delta: 16.2 MB). Peak memory consumption was 16.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:52:24,855 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 374.99 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.3 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -130.1 MB). Peak memory consumption was 20.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 41.38 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.19 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 412.48 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 49234.26 ms. Allocated memory was 1.1 GB in the beginning and 6.4 GB in the end (delta: 5.2 GB). Free memory was 1.0 GB in the beginning and 2.5 GB in the end (delta: -1.5 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. * Witness Printer took 69.77 ms. Allocated memory is still 6.4 GB. Free memory was 2.5 GB in the beginning and 2.5 GB in the end (delta: 16.2 MB). Peak memory consumption was 16.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.0s, 174 ProgramPointsBefore, 94 ProgramPointsAfterwards, 211 TransitionsBefore, 106 TransitionsAfterwards, 17074 CoEnabledTransitionPairs, 7 FixpointIterations, 31 TrivialSequentialCompositions, 43 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 29 ChoiceCompositions, 6159 VarBasedMoverChecksPositive, 253 VarBasedMoverChecksNegative, 78 SemBasedMoverChecksPositive, 250 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 78277 CheckedPairsTotal, 111 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L805] FCALL, FORK 0 pthread_create(&t1882, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L807] FCALL, FORK 0 pthread_create(&t1883, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L809] FCALL, FORK 0 pthread_create(&t1884, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L752] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L753] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L754] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L755] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L756] 2 x$r_buff0_thd2 = (_Bool)1 [L759] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L776] 3 __unbuffered_p2_EAX = y [L779] 3 __unbuffered_p2_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L727] 1 y = 2 [L730] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L782] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L733] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L783] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L733] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L734] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L784] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L785] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L762] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L735] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L736] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L762] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L763] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L764] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L815] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L815] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L816] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L817] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L818] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L819] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L822] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L823] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L824] 0 x$flush_delayed = weak$$choice2 [L825] 0 x$mem_tmp = x VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L826] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L826] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L827] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L827] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L828] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L828] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L829] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L829] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L830] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L830] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L832] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L832] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L833] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 165 locations, 2 error locations. Result: UNSAFE, OverallTime: 49.0s, OverallIterations: 20, TraceHistogramMax: 1, AutomataDifference: 8.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2772 SDtfs, 2022 SDslu, 4795 SDs, 0 SdLazy, 2405 SolverSat, 111 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 120 GetRequests, 33 SyntacticMatches, 14 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=183279occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 23.1s AutomataMinimizationTime, 19 MinimizatonAttempts, 77681 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 985 NumberOfCodeBlocks, 985 NumberOfCodeBlocksAsserted, 20 NumberOfCheckSat, 898 ConstructedInterpolants, 0 QuantifiedInterpolants, 129885 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 19 InterpolantComputations, 19 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...